diff options
Diffstat (limited to 'OSCAD/Examples')
752 files changed, 0 insertions, 71183 deletions
diff --git a/OSCAD/Examples/BJT_amplifier/BJT_amplifier-cache.bak b/OSCAD/Examples/BJT_amplifier/BJT_amplifier-cache.bak deleted file mode 100644 index a2c3051..0000000 --- a/OSCAD/Examples/BJT_amplifier/BJT_amplifier-cache.bak +++ /dev/null @@ -1,133 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 04 June 2013 10:39:51 PM IST -#encoding utf-8 -# -# AC -# -DEF AC v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/BJT_amplifier/BJT_amplifier-cache.lib b/OSCAD/Examples/BJT_amplifier/BJT_amplifier-cache.lib deleted file mode 100644 index b7e5592..0000000 --- a/OSCAD/Examples/BJT_amplifier/BJT_amplifier-cache.lib +++ /dev/null @@ -1,133 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 06 June 2013 05:14:30 PM IST -#encoding utf-8 -# -# AC -# -DEF AC v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.bak b/OSCAD/Examples/BJT_amplifier/BJT_amplifier.bak deleted file mode 100644 index ad03361..0000000 --- a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.bak +++ /dev/null @@ -1,240 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 04 June 2013 10:39:51 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:BJT_amplifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "4 jun 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 7050 4450 -Wire Wire Line - 7600 4450 5100 4450 -Wire Wire Line - 7600 4450 7600 4050 -Wire Wire Line - 5100 4450 5100 4500 -Wire Wire Line - 5100 4500 3700 4500 -Connection ~ 6300 4450 -Connection ~ 6800 3300 -Wire Wire Line - 3800 3600 3700 3600 -Wire Wire Line - 7050 3950 7050 3300 -Wire Wire Line - 7050 3300 6700 3300 -Connection ~ 5100 3600 -Connection ~ 6100 3300 -Wire Wire Line - 6300 3300 5850 3300 -Wire Wire Line - 5850 3800 5850 3950 -Wire Wire Line - 5850 3300 5850 3400 -Wire Wire Line - 5100 3300 5100 3950 -Wire Wire Line - 5550 3600 4950 3600 -Wire Wire Line - 6300 4050 6300 3900 -Wire Wire Line - 6300 3900 5850 3900 -Connection ~ 5850 3900 -Connection ~ 5850 4450 -Wire Wire Line - 4550 3600 4300 3600 -Connection ~ 5100 4450 -Wire Wire Line - 5650 4450 5650 4850 -Connection ~ 5650 4450 -Wire Wire Line - 5100 2800 7600 2800 -Wire Wire Line - 7600 2800 7600 3150 -Connection ~ 6100 2800 -$Comp -L DC v1 -U 1 1 51A5D97E -P 7600 3600 -F 0 "v1" H 7400 3700 60 0000 C CNN -F 1 "DC" H 7400 3550 60 0000 C CNN -F 2 "R1" H 7300 3600 60 0000 C CNN - 1 7600 3600 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 51A5D42D -P 6800 3000 -F 0 "U1" H 6650 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 6950 3100 50 0000 C CNN - 1 6800 3000 - 1 0 0 -1 -$EndComp -$Comp -L AC v2 -U 1 1 51A486A5 -P 3700 4050 -F 0 "v2" H 3500 4150 60 0000 C CNN -F 1 "AC" H 3500 4000 60 0000 C CNN -F 2 "R1" H 3400 4050 60 0000 C CNN - 1 3700 4050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 51A48298 -P 5650 4450 -F 0 "#FLG01" H 5650 4720 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4680 30 0000 C CNN - 1 5650 4450 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 51A47FCD -P 5650 4850 -F 0 "#PWR02" H 5650 4850 30 0001 C CNN -F 1 "GND" H 5650 4780 30 0001 C CNN - 1 5650 4850 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 51A47FBC -P 4050 3600 -F 0 "R1" V 4130 3600 50 0000 C CNN -F 1 "50" V 4050 3600 50 0000 C CNN - 1 4050 3600 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 51A47FAB -P 5100 3050 -F 0 "R2" V 5180 3050 50 0000 C CNN -F 1 "200k" V 5100 3050 50 0000 C CNN - 1 5100 3050 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 51A47FA0 -P 4750 3600 -F 0 "C1" H 4800 3700 50 0000 L CNN -F 1 "40u" H 4800 3500 50 0000 L CNN - 1 4750 3600 - 0 -1 -1 0 -$EndComp -$Comp -L R R3 -U 1 1 51A47F97 -P 5100 4200 -F 0 "R3" V 5180 4200 50 0000 C CNN -F 1 "50k" V 5100 4200 50 0000 C CNN - 1 5100 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 51A47F8B -P 7050 4200 -F 0 "R6" V 7130 4200 50 0000 C CNN -F 1 "1k" V 7050 4200 50 0000 C CNN - 1 7050 4200 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 51A47F80 -P 6300 4250 -F 0 "C2" H 6350 4350 50 0000 L CNN -F 1 "100u" H 6350 4150 50 0000 L CNN - 1 6300 4250 - -1 0 0 1 -$EndComp -$Comp -L C C3 -U 1 1 51A47F75 -P 6500 3300 -F 0 "C3" H 6550 3400 50 0000 L CNN -F 1 "40u" H 6550 3200 50 0000 L CNN - 1 6500 3300 - 0 1 1 0 -$EndComp -$Comp -L R R5 -U 1 1 51A47F5C -P 6100 3050 -F 0 "R5" V 6180 3050 50 0000 C CNN -F 1 "2k" V 6100 3050 50 0000 C CNN - 1 6100 3050 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 51A47F50 -P 5850 4200 -F 0 "R4" V 5930 4200 50 0000 C CNN -F 1 "1.5k" V 5850 4200 50 0000 C CNN - 1 5850 4200 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 51A47F29 -P 5750 3600 -F 0 "Q1" H 5750 3450 50 0000 R CNN -F 1 "NPN" H 5750 3750 50 0000 R CNN - 1 5750 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.cir b/OSCAD/Examples/BJT_amplifier/BJT_amplifier.cir deleted file mode 100644 index 5000496..0000000 --- a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.cir +++ /dev/null @@ -1,21 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 29 May 2013 04:04:50 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 6 0 DC -U1 4 VPLOT8_1 -v2 2 0 AC -R1 3 2 50 -R2 6 8 200k -C1 3 8 40u -R3 8 0 50k -R6 4 0 1k -C2 0 5 100u -C3 4 7 40u -R5 6 7 2k -R4 5 0 1.5k -Q1 5 8 7 NPN - -.end diff --git a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.cir.ckt b/OSCAD/Examples/BJT_amplifier/BJT_amplifier.cir.ckt deleted file mode 100644 index 281db0e..0000000 --- a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.cir.ckt +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 29 may 2013 04:04:50 pm ist
-.include npn.lib
-
-v1 6 0 dc 10
-* Plotting option vplot8_1
-v2 2 0 ac 0.5
-r1 3 2 50
-r2 6 8 200k
-c1 3 8 40u
-r3 8 0 50k
-r6 4 0 1k
-c2 0 5 100u
-c3 4 7 40u
-r5 6 7 2k
-r4 5 0 1.5k
-q1 7 8 5 npn
-
-.ac dec 100 100Hz 10KHz
-.plot v(4)
-.end
diff --git a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.cir.out b/OSCAD/Examples/BJT_amplifier/BJT_amplifier.cir.out deleted file mode 100644 index 13bbb55..0000000 --- a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.cir.out +++ /dev/null @@ -1,25 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 29 may 2013 04:04:50 pm ist
-.include npn.lib
-
-v1 6 0 dc 10
-* Plotting option vplot8_1
-v2 2 0 ac 0.5
-r1 3 2 50
-r2 6 8 200k
-c1 3 8 40u
-r3 8 0 50k
-r6 4 0 1k
-c2 0 5 100u
-c3 4 7 40u
-r5 6 7 2k
-r4 5 0 1.5k
-q1 7 8 5 npn
-
-.ac dec 100 100Hz 10KHz
-
-* Control Statements
-.control
-run
-plot v(4)
-.endc
-.end
diff --git a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.pro b/OSCAD/Examples/BJT_amplifier/BJT_amplifier.pro deleted file mode 100644 index af68001..0000000 --- a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 28 May 2013 03:25:45 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.proj b/OSCAD/Examples/BJT_amplifier/BJT_amplifier.proj deleted file mode 100644 index 79be1da..0000000 --- a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile tp.sch diff --git a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.sch b/OSCAD/Examples/BJT_amplifier/BJT_amplifier.sch deleted file mode 100644 index 68e94c5..0000000 --- a/OSCAD/Examples/BJT_amplifier/BJT_amplifier.sch +++ /dev/null @@ -1,240 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 06 June 2013 05:14:30 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:BJT_amplifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "6 jun 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 7050 4450 -Wire Wire Line - 7600 4450 5100 4450 -Wire Wire Line - 7600 4450 7600 4050 -Wire Wire Line - 5100 4450 5100 4500 -Wire Wire Line - 5100 4500 3700 4500 -Connection ~ 6300 4450 -Connection ~ 6800 3300 -Wire Wire Line - 3800 3600 3700 3600 -Wire Wire Line - 7050 3950 7050 3300 -Wire Wire Line - 7050 3300 6700 3300 -Connection ~ 5100 3600 -Connection ~ 6100 3300 -Wire Wire Line - 6300 3300 5850 3300 -Wire Wire Line - 5850 3800 5850 3950 -Wire Wire Line - 5850 3300 5850 3400 -Wire Wire Line - 5100 3300 5100 3950 -Wire Wire Line - 5550 3600 4950 3600 -Wire Wire Line - 6300 4050 6300 3900 -Wire Wire Line - 6300 3900 5850 3900 -Connection ~ 5850 3900 -Connection ~ 5850 4450 -Wire Wire Line - 4550 3600 4300 3600 -Connection ~ 5100 4450 -Wire Wire Line - 5650 4450 5650 4850 -Connection ~ 5650 4450 -Wire Wire Line - 5100 2800 7600 2800 -Wire Wire Line - 7600 2800 7600 3150 -Connection ~ 6100 2800 -$Comp -L DC v1 -U 1 1 51A5D97E -P 7600 3600 -F 0 "v1" H 7400 3700 60 0000 C CNN -F 1 "DC" H 7400 3550 60 0000 C CNN -F 2 "R1" H 7300 3600 60 0000 C CNN - 1 7600 3600 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 51A5D42D -P 6800 3000 -F 0 "U1" H 6650 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 6950 3100 50 0000 C CNN - 1 6800 3000 - 1 0 0 -1 -$EndComp -$Comp -L AC v2 -U 1 1 51A486A5 -P 3700 4050 -F 0 "v2" H 3500 4150 60 0000 C CNN -F 1 "AC" H 3500 4000 60 0000 C CNN -F 2 "R1" H 3400 4050 60 0000 C CNN - 1 3700 4050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 51A48298 -P 5650 4450 -F 0 "#FLG01" H 5650 4720 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4680 30 0000 C CNN - 1 5650 4450 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 51A47FCD -P 5650 4850 -F 0 "#PWR02" H 5650 4850 30 0001 C CNN -F 1 "GND" H 5650 4780 30 0001 C CNN - 1 5650 4850 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 51A47FBC -P 4050 3600 -F 0 "R1" V 4130 3600 50 0000 C CNN -F 1 "50" V 4050 3600 50 0000 C CNN - 1 4050 3600 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 51A47FAB -P 5100 3050 -F 0 "R2" V 5180 3050 50 0000 C CNN -F 1 "200k" V 5100 3050 50 0000 C CNN - 1 5100 3050 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 51A47FA0 -P 4750 3600 -F 0 "C1" H 4800 3700 50 0000 L CNN -F 1 "40u" H 4800 3500 50 0000 L CNN - 1 4750 3600 - 0 -1 -1 0 -$EndComp -$Comp -L R R3 -U 1 1 51A47F97 -P 5100 4200 -F 0 "R3" V 5180 4200 50 0000 C CNN -F 1 "50k" V 5100 4200 50 0000 C CNN - 1 5100 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 51A47F8B -P 7050 4200 -F 0 "R6" V 7130 4200 50 0000 C CNN -F 1 "1k" V 7050 4200 50 0000 C CNN - 1 7050 4200 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 51A47F80 -P 6300 4250 -F 0 "C2" H 6350 4350 50 0000 L CNN -F 1 "100u" H 6350 4150 50 0000 L CNN - 1 6300 4250 - -1 0 0 1 -$EndComp -$Comp -L C C3 -U 1 1 51A47F75 -P 6500 3300 -F 0 "C3" H 6550 3400 50 0000 L CNN -F 1 "40u" H 6550 3200 50 0000 L CNN - 1 6500 3300 - 0 1 1 0 -$EndComp -$Comp -L R R5 -U 1 1 51A47F5C -P 6100 3050 -F 0 "R5" V 6180 3050 50 0000 C CNN -F 1 "2k" V 6100 3050 50 0000 C CNN - 1 6100 3050 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 51A47F50 -P 5850 4200 -F 0 "R4" V 5930 4200 50 0000 C CNN -F 1 "1.5k" V 5850 4200 50 0000 C CNN - 1 5850 4200 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 51A47F29 -P 5750 3600 -F 0 "Q1" H 5750 3450 50 0000 R CNN -F 1 "NPN" H 5750 3750 50 0000 R CNN - 1 5750 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/BJT_amplifier/analysis b/OSCAD/Examples/BJT_amplifier/analysis deleted file mode 100644 index b49cde4..0000000 --- a/OSCAD/Examples/BJT_amplifier/analysis +++ /dev/null @@ -1,2 +0,0 @@ - -.ac dec 100 100Hz 10KHz diff --git a/OSCAD/Examples/BJT_amplifier/npn.lib b/OSCAD/Examples/BJT_amplifier/npn.lib deleted file mode 100644 index abc5bd0..0000000 --- a/OSCAD/Examples/BJT_amplifier/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Vjc=.75 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ikf=66.78m Br=.7371 Mje=.2593 Mjc=.3085 Vaf=74.03 -+ Isc=0 Ise=6.734f Xtf=2 Vje=.75 Is=6.734f -+ Itf=.4 Eg=1.11 )
\ No newline at end of file diff --git a/OSCAD/Examples/BasicGates/$savepcb.brd b/OSCAD/Examples/BasicGates/$savepcb.brd deleted file mode 100644 index c5b62f8..0000000 --- a/OSCAD/Examples/BasicGates/$savepcb.brd +++ /dev/null @@ -1,84 +0,0 @@ -PCBNEW-BOARD Version 1 date 6/7/2013 11:31:39 AM
-
-# Created by Pcbnew(2011-04-29 BZR 2986)-stable
-
-$GENERAL
-encoding utf-8
-LayerCount 2
-Ly 1FFF8001
-EnabledLayers 1FFF8001
-Links 0
-NoConn 0
-Di 0 0 117000 82670
-Ndraw 0
-Ntrack 0
-Nzone 0
-BoardThickness 630
-Nmodule 0
-Nnets 1
-$EndGENERAL
-
-$SHEETDESCR
-Sheet A4 11700 8267
-Title ""
-Date "7 jun 2013"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndSHEETDESCR
-
-$SETUP
-InternalUnit 0.000100 INCH
-Layers 2
-Layer[0] Back signal
-Layer[15] Front signal
-TrackWidth 80
-TrackClearence 100
-ZoneClearence 200
-TrackMinWidth 80
-DrawSegmWidth 150
-EdgeSegmWidth 150
-ViaSize 350
-ViaDrill 250
-ViaMinSize 350
-ViaMinDrill 200
-MicroViaSize 200
-MicroViaDrill 50
-MicroViasAllowed 0
-MicroViaMinSize 200
-MicroViaMinDrill 50
-TextPcbWidth 120
-TextPcbSize 600 800
-EdgeModWidth 150
-TextModSize 600 600
-TextModWidth 120
-PadSize 600 600
-PadDrill 320
-Pad2MaskClearance 100
-AuxiliaryAxisOrg 0 0
-PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory ""))
-$EndSETUP
-
-$EQUIPOT
-Na 0 ""
-St ~
-$EndEQUIPOT
-$NCLASS
-Name "Default"
-Desc "This is the default net class."
-Clearance 100
-TrackWidth 80
-ViaDia 350
-ViaDrill 250
-uViaDia 200
-uViaDrill 50
-AddNet ""
-$EndNCLASS
-$TRACK
-$EndTRACK
-$ZONE
-$EndZONE
-$EndBOARD
diff --git a/OSCAD/Examples/BasicGates/BasicGates-cache.bak b/OSCAD/Examples/BasicGates/BasicGates-cache.bak deleted file mode 100644 index ba5e5f2..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates-cache.bak +++ /dev/null @@ -1,324 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 08:00:09 AM IST -#encoding utf-8 -# -# 74HCT04 -# -DEF 74HCT04 U 0 30 Y Y 6 F N -F0 "U" 150 100 40 H V C CNN -F1 "74HCT04" 200 -100 40 H V C CNN -ALIAS 74HC14 74HC04 74LS14 -DRAW -P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N -X GND 7 -50 -100 0 U 30 20 0 0 W N -X VCC 14 -50 100 0 D 30 20 0 0 W N -X ~ 1 -450 0 300 R 60 60 1 1 I -X ~ 2 450 0 300 L 60 60 1 1 O I -X ~ 3 -450 0 300 R 60 60 2 1 I -X ~ 4 450 0 300 L 60 60 2 1 O I -X ~ 5 -450 0 300 R 60 60 3 1 I -X ~ 6 450 0 300 L 60 60 3 1 O I -X ~ 8 450 0 300 L 60 60 4 1 O I -X ~ 9 -450 0 300 R 60 60 4 1 I -X ~ 10 450 0 300 L 60 60 5 1 O I -X ~ 11 -450 0 300 R 60 60 5 1 I -X ~ 12 450 0 300 L 60 60 6 1 O I -X ~ 13 -450 0 300 R 60 60 6 1 I -X ~ 1 -450 0 300 R 60 60 1 2 I I -X ~ 2 450 0 300 L 60 60 1 2 O -X ~ 3 -450 0 300 R 60 60 2 2 I I -X ~ 4 450 0 300 L 60 60 2 2 O -X ~ 5 -450 0 300 R 60 60 3 2 I I -X ~ 6 450 0 300 L 60 60 3 2 O -X ~ 8 450 0 300 L 60 60 4 2 O -X ~ 9 -450 0 300 R 60 60 4 2 I I -X ~ 10 450 0 300 L 60 60 5 2 O -X ~ 11 -450 0 300 R 60 60 5 2 I I -X ~ 12 450 0 300 L 60 60 6 2 O -X ~ 13 -450 0 300 R 60 60 6 2 I I -ENDDRAW -ENDDEF -# -# 74LS00 -# -DEF 74LS00 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS00" 0 -100 60 H V C CNN -ALIAS 74LS37 7400 74HCT00 74HC00 -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O I -X ~ 8 600 0 300 L 60 60 3 1 O I -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O I -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O -X ~ 8 600 0 300 L 60 60 3 2 O -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS02 -# -DEF 74LS02 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS02" 50 -50 60 H V C CNN -ALIAS 74HC02 74HCT02 7402 74LS28 -$FPLIST - SO14* - 14DIP* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 -A -1 -127 327 898 228 0 1 8 N 0 200 300 0 -A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 -P 2 0 1 8 -300 -200 0 -200 N -P 2 0 1 8 -300 200 0 200 N -X ~ 1 600 0 300 L 60 60 1 1 O I -X ~ 2 -600 100 370 R 60 60 1 1 I -X ~ 3 -600 -100 370 R 60 60 1 1 I -X ~ 4 600 0 300 L 60 60 2 1 O I -X ~ 5 -600 100 370 R 60 60 2 1 I -X ~ 6 -600 -100 370 R 60 60 2 1 I -X ~ 8 -600 100 370 R 60 60 3 1 I -X ~ 9 -600 -100 370 R 60 60 3 1 I -X ~ 10 600 0 300 L 60 60 3 1 O I -X ~ 11 -600 100 370 R 60 60 4 1 I -X ~ 12 -600 -100 370 R 60 60 4 1 I -X ~ 13 600 0 300 L 60 60 4 1 O I -A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 -P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 600 0 300 L 60 60 1 2 O -X ~ 2 -600 100 300 R 60 60 1 2 I I -X ~ 3 -600 -100 300 R 60 60 1 2 I I -X ~ 4 600 0 300 L 60 60 2 2 O -X ~ 5 -600 100 300 R 60 60 2 2 I I -X ~ 6 -600 -100 300 R 60 60 2 2 I I -X ~ 8 -600 100 300 R 60 60 3 2 I I -X ~ 9 -600 -100 300 R 60 60 3 2 I I -X ~ 10 600 0 300 L 60 60 3 2 O -X ~ 11 -600 100 300 R 60 60 4 2 I I -X ~ 12 -600 -100 300 R 60 60 4 2 I I -X ~ 13 600 0 300 L 60 60 4 2 O -ENDDRAW -ENDDEF -# -# 74LS08 -# -DEF 74LS08 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS08" 0 -50 60 H V C CNN -ALIAS 74LS09 -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 U 40 40 0 0 W N -A 100 0 200 896 -896 0 1 0 N 101 200 101 -199 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O -X ~ 8 600 0 300 L 60 60 3 1 O -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -470 0 262 495 -495 0 2 0 N -300 199 -300 -198 -A -2 126 326 -897 -225 0 2 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 2 0 N 2 200 300 0 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O I -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O I -X ~ 8 600 0 300 L 60 60 3 2 O I -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O I -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS32 -# -DEF 74LS32 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS32" 0 -50 60 H V C CNN -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 U 40 40 0 0 W N -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -300 -200 0 -200 N -P 2 0 1 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 1 I -X ~ 2 -600 -100 370 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -X ~ 4 -600 100 370 R 60 60 2 1 I -X ~ 5 -600 -100 370 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O -X ~ 8 600 0 300 L 60 60 3 1 O -X ~ 9 -600 100 370 R 60 60 3 1 I -X ~ 10 -600 -100 370 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O -X ~ 12 -600 100 370 R 60 60 4 1 I -X ~ 13 -600 -100 370 R 60 60 4 1 I -A 100 0 200 896 -896 0 2 0 N 101 200 101 -199 -P 4 0 2 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 2 I I -X ~ 2 -600 -100 300 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O I -X ~ 4 -600 100 300 R 60 60 2 2 I I -X ~ 5 -600 -100 300 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O I -X ~ 8 600 0 300 L 60 60 3 2 O I -X ~ 9 -600 100 300 R 60 60 3 2 I I -X ~ 10 -600 -100 300 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O I -X ~ 12 -600 100 300 R 60 60 4 2 I I -X ~ 13 -600 -100 300 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS86 -# -DEF 74LS86 U 0 30 Y N 4 F N -F0 "U" 50 50 50 H V C CNN -F1 "74LS86" 50 -50 40 H V C CNN -ALIAS 74HC86 -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -200 -200 0 -200 N -P 2 0 1 0 -200 200 0 200 N -X IN1 1 -600 100 370 R 60 60 1 1 I -X IN2 2 -600 -100 370 R 60 60 1 1 I -X OUT 3 600 0 300 L 60 60 1 1 O -X IN1 4 -600 100 370 R 60 60 2 1 I -X IN2 5 -600 -100 370 R 60 60 2 1 I -X OUT 6 600 0 300 L 60 60 2 1 O -X OUT 8 600 0 300 L 60 60 3 1 O -X IN1 9 -600 100 370 R 60 60 3 1 I -X IN2 10 -600 -100 370 R 60 60 3 1 I -X OUT 11 600 0 300 L 60 60 4 1 O -X IN1 12 -600 100 370 R 60 60 4 1 I -X IN2 13 -600 -100 370 R 60 60 4 1 I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot1 -# -DEF vplot1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/BasicGates/BasicGates-cache.lib b/OSCAD/Examples/BasicGates/BasicGates-cache.lib deleted file mode 100644 index 90be75b..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates-cache.lib +++ /dev/null @@ -1,331 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 08:37:05 AM IST -#encoding utf-8 -# -# 74HCT04 -# -DEF 74HCT04 U 0 30 Y Y 6 F N -F0 "U" 150 100 40 H V C CNN -F1 "74HCT04" 200 -100 40 H V C CNN -ALIAS 74HC14 74HC04 74LS14 -DRAW -P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N -X GND 7 -50 -100 0 U 30 20 0 0 W N -X VCC 14 -50 100 0 D 30 20 0 0 W N -X ~ 1 -450 0 300 R 60 60 1 1 I -X ~ 2 450 0 300 L 60 60 1 1 O I -X ~ 3 -450 0 300 R 60 60 2 1 I -X ~ 4 450 0 300 L 60 60 2 1 O I -X ~ 5 -450 0 300 R 60 60 3 1 I -X ~ 6 450 0 300 L 60 60 3 1 O I -X ~ 8 450 0 300 L 60 60 4 1 O I -X ~ 9 -450 0 300 R 60 60 4 1 I -X ~ 10 450 0 300 L 60 60 5 1 O I -X ~ 11 -450 0 300 R 60 60 5 1 I -X ~ 12 450 0 300 L 60 60 6 1 O I -X ~ 13 -450 0 300 R 60 60 6 1 I -X ~ 1 -450 0 300 R 60 60 1 2 I I -X ~ 2 450 0 300 L 60 60 1 2 O -X ~ 3 -450 0 300 R 60 60 2 2 I I -X ~ 4 450 0 300 L 60 60 2 2 O -X ~ 5 -450 0 300 R 60 60 3 2 I I -X ~ 6 450 0 300 L 60 60 3 2 O -X ~ 8 450 0 300 L 60 60 4 2 O -X ~ 9 -450 0 300 R 60 60 4 2 I I -X ~ 10 450 0 300 L 60 60 5 2 O -X ~ 11 -450 0 300 R 60 60 5 2 I I -X ~ 12 450 0 300 L 60 60 6 2 O -X ~ 13 -450 0 300 R 60 60 6 2 I I -ENDDRAW -ENDDEF -# -# 74LS00 -# -DEF 74LS00 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS00" 0 -100 60 H V C CNN -ALIAS 74LS37 7400 74HCT00 74HC00 -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O I -X ~ 8 600 0 300 L 60 60 3 1 O I -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O I -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O -X ~ 8 600 0 300 L 60 60 3 2 O -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS02 -# -DEF 74LS02 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS02" 50 -50 60 H V C CNN -ALIAS 74HC02 74HCT02 7402 74LS28 -$FPLIST - SO14* - 14DIP* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A -470 0 262 496 -496 0 1 8 N -300 200 -300 -200 -A -1 -127 327 898 228 0 1 8 N 0 200 300 0 -A -1 128 327 -230 -898 0 1 8 N 300 0 0 -200 -P 2 0 1 8 -300 -200 0 -200 N -P 2 0 1 8 -300 200 0 200 N -X ~ 1 600 0 300 L 60 60 1 1 O I -X ~ 2 -600 100 370 R 60 60 1 1 I -X ~ 3 -600 -100 370 R 60 60 1 1 I -X ~ 4 600 0 300 L 60 60 2 1 O I -X ~ 5 -600 100 370 R 60 60 2 1 I -X ~ 6 -600 -100 370 R 60 60 2 1 I -X ~ 8 -600 100 370 R 60 60 3 1 I -X ~ 9 -600 -100 370 R 60 60 3 1 I -X ~ 10 600 0 300 L 60 60 3 1 O I -X ~ 11 -600 100 370 R 60 60 4 1 I -X ~ 12 -600 -100 370 R 60 60 4 1 I -X ~ 13 600 0 300 L 60 60 4 1 O I -A 100 0 200 896 -896 0 2 8 N 101 200 101 -199 -P 4 0 2 8 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 600 0 300 L 60 60 1 2 O -X ~ 2 -600 100 300 R 60 60 1 2 I I -X ~ 3 -600 -100 300 R 60 60 1 2 I I -X ~ 4 600 0 300 L 60 60 2 2 O -X ~ 5 -600 100 300 R 60 60 2 2 I I -X ~ 6 -600 -100 300 R 60 60 2 2 I I -X ~ 8 -600 100 300 R 60 60 3 2 I I -X ~ 9 -600 -100 300 R 60 60 3 2 I I -X ~ 10 600 0 300 L 60 60 3 2 O -X ~ 11 -600 100 300 R 60 60 4 2 I I -X ~ 12 -600 -100 300 R 60 60 4 2 I I -X ~ 13 600 0 300 L 60 60 4 2 O -ENDDRAW -ENDDEF -# -# 74LS08 -# -DEF 74LS08 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS08" 0 -50 60 H V C CNN -ALIAS 74LS09 -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 U 40 40 0 0 W N -A 100 0 200 896 -896 0 1 0 N 101 200 101 -199 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O -X ~ 8 600 0 300 L 60 60 3 1 O -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -470 0 262 495 -495 0 2 0 N -300 199 -300 -198 -A -2 126 326 -897 -225 0 2 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 2 0 N 2 200 300 0 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O I -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O I -X ~ 8 600 0 300 L 60 60 3 2 O I -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O I -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS32 -# -DEF 74LS32 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS32" 0 -50 60 H V C CNN -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 U 40 40 0 0 W N -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -300 -200 0 -200 N -P 2 0 1 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 1 I -X ~ 2 -600 -100 370 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O -X ~ 4 -600 100 370 R 60 60 2 1 I -X ~ 5 -600 -100 370 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O -X ~ 8 600 0 300 L 60 60 3 1 O -X ~ 9 -600 100 370 R 60 60 3 1 I -X ~ 10 -600 -100 370 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O -X ~ 12 -600 100 370 R 60 60 4 1 I -X ~ 13 -600 -100 370 R 60 60 4 1 I -A 100 0 200 896 -896 0 2 0 N 101 200 101 -199 -P 4 0 2 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 2 I I -X ~ 2 -600 -100 300 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O I -X ~ 4 -600 100 300 R 60 60 2 2 I I -X ~ 5 -600 -100 300 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O I -X ~ 8 600 0 300 L 60 60 3 2 O I -X ~ 9 -600 100 300 R 60 60 3 2 I I -X ~ 10 -600 -100 300 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O I -X ~ 12 -600 100 300 R 60 60 4 2 I I -X ~ 13 -600 -100 300 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# 74LS86 -# -DEF 74LS86 U 0 30 Y N 4 F N -F0 "U" 50 50 50 H V C CNN -F1 "74LS86" 50 -50 40 H V C CNN -ALIAS 74HC86 -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A -470 0 262 495 -495 0 1 0 N -300 199 -300 -198 -A -396 -2 281 457 -451 0 1 0 N -200 199 -198 -200 -A -2 126 326 -897 -225 0 1 0 N 0 -199 299 2 -A 4 -120 320 906 221 0 1 0 N 2 200 300 0 -P 2 0 1 0 -200 -200 0 -200 N -P 2 0 1 0 -200 200 0 200 N -X IN1 1 -600 100 370 R 60 60 1 1 I -X IN2 2 -600 -100 370 R 60 60 1 1 I -X OUT 3 600 0 300 L 60 60 1 1 O -X IN1 4 -600 100 370 R 60 60 2 1 I -X IN2 5 -600 -100 370 R 60 60 2 1 I -X OUT 6 600 0 300 L 60 60 2 1 O -X OUT 8 600 0 300 L 60 60 3 1 O -X IN1 9 -600 100 370 R 60 60 3 1 I -X IN2 10 -600 -100 370 R 60 60 3 1 I -X OUT 11 600 0 300 L 60 60 4 1 O -X IN1 12 -600 100 370 R 60 60 4 1 I -X IN2 13 -600 -100 370 R 60 60 4 1 I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/BasicGates/BasicGates.bak b/OSCAD/Examples/BasicGates/BasicGates.bak deleted file mode 100644 index b0c177c..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.bak +++ /dev/null @@ -1,347 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 08:00:09 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:BasicGates-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "30 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 9700 3000 -Wire Wire Line - 9700 3000 9700 2800 -Wire Wire Line - 9900 3100 9900 3000 -Wire Wire Line - 9900 3000 9100 3000 -Wire Wire Line - 1700 3800 3750 3800 -Wire Wire Line - 7900 3100 7850 3100 -Wire Wire Line - 7850 3100 7850 3400 -Wire Wire Line - 7850 3400 7750 3400 -Connection ~ 5300 2300 -Wire Wire Line - 5300 2300 5300 3300 -Wire Wire Line - 5300 3300 5500 3300 -Wire Wire Line - 5100 3500 5500 3500 -Wire Wire Line - 7900 2900 7350 2900 -Wire Wire Line - 7350 2900 7350 2400 -Wire Wire Line - 7350 2400 7000 2400 -Connection ~ 3750 2200 -Wire Wire Line - 3900 3400 3750 3400 -Wire Wire Line - 3750 3400 3750 2200 -Wire Wire Line - 3850 2200 3650 2200 -Wire Wire Line - 3650 2200 3650 1700 -Connection ~ 2400 1700 -Wire Wire Line - 2400 1700 2400 1550 -Connection ~ 2250 1700 -Connection ~ 2000 2900 -Wire Wire Line - 2000 2900 2000 2700 -Wire Wire Line - 2250 3800 2250 4150 -Wire Wire Line - 1700 3800 1700 3950 -Wire Wire Line - 2250 2500 2250 2900 -Wire Wire Line - 2250 2900 1750 2900 -Connection ~ 1700 5050 -Wire Wire Line - 1700 5050 2250 5050 -Wire Wire Line - 2250 5050 2250 4650 -Wire Wire Line - 1700 4850 1700 5200 -Wire Wire Line - 1750 1800 1750 1700 -Wire Wire Line - 2250 1700 2250 2000 -Wire Wire Line - 1750 3150 1750 2700 -Connection ~ 1750 2900 -Connection ~ 2250 3800 -Wire Wire Line - 2400 3800 2400 3600 -Connection ~ 2400 3800 -Wire Wire Line - 3900 3600 3750 3600 -Wire Wire Line - 3750 3600 3750 3800 -Wire Wire Line - 3500 3800 3500 2400 -Wire Wire Line - 3500 2400 3850 2400 -Connection ~ 3500 3800 -Wire Wire Line - 5050 2300 5800 2300 -Wire Wire Line - 6200 2200 6200 1900 -Wire Wire Line - 5800 2500 5200 2500 -Wire Wire Line - 5200 2500 5200 3500 -Connection ~ 5200 3500 -Wire Wire Line - 6700 3400 6850 3400 -Wire Wire Line - 1750 1700 3650 1700 -Wire Wire Line - 9900 3600 9900 3900 -Text Notes 9150 2850 0 60 ~ 0 -~A.B -Text Notes 9050 2850 0 60 ~ 0 -+ -Text Notes 8900 2850 0 60 ~ 0 -A.B -Text Notes 8000 2300 0 60 ~ 0 -~B -Text Notes 7900 2300 0 60 ~ 0 -+ -Text Notes 7750 2300 0 60 ~ 0 -=~A -Text Notes 7900 3650 0 60 ~ 0 -=A+B -Text Notes 7850 3500 0 60 ~ 0 -A.B+A+B -Text Notes 6450 3600 0 60 ~ 0 -~((A.B)+(A+B)) -Text Notes 7100 2300 0 60 ~ 0 -~((A.B).(A+B)) -$Comp -L 74HC86 U12 -U 1 1 507253B2 -P 8500 3000 -F 0 "U12" H 8550 3050 50 0000 C CNN -F 1 "74HC86" H 8550 2950 40 0000 C CNN - 1 8500 3000 - 1 0 0 -1 -$EndComp -Text Notes 5150 3650 0 60 ~ 0 -A+B -Text Notes 5100 2250 0 60 ~ 0 -A.B -Text Notes 3600 3950 0 60 ~ 0 -B -Text Notes 3500 1650 0 60 ~ 0 -A -$Comp -L 74LS32 U8 -U 1 1 50725446 -P 4500 3500 -F 0 "U8" H 4500 3550 60 0000 C CNN -F 1 "74LS32" H 4500 3450 60 0000 C CNN - 1 4500 3500 - 1 0 0 -1 -$EndComp -$Comp -L 74LS08 U7 -U 1 1 50725428 -P 4450 2300 -F 0 "U7" H 4450 2350 60 0000 C CNN -F 1 "74LS08" H 4450 2250 60 0000 C CNN - 1 4450 2300 - 1 0 0 -1 -$EndComp -$Comp -L 74HC02 U9 -U 1 1 50725415 -P 6100 3400 -F 0 "U9" H 6100 3450 60 0000 C CNN -F 1 "74HC02" H 6150 3350 60 0000 C CNN - 1 6100 3400 - 1 0 0 -1 -$EndComp -$Comp -L 74HC04 U11 -U 1 1 507253DF -P 7300 3400 -F 0 "U11" H 7450 3500 40 0000 C CNN -F 1 "74HC04" H 7500 3300 40 0000 C CNN - 1 7300 3400 - 1 0 0 -1 -$EndComp -$Comp -L 7400 U10 -U 1 1 5072539F -P 6400 2400 -F 0 "U10" H 6400 2450 60 0000 C CNN -F 1 "7400" H 6400 2300 60 0000 C CNN - 1 6400 2400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 5072534B -P 9900 3900 -F 0 "#PWR01" H 9900 3900 30 0001 C CNN -F 1 "GND" H 9900 3830 30 0001 C CNN - 1 9900 3900 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U1 -U 1 1 50725278 -P 2400 1250 -F 0 "U1" H 2250 1350 50 0000 C CNN -F 1 "VPLOT1" H 2550 1350 50 0000 C CNN - 1 2400 1250 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 507251F2 -P 2000 2700 -F 0 "#FLG02" H 2000 2970 30 0001 C CNN -F 1 "PWR_FLAG" H 2000 2930 30 0000 C CNN - 1 2000 2700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 507251E5 -P 1750 3150 -F 0 "#PWR03" H 1750 3150 30 0001 C CNN -F 1 "GND" H 1750 3080 30 0001 C CNN - 1 1750 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 507251A7 -P 2250 2250 -F 0 "R3" V 2330 2250 50 0000 C CNN -F 1 "1000" V 2250 2250 50 0000 C CNN - 1 2250 2250 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v2 -U 1 1 50725192 -P 1750 2250 -F 0 "v2" H 1550 2350 60 0000 C CNN -F 1 "PULSE" H 1550 2200 60 0000 C CNN - 1 1750 2250 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U5 -U 1 1 50653344 -P 9700 2500 -F 0 "U5" H 9550 2600 50 0000 C CNN -F 1 "VPLOT1" H 9850 2600 50 0000 C CNN - 1 9700 2500 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG04 -U 1 1 50653022 -P 6200 1900 -F 0 "#FLG04" H 6200 2170 30 0001 C CNN -F 1 "PWR_FLAG" H 6200 2130 30 0000 C CNN - 1 6200 1900 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50652FB6 -P 9900 3350 -F 0 "R2" V 9980 3350 50 0000 C CNN -F 1 "1000" V 9900 3350 50 0000 C CNN - 1 9900 3350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U2 -U 1 1 5061678B -P 2400 3300 -F 0 "U2" H 2250 3400 50 0000 C CNN -F 1 "VPLOT1" H 2550 3400 50 0000 C CNN - 1 2400 3300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 505C9F25 -P 2250 4400 -F 0 "R1" V 2330 4400 50 0000 C CNN -F 1 "1000" V 2250 4400 50 0000 C CNN - 1 2250 4400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR05 -U 1 1 505C9EE8 -P 1700 5200 -F 0 "#PWR05" H 1700 5200 30 0001 C CNN -F 1 "GND" H 1700 5130 30 0001 C CNN - 1 1700 5200 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 505C9ECF -P 1700 4400 -F 0 "v1" H 1500 4500 60 0000 C CNN -F 1 "PULSE" H 1500 4350 60 0000 C CNN - 1 1700 4400 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/BasicGates/BasicGates.cir b/OSCAD/Examples/BasicGates/BasicGates.cir deleted file mode 100644 index 839fbc6..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.cir +++ /dev/null @@ -1,20 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Sunday 09 December 2012 08:37:15 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 8 4 9 VPLOT8_1 -U12 5 6 9 0 3 74HC86 -U8 8 4 10 0 3 74LS32 -U7 8 4 2 0 3 74LS08 -U9 7 2 10 0 3 74HC02 -U11 7 6 0 3 74HC04 -U10 2 10 5 0 3 7400 -R3 8 0 1000 -v2 8 0 PULSE -R2 9 0 1000 -R1 4 0 1000 -v1 4 0 PULSE - -.end diff --git a/OSCAD/Examples/BasicGates/BasicGates.cir.ckt b/OSCAD/Examples/BasicGates/BasicGates.cir.ckt deleted file mode 100644 index 857c283..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.cir.ckt +++ /dev/null @@ -1,59 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 08:37:15 am ist - -* Plotting option vplot8_1 -* 74hc86 -* 74ls32 -* 74ls08 -* 74hc02 -* 74hc04 -* 7400 -r3 8 0 1000 -v2 8 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) -r2 9 0 1000 -r1 4 0 1000 -v1 4 0 pulse(0 5 0 0 0 0.125e-6 0.5e-6) -a1 [5] [5_in] u12adc -a2 [6] [6_in] u12adc -a3 [5_in 6_in] 9_out u12 -a4 [9_out] [9] u12dac -.model u12 d_xor -.model u12adc adc_bridge(in_low=0.8 in_high=2.0) -.model u12dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a5 [8] [8_in] u8adc -a6 [4] [4_in] u8adc -a7 [8_in 4_in] 10_out u8 -a8 [10_out] [10] u8dac -.model u8 d_or -.model u8adc adc_bridge(in_low=0.8 in_high=2.0) -.model u8dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a9 [8] [8_in] u7adc -a10 [4] [4_in] u7adc -a11 [8_in 4_in] 2_out u7 -a12 [2_out] [2] u7dac -.model u7 d_and -.model u7adc adc_bridge(in_low=0.8 in_high=2.0) -.model u7dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a13 [2] [2_in] u9adc -a14 [10] [10_in] u9adc -a15 [2_in 10_in] 7_out u9 -a16 [7_out] [7] u9dac -.model u9 d_nor -.model u9adc adc_bridge(in_low=0.8 in_high=2.0) -.model u9dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a17 [7] [7_in] u11adc -a18 7_in 6_out u11 -a19 [6_out] [6] u11dac -.model u11 d_inverter -.model u11adc adc_bridge(in_low=0.8 in_high=2.0) -.model u11dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a20 [2] [2_in] u10adc -a21 [10] [10_in] u10adc -a22 [2_in 10_in] 5_out u10 -a23 [5_out] [5] u10dac -.model u10 d_nand -.model u10adc adc_bridge(in_low=0.8 in_high=2.0) -.model u10dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 -.plot .v(8) .v(4) .v(9) . -.end diff --git a/OSCAD/Examples/BasicGates/BasicGates.cir.out b/OSCAD/Examples/BasicGates/BasicGates.cir.out deleted file mode 100644 index 4e7ccde..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.cir.out +++ /dev/null @@ -1,64 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 08:37:15 am ist - -* Plotting option vplot8_1 -* 74hc86 -* 74ls32 -* 74ls08 -* 74hc02 -* 74hc04 -* 7400 -r3 8 0 1000 -v2 8 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) -r2 9 0 1000 -r1 4 0 1000 -v1 4 0 pulse(0 5 0 0 0 0.125e-6 0.5e-6) -a1 [5] [5_in] u12adc -a2 [6] [6_in] u12adc -a3 [5_in 6_in] 9_out u12 -a4 [9_out] [9] u12dac -.model u12 d_xor -.model u12adc adc_bridge(in_low=0.8 in_high=2.0) -.model u12dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a5 [8] [8_in] u8adc -a6 [4] [4_in] u8adc -a7 [8_in 4_in] 10_out u8 -a8 [10_out] [10] u8dac -.model u8 d_or -.model u8adc adc_bridge(in_low=0.8 in_high=2.0) -.model u8dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a9 [8] [8_in] u7adc -a10 [4] [4_in] u7adc -a11 [8_in 4_in] 2_out u7 -a12 [2_out] [2] u7dac -.model u7 d_and -.model u7adc adc_bridge(in_low=0.8 in_high=2.0) -.model u7dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a13 [2] [2_in] u9adc -a14 [10] [10_in] u9adc -a15 [2_in 10_in] 7_out u9 -a16 [7_out] [7] u9dac -.model u9 d_nor -.model u9adc adc_bridge(in_low=0.8 in_high=2.0) -.model u9dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a17 [7] [7_in] u11adc -a18 7_in 6_out u11 -a19 [6_out] [6] u11dac -.model u11 d_inverter -.model u11adc adc_bridge(in_low=0.8 in_high=2.0) -.model u11dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -a20 [2] [2_in] u10adc -a21 [10] [10_in] u10adc -a22 [2_in 10_in] 5_out u10 -a23 [5_out] [5] u10dac -.model u10 d_nand -.model u10adc adc_bridge(in_low=0.8 in_high=2.0) -.model u10dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 - -* Control Statements -.control -run -plot v(8) v(4) v(9) -.endc -.end diff --git a/OSCAD/Examples/BasicGates/BasicGates.cmp b/OSCAD/Examples/BasicGates/BasicGates.cmp deleted file mode 100644 index 70877a7..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.cmp +++ /dev/null @@ -1,101 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 22 October 2012 05:06:15 PM IST - -BeginCmp -TimeStamp = /505C9F25; -Reference = R1; -ValeurCmp = 1000; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /50652FB6; -Reference = R2; -ValeurCmp = 1000; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /507251A7; -Reference = R3; -ValeurCmp = 1000; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /505FD8A0; -Reference = U3; -ValeurCmp = ADC; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /505FDC21; -Reference = U4; -ValeurCmp = DAC; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50725212; -Reference = U6; -ValeurCmp = ADC; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50725428; -Reference = U7; -ValeurCmp = 74LS08; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50725446; -Reference = U8; -ValeurCmp = 74LS32; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50725415; -Reference = U9; -ValeurCmp = 74HC02; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5072539F; -Reference = U10; -ValeurCmp = 7400; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /507253DF; -Reference = U11; -ValeurCmp = 74HC04; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /507253B2; -Reference = U12; -ValeurCmp = 74HC86; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /505C9ECF; -Reference = v1; -ValeurCmp = PULSE; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50725192; -Reference = v2; -ValeurCmp = PULSE; -IdModule = ; -EndCmp - -EndListe diff --git a/OSCAD/Examples/BasicGates/BasicGates.net b/OSCAD/Examples/BasicGates/BasicGates.net deleted file mode 100644 index e5b57d3..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.net +++ /dev/null @@ -1,112 +0,0 @@ -# EESchema Netlist Version 1.1 created Monday 22 October 2012 05:06:15 PM IST -( - ( /505C9F25 R3 R1 1000 - ( 1 N-000006 ) - ( 2 GND ) - ) - ( /50652FB6 R3 R2 1000 - ( 1 N-000007 ) - ( 2 GND ) - ) - ( /507251A7 R3 R3 1000 - ( 1 N-000009 ) - ( 2 GND ) - ) - ( /505FD8A0 $noname$ U3 ADC - ( 1 N-000006 ) - ( 2 N-000005 ) - ) - ( /505FDC21 $noname$ U4 DAC - ( 1 N-000008 ) - ( 2 N-000007 ) - ) - ( /50725212 $noname$ U6 ADC - ( 1 N-000009 ) - ( 2 N-000011 ) - ) - ( /50725428 $noname$ U7 74LS08 - ( 1 N-000011 ) - ( 2 N-000005 ) - ( 3 N-000003 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /50725446 $noname$ U8 74LS32 - ( 1 N-000011 ) - ( 2 N-000005 ) - ( 3 N-000013 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /50725415 $noname$ U9 74HC02 - ( 1 N-000004 ) - ( 2 N-000003 ) - ( 3 N-000013 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /5072539F $noname$ U10 7400 - ( 1 N-000003 ) - ( 2 N-000013 ) - ( 3 N-000010 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /507253DF $noname$ U11 74HC04 - ( 1 N-000004 ) - ( 2 N-000012 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /507253B2 $noname$ U12 74HC86 - ( 1 N-000010 ) - ( 2 N-000012 ) - ( 3 N-000008 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /505C9ECF $noname$ v1 PULSE - ( 1 N-000006 ) - ( 2 GND ) - ) - ( /50725192 $noname$ v2 PULSE - ( 1 N-000009 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component U9 - SO14* - 14DIP* -$endlist -$component U10 - 14DIP300* - SO14* -$endlist -$component v1 - 1_pin -$endlist -$component v2 - 1_pin -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/BasicGates/BasicGates.pro b/OSCAD/Examples/BasicGates/BasicGates.pro deleted file mode 100644 index 067b52d..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 22 October 2012 05:04:10 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/BasicGates/BasicGates.proj b/OSCAD/Examples/BasicGates/BasicGates.proj deleted file mode 100644 index f8a0441..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile BasicGates.sch diff --git a/OSCAD/Examples/BasicGates/BasicGates.sch b/OSCAD/Examples/BasicGates/BasicGates.sch deleted file mode 100644 index 050f6d4..0000000 --- a/OSCAD/Examples/BasicGates/BasicGates.sch +++ /dev/null @@ -1,347 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 08:37:05 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:BasicGates-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U1 -U 3 1 50C3FFE2 -P 9700 2500 -F 0 "U1" H 9550 2600 50 0000 C CNN -F 1 "VPLOT8_1" H 9850 2600 50 0000 C CNN - 3 9700 2500 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 50C3FFDB -P 2400 3300 -F 0 "U1" H 2250 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 2550 3400 50 0000 C CNN - 2 2400 3300 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50C3FFD3 -P 2400 1250 -F 0 "U1" H 2250 1350 50 0000 C CNN -F 1 "VPLOT8_1" H 2550 1350 50 0000 C CNN - 1 2400 1250 - 1 0 0 -1 -$EndComp -Connection ~ 9700 3000 -Wire Wire Line - 9700 3000 9700 2800 -Wire Wire Line - 9900 3100 9900 3000 -Wire Wire Line - 9900 3000 9100 3000 -Wire Wire Line - 1700 3800 3750 3800 -Wire Wire Line - 7900 3100 7850 3100 -Wire Wire Line - 7850 3100 7850 3400 -Wire Wire Line - 7850 3400 7750 3400 -Connection ~ 5300 2300 -Wire Wire Line - 5300 2300 5300 3300 -Wire Wire Line - 5300 3300 5500 3300 -Wire Wire Line - 5100 3500 5500 3500 -Wire Wire Line - 7900 2900 7350 2900 -Wire Wire Line - 7350 2900 7350 2400 -Wire Wire Line - 7350 2400 7000 2400 -Connection ~ 3750 2200 -Wire Wire Line - 3900 3400 3750 3400 -Wire Wire Line - 3750 3400 3750 2200 -Wire Wire Line - 3850 2200 3650 2200 -Wire Wire Line - 3650 2200 3650 1700 -Connection ~ 2400 1700 -Wire Wire Line - 2400 1700 2400 1550 -Connection ~ 2250 1700 -Connection ~ 2000 2900 -Wire Wire Line - 2000 2900 2000 2700 -Wire Wire Line - 2250 3800 2250 4150 -Wire Wire Line - 1700 3800 1700 3950 -Wire Wire Line - 2250 2500 2250 2900 -Wire Wire Line - 2250 2900 1750 2900 -Connection ~ 1700 5050 -Wire Wire Line - 1700 5050 2250 5050 -Wire Wire Line - 2250 5050 2250 4650 -Wire Wire Line - 1700 4850 1700 5200 -Wire Wire Line - 1750 1800 1750 1700 -Wire Wire Line - 2250 1700 2250 2000 -Wire Wire Line - 1750 3150 1750 2700 -Connection ~ 1750 2900 -Connection ~ 2250 3800 -Wire Wire Line - 2400 3800 2400 3600 -Connection ~ 2400 3800 -Wire Wire Line - 3900 3600 3750 3600 -Wire Wire Line - 3750 3600 3750 3800 -Wire Wire Line - 3500 3800 3500 2400 -Wire Wire Line - 3500 2400 3850 2400 -Connection ~ 3500 3800 -Wire Wire Line - 5050 2300 5800 2300 -Wire Wire Line - 6200 2200 6200 1900 -Wire Wire Line - 5800 2500 5200 2500 -Wire Wire Line - 5200 2500 5200 3500 -Connection ~ 5200 3500 -Wire Wire Line - 6700 3400 6850 3400 -Wire Wire Line - 1750 1700 3650 1700 -Wire Wire Line - 9900 3600 9900 3900 -Text Notes 9150 2850 0 60 ~ 0 -~A.B -Text Notes 9050 2850 0 60 ~ 0 -+ -Text Notes 8900 2850 0 60 ~ 0 -A.B -Text Notes 8000 2300 0 60 ~ 0 -~B -Text Notes 7900 2300 0 60 ~ 0 -+ -Text Notes 7750 2300 0 60 ~ 0 -=~A -Text Notes 7900 3650 0 60 ~ 0 -=A+B -Text Notes 7850 3500 0 60 ~ 0 -A.B+A+B -Text Notes 6450 3600 0 60 ~ 0 -~((A.B)+(A+B)) -Text Notes 7100 2300 0 60 ~ 0 -~((A.B).(A+B)) -$Comp -L 74HC86 U12 -U 1 1 507253B2 -P 8500 3000 -F 0 "U12" H 8550 3050 50 0000 C CNN -F 1 "74HC86" H 8550 2950 40 0000 C CNN - 1 8500 3000 - 1 0 0 -1 -$EndComp -Text Notes 5150 3650 0 60 ~ 0 -A+B -Text Notes 5100 2250 0 60 ~ 0 -A.B -Text Notes 3600 3950 0 60 ~ 0 -B -Text Notes 3500 1650 0 60 ~ 0 -A -$Comp -L 74LS32 U8 -U 1 1 50725446 -P 4500 3500 -F 0 "U8" H 4500 3550 60 0000 C CNN -F 1 "74LS32" H 4500 3450 60 0000 C CNN - 1 4500 3500 - 1 0 0 -1 -$EndComp -$Comp -L 74LS08 U7 -U 1 1 50725428 -P 4450 2300 -F 0 "U7" H 4450 2350 60 0000 C CNN -F 1 "74LS08" H 4450 2250 60 0000 C CNN - 1 4450 2300 - 1 0 0 -1 -$EndComp -$Comp -L 74HC02 U9 -U 1 1 50725415 -P 6100 3400 -F 0 "U9" H 6100 3450 60 0000 C CNN -F 1 "74HC02" H 6150 3350 60 0000 C CNN - 1 6100 3400 - 1 0 0 -1 -$EndComp -$Comp -L 74HC04 U11 -U 1 1 507253DF -P 7300 3400 -F 0 "U11" H 7450 3500 40 0000 C CNN -F 1 "74HC04" H 7500 3300 40 0000 C CNN - 1 7300 3400 - 1 0 0 -1 -$EndComp -$Comp -L 7400 U10 -U 1 1 5072539F -P 6400 2400 -F 0 "U10" H 6400 2450 60 0000 C CNN -F 1 "7400" H 6400 2300 60 0000 C CNN - 1 6400 2400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 5072534B -P 9900 3900 -F 0 "#PWR01" H 9900 3900 30 0001 C CNN -F 1 "GND" H 9900 3830 30 0001 C CNN - 1 9900 3900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 507251F2 -P 2000 2700 -F 0 "#FLG02" H 2000 2970 30 0001 C CNN -F 1 "PWR_FLAG" H 2000 2930 30 0000 C CNN - 1 2000 2700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 507251E5 -P 1750 3150 -F 0 "#PWR03" H 1750 3150 30 0001 C CNN -F 1 "GND" H 1750 3080 30 0001 C CNN - 1 1750 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 507251A7 -P 2250 2250 -F 0 "R3" V 2330 2250 50 0000 C CNN -F 1 "1000" V 2250 2250 50 0000 C CNN - 1 2250 2250 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v2 -U 1 1 50725192 -P 1750 2250 -F 0 "v2" H 1550 2350 60 0000 C CNN -F 1 "PULSE" H 1550 2200 60 0000 C CNN - 1 1750 2250 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG04 -U 1 1 50653022 -P 6200 1900 -F 0 "#FLG04" H 6200 2170 30 0001 C CNN -F 1 "PWR_FLAG" H 6200 2130 30 0000 C CNN - 1 6200 1900 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50652FB6 -P 9900 3350 -F 0 "R2" V 9980 3350 50 0000 C CNN -F 1 "1000" V 9900 3350 50 0000 C CNN - 1 9900 3350 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 505C9F25 -P 2250 4400 -F 0 "R1" V 2330 4400 50 0000 C CNN -F 1 "1000" V 2250 4400 50 0000 C CNN - 1 2250 4400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR05 -U 1 1 505C9EE8 -P 1700 5200 -F 0 "#PWR05" H 1700 5200 30 0001 C CNN -F 1 "GND" H 1700 5130 30 0001 C CNN - 1 1700 5200 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 505C9ECF -P 1700 4400 -F 0 "v1" H 1500 4500 60 0000 C CNN -F 1 "PULSE" H 1500 4350 60 0000 C CNN - 1 1700 4400 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/BasicGates/analysis b/OSCAD/Examples/BasicGates/analysis deleted file mode 100644 index bf5e632..0000000 --- a/OSCAD/Examples/BasicGates/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-09 1e-06 0e-00 diff --git a/OSCAD/Examples/FlipFlops/FlipFlops-cache.bak b/OSCAD/Examples/FlipFlops/FlipFlops-cache.bak deleted file mode 100644 index 71dbe1a..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops-cache.bak +++ /dev/null @@ -1,140 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 04:03:52 PM IST -#encoding utf-8 -# -# 74LS74 -# -DEF 74LS74 U 0 40 Y Y 2 F N -F0 "U" 150 300 60 H V C CNN -F1 "74LS74" 300 -295 60 H V C CNN -ALIAS 74HC74 -DRAW -X GND 7 -200 -250 0 U 30 30 0 0 W N -X VCC 14 -200 250 0 D 30 30 0 0 W N -S -300 250 300 -250 0 1 0 N -X Cd 1 0 -550 300 U 60 60 1 1 I I -X D 2 -600 200 300 R 60 60 1 1 I -X Cp 3 -600 0 300 R 60 60 1 1 I C -X Sd 4 0 550 300 D 60 60 1 1 I I -X Q 5 600 200 300 L 60 60 1 1 O -X ~Q 6 600 -200 300 L 60 60 1 1 O I -X ~Q 8 600 -200 300 L 60 60 2 1 O I -X Q 9 600 200 300 L 60 60 2 1 O -X Sd 10 0 550 300 D 60 60 2 1 I I -X Cp 11 -600 0 300 R 60 60 2 1 I C -X D 12 -600 200 300 R 60 60 2 1 I -X Cd 13 0 -550 300 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# pwl -# -DEF pwl v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pwl" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 -A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 -A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 -A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 -A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot1 -# -DEF vplot1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/FlipFlops/FlipFlops-cache.lib b/OSCAD/Examples/FlipFlops/FlipFlops-cache.lib deleted file mode 100644 index dc46d4f..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops-cache.lib +++ /dev/null @@ -1,147 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 04:06:09 PM IST -#encoding utf-8 -# -# 74LS74 -# -DEF 74LS74 U 0 40 Y Y 2 F N -F0 "U" 150 300 60 H V C CNN -F1 "74LS74" 300 -295 60 H V C CNN -ALIAS 74HC74 -DRAW -X GND 7 -200 -250 0 U 30 30 0 0 W N -X VCC 14 -200 250 0 D 30 30 0 0 W N -S -300 250 300 -250 0 1 0 N -X Cd 1 0 -550 300 U 60 60 1 1 I I -X D 2 -600 200 300 R 60 60 1 1 I -X Cp 3 -600 0 300 R 60 60 1 1 I C -X Sd 4 0 550 300 D 60 60 1 1 I I -X Q 5 600 200 300 L 60 60 1 1 O -X ~Q 6 600 -200 300 L 60 60 1 1 O I -X ~Q 8 600 -200 300 L 60 60 2 1 O I -X Q 9 600 200 300 L 60 60 2 1 O -X Sd 10 0 550 300 D 60 60 2 1 I I -X Cp 11 -600 0 300 R 60 60 2 1 I C -X D 12 -600 200 300 R 60 60 2 1 I -X Cd 13 0 -550 300 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# pwl -# -DEF pwl v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pwl" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 -A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 -A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 -A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 -A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.bak b/OSCAD/Examples/FlipFlops/FlipFlops.bak deleted file mode 100644 index e821e8b..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.bak +++ /dev/null @@ -1,303 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 04:03:52 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:FlipFlops-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 2800 4400 -Wire Wire Line - 2800 4400 2800 4050 -Wire Wire Line - 6000 2900 6000 3400 -Wire Wire Line - 3950 5200 3950 5450 -Wire Wire Line - 3950 5450 4500 5450 -Wire Wire Line - 2150 3200 4000 3200 -Connection ~ 6000 3400 -Connection ~ 2350 5300 -Wire Wire Line - 2350 5300 2350 5150 -Connection ~ 6950 4550 -Wire Wire Line - 5100 4550 5100 4150 -Connection ~ 9150 4550 -Wire Wire Line - 5700 3400 6350 3400 -Connection ~ 5100 2050 -Wire Wire Line - 6950 3050 6950 2050 -Wire Wire Line - 4000 3200 4000 3400 -Wire Wire Line - 4000 3400 4500 3400 -Connection ~ 2500 4400 -Connection ~ 2500 4100 -Wire Wire Line - 2500 4250 2500 3950 -Wire Wire Line - 2500 3200 2500 3450 -Wire Wire Line - 2500 2950 2150 2950 -Wire Wire Line - 2500 3050 2500 2750 -Connection ~ 2500 2950 -Wire Wire Line - 2500 4100 2150 4100 -Wire Wire Line - 2500 4400 2500 4550 -Wire Wire Line - 2500 5450 2500 5050 -Connection ~ 2500 5300 -Connection ~ 2500 3200 -Wire Wire Line - 4500 3600 4000 3600 -Wire Wire Line - 4000 3600 4000 4400 -Wire Wire Line - 5100 2050 5100 3050 -Wire Wire Line - 6100 3600 6100 4400 -Wire Wire Line - 6100 3600 6350 3600 -Connection ~ 4000 4400 -Wire Wire Line - 6950 4150 6950 4550 -Wire Wire Line - 4900 3200 4900 3350 -Wire Wire Line - 2500 2050 2500 2250 -Connection ~ 2500 2050 -Wire Wire Line - 6950 2050 2150 2050 -Wire Wire Line - 6100 4400 2150 4400 -Wire Wire Line - 3950 4700 3950 4550 -Wire Wire Line - 3950 4550 6950 4550 -Connection ~ 4500 4550 -Connection ~ 5100 4550 -Wire Wire Line - 3950 5300 2150 5300 -Connection ~ 3950 5300 -Wire Wire Line - 2800 3200 2800 2850 -Connection ~ 2800 3200 -NoConn ~ 7550 3800 -NoConn ~ 7550 3400 -NoConn ~ 5700 3800 -$Comp -L PWR_FLAG #FLG01 -U 1 1 507305F9 -P 2350 5150 -F 0 "#FLG01" H 2350 5420 30 0001 C CNN -F 1 "PWR_FLAG" H 2350 5380 30 0000 C CNN - 1 2350 5150 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 507305F3 -P 4900 3200 -F 0 "#FLG02" H 4900 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 4900 3430 30 0000 C CNN - 1 4900 3200 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U4 -U 1 1 50730491 -P 2800 3750 -F 0 "U4" H 2650 3850 50 0000 C CNN -F 1 "VPLOT1" H 2950 3850 50 0000 C CNN - 1 2800 3750 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U3 -U 1 1 50730484 -P 2800 2550 -F 0 "U3" H 2650 2650 50 0000 C CNN -F 1 "VPLOT1" H 2950 2650 50 0000 C CNN - 1 2800 2550 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U2 -U 1 1 50730477 -P 6000 2600 -F 0 "U2" H 5850 2700 50 0000 C CNN -F 1 "VPLOT1" H 6150 2700 50 0000 C CNN - 1 6000 2600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5073005A -P 2500 5450 -F 0 "#PWR03" H 2500 5450 30 0001 C CNN -F 1 "GND" H 2500 5380 30 0001 C CNN - 1 2500 5450 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 5073006C -P 2500 3050 -F 0 "#PWR04" H 2500 3050 30 0001 C CNN -F 1 "GND" H 2500 2980 30 0001 C CNN - 1 2500 3050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR06 -U 1 1 50730061 -P 2500 4250 -F 0 "#PWR06" H 2500 4250 30 0001 C CNN -F 1 "GND" H 2500 4180 30 0001 C CNN - 1 2500 4250 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5072FFF1 -P 2500 3700 -F 0 "R2" V 2580 3700 50 0000 C CNN -F 1 "1000" V 2500 3700 50 0000 C CNN - 1 2500 3700 - 1 0 0 -1 -$EndComp -$Comp -L PWL v2 -U 1 1 5072FFEC -P 2150 3650 -F 0 "v2" H 1950 3750 60 0000 C CNN -F 1 "PWL" H 1950 3600 60 0000 C CNN -F 2 "R1" H 1850 3650 60 0000 C CNN - 1 2150 3650 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 5072FFBC -P 2500 4800 -F 0 "R3" V 2580 4800 50 0000 C CNN -F 1 "1000" V 2500 4800 50 0000 C CNN - 1 2500 4800 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v3 -U 1 1 5072FFAC -P 2150 4850 -F 0 "v3" H 1950 4950 60 0000 C CNN -F 1 "PULSE" H 1950 4800 60 0000 C CNN -F 2 "R1" H 1850 4850 60 0000 C CNN - 1 2150 4850 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 5072FF51 -P 3950 4950 -F 0 "R4" V 4030 4950 50 0000 C CNN -F 1 "1000" V 3950 4950 50 0000 C CNN - 1 3950 4950 - 1 0 0 -1 -$EndComp -$Comp -L DC v4 -U 1 1 5072FF43 -P 4500 5000 -F 0 "v4" H 4300 5100 60 0000 C CNN -F 1 "5" H 4300 4950 60 0000 C CNN -F 2 "R1" H 4200 5000 60 0000 C CNN - 1 4500 5000 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5072FEED -P 2150 2500 -F 0 "v1" H 1950 2600 60 0000 C CNN -F 1 "5" H 1950 2450 60 0000 C CNN -F 2 "R1" H 1850 2500 60 0000 C CNN - 1 2150 2500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5072FE04 -P 2500 2500 -F 0 "R1" V 2580 2500 50 0000 C CNN -F 1 "1000" V 2500 2500 50 0000 C CNN - 1 2500 2500 - 1 0 0 -1 -$EndComp -$Comp -L 74HC74 U1 -U 2 1 50727541 -P 6950 3600 -F 0 "U1" H 7100 3900 60 0000 C CNN -F 1 "74HC74" H 7250 3305 60 0000 C CNN - 2 6950 3600 - 1 0 0 -1 -$EndComp -$Comp -L 74HC74 U1 -U 1 1 507274E2 -P 5100 3600 -F 0 "U1" H 5250 3900 60 0000 C CNN -F 1 "74HC74" H 5400 3305 60 0000 C CNN - 1 5100 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.cir b/OSCAD/Examples/FlipFlops/FlipFlops.cir deleted file mode 100644 index 92a4982..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Sunday 09 December 2012 04:06:26 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 6 2 10 VPLOT8_1 -R2 2 0 1000 -v2 2 0 PWL -R3 6 0 1000 -v3 6 0 PULSE -R4 1 0 1000 -v4 1 0 5 -v1 11 0 5 -R1 11 0 1000 -U1 1 2 6 11 10 3 0 5 4 11 6 10 1 7 74HC74 - -.end diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.cir.ckt b/OSCAD/Examples/FlipFlops/FlipFlops.cir.ckt deleted file mode 100644 index 5f457bc..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.cir.ckt +++ /dev/null @@ -1,25 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 04:06:26 pm ist - -* Plotting option vplot8_1 -r2 2 0 1000 -v2 2 0 pwl(0 0 2.6 0 2.60000000001 5 3 5 ) -r3 6 0 1000 -v3 6 0 pulse(0 5 0 0 0 0.5 1) -r4 1 0 1000 -v4 1 0 5 -v1 11 0 5 -r1 11 0 1000 -* 74hc74 -a1 [2 6 11 1] [2_in 6_in 11_in 1_in] u1adc -a2 2_in 6_in ~11_in ~1_in 10_out 3_out u1 -a3 [10_out 3_out] [10 3] u1dac -a4 [10 6 11 1] [10_in 6_in 11_in 1_in] u1adc -a5 10_in 6_in ~11_in ~1_in 4_out 5_out u1 -a6 [4_out 5_out] [4 5] u1dac -.model u1 d_dff -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-03 4e-00 0e-00 -.plot v(6) v(2) v(10) -.end diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.cir.out b/OSCAD/Examples/FlipFlops/FlipFlops.cir.out deleted file mode 100644 index 9410f5b..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.cir.out +++ /dev/null @@ -1,30 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 04:06:26 pm ist - -* Plotting option vplot8_1 -r2 2 0 1000 -v2 2 0 pwl(0 0 2.6 0 2.60000000001 5 3 5 ) -r3 6 0 1000 -v3 6 0 pulse(0 5 0 0 0 0.5 1) -r4 1 0 1000 -v4 1 0 5 -v1 11 0 5 -r1 11 0 1000 -* 74hc74 -a1 [2 6 11 1] [2_in 6_in 11_in 1_in] u1adc -a2 2_in 6_in ~11_in ~1_in 10_out 3_out u1 -a3 [10_out 3_out] [10 3] u1dac -a4 [10 6 11 1] [10_in 6_in 11_in 1_in] u1adc -a5 10_in 6_in ~11_in ~1_in 4_out 5_out u1 -a6 [4_out 5_out] [4 5] u1dac -.model u1 d_dff -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-03 4e-00 0e-00 - -* Control Statements -.control -run -plot v(6) v(2) v(10) -.endc -.end diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.cir.out1 b/OSCAD/Examples/FlipFlops/FlipFlops.cir.out1 deleted file mode 100644 index c855d5e..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.cir.out1 +++ /dev/null @@ -1,34 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 30 october 2012 07:12:51 pm ist - -* Plotting option vplot1 -* Plotting option vplot1 -* Plotting option vplot1 -r2 1 0 1000 -v2 1 0 pwl(0 0 2.6 0 2.6000000000001 5 3 5 ) -r3 4 0 1000 -v3 4 0 pulse(0 5 0 0 0 0.5 1) -r4 9 0 1000 -v4 9 0 dc 5 -v1 10 0 dc 5 -r1 10 0 1000 -* 74hc74 -a1 [1 4 10 9] [1_in 4_in 10_in 9_in] u1adc -a2 1_in 4_in ~10_in ~9_in 2_out 3_out u1 -a3 [2_out 3_out] [2 3] u1dac -a4 [2 4 10 9] [2_in 4_in 10_in 9_in] u1adc -a5 2_in 4_in ~10_in ~9_in 6_out 7_out u1 -a6 [6_out 7_out] [6 7] dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) -.model u1 d_dff -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-03 4e-00 0e-00 - -* Control Statements -.control -run -plot v(4) -plot v(1) -plot v(2) -.endc -.end diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.pro b/OSCAD/Examples/FlipFlops/FlipFlops.pro deleted file mode 100644 index 529955f..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.pro +++ /dev/null @@ -1,70 +0,0 @@ -update=Monday 22 October 2012 05:17:18 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=cmos4000 -LibName8=adc-dac -LibName9=memory -LibName10=xilinx -LibName11=special -LibName12=microcontrollers -LibName13=dsp -LibName14=microchip -LibName15=analog_switches -LibName16=motorola -LibName17=texas -LibName18=intel -LibName19=audio -LibName20=interface -LibName21=digital-audio -LibName22=philips -LibName23=display -LibName24=cypress -LibName25=siliconi -LibName26=opto -LibName27=atmel -LibName28=contrib -LibName29=valves -LibName30=analogSpice -LibName31=converterSpice -LibName32=digitalSpice -LibName33=linearSpice -LibName34=measurementSpice -LibName35=portSpice -LibName36=sourcesSpice diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.proj b/OSCAD/Examples/FlipFlops/FlipFlops.proj deleted file mode 100644 index cc7b7c9..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile FlipFlops.sch diff --git a/OSCAD/Examples/FlipFlops/FlipFlops.sch b/OSCAD/Examples/FlipFlops/FlipFlops.sch deleted file mode 100644 index d8fbb5e..0000000 --- a/OSCAD/Examples/FlipFlops/FlipFlops.sch +++ /dev/null @@ -1,303 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 04:06:09 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:FlipFlops-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U2 -U 3 1 50C4695B -P 6000 2600 -F 0 "U2" H 5850 2700 50 0000 C CNN -F 1 "VPLOT8_1" H 6150 2700 50 0000 C CNN - 3 6000 2600 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 50C46950 -P 2800 2550 -F 0 "U2" H 2650 2650 50 0000 C CNN -F 1 "VPLOT8_1" H 2950 2650 50 0000 C CNN - 2 2800 2550 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 50C46944 -P 2800 3750 -F 0 "U2" H 2650 3850 50 0000 C CNN -F 1 "VPLOT8_1" H 2950 3850 50 0000 C CNN - 1 2800 3750 - 1 0 0 -1 -$EndComp -Connection ~ 2800 4400 -Wire Wire Line - 2800 4400 2800 4050 -Wire Wire Line - 6000 2900 6000 3400 -Wire Wire Line - 3950 5200 3950 5450 -Wire Wire Line - 3950 5450 4500 5450 -Wire Wire Line - 2150 3200 4000 3200 -Connection ~ 6000 3400 -Connection ~ 2350 5300 -Wire Wire Line - 2350 5300 2350 5150 -Connection ~ 6950 4550 -Wire Wire Line - 5100 4550 5100 4150 -Connection ~ 9150 4550 -Wire Wire Line - 5700 3400 6350 3400 -Connection ~ 5100 2050 -Wire Wire Line - 6950 3050 6950 2050 -Wire Wire Line - 4000 3200 4000 3400 -Wire Wire Line - 4000 3400 4500 3400 -Connection ~ 2500 4400 -Connection ~ 2500 4100 -Wire Wire Line - 2500 4250 2500 3950 -Wire Wire Line - 2500 3200 2500 3450 -Wire Wire Line - 2500 2950 2150 2950 -Wire Wire Line - 2500 3050 2500 2750 -Connection ~ 2500 2950 -Wire Wire Line - 2500 4100 2150 4100 -Wire Wire Line - 2500 4400 2500 4550 -Wire Wire Line - 2500 5450 2500 5050 -Connection ~ 2500 5300 -Connection ~ 2500 3200 -Wire Wire Line - 4500 3600 4000 3600 -Wire Wire Line - 4000 3600 4000 4400 -Wire Wire Line - 5100 2050 5100 3050 -Wire Wire Line - 6100 3600 6100 4400 -Wire Wire Line - 6100 3600 6350 3600 -Connection ~ 4000 4400 -Wire Wire Line - 6950 4150 6950 4550 -Wire Wire Line - 4900 3200 4900 3350 -Wire Wire Line - 2500 2050 2500 2250 -Connection ~ 2500 2050 -Wire Wire Line - 6950 2050 2150 2050 -Wire Wire Line - 6100 4400 2150 4400 -Wire Wire Line - 3950 4700 3950 4550 -Wire Wire Line - 3950 4550 6950 4550 -Connection ~ 4500 4550 -Connection ~ 5100 4550 -Wire Wire Line - 3950 5300 2150 5300 -Connection ~ 3950 5300 -Wire Wire Line - 2800 3200 2800 2850 -Connection ~ 2800 3200 -NoConn ~ 7550 3800 -NoConn ~ 7550 3400 -NoConn ~ 5700 3800 -$Comp -L PWR_FLAG #FLG01 -U 1 1 507305F9 -P 2350 5150 -F 0 "#FLG01" H 2350 5420 30 0001 C CNN -F 1 "PWR_FLAG" H 2350 5380 30 0000 C CNN - 1 2350 5150 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 507305F3 -P 4900 3200 -F 0 "#FLG02" H 4900 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 4900 3430 30 0000 C CNN - 1 4900 3200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5073005A -P 2500 5450 -F 0 "#PWR03" H 2500 5450 30 0001 C CNN -F 1 "GND" H 2500 5380 30 0001 C CNN - 1 2500 5450 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 5073006C -P 2500 3050 -F 0 "#PWR04" H 2500 3050 30 0001 C CNN -F 1 "GND" H 2500 2980 30 0001 C CNN - 1 2500 3050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR05 -U 1 1 50730061 -P 2500 4250 -F 0 "#PWR05" H 2500 4250 30 0001 C CNN -F 1 "GND" H 2500 4180 30 0001 C CNN - 1 2500 4250 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5072FFF1 -P 2500 3700 -F 0 "R2" V 2580 3700 50 0000 C CNN -F 1 "1000" V 2500 3700 50 0000 C CNN - 1 2500 3700 - 1 0 0 -1 -$EndComp -$Comp -L PWL v2 -U 1 1 5072FFEC -P 2150 3650 -F 0 "v2" H 1950 3750 60 0000 C CNN -F 1 "PWL" H 1950 3600 60 0000 C CNN -F 2 "R1" H 1850 3650 60 0000 C CNN - 1 2150 3650 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 5072FFBC -P 2500 4800 -F 0 "R3" V 2580 4800 50 0000 C CNN -F 1 "1000" V 2500 4800 50 0000 C CNN - 1 2500 4800 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v3 -U 1 1 5072FFAC -P 2150 4850 -F 0 "v3" H 1950 4950 60 0000 C CNN -F 1 "PULSE" H 1950 4800 60 0000 C CNN -F 2 "R1" H 1850 4850 60 0000 C CNN - 1 2150 4850 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 5072FF51 -P 3950 4950 -F 0 "R4" V 4030 4950 50 0000 C CNN -F 1 "1000" V 3950 4950 50 0000 C CNN - 1 3950 4950 - 1 0 0 -1 -$EndComp -$Comp -L DC v4 -U 1 1 5072FF43 -P 4500 5000 -F 0 "v4" H 4300 5100 60 0000 C CNN -F 1 "5" H 4300 4950 60 0000 C CNN -F 2 "R1" H 4200 5000 60 0000 C CNN - 1 4500 5000 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5072FEED -P 2150 2500 -F 0 "v1" H 1950 2600 60 0000 C CNN -F 1 "5" H 1950 2450 60 0000 C CNN -F 2 "R1" H 1850 2500 60 0000 C CNN - 1 2150 2500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5072FE04 -P 2500 2500 -F 0 "R1" V 2580 2500 50 0000 C CNN -F 1 "1000" V 2500 2500 50 0000 C CNN - 1 2500 2500 - 1 0 0 -1 -$EndComp -$Comp -L 74HC74 U1 -U 2 1 50727541 -P 6950 3600 -F 0 "U1" H 7100 3900 60 0000 C CNN -F 1 "74HC74" H 7250 3305 60 0000 C CNN - 2 6950 3600 - 1 0 0 -1 -$EndComp -$Comp -L 74HC74 U1 -U 1 1 507274E2 -P 5100 3600 -F 0 "U1" H 5250 3900 60 0000 C CNN -F 1 "74HC74" H 5400 3305 60 0000 C CNN - 1 5100 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/FlipFlops/analysis b/OSCAD/Examples/FlipFlops/analysis deleted file mode 100644 index df1e38d..0000000 --- a/OSCAD/Examples/FlipFlops/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-03 4e-00 0e-00 diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.bak b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.bak deleted file mode 100644 index 6b90b1a..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.bak +++ /dev/null @@ -1,145 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 10 December 2012 10:40:22 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# CP -# -DEF CP C 0 10 N N 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "CP" 50 -100 50 H V L CNN -ALIAS CAPAPOL -$FPLIST - CP* - SM* -$ENDFPLIST -DRAW -P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N -P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F -X ~ 1 0 200 150 D 40 40 1 1 P -X ~ 2 0 -200 150 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# IC -# -DEF IC U? 0 0 Y N 1 F N -F0 "U?" 0 270 30 H V C CNN -F1 "IC" 0 230 30 H V C CNN -DRAW -X ic 1 0 0 0 U 20 20 0 0 P -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# LM555N -# -DEF LM555N X 0 40 Y Y 1 F N -F0 "X" 0 100 70 H V C CNN -F1 "LM555N" 0 -100 70 H V C CNN -DRAW -X GND 1 0 -400 0 U 60 60 0 0 W N -X VCC 8 0 400 0 D 60 60 0 0 W N -S -400 -400 400 400 0 1 0 N -X TR 2 -700 200 300 R 60 60 1 1 I -X Q 3 700 200 300 L 60 60 1 1 O -X R 4 -700 -300 300 R 60 60 1 1 I I -X CV 5 -700 -50 300 R 60 60 1 1 I -X THR 6 700 -200 300 L 60 60 1 1 I -X DIS 7 700 0 300 L 60 60 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.lib b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.lib deleted file mode 100644 index 65c560c..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator-cache.lib +++ /dev/null @@ -1,145 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 02 April 2013 02:52:17 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# CP -# -DEF CP C 0 10 N N 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "CP" 50 -100 50 H V L CNN -ALIAS CAPAPOL -$FPLIST - CP* - SM* -$ENDFPLIST -DRAW -P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N -P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F -X ~ 1 0 200 150 D 40 40 1 1 P -X ~ 2 0 -200 150 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# IC -# -DEF IC U? 0 0 Y N 1 F N -F0 "U?" 0 270 30 H V C CNN -F1 "IC" 0 230 30 H V C CNN -DRAW -X ic 1 0 0 0 U 20 20 0 0 P -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# LM555N -# -DEF LM555N X 0 40 Y Y 1 F N -F0 "X" 0 100 70 H V C CNN -F1 "LM555N" 0 -100 70 H V C CNN -DRAW -X GND 1 0 -400 0 U 60 60 0 0 W N -X VCC 8 0 400 0 D 60 60 0 0 W N -S -400 -400 400 400 0 1 0 N -X TR 2 -700 200 300 R 60 60 1 1 I -X Q 3 700 200 300 L 60 60 1 1 O -X R 4 -700 -300 300 R 60 60 1 1 I I -X CV 5 -700 -50 300 R 60 60 1 1 I -X THR 6 700 -200 300 L 60 60 1 1 I -X DIS 7 700 0 300 L 60 60 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.bak b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.bak deleted file mode 100644 index 93f021b..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.bak +++ /dev/null @@ -1,252 +0,0 @@ -EESchema Schematic File Version 2 date Monday 10 December 2012 10:40:22 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:convergenceAidSpice -LIBS:IC555AstableMultivibrator-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "10 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L IC U2 -U 1 1 50C55B25 -P 4450 4050 -F 0 "U2" H 4450 4320 30 0000 C CNN -F 1 "IC" H 4450 4280 30 0000 C CNN - 1 4450 4050 - 1 0 0 -1 -$EndComp -Connection ~ 4450 4100 -Wire Wire Line - 4450 4050 4450 4100 -Connection ~ 6300 3350 -Wire Wire Line - 6300 3150 6300 3550 -Connection ~ 5700 4550 -Wire Wire Line - 5700 4550 5700 4300 -Wire Wire Line - 2650 4050 2650 4700 -Wire Wire Line - 2650 4700 4850 4700 -Connection ~ 4850 4550 -Wire Wire Line - 4850 4700 4850 4550 -Connection ~ 5200 4550 -Wire Wire Line - 3500 4550 6300 4550 -Wire Wire Line - 6300 4550 6300 4050 -Connection ~ 5200 4400 -Wire Wire Line - 4150 4400 5200 4400 -Connection ~ 4250 2850 -Wire Wire Line - 4250 2850 4250 3850 -Wire Wire Line - 4250 3850 4500 3850 -Wire Wire Line - 5900 3550 6100 3550 -Wire Wire Line - 6100 3550 6100 3000 -Wire Wire Line - 6100 3000 3750 3000 -Wire Wire Line - 3750 3000 3750 3450 -Connection ~ 3500 3450 -Wire Wire Line - 3750 3450 3500 3450 -Connection ~ 3500 4100 -Wire Wire Line - 3950 4100 3950 3350 -Wire Wire Line - 3950 3350 4500 3350 -Wire Wire Line - 3500 4150 3500 4000 -Wire Wire Line - 3500 3500 3500 3350 -Wire Wire Line - 5200 4550 5200 3950 -Wire Wire Line - 5900 3750 5900 4100 -Wire Wire Line - 5900 4100 3500 4100 -Connection ~ 3950 4100 -Wire Wire Line - 5200 2850 3500 2850 -Wire Wire Line - 4150 4000 4150 3600 -Wire Wire Line - 4150 3600 4500 3600 -Wire Wire Line - 6300 3350 5900 3350 -Wire Wire Line - 4450 2850 4450 2700 -Connection ~ 4450 2850 -Wire Wire Line - 4450 2700 2650 2700 -Wire Wire Line - 2650 2700 2650 3150 -Wire Wire Line - 5200 2650 5200 3150 -Connection ~ 5200 2850 -Wire Wire Line - 5900 4550 5900 4800 -Connection ~ 5900 4550 -Wire Wire Line - 3750 4100 3750 4000 -Connection ~ 3750 4100 -$Comp -L VPLOT8_1 U1 -U 2 1 50C4B392 -P 6300 2850 -F 0 "U1" H 6150 2950 50 0000 C CNN -F 1 "VPLOT8_1" H 6450 2950 50 0000 C CNN - 2 6300 2850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50C4B386 -P 3750 3700 -F 0 "U1" H 3600 3800 50 0000 C CNN -F 1 "VPLOT8_1" H 3900 3800 50 0000 C CNN - 1 3750 3700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 50A93D02 -P 5900 4800 -F 0 "#PWR01" H 5900 4800 30 0001 C CNN -F 1 "GND" H 5900 4730 30 0001 C CNN - 1 5900 4800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50A93CC0 -P 5700 4300 -F 0 "#FLG02" H 5700 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN - 1 5700 4300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 50A93CB7 -P 5200 2650 -F 0 "#FLG03" H 5200 2920 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 2880 30 0000 C CNN - 1 5200 2650 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 50A93C56 -P 2650 3600 -F 0 "v1" H 2450 3700 60 0000 C CNN -F 1 "5" H 2450 3550 60 0000 C CNN -F 2 "R1" H 2350 3600 60 0000 C CNN - 1 2650 3600 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A93BFE -P 6300 3800 -F 0 "R3" V 6380 3800 50 0000 C CNN -F 1 "1000" V 6300 3800 50 0000 C CNN - 1 6300 3800 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 50A93ACA -P 4150 4200 -F 0 "C2" H 4200 4300 50 0000 L CNN -F 1 "0.01e-6" H 4200 4100 50 0000 L CNN - 1 4150 4200 - 1 0 0 -1 -$EndComp -$Comp -L CP C1 -U 1 1 50A93893 -P 3500 4350 -F 0 "C1" H 3550 4450 50 0000 L CNN -F 1 "100e-12" H 3550 4250 50 0000 L CNN - 1 3500 4350 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A93858 -P 3500 3750 -F 0 "R2" V 3580 3750 50 0000 C CNN -F 1 "10000" V 3500 3750 50 0000 C CNN - 1 3500 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A93852 -P 3500 3100 -F 0 "R1" V 3580 3100 50 0000 C CNN -F 1 "1000" V 3500 3100 50 0000 C CNN - 1 3500 3100 - 1 0 0 -1 -$EndComp -$Comp -L LM555N X1 -U 1 1 50A937B9 -P 5200 3550 -F 0 "X1" H 5200 3650 70 0000 C CNN -F 1 "LM555N" H 5200 3450 70 0000 C CNN - 1 5200 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.brd b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.brd deleted file mode 100644 index fce068e..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.brd +++ /dev/null @@ -1,84 +0,0 @@ -PCBNEW-BOARD Version 1 date Tuesday 02 April 2013 02:48:05 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 0 -NoConn 0 -Di 0 0 117000 82670 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 0 -Nnets 1 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "2 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -$EndNCLASS -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir deleted file mode 100644 index b1689e6..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 06 June 2013 11:44:39 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 4 IC -U1 4 5 VPLOT8_1 -v1 3 0 5 -R3 5 0 1000 -C2 2 0 0.01e-6 -C1 4 0 100e-12 -R2 6 4 10000 -R1 3 6 1000 -X1 0 4 5 3 2 4 6 3 LM555N - -.end diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.ckt b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.ckt deleted file mode 100644 index 58dd7f4..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 06 june 2013 11:44:39 pm ist -.include lm555n.sub - -.ic v(3)=0 - -.ic v(4)=0 -* Plotting option vplot8_1 -v1 3 0 5 -r3 5 0 1000 -c2 2 0 0.01e-6 -c1 4 0 100e-12 -r2 6 4 10000 -r1 3 6 1000 -x1 0 4 5 3 2 4 6 3 lm555n - -.tran 50e-09 5e-06 0e-00 -.plot v(4) v(5) -.end diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.out b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.out deleted file mode 100644 index 06e4c85..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 06 june 2013 11:44:39 pm ist -.include lm555n.sub - -.ic v(3)=0 - -.ic v(4)=0 -* Plotting option vplot8_1 -v1 3 0 5 -r3 5 0 1000 -c2 2 0 0.01e-6 -c1 4 0 100e-12 -r2 6 4 10000 -r1 3 6 1000 -x1 0 4 5 3 2 4 6 3 lm555n - -.tran 50e-09 5e-06 0e-00 - -* Control Statements -.control -run -plot v(4) v(5) -.endc -.end diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.net b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.net deleted file mode 100644 index ed060b3..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.net +++ /dev/null @@ -1,110 +0,0 @@ -# EESchema Netlist Version 1.1 created Tuesday 02 April 2013 02:47:19 PM IST -( - ( /50C55B25 $noname U2 IC {Lib=IC} - ( 1 N-000004 ) - ) - ( /50C4B392 $noname U1 VPLOT8_1 {Lib=VPLOT8_1} - ( 1 N-000004 ) - ( 2 N-000005 ) - ) - ( /50A93C56 R1 v1 5 {Lib=DC} - ( 1 VCC ) - ( 2 GND ) - ) - ( /50A93BFE $noname R3 1000 {Lib=R} - ( 1 N-000005 ) - ( 2 GND ) - ) - ( /50A93ACA $noname C2 0.01e-6 {Lib=C} - ( 1 N-000002 ) - ( 2 GND ) - ) - ( /50A93893 $noname C1 100e-12 {Lib=CP} - ( 1 N-000004 ) - ( 2 GND ) - ) - ( /50A93858 $noname R2 10000 {Lib=R} - ( 1 N-000006 ) - ( 2 N-000004 ) - ) - ( /50A93852 $noname R1 1000 {Lib=R} - ( 1 VCC ) - ( 2 N-000006 ) - ) - ( /50A937B9 $noname X1 LM555N {Lib=LM555N} - ( 1 GND ) - ( 2 N-000004 ) - ( 3 N-000005 ) - ( 4 VCC ) - ( 5 N-000002 ) - ( 6 N-000004 ) - ( 7 N-000006 ) - ( 8 VCC ) - ) -) -* -{ Allowed footprints by component: -$component v1 - 1_pin -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component C2 - SM* - C? - C1-1 -$endlist -$component C1 - CP* - SM* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "GND" "GND" - C1 2 - C2 2 - X1 1 - R3 2 - v1 2 -Net 2 "" "" - X1 5 - C2 1 -Net 3 "VCC" "VCC" - X1 4 - R1 1 - X1 8 - v1 1 -Net 4 "" "" - U2 1 - U1 1 - C1 1 - X1 6 - R2 2 - X1 2 -Net 5 "" "" - R3 1 - U1 2 - X1 3 -Net 6 "" "" - X1 7 - R1 2 - R2 1 -} -#End diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.pro b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.pro deleted file mode 100644 index 8fb611c..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 10 December 2012 09:07:41 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=regul -LibName6=74xx -LibName7=cmos4000 -LibName8=adc-dac -LibName9=memory -LibName10=xilinx -LibName11=special -LibName12=microcontrollers -LibName13=dsp -LibName14=microchip -LibName15=analog_switches -LibName16=motorola -LibName17=texas -LibName18=intel -LibName19=audio -LibName20=interface -LibName21=digital-audio -LibName22=philips -LibName23=display -LibName24=cypress -LibName25=siliconi -LibName26=opto -LibName27=atmel -LibName28=contrib -LibName29=valves -LibName30=analogSpice -LibName31=converterSpice -LibName32=digitalSpice -LibName33=linearSpice -LibName34=measurementSpice -LibName35=portSpice -LibName36=sourcesSpice -LibName37=convergenceAidSpice diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.proj b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.proj deleted file mode 100644 index 0a193f0..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile IC555AstableMultivibrator.sch diff --git a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.sch b/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.sch deleted file mode 100644 index 9d4e53b..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/IC555AstableMultivibrator.sch +++ /dev/null @@ -1,244 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 02 April 2013 02:52:17 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:IC555AstableMultivibrator-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "2 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L IC U2 -U 1 1 50C55B25 -P 4450 4050 -F 0 "U2" H 4450 4320 30 0000 C CNN -F 1 "IC" H 4450 4280 30 0000 C CNN - 1 4450 4050 - 1 0 0 -1 -$EndComp -Connection ~ 4450 4100 -Wire Wire Line - 4450 4050 4450 4100 -Connection ~ 6300 3350 -Wire Wire Line - 6300 3150 6300 3550 -Connection ~ 5700 4550 -Wire Wire Line - 5700 4550 5700 4300 -Wire Wire Line - 2650 4050 2650 4700 -Wire Wire Line - 2650 4700 4850 4700 -Connection ~ 4850 4550 -Wire Wire Line - 4850 4700 4850 4550 -Connection ~ 5200 4550 -Wire Wire Line - 3500 4550 6300 4550 -Wire Wire Line - 6300 4550 6300 4050 -Connection ~ 5200 4400 -Wire Wire Line - 4150 4400 5200 4400 -Connection ~ 4250 2850 -Wire Wire Line - 4250 2850 4250 3850 -Wire Wire Line - 4250 3850 4500 3850 -Wire Wire Line - 5900 3550 6100 3550 -Wire Wire Line - 6100 3550 6100 3000 -Wire Wire Line - 6100 3000 3750 3000 -Wire Wire Line - 3750 3000 3750 3450 -Connection ~ 3500 3450 -Wire Wire Line - 3750 3450 3500 3450 -Connection ~ 3500 4100 -Wire Wire Line - 3950 4100 3950 3350 -Wire Wire Line - 3950 3350 4500 3350 -Wire Wire Line - 3500 4150 3500 4000 -Wire Wire Line - 3500 3500 3500 3350 -Wire Wire Line - 5200 4550 5200 3950 -Wire Wire Line - 5900 3750 5900 4100 -Wire Wire Line - 5900 4100 3500 4100 -Connection ~ 3950 4100 -Wire Wire Line - 5200 2850 3500 2850 -Wire Wire Line - 4150 4000 4150 3600 -Wire Wire Line - 4150 3600 4500 3600 -Wire Wire Line - 6300 3350 5900 3350 -Wire Wire Line - 4450 2850 4450 2700 -Connection ~ 4450 2850 -Wire Wire Line - 4450 2700 2650 2700 -Wire Wire Line - 2650 2700 2650 3150 -Wire Wire Line - 5200 2650 5200 3150 -Connection ~ 5200 2850 -Wire Wire Line - 5900 4550 5900 4800 -Connection ~ 5900 4550 -Wire Wire Line - 3750 4100 3750 4000 -Connection ~ 3750 4100 -$Comp -L VPLOT8_1 U1 -U 2 1 50C4B392 -P 6300 2850 -F 0 "U1" H 6150 2950 50 0000 C CNN -F 1 "VPLOT8_1" H 6450 2950 50 0000 C CNN - 2 6300 2850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50C4B386 -P 3750 3700 -F 0 "U1" H 3600 3800 50 0000 C CNN -F 1 "VPLOT8_1" H 3900 3800 50 0000 C CNN - 1 3750 3700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 50A93D02 -P 5900 4800 -F 0 "#PWR01" H 5900 4800 30 0001 C CNN -F 1 "GND" H 5900 4730 30 0001 C CNN - 1 5900 4800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50A93CC0 -P 5700 4300 -F 0 "#FLG02" H 5700 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN - 1 5700 4300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 50A93CB7 -P 5200 2650 -F 0 "#FLG03" H 5200 2920 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 2880 30 0000 C CNN - 1 5200 2650 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 50A93C56 -P 2650 3600 -F 0 "v1" H 2450 3700 60 0000 C CNN -F 1 "5" H 2450 3550 60 0000 C CNN -F 2 "R1" H 2350 3600 60 0000 C CNN - 1 2650 3600 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A93BFE -P 6300 3800 -F 0 "R3" V 6380 3800 50 0000 C CNN -F 1 "1000" V 6300 3800 50 0000 C CNN - 1 6300 3800 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 50A93ACA -P 4150 4200 -F 0 "C2" H 4200 4300 50 0000 L CNN -F 1 "0.01e-6" H 4200 4100 50 0000 L CNN - 1 4150 4200 - 1 0 0 -1 -$EndComp -$Comp -L CP C1 -U 1 1 50A93893 -P 3500 4350 -F 0 "C1" H 3550 4450 50 0000 L CNN -F 1 "100e-12" H 3550 4250 50 0000 L CNN - 1 3500 4350 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A93858 -P 3500 3750 -F 0 "R2" V 3580 3750 50 0000 C CNN -F 1 "10000" V 3500 3750 50 0000 C CNN - 1 3500 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A93852 -P 3500 3100 -F 0 "R1" V 3580 3100 50 0000 C CNN -F 1 "1000" V 3500 3100 50 0000 C CNN - 1 3500 3100 - 1 0 0 -1 -$EndComp -$Comp -L LM555N X1 -U 1 1 50A937B9 -P 5200 3550 -F 0 "X1" H 5200 3650 70 0000 C CNN -F 1 "LM555N" H 5200 3450 70 0000 C CNN - 1 5200 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/IC555AstableMultivibrator/analysis b/OSCAD/Examples/IC555AstableMultivibrator/analysis deleted file mode 100644 index a715127..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/analysis +++ /dev/null @@ -1,2 +0,0 @@ -.tran 50e-09 5e-06 0e-00 -.ic v(3)=0 diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n-cache.bak b/OSCAD/Examples/IC555AstableMultivibrator/lm555n-cache.bak deleted file mode 100644 index 29460f2..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n-cache.bak +++ /dev/null @@ -1,207 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:00:30 AM IST -#encoding utf-8 -# -# ADC8 -# -DEF ADC8 U 0 10 Y Y 8 L N -F0 "U" -100 100 40 H V C CNN -F1 "ADC8" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in1 1 -300 0 150 R 25 25 1 1 I -X out1 9 300 0 150 L 25 25 1 1 O -X in2 2 -300 0 150 R 25 25 2 1 I -X out2 10 300 0 150 L 25 25 2 1 O -X in3 3 -300 0 150 R 25 25 3 1 I -X out3 11 300 0 150 L 25 25 3 1 O -X in4 4 -300 0 150 R 25 25 4 1 I -X out4 12 300 0 150 L 25 25 4 1 O -X in5 5 -300 0 150 R 25 25 5 1 I -X out5 13 300 0 150 L 25 25 5 1 O -X in6 6 -300 0 150 R 25 25 6 1 I -X out6 14 300 0 150 L 25 25 6 1 O -X in7 7 -300 0 150 R 25 25 7 1 I -X out7 15 300 0 150 L 25 25 7 1 O -X in8 8 -300 0 150 R 25 25 8 1 I -X out8 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# d_inverter -# -DEF d_inverter U 0 40 Y Y 1 F N -F0 "U" -150 100 40 H V C CNN -F1 "d_inverter" 100 100 40 H V C CNN -DRAW -P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N -X in 1 -250 0 150 R 25 25 1 1 I -X out 2 250 0 150 L 25 25 1 1 O I -ENDDRAW -ENDDEF -# -# D_SRLatch -# -DEF D_SRLatch U 0 40 Y Y 1 F N -F0 "U" -200 250 60 H V C CNN -F1 "D_SRLatch" 0 100 60 H V C CNN -DRAW -S -300 200 300 -200 0 1 0 N -X S 1 -600 150 300 R 50 50 1 1 I -X R 2 -600 -150 300 R 50 50 1 1 I -X Enable 3 -600 0 300 R 50 50 1 1 I -X Set 4 150 -500 300 U 50 50 1 1 I -X Reset 5 -150 -500 300 U 50 50 1 1 I -X Q 6 600 150 300 L 50 50 1 1 O -X ~Q 7 600 -150 300 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# DAC8 -# -DEF DAC8 U 0 10 Y Y 8 L N -F0 "U" -100 100 40 H V C CNN -F1 "DAC8" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in1 1 -300 0 150 R 25 25 1 1 I -X out1 9 300 0 150 L 25 25 1 1 O -X in2 2 -300 0 150 R 25 25 2 1 I -X out2 10 300 0 150 L 25 25 2 1 O -X in3 3 -300 0 150 R 25 25 3 1 I -X out3 11 300 0 150 L 25 25 3 1 O -X in4 4 -300 0 150 R 25 25 4 1 I -X out4 12 300 0 150 L 25 25 4 1 O -X in5 5 -300 0 150 R 25 25 5 1 I -X out5 13 300 0 150 L 25 25 5 1 O -X in6 6 -300 0 150 R 25 25 6 1 I -X out6 14 300 0 150 L 25 25 6 1 O -X in7 7 -300 0 150 R 25 25 7 1 I -X out7 15 300 0 150 L 25 25 7 1 O -X in8 8 -300 0 150 R 25 25 8 1 I -X out8 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# LIMIT8 -# -DEF LIMIT8 U 0 40 Y Y 8 F N -F0 "U" 0 100 30 H V C CNN -F1 "LIMIT8" 0 0 30 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in 1 -300 0 150 R 25 25 1 1 I -X out 9 300 0 150 L 25 25 1 1 O -X in 2 -300 0 150 R 25 25 2 1 I -X out 10 300 0 150 L 25 25 2 1 O -X in 3 -300 0 150 R 25 25 3 1 I -X out 11 300 0 150 L 25 25 3 1 O -X in 4 -300 0 150 R 25 25 4 1 I -X out 12 300 0 150 L 25 25 4 1 O -X in 5 -300 0 150 R 25 25 5 1 I -X out 13 300 0 150 L 25 25 5 1 O -X in 6 -300 0 150 R 25 25 6 1 I -X out 14 300 0 150 L 25 25 6 1 O -X in 7 -300 0 150 R 25 25 7 1 I -X out 15 300 0 150 L 25 25 7 1 O -X in 8 -300 0 150 R 25 25 8 1 I -X out 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n-cache.lib b/OSCAD/Examples/IC555AstableMultivibrator/lm555n-cache.lib deleted file mode 100644 index 421c114..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n-cache.lib +++ /dev/null @@ -1,207 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:00:43 AM IST -#encoding utf-8 -# -# ADC8 -# -DEF ADC8 U 0 10 Y Y 8 L N -F0 "U" -100 100 40 H V C CNN -F1 "ADC8" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in1 1 -300 0 150 R 25 25 1 1 I -X out1 9 300 0 150 L 25 25 1 1 O -X in2 2 -300 0 150 R 25 25 2 1 I -X out2 10 300 0 150 L 25 25 2 1 O -X in3 3 -300 0 150 R 25 25 3 1 I -X out3 11 300 0 150 L 25 25 3 1 O -X in4 4 -300 0 150 R 25 25 4 1 I -X out4 12 300 0 150 L 25 25 4 1 O -X in5 5 -300 0 150 R 25 25 5 1 I -X out5 13 300 0 150 L 25 25 5 1 O -X in6 6 -300 0 150 R 25 25 6 1 I -X out6 14 300 0 150 L 25 25 6 1 O -X in7 7 -300 0 150 R 25 25 7 1 I -X out7 15 300 0 150 L 25 25 7 1 O -X in8 8 -300 0 150 R 25 25 8 1 I -X out8 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# d_inverter -# -DEF d_inverter U 0 40 Y Y 1 F N -F0 "U" -150 100 40 H V C CNN -F1 "d_inverter" 100 100 40 H V C CNN -DRAW -P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N -X in 1 -250 0 150 R 25 25 1 1 I -X out 2 250 0 150 L 25 25 1 1 O I -ENDDRAW -ENDDEF -# -# D_SRLatch -# -DEF D_SRLatch U 0 40 Y Y 1 F N -F0 "U" -200 250 60 H V C CNN -F1 "D_SRLatch" 0 100 60 H V C CNN -DRAW -S -300 200 300 -200 0 1 0 N -X S 1 -600 150 300 R 50 50 1 1 I -X R 2 -600 -150 300 R 50 50 1 1 I -X Enable 3 -600 0 300 R 50 50 1 1 I -X Set 4 150 -500 300 U 50 50 1 1 I -X Reset 5 -150 -500 300 U 50 50 1 1 I -X Q 6 600 150 300 L 50 50 1 1 O -X ~Q 7 600 -150 300 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# DAC8 -# -DEF DAC8 U 0 10 Y Y 8 L N -F0 "U" -100 100 40 H V C CNN -F1 "DAC8" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in1 1 -300 0 150 R 25 25 1 1 I -X out1 9 300 0 150 L 25 25 1 1 O -X in2 2 -300 0 150 R 25 25 2 1 I -X out2 10 300 0 150 L 25 25 2 1 O -X in3 3 -300 0 150 R 25 25 3 1 I -X out3 11 300 0 150 L 25 25 3 1 O -X in4 4 -300 0 150 R 25 25 4 1 I -X out4 12 300 0 150 L 25 25 4 1 O -X in5 5 -300 0 150 R 25 25 5 1 I -X out5 13 300 0 150 L 25 25 5 1 O -X in6 6 -300 0 150 R 25 25 6 1 I -X out6 14 300 0 150 L 25 25 6 1 O -X in7 7 -300 0 150 R 25 25 7 1 I -X out7 15 300 0 150 L 25 25 7 1 O -X in8 8 -300 0 150 R 25 25 8 1 I -X out8 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# LIMIT8 -# -DEF LIMIT8 U 0 40 Y Y 8 F N -F0 "U" 0 100 30 H V C CNN -F1 "LIMIT8" 0 0 30 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in 1 -300 0 150 R 25 25 1 1 I -X out 9 300 0 150 L 25 25 1 1 O -X in 2 -300 0 150 R 25 25 2 1 I -X out 10 300 0 150 L 25 25 2 1 O -X in 3 -300 0 150 R 25 25 3 1 I -X out 11 300 0 150 L 25 25 3 1 O -X in 4 -300 0 150 R 25 25 4 1 I -X out 12 300 0 150 L 25 25 4 1 O -X in 5 -300 0 150 R 25 25 5 1 I -X out 13 300 0 150 L 25 25 5 1 O -X in 6 -300 0 150 R 25 25 6 1 I -X out 14 300 0 150 L 25 25 6 1 O -X in 7 -300 0 150 R 25 25 7 1 I -X out 15 300 0 150 L 25 25 7 1 O -X in 8 -300 0 150 R 25 25 8 1 I -X out 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.bak b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.bak deleted file mode 100644 index 6b8426e..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.bak +++ /dev/null @@ -1,435 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:00:30 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:lm555n-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L D_INVERTER U5 -U 1 1 50CEA9C5 -P 6700 4050 -F 0 "U5" H 6550 4150 40 0000 C CNN -F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN - 1 6700 4050 - 1 0 0 -1 -$EndComp -$Comp -L D_SRLATCH U6 -U 1 1 50CEA9AE -P 7100 3400 -F 0 "U6" H 6900 3650 60 0000 C CNN -F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN - 1 7100 3400 - 1 0 0 -1 -$EndComp -Text Notes 5750 3050 0 60 ~ 0 -IC 555 -Wire Wire Line - 4700 3000 4900 3000 -Wire Wire Line - 4700 4750 4700 4650 -Connection ~ 4400 3550 -Connection ~ 4400 4900 -Wire Wire Line - 4300 4900 7700 4900 -Wire Wire Line - 4400 4200 4400 4100 -Wire Wire Line - 7700 4900 7700 4800 -Wire Wire Line - 7700 3250 7850 3250 -Wire Wire Line - 7400 4600 7100 4600 -Wire Wire Line - 7100 4600 7100 4250 -Wire Wire Line - 7700 3650 7700 3550 -Wire Wire Line - 6350 4050 6450 4050 -Wire Wire Line - 6950 3900 6950 4000 -Wire Wire Line - 7150 4000 7150 4050 -Wire Wire Line - 7150 4050 6950 4050 -Wire Wire Line - 6500 3550 6200 3550 -Wire Wire Line - 6350 3250 6500 3250 -Wire Wire Line - 5400 3250 5100 3250 -Wire Wire Line - 5100 3250 5100 3750 -Wire Wire Line - 5550 4500 5550 4350 -Wire Wire Line - 5700 3550 5800 3550 -Wire Wire Line - 5900 3250 6000 3250 -Wire Wire Line - 6000 3850 6350 3850 -Wire Wire Line - 5800 4150 6200 4150 -Wire Wire Line - 5200 3550 5200 3700 -Wire Wire Line - 5200 3700 5550 3700 -Wire Wire Line - 5550 3700 5550 3750 -Connection ~ 5550 4450 -Wire Wire Line - 5750 4400 5750 4450 -Wire Wire Line - 5100 4350 5100 4450 -Wire Wire Line - 5100 4450 5750 4450 -Wire Wire Line - 6500 3400 6450 3400 -Wire Wire Line - 6450 3400 6450 4050 -Wire Wire Line - 6950 4000 7250 4000 -Wire Wire Line - 7250 4000 7250 3900 -Connection ~ 7150 4000 -Wire Wire Line - 7600 4250 7700 4250 -Wire Wire Line - 7700 4400 7700 4350 -Wire Wire Line - 7700 4350 7800 4350 -Wire Wire Line - 7850 3850 7900 3850 -Wire Wire Line - 4400 4900 4400 4700 -Wire Wire Line - 4400 3600 4400 3500 -Wire Wire Line - 4300 3000 4400 3000 -Wire Wire Line - 4400 4150 4700 4150 -Connection ~ 4400 4150 -Wire Wire Line - 4300 3550 4700 3550 -Wire Wire Line - 4700 3550 4700 3500 -Wire Wire Line - 6350 4750 6350 4650 -Text Label 4850 4100 0 60 ~ 0 -d -$Comp -L VCVS E2 -U 1 1 50AA12FF -P 5050 4050 -F 0 "E2" H 4850 4150 50 0000 C CNN -F 1 "10000" H 4850 4000 50 0000 C CNN - 1 5050 4050 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 2 1 50B4E21B -P 6000 3550 -F 0 "U4" H 6000 3650 30 0000 C CNN -F 1 "LIMIT8" H 6000 3550 30 0000 C CNN - 2 6000 3550 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 1 1 50B4E215 -P 5800 3850 -F 0 "U4" H 5800 3950 30 0000 C CNN -F 1 "LIMIT8" H 5800 3850 30 0000 C CNN - 1 5800 3850 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 2 1 50AAFCE7 -P 7700 3950 -F 0 "U3" H 7600 4050 40 0000 C CNN -F 1 "DAC8" H 7700 3950 40 0000 C CNN - 2 7700 3950 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 1 1 50AAFC9A -P 7850 3550 -F 0 "U3" H 7750 3650 40 0000 C CNN -F 1 "DAC8" H 7850 3550 40 0000 C CNN - 1 7850 3550 - 0 1 1 0 -$EndComp -$Comp -L ADC8 U2 -U 3 1 50AAFB76 -P 6350 4350 -F 0 "U2" H 6250 4450 40 0000 C CNN -F 1 "ADC8" H 6350 4350 40 0000 C CNN - 3 6350 4350 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 2 1 50AAFB64 -P 6350 3550 -F 0 "U2" H 6250 3650 40 0000 C CNN -F 1 "ADC8" H 6350 3550 40 0000 C CNN - 2 6350 3550 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 1 1 50AAFB55 -P 6200 3850 -F 0 "U2" H 6100 3950 40 0000 C CNN -F 1 "ADC8" H 6200 3850 40 0000 C CNN - 1 6200 3850 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50AA39A3 -P 5750 4400 -F 0 "#FLG01" H 5750 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 4630 30 0000 C CNN - 1 5750 4400 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 5 1 50AA2210 -P 4050 3550 -F 0 "U1" H 4050 3500 30 0000 C CNN -F 1 "PORT" H 4050 3550 30 0000 C CNN - 5 4050 3550 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 1 1 50AA21C7 -P 4050 4900 -F 0 "U1" H 4050 4850 30 0000 C CNN -F 1 "PORT" H 4050 4900 30 0000 C CNN - 1 4050 4900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 50AA21BC -P 4700 5000 -F 0 "U1" H 4700 4950 30 0000 C CNN -F 1 "PORT" H 4700 5000 30 0000 C CNN - 2 4700 5000 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 4 1 50AA21A9 -P 6350 5000 -F 0 "U1" H 6350 4950 30 0000 C CNN -F 1 "PORT" H 6350 5000 30 0000 C CNN - 4 6350 5000 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 7 1 50AA21A0 -P 8050 4350 -F 0 "U1" H 8050 4300 30 0000 C CNN -F 1 "PORT" H 8050 4350 30 0000 C CNN - 7 8050 4350 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 3 1 50AA2181 -P 8150 3850 -F 0 "U1" H 8150 3800 30 0000 C CNN -F 1 "PORT" H 8150 3850 30 0000 C CNN - 3 8150 3850 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 6 1 50AA2171 -P 5150 3000 -F 0 "U1" H 5150 2950 30 0000 C CNN -F 1 "PORT" H 5150 3000 30 0000 C CNN - 6 5150 3000 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 8 1 50AA2162 -P 4050 3000 -F 0 "U1" H 4050 2950 30 0000 C CNN -F 1 "PORT" H 4050 3000 30 0000 C CNN - 8 4050 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R8 -U 1 1 50AA20DA -P 7350 4250 -F 0 "R8" V 7430 4250 50 0000 C CNN -F 1 "1500" V 7350 4250 50 0000 C CNN - 1 7350 4250 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 50AA2050 -P 7600 4600 -F 0 "Q1" H 7600 4450 50 0000 R CNN -F 1 "QNOM" H 7600 4750 50 0000 R CNN - 1 7600 4600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50AA140C -P 5550 4500 -F 0 "#PWR02" H 5550 4500 30 0001 C CNN -F 1 "GND" H 5550 4430 30 0001 C CNN - 1 5550 4500 - 1 0 0 -1 -$EndComp -Text Label 4850 4000 0 60 ~ 0 -c -Text Label 4700 4650 0 60 ~ 0 -d -Text Label 4700 4150 0 60 ~ 0 -c -$Comp -L R R7 -U 1 1 50AA12F7 -P 5650 3250 -F 0 "R7" V 5730 3250 50 0000 C CNN -F 1 "25" V 5650 3250 50 0000 C CNN - 1 5650 3250 - 0 -1 -1 0 -$EndComp -$Comp -L R R6 -U 1 1 50AA12B0 -P 5450 3550 -F 0 "R6" V 5530 3550 50 0000 C CNN -F 1 "25" V 5450 3550 50 0000 C CNN - 1 5450 3550 - 0 -1 -1 0 -$EndComp -Text Label 5300 4000 0 60 ~ 0 -b -Text Label 5300 4100 0 60 ~ 0 -a -Text Label 4700 3000 0 60 ~ 0 -b -Text Label 4700 3500 0 60 ~ 0 -a -$Comp -L VCVS E1 -U 1 1 50AA11B6 -P 5500 4050 -F 0 "E1" H 5300 4150 50 0000 C CNN -F 1 "10000" H 5300 4000 50 0000 C CNN - 1 5500 4050 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50A9E00B -P 4700 3250 -F 0 "R4" V 4780 3250 50 0000 C CNN -F 1 "2E6" V 4700 3250 50 0000 C CNN - 1 4700 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50A9E001 -P 4700 4400 -F 0 "R5" V 4780 4400 50 0000 C CNN -F 1 "2E6" V 4700 4400 50 0000 C CNN - 1 4700 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A9DF09 -P 4400 4450 -F 0 "R3" V 4480 4450 50 0000 C CNN -F 1 "5000" V 4400 4450 50 0000 C CNN - 1 4400 4450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A9DF03 -P 4400 3850 -F 0 "R2" V 4480 3850 50 0000 C CNN -F 1 "5000" V 4400 3850 50 0000 C CNN - 1 4400 3850 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A9DEFE -P 4400 3250 -F 0 "R1" V 4480 3250 50 0000 C CNN -F 1 "5000" V 4400 3250 50 0000 C CNN - 1 4400 3250 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir deleted file mode 100644 index 144b715..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir +++ /dev/null @@ -1,25 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:00:36 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U5 5 21 D_INVERTER -U6 1 4 5 21 21 8 10 D_SRLATCH -E2 18 0 23 14 10000 -U4 19 20 11 12 LIMIT8 -U3 8 10 7 9 DAC8 -U2 11 12 6 4 1 5 ADC8 -U1 22 14 7 6 15 16 3 13 PORT -R8 9 2 1500 -Q1 22 2 3 QNOM -R7 18 20 25 -R6 17 19 25 -E1 17 0 16 15 10000 -R4 16 15 2E6 -R5 23 14 2E6 -R3 23 22 5000 -R2 15 23 5000 -R1 13 15 5000 - -.end diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.ckt b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.ckt deleted file mode 100644 index f45920f..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.ckt +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.out b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.out deleted file mode 100644 index f45920f..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.cir.out +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.pro b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.pro deleted file mode 100644 index 09fa54e..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.pro +++ /dev/null @@ -1,73 +0,0 @@ -update=Monday 19 November 2012 04:56:38 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=analogXSpice -LibName33=converterSpice -LibName34=digitalSpice -LibName35=linearSpice -LibName36=measurementSpice -LibName37=portSpice -LibName38=sourcesSpice -LibName39=digitalXSpice diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sch b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sch deleted file mode 100644 index 417063b..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sch +++ /dev/null @@ -1,435 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:00:43 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:lm555n-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L D_INVERTER U5 -U 1 1 50CEA9C5 -P 6700 4050 -F 0 "U5" H 6550 4150 40 0000 C CNN -F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN - 1 6700 4050 - 1 0 0 -1 -$EndComp -$Comp -L D_SRLATCH U6 -U 1 1 50CEA9AE -P 7100 3400 -F 0 "U6" H 6900 3650 60 0000 C CNN -F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN - 1 7100 3400 - 1 0 0 -1 -$EndComp -Text Notes 5750 3050 0 60 ~ 0 -IC 555 -Wire Wire Line - 4700 3000 4900 3000 -Wire Wire Line - 4700 4750 4700 4650 -Connection ~ 4400 3550 -Connection ~ 4400 4900 -Wire Wire Line - 4300 4900 7700 4900 -Wire Wire Line - 4400 4200 4400 4100 -Wire Wire Line - 7700 4900 7700 4800 -Wire Wire Line - 7700 3250 7850 3250 -Wire Wire Line - 7400 4600 7100 4600 -Wire Wire Line - 7100 4600 7100 4250 -Wire Wire Line - 7700 3650 7700 3550 -Wire Wire Line - 6350 4050 6450 4050 -Wire Wire Line - 6950 3900 6950 4000 -Wire Wire Line - 7150 4000 7150 4050 -Wire Wire Line - 7150 4050 6950 4050 -Wire Wire Line - 6500 3550 6200 3550 -Wire Wire Line - 6350 3250 6500 3250 -Wire Wire Line - 5400 3250 5100 3250 -Wire Wire Line - 5100 3250 5100 3750 -Wire Wire Line - 5550 4500 5550 4350 -Wire Wire Line - 5700 3550 5800 3550 -Wire Wire Line - 5900 3250 6000 3250 -Wire Wire Line - 6000 3850 6350 3850 -Wire Wire Line - 5800 4150 6200 4150 -Wire Wire Line - 5200 3550 5200 3700 -Wire Wire Line - 5200 3700 5550 3700 -Wire Wire Line - 5550 3700 5550 3750 -Connection ~ 5550 4450 -Wire Wire Line - 5750 4400 5750 4450 -Wire Wire Line - 5100 4350 5100 4450 -Wire Wire Line - 5100 4450 5750 4450 -Wire Wire Line - 6500 3400 6450 3400 -Wire Wire Line - 6450 3400 6450 4050 -Wire Wire Line - 6950 4000 7250 4000 -Wire Wire Line - 7250 4000 7250 3900 -Connection ~ 7150 4000 -Wire Wire Line - 7600 4250 7700 4250 -Wire Wire Line - 7700 4400 7700 4350 -Wire Wire Line - 7700 4350 7800 4350 -Wire Wire Line - 7850 3850 7900 3850 -Wire Wire Line - 4400 4900 4400 4700 -Wire Wire Line - 4400 3600 4400 3500 -Wire Wire Line - 4300 3000 4400 3000 -Wire Wire Line - 4400 4150 4700 4150 -Connection ~ 4400 4150 -Wire Wire Line - 4300 3550 4700 3550 -Wire Wire Line - 4700 3550 4700 3500 -Wire Wire Line - 6350 4750 6350 4650 -Text Label 4850 4100 0 60 ~ 0 -d -$Comp -L VCVS E2 -U 1 1 50AA12FF -P 5050 4050 -F 0 "E2" H 4850 4150 50 0000 C CNN -F 1 "10000" H 4850 4000 50 0000 C CNN - 1 5050 4050 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 2 1 50B4E21B -P 6000 3550 -F 0 "U4" H 6000 3650 30 0000 C CNN -F 1 "LIMIT8" H 6000 3550 30 0000 C CNN - 2 6000 3550 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 1 1 50B4E215 -P 5800 3850 -F 0 "U4" H 5800 3950 30 0000 C CNN -F 1 "LIMIT8" H 5800 3850 30 0000 C CNN - 1 5800 3850 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 2 1 50AAFCE7 -P 7700 3950 -F 0 "U3" H 7600 4050 40 0000 C CNN -F 1 "DAC8" H 7700 3950 40 0000 C CNN - 2 7700 3950 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 1 1 50AAFC9A -P 7850 3550 -F 0 "U3" H 7750 3650 40 0000 C CNN -F 1 "DAC8" H 7850 3550 40 0000 C CNN - 1 7850 3550 - 0 1 1 0 -$EndComp -$Comp -L ADC8 U2 -U 3 1 50AAFB76 -P 6350 4350 -F 0 "U2" H 6250 4450 40 0000 C CNN -F 1 "ADC8" H 6350 4350 40 0000 C CNN - 3 6350 4350 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 2 1 50AAFB64 -P 6350 3550 -F 0 "U2" H 6250 3650 40 0000 C CNN -F 1 "ADC8" H 6350 3550 40 0000 C CNN - 2 6350 3550 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 1 1 50AAFB55 -P 6200 3850 -F 0 "U2" H 6100 3950 40 0000 C CNN -F 1 "ADC8" H 6200 3850 40 0000 C CNN - 1 6200 3850 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50AA39A3 -P 5750 4400 -F 0 "#FLG01" H 5750 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 4630 30 0000 C CNN - 1 5750 4400 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 5 1 50AA2210 -P 4050 3550 -F 0 "U1" H 4050 3500 30 0000 C CNN -F 1 "PORT" H 4050 3550 30 0000 C CNN - 5 4050 3550 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 1 1 50AA21C7 -P 4050 4900 -F 0 "U1" H 4050 4850 30 0000 C CNN -F 1 "PORT" H 4050 4900 30 0000 C CNN - 1 4050 4900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 50AA21BC -P 4700 5000 -F 0 "U1" H 4700 4950 30 0000 C CNN -F 1 "PORT" H 4700 5000 30 0000 C CNN - 2 4700 5000 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 4 1 50AA21A9 -P 6350 5000 -F 0 "U1" H 6350 4950 30 0000 C CNN -F 1 "PORT" H 6350 5000 30 0000 C CNN - 4 6350 5000 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 7 1 50AA21A0 -P 8050 4350 -F 0 "U1" H 8050 4300 30 0000 C CNN -F 1 "PORT" H 8050 4350 30 0000 C CNN - 7 8050 4350 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 3 1 50AA2181 -P 8150 3850 -F 0 "U1" H 8150 3800 30 0000 C CNN -F 1 "PORT" H 8150 3850 30 0000 C CNN - 3 8150 3850 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 6 1 50AA2171 -P 5150 3000 -F 0 "U1" H 5150 2950 30 0000 C CNN -F 1 "PORT" H 5150 3000 30 0000 C CNN - 6 5150 3000 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 8 1 50AA2162 -P 4050 3000 -F 0 "U1" H 4050 2950 30 0000 C CNN -F 1 "PORT" H 4050 3000 30 0000 C CNN - 8 4050 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R8 -U 1 1 50AA20DA -P 7350 4250 -F 0 "R8" V 7430 4250 50 0000 C CNN -F 1 "1500" V 7350 4250 50 0000 C CNN - 1 7350 4250 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 50AA2050 -P 7600 4600 -F 0 "Q1" H 7600 4450 50 0000 R CNN -F 1 "QNOM" H 7600 4750 50 0000 R CNN - 1 7600 4600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50AA140C -P 5550 4500 -F 0 "#PWR02" H 5550 4500 30 0001 C CNN -F 1 "GND" H 5550 4430 30 0001 C CNN - 1 5550 4500 - 1 0 0 -1 -$EndComp -Text Label 4850 4000 0 60 ~ 0 -c -Text Label 4700 4650 0 60 ~ 0 -d -Text Label 4700 4150 0 60 ~ 0 -c -$Comp -L R R7 -U 1 1 50AA12F7 -P 5650 3250 -F 0 "R7" V 5730 3250 50 0000 C CNN -F 1 "25" V 5650 3250 50 0000 C CNN - 1 5650 3250 - 0 -1 -1 0 -$EndComp -$Comp -L R R6 -U 1 1 50AA12B0 -P 5450 3550 -F 0 "R6" V 5530 3550 50 0000 C CNN -F 1 "25" V 5450 3550 50 0000 C CNN - 1 5450 3550 - 0 -1 -1 0 -$EndComp -Text Label 5300 4000 0 60 ~ 0 -b -Text Label 5300 4100 0 60 ~ 0 -a -Text Label 4700 3000 0 60 ~ 0 -b -Text Label 4700 3500 0 60 ~ 0 -a -$Comp -L VCVS E1 -U 1 1 50AA11B6 -P 5500 4050 -F 0 "E1" H 5300 4150 50 0000 C CNN -F 1 "10000" H 5300 4000 50 0000 C CNN - 1 5500 4050 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50A9E00B -P 4700 3250 -F 0 "R4" V 4780 3250 50 0000 C CNN -F 1 "2E6" V 4700 3250 50 0000 C CNN - 1 4700 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50A9E001 -P 4700 4400 -F 0 "R5" V 4780 4400 50 0000 C CNN -F 1 "2E6" V 4700 4400 50 0000 C CNN - 1 4700 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A9DF09 -P 4400 4450 -F 0 "R3" V 4480 4450 50 0000 C CNN -F 1 "5000" V 4400 4450 50 0000 C CNN - 1 4400 4450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A9DF03 -P 4400 3850 -F 0 "R2" V 4480 3850 50 0000 C CNN -F 1 "5000" V 4400 3850 50 0000 C CNN - 1 4400 3850 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A9DEFE -P 4400 3250 -F 0 "R1" V 4480 3250 50 0000 C CNN -F 1 "5000" V 4400 3250 50 0000 C CNN - 1 4400 3250 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sub b/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sub deleted file mode 100644 index beeefc4..0000000 --- a/OSCAD/Examples/IC555AstableMultivibrator/lm555n.sub +++ /dev/null @@ -1,37 +0,0 @@ -* Subcircuit lm555n -.subckt lm555n 22 14 7 6 15 16 3 13 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) - -.ends lm555n
\ No newline at end of file diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier-cache.bak b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier-cache.bak deleted file mode 100644 index 0c195d8..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier-cache.bak +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:09:30 AM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier-cache.lib b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier-cache.lib deleted file mode 100644 index fbea033..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier-cache.lib +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:36:39 AM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.bak b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.bak deleted file mode 100644 index 54b3539..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.bak +++ /dev/null @@ -1,194 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:09:30 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:InvertingAmplifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4300 3550 -Wire Wire Line - 4300 3550 3400 3550 -Wire Wire Line - 3400 3550 3400 3100 -Wire Wire Line - 6550 3400 6550 4050 -Wire Wire Line - 6550 4050 6050 4050 -Wire Wire Line - 6850 4150 6850 4400 -Connection ~ 5150 3500 -Wire Wire Line - 5550 4050 5150 4050 -Wire Wire Line - 5150 4050 5150 3500 -Wire Wire Line - 4300 3400 4300 3300 -Wire Wire Line - 4300 3300 5300 3300 -Wire Wire Line - 4400 3500 4300 3500 -Wire Wire Line - 4300 3500 4300 3650 -Wire Wire Line - 4900 3500 5300 3500 -Wire Wire Line - 4300 4550 4300 4700 -Wire Wire Line - 4600 4400 4600 4650 -Wire Wire Line - 4600 4650 4300 4650 -Connection ~ 4300 4650 -Connection ~ 6850 3400 -Wire Wire Line - 6850 3100 6850 3650 -Wire Wire Line - 6300 3400 6850 3400 -Connection ~ 6550 3400 -$Comp -L GND #PWR01 -U 1 1 508240AD -P 6850 4400 -F 0 "#PWR01" H 6850 4400 30 0001 C CNN -F 1 "GND" H 6850 4330 30 0001 C CNN - 1 6850 4400 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB089 -P 6850 2800 -F 0 "U1" H 6700 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN - 2 6850 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB075 -P 3400 2800 -F 0 "U1" H 3250 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 3550 2900 50 0000 C CNN - 1 3400 2800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 508245D2 -P 4600 4400 -F 0 "#FLG02" H 4600 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN - 1 4600 4400 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X1 -U 1 1 50824595 -P 5800 3400 -F 0 "X1" H 5950 3550 60 0000 C CNN -F 1 "UA741" H 5950 3650 60 0000 C CNN - 1 5800 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 508240CB -P 4300 3400 -F 0 "#PWR03" H 4300 3400 30 0001 C CNN -F 1 "GND" H 4300 3330 30 0001 C CNN - 1 4300 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 508240B7 -P 4300 4700 -F 0 "#PWR04" H 4300 4700 30 0001 C CNN -F 1 "GND" H 4300 4630 30 0001 C CNN - 1 4300 4700 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 50824091 -P 4300 4100 -F 0 "v1" H 4100 4200 60 0000 C CNN -F 1 "SINE" H 4100 4050 60 0000 C CNN -F 2 "R1" H 4000 4100 60 0000 C CNN - 1 4300 4100 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50824073 -P 6850 3900 -F 0 "R3" V 6930 3900 50 0000 C CNN -F 1 "10000" V 6850 3900 50 0000 C CNN - 1 6850 3900 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50824062 -P 4650 3500 -F 0 "R1" V 4730 3500 50 0000 C CNN -F 1 "1000" V 4650 3500 50 0000 C CNN - 1 4650 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 50824045 -P 5800 4050 -F 0 "R2" V 5880 4050 50 0000 C CNN -F 1 "2000" V 5800 4050 50 0000 C CNN - 1 5800 4050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir deleted file mode 100644 index f995c1d..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir +++ /dev/null @@ -1,14 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 19 December 2012 10:36:45 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 3 4 VPLOT8_1 -X1 2 0 4 UA741 -v1 3 0 SINE -R3 4 0 10000 -R1 2 3 1000 -R2 4 2 2000 - -.end diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt deleted file mode 100644 index 543e15f..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:36:45 am ist -.include ua741.sub - -* Plotting option vplot8_1 -x1 2 0 4 ua741 -v1 3 0 sine(0 5 50 0 0) -r3 4 0 10000 -r1 2 3 1000 -r2 4 2 2000 - -.tran 100e-06 40e-03 0e-00 -.plot v(3) v(4) -.end diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.out b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.out deleted file mode 100644 index e67a64a..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:36:45 am ist -.include ua741.sub - -* Plotting option vplot8_1 -x1 2 0 4 ua741 -v1 3 0 sine(0 5 50 0 0) -r3 4 0 10000 -r1 2 3 1000 -r2 4 2 2000 - -.tran 100e-06 40e-03 0e-00 - -* Control Statements -.control -run -plot v(3) v(4) -.endc -.end diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cmp b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cmp deleted file mode 100644 index c3e04af..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cmp +++ /dev/null @@ -1,38 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Saturday 20 October 2012 11:59:17 AM IST - -BeginCmp -TimeStamp = /50824062; -Reference = R1; -ValeurCmp = 1000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824045; -Reference = R2; -ValeurCmp = 2000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824073; -Reference = R3; -ValeurCmp = 10000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824091; -Reference = v1; -ValeurCmp = SINE; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /50823E96; -Reference = X1; -ValeurCmp = LM741; -IdModule = DIP-8__300; -EndCmp - -EndListe diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.net b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.net deleted file mode 100644 index 938591e..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.net +++ /dev/null @@ -1,70 +0,0 @@ -# EESchema Netlist Version 1.1 created Saturday 20 October 2012 12:03:26 PM IST -( - ( /50824595 $noname X1 UA741 {Lib=UA741} - ( 2 N-000004 ) - ( 3 GND ) - ( 6 N-000001 ) - ) - ( /50824091 R1 v1 SINE {Lib=SINE} - ( 1 N-000002 ) - ( 2 GND ) - ) - ( /50824073 $noname R3 10000 {Lib=R} - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /50824062 $noname R1 1000 {Lib=R} - ( 1 N-000004 ) - ( 2 N-000002 ) - ) - ( /50824045 $noname R2 2000 {Lib=R} - ( 1 N-000001 ) - ( 2 N-000004 ) - ) -) -* -{ Allowed footprints by component: -$component X1 - DIP-8__300 -$endlist -$component v1 - 1_pin -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "" "" - R2 1 - X1 6 - R3 1 -Net 2 "" "" - R1 2 - v1 1 -Net 3 "GND" "GND" - X1 3 - v1 2 - R3 2 -Net 4 "" "" - X1 2 - R1 1 - R2 2 -} -#End diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.pro b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.pro deleted file mode 100644 index 9f5d056..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:16:29 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.proj b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.proj deleted file mode 100644 index c78c533..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile InvertingAmplifier.sch diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.sch b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.sch deleted file mode 100644 index 9b6032d..0000000 --- a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.sch +++ /dev/null @@ -1,194 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:36:39 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:InvertingAmplifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4300 3550 -Wire Wire Line - 4300 3550 3400 3550 -Wire Wire Line - 3400 3550 3400 3100 -Wire Wire Line - 6550 3400 6550 4050 -Wire Wire Line - 6550 4050 6050 4050 -Wire Wire Line - 6850 4150 6850 4400 -Connection ~ 5150 3500 -Wire Wire Line - 5550 4050 5150 4050 -Wire Wire Line - 5150 4050 5150 3500 -Wire Wire Line - 4300 3400 4300 3300 -Wire Wire Line - 4300 3300 5300 3300 -Wire Wire Line - 4400 3500 4300 3500 -Wire Wire Line - 4300 3500 4300 3650 -Wire Wire Line - 4900 3500 5300 3500 -Wire Wire Line - 4300 4550 4300 4700 -Wire Wire Line - 4600 4400 4600 4650 -Wire Wire Line - 4600 4650 4300 4650 -Connection ~ 4300 4650 -Connection ~ 6850 3400 -Wire Wire Line - 6850 3100 6850 3650 -Wire Wire Line - 6300 3400 6850 3400 -Connection ~ 6550 3400 -$Comp -L GND #PWR01 -U 1 1 508240AD -P 6850 4400 -F 0 "#PWR01" H 6850 4400 30 0001 C CNN -F 1 "GND" H 6850 4330 30 0001 C CNN - 1 6850 4400 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB089 -P 6850 2800 -F 0 "U1" H 6700 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN - 2 6850 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB075 -P 3400 2800 -F 0 "U1" H 3250 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 3550 2900 50 0000 C CNN - 1 3400 2800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 508245D2 -P 4600 4400 -F 0 "#FLG02" H 4600 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN - 1 4600 4400 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X1 -U 1 1 50824595 -P 5800 3400 -F 0 "X1" H 5950 3550 60 0000 C CNN -F 1 "UA741" H 5950 3650 60 0000 C CNN - 1 5800 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 508240CB -P 4300 3400 -F 0 "#PWR03" H 4300 3400 30 0001 C CNN -F 1 "GND" H 4300 3330 30 0001 C CNN - 1 4300 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 508240B7 -P 4300 4700 -F 0 "#PWR04" H 4300 4700 30 0001 C CNN -F 1 "GND" H 4300 4630 30 0001 C CNN - 1 4300 4700 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 50824091 -P 4300 4100 -F 0 "v1" H 4100 4200 60 0000 C CNN -F 1 "SINE" H 4100 4050 60 0000 C CNN -F 2 "R1" H 4000 4100 60 0000 C CNN - 1 4300 4100 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50824073 -P 6850 3900 -F 0 "R3" V 6930 3900 50 0000 C CNN -F 1 "10000" V 6850 3900 50 0000 C CNN - 1 6850 3900 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50824062 -P 4650 3500 -F 0 "R1" V 4730 3500 50 0000 C CNN -F 1 "1000" V 4650 3500 50 0000 C CNN - 1 4650 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 50824045 -P 5800 4050 -F 0 "R2" V 5880 4050 50 0000 C CNN -F 1 "2000" V 5800 4050 50 0000 C CNN - 1 5800 4050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/InvertingAmplifier/analysis b/OSCAD/Examples/InvertingAmplifier/analysis deleted file mode 100644 index 888b3aa..0000000 --- a/OSCAD/Examples/InvertingAmplifier/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 100e-06 40e-03 0e-00 diff --git a/OSCAD/Examples/InvertingAmplifier/ua741-cache.bak b/OSCAD/Examples/InvertingAmplifier/ua741-cache.bak deleted file mode 100644 index e2ece32..0000000 --- a/OSCAD/Examples/InvertingAmplifier/ua741-cache.bak +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:17:01 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/InvertingAmplifier/ua741-cache.lib b/OSCAD/Examples/InvertingAmplifier/ua741-cache.lib deleted file mode 100644 index cbec3a5..0000000 --- a/OSCAD/Examples/InvertingAmplifier/ua741-cache.lib +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:15:16 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/InvertingAmplifier/ua741.bak b/OSCAD/Examples/InvertingAmplifier/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/InvertingAmplifier/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/InvertingAmplifier/ua741.cir b/OSCAD/Examples/InvertingAmplifier/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/InvertingAmplifier/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/InvertingAmplifier/ua741.cir.ckt b/OSCAD/Examples/InvertingAmplifier/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/InvertingAmplifier/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/InvertingAmplifier/ua741.cir.out b/OSCAD/Examples/InvertingAmplifier/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/InvertingAmplifier/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/InvertingAmplifier/ua741.pro b/OSCAD/Examples/InvertingAmplifier/ua741.pro deleted file mode 100644 index 9aa118e..0000000 --- a/OSCAD/Examples/InvertingAmplifier/ua741.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:14:06 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/OSCAD/Examples/InvertingAmplifier/ua741.sch b/OSCAD/Examples/InvertingAmplifier/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/InvertingAmplifier/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/InvertingAmplifier/ua741.sub b/OSCAD/Examples/InvertingAmplifier/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/InvertingAmplifier/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/RC/RC-cache.bak b/OSCAD/Examples/RC/RC-cache.bak deleted file mode 100644 index 65af569..0000000 --- a/OSCAD/Examples/RC/RC-cache.bak +++ /dev/null @@ -1,99 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 02:53:57 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/RC/RC-cache.lib b/OSCAD/Examples/RC/RC-cache.lib deleted file mode 100644 index e808d27..0000000 --- a/OSCAD/Examples/RC/RC-cache.lib +++ /dev/null @@ -1,99 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 02:54:22 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/RC/RC.bak b/OSCAD/Examples/RC/RC.bak deleted file mode 100644 index 4b41a9e..0000000 --- a/OSCAD/Examples/RC/RC.bak +++ /dev/null @@ -1,136 +0,0 @@ -EESchema Schematic File Version 2 date Friday 24 May 2013 02:53:57 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:RC-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "24 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4650 2650 -Connection ~ 5900 2650 -$Comp -L SINE v1 -U 1 1 519F2A93 -P 4650 3100 -F 0 "v1" H 4450 3200 60 0000 C CNN -F 1 "SINE" H 4450 3050 60 0000 C CNN -F 2 "R1" H 4350 3100 60 0000 C CNN - 1 4650 3100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5900 3300 5900 3550 -Wire Wire Line - 5600 2650 5900 2650 -Connection ~ 5400 3550 -Wire Wire Line - 5400 3550 5400 3800 -Wire Wire Line - 5900 3550 4650 3550 -Wire Wire Line - 4650 2650 5100 2650 -Wire Wire Line - 5900 2650 5900 2900 -$Comp -L VPLOT8_1 U1 -U 2 1 519F22B7 -P 5900 2350 -F 0 "U1" H 5750 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 6050 2450 50 0000 C CNN - 2 5900 2350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 519F229B -P 5400 3550 -F 0 "#FLG1" H 5400 3820 30 0001 C CNN -F 1 "PWR_FLAG" H 5400 3780 30 0000 C CNN - 1 5400 3550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR1 -U 1 1 519F2294 -P 5400 3800 -F 0 "#PWR1" H 5400 3800 30 0001 C CNN -F 1 "GND" H 5400 3730 30 0001 C CNN - 1 5400 3800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 519F228E -P 4650 2350 -F 0 "U1" H 4500 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 4800 2450 50 0000 C CNN - 1 4650 2350 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 519F2283 -P 5350 2650 -F 0 "R1" V 5430 2650 50 0000 C CNN -F 1 "1k" V 5350 2650 50 0000 C CNN - 1 5350 2650 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 519F227E -P 5900 3100 -F 0 "C1" H 5950 3200 50 0000 L CNN -F 1 "1u" H 5950 3000 50 0000 L CNN - 1 5900 3100 - -1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/RC/RC.cir b/OSCAD/Examples/RC/RC.cir deleted file mode 100644 index 17738ac..0000000 --- a/OSCAD/Examples/RC/RC.cir +++ /dev/null @@ -1,12 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 24 May 2013 02:23:51 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 1 0 SINE -U1 1 3 VPLOT8_1 -R1 3 1 1k -C1 0 3 1u - -.end diff --git a/OSCAD/Examples/RC/RC.cir.ckt b/OSCAD/Examples/RC/RC.cir.ckt deleted file mode 100644 index 7a8138f..0000000 --- a/OSCAD/Examples/RC/RC.cir.ckt +++ /dev/null @@ -1,10 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 02:23:51 pm ist
-
-v1 1 0 sine(0 5 300 0 0)
-* Plotting option vplot8_1
-r1 3 1 1k
-c1 0 3 1u
-
-.tran 5e-03 30e-03 0e-00
-.plot v(1) v(3)
-.end
diff --git a/OSCAD/Examples/RC/RC.cir.out b/OSCAD/Examples/RC/RC.cir.out deleted file mode 100644 index 01e68ad..0000000 --- a/OSCAD/Examples/RC/RC.cir.out +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 02:23:51 pm ist
-
-v1 1 0 sine(0 5 300 0 0)
-* Plotting option vplot8_1
-r1 3 1 1k
-c1 0 3 1u
-
-.tran 5e-03 30e-03 0e-00
-
-* Control Statements
-.control
-run
-plot v(1) v(3)
-.endc
-.end
diff --git a/OSCAD/Examples/RC/RC.pro b/OSCAD/Examples/RC/RC.pro deleted file mode 100644 index cfb5fa1..0000000 --- a/OSCAD/Examples/RC/RC.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Friday 24 May 2013 02:22:07 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/RC/RC.proj b/OSCAD/Examples/RC/RC.proj deleted file mode 100644 index 396e6d0..0000000 --- a/OSCAD/Examples/RC/RC.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile RC.sch diff --git a/OSCAD/Examples/RC/RC.sch b/OSCAD/Examples/RC/RC.sch deleted file mode 100644 index 6afd4fa..0000000 --- a/OSCAD/Examples/RC/RC.sch +++ /dev/null @@ -1,137 +0,0 @@ -EESchema Schematic File Version 2 date Friday 24 May 2013 02:54:22 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:RC-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "24 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5200 3550 -Connection ~ 4650 2650 -Connection ~ 5900 2650 -$Comp -L SINE v1 -U 1 1 519F2A93 -P 4650 3100 -F 0 "v1" H 4450 3200 60 0000 C CNN -F 1 "SINE" H 4450 3050 60 0000 C CNN -F 2 "R1" H 4350 3100 60 0000 C CNN - 1 4650 3100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5900 3300 5900 3550 -Wire Wire Line - 5600 2650 5900 2650 -Connection ~ 5400 3550 -Wire Wire Line - 5400 3550 5400 3800 -Wire Wire Line - 5900 3550 4650 3550 -Wire Wire Line - 4650 2650 5100 2650 -Wire Wire Line - 5900 2650 5900 2900 -$Comp -L VPLOT8_1 U1 -U 2 1 519F22B7 -P 5900 2350 -F 0 "U1" H 5750 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 6050 2450 50 0000 C CNN - 2 5900 2350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 519F229B -P 5200 3550 -F 0 "#FLG1" H 5200 3820 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 3780 30 0000 C CNN - 1 5200 3550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR1 -U 1 1 519F2294 -P 5400 3800 -F 0 "#PWR1" H 5400 3800 30 0001 C CNN -F 1 "GND" H 5400 3730 30 0001 C CNN - 1 5400 3800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 519F228E -P 4650 2350 -F 0 "U1" H 4500 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 4800 2450 50 0000 C CNN - 1 4650 2350 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 519F2283 -P 5350 2650 -F 0 "R1" V 5430 2650 50 0000 C CNN -F 1 "1k" V 5350 2650 50 0000 C CNN - 1 5350 2650 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 519F227E -P 5900 3100 -F 0 "C1" H 5950 3200 50 0000 L CNN -F 1 "1u" H 5950 3000 50 0000 L CNN - 1 5900 3100 - -1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/RC/analysis b/OSCAD/Examples/RC/analysis deleted file mode 100644 index 4d26811..0000000 --- a/OSCAD/Examples/RC/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 5e-03 30e-03 0e-00
diff --git a/OSCAD/Examples/RC_ac/RC_ac-cache.bak b/OSCAD/Examples/RC_ac/RC_ac-cache.bak deleted file mode 100644 index 8073555..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac-cache.bak +++ /dev/null @@ -1,99 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 01:55:44 PM IST -#encoding utf-8 -# -# AC -# -DEF AC AC 0 40 Y Y 1 F N -F0 "AC" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/RC_ac/RC_ac-cache.lib b/OSCAD/Examples/RC_ac/RC_ac-cache.lib deleted file mode 100644 index 0dca988..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac-cache.lib +++ /dev/null @@ -1,99 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 01:59:22 PM IST -#encoding utf-8 -# -# AC -# -DEF AC AC 0 40 Y Y 1 F N -F0 "AC" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/RC_ac/RC_ac.bak b/OSCAD/Examples/RC_ac/RC_ac.bak deleted file mode 100644 index 037cb21..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.bak +++ /dev/null @@ -1,136 +0,0 @@ -EESchema Schematic File Version 2 date Friday 24 May 2013 01:55:44 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:RC_ac-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "24 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5900 3300 5900 3550 -Wire Wire Line - 5600 2650 5900 2650 -Connection ~ 4900 2650 -Connection ~ 5750 2650 -Connection ~ 5400 3550 -Wire Wire Line - 5400 3550 5400 3800 -Wire Wire Line - 5900 3550 4650 3550 -Wire Wire Line - 4650 2650 5100 2650 -Wire Wire Line - 5900 2650 5900 2900 -$Comp -L VPLOT8_1 U1 -U 2 1 519F22B7 -P 5750 2350 -F 0 "U1" H 5600 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 2450 50 0000 C CNN - 2 5750 2350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 519F229B -P 5400 3550 -F 0 "#FLG01" H 5400 3820 30 0001 C CNN -F 1 "PWR_FLAG" H 5400 3780 30 0000 C CNN - 1 5400 3550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 519F2294 -P 5400 3800 -F 0 "#PWR02" H 5400 3800 30 0001 C CNN -F 1 "GND" H 5400 3730 30 0001 C CNN - 1 5400 3800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 519F228E -P 4900 2350 -F 0 "U1" H 4750 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 5050 2450 50 0000 C CNN - 1 4900 2350 - 1 0 0 -1 -$EndComp -$Comp -L AC v1 -U 1 1 519F2287 -P 4650 3100 -F 0 "v1" H 4450 3200 60 0000 C CNN -F 1 "AC" H 4450 3050 60 0000 C CNN -F 2 "R1" H 4350 3100 60 0000 C CNN - 1 4650 3100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 519F2283 -P 5350 2650 -F 0 "R1" V 5430 2650 50 0000 C CNN -F 1 "R" V 5350 2650 50 0000 C CNN - 1 5350 2650 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 519F227E -P 5900 3100 -F 0 "C1" H 5950 3200 50 0000 L CNN -F 1 "C" H 5950 3000 50 0000 L CNN - 1 5900 3100 - -1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/RC_ac/RC_ac.cir b/OSCAD/Examples/RC_ac/RC_ac.cir deleted file mode 100644 index 5393d72..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.cir +++ /dev/null @@ -1,12 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 24 May 2013 01:58:56 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 1 3 VPLOT8_1 -v1 1 0 AC -R1 3 1 1k -C1 0 3 1u - -.end diff --git a/OSCAD/Examples/RC_ac/RC_ac.cir.ckt b/OSCAD/Examples/RC_ac/RC_ac.cir.ckt deleted file mode 100644 index 8cbaa41..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.cir.ckt +++ /dev/null @@ -1,10 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 01:58:56 pm ist
-
-* Plotting option vplot8_1
-v1 1 0 ac 2
-r1 3 1 1k
-c1 0 3 1u
-
-.ac lin 10 1Hz 10Meg
-.plot v(1) v(3)
-.end
diff --git a/OSCAD/Examples/RC_ac/RC_ac.cir.out b/OSCAD/Examples/RC_ac/RC_ac.cir.out deleted file mode 100644 index ad45dbf..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.cir.out +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 01:58:56 pm ist
-
-* Plotting option vplot8_1
-v1 1 0 ac 2
-r1 3 1 1k
-c1 0 3 1u
-
-.ac lin 10 1Hz 10Meg
-
-* Control Statements
-.control
-run
-plot v(1) v(3)
-.endc
-.end
diff --git a/OSCAD/Examples/RC_ac/RC_ac.pro b/OSCAD/Examples/RC_ac/RC_ac.pro deleted file mode 100644 index 270d2dd..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Friday 24 May 2013 01:49:03 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/RC_ac/RC_ac.proj b/OSCAD/Examples/RC_ac/RC_ac.proj deleted file mode 100644 index 3b990b8..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile RC_ac.sch diff --git a/OSCAD/Examples/RC_ac/RC_ac.sch b/OSCAD/Examples/RC_ac/RC_ac.sch deleted file mode 100644 index 8d14d8e..0000000 --- a/OSCAD/Examples/RC_ac/RC_ac.sch +++ /dev/null @@ -1,136 +0,0 @@ -EESchema Schematic File Version 2 date Friday 24 May 2013 01:59:22 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:RC_ac-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "24 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5900 3300 5900 3550 -Wire Wire Line - 5600 2650 5900 2650 -Connection ~ 4900 2650 -Connection ~ 5750 2650 -Connection ~ 5400 3550 -Wire Wire Line - 5400 3550 5400 3800 -Wire Wire Line - 5900 3550 4650 3550 -Wire Wire Line - 4650 2650 5100 2650 -Wire Wire Line - 5900 2650 5900 2900 -$Comp -L VPLOT8_1 U1 -U 2 1 519F22B7 -P 5750 2350 -F 0 "U1" H 5600 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 2450 50 0000 C CNN - 2 5750 2350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 519F229B -P 5400 3550 -F 0 "#FLG01" H 5400 3820 30 0001 C CNN -F 1 "PWR_FLAG" H 5400 3780 30 0000 C CNN - 1 5400 3550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 519F2294 -P 5400 3800 -F 0 "#PWR02" H 5400 3800 30 0001 C CNN -F 1 "GND" H 5400 3730 30 0001 C CNN - 1 5400 3800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 519F228E -P 4900 2350 -F 0 "U1" H 4750 2450 50 0000 C CNN -F 1 "VPLOT8_1" H 5050 2450 50 0000 C CNN - 1 4900 2350 - 1 0 0 -1 -$EndComp -$Comp -L AC v1 -U 1 1 519F2287 -P 4650 3100 -F 0 "v1" H 4450 3200 60 0000 C CNN -F 1 "AC" H 4450 3050 60 0000 C CNN -F 2 "R1" H 4350 3100 60 0000 C CNN - 1 4650 3100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 519F2283 -P 5350 2650 -F 0 "R1" V 5430 2650 50 0000 C CNN -F 1 "1k" V 5350 2650 50 0000 C CNN - 1 5350 2650 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 519F227E -P 5900 3100 -F 0 "C1" H 5950 3200 50 0000 L CNN -F 1 "1u" H 5950 3000 50 0000 L CNN - 1 5900 3100 - -1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/RC_ac/analysis b/OSCAD/Examples/RC_ac/analysis deleted file mode 100644 index 2f4e6f2..0000000 --- a/OSCAD/Examples/RC_ac/analysis +++ /dev/null @@ -1,2 +0,0 @@ - -.ac lin 10 1Hz 10Meg diff --git a/OSCAD/Examples/RC_pcb/$savepcb.000 b/OSCAD/Examples/RC_pcb/$savepcb.000 deleted file mode 100644 index 8c07ce1..0000000 --- a/OSCAD/Examples/RC_pcb/$savepcb.000 +++ /dev/null @@ -1,203 +0,0 @@ -PCBNEW-BOARD Version 1 date Thursday 16 May 2013 12:19:27 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 3 -NoConn 3 -Di -1875 -1494 1875 721 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 3 -Nnets 4 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "16 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 315 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000001" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 315 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000001" -AddNet "N-000003" -$EndNCLASS -$MODULE SIL-2 -Po 0 0 0 15 00200000 51947CAE ~~ -Li SIL-2 -Cd Connecteurs 2 pins -Kw CONN DEV -Sc 51947CAE -AR /51868B92 -Op 0 0 0 -T0 0 -1000 681 428 0 107 N V 21 N "P1" -T1 0 -1000 600 400 0 100 N I 21 N "CONN_2" -DS -1000 500 -1000 -500 120 21 -DS -1000 -500 1000 -500 120 21 -DS 1000 -500 1000 500 120 21 -DS 1000 500 -1000 500 120 21 -$PAD -Sh "1" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 500 0 -$EndPAD -$EndMODULE SIL-2 -$MODULE R3 -Po 0 0 0 15 00200000 51947CAF ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 51947CAF -AR /51863417 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R1" -T1 0 0 550 500 0 80 N I 21 N "1k" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE C1 -Po 0 0 0 15 3F92C496 51947CB0 ~~ -Li C1 -Cd Condensateur e = 1 pas -Kw C -Sc 51947CB0 -AR /5186342E -Op 0 0 0 -T0 100 -900 400 400 0 80 N V 21 N "C1" -T1 0 -900 400 400 0 80 N I 21 N "1u" -DS -980 -500 1000 -500 120 21 -DS 1000 -500 1000 500 120 21 -DS 1000 500 -1000 500 120 21 -DS -1000 500 -1000 -500 120 21 -DS -1000 -250 -750 -500 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/capa_1_pas.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE C1 -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/RC_pcb/$savepcb.brd b/OSCAD/Examples/RC_pcb/$savepcb.brd deleted file mode 100644 index 22858c3..0000000 --- a/OSCAD/Examples/RC_pcb/$savepcb.brd +++ /dev/null @@ -1,203 +0,0 @@ -PCBNEW-BOARD Version 1 date Thursday 16 May 2013 12:56:45 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 3 -NoConn 3 -Di -1875 -1494 1875 721 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 3 -Nnets 4 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "16 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 315 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000001" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 315 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000001" -AddNet "N-000003" -$EndNCLASS -$MODULE SIL-2 -Po 0 0 0 15 00200000 51947CAE ~~ -Li SIL-2 -Cd Connecteurs 2 pins -Kw CONN DEV -Sc 51947CAE -AR /51868B92 -Op 0 0 0 -T0 0 -1000 681 428 0 107 N V 21 N "P1" -T1 0 -1000 600 400 0 100 N I 21 N "CONN_2" -DS -1000 500 -1000 -500 120 21 -DS -1000 -500 1000 -500 120 21 -DS 1000 -500 1000 500 120 21 -DS 1000 500 -1000 500 120 21 -$PAD -Sh "1" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 500 0 -$EndPAD -$EndMODULE SIL-2 -$MODULE R3 -Po 0 0 0 15 00200000 51947CAF ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 51947CAF -AR /51863417 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R1" -T1 0 0 550 500 0 80 N I 21 N "1k" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE C1 -Po 0 0 0 15 3F92C496 51947CB0 ~~ -Li C1 -Cd Condensateur e = 1 pas -Kw C -Sc 51947CB0 -AR /5186342E -Op 0 0 0 -T0 100 -900 400 400 0 80 N V 21 N "C1" -T1 0 -900 400 400 0 80 N I 21 N "1u" -DS -980 -500 1000 -500 120 21 -DS 1000 -500 1000 500 120 21 -DS 1000 500 -1000 500 120 21 -DS -1000 500 -1000 -500 120 21 -DS -1000 -250 -750 -500 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/capa_1_pas.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE C1 -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/RC_pcb/RC-SilkS_Back.gbo b/OSCAD/Examples/RC_pcb/RC-SilkS_Back.gbo deleted file mode 100644 index 9f1f35b..0000000 --- a/OSCAD/Examples/RC_pcb/RC-SilkS_Back.gbo +++ /dev/null @@ -1,12 +0,0 @@ -G04 (created by PCBNEW-RS274X (2011-05-25)-stable) date Sunday 05 May 2013 10:21:02 PM IST* -G01* -G70* -G90* -%MOIN*% -G04 Gerber Fmt 3.4, Leading zero omitted, Abs format* -%FSLAX34Y34*% -G04 APERTURE LIST* -%ADD10C,0.006000*% -G04 APERTURE END LIST* -G54D10* -M02* diff --git a/OSCAD/Examples/RC_pcb/RC-SilkS_Front.gto b/OSCAD/Examples/RC_pcb/RC-SilkS_Front.gto deleted file mode 100644 index 95cd1a3..0000000 --- a/OSCAD/Examples/RC_pcb/RC-SilkS_Front.gto +++ /dev/null @@ -1,113 +0,0 @@ -G04 (created by PCBNEW-RS274X (2011-05-25)-stable) date Sunday 05 May 2013 10:21:02 PM IST* -G01* -G70* -G90* -%MOIN*% -G04 Gerber Fmt 3.4, Leading zero omitted, Abs format* -%FSLAX34Y34*% -G04 APERTURE LIST* -%ADD10C,0.006000*% -%ADD11C,0.012000*% -%ADD12C,0.010700*% -%ADD13C,0.008000*% -G04 APERTURE END LIST* -G54D10* -G54D11* -X61500Y-38000D02* -X60500Y-38000D01* -X60500Y-38000D02* -X60500Y-36000D01* -X60500Y-36000D02* -X61500Y-36000D01* -X61500Y-36000D02* -X61500Y-38000D01* -X57000Y-35500D02* -X57200Y-35500D01* -X60000Y-35500D02* -X59800Y-35500D01* -X59800Y-35500D02* -X59800Y-35100D01* -X59800Y-35100D02* -X57200Y-35100D01* -X57200Y-35100D02* -X57200Y-35900D01* -X57200Y-35900D02* -X59800Y-35900D01* -X59800Y-35900D02* -X59800Y-35500D01* -X57200Y-35300D02* -X57400Y-35100D01* -X56520Y-37000D02* -X58500Y-37000D01* -X58500Y-37000D02* -X58500Y-38000D01* -X58500Y-38000D02* -X56500Y-38000D01* -X56500Y-38000D02* -X56500Y-37000D01* -X56500Y-37250D02* -X56750Y-37000D01* -G54D12* -X60275Y-37316D02* -X59594Y-37316D01* -X59594Y-37153D01* -X59627Y-37112D01* -X59659Y-37092D01* -X59724Y-37072D01* -X59821Y-37072D01* -X59886Y-37092D01* -X59918Y-37112D01* -X59951Y-37153D01* -X59951Y-37316D01* -X60275Y-36664D02* -X60275Y-36908D01* -X60275Y-36786D02* -X59594Y-36786D01* -X59691Y-36827D01* -X59756Y-36868D01* -X59789Y-36908D01* -G54D13* -X58417Y-35723D02* -X58250Y-35461D01* -X58131Y-35723D02* -X58131Y-35173D01* -X58322Y-35173D01* -X58369Y-35199D01* -X58393Y-35225D01* -X58417Y-35277D01* -X58417Y-35356D01* -X58393Y-35408D01* -X58369Y-35435D01* -X58322Y-35461D01* -X58131Y-35461D01* -X58893Y-35723D02* -X58607Y-35723D01* -X58750Y-35723D02* -X58750Y-35173D01* -X58702Y-35251D01* -X58655Y-35304D01* -X58607Y-35330D01* -X57534Y-36724D02* -X57515Y-36743D01* -X57458Y-36762D01* -X57420Y-36762D01* -X57362Y-36743D01* -X57324Y-36705D01* -X57305Y-36667D01* -X57286Y-36590D01* -X57286Y-36533D01* -X57305Y-36457D01* -X57324Y-36419D01* -X57362Y-36381D01* -X57420Y-36362D01* -X57458Y-36362D01* -X57515Y-36381D01* -X57534Y-36400D01* -X57915Y-36762D02* -X57686Y-36762D01* -X57800Y-36762D02* -X57800Y-36362D01* -X57762Y-36419D01* -X57724Y-36457D01* -X57686Y-36476D01* -M02* diff --git a/OSCAD/Examples/RC_pcb/RC_pcb-Back.gbl b/OSCAD/Examples/RC_pcb/RC_pcb-Back.gbl deleted file mode 100644 index 020cb57..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb-Back.gbl +++ /dev/null @@ -1,30 +0,0 @@ -G04 (created by PCBNEW-RS274X (2011-05-25)-stable) date Sunday 05 May 2013 10:21:02 PM IST* -G01* -G70* -G90* -%MOIN*% -G04 Gerber Fmt 3.4, Leading zero omitted, Abs format* -%FSLAX34Y34*% -G04 APERTURE LIST* -%ADD10C,0.006000*% -%ADD11R,0.055000X0.055000*% -%ADD12C,0.055000*% -%ADD13C,0.031500*% -G04 APERTURE END LIST* -G54D10* -G54D11* -X61000Y-37500D03* -G54D12* -X61000Y-36500D03* -X57000Y-35500D03* -X60000Y-35500D03* -X57000Y-37500D03* -X58000Y-37500D03* -G54D13* -X58000Y-37500D02* -X61000Y-37500D01* -X57000Y-35500D02* -X57000Y-37500D01* -X60000Y-35500D02* -X61000Y-36500D01* -M02* diff --git a/OSCAD/Examples/RC_pcb/RC_pcb-Front.gtl b/OSCAD/Examples/RC_pcb/RC_pcb-Front.gtl deleted file mode 100644 index 3f06326..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb-Front.gtl +++ /dev/null @@ -1,22 +0,0 @@ -G04 (created by PCBNEW-RS274X (2011-05-25)-stable) date Sunday 05 May 2013 10:21:02 PM IST* -G01* -G70* -G90* -%MOIN*% -G04 Gerber Fmt 3.4, Leading zero omitted, Abs format* -%FSLAX34Y34*% -G04 APERTURE LIST* -%ADD10C,0.006000*% -%ADD11R,0.055000X0.055000*% -%ADD12C,0.055000*% -G04 APERTURE END LIST* -G54D10* -G54D11* -X61000Y-37500D03* -G54D12* -X61000Y-36500D03* -X57000Y-35500D03* -X60000Y-35500D03* -X57000Y-37500D03* -X58000Y-37500D03* -M02* diff --git a/OSCAD/Examples/RC_pcb/RC_pcb-cache.bak b/OSCAD/Examples/RC_pcb/RC_pcb-cache.bak deleted file mode 100644 index 3b20495..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb-cache.bak +++ /dev/null @@ -1,75 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 12:09:45 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# CONN_2 -# -DEF CONN_2 P 0 40 Y N 1 F N -F0 "P" -50 0 40 V V C CNN -F1 "CONN_2" 50 0 40 V V C CNN -DRAW -S -100 150 100 -150 0 1 0 N -X P1 1 -350 100 250 R 60 60 1 1 P I -X PM 2 -350 -100 250 R 60 60 1 1 P I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/RC_pcb/RC_pcb-cache.lib b/OSCAD/Examples/RC_pcb/RC_pcb-cache.lib deleted file mode 100644 index a8a529e..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb-cache.lib +++ /dev/null @@ -1,75 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 06:47:37 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# CONN_2 -# -DEF CONN_2 P 0 40 Y N 1 F N -F0 "P" -50 0 40 V V C CNN -F1 "CONN_2" 50 0 40 V V C CNN -DRAW -S -100 150 100 -150 0 1 0 N -X P1 1 -350 100 250 R 60 60 1 1 P I -X PM 2 -350 -100 250 R 60 60 1 1 P I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.bak b/OSCAD/Examples/RC_pcb/RC_pcb.bak deleted file mode 100644 index 7ad2473..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.bak +++ /dev/null @@ -1,125 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 14 May 2013 12:09:45 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:RC-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6100 2200 6100 2050 -Wire Wire Line - 4900 2600 4900 3050 -Connection ~ 6100 2050 -Connection ~ 5550 3050 -Wire Wire Line - 5550 3050 5550 3200 -Wire Wire Line - 6100 2600 6100 3050 -Wire Wire Line - 6100 3050 4900 3050 -Wire Wire Line - 5400 2050 5400 2000 -Wire Wire Line - 5400 2000 4900 2000 -Wire Wire Line - 6100 2050 5900 2050 -Wire Wire Line - 5400 2900 5400 3050 -Connection ~ 5400 3050 -Wire Wire Line - 4900 2000 4900 2400 -$Comp -L CONN_2 P1 -U 1 1 51868B92 -P 4550 2500 -F 0 "P1" V 4500 2500 40 0000 C CNN -F 1 "CONN_2" V 4600 2500 40 0000 C CNN - 1 4550 2500 - -1 0 0 1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 51863585 -P 5400 2900 -F 0 "#FLG01" H 5400 3170 30 0001 C CNN -F 1 "PWR_FLAG" H 5400 3130 30 0000 C CNN - 1 5400 2900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5186344D -P 5550 3200 -F 0 "#PWR02" H 5550 3200 30 0001 C CNN -F 1 "GND" H 5550 3130 30 0001 C CNN - 1 5550 3200 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 5186342E -P 6100 2400 -F 0 "C1" H 6150 2500 50 0000 L CNN -F 1 "1u" H 6150 2300 50 0000 L CNN - 1 6100 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 51863417 -P 5650 2050 -F 0 "R1" V 5730 2050 50 0000 C CNN -F 1 "1k" V 5650 2050 50 0000 C CNN - 1 5650 2050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.brd b/OSCAD/Examples/RC_pcb/RC_pcb.brd deleted file mode 100644 index 335c0b9..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.brd +++ /dev/null @@ -1,225 +0,0 @@ -PCBNEW-BOARD Version 1 date Sunday 05 May 2013 10:20:45 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 3 -NoConn 0 -Di 55424 33924 63076 39076 -Ndraw 4 -Ntrack 3 -Nzone 0 -BoardThickness 630 -Nmodule 3 -Nnets 4 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "5 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 315 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000001" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 315 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000001" -AddNet "N-000003" -$EndNCLASS -$MODULE SIL-2 -Po 61000 37000 900 15 00200000 51868CE1 ~~ -Li SIL-2 -Cd Connecteurs 2 pins -Kw CONN DEV -Sc 51868CE1 -AR /51868B92 -Op 0 0 0 -T0 0 -1000 681 428 900 107 N V 21 N "P1" -T1 0 -1000 600 400 900 100 N I 21 N "CONN_2" -DS -1000 500 -1000 -500 120 21 -DS -1000 -500 1000 -500 120 21 -DS 1000 -500 1000 500 120 21 -DS 1000 500 -1000 500 120 21 -$PAD -Sh "1" R 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 500 0 -$EndPAD -$EndMODULE SIL-2 -$MODULE R3 -Po 58500 35500 0 15 00200000 51868CE2 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 51868CE2 -AR /51863417 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R1" -T1 0 0 550 500 0 80 N I 21 N "1k" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE C1 -Po 57500 37500 0 15 3F92C496 51868CE3 ~~ -Li C1 -Cd Condensateur e = 1 pas -Kw C -Sc 51868CE3 -AR /5186342E -Op 0 0 0 -T0 100 -900 400 400 0 80 N V 21 N "C1" -T1 0 -900 400 400 0 80 N I 21 N "1u" -DS -980 -500 1000 -500 120 21 -DS 1000 -500 1000 500 120 21 -DS 1000 500 -1000 500 120 21 -DS -1000 500 -1000 -500 120 21 -DS -1000 -250 -750 -500 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/capa_1_pas.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE C1 -$DRAWSEGMENT -Po 0 55500 39000 55500 34000 150 -De 28 0 900 0 0 -$EndDRAWSEGMENT -$DRAWSEGMENT -Po 0 63000 39000 55500 39000 150 -De 28 0 900 0 0 -$EndDRAWSEGMENT -$DRAWSEGMENT -Po 0 63000 34000 63000 39000 150 -De 28 0 900 0 0 -$EndDRAWSEGMENT -$DRAWSEGMENT -Po 0 55500 34000 63000 34000 150 -De 28 0 900 0 0 -$EndDRAWSEGMENT -$TRACK -Po 0 58000 37500 61000 37500 315 -1 -De 0 0 1 0 C00000 -Po 0 57000 35500 57000 37500 315 -1 -De 0 0 2 0 C00000 -Po 0 60000 35500 61000 36500 315 -1 -De 0 0 3 0 C00000 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.cir.ckt.sol b/OSCAD/Examples/RC_pcb/RC_pcb.cir.ckt.sol deleted file mode 100644 index 29b1351..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.cir.ckt.sol +++ /dev/null @@ -1,6 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -V 1 0 0.0000000000 0.0000000000 -C 3 0 0.0000000000 0.0000000000 -I 0 3 -0.0000000000 0.0000000000 -R 3 1 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.cmp b/OSCAD/Examples/RC_pcb/RC_pcb.cmp deleted file mode 100644 index 14cc046..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.cmp +++ /dev/null @@ -1,24 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Thursday 16 May 2013 01:22:40 AM IST - -BeginCmp -TimeStamp = /5186342E; -Reference = C1; -ValeurCmp = 1u; -IdModule = C1; -EndCmp - -BeginCmp -TimeStamp = /51868B92; -Reference = P1; -ValeurCmp = CONN_2; -IdModule = SIL-2; -EndCmp - -BeginCmp -TimeStamp = /51863417; -Reference = R1; -ValeurCmp = 1k; -IdModule = R3; -EndCmp - -EndListe diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.net b/OSCAD/Examples/RC_pcb/RC_pcb.net deleted file mode 100644 index 1cda301..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.net +++ /dev/null @@ -1,30 +0,0 @@ -# EESchema Netlist Version 1.1 created Thursday 16 May 2013 01:22:40 AM IST -( - ( /5186342E C1 C1 1u - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /51868B92 SIL-2 P1 CONN_2 - ( 1 GND ) - ( 2 N-000003 ) - ) - ( /51863417 R3 R1 1k - ( 1 N-000001 ) - ( 2 N-000003 ) - ) -) -* -{ Allowed footprints by component: -$component C1 - SM* - C? - C1-1 -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.pro b/OSCAD/Examples/RC_pcb/RC_pcb.pro deleted file mode 100644 index 952e2e1..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 13 May 2013 07:10:16 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/rakhi/OSCAD/library/analogSpice -LibName32=/home/rakhi/OSCAD/library/analogXSpice -LibName33=/home/rakhi/OSCAD/library/convergenceAidSpice -LibName34=/home/rakhi/OSCAD/library/converterSpice -LibName35=/home/rakhi/OSCAD/library/digitalSpice -LibName36=/home/rakhi/OSCAD/library/digitalXSpice -LibName37=/home/rakhi/OSCAD/library/linearSpice -LibName38=/home/rakhi/OSCAD/library/measurementSpice -LibName39=/home/rakhi/OSCAD/library/portSpice -LibName40=/home/rakhi/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.proj b/OSCAD/Examples/RC_pcb/RC_pcb.proj deleted file mode 100644 index 396e6d0..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile RC.sch diff --git a/OSCAD/Examples/RC_pcb/RC_pcb.sch b/OSCAD/Examples/RC_pcb/RC_pcb.sch deleted file mode 100644 index 8661fb3..0000000 --- a/OSCAD/Examples/RC_pcb/RC_pcb.sch +++ /dev/null @@ -1,123 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 06:47:37 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:RC-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 4900 2050 5400 2050 -Wire Wire Line - 4900 2050 4900 2400 -Connection ~ 5400 3050 -Wire Wire Line - 5400 2900 5400 3050 -Wire Wire Line - 5900 2050 6100 2050 -Wire Wire Line - 6100 3050 4900 3050 -Wire Wire Line - 6100 3050 6100 2600 -Wire Wire Line - 5550 3050 5550 3200 -Connection ~ 5550 3050 -Connection ~ 6100 2050 -Wire Wire Line - 4900 3050 4900 2600 -Wire Wire Line - 6100 2050 6100 2200 -$Comp -L CONN_2 P1 -U 1 1 51868B92 -P 4550 2500 -F 0 "P1" V 4500 2500 40 0000 C CNN -F 1 "CONN_2" V 4600 2500 40 0000 C CNN - 1 4550 2500 - -1 0 0 1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 51863585 -P 5400 2900 -F 0 "#FLG01" H 5400 3170 30 0001 C CNN -F 1 "PWR_FLAG" H 5400 3130 30 0000 C CNN - 1 5400 2900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5186344D -P 5550 3200 -F 0 "#PWR02" H 5550 3200 30 0001 C CNN -F 1 "GND" H 5550 3130 30 0001 C CNN - 1 5550 3200 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 5186342E -P 6100 2400 -F 0 "C1" H 6150 2500 50 0000 L CNN -F 1 "1u" H 6150 2300 50 0000 L CNN - 1 6100 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 51863417 -P 5650 2050 -F 0 "R1" V 5730 2050 50 0000 C CNN -F 1 "1k" V 5650 2050 50 0000 C CNN - 1 5650 2050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/bridgeRectifier/$savepcb.000 b/OSCAD/Examples/bridgeRectifier/$savepcb.000 deleted file mode 100644 index 5b76389..0000000 --- a/OSCAD/Examples/bridgeRectifier/$savepcb.000 +++ /dev/null @@ -1,366 +0,0 @@ -PCBNEW-BOARD Version 1 date Thursday 04 October 2012 12:22:20 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 8 -NoConn 2 -Di 39125 25379 49041 30735 -Ndraw 0 -Ntrack 13 -Nzone 0 -BoardThickness 630 -Nmodule 6 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "4 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000002" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000002" -AddNet "N-000003" -AddNet "N-000004" -$EndNCLASS -$MODULE R3 -Po 46500 30000 1800 15 00200000 506D2FD9 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 506D2FD9 -AR /506BDD54 -Op 0 A 0 -T0 0 0 550 500 1800 80 N V 21 N "R1" -T1 0 0 550 500 1800 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R1 -Po 41500 30000 1800 15 00200000 506D2FDA ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 506D2FDA -AR /506BDD71 -Op A A 0 -T0 -400 1000 550 500 1800 80 N V 21 N "V1" -T1 -450 1000 550 500 1800 80 N I 21 N "SINE" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE D3 -Po 46500 28000 0 15 00200000 506D2FDB ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDB -AR /506BDD23 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D1" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 46500 26000 0 15 00200000 506D2FDD ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDD -AR /506BDD29 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D2" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 41000 28000 0 15 00200000 506D2FDF ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDF -AR /506BDD38 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D3" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 41000 26000 0 15 00200000 506D31A5 ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D31A5 -AR /506BDD2F -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D4" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$TRACK -Po 0 39500 28000 39500 26000 80 -1 -De 0 0 1 0 C00000 -Po 0 42500 26000 45000 26000 80 -1 -De 0 0 2 0 C00000 -Po 0 42500 28000 45000 28000 80 -1 -De 0 0 3 0 C00000 -Po 0 42000 30000 42500 30000 80 -1 -De 0 0 3 0 400000 -Po 0 43000 28500 42500 28000 80 -1 -De 0 0 3 0 800000 -Po 0 43000 29500 43000 28500 80 -1 -De 0 0 3 0 0 -Po 0 42500 30000 43000 29500 80 -1 -De 0 0 3 0 0 -Po 0 49000 27000 49000 29000 80 -1 -De 0 0 4 0 0 -Po 0 49000 29000 48000 30000 80 -1 -De 0 0 4 0 800000 -Po 0 48000 26000 48500 26000 80 -1 -De 0 0 4 0 400000 -Po 0 49000 27000 48000 28000 80 -1 -De 0 0 4 0 800000 -Po 0 49000 26500 49000 27000 80 -1 -De 0 0 4 0 0 -Po 0 48500 26000 49000 26500 80 -1 -De 0 0 4 0 0 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/bridgeRectifier/$savepcb.brd b/OSCAD/Examples/bridgeRectifier/$savepcb.brd deleted file mode 100644 index 309f60a..0000000 --- a/OSCAD/Examples/bridgeRectifier/$savepcb.brd +++ /dev/null @@ -1,374 +0,0 @@ -PCBNEW-BOARD Version 1 date Wednesday 21 November 2012 12:10:28 AM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 8 -NoConn 0 -Di 39125 25379 48489 31041 -Ndraw 0 -Ntrack 17 -Nzone 0 -BoardThickness 630 -Nmodule 6 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "20 nov 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 38500 31500 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000002" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000002" -AddNet "N-000003" -AddNet "N-000004" -$EndNCLASS -$MODULE R3 -Po 46500 30000 1800 15 00200000 506D2FD9 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 506D2FD9 -AR /506BDD54 -Op 0 A 0 -T0 0 0 550 500 1800 80 N V 21 N "R1" -T1 0 0 550 500 1800 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R1 -Po 41500 30000 1800 15 00200000 506D2FDA ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 506D2FDA -AR /506BDD71 -Op A A 0 -T0 -400 1000 550 500 1800 80 N V 21 N "V1" -T1 -450 1000 550 500 1800 80 N I 21 N "SINE" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE D3 -Po 46500 28000 0 15 00200000 506D2FDB ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDB -AR /506BDD23 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D1" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 46500 26000 0 15 00200000 506D2FDD ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDD -AR /506BDD29 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D2" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 41000 28000 0 15 00200000 506D2FDF ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDF -AR /506BDD38 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D3" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 41000 26000 0 15 00200000 506D31A5 F~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D31A5 -AR /506BDD2F -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D4" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$TRACK -Po 0 39500 28000 39500 26000 80 -1 -De 0 0 1 0 C00000 -Po 0 45000 30000 44000 30000 80 -1 -De 0 0 1 0 400000 -Po 0 44000 30000 43000 31000 80 -1 -De 0 0 1 0 0 -Po 0 43000 31000 40500 31000 80 -1 -De 0 0 1 0 0 -Po 0 40500 31000 39500 30000 80 -1 -De 0 0 1 0 0 -Po 0 39500 30000 39500 28000 80 -1 -De 0 0 1 0 800000 -Po 0 41000 30000 41000 27000 80 -1 -De 0 0 2 0 400000 -Po 0 42000 26000 42500 26000 80 -1 -De 0 0 2 0 800000 -Po 0 41000 27000 42000 26000 80 -1 -De 0 0 2 0 0 -Po 0 42500 26000 45000 26000 80 -1 -De 0 0 2 0 C00000 -Po 0 42500 28000 45000 28000 80 -1 -De 0 0 3 0 C00000 -Po 0 42000 30000 42500 30000 80 -1 -De 0 0 3 0 400000 -Po 0 43000 28500 42500 28000 80 -1 -De 0 0 3 0 800000 -Po 0 43000 29500 43000 28500 80 -1 -De 0 0 3 0 0 -Po 0 42500 30000 43000 29500 80 -1 -De 0 0 3 0 0 -Po 0 48000 28000 48000 30000 80 -1 -De 0 0 4 0 C00000 -Po 0 48000 26000 48000 28000 80 -1 -De 0 0 4 0 C00000 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/bridgeRectifier/1n4007.lib b/OSCAD/Examples/bridgeRectifier/1n4007.lib deleted file mode 100644 index 89d421d..0000000 --- a/OSCAD/Examples/bridgeRectifier/1n4007.lib +++ /dev/null @@ -1,2 +0,0 @@ -.model 1n4007 D( IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 BV=1000 IBV=5e-08 CJO=1E-11 -+VJ=0.7 M=0.5 FC=0.5 TT=1E-07 KF=0 AF=1 ) diff --git a/OSCAD/Examples/bridgeRectifier/1n4148.lib b/OSCAD/Examples/bridgeRectifier/1n4148.lib deleted file mode 100755 index b32fdf8..0000000 --- a/OSCAD/Examples/bridgeRectifier/1n4148.lib +++ /dev/null @@ -1,2 +0,0 @@ -.model 1n4148 D( Is=2.495E-09 Rs=4.755E-01 n=1.679 tt=3.030E-09 Cjo=1.700E-12 M=1.959E-01 -+ Vj=1 Bv=1.000E+02 ibv=1.000E-04 ) diff --git a/OSCAD/Examples/bridgeRectifier/analysis b/OSCAD/Examples/bridgeRectifier/analysis deleted file mode 100644 index 888b3aa..0000000 --- a/OSCAD/Examples/bridgeRectifier/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 100e-06 40e-03 0e-00 diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier-cache.bak b/OSCAD/Examples/bridgeRectifier/bridgeRectifier-cache.bak deleted file mode 100644 index 0103c9f..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier-cache.bak +++ /dev/null @@ -1,106 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 10:56:29 AM IST -#encoding utf-8 -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier-cache.lib b/OSCAD/Examples/bridgeRectifier/bridgeRectifier-cache.lib deleted file mode 100644 index 0e9344f..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier-cache.lib +++ /dev/null @@ -1,106 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 12:01:58 PM IST -#encoding utf-8 -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.bak b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.bak deleted file mode 100644 index 542665c..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.bak +++ /dev/null @@ -1,203 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 10:56:29 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:bridgeRectifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6600 4000 4900 4000 -Wire Wire Line - 6600 4000 6600 3550 -Connection ~ 6300 2600 -Wire Wire Line - 6600 2950 6600 2600 -Wire Wire Line - 6600 2600 4900 2600 -Connection ~ 5150 3350 -Wire Wire Line - 5150 2450 5150 3350 -Connection ~ 5950 4000 -Wire Wire Line - 5950 4000 5950 3700 -Connection ~ 4900 3200 -Wire Wire Line - 4900 3200 4650 3200 -Wire Wire Line - 4650 3200 4650 2650 -Wire Wire Line - 4650 2650 4400 2650 -Wire Wire Line - 4400 2650 4400 2850 -Connection ~ 5500 2600 -Wire Wire Line - 5500 3150 5500 3400 -Wire Wire Line - 4900 3400 4900 3150 -Wire Wire Line - 4900 2600 4900 2750 -Wire Wire Line - 5500 2600 5500 2750 -Wire Wire Line - 4900 4000 4900 3800 -Wire Wire Line - 5500 4000 5500 3800 -Wire Wire Line - 6300 4000 6300 3500 -Connection ~ 5500 4000 -Wire Wire Line - 4400 3750 4400 3950 -Wire Wire Line - 4400 3950 4650 3950 -Wire Wire Line - 4650 3950 4650 3350 -Wire Wire Line - 4650 3350 5500 3350 -Connection ~ 5500 3350 -Wire Wire Line - 5650 4000 5650 4200 -Connection ~ 5650 4000 -Wire Wire Line - 6300 2600 6300 3000 -Wire Wire Line - 4550 2450 4550 2650 -Connection ~ 4550 2650 -Connection ~ 6300 4000 -$Comp -L VPLOT8 U1 -U 2 1 50C41A9A -P 6600 3250 -F 0 "U1" H 6450 3350 50 0000 C CNN -F 1 "VPLOT8" H 6750 3350 50 0000 C CNN - 2 6600 3250 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8 U1 -U 1 1 50C41A90 -P 4850 2450 -F 0 "U1" H 4700 2550 50 0000 C CNN -F 1 "VPLOT8" H 5000 2550 50 0000 C CNN - 1 4850 2450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 506BDF52 -P 5950 3700 -F 0 "#FLG01" H 5950 3970 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 3930 30 0000 C CNN - 1 5950 3700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 506BDF42 -P 5650 4200 -F 0 "#PWR02" H 5650 4200 30 0001 C CNN -F 1 "GND" H 5650 4130 30 0001 C CNN - 1 5650 4200 - 1 0 0 -1 -$EndComp -$Comp -L SINE V1 -U 1 1 506BDD71 -P 4400 3300 -F 0 "V1" H 4200 3400 60 0000 C CNN -F 1 "SINE" H 4200 3250 60 0000 C CNN -F 2 "R1" H 4100 3300 60 0000 C CNN - 1 4400 3300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 506BDD54 -P 6300 3250 -F 0 "R1" V 6380 3250 50 0000 C CNN -F 1 "1000" V 6300 3250 50 0000 C CNN - 1 6300 3250 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D3 -U 1 1 506BDD38 -P 4900 3600 -F 0 "D3" H 4900 3700 40 0000 C CNN -F 1 "1n4007" H 4900 3500 40 0000 C CNN - 1 4900 3600 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D4 -U 1 1 506BDD2F -P 5500 3600 -F 0 "D4" H 5500 3700 40 0000 C CNN -F 1 "1n4007" H 5500 3500 40 0000 C CNN - 1 5500 3600 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D2 -U 1 1 506BDD29 -P 5500 2950 -F 0 "D2" H 5500 3050 40 0000 C CNN -F 1 "1n4007" H 5500 2850 40 0000 C CNN - 1 5500 2950 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 506BDD23 -P 4900 2950 -F 0 "D1" H 4900 3050 40 0000 C CNN -F 1 "1n4007" H 4900 2850 40 0000 C CNN - 1 4900 2950 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.brd b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.brd deleted file mode 100644 index 1f56fcf..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.brd +++ /dev/null @@ -1,374 +0,0 @@ -PCBNEW-BOARD Version 1 date Thursday 04 October 2012 12:24:14 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 8 -NoConn 0 -Di 39125 25379 48489 31041 -Ndraw 0 -Ntrack 17 -Nzone 0 -BoardThickness 630 -Nmodule 6 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "4 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000002" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000002" -AddNet "N-000003" -AddNet "N-000004" -$EndNCLASS -$MODULE R3 -Po 46500 30000 1800 15 00200000 506D2FD9 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 506D2FD9 -AR /506BDD54 -Op 0 A 0 -T0 0 0 550 500 1800 80 N V 21 N "R1" -T1 0 0 550 500 1800 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R1 -Po 41500 30000 1800 15 00200000 506D2FDA ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 506D2FDA -AR /506BDD71 -Op A A 0 -T0 -400 1000 550 500 1800 80 N V 21 N "V1" -T1 -450 1000 550 500 1800 80 N I 21 N "SINE" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE D3 -Po 46500 28000 0 15 00200000 506D2FDB ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDB -AR /506BDD23 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D1" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 46500 26000 0 15 00200000 506D2FDD ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDD -AR /506BDD29 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D2" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 41000 28000 0 15 00200000 506D2FDF ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D2FDF -AR /506BDD38 -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D3" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$MODULE D3 -Po 41000 26000 0 15 00200000 506D31A5 ~~ -Li D3 -Cd Diode 3 pas -Kw DIODE DEV -Sc 506D31A5 -AR /506BDD2F -Op 0 0 0 -T0 0 0 400 400 0 80 N V 21 N "D4" -T1 0 0 400 400 0 80 N I 21 N "DIODE" -DS 1500 0 1200 0 120 21 -DS 1200 0 1200 -400 120 21 -DS 1200 -400 -1200 -400 120 21 -DS -1200 -400 -1200 0 120 21 -DS -1200 0 -1500 0 120 21 -DS -1200 0 -1200 400 120 21 -DS -1200 400 1200 400 120 21 -DS 1200 400 1200 0 120 21 -DS 1000 -400 1000 400 120 21 -DS 900 400 900 -400 120 21 -$PAD -Sh "2" R 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 1500 0 -$EndPAD -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po -1500 0 -$EndPAD -$SHAPE3D -Na "discret/diode.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE D3 -$TRACK -Po 0 45000 30000 44000 30000 80 -1 -De 0 0 1 0 400000 -Po 0 39500 30000 39500 28000 80 -1 -De 0 0 1 0 800000 -Po 0 40500 31000 39500 30000 80 -1 -De 0 0 1 0 0 -Po 0 43000 31000 40500 31000 80 -1 -De 0 0 1 0 0 -Po 0 44000 30000 43000 31000 80 -1 -De 0 0 1 0 0 -Po 0 39500 28000 39500 26000 80 -1 -De 0 0 1 0 C00000 -Po 0 41000 30000 41000 27000 80 -1 -De 0 0 2 0 400000 -Po 0 42000 26000 42500 26000 80 -1 -De 0 0 2 0 800000 -Po 0 41000 27000 42000 26000 80 -1 -De 0 0 2 0 0 -Po 0 42500 26000 45000 26000 80 -1 -De 0 0 2 0 C00000 -Po 0 42500 28000 45000 28000 80 -1 -De 0 0 3 0 C00000 -Po 0 42000 30000 42500 30000 80 -1 -De 0 0 3 0 400000 -Po 0 43000 28500 42500 28000 80 -1 -De 0 0 3 0 800000 -Po 0 43000 29500 43000 28500 80 -1 -De 0 0 3 0 0 -Po 0 42500 30000 43000 29500 80 -1 -De 0 0 3 0 0 -Po 0 48000 28000 48000 30000 80 -1 -De 0 0 4 0 C00000 -Po 0 48000 26000 48000 28000 80 -1 -De 0 0 4 0 C00000 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir deleted file mode 100644 index 4eab418..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 12:01:55 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 3 4 1 0 VPLOT8 -V1 3 1 SINE -R1 4 0 1000 -D3 0 3 1n4007 -D4 0 1 1n4007 -D2 1 4 1n4007 -D1 3 4 1n4007 - -.end diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt deleted file mode 100644 index 2ac10e3..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 12:01:55 pm ist -.include 1n4007.lib - -v1 3 1 sine(0 5 50 0 0) -r1 4 0 1000 -d3 0 3 1n4007 -d4 0 1 1n4007 -d2 1 4 1n4007 -d1 3 4 1n4007 - -.tran 100e-06 40e-03 0e-00 -.plot v(3)-v(1) v(4) -.end diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt.sol b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt.sol deleted file mode 100644 index d25e686..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.ckt.sol +++ /dev/null @@ -1,8 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -V 3 1 0.0000000000 0.0000000000 -R 4 0 0.0000000000 0.0000000000 -D 0 3 -0.0000000000 0.0000000000 -D 0 1 -0.0000000000 0.0000000000 -D 1 4 0.0000000000 0.0000000000 -D 3 4 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.out b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.out deleted file mode 100644 index 367e3ee..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 12:01:55 pm ist -.include 1n4007.lib - -v1 3 1 sine(0 5 50 0 0) -r1 4 0 1000 -d3 0 3 1n4007 -d4 0 1 1n4007 -d2 1 4 1n4007 -d1 3 4 1n4007 - -.tran 100e-06 40e-03 0e-00 - -* Control Statements -.control -run -plot v(3)-v(1) v(4) -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cmp b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cmp deleted file mode 100644 index 2420597..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.cmp +++ /dev/null @@ -1,45 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 22 October 2012 04:28:50 PM IST - -BeginCmp -TimeStamp = /506BDD23; -Reference = D1; -ValeurCmp = 1n4007; -IdModule = D3; -EndCmp - -BeginCmp -TimeStamp = /506BDD29; -Reference = D2; -ValeurCmp = 1n4007; -IdModule = D3; -EndCmp - -BeginCmp -TimeStamp = /506BDD38; -Reference = D3; -ValeurCmp = 1n4007; -IdModule = D3; -EndCmp - -BeginCmp -TimeStamp = /506BDD2F; -Reference = D4; -ValeurCmp = 1n4007; -IdModule = D3; -EndCmp - -BeginCmp -TimeStamp = /506BDD54; -Reference = R1; -ValeurCmp = 1000; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506BDD71; -Reference = V1; -ValeurCmp = SINE; -IdModule = R1; -EndCmp - -EndListe diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.lst b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.lst deleted file mode 100644 index a966a95..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.lst +++ /dev/null @@ -1,25 +0,0 @@ -eeschema (2011-05-25)-stable >> Creation date: Monday 15 October 2012 02:40:18 PM IST - -#Cmp ( order = Reference ) -| D1 DIODE -| D2 DIODE -| D3 DIODE -| D4 DIODE -| R1 1000 -| U1 VPLOT1 -| U2 VPLOT -| V1 SINE -#End Cmp - -#Cmp ( order = Value ) -| 1000 R1 -| DIODE D1 -| DIODE D2 -| DIODE D3 -| DIODE D4 -| SINE V1 -| VPLOT U2 -| VPLOT1 U1 -#End Cmp - -#End List diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.net b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.net deleted file mode 100644 index 94b1097..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.net +++ /dev/null @@ -1,56 +0,0 @@ -# EESchema Netlist Version 1.1 created Monday 22 October 2012 04:28:50 PM IST -( - ( /506BDD23 D3 D1 1n4007 - ( 1 N-000003 ) - ( 2 N-000004 ) - ) - ( /506BDD29 D3 D2 1n4007 - ( 1 N-000001 ) - ( 2 N-000004 ) - ) - ( /506BDD38 D3 D3 1n4007 - ( 1 GND ) - ( 2 N-000003 ) - ) - ( /506BDD2F D3 D4 1n4007 - ( 1 GND ) - ( 2 N-000001 ) - ) - ( /506BDD54 R3 R1 1000 - ( 1 N-000004 ) - ( 2 GND ) - ) - ( /506BDD71 R1 V1 SINE - ( 1 N-000003 ) - ( 2 N-000001 ) - ) -) -* -{ Allowed footprints by component: -$component D1 - D? - S* -$endlist -$component D2 - D? - S* -$endlist -$component D3 - D? - S* -$endlist -$component D4 - D? - S* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component V1 - 1_pin -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.pdf b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.pdf Binary files differdeleted file mode 100644 index 4500c18..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.pdf +++ /dev/null diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.pro b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.pro deleted file mode 100644 index 64e6524..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 22 October 2012 04:25:50 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.proj b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.proj deleted file mode 100644 index 1937538..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile bridgeRectifier.sch diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.ps b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.ps deleted file mode 100644 index 2df6517..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.ps +++ /dev/null @@ -1,2726 +0,0 @@ -%!PS-Adobe-3.0 -%%Creator: EESchema-PS -%%CreationDate: Mon Oct 15 14:45:06 2012 -%%Title: bridgeRectifier.ps -%%Pages: 1 -%%PageOrder: Ascend -%%BoundingBox: 0 0 596 843 -%%DocumentMedia: A4 595 842 0 () () -%%Orientation: Landscape -%%EndComments -%%Page: 1 1 -/line { - newpath - moveto - lineto - stroke -} bind def -/cir0 { newpath 0 360 arc stroke } bind def -/cir1 { newpath 0 360 arc gsave fill grestore stroke } bind def -/cir2 { newpath 0 360 arc gsave fill grestore stroke } bind def -/arc0 { newpath arc stroke } bind def -/arc1 { newpath 4 index 4 index moveto arc closepath gsave fill grestore stroke } bind def -/arc2 { newpath 4 index 4 index moveto arc closepath gsave fill grestore stroke } bind def -/poly0 { stroke } bind def -/poly1 { closepath gsave fill grestore stroke } bind def -/poly2 { closepath gsave fill grestore stroke } bind def -/rect0 { rectstroke } bind def -/rect1 { rectfill } bind def -/rect2 { rectfill } bind def -/linemode0 { 0 setlinecap 0 setlinejoin 0 setlinewidth } bind def -/linemode1 { 1 setlinecap 1 setlinejoin } bind def -/dashedline { [50 50] 0 setdash } bind def -/solidline { [] 0 setdash } bind def -gsave -0.0072 0.0072 scale -linemode1 -82670 0 translate 90 rotate -60 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -4000 78670 moveto -113000 78670 lineto -113000 4000 lineto -4000 4000 lineto -4000 78670 lineto -stroke -newpath -4700 77970 moveto -112300 77970 lineto -112300 4700 lineto -4700 4700 lineto -4700 77970 lineto -stroke -newpath -25800 78670 moveto -25800 77970 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -newpath -15040 78120 moveto -14760 78120 lineto -stroke -newpath -14900 78120 moveto -14900 78620 lineto -14850 78550 lineto -14800 78500 lineto -14760 78470 lineto -stroke -newpath -25800 4000 moveto -25800 4700 lineto -stroke -0 0 0 setrgbcolor -newpath -15040 4150 moveto -14760 4150 lineto -stroke -newpath -14900 4150 moveto -14900 4650 lineto -14850 4580 lineto -14800 4530 lineto -14760 4500 lineto -stroke -newpath -47600 78670 moveto -47600 77970 lineto -stroke -0 0 0 setrgbcolor -newpath -36560 78570 moveto -36580 78590 lineto -36630 78620 lineto -36750 78620 lineto -36790 78590 lineto -36820 78570 lineto -36840 78520 lineto -36840 78470 lineto -36820 78400 lineto -36530 78120 lineto -36840 78120 lineto -stroke -newpath -47600 4000 moveto -47600 4700 lineto -stroke -0 0 0 setrgbcolor -newpath -36560 4600 moveto -36580 4620 lineto -36630 4650 lineto -36750 4650 lineto -36790 4620 lineto -36820 4600 lineto -36840 4550 lineto -36840 4500 lineto -36820 4430 lineto -36530 4150 lineto -36840 4150 lineto -stroke -newpath -69400 78670 moveto -69400 77970 lineto -stroke -0 0 0 setrgbcolor -newpath -58330 78620 moveto -58640 78620 lineto -58470 78430 lineto -58550 78430 lineto -58590 78400 lineto -58620 78380 lineto -58640 78330 lineto -58640 78210 lineto -58620 78170 lineto -58590 78140 lineto -58550 78120 lineto -58400 78120 lineto -58360 78140 lineto -58330 78170 lineto -stroke -newpath -69400 4000 moveto -69400 4700 lineto -stroke -0 0 0 setrgbcolor -newpath -58330 4650 moveto -58640 4650 lineto -58470 4460 lineto -58550 4460 lineto -58590 4430 lineto -58620 4410 lineto -58640 4360 lineto -58640 4240 lineto -58620 4200 lineto -58590 4170 lineto -58550 4150 lineto -58400 4150 lineto -58360 4170 lineto -58330 4200 lineto -stroke -newpath -91200 78670 moveto -91200 77970 lineto -stroke -0 0 0 setrgbcolor -newpath -80390 78450 moveto -80390 78120 lineto -stroke -newpath -80270 78640 moveto -80160 78280 lineto -80460 78280 lineto -stroke -newpath -91200 4000 moveto -91200 4700 lineto -stroke -0 0 0 setrgbcolor -newpath -80390 4480 moveto -80390 4150 lineto -stroke -newpath -80270 4670 moveto -80160 4310 lineto -80460 4310 lineto -stroke -0 0 0 setrgbcolor -newpath -102220 78620 moveto -101980 78620 lineto -101960 78380 lineto -101980 78400 lineto -102030 78430 lineto -102150 78430 lineto -102190 78400 lineto -102220 78380 lineto -102240 78330 lineto -102240 78210 lineto -102220 78170 lineto -102190 78140 lineto -102150 78120 lineto -102030 78120 lineto -101980 78140 lineto -101960 78170 lineto -stroke -0 0 0 setrgbcolor -newpath -102220 4650 moveto -101980 4650 lineto -101960 4410 lineto -101980 4430 lineto -102030 4460 lineto -102150 4460 lineto -102190 4430 lineto -102220 4410 lineto -102240 4360 lineto -102240 4240 lineto -102220 4200 lineto -102190 4170 lineto -102150 4150 lineto -102030 4150 lineto -101980 4170 lineto -101960 4200 lineto -stroke -newpath -4000 53780 moveto -4700 53780 lineto -stroke -0 0 0 setrgbcolor -newpath -4240 66160 moveto -4470 66160 lineto -stroke -newpath -4190 66020 moveto -4350 66520 lineto -4520 66020 lineto -stroke -newpath -113000 53780 moveto -112300 53780 lineto -stroke -0 0 0 setrgbcolor -newpath -112540 66160 moveto -112770 66160 lineto -stroke -newpath -112490 66020 moveto -112650 66520 lineto -112820 66020 lineto -stroke -newpath -4000 28890 moveto -4700 28890 lineto -stroke -0 0 0 setrgbcolor -newpath -4390 41390 moveto -4460 41370 lineto -4480 41340 lineto -4500 41290 lineto -4500 41220 lineto -4480 41180 lineto -4460 41150 lineto -4410 41130 lineto -4220 41130 lineto -4220 41630 lineto -4390 41630 lineto -4430 41600 lineto -4460 41580 lineto -4480 41530 lineto -4480 41480 lineto -4460 41440 lineto -4430 41410 lineto -4390 41390 lineto -4220 41390 lineto -stroke -newpath -113000 28890 moveto -112300 28890 lineto -stroke -0 0 0 setrgbcolor -newpath -112690 41390 moveto -112760 41370 lineto -112780 41340 lineto -112800 41290 lineto -112800 41220 lineto -112780 41180 lineto -112760 41150 lineto -112710 41130 lineto -112520 41130 lineto -112520 41630 lineto -112690 41630 lineto -112730 41600 lineto -112760 41580 lineto -112780 41530 lineto -112780 41480 lineto -112760 41440 lineto -112730 41410 lineto -112690 41390 lineto -112520 41390 lineto -stroke -0 0 0 setrgbcolor -newpath -4500 16290 moveto -4480 16260 lineto -4410 16240 lineto -4360 16240 lineto -4290 16260 lineto -4240 16310 lineto -4220 16360 lineto -4200 16450 lineto -4200 16520 lineto -4220 16620 lineto -4240 16670 lineto -4290 16710 lineto -4360 16740 lineto -4410 16740 lineto -4480 16710 lineto -4500 16690 lineto -stroke -0 0 0 setrgbcolor -newpath -112800 16290 moveto -112780 16260 lineto -112710 16240 lineto -112660 16240 lineto -112590 16260 lineto -112540 16310 lineto -112520 16360 lineto -112500 16450 lineto -112500 16520 lineto -112520 16620 lineto -112540 16670 lineto -112590 16710 lineto -112660 16740 lineto -112710 16740 lineto -112780 16710 lineto -112800 16690 lineto -stroke -120 setlinewidth -0 0 0 setrgbcolor -newpath -79440 6260 moveto -79440 6860 lineto -79590 6860 lineto -79670 6830 lineto -79730 6770 lineto -79760 6710 lineto -79790 6600 lineto -79790 6510 lineto -79760 6400 lineto -79730 6340 lineto -79670 6290 lineto -79590 6260 lineto -79440 6260 lineto -stroke -newpath -80300 6260 moveto -80300 6570 lineto -80270 6630 lineto -80210 6660 lineto -80100 6660 lineto -80040 6630 lineto -stroke -newpath -80300 6290 moveto -80240 6260 lineto -80100 6260 lineto -80040 6290 lineto -80010 6340 lineto -80010 6400 lineto -80040 6460 lineto -80100 6490 lineto -80240 6490 lineto -80300 6510 lineto -stroke -newpath -80500 6660 moveto -80730 6660 lineto -stroke -newpath -80580 6860 moveto -80580 6340 lineto -80610 6290 lineto -80670 6260 lineto -80730 6260 lineto -stroke -newpath -81150 6290 moveto -81090 6260 lineto -80980 6260 lineto -80920 6290 lineto -80890 6340 lineto -80890 6570 lineto -80920 6630 lineto -80980 6660 lineto -81090 6660 lineto -81150 6630 lineto -81180 6570 lineto -81180 6510 lineto -80890 6460 lineto -stroke -newpath -81430 6310 moveto -81460 6290 lineto -81430 6260 lineto -81400 6290 lineto -81430 6310 lineto -81430 6260 lineto -stroke -newpath -81430 6630 moveto -81460 6600 lineto -81430 6570 lineto -81400 6600 lineto -81430 6630 lineto -81430 6570 lineto -stroke -newpath -82130 6860 moveto -82530 6860 lineto -82270 6260 lineto -stroke -newpath -83300 6260 moveto -83240 6290 lineto -83210 6310 lineto -83180 6370 lineto -83180 6540 lineto -83210 6600 lineto -83240 6630 lineto -83300 6660 lineto -83380 6660 lineto -83440 6630 lineto -83470 6600 lineto -83500 6540 lineto -83500 6370 lineto -83470 6310 lineto -83440 6290 lineto -83380 6260 lineto -83300 6260 lineto -stroke -newpath -84010 6290 moveto -83950 6260 lineto -83840 6260 lineto -83780 6290 lineto -83750 6310 lineto -83720 6370 lineto -83720 6540 lineto -83750 6600 lineto -83780 6630 lineto -83840 6660 lineto -83950 6660 lineto -84010 6630 lineto -stroke -newpath -84180 6660 moveto -84410 6660 lineto -stroke -newpath -84260 6860 moveto -84260 6340 lineto -84290 6290 lineto -84350 6260 lineto -84410 6260 lineto -stroke -newpath -85030 6800 moveto -85060 6830 lineto -85120 6860 lineto -85260 6860 lineto -85320 6830 lineto -85350 6800 lineto -85380 6740 lineto -85380 6690 lineto -85350 6600 lineto -85010 6260 lineto -85380 6260 lineto -stroke -newpath -85750 6860 moveto -85800 6860 lineto -85860 6830 lineto -85890 6800 lineto -85920 6740 lineto -85950 6630 lineto -85950 6490 lineto -85920 6370 lineto -85890 6310 lineto -85860 6290 lineto -85800 6260 lineto -85750 6260 lineto -85690 6290 lineto -85660 6310 lineto -85630 6370 lineto -85600 6490 lineto -85600 6630 lineto -85630 6740 lineto -85660 6800 lineto -85690 6830 lineto -85750 6860 lineto -stroke -newpath -86520 6260 moveto -86170 6260 lineto -stroke -newpath -86350 6260 moveto -86350 6860 lineto -86290 6770 lineto -86230 6710 lineto -86170 6690 lineto -stroke -newpath -86740 6800 moveto -86770 6830 lineto -86830 6860 lineto -86970 6860 lineto -87030 6830 lineto -87060 6800 lineto -87090 6740 lineto -87090 6690 lineto -87060 6600 lineto -86720 6260 lineto -87090 6260 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -newpath -71040 5060 moveto -71040 5660 lineto -stroke -newpath -71390 5060 moveto -71130 5400 lineto -stroke -newpath -71390 5660 moveto -71040 5310 lineto -stroke -newpath -71640 5060 moveto -71640 5460 lineto -stroke -newpath -71640 5660 moveto -71610 5630 lineto -71640 5600 lineto -71670 5630 lineto -71640 5660 lineto -71640 5600 lineto -stroke -newpath -72280 5110 moveto -72250 5090 lineto -72160 5060 lineto -72100 5060 lineto -72020 5090 lineto -71960 5140 lineto -71930 5200 lineto -71900 5310 lineto -71900 5400 lineto -71930 5510 lineto -71960 5570 lineto -72020 5630 lineto -72100 5660 lineto -72160 5660 lineto -72250 5630 lineto -72280 5600 lineto -stroke -newpath -72790 5060 moveto -72790 5370 lineto -72760 5430 lineto -72700 5460 lineto -72590 5460 lineto -72530 5430 lineto -stroke -newpath -72790 5090 moveto -72730 5060 lineto -72590 5060 lineto -72530 5090 lineto -72500 5140 lineto -72500 5200 lineto -72530 5260 lineto -72590 5290 lineto -72730 5290 lineto -72790 5310 lineto -stroke -newpath -73330 5060 moveto -73330 5660 lineto -stroke -newpath -73330 5090 moveto -73270 5060 lineto -73160 5060 lineto -73100 5090 lineto -73070 5110 lineto -73040 5170 lineto -73040 5340 lineto -73070 5400 lineto -73100 5430 lineto -73160 5460 lineto -73270 5460 lineto -73330 5430 lineto -stroke -newpath -74070 5370 moveto -74270 5370 lineto -stroke -newpath -74360 5060 moveto -74070 5060 lineto -74070 5660 lineto -74360 5660 lineto -stroke -newpath -74610 5110 moveto -74640 5090 lineto -74610 5060 lineto -74580 5090 lineto -74610 5110 lineto -74610 5060 lineto -stroke -newpath -74900 5060 moveto -74900 5660 lineto -75050 5660 lineto -75130 5630 lineto -75190 5570 lineto -75220 5510 lineto -75250 5400 lineto -75250 5310 lineto -75220 5200 lineto -75190 5140 lineto -75130 5090 lineto -75050 5060 lineto -74900 5060 lineto -stroke -newpath -75500 5110 moveto -75530 5090 lineto -75500 5060 lineto -75470 5090 lineto -75500 5110 lineto -75500 5060 lineto -stroke -newpath -75760 5230 moveto -76050 5230 lineto -stroke -newpath -75710 5060 moveto -75910 5660 lineto -76110 5060 lineto -stroke -newpath -76300 5110 moveto -76330 5090 lineto -76300 5060 lineto -76270 5090 lineto -76300 5110 lineto -76300 5060 lineto -stroke -120 setlinewidth -0 0 0 setrgbcolor -newpath -104590 6260 moveto -104390 6540 lineto -stroke -newpath -104240 6260 moveto -104240 6860 lineto -104470 6860 lineto -104530 6830 lineto -104560 6800 lineto -104590 6740 lineto -104590 6660 lineto -104560 6600 lineto -104530 6570 lineto -104470 6540 lineto -104240 6540 lineto -stroke -newpath -105070 6290 moveto -105010 6260 lineto -104900 6260 lineto -104840 6290 lineto -104810 6340 lineto -104810 6570 lineto -104840 6630 lineto -104900 6660 lineto -105010 6660 lineto -105070 6630 lineto -105100 6570 lineto -105100 6510 lineto -104810 6460 lineto -stroke -newpath -105300 6660 moveto -105440 6260 lineto -105580 6660 lineto -stroke -newpath -105810 6310 moveto -105840 6290 lineto -105810 6260 lineto -105780 6290 lineto -105810 6310 lineto -105810 6260 lineto -stroke -newpath -105810 6630 moveto -105840 6600 lineto -105810 6570 lineto -105780 6600 lineto -105810 6630 lineto -105810 6570 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -newpath -71010 6290 moveto -71100 6260 lineto -71240 6260 lineto -71300 6290 lineto -71330 6310 lineto -71360 6370 lineto -71360 6430 lineto -71330 6490 lineto -71300 6510 lineto -71240 6540 lineto -71130 6570 lineto -71070 6600 lineto -71040 6630 lineto -71010 6690 lineto -71010 6740 lineto -71040 6800 lineto -71070 6830 lineto -71130 6860 lineto -71270 6860 lineto -71360 6830 lineto -stroke -newpath -71610 6260 moveto -71610 6660 lineto -stroke -newpath -71610 6860 moveto -71580 6830 lineto -71610 6800 lineto -71640 6830 lineto -71610 6860 lineto -71610 6800 lineto -stroke -newpath -71850 6660 moveto -72160 6660 lineto -71850 6260 lineto -72160 6260 lineto -stroke -newpath -72620 6290 moveto -72560 6260 lineto -72450 6260 lineto -72390 6290 lineto -72360 6340 lineto -72360 6570 lineto -72390 6630 lineto -72450 6660 lineto -72560 6660 lineto -72620 6630 lineto -72650 6570 lineto -72650 6510 lineto -72360 6460 lineto -stroke -newpath -72900 6310 moveto -72930 6290 lineto -72900 6260 lineto -72870 6290 lineto -72900 6310 lineto -72900 6260 lineto -stroke -newpath -72900 6630 moveto -72930 6600 lineto -72900 6570 lineto -72870 6600 lineto -72900 6630 lineto -72900 6570 lineto -stroke -newpath -73620 6430 moveto -73910 6430 lineto -stroke -newpath -73570 6260 moveto -73770 6860 lineto -73970 6260 lineto -stroke -newpath -74420 6660 moveto -74420 6260 lineto -stroke -newpath -74280 6890 moveto -74130 6460 lineto -74510 6460 lineto -stroke -0 0 0 setrgbcolor -newpath -104240 5060 moveto -104240 5660 lineto -stroke -newpath -104790 5060 moveto -104790 5660 lineto -stroke -newpath -104790 5090 moveto -104730 5060 lineto -104620 5060 lineto -104560 5090 lineto -104530 5110 lineto -104500 5170 lineto -104500 5340 lineto -104530 5400 lineto -104560 5430 lineto -104620 5460 lineto -104730 5460 lineto -104790 5430 lineto -stroke -newpath -105070 5110 moveto -105100 5090 lineto -105070 5060 lineto -105040 5090 lineto -105070 5110 lineto -105070 5060 lineto -stroke -newpath -105070 5430 moveto -105100 5400 lineto -105070 5370 lineto -105040 5400 lineto -105070 5430 lineto -105070 5370 lineto -stroke -newpath -106140 5060 moveto -105790 5060 lineto -stroke -newpath -105970 5060 moveto -105970 5660 lineto -105910 5570 lineto -105850 5510 lineto -105790 5490 lineto -stroke -newpath -106820 5690 moveto -106310 4910 lineto -stroke -newpath -107340 5060 moveto -106990 5060 lineto -stroke -newpath -107170 5060 moveto -107170 5660 lineto -107110 5570 lineto -107050 5510 lineto -106990 5490 lineto -stroke -120 setlinewidth -0 0 0 setrgbcolor -newpath -70960 8060 moveto -71300 8060 lineto -stroke -newpath -71130 7460 moveto -71130 8060 lineto -stroke -newpath -71500 7460 moveto -71500 7860 lineto -stroke -newpath -71500 8060 moveto -71470 8030 lineto -71500 8000 lineto -71530 8030 lineto -71500 8060 lineto -71500 8000 lineto -stroke -newpath -71710 7860 moveto -71940 7860 lineto -stroke -newpath -71790 8060 moveto -71790 7540 lineto -71820 7490 lineto -71880 7460 lineto -71940 7460 lineto -stroke -newpath -72220 7460 moveto -72160 7490 lineto -72130 7540 lineto -72130 8060 lineto -stroke -newpath -72670 7490 moveto -72610 7460 lineto -72500 7460 lineto -72440 7490 lineto -72410 7540 lineto -72410 7770 lineto -72440 7830 lineto -72500 7860 lineto -72610 7860 lineto -72670 7830 lineto -72700 7770 lineto -72700 7710 lineto -72410 7660 lineto -stroke -newpath -72950 7510 moveto -72980 7490 lineto -72950 7460 lineto -72920 7490 lineto -72950 7510 lineto -72950 7460 lineto -stroke -newpath -72950 7830 moveto -72980 7800 lineto -72950 7770 lineto -72920 7800 lineto -72950 7830 lineto -72950 7770 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -newpath -71240 10170 moveto -71040 10170 lineto -stroke -newpath -71040 9860 moveto -71040 10460 lineto -71330 10460 lineto -stroke -newpath -71550 9860 moveto -71550 10260 lineto -stroke -newpath -71550 10460 moveto -71520 10430 lineto -71550 10400 lineto -71580 10430 lineto -71550 10460 lineto -71550 10400 lineto -stroke -newpath -71930 9860 moveto -71870 9890 lineto -71840 9940 lineto -71840 10460 lineto -stroke -newpath -72380 9890 moveto -72320 9860 lineto -72210 9860 lineto -72150 9890 lineto -72120 9940 lineto -72120 10170 lineto -72150 10230 lineto -72210 10260 lineto -72320 10260 lineto -72380 10230 lineto -72410 10170 lineto -72410 10110 lineto -72120 10060 lineto -stroke -newpath -72660 9910 moveto -72690 9890 lineto -72660 9860 lineto -72630 9890 lineto -72660 9910 lineto -72660 9860 lineto -stroke -newpath -72660 10230 moveto -72690 10200 lineto -72660 10170 lineto -72630 10200 lineto -72660 10230 lineto -72660 10170 lineto -stroke -newpath -73410 9860 moveto -73410 10460 lineto -stroke -newpath -73410 10230 moveto -73470 10260 lineto -73580 10260 lineto -73640 10230 lineto -73670 10200 lineto -73700 10140 lineto -73700 9970 lineto -73670 9910 lineto -73640 9890 lineto -73580 9860 lineto -73470 9860 lineto -73410 9890 lineto -stroke -newpath -73950 9860 moveto -73950 10260 lineto -stroke -newpath -73950 10140 moveto -73980 10200 lineto -74010 10230 lineto -74070 10260 lineto -74120 10260 lineto -stroke -newpath -74320 9860 moveto -74320 10260 lineto -stroke -newpath -74320 10460 moveto -74290 10430 lineto -74320 10400 lineto -74350 10430 lineto -74320 10460 lineto -74320 10400 lineto -stroke -newpath -74870 9860 moveto -74870 10460 lineto -stroke -newpath -74870 9890 moveto -74810 9860 lineto -74700 9860 lineto -74640 9890 lineto -74610 9910 lineto -74580 9970 lineto -74580 10140 lineto -74610 10200 lineto -74640 10230 lineto -74700 10260 lineto -74810 10260 lineto -74870 10230 lineto -stroke -newpath -75410 10260 moveto -75410 9770 lineto -75380 9710 lineto -75350 9690 lineto -75300 9660 lineto -75210 9660 lineto -75150 9690 lineto -stroke -newpath -75410 9890 moveto -75350 9860 lineto -75240 9860 lineto -75180 9890 lineto -75150 9910 lineto -75120 9970 lineto -75120 10140 lineto -75150 10200 lineto -75180 10230 lineto -75240 10260 lineto -75350 10260 lineto -75410 10230 lineto -stroke -newpath -75920 9890 moveto -75860 9860 lineto -75750 9860 lineto -75690 9890 lineto -75660 9940 lineto -75660 10170 lineto -75690 10230 lineto -75750 10260 lineto -75860 10260 lineto -75920 10230 lineto -75950 10170 lineto -75950 10110 lineto -75660 10060 lineto -stroke -newpath -76550 9860 moveto -76350 10140 lineto -stroke -newpath -76200 9860 moveto -76200 10460 lineto -76430 10460 lineto -76490 10430 lineto -76520 10400 lineto -76550 10340 lineto -76550 10260 lineto -76520 10200 lineto -76490 10170 lineto -76430 10140 lineto -76200 10140 lineto -stroke -newpath -77030 9890 moveto -76970 9860 lineto -76860 9860 lineto -76800 9890 lineto -76770 9940 lineto -76770 10170 lineto -76800 10230 lineto -76860 10260 lineto -76970 10260 lineto -77030 10230 lineto -77060 10170 lineto -77060 10110 lineto -76770 10060 lineto -stroke -newpath -77570 9890 moveto -77510 9860 lineto -77400 9860 lineto -77340 9890 lineto -77310 9910 lineto -77280 9970 lineto -77280 10140 lineto -77310 10200 lineto -77340 10230 lineto -77400 10260 lineto -77510 10260 lineto -77570 10230 lineto -stroke -newpath -77740 10260 moveto -77970 10260 lineto -stroke -newpath -77820 10460 moveto -77820 9940 lineto -77850 9890 lineto -77910 9860 lineto -77970 9860 lineto -stroke -newpath -78160 9860 moveto -78160 10260 lineto -stroke -newpath -78160 10460 moveto -78130 10430 lineto -78160 10400 lineto -78190 10430 lineto -78160 10460 lineto -78160 10400 lineto -stroke -newpath -78370 10260 moveto -78600 10260 lineto -stroke -newpath -78450 9860 moveto -78450 10370 lineto -78480 10430 lineto -78540 10460 lineto -78600 10460 lineto -stroke -newpath -78790 9860 moveto -78790 10260 lineto -stroke -newpath -78790 10460 moveto -78760 10430 lineto -78790 10400 lineto -78820 10430 lineto -78790 10460 lineto -78790 10400 lineto -stroke -newpath -79310 9890 moveto -79250 9860 lineto -79140 9860 lineto -79080 9890 lineto -79050 9940 lineto -79050 10170 lineto -79080 10230 lineto -79140 10260 lineto -79250 10260 lineto -79310 10230 lineto -79340 10170 lineto -79340 10110 lineto -79050 10060 lineto -stroke -newpath -79590 9860 moveto -79590 10260 lineto -stroke -newpath -79590 10140 moveto -79620 10200 lineto -79650 10230 lineto -79710 10260 lineto -79760 10260 lineto -stroke -newpath -79960 9910 moveto -79990 9890 lineto -79960 9860 lineto -79930 9890 lineto -79960 9910 lineto -79960 9860 lineto -stroke -newpath -80220 9890 moveto -80280 9860 lineto -80400 9860 lineto -80450 9890 lineto -80480 9940 lineto -80480 9970 lineto -80450 10030 lineto -80400 10060 lineto -80310 10060 lineto -80250 10090 lineto -80220 10140 lineto -80220 10170 lineto -80250 10230 lineto -80310 10260 lineto -80400 10260 lineto -80450 10230 lineto -stroke -newpath -81000 9890 moveto -80940 9860 lineto -80830 9860 lineto -80770 9890 lineto -80740 9910 lineto -80710 9970 lineto -80710 10140 lineto -80740 10200 lineto -80770 10230 lineto -80830 10260 lineto -80940 10260 lineto -81000 10230 lineto -stroke -newpath -81250 9860 moveto -81250 10460 lineto -stroke -newpath -81510 9860 moveto -81510 10170 lineto -81480 10230 lineto -81420 10260 lineto -81340 10260 lineto -81280 10230 lineto -81250 10200 lineto -stroke -0 0 0 setrgbcolor -newpath -71010 8690 moveto -71100 8660 lineto -71240 8660 lineto -71300 8690 lineto -71330 8710 lineto -71360 8770 lineto -71360 8830 lineto -71330 8890 lineto -71300 8910 lineto -71240 8940 lineto -71130 8970 lineto -71070 9000 lineto -71040 9030 lineto -71010 9090 lineto -71010 9140 lineto -71040 9200 lineto -71070 9230 lineto -71130 9260 lineto -71270 9260 lineto -71360 9230 lineto -stroke -newpath -71610 8660 moveto -71610 9260 lineto -stroke -newpath -71870 8660 moveto -71870 8970 lineto -71840 9030 lineto -71780 9060 lineto -71700 9060 lineto -71640 9030 lineto -71610 9000 lineto -stroke -newpath -72380 8690 moveto -72320 8660 lineto -72210 8660 lineto -72150 8690 lineto -72120 8740 lineto -72120 8970 lineto -72150 9030 lineto -72210 9060 lineto -72320 9060 lineto -72380 9030 lineto -72410 8970 lineto -72410 8910 lineto -72120 8860 lineto -stroke -newpath -72890 8690 moveto -72830 8660 lineto -72720 8660 lineto -72660 8690 lineto -72630 8740 lineto -72630 8970 lineto -72660 9030 lineto -72720 9060 lineto -72830 9060 lineto -72890 9030 lineto -72920 8970 lineto -72920 8910 lineto -72630 8860 lineto -stroke -newpath -73090 9060 moveto -73320 9060 lineto -stroke -newpath -73170 9260 moveto -73170 8740 lineto -73200 8690 lineto -73260 8660 lineto -73320 8660 lineto -stroke -newpath -73510 8710 moveto -73540 8690 lineto -73510 8660 lineto -73480 8690 lineto -73510 8710 lineto -73510 8660 lineto -stroke -newpath -73510 9030 moveto -73540 9000 lineto -73510 8970 lineto -73480 9000 lineto -73510 9030 lineto -73510 8970 lineto -stroke -newpath -74690 9290 moveto -74180 8510 lineto -stroke -newpath -70300 10700 moveto -70300 4700 lineto -stroke -newpath -70300 10700 moveto -112300 10700 lineto -stroke -newpath -70300 10700 moveto -112300 10700 lineto -stroke -newpath -70300 8300 moveto -112300 8300 lineto -stroke -newpath -103500 7100 moveto -103500 4700 lineto -stroke -newpath -70300 5900 moveto -112300 5900 lineto -stroke -newpath -70300 7100 moveto -112300 7100 lineto -stroke -newpath -76900 7100 moveto -76900 5900 lineto -stroke -0 0 0 setrgbcolor -60 setlinewidth -52500 49170 160 cir1 -0 0 0 setrgbcolor -newpath -52500 49170 moveto -52500 59670 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -63000 56670 160 cir1 -0 0 0 setrgbcolor -newpath -63000 58170 moveto -63000 52670 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -59500 42670 160 cir1 -0 0 0 setrgbcolor -newpath -59500 42670 moveto -59500 45670 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -49000 50670 160 cir1 -0 0 0 setrgbcolor -newpath -49000 50670 moveto -46500 50670 lineto -stroke -0 0 0 setrgbcolor -newpath -46500 50670 moveto -46500 56170 lineto -stroke -0 0 0 setrgbcolor -newpath -46500 56170 moveto -44000 56170 lineto -stroke -0 0 0 setrgbcolor -newpath -44000 56170 moveto -44000 54170 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -55000 56670 160 cir1 -0 0 0 setrgbcolor -newpath -63000 56670 moveto -49000 56670 lineto -stroke -0 0 0 setrgbcolor -newpath -55000 51170 moveto -55000 48670 lineto -stroke -0 0 0 setrgbcolor -newpath -49000 48670 moveto -49000 51170 lineto -stroke -0 0 0 setrgbcolor -newpath -49000 56670 moveto -49000 55170 lineto -stroke -0 0 0 setrgbcolor -newpath -55000 56670 moveto -55000 55170 lineto -stroke -0 0 0 setrgbcolor -newpath -49000 44670 moveto -49000 42670 lineto -stroke -0 0 0 setrgbcolor -newpath -55000 42670 moveto -55000 44670 lineto -stroke -0 0 0 setrgbcolor -newpath -49000 42670 moveto -63000 42670 lineto -stroke -0 0 0 setrgbcolor -newpath -63000 42670 moveto -63000 47670 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -55000 42670 160 cir1 -0 0 0 setrgbcolor -newpath -44000 45170 moveto -44000 43170 lineto -stroke -0 0 0 setrgbcolor -newpath -44000 43170 moveto -46500 43170 lineto -stroke -0 0 0 setrgbcolor -newpath -46500 43170 moveto -46500 49170 lineto -stroke -0 0 0 setrgbcolor -newpath -46500 49170 moveto -55000 49170 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -55000 49170 160 cir1 -0 0 0 setrgbcolor -newpath -56500 42670 moveto -56500 40670 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -56500 42670 160 cir1 -0 0 0 setrgbcolor -newpath -44500 56170 moveto -44500 59670 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -44500 56170 160 cir1 -0 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -60 setlinewidth -48500 59670 1000 cir0 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -47500 59670 moveto -44500 59670 lineto -stroke -0 0 0 setrgbcolor -newpath -48020 59660 moveto -48400 59660 lineto -stroke -newpath -48210 59470 moveto -48210 59850 lineto -stroke -0 0 0 setrgbcolor -newpath -46140 59820 moveto -45860 59820 lineto -stroke -newpath -46000 59820 moveto -46000 60320 lineto -45950 60250 lineto -45900 60200 lineto -45860 60170 lineto -stroke -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -49500 59670 moveto -52500 59670 lineto -stroke -0 0 0 setrgbcolor -newpath -48600 59660 moveto -48980 59660 lineto -stroke -0 0 0 setrgbcolor -newpath -50860 60270 moveto -50880 60290 lineto -50930 60320 lineto -51050 60320 lineto -51090 60290 lineto -51120 60270 lineto -51140 60220 lineto -51140 60170 lineto -51120 60100 lineto -50830 59820 lineto -51140 59820 lineto -stroke -0 0 0 setrgbcolor -newpath -46620 60970 moveto -46620 60560 lineto -46640 60520 lineto -46670 60490 lineto -46710 60470 lineto -46810 60470 lineto -46860 60490 lineto -46880 60520 lineto -46900 60560 lineto -46900 60970 lineto -stroke -newpath -47120 60920 moveto -47140 60940 lineto -47190 60970 lineto -47310 60970 lineto -47350 60940 lineto -47380 60920 lineto -47400 60870 lineto -47400 60820 lineto -47380 60750 lineto -47090 60470 lineto -47400 60470 lineto -stroke -0 0 0 setrgbcolor -newpath -48940 60970 moveto -49100 60470 lineto -49270 60970 lineto -stroke -newpath -49440 60470 moveto -49440 60970 lineto -49630 60970 lineto -49680 60940 lineto -49700 60920 lineto -49720 60870 lineto -49720 60800 lineto -49700 60750 lineto -49680 60730 lineto -49630 60710 lineto -49440 60710 lineto -stroke -newpath -50180 60470 moveto -49940 60470 lineto -49940 60970 lineto -stroke -newpath -50430 60970 moveto -50530 60970 lineto -50580 60940 lineto -50620 60900 lineto -50650 60800 lineto -50650 60630 lineto -50620 60540 lineto -50580 60490 lineto -50530 60470 lineto -50430 60470 lineto -50390 60490 lineto -50340 60540 lineto -50320 60630 lineto -50320 60800 lineto -50340 60900 lineto -50390 60940 lineto -50430 60970 lineto -stroke -newpath -50790 60970 moveto -51070 60970 lineto -stroke -newpath -50930 60470 moveto -50930 60970 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -60 setlinewidth -63000 62170 1000 cir0 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -63000 61170 moveto -63000 58170 lineto -stroke -0 0 0 setrgbcolor -newpath -63010 61690 moveto -63010 62070 lineto -stroke -newpath -63200 61880 moveto -62820 61880 lineto -stroke -0 0 0 setrgbcolor -newpath -62850 59810 moveto -62850 59530 lineto -stroke -newpath -62850 59670 moveto -62350 59670 lineto -62420 59620 lineto -62470 59570 lineto -62500 59530 lineto -stroke -0 0 0 setrgbcolor -newpath -61120 63470 moveto -61120 63060 lineto -61140 63020 lineto -61170 62990 lineto -61210 62970 lineto -61310 62970 lineto -61360 62990 lineto -61380 63020 lineto -61400 63060 lineto -61400 63470 lineto -stroke -newpath -61900 62970 moveto -61620 62970 lineto -stroke -newpath -61760 62970 moveto -61760 63470 lineto -61710 63400 lineto -61660 63350 lineto -61620 63320 lineto -stroke -0 0 0 setrgbcolor -newpath -63200 63470 moveto -63360 62970 lineto -63530 63470 lineto -stroke -newpath -63700 62970 moveto -63700 63470 lineto -63890 63470 lineto -63940 63440 lineto -63960 63420 lineto -63980 63370 lineto -63980 63300 lineto -63960 63250 lineto -63940 63230 lineto -63890 63210 lineto -63700 63210 lineto -stroke -newpath -64440 62970 moveto -64200 62970 lineto -64200 63470 lineto -stroke -newpath -64690 63470 moveto -64790 63470 lineto -64840 63440 lineto -64880 63400 lineto -64910 63300 lineto -64910 63130 lineto -64880 63040 lineto -64840 62990 lineto -64790 62970 lineto -64690 62970 lineto -64650 62990 lineto -64600 63040 lineto -64580 63130 lineto -64580 63300 lineto -64600 63400 lineto -64650 63440 lineto -64690 63470 lineto -stroke -newpath -65050 63470 moveto -65330 63470 lineto -stroke -newpath -65190 62970 moveto -65190 63470 lineto -stroke -newpath -65760 62970 moveto -65480 62970 lineto -stroke -newpath -65620 62970 moveto -65620 63470 lineto -65570 63400 lineto -65520 63350 lineto -65480 63320 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -0 0 0 setrgbcolor -newpath -59500 45670 moveto -59500 45670 lineto -stroke -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -59500 45670 moveto -59500 46670 lineto -59500 46670 lineto -poly0 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -59500 46670 moveto -58500 47170 lineto -59500 47670 lineto -60500 47170 lineto -59500 46670 lineto -poly0 -50 setlinewidth -0 0 0 setrgbcolor -newpath -58460 47850 moveto -58460 48150 lineto -58580 48150 lineto -58600 48130 lineto -58620 48120 lineto -58630 48090 lineto -58630 48050 lineto -58620 48020 lineto -58600 48010 lineto -58580 47990 lineto -58460 47990 lineto -stroke -newpath -58730 48150 moveto -58800 47850 lineto -58860 48060 lineto -58920 47850 lineto -58990 48150 lineto -stroke -newpath -59270 47850 moveto -59170 47990 lineto -stroke -newpath -59100 47850 moveto -59100 48150 lineto -59220 48150 lineto -59240 48130 lineto -59260 48120 lineto -59270 48090 lineto -59270 48050 lineto -59260 48020 lineto -59240 48010 lineto -59220 47990 lineto -59100 47990 lineto -stroke -newpath -59330 47820 moveto -59560 47820 lineto -stroke -newpath -59730 48010 moveto -59630 48010 lineto -stroke -newpath -59630 47850 moveto -59630 48150 lineto -59770 48150 lineto -stroke -newpath -60030 47850 moveto -59890 47850 lineto -59890 48150 lineto -stroke -newpath -60120 47930 moveto -60260 47930 lineto -stroke -newpath -60090 47850 moveto -60190 48150 lineto -60290 47850 lineto -stroke -newpath -60550 48130 moveto -60520 48150 lineto -60480 48150 lineto -60430 48130 lineto -60410 48110 lineto -60390 48080 lineto -60380 48020 lineto -60380 47980 lineto -60390 47920 lineto -60410 47890 lineto -60430 47860 lineto -60480 47850 lineto -60510 47850 lineto -60550 47860 lineto -60560 47880 lineto -60560 47980 lineto -60510 47980 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -60 setlinewidth -newpath -56000 40670 moveto -56500 40170 lineto -57000 40670 lineto -56000 40670 lineto -poly0 -0 0 0 setrgbcolor -0 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -60 setlinewidth -43500 49670 500 -360 -180.2 arc0 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -44500 49670 500 -179.9 -0.1 arc0 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -44000 49670 1500 cir0 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -44000 51170 moveto -44000 54170 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -0 0 0 setrgbcolor -newpath -43850 52810 moveto -43850 52530 lineto -stroke -newpath -43850 52670 moveto -43350 52670 lineto -43420 52620 lineto -43470 52570 lineto -43500 52530 lineto -stroke -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -44000 48170 moveto -44000 45170 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -60 setlinewidth -0 0 0 setrgbcolor -newpath -43400 46530 moveto -43380 46550 lineto -43350 46600 lineto -43350 46720 lineto -43380 46760 lineto -43400 46790 lineto -43450 46810 lineto -43500 46810 lineto -43570 46790 lineto -43850 46500 lineto -43850 46810 lineto -stroke -0 0 0 setrgbcolor -newpath -41520 51030 moveto -41720 50430 lineto -41920 51030 lineto -stroke -newpath -42430 50430 moveto -42080 50430 lineto -stroke -newpath -42260 50430 moveto -42260 51030 lineto -42200 50940 lineto -42140 50880 lineto -42080 50860 lineto -stroke -0 0 0 setrgbcolor -newpath -41100 48960 moveto -41190 48930 lineto -41330 48930 lineto -41390 48960 lineto -41420 48980 lineto -41450 49040 lineto -41450 49100 lineto -41420 49160 lineto -41390 49180 lineto -41330 49210 lineto -41220 49240 lineto -41160 49270 lineto -41130 49300 lineto -41100 49360 lineto -41100 49410 lineto -41130 49470 lineto -41160 49500 lineto -41220 49530 lineto -41360 49530 lineto -41450 49500 lineto -stroke -newpath -41700 48930 moveto -41700 49530 lineto -stroke -newpath -41990 48930 moveto -41990 49530 lineto -42340 48930 lineto -42340 49530 lineto -stroke -newpath -42620 49240 moveto -42820 49240 lineto -stroke -newpath -42910 48930 moveto -42620 48930 lineto -42620 49530 lineto -42910 49530 lineto -stroke -0 0 0 setrgbcolor -newpath -40910 49430 moveto -40710 49710 lineto -stroke -newpath -40560 49430 moveto -40560 50030 lineto -40790 50030 lineto -40850 50000 lineto -40880 49970 lineto -40910 49910 lineto -40910 49830 lineto -40880 49770 lineto -40850 49740 lineto -40790 49710 lineto -40560 49710 lineto -stroke -newpath -41480 49430 moveto -41130 49430 lineto -stroke -newpath -41310 49430 moveto -41310 50030 lineto -41250 49940 lineto -41190 49880 lineto -41130 49860 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -120 setlinewidth -62600 51670 800 -3000 rect0 -0 0 0 setrgbcolor -60 setlinewidth -0 0 0 setrgbcolor -newpath -63000 51670 moveto -63000 52670 lineto -stroke -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -63000 48670 moveto -63000 47670 lineto -stroke -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -64000 50080 moveto -63760 49920 lineto -stroke -newpath -64000 49800 moveto -63500 49800 lineto -63500 49990 lineto -63530 50040 lineto -63550 50060 lineto -63600 50080 lineto -63670 50080 lineto -63720 50060 lineto -63740 50040 lineto -63760 49990 lineto -63760 49800 lineto -stroke -newpath -64000 50560 moveto -64000 50280 lineto -stroke -newpath -64000 50420 moveto -63500 50420 lineto -63570 50370 lineto -63620 50320 lineto -63650 50280 lineto -stroke -0 0 0 setrgbcolor -newpath -63200 49590 moveto -63200 49310 lineto -stroke -newpath -63200 49450 moveto -62700 49450 lineto -62770 49400 lineto -62820 49350 lineto -62850 49310 lineto -stroke -newpath -62700 49900 moveto -62700 49950 lineto -62730 50000 lineto -62750 50020 lineto -62800 50050 lineto -62890 50070 lineto -63010 50070 lineto -63110 50050 lineto -63150 50020 lineto -63180 50000 lineto -63200 49950 lineto -63200 49900 lineto -63180 49860 lineto -63150 49830 lineto -63110 49810 lineto -63010 49790 lineto -62890 49790 lineto -62800 49810 lineto -62750 49830 lineto -62730 49860 lineto -62700 49900 lineto -stroke -newpath -62700 50380 moveto -62700 50430 lineto -62730 50480 lineto -62750 50500 lineto -62800 50530 lineto -62890 50550 lineto -63010 50550 lineto -63110 50530 lineto -63150 50500 lineto -63180 50480 lineto -63200 50430 lineto -63200 50380 lineto -63180 50340 lineto -63150 50310 lineto -63110 50290 lineto -63010 50270 lineto -62890 50270 lineto -62800 50290 lineto -62750 50310 lineto -62730 50340 lineto -62700 50380 lineto -stroke -newpath -62700 50860 moveto -62700 50910 lineto -62730 50960 lineto -62750 50980 lineto -62800 51010 lineto -62890 51030 lineto -63010 51030 lineto -63110 51010 lineto -63150 50980 lineto -63180 50960 lineto -63200 50910 lineto -63200 50860 lineto -63180 50820 lineto -63150 50790 lineto -63110 50770 lineto -63010 50750 lineto -62890 50750 lineto -62800 50770 lineto -62750 50790 lineto -62730 50820 lineto -62700 50860 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -60 setlinewidth -newpath -48500 47170 moveto -49500 47170 lineto -poly0 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -48500 46170 moveto -49000 47170 lineto -49500 46170 lineto -poly1 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -49000 46170 moveto -49000 44670 lineto -stroke -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -49000 47170 moveto -49000 48670 lineto -stroke -0 0 0 setrgbcolor -newpath -48160 46380 moveto -47760 46380 lineto -47760 46470 lineto -47780 46530 lineto -47820 46570 lineto -47860 46580 lineto -47930 46600 lineto -47990 46600 lineto -48070 46580 lineto -48100 46570 lineto -48140 46530 lineto -48160 46470 lineto -48160 46380 lineto -stroke -newpath -47760 46740 moveto -47760 46980 lineto -47910 46850 lineto -47910 46910 lineto -47930 46950 lineto -47950 46970 lineto -47990 46980 lineto -48090 46980 lineto -48120 46970 lineto -48140 46950 lineto -48160 46910 lineto -48160 46790 lineto -48140 46760 lineto -48120 46740 lineto -stroke -0 0 0 setrgbcolor -newpath -50160 45890 moveto -49760 45890 lineto -49760 45980 lineto -49780 46040 lineto -49820 46080 lineto -49860 46090 lineto -49930 46110 lineto -49990 46110 lineto -50070 46090 lineto -50100 46080 lineto -50140 46040 lineto -50160 45980 lineto -50160 45890 lineto -stroke -newpath -50160 46290 moveto -49760 46290 lineto -stroke -newpath -49760 46550 moveto -49760 46630 lineto -49780 46670 lineto -49820 46700 lineto -49900 46720 lineto -50030 46720 lineto -50100 46700 lineto -50140 46670 lineto -50160 46630 lineto -50160 46550 lineto -50140 46510 lineto -50100 46480 lineto -50030 46460 lineto -49900 46460 lineto -49820 46480 lineto -49780 46510 lineto -49760 46550 lineto -stroke -newpath -50160 46900 moveto -49760 46900 lineto -49760 46990 lineto -49780 47050 lineto -49820 47090 lineto -49860 47100 lineto -49930 47120 lineto -49990 47120 lineto -50070 47100 lineto -50100 47090 lineto -50140 47050 lineto -50160 46990 lineto -50160 46900 lineto -stroke -newpath -49950 47300 moveto -49950 47430 lineto -stroke -newpath -50160 47490 moveto -50160 47300 lineto -49760 47300 lineto -49760 47490 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -60 setlinewidth -newpath -54500 47170 moveto -55500 47170 lineto -poly0 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -54500 46170 moveto -55000 47170 lineto -55500 46170 lineto -poly1 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -55000 46170 moveto -55000 44670 lineto -stroke -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -55000 47170 moveto -55000 48670 lineto -stroke -0 0 0 setrgbcolor -newpath -54160 46380 moveto -53760 46380 lineto -53760 46470 lineto -53780 46530 lineto -53820 46570 lineto -53860 46580 lineto -53930 46600 lineto -53990 46600 lineto -54070 46580 lineto -54100 46570 lineto -54140 46530 lineto -54160 46470 lineto -54160 46380 lineto -stroke -newpath -53900 46950 moveto -54160 46950 lineto -stroke -newpath -53740 46850 moveto -54030 46760 lineto -54030 47000 lineto -stroke -0 0 0 setrgbcolor -newpath -56160 45890 moveto -55760 45890 lineto -55760 45980 lineto -55780 46040 lineto -55820 46080 lineto -55860 46090 lineto -55930 46110 lineto -55990 46110 lineto -56070 46090 lineto -56100 46080 lineto -56140 46040 lineto -56160 45980 lineto -56160 45890 lineto -stroke -newpath -56160 46290 moveto -55760 46290 lineto -stroke -newpath -55760 46550 moveto -55760 46630 lineto -55780 46670 lineto -55820 46700 lineto -55900 46720 lineto -56030 46720 lineto -56100 46700 lineto -56140 46670 lineto -56160 46630 lineto -56160 46550 lineto -56140 46510 lineto -56100 46480 lineto -56030 46460 lineto -55900 46460 lineto -55820 46480 lineto -55780 46510 lineto -55760 46550 lineto -stroke -newpath -56160 46900 moveto -55760 46900 lineto -55760 46990 lineto -55780 47050 lineto -55820 47090 lineto -55860 47100 lineto -55930 47120 lineto -55990 47120 lineto -56070 47100 lineto -56100 47090 lineto -56140 47050 lineto -56160 46990 lineto -56160 46900 lineto -stroke -newpath -55950 47300 moveto -55950 47430 lineto -stroke -newpath -56160 47490 moveto -56160 47300 lineto -55760 47300 lineto -55760 47490 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -60 setlinewidth -newpath -54500 53670 moveto -55500 53670 lineto -poly0 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -54500 52670 moveto -55000 53670 lineto -55500 52670 lineto -poly1 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -55000 52670 moveto -55000 51170 lineto -stroke -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -55000 53670 moveto -55000 55170 lineto -stroke -0 0 0 setrgbcolor -newpath -54160 52880 moveto -53760 52880 lineto -53760 52970 lineto -53780 53030 lineto -53820 53070 lineto -53860 53080 lineto -53930 53100 lineto -53990 53100 lineto -54070 53080 lineto -54100 53070 lineto -54140 53030 lineto -54160 52970 lineto -54160 52880 lineto -stroke -newpath -53800 53260 moveto -53780 53280 lineto -53760 53310 lineto -53760 53410 lineto -53780 53450 lineto -53800 53470 lineto -53840 53480 lineto -53880 53480 lineto -53930 53470 lineto -54160 53240 lineto -54160 53480 lineto -stroke -0 0 0 setrgbcolor -newpath -56160 52390 moveto -55760 52390 lineto -55760 52480 lineto -55780 52540 lineto -55820 52580 lineto -55860 52590 lineto -55930 52610 lineto -55990 52610 lineto -56070 52590 lineto -56100 52580 lineto -56140 52540 lineto -56160 52480 lineto -56160 52390 lineto -stroke -newpath -56160 52790 moveto -55760 52790 lineto -stroke -newpath -55760 53050 moveto -55760 53130 lineto -55780 53170 lineto -55820 53200 lineto -55900 53220 lineto -56030 53220 lineto -56100 53200 lineto -56140 53170 lineto -56160 53130 lineto -56160 53050 lineto -56140 53010 lineto -56100 52980 lineto -56030 52960 lineto -55900 52960 lineto -55820 52980 lineto -55780 53010 lineto -55760 53050 lineto -stroke -newpath -56160 53400 moveto -55760 53400 lineto -55760 53490 lineto -55780 53550 lineto -55820 53590 lineto -55860 53600 lineto -55930 53620 lineto -55990 53620 lineto -56070 53600 lineto -56100 53590 lineto -56140 53550 lineto -56160 53490 lineto -56160 53400 lineto -stroke -newpath -55950 53800 moveto -55950 53930 lineto -stroke -newpath -56160 53990 moveto -56160 53800 lineto -55760 53800 lineto -55760 53990 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -0 0 0 setrgbcolor -60 setlinewidth -newpath -48500 53670 moveto -49500 53670 lineto -poly0 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -48500 52670 moveto -49000 53670 lineto -49500 52670 lineto -poly1 -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -49000 52670 moveto -49000 51170 lineto -stroke -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -49000 53670 moveto -49000 55170 lineto -stroke -0 0 0 setrgbcolor -newpath -48160 52880 moveto -47760 52880 lineto -47760 52970 lineto -47780 53030 lineto -47820 53070 lineto -47860 53080 lineto -47930 53100 lineto -47990 53100 lineto -48070 53080 lineto -48100 53070 lineto -48140 53030 lineto -48160 52970 lineto -48160 52880 lineto -stroke -newpath -48160 53480 moveto -48160 53260 lineto -stroke -newpath -48160 53370 moveto -47760 53370 lineto -47820 53330 lineto -47860 53290 lineto -47880 53260 lineto -stroke -0 0 0 setrgbcolor -newpath -50160 52390 moveto -49760 52390 lineto -49760 52480 lineto -49780 52540 lineto -49820 52580 lineto -49860 52590 lineto -49930 52610 lineto -49990 52610 lineto -50070 52590 lineto -50100 52580 lineto -50140 52540 lineto -50160 52480 lineto -50160 52390 lineto -stroke -newpath -50160 52790 moveto -49760 52790 lineto -stroke -newpath -49760 53050 moveto -49760 53130 lineto -49780 53170 lineto -49820 53200 lineto -49900 53220 lineto -50030 53220 lineto -50100 53200 lineto -50140 53170 lineto -50160 53130 lineto -50160 53050 lineto -50140 53010 lineto -50100 52980 lineto -50030 52960 lineto -49900 52960 lineto -49820 52980 lineto -49780 53010 lineto -49760 53050 lineto -stroke -newpath -50160 53400 moveto -49760 53400 lineto -49760 53490 lineto -49780 53550 lineto -49820 53590 lineto -49860 53600 lineto -49930 53620 lineto -49990 53620 lineto -50070 53600 lineto -50100 53590 lineto -50140 53550 lineto -50160 53490 lineto -50160 53400 lineto -stroke -newpath -49950 53800 moveto -49950 53930 lineto -stroke -newpath -50160 53990 moveto -50160 53800 lineto -49760 53800 lineto -49760 53990 lineto -stroke -showpage -grestore -%%EOF diff --git a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.sch b/OSCAD/Examples/bridgeRectifier/bridgeRectifier.sch deleted file mode 100644 index 8469355..0000000 --- a/OSCAD/Examples/bridgeRectifier/bridgeRectifier.sch +++ /dev/null @@ -1,203 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 12:01:58 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:bridgeRectifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6600 4000 4900 4000 -Wire Wire Line - 6600 4000 6600 3550 -Connection ~ 6300 2600 -Wire Wire Line - 6600 2950 6600 2600 -Wire Wire Line - 6600 2600 4900 2600 -Connection ~ 5150 3350 -Wire Wire Line - 5150 2450 5150 3350 -Connection ~ 5950 4000 -Wire Wire Line - 5950 4000 5950 3700 -Connection ~ 4900 3200 -Wire Wire Line - 4900 3200 4650 3200 -Wire Wire Line - 4650 3200 4650 2650 -Wire Wire Line - 4650 2650 4400 2650 -Wire Wire Line - 4400 2650 4400 2850 -Connection ~ 5500 2600 -Wire Wire Line - 5500 3150 5500 3400 -Wire Wire Line - 4900 3400 4900 3150 -Wire Wire Line - 4900 2600 4900 2750 -Wire Wire Line - 5500 2600 5500 2750 -Wire Wire Line - 4900 4000 4900 3800 -Wire Wire Line - 5500 4000 5500 3800 -Wire Wire Line - 6300 4000 6300 3500 -Connection ~ 5500 4000 -Wire Wire Line - 4400 3750 4400 3950 -Wire Wire Line - 4400 3950 4650 3950 -Wire Wire Line - 4650 3950 4650 3350 -Wire Wire Line - 4650 3350 5500 3350 -Connection ~ 5500 3350 -Wire Wire Line - 5650 4000 5650 4200 -Connection ~ 5650 4000 -Wire Wire Line - 6300 2600 6300 3000 -Wire Wire Line - 4550 2450 4550 2650 -Connection ~ 4550 2650 -Connection ~ 6300 4000 -$Comp -L VPLOT8 U1 -U 2 1 50C41A9A -P 6600 3250 -F 0 "U1" H 6450 3350 50 0000 C CNN -F 1 "VPLOT8" H 6750 3350 50 0000 C CNN - 2 6600 3250 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8 U1 -U 1 1 50C41A90 -P 4850 2450 -F 0 "U1" H 4700 2550 50 0000 C CNN -F 1 "VPLOT8" H 5000 2550 50 0000 C CNN - 1 4850 2450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 506BDF52 -P 5950 3700 -F 0 "#FLG01" H 5950 3970 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 3930 30 0000 C CNN - 1 5950 3700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 506BDF42 -P 5650 4200 -F 0 "#PWR02" H 5650 4200 30 0001 C CNN -F 1 "GND" H 5650 4130 30 0001 C CNN - 1 5650 4200 - 1 0 0 -1 -$EndComp -$Comp -L SINE V1 -U 1 1 506BDD71 -P 4400 3300 -F 0 "V1" H 4200 3400 60 0000 C CNN -F 1 "SINE" H 4200 3250 60 0000 C CNN -F 2 "R1" H 4100 3300 60 0000 C CNN - 1 4400 3300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 506BDD54 -P 6300 3250 -F 0 "R1" V 6380 3250 50 0000 C CNN -F 1 "1000" V 6300 3250 50 0000 C CNN - 1 6300 3250 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D3 -U 1 1 506BDD38 -P 4900 3600 -F 0 "D3" H 4900 3700 40 0000 C CNN -F 1 "1n4007" H 4900 3500 40 0000 C CNN - 1 4900 3600 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D4 -U 1 1 506BDD2F -P 5500 3600 -F 0 "D4" H 5500 3700 40 0000 C CNN -F 1 "1n4007" H 5500 3500 40 0000 C CNN - 1 5500 3600 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D2 -U 1 1 506BDD29 -P 5500 2950 -F 0 "D2" H 5500 3050 40 0000 C CNN -F 1 "1n4007" H 5500 2850 40 0000 C CNN - 1 5500 2950 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 506BDD23 -P 4900 2950 -F 0 "D1" H 4900 3050 40 0000 C CNN -F 1 "1n4007" H 4900 2850 40 0000 C CNN - 1 4900 2950 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/bridgeRectifier/diode_D1.eps b/OSCAD/Examples/bridgeRectifier/diode_D1.eps deleted file mode 100644 index a700086..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D1.eps +++ /dev/null @@ -1,1362 +0,0 @@ -%!PS-Adobe-2.0 EPSF-2.0 -%%Creator: dvips(k) 5.98 Copyright 2009 Radical Eye Software -%%Title: dummy_fig.dvi -%%CreationDate: Wed Apr 24 17:14:03 2013 -%%BoundingBox: 721 605 883 690 -%%DocumentFonts: CMMI12 CMR8 CMMI8 CMR6 -%%EndComments -%DVIPSWebPage: (www.radicaleye.com) -%DVIPSCommandLine: dvips -E -o dummy_fig.eps dummy_fig.dvi -%DVIPSParameters: dpi=600 -%DVIPSSource: TeX output 2013.04.24:1714 -%%BeginProcSet: tex.pro 0 0 -%! -/TeXDict 300 dict def TeXDict begin/N{def}def/B{bind def}N/S{exch}N/X{S -N}B/A{dup}B/TR{translate}N/isls false N/vsize 11 72 mul N/hsize 8.5 72 -mul N/landplus90{false}def/@rigin{isls{[0 landplus90{1 -1}{-1 1}ifelse 0 -0 0]concat}if 72 Resolution div 72 VResolution div neg scale isls{ -landplus90{VResolution 72 div vsize mul 0 exch}{Resolution -72 div hsize -mul 0}ifelse TR}if Resolution VResolution vsize -72 div 1 add mul TR[ -matrix currentmatrix{A A round sub abs 0.00001 lt{round}if}forall round -exch round exch]setmatrix}N/@landscape{/isls true N}B/@manualfeed{ -statusdict/manualfeed true put}B/@copies{/#copies X}B/FMat[1 0 0 -1 0 0] -N/FBB[0 0 0 0]N/nn 0 N/IEn 0 N/ctr 0 N/df-tail{/nn 8 dict N nn begin -/FontType 3 N/FontMatrix fntrx N/FontBBox FBB N string/base X array -/BitMaps X/BuildChar{CharBuilder}N/Encoding IEn N end A{/foo setfont}2 -array copy cvx N load 0 nn put/ctr 0 N[}B/sf 0 N/df{/sf 1 N/fntrx FMat N -df-tail}B/dfs{div/sf X/fntrx[sf 0 0 sf neg 0 0]N df-tail}B/E{pop nn A -definefont setfont}B/Cw{Cd A length 5 sub get}B/Ch{Cd A length 4 sub get -}B/Cx{128 Cd A length 3 sub get sub}B/Cy{Cd A length 2 sub get 127 sub} -B/Cdx{Cd A length 1 sub get}B/Ci{Cd A type/stringtype ne{ctr get/ctr ctr -1 add N}if}B/CharBuilder{save 3 1 roll S A/base get 2 index get S -/BitMaps get S get/Cd X pop/ctr 0 N Cdx 0 Cx Cy Ch sub Cx Cw add Cy -setcachedevice Cw Ch true[1 0 0 -1 -.1 Cx sub Cy .1 sub]{Ci}imagemask -restore}B/D{/cc X A type/stringtype ne{]}if nn/base get cc ctr put nn -/BitMaps get S ctr S sf 1 ne{A A length 1 sub A 2 index S get sf div put -}if put/ctr ctr 1 add N}B/I{cc 1 add D}B/bop{userdict/bop-hook known{ -bop-hook}if/SI save N @rigin 0 0 moveto/V matrix currentmatrix A 1 get A -mul exch 0 get A mul add .99 lt{/QV}{/RV}ifelse load def pop pop}N/eop{ -SI restore userdict/eop-hook known{eop-hook}if showpage}N/@start{ -userdict/start-hook known{start-hook}if pop/VResolution X/Resolution X -1000 div/DVImag X/IEn 256 array N 2 string 0 1 255{IEn S A 360 add 36 4 -index cvrs cvn put}for pop 65781.76 div/vsize X 65781.76 div/hsize X}N -/p{show}N/RMat[1 0 0 -1 0 0]N/BDot 260 string N/Rx 0 N/Ry 0 N/V{}B/RV/v{ -/Ry X/Rx X V}B statusdict begin/product where{pop false[(Display)(NeXT) -(LaserWriter 16/600)]{A length product length le{A length product exch 0 -exch getinterval eq{pop true exit}if}{pop}ifelse}forall}{false}ifelse -end{{gsave TR -.1 .1 TR 1 1 scale Rx Ry false RMat{BDot}imagemask -grestore}}{{gsave TR -.1 .1 TR Rx Ry scale 1 1 false RMat{BDot} -imagemask grestore}}ifelse B/QV{gsave newpath transform round exch round -exch itransform moveto Rx 0 rlineto 0 Ry neg rlineto Rx neg 0 rlineto -fill grestore}B/a{moveto}B/delta 0 N/tail{A/delta X 0 rmoveto}B/M{S p -delta add tail}B/b{S p tail}B/c{-4 M}B/d{-3 M}B/e{-2 M}B/f{-1 M}B/g{0 M} -B/h{1 M}B/i{2 M}B/j{3 M}B/k{4 M}B/w{0 rmoveto}B/l{p -4 w}B/m{p -3 w}B/n{ -p -2 w}B/o{p -1 w}B/q{p 1 w}B/r{p 2 w}B/s{p 3 w}B/t{p 4 w}B/x{0 S -rmoveto}B/y{3 2 roll p a}B/bos{/SS save N}B/eos{SS restore}B end - -%%EndProcSet -%%BeginProcSet: texps.pro 0 0 -%! -TeXDict begin/rf{findfont dup length 1 add dict begin{1 index/FID ne 2 -index/UniqueID ne and{def}{pop pop}ifelse}forall[1 index 0 6 -1 roll -exec 0 exch 5 -1 roll VResolution Resolution div mul neg 0 0]FontType 0 -ne{/Metrics exch def dict begin Encoding{exch dup type/integertype ne{ -pop pop 1 sub dup 0 le{pop}{[}ifelse}{FontMatrix 0 get div Metrics 0 get -div def}ifelse}forall Metrics/Metrics currentdict end def}{{1 index type -/nametype eq{exit}if exch pop}loop}ifelse[2 index currentdict end -definefont 3 -1 roll makefont/setfont cvx]cvx def}def/ObliqueSlant{dup -sin S cos div neg}B/SlantFont{4 index mul add}def/ExtendFont{3 -1 roll -mul exch}def/ReEncodeFont{CharStrings rcheck{/Encoding false def dup[ -exch{dup CharStrings exch known not{pop/.notdef/Encoding true def}if} -forall Encoding{]exch pop}{cleartomark}ifelse}if/Encoding exch def}def -end - -%%EndProcSet -%%BeginProcSet: special.pro 0 0 -%! -TeXDict begin/SDict 200 dict N SDict begin/@SpecialDefaults{/hs 612 N -/vs 792 N/ho 0 N/vo 0 N/hsc 1 N/vsc 1 N/ang 0 N/CLIP 0 N/rwiSeen false N -/rhiSeen false N/letter{}N/note{}N/a4{}N/legal{}N}B/@scaleunit 100 N -/@hscale{@scaleunit div/hsc X}B/@vscale{@scaleunit div/vsc X}B/@hsize{ -/hs X/CLIP 1 N}B/@vsize{/vs X/CLIP 1 N}B/@clip{/CLIP 2 N}B/@hoffset{/ho -X}B/@voffset{/vo X}B/@angle{/ang X}B/@rwi{10 div/rwi X/rwiSeen true N}B -/@rhi{10 div/rhi X/rhiSeen true N}B/@llx{/llx X}B/@lly{/lly X}B/@urx{ -/urx X}B/@ury{/ury X}B/magscale true def end/@MacSetUp{userdict/md known -{userdict/md get type/dicttype eq{userdict begin md length 10 add md -maxlength ge{/md md dup length 20 add dict copy def}if end md begin -/letter{}N/note{}N/legal{}N/od{txpose 1 0 mtx defaultmatrix dtransform S -atan/pa X newpath clippath mark{transform{itransform moveto}}{transform{ -itransform lineto}}{6 -2 roll transform 6 -2 roll transform 6 -2 roll -transform{itransform 6 2 roll itransform 6 2 roll itransform 6 2 roll -curveto}}{{closepath}}pathforall newpath counttomark array astore/gc xdf -pop ct 39 0 put 10 fz 0 fs 2 F/|______Courier fnt invertflag{PaintBlack} -if}N/txpose{pxs pys scale ppr aload pop por{noflips{pop S neg S TR pop 1 --1 scale}if xflip yflip and{pop S neg S TR 180 rotate 1 -1 scale ppr 3 -get ppr 1 get neg sub neg ppr 2 get ppr 0 get neg sub neg TR}if xflip -yflip not and{pop S neg S TR pop 180 rotate ppr 3 get ppr 1 get neg sub -neg 0 TR}if yflip xflip not and{ppr 1 get neg ppr 0 get neg TR}if}{ -noflips{TR pop pop 270 rotate 1 -1 scale}if xflip yflip and{TR pop pop -90 rotate 1 -1 scale ppr 3 get ppr 1 get neg sub neg ppr 2 get ppr 0 get -neg sub neg TR}if xflip yflip not and{TR pop pop 90 rotate ppr 3 get ppr -1 get neg sub neg 0 TR}if yflip xflip not and{TR pop pop 270 rotate ppr -2 get ppr 0 get neg sub neg 0 S TR}if}ifelse scaleby96{ppr aload pop 4 --1 roll add 2 div 3 1 roll add 2 div 2 copy TR .96 dup scale neg S neg S -TR}if}N/cp{pop pop showpage pm restore}N end}if}if}N/normalscale{ -Resolution 72 div VResolution 72 div neg scale magscale{DVImag dup scale -}if 0 setgray}N/psfts{S 65781.76 div N}N/startTexFig{/psf$SavedState -save N userdict maxlength dict begin/magscale true def normalscale -currentpoint TR/psf$ury psfts/psf$urx psfts/psf$lly psfts/psf$llx psfts -/psf$y psfts/psf$x psfts currentpoint/psf$cy X/psf$cx X/psf$sx psf$x -psf$urx psf$llx sub div N/psf$sy psf$y psf$ury psf$lly sub div N psf$sx -psf$sy scale psf$cx psf$sx div psf$llx sub psf$cy psf$sy div psf$ury sub -TR/showpage{}N/erasepage{}N/setpagedevice{pop}N/copypage{}N/p 3 def -@MacSetUp}N/doclip{psf$llx psf$lly psf$urx psf$ury currentpoint 6 2 roll -newpath 4 copy 4 2 roll moveto 6 -1 roll S lineto S lineto S lineto -closepath clip newpath moveto}N/endTexFig{end psf$SavedState restore}N -/@beginspecial{SDict begin/SpecialSave save N gsave normalscale -currentpoint TR @SpecialDefaults count/ocount X/dcount countdictstack N} -N/@setspecial{CLIP 1 eq{newpath 0 0 moveto hs 0 rlineto 0 vs rlineto hs -neg 0 rlineto closepath clip}if ho vo TR hsc vsc scale ang rotate -rwiSeen{rwi urx llx sub div rhiSeen{rhi ury lly sub div}{dup}ifelse -scale llx neg lly neg TR}{rhiSeen{rhi ury lly sub div dup scale llx neg -lly neg TR}if}ifelse CLIP 2 eq{newpath llx lly moveto urx lly lineto urx -ury lineto llx ury lineto closepath clip}if/showpage{}N/erasepage{}N -/setpagedevice{pop}N/copypage{}N newpath}N/@endspecial{count ocount sub{ -pop}repeat countdictstack dcount sub{end}repeat grestore SpecialSave -restore end}N/@defspecial{SDict begin}N/@fedspecial{end}B/li{lineto}B -/rl{rlineto}B/rc{rcurveto}B/np{/SaveX currentpoint/SaveY X N 1 -setlinecap newpath}N/st{stroke SaveX SaveY moveto}N/fil{fill SaveX SaveY -moveto}N/ellipse{/endangle X/startangle X/yrad X/xrad X/savematrix -matrix currentmatrix N TR xrad yrad scale 0 0 1 startangle endangle arc -savematrix setmatrix}N end - -%%EndProcSet -%%BeginProcSet: color.pro 0 0 -%! -TeXDict begin/setcmykcolor where{pop}{/setcmykcolor{dup 10 eq{pop -setrgbcolor}{1 sub 4 1 roll 3{3 index add neg dup 0 lt{pop 0}if 3 1 roll -}repeat setrgbcolor pop}ifelse}B}ifelse/TeXcolorcmyk{setcmykcolor}def -/TeXcolorrgb{setrgbcolor}def/TeXcolorgrey{setgray}def/TeXcolorgray{ -setgray}def/TeXcolorhsb{sethsbcolor}def/currentcmykcolor where{pop}{ -/currentcmykcolor{currentrgbcolor 10}B}ifelse/DC{exch dup userdict exch -known{pop pop}{X}ifelse}B/GreenYellow{0.15 0 0.69 0 setcmykcolor}DC -/Yellow{0 0 1 0 setcmykcolor}DC/Goldenrod{0 0.10 0.84 0 setcmykcolor}DC -/Dandelion{0 0.29 0.84 0 setcmykcolor}DC/Apricot{0 0.32 0.52 0 -setcmykcolor}DC/Peach{0 0.50 0.70 0 setcmykcolor}DC/Melon{0 0.46 0.50 0 -setcmykcolor}DC/YellowOrange{0 0.42 1 0 setcmykcolor}DC/Orange{0 0.61 -0.87 0 setcmykcolor}DC/BurntOrange{0 0.51 1 0 setcmykcolor}DC -/Bittersweet{0 0.75 1 0.24 setcmykcolor}DC/RedOrange{0 0.77 0.87 0 -setcmykcolor}DC/Mahogany{0 0.85 0.87 0.35 setcmykcolor}DC/Maroon{0 0.87 -0.68 0.32 setcmykcolor}DC/BrickRed{0 0.89 0.94 0.28 setcmykcolor}DC/Red{ -0 1 1 0 setcmykcolor}DC/OrangeRed{0 1 0.50 0 setcmykcolor}DC/RubineRed{ -0 1 0.13 0 setcmykcolor}DC/WildStrawberry{0 0.96 0.39 0 setcmykcolor}DC -/Salmon{0 0.53 0.38 0 setcmykcolor}DC/CarnationPink{0 0.63 0 0 -setcmykcolor}DC/Magenta{0 1 0 0 setcmykcolor}DC/VioletRed{0 0.81 0 0 -setcmykcolor}DC/Rhodamine{0 0.82 0 0 setcmykcolor}DC/Mulberry{0.34 0.90 -0 0.02 setcmykcolor}DC/RedViolet{0.07 0.90 0 0.34 setcmykcolor}DC -/Fuchsia{0.47 0.91 0 0.08 setcmykcolor}DC/Lavender{0 0.48 0 0 -setcmykcolor}DC/Thistle{0.12 0.59 0 0 setcmykcolor}DC/Orchid{0.32 0.64 0 -0 setcmykcolor}DC/DarkOrchid{0.40 0.80 0.20 0 setcmykcolor}DC/Purple{ -0.45 0.86 0 0 setcmykcolor}DC/Plum{0.50 1 0 0 setcmykcolor}DC/Violet{ -0.79 0.88 0 0 setcmykcolor}DC/RoyalPurple{0.75 0.90 0 0 setcmykcolor}DC -/BlueViolet{0.86 0.91 0 0.04 setcmykcolor}DC/Periwinkle{0.57 0.55 0 0 -setcmykcolor}DC/CadetBlue{0.62 0.57 0.23 0 setcmykcolor}DC -/CornflowerBlue{0.65 0.13 0 0 setcmykcolor}DC/MidnightBlue{0.98 0.13 0 -0.43 setcmykcolor}DC/NavyBlue{0.94 0.54 0 0 setcmykcolor}DC/RoyalBlue{1 -0.50 0 0 setcmykcolor}DC/Blue{1 1 0 0 setcmykcolor}DC/Cerulean{0.94 0.11 -0 0 setcmykcolor}DC/Cyan{1 0 0 0 setcmykcolor}DC/ProcessBlue{0.96 0 0 0 -setcmykcolor}DC/SkyBlue{0.62 0 0.12 0 setcmykcolor}DC/Turquoise{0.85 0 -0.20 0 setcmykcolor}DC/TealBlue{0.86 0 0.34 0.02 setcmykcolor}DC -/Aquamarine{0.82 0 0.30 0 setcmykcolor}DC/BlueGreen{0.85 0 0.33 0 -setcmykcolor}DC/Emerald{1 0 0.50 0 setcmykcolor}DC/JungleGreen{0.99 0 -0.52 0 setcmykcolor}DC/SeaGreen{0.69 0 0.50 0 setcmykcolor}DC/Green{1 0 -1 0 setcmykcolor}DC/ForestGreen{0.91 0 0.88 0.12 setcmykcolor}DC -/PineGreen{0.92 0 0.59 0.25 setcmykcolor}DC/LimeGreen{0.50 0 1 0 -setcmykcolor}DC/YellowGreen{0.44 0 0.74 0 setcmykcolor}DC/SpringGreen{ -0.26 0 0.76 0 setcmykcolor}DC/OliveGreen{0.64 0 0.95 0.40 setcmykcolor} -DC/RawSienna{0 0.72 1 0.45 setcmykcolor}DC/Sepia{0 0.83 1 0.70 -setcmykcolor}DC/Brown{0 0.81 1 0.60 setcmykcolor}DC/Tan{0.14 0.42 0.56 0 -setcmykcolor}DC/Gray{0 0 0 0.50 setcmykcolor}DC/Black{0 0 0 1 -setcmykcolor}DC/White{0 0 0 0 setcmykcolor}DC end - -%%EndProcSet -%%BeginFont: CMR6 -%!PS-AdobeFont-1.0: CMR6 003.002 -%%Title: CMR6 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR6. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMR6 known{/CMR6 findfont dup/UniqueID known{dup -/UniqueID get 5000789 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMR6 def -/FontBBox {-20 -250 1193 750 }readonly def -/UniqueID 5000789 def -/PaintType 0 def -/FontInfo 9 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR6.) readonly def -/FullName (CMR6) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle 0 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 49 /one put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3DD325E55798292D7BD972BD75FA -0E079529AF9C82DF72F64195C9C210DCE34528F540DA1FFD7BEBB9B40787BA93 -51BBFB7CFC5F9152D1E5BB0AD8D016C6CFA4EB41B3C51D091C2D5440E67CFD71 -7C56816B03B901BF4A25A07175380E50A213F877C44778B3C5AADBCC86D6E551 -E6AF364B0BFCAAD22D8D558C5C81A7D425A1629DD5182206742D1D082A12F078 -0FD4F5F6D3129FCFFF1F4A912B0A7DEC8D33A57B5AE0328EF9D57ADDAC543273 -C01924195A181D03F5054A93B71E5065F8D92FE23794D2DAE339BA29C1C6F656 -1DEF13780383DAE38A868377CC7D396B2A05F341AEE0F8BD0A0191F51AD11A4D -2E927B848A1EF2BA15CFBE57A51E3AF07598275195C9613041F71C1AF39E61F9 -EFD5F6512FBDA76E29DE6B508F62F5CF9F73F5288DF1C7B0B82C92D3B6358BAD -EC3CA20BDE55DAA7CC58004AA86B6CBF8C410D8287E88BF20588A39309C2B703 -CED322F030AA6069869064486CA651DA054FF3F5E56534CA358B0829A6B954D8 -9103436E6B06DAD1658BD4A95AB41343B01F5866FC87C4EDFC71F1477C98F8E1 -1DCF27EF743FF90BF918AB8C4E5AC35841E2F745480E5EDE1C1DEAFAD8D0018D -2C1F1CFCAD9F6609859DEDFD1648A6CD23D8ABB80747F94899F17C8F3E6CA55A -E176F19CDFDAA0D7C920B3A72051A4745560AC81978C92459EEE5AFE85AB247A -32981139CBE352B248F4BE5F73503A084A3E91F05328EE521D9669E44E202584 -5407E7846F9FEE3D54EA18FFB144BF2D6803BF65AE402034B3CDBB40DD24217A -3CE0E95E2717CACD603A958187C42B3558AA38D6B6390EEEDD396F96E6041FCF -6F8888221AFA87EAD79F46E0E32CAED91E6C8500879AB6E580C581E8C8CE9B68 -2BB5EFE2604E8DCB2432D39D75EE556969F1B2FBDF6A4BC72D106AA7CF22C268 -464027898B311613E06E1584707F262F71D9F49D2149306A88E02BC60BBD6BDB -EF41D90F19197BA9AEF32B5E63D5B9FF41B5602F9F786E76621DA54D574981AB -87A72081EA05D6C6BA940EFEBD0904EA4E77BBCE17E20B42E1722617E0F6EF32 -F1ACDE9D758594E9C81049CCC10605A27C2A06872FBA9F159CB155609B496ADA -4886F478E44029B5E620DE8319E257697E93E1CDFD27D560E2E4D34507020E2C -D9FF06BFA14E056D81DF701FAC3ACE4BE6C098AE116E079F0044391EC1661F6E -7A93B9320BD7F91E8FD2E8EB3F5CAE997D5CDD35107A1D35302260D1499B8B65 -39625B7925F97D917B66BAFEEA992873F07220714F192839948CEA080BDB9A03 -77B9DD032273DDB5629CB28B5D8797EDEFDBC601823E038384C90C79012A7D96 -8F27784DA15BACE21501C26E3AFA5DCCE81B52B0ABAF71A35D33103EA86F2415 -A39A830D559C5C6CA7423945BD3DFA942B20A06D7A8D8671F9831DBB52907AB4 -4E54776D29C6085CD9970B6DD21DD3EA8EB09C49CBEC6CDCEEB0BBB1B8827109 -3BDE64DDA024D67F098D6C1998506DDFF7907ABAADA1C39C759C850E0C6F8E89 -A392D1C9329ACFFA92D361218D75E115F70A47C53B73B356D703E9C499AAD098 -AA9C8119EE9E9708A9EA3049E976FA19AD04210D5F6092C7903FD155113F3A3F -269B746560F70970AC9F8D09956E0E84DACE4112C4E7C7F6B3F0B63D26EFF95E -2B2E9699D16BC8AFC4AD9113AA3A974C9E82E877288CF71E9169D2DCC61AAAA6 -C536E5604EF0716F6487292BBB677518504B52C63822BED3BD5FD14EB41EE6A8 -AD4B6CF90D39F98E12A765B645CBA3E8552FB9A986390212CE119E7C3DD675AC -17BD006144BEC534DA2A860188619F17589008409C5A309CB83FBA70F6446B6E -2B56991B6A03B1DE10C621591CEE45BECA27C54BC8B4F1754A9E8F660812710E -117850E1BB6FD89BB13F8CE391C43DA89EA67E9C3E7A4697790EA26B0E4E2E80 -DCA508873A7AFFC11B8C02EF86C2316E8D8B6BCEA37F81A3A87546705F070C3B -9D4D28C366CEBC1EE485B8E2357DBE46E86C87B9939DADA60888AA9F1B92FECC -CC1C198DDB594BB70A8FE690ECAC21A414BAC89BF019F34D2A130F485EAE35B7 -2A10C67EA3A48A4D9734759CC93AD85C6A570500AE5AC9973FC76EFA06BF5DDC -26E20E28D16B50957EE01AF2653F8D860817967AA5A9BF9BF7ABCDA710E9F34F -4F0EBCC32B3C9C2971F6225D2DAA6A451366B83F32B2ACB83E746D365B2DE38D -C1AB7447FE7B37F9630E410E5D8F0ECE74DF46C538947B3A167AD9F3E4A7EB3D -60F5425AE75AC3A27D39311DA35696C3DC7282AF1532E7AECE63D13DDA0296A2 -01487185FDF1875AEF55A36C17D6A8DD329279D229259463A2F05CB7A874374B -E2320E1F6CFECB9C1CE62FF468C29751ACD9754AF1EABE8E7696C2888914416E -235B6766F20FFBEFF285277B639A51EA2F2E30D207BC891B00F0436008F980E0 -9EEE7FB375BB069B9E0BA11DA951A99D8E60B4F920A0495C247FA7DE904765AB -DB5C3B2D634757E43EDD6FAA4DB3C67F82D6853E1170F0B2D8CE496DD4E72B0D -28277BEF172F1402959F64527F9B640619F04416DDB9D05FB2ACD019CB9C119E -E544D24EA6DAC5C69785394EA50E6EC9AAA9E14B904EAF29A733C6D7942B63F4 -85729686742F26DEF78DF0DA1CA7CEFBB684F4CAD99021A3B3D1FE03B9C5A4B1 -BD04CAC89BB91B11952A2B17A61789BEE0C54B46C03FE9A1AE73D17CF94BA30A -237C29D414C3BCE8E3E2DDF83C0BD59DCB66C4D2C3DE73DA8378F3C6C8035D28 -7464399857E57651A53E9C4AA68DFCA91B2376CF98AC5290FDB9BDAD9EF1604E -9B0A70EDDA1E564B6D2456E7BC722454ACA8C4950FDD44B6EB9AD01169A9F845 -B06A0DDB7897C847A5B1F42258AECF3807AE936C8F52C3A7A0A85D68160AE442 -FE81543DA6702D76AB6E8701F80DFC1D87C961E350D0E52AB2A298B9E5908600 -7E14D2A87309043CBF13F69AEAAB1BC239DEA88EB5176624F6046664B1D2691F -FBB2071D3706F97DCCA355A6DCC4D09FD35DC078FBAAF672FFDECEC61050A120 -10B5A96629041303FD01ACCC7686165DED6AA712FF8E5E85DE33C4E7D877C49C -6C469A90410BAF60BE65ECD91CDC2EE7AC0CA8BA7B53865F26092BFCAA0BCA77 -B80DC51DAD09C93C8DD8E43502B4B68F3D5918C3492196292447732BA90F5AB4 -9F5E1D634ADE1CCAAD028DE5EBA9535F6FC5908DBD2D643E0A7E059C8C386FDC -E72659C0033F535C0D7F6B98D0335552D0BF3C6E302B672A5EAADFCEF81912E3 -8F54E6FB7EC2B325125159713D0AC50DEE3673B9B148643727E94C80971A2E73 -5E1E13237BE69C84FC039DCE02ECE2668AFD047F21A61BB94A9F498C9FE5CDEA -B274B40728B6F6CA9B6C15BAAF92F465B0D7311B46545CBA90D874839443CCB9 -3110F052EB247B24B45A3D2FA6FBC7EB2A4BEC2A5892914B3C5EA3F4F9B9DCBF -6F932D95700E045B49E4B1F2C9D2A42CF39CA2F5A2654E6E8E6E92473D28AACD -5E35C6705EA728F704F5996D286BED433F976AB7E018621A577AED7C0AC0A84E -A032FE1869F603E6F20386E3A190A30A21EA886249ECF8CDDE2C33D73BA8647A -3DCA7A8DD9E8EC8D9A415D126BA38B6771C489DFC419303EE9C1B83FBFB3A0B8 -97D64F30E4BCBEC24DF603FF3BF541E00D5804B6B6543D3D2B661CC551D497A9 -9DFFF535AF424B2F3150BB39AAE8CDB306AAD37767BA10BADB031DC2FAB16955 -EE78342CCC0E8B5976BF98F215461A8C6F63EBE6E2F1A1104662DDE53388CB51 -8B44F3534853B8095F3B746A2459C2EF800FB1EF7F235EBAA9731E3AB3BE4369 -1D3636E3ADD5BDF0C34FA80E90D8A1DDE770943FD196E0A7C5F1FAF6970B34C6 -4673AACA6B2B5C12B9608521AE736C1F4B97209B063D991300ED5AF3D7F27E76 -68E0B858FD8BFF86581E2B9548C691E3E5D9EC4D39C9715CDE86C7D22223CCEB -8A38C776A30AF14912390A7546DBECECD7A687D4F08646E57A12C80DCA022B7A -33399761A50B8E0ABEFA1163EDEC3DFB5DA3248792EEEDD894872D4E6814B4C3 -548BAFCDE0CABBCDB97EC6D1BA47F2E77CC1389BF19D73661749AC33F46A618E -A665A85776545BF9662F2179D7BFD604FA8EF4700591AF3AEC647E27B24B76F3 -133F9198DC15C1AED830E737909E43EB91C334C44BA35810007A3888E33F5DA5 -B3B2C35481C648AFE630CC3E08F77744E401B2934E407D1EC17ECE737606B076 -F8DE8EF3344F57495EF49D11580D6FB28AE0B1422521B320843B13467501CAE2 -3DB93D7BB779F73B6AA30050DA74BDBC3F8DBB30F32EAFD07734A151BB2BAED5 -C9B1F790059339B64BB4146470F30928C9A49AE88906BD6FDB7431A4B50809CE -0F67ABA01CDCC2320B0B097187B9299E3D80CDD7BB5DD5BFA7B28D924C5633C5 -45A23CCEE097C41C3759C1FA8DBA0DD95034BCA89BD23FAC18C70093F40FF2F8 -0FAC5DD4835F2DFD40540E9A9E9FD951A8AF2CB766597DE00147B163BACFB7E6 -EFDA4DED594F1C746D8B46A1145E0E4058F5917B3F21E9BEBDE745EE72CDCA64 -FB31EF7A2E55265F32559480E2B6726D3DE26FFC97EB4E3160F117E890C4B2E5 -8DF310E6A728ABA85540F571C024F8DD58E1D7827FE97CED5EB31547EBC36415 -02B8C0E10B7E37D816F01D56A364B8552CBFAAA95BC4BDDCFDE91CE0EF005B4B -7AB56FFB47A093AEDF0DE1EA48FC8103CA3CA1470864D2693E360006D05668A8 -AA422CCCED20DCEEBEA5CE0DA1EFB00FB93E922B18124FA11A88D0F6E0F719DA -57603DD5DA42E1C56C2FD9E5415AA199D4F334C151C1157E75C107FBBFCEB706 -5F4EA47A29B54ED8CAEB8DDA2F53D2A703B95487619780A52DA1270011648A28 -AA64338E04AA5B92C1EDF3D8DA34FA6D227A0325EA6F22E9B38B6338C657BB21 -CD4C582DC04010330F62923F817E4EDC6E5C0E6500F2A975A8A95BAA30C4A134 -BB31B5AC45A2E7F6E9CDFC810D41344C4F606049445F8E93D74271C1E29DF7CB -5459593BA28AECF64D903D3E4D77CF5C04B06DE44A41EE4D9FC769854503AC85 -69E4A5106E84016DE3D59865D4AB30BD6C9E45C45DCB5408421CC50CD6179C85 -34E55CC70FBD8FEFE9F1D5160664981716E3BC7F24B6F54E0323D9BC4B692971 -24419EE62D8B0BA726E2B4294A9A76F328B8101DA29E78BD5C4AC383350FE196 -4D42DB1653637D19530124858950C22F1E9CF5BC07D46B7A58CDE19CC88DCD2E -7FE4EEFD8AA6047E919823C8CAB2EF5274F45E861E6508CC11A8AA90AED2403A -B2BF1315C2157B3B50A3685205D93E40906EEE9DE5985405974BCE0B84BB37DB -080A45C5237B269B93C0A7CF294A18B45464A41F604C494CBEF829A381155CFD -71CEEA54CC39EEDB6DF58A9896246B09F95DC6BC40BA6916AAB5ED3D24F66154 -3662F8978FC63DA9280FF7ADB09EA5BA79D3B66E0C88BEC1EDD78DA93839073A -A4D7B0E627000C4ABA76C47CCFEE92E319315333A5584A951E34C55412049C4A -A5569FE65A006F77B416E0530AB6A8E7AD6C72340AD4CE25937158FABB2153EA -281E1D840206F5DA38E00815E9081F81DAB9FAA8F4DAB305867AC84735DB4F52 -A36129929BD2084A8EA37BB6889695204BF7290B68D5E722540BF8A276F8BB6D -451D582EE59D2FF03F6B97DDE05FA00C3D375D2D0AAC8FE298F85CC067B15481 -48D70B6A0354C705715B891915FE8EA45244677B9FCE81E72D66177E309F3F83 -F744B9EA9E55C3B30DEC6E5E03B3988FD526A82A5E8E1DC79127FC62B2FA7949 -B3AD3148868DE22BD4B5708E32CEAAE6ADEED1F463EAB9692411E18F8D6BF391 -126B2700B4CF3B59D02E3F8795130C96285A63FCD1E0F647ACB1D35E9C58BD01 -1DD06BABA00CA4343BEBEDBE677E053E9732B33A7495DF51782A07DA07F5646C -770C957AD915CC70BA8E08BE7A1F4E6BA5BB9C603E38F6FB0A2578471C4D02F4 -283069856D926B9076EC73AA39CEB0A061AFF1575C7093FDAC9F89C3DC06EA45 -06F3C2A3BC9FF21128B10CB758DF0F099B459A5264A8C24C098110D2BA1A8532 -8FAE146A91BA7D033F591AB1A94B8A6FE0FFB610F698D216D58B4EF6C87B1524 -8037CBB7E23D8550A620341C6625A1A2ECE7CEE2598D66277F857231A36155E3 -984F147783E9B93975AC38A29F2FBCF704C8A04AD84C3E04A12D2321FA56811A -5B6744813CCC187968C5C26BB8D3E6615A912FA5369C01CCF8C0DB790593B190 -1A90CFB5339B8771F325C5FC448D36C7312B11A15A8635BAB59CF3CAD176131E -026F6E141B2619EF7F3048750CC9291397F141591EEC8B612D6656DD34DB54D6 -DBDD303CED74BE76664E7DC86FCFEEF2001C9DBA56418FB61F589566A47AF36E -C94671C5E8939AF9F4D53C0DE7142B7B63C86AAFA65877EBBB48C64589AFB2CB -1280AC099FC48058855CBDEB6C2D2A0D092267996591DC3B5EC8252984E9B27D -2E9EDE8CD8303F0905DBFCAE497DE1B755B924452CDE11CF4F20893DD6FF7251 -427F520FE00580DAF1703FD968E0F8ECCDE618E1EA5820EE6CFED97C78864EF6 -26FAFEEE194A268F24249D44829AA360D731C34DC285501E966A959180718F72 -6330E4CC060588A2F65AE64A720DCAA818D49D4440F5D0B6C1F6C3A107E12445 -F1BED2D3FCBB87A9597F01C7332AA79143564056219BF87D4B907A04F77621AD -054935E883B2B137D3D1C4BC792E8335CA08B6D83227F35736C41312A0BB077A -60FC6488C5E02FD51A10AC113D4EF70038C649C1677B2204A77F2ECBE9B3C341 -F4126BECBCA61E3F3801F9188A3775924A62D30FB096B440286FA655EBA00A74 -9A4162904BEA07CE68EE76018346DEEE20839C9A2FF71179B58E1D4AB30856B5 -F5D97295A097174467010B15D733AAC5813CAA633746B430B1AAF9F997FDAAFD -436844D1A56B8E25A89D2CC4BA6EE7ABD167818FD4F6C747E07B262C99EE2C35 -323F0B471586CA50F54C6381B052B15B0C58C19DEA82C0CA29F00400B727419B -2379979CDCBFA966AD513FA903160C571C3BF1BA239540B11EF2371A3880837C -6D6CA2F374280CFA1586427AE975A2AEC34244874E4D441DBAC6CD1828841C91 -069AA87FAE849C5DC7C9EC1B9876E59F3CCDF8BB23D939F5348D7486934BFB02 -CC5A22541ED352616830A510DE7732E5D8F7E785BBD31C2BC9D348CE5632654D -2C1740F89D57FB2AA1FD8FA3304EA03F757BB8F498ED98E48485722E78D97B12 -A05F3A28438084D1CF90AC4C3FFCD7B3365941C45E1E02CB13CA1E99F7FA1D00 -1C9D489D5C95F019AB4CE89FA3B6604473DBD2CE8E278969E0A0FCBCE68C23F6 -9381882443D3FC16966555FC222F3FC4B1207522201AB7A15A7A6F22CDC9D392 -360BF4C95DAD35770E0AC7E5EFF015F2C74ED7391F40EC94B8D1C163B5DEE5B3 -911A20C2625AD3B24BD94D2A42405E655DA47D3F94F882CA2F479437B4E0BE71 -8AFA4482C6FB270F8D05B4599A01403DAAA90C01DF3AA7C2BC7E66AB6AA833AD -FB6E5EE13E45CC7CE7E200FBFE639F9CFFF5D08512C02764997FD28368969BFB -0876F236EF6189BE73AD827332DF1B2EADEAC0ED3B939CE5BC3CEC78975FC636 -44FCBC2CCF4396AC7343EC62E0E4F3DFFA2B880BF31D93ADFE201BE9CCEC8BA5 -0B9B919E05B851E0909968DA259EECC6AA0743F25247978CC09C28C4F878E29A -5070E4023BCE95FE0ACCCC01D0EE219FA8344E8F6D7D4347563BF8AC030B9097 -41F24D4BC9494915A82EE9FD37FBB6A46BF077B728FB569B1258CEA5F51F36BE -4F4D0F890D782E44748CA3FE8C8A515998371D9C7D2311F192B4B7E7C68FC6EE -3F7136714C282A2570FE591F247A08319CE9EF1E43274E4E57166E31A2ECA506 -85350DA31AA4C33C9687F5210BA225EA1007C444FBFA2126769767E47A967884 -9F68589E4BAA9ED32A7A466DE35554C132810C68ABDAE536D9D884352F28EA02 -8A555D2CE11F30598F44A65E2D86B43ECCBDEED9E4E5B5B7DCDA20EAA09D9FF7 -422FC91F2201431A9E8FC624FF44D26C0100183D77BC7E6B1A6CFBD3FA8BABC1 -AE4CB0FD382E26BE0A83169B46D91429DCB746A0326243E212F802AF6A56C709 -6E70C6C7CA3775C382F911F6DF3D26A9F9F39C6A49A61FB0FDFD443ADEB01F74 -1254040BC520FE9C85FDDA97E17CACFC504DB28E16BF4E50174DC918B0EAEC7D -D87899F951DCFD06A4E5F5A24FAF1F5AA8706A76545FD0D88F3C8E8DDF477440 -DBC9396113513CFCC3853C7758A936A089DB60888EF0ED170DD9A9DDE9F14BCB -7CE05C95850315F323FABDCB1BCEE1C6FE61A02975309083DAE659FF4CCC84AF -A6091C64B782D173CEE55362C24993238BD7B04277999D66ED94A1C4F38CB897 -B4DB3A98C63C13DF8C2CAA974CE91FCC4D14C4D0708482505E90F21196EE67E3 -DC18AA9EDC1C49F513DB9222691CC88EE4854F29D8744E5E37AEEDC36C0CE33C -D666B5AC9E4E3D3075BCA7DB46980A -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMMI8 -%!PS-AdobeFont-1.0: CMMI8 003.002 -%%Title: CMMI8 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI8. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMMI8 known{/CMMI8 findfont dup/UniqueID known{dup -/UniqueID get 5087383 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMMI8 def -/FontBBox {-24 -250 1110 750 }readonly def -/UniqueID 5087383 def -/PaintType 0 def -/FontInfo 10 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMMI8.) readonly def -/FullName (CMMI8) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle -14.04 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -/ascent 750 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 68 /D put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3C05EF98F858322DCEA45E0874C5 -45D25FE192539D9CDA4BAA46D9C431465E6ABF4E4271F89EDED7F37BE4B31FB4 -7934F62D1F46E8671F6290D6FFF601D4937BF71C22D60FB800A15796421E3AA7 -72C500501D8B10C0093F6467C553250F7C27B2C3D893772614A846374A85BC4E -BEC0B0A89C4C161C3956ECE25274B962C854E535F418279FE26D8F83E38C5C89 -974E9A224B3CBEF90A9277AF10E0C7CAC8DC11C41DC18B814A7682E5F0248674 -11453BC81C443407AF41AF8A831A85A700CFC65E2181BCBFBA9B440A6DD72BF8 -97084C906B05FAD969086ED21AF0AA1471613182B26117D7494DD9F9270EF3ED -8DA4D957225F75D060237B6DAAD5A0AE3E702B3D1C437835B93B8AF1F9E7D966 -E739CF3AD5E256F90286A34069E5BB4122F94F18F3485658D0D25B938522A879 -8215A417CA2CBD20F71C5C5FCDE21EEA7BB27876D93BA667868A419287FE59BC -F538980597DBBA743DBBDBEBC61E3286DA7977833DC8BFC5E52FF5DF5EFD9A92 -D070EB769E31E760A50FDE012DC0057835E8B9B046FCC83F1A0C40326AFB4E3A -0CC3BFA35FCC64E32854F32EB7DF10A19F95830136BBB8139DE1663B7FD790CE -464EA431AC109FCA0E03F3E0D355FAE20AC8774D6B1CE233C27680C77DDA7356 -560A27C75993E8C980CD1E3B0683F7E8A05119B3AD567DAB4851B66E418687B7 -F9B21B3BEF607918D5973421B68E65DFD8B6C8DFDCF1CAFE2637D365148EBCE3 -FA4CC00052A2A522205EA3AE3461CEE02042E1A3F11467CB6C8C849B200CCE3D -0BC188EC7B934CBBC0AE2BF5DEA228181DBF0F774119F313516E7D97FF532621 -9278F856C166CA6547504F34991D588A0631A5CD06363F3FEE9FA0772C783447 -ECD0A200929CB58EBFB6B72008E4082B5D14AA560C24915B9463A92F38237886 -C35CBB2D4DD6D0CA8C1D4EC46093041C6181C2F6586EE3E7D4E647A107B6DB23 -DAD9AB5A0C2905455FE58075EFF6B48597078BFCCDD84812B98986F34987CE49 -7EFB19814F2A58B0233A59331F6F8EB66401F04EE7B1ECAD9BC90A2BCEBE213D -DDDB1F75C83609ED6A669A0CED58B2E269E76ECF73616D94F13CF827C9BF354A -E82202988DCFE856786B8AE569AFF3105B55C72C58D310FFC0E10B2ABAC8DB06 -40D5F72E54770E9DED1AF4616008595B8481E3D9AF4191CC9A5BFD9DDD01C9F1 -FE7165D21E488DB40879E863D470CB31CA06E5B5F1F8C3CCE04B697CEB0F3557 -ECAA358D2EC2B370519CE06138FA702314BA01F1F33881825EAE1230098BB3C9 -59666983275CA4E8D9DB34979F86535577E79393A72F84B0F768FE8C92692907 -15E9FE9894E98A0EBEA490CBC8C7E5A9F3E43B24C2C5A4BCD71DAAD3CC0B8B82 -AC13933543E295C163F61C9FD18371CB514493F90BF7FB460C029B8DD2E2BF05 -FD66B451DF277864DE1EE42100BF29E01A50258C2758F3EDE211BB3457B8243C -20BE72983FD6FA2581C5A953D94381E32E80D6D6095F2E93A5455C101BA71E8C -E560D4694E4C167EFA25FB1E9D214AEA745CE34CAA5468FAEF8F6BDB6C6BE8F4 -3D58836C26A2392E4C4DECE284A90DDB3858A16D6135FED655A600929DE71605 -6CA32F6851A2A6F71A9DF3D5D657593BB729CBCA2F4B059365B7263DC08AB211 -9C547096E6427F6AA53CB2EB87DF0AFE2ABCDBD15D7EF228D3396413B83C6B4A -79E41F9BA55A2688F62A10472675E5658F151F9FD6634EC94EC0682C17448024 -CC1633077C07A93E4DA8749D974FB8F4332B5DECF97D749C10DB60D4C90ACBFA -E65AE928C88BAE19234690EEABDB30BEDCEF2660D7464D5071058C30C572A2BC -7DEE5384BD7614A4BEC4C84E18CF7EC81C810256E8CE6520466C033E2A36D3D3 -5D6074B3857415011D8D9D49A474D994571CDBB89AF92BEA879BEBAF67663F5C -17ACAE809C2231EDD0A76641BA52FA7B19A2798D54A4A9B62C42F9905851229F -2CEE0191C8AA5AC12BB0CE9E5E3E862683AB57DBB4AAD6AC0FA8BA4F408D41E0 -755F72B82B7C18EC6B13995BF7AFD66AF4BA0EA7523DA8B75EE751744EBA9CA4 -4E8BC1FB37734503A5B24FB9F2C2D07A47CFC477F02413D55BD7DC180B0344E8 -50248801FA6BE26C97F397797F5F9DF762967E7CD92CCB8B2E587C92177619A4 -BF8046CBC72C6E69DC78B8CB6B7381A290080EF59F5B9F29C1167B261C932E9D -010D2D14BB425D157F22BC0305770AECC5BC80000F8CCFB9930255A68F299ED9 -D3B5B83A2CC00E3305EB281E1A7054734661B175C6CA0AF168790985F173DF03 -A8693B677BAFE23C3CF833FF6463B136FC370E4F0C29E322DBEF637F62C33CD9 -B0A8338FD67EC628E3BF2FCBF7CF0347D5CBA1DBE6DE878DD670176B85F69EF2 -3C5CCA1BD2B8A385F113EF1CE522F5A6AE053B9C1E39408C9459DE3E7FE2C4ED -77F026B0081BB80D40185458139C16333EA27F43EF1204BFBF80BC5301B2A3AD -B10F7EFBB4F5B7E04DA1167F68BB6D4049440B0F57385FF0A95E72760C6A12F8 -1335BB31CB74081FBAA319180DC00113CF50CC5A41D2E751E055DA1429CD75BB -0060C21CED634FDA106C49A12B356129D010E29F2919301AA7F80222AF3905ED -672FF85C9897A70241E8DDB9A53034B6BB44E140D9E739848E7A782F24B98AC8 -00DA09EBE4532787E5CF3ED815705F659D8E52DC2C2D4949374A3BF192BEEB99 -1D9A90A4F3250BF8A1FD40D91F5B34AF2CC561FD02FED712500B24330D87DA9E -4AA46B6E34BCB40B1F73A1DDE07E002B9478E9651D2BF85E67585B6ED812BE03 -A594874A235B1C1840C4BF4BA6D863583D8C12DB49EF7F8CC24DCBB6B21FBCA9 -378F3E2DC406291AB324571F76E0805DF8826090F0E8B50599CA58D124653D16 -16C782B01C91A6F3DA6346482E3163D28D95EA49866360147296838A3FD0CC53 -920F91D895F839CB61FFD2FBA296CA4C6304EEE579782AE5FD33D0FA652BA7E2 -CEC7C01DD0D3E0D56E6177EE5F609A396F7FC8EADABB465DBA7F384E215C4DCB -E64F807A50A461545107F9C3F7D7CC7D33E6EBD6D9228B1DCBFEF160703E6129 -0DCED8D45DD54E2A36E698A616E7906A50901E453BDB2A363EB77144E9EA6F2B -6BD927495EB0EBA5755165707CCFBF8759CE5856881117C7F3EF6D494EDDA7EF -E499BCA56C86467AC573DA9C2724FCC74BEB331E736FB093DCB67DAD42296655 -415D110F2729BD1D55E5C9CCE2E724116F45FB2E66AE0F790258851A5C808762 -68B8A110BD326F8D3EC45004E7CC08DA42F6CB80A6B6E7C286F139534A275BCD -2F812993DD9C9A1AEB5E7E4BDB4805DFF3A7030263AB060C9B74F0C25C5B9005 -965284884450CC2815DF28D5F9B0496DC7A3AA85E1E42741E1538797175C28D9 -FD904699C771FB066397FFDEE8E8DD1ABBDF67E6BFEF95BB700A7C1BA91354C5 -42EC3864F6E19B379E79A1CC3C786C0DA146C6B0B8E507ED58DBB1F12F613A98 -0E1F8967991427A22ED323901C4B83336CD343212131E8B59C2F5D232702ACC5 -7891BFD4EBA5D0FA35AEF9F3520CA82D121BF6885BBDAF15248A9E4649ADB94D -0735CC4D14E1D7275427D00C8E709579612F7F74DB6FC218C10C278CC63E2AE2 -37EC996B10C0229D687F0DB5E38A8C4DAFB3DD8A9E7ED37186FEFC97790A1EA6 -636A88FA9FB4D282234BAAD301A1F3AD33F252C5EEC49410562FC52809CEC466 -A0F6D148E9AF19D6DA2337C8283FBFF6005C37AAEB0B7F7217A8DC6F949B9984 -72DEF163E4D5ECE4288404448C96A7FF0AC76F732D50AD63A1D286C9180E80E7 -C218B1F48E3034FCABA6BF262CEECC284AC29E9F3CA1CFC1639A681ED66C1FBA -666F073D45C84A286E05FF809D4764FE819B6A330E73695CCF2F448B4D4EB4B3 -F63E94EC289807A2F9A1159CF328C002B467B19D6E9454CCE36FC19E0A214190 -B251818DD456EF658B0398E275514B72D9C1DA5F806EABCF1DD56BC025D69FC8 -A0C2FAAC1892B64D2AF79EA2F57F103CA623E440307600D50E783FAA998EBD40 -51D23A0CEFF8D8649B48B982DC38D613F882DCCAE5F51233A641B3CFD783F830 -D984F116DEA3ED8F0D3369AE629A006BAD4523F8E3C7C6B39A6C972508B67AE9 -32613F28CCFFC4BBC86CF31A0C25C786554F7A1F3DE97F5CFD1A941F775067A4 -784385E2D02EE1FF886701B1E87D966D3F500E15591A5012E645837FE2DBE3E6 -A3D375C6CA0ADBF96B33EC3FCFFFD888D7344B31D40427B8A8BED0FEC6FBE038 -1FB5F0714C4B5A0E607E215B5B7F76ACF0FEAA4C9790EB7E13C0E3933B7C63FE -5B934EA34F4B741C3667BF1735C685CECA63507E6FB9EB06AA010311F12AC1AB -4CE3FE8D1EA1EDB3C700BEBA516FC71D740B1CA1A60D4578003973CC3EE21DB1 -58FB1CF7E2EAEB2A4A6C742EBC3575EE6378531C6EFA6E6986E68B8E25CEEA67 -A59623FC1ED2ADDA9D72DBA627D179E47DC7F5551E07EA4D54ADB6CC8109D340 -7279F288E552EFD79C17DA3431E53EED66D16F24BF86468C2FE7EFF421560500 -12FB048D6CE2F370BE4E560F8B4AA12362ACFEBC839351C1D5100C625B14CFDC -747B66082D4AD5474A63EA0054E9C3E6295AF6B133348487B0471395857F4B73 -4BF8337DCE2FE2E1A4EAD7E7BEDC822BDDCE42B79B308C11897C98E3ADE253CD -09CEEEC0CB1DB66AB072E36E1E04911F40B535B0FD85982C21B8A587D65C38D2 -DBC5A07A0A26DFFF7460F10781069490AC1B611CF7312A14B4AA6005A4582C5D -336BCC30EB47749193BE8D457A43F54204B070DF5AC2057B6437E23705C7FE8F -7BB150560F7044BE3E48EFDDA539FEEFB0D2A7856CD4E405FCE0F5EB190D91AE -578E2EDEB9ECA218573BB1A8EF116043A27DD17A4047BCCC7C5F3C563A910778 -45ABCA32C7347E6180ACC86F9D665FF025DD8AF514FC3724B5C3510F3C37E0AC -5101D1667C6ED4E8F37F06CC2BDF66CB5A9FB7C52CAD26344FD1557571336A1E -1E340EBA149B4EB99016D1A411FB874914AAB2A415CE3F5FDFBBF5AFD7959B9F -CB127BDC68D2A2F3F07FF3D4FF32046C0371CD2E68A6471E46B08413FC3C7A80 -A107EEE57979DB387B2206D2810DB310B7232B2DAA385256C8A58964B512003F -A0C24ED21809E2576229627278118107B9C32345C1EE8C0CFB452CA362379369 -31320DEB5371037AFAD093B61E8AC7A6DCF7D49C7F8EC32DC0ECEAFD7E892810 -039570D2956289B15E078C2545911BF535F72F7DAC619BBDEEFA855BBAA81704 -18F7D351B0936357085A32157AD8E27438A58B2397D69264E748B0B8D01B33F4 -D04DC59326A7DED39E247A1C1A1AE49382BDBDE9478A1CB48F88BDF14A268B40 -A40B9FBFC4C87FD3DF1EB2464C3C14E36CA41E09EE0A9B75FEB0769F9ECEB1BA -EBF73B818427FACDBC33BB95B9654F31C59A766E931C698A8608F15290FCDBD3 -5C535D9036A19CB7B55BF54E96F9B2206DC71624E2E55FE632FDFDEC8757AEA3 -1D83D190ABED5E7A7AAE2F41FCEBC7C18626BF58F9E9F02FBAE0C8AA85E9DB21 -A3D8907522DCBAE4923C6A2A09FD2F08FE32215C544AB577B337D929E625E704 -E041C2381AFCFEA37F3133B6CA20093EFD457C772E428325E56C9CBCC447EF9A -05A8C3F28017DD4FFACC51B38E4896C5044266EAB4EB7C13FE855E790DCF8A17 -B61B1D30DD866BC57397EF6297C4891451FD6A5C6AD6D7446F58F56A68650908 -224D9F4C31C6906FD29BB51DC947465B808438E6260325752808963C808A4AAD -60422ADD62CAF315F6AE92FACEC55D5B682089AC0BC051CE1E2C06A3874736CF -0DB5F7C8F178479E4F11665402781D80397C75456F5CDF0A4F382A19EC6AD64F -71A9275264800E178F212269154DD8352167C57EBC0A38BE794AAD1601C8E541 -7E1AB8E969A76E1EB4092644958FEA2AD29635E70C4DFE2EB0D9B3E1644FAAD9 -B27AD5466EFAC724718962B62E7B8C32F412B69DFFEB792587D571FB5C591D95 -4CD441662CD1B07595E245FA537FA9EB5A20A97E5C9251EED22C9961B48B25ED -85BB7524F635F9CBA3714C6D60A6BF920C45A64F4C366C1F9D22F53084997C9A -EFE2D79FBE3347111F5093E271DB7E3770B35D253DAF93653F6A23FA145AD775 -AF11E188EA0428137D9A14542E3EDA6F7B2E5AA86C9F3D3649A85ED2F020C696 -01A339FE6D7E42BC548C8F92A4E3809C67A986C99418772403D16D0E8662595A -1F37563671D6DA0F36CAC99DAA8FEA215DF7D45E61314915A30A22FCA86A50D5 -2FF2EF08E240F9FAC030D92BDFBE40F1972DF413E6B452024CD11792BFDAA2D7 -C82716528AD4B3D637BB43E748336DCC86A952BE96F1EA423E31340FCACDC1EB -02EE932F58734AF3A5B2279361B63F1D824EE3BA9F4D2EC7B33A300A1CE8CA43 -24616444176DB8099D85AC68329B1F85E4B5B16F3B396FE2AE7774F3065D0203 -AA140DC128D6F935C44733EF585F89E8639A2096A225A2E5E49D447D8AF9FD44 -CF6C1BAD5C5E5262AECC5543EC8199B00B72BE32A0F110F64A1D0D5CCEF38FD1 -155D6198E9A343702F8ECF5052333272CAC2FE016681E12745CBE14E1065EFD5 -407DA3686080989F6F6D650A9F1EB3A813B070C30C0D3B4A1E9C206E2E4DFD51 -D8DCBE9AECF956640A2E79F1B4FD0EB8E0449AE1B8FFEBC43275743B4D7F6605 -0673B61EB3189E74F51F3780A91E6A5C6464C8CF7D563D9958D46F39B1A12087 -6BBD4898BA9ABA468AE1F24115891FD3CBC2195F75958E26DF8BF1B93F7B521A -C12112237AB23A8E5A7B7D0DC4C53692B35F3CD813EB463C0BD3A6486B0476C6 -3B36DA71FE512E5745D097FD4AF5D056E434DEE2AF926B2EE79F7FC4FEFD4130 -BB4B4BE01E5C720325A4884507CB51CBA4FFB615B78A4182444F0ECBE4161A58 -E86FE1DA2E39C2BECBCF1F1D7B9B776A26078FC252128FA8108CB83F673CFD37 -CCDA493234FB93E1550EF8D2DC049ED95B00A8A57834B024B277D3DF062E748C -B61F183F2D72AD075474F8165528CE75E4F40B38B0FAAE45751C1907F8D31619 -E88EAB02EEED415F3EE3BC5BECC6AF565D34E0BA2958FF337A2B06012DD1858E -C53DE52C108BD5AAB76C882198C72CDCC958D68EA8FD26F76F04EC1A08B2AC3F -A6D0E8724D2656555DBC0C8C42A3E22ACA7E1BC8E9F897D9AB692E0FB9EC32EC -59E31CCA4516A3C3BFD5411BAC3DEDCE374D48681CE7D67DEAB93F5B5C5290AC -FEB29C5EA2C98095692873D36C7DA24847B66F31E4CA4C7AE5C79D7CE4F0532B -78620582E3731A2A6533A03E7155B33E7CD142FE79F72721862EDB24959B9783 -F834CB616FFCB2A23497BA6D99AE34DC459A2F7B3E4DA2B54BED118ADCD92178 -66C40F4E60F6E1327D5DBCA645A2A7C770807E6D7E47E1265C753F8793BD2D1E -BDCD749CC24D4AF9315A93F01180A0F9A7F420DA1B87664DA5FD967131273271 -9DCC45C3D57EB9B8AF14771E8E751D88B98D2FFDC72F5011D402EC34FD010ACF -D3B0660304725191D64FEE106253FCB3470F1A16EB7B45C1489D3534BF94F740 -C2781DAFA5E8A9E7B25A85BD7935DF3ADDE08C960E283D8FC3976FDB4085DBB4 -B6B35FB239C28C785B18BE4FC98F3A5F410F562DB5FCA04E8074E4E790F4265E -F88117B3D0833AFAE6E8B8A71D7731BA6F14FD6F217EDA3F8CC687A494FC3914 -B84FDC37C8C335AB1E7E0BEC7FB6B7A595C50CF8F0080C8D461BCB8B579A5155 -F963B6587873FA31C3A6572740C63EFBE58A2EBB723B7517D2A243F6CB08A038 -54F4DF0F6692022B2EE8C6F6B73735ED3166BAC58D9216A06EA6FC7B63B20031 -D0F0F99D83D9030B413C2360DD2C553E34BD67851B743C3FDA676AD63C5BD759 -9131358C6BCDF05FCC048F4EBB9005899ACDD8E9EC9BB8C5A08E83485047D263 -0ED69B4D1869A38068FDA03524022A1D32FA2AE0BF728D2A654E52B6A6C90A3A -725F86627D7C3EC5AF5AC512976D35FE42AACA3FECB401788D0BFFD9F4743BB2 -EC5B4E7891F216DCA5A69E917A171E0069A03FB214ED307DE947225049D46E0C -4707503F09811A597A9113921AAC23AB1CAA9866F81A02BDF349FAB129F23E86 -E384C043053055938D42ACBF9F0EE86CEBEB011BD5BB7D593104140E6AA9CFB0 -4E0B47C91E504BB6A95B2CBC36EC03BE01897C3D498EB30FBE4BD9584B9D766F -CB3CC7C96FC8F286FD681D3B6F61BEA096CF04865BC90012554DD15DD81BDC99 -5CDAF88A278A7CA272AA93BF309FC2485B022795BA88EB5266F5C03078CBC109 -4CDEAD6500AC236E3B93A1EE0B562FA71B0B4D594E26799E73C28D23AF4CA53D -7EF51C2D2ED1F89DA3EBCF481A9CA944488F03FBC457E29B493BF35A0F75928A -3E11C87E17007E60EC992B63ACCFC6FF2217A30350F4B02E41B31E63B3C4A2BE -4F35AF890A75CBB491FAA34951434A91DECDD7828FBC23BB24CD54F54FFC0496 -C0B4F2B457397789B1CE9E8CA0EE0FAE10BDE57CA86155AB164007345FCE4444 -086032AF8AA352ECFA4F57DB442CC9D673A002ACE753F954 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMR8 -%!PS-AdobeFont-1.0: CMR8 003.002 -%%Title: CMR8 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR8. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMR8 known{/CMR8 findfont dup/UniqueID known{dup -/UniqueID get 5000791 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMR8 def -/FontBBox {-36 -250 1070 750 }readonly def -/UniqueID 5000791 def -/PaintType 0 def -/FontInfo 9 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR8.) readonly def -/FullName (CMR8) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle 0 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 49 /one put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3DD325E55798292D7BD972BD75FA -0E079529AF9C82DF72F64195C9C210DCE34528F540DA1FFD7BEBB9B40787BA93 -51BBFB7CFC5F9152D1E5BB0AD8D016C6CFA4EB41B3C51D091C2D5440E67CFD71 -7C56816B03B901BF4A25A07175380E50A213F877C44778B3C5AADBCC86D6E551 -E6AF364B0BFCAAD22D8D558C5C81A7D425A1629DD5182206742D1D082A12F078 -0FD4F5F6D3129FCFFF1F4A912B0A7DEC8D33A57B5AE0328EF9D57ADDAC543273 -C01924195A181D03F5054A93B71E5065F8D92FE23794D2DB9928A7C95D3A6E9B -8E92F84CA0AA44461D2F4FA0F8B81C6F5B7BE98C9712BE166610465CF689DFAF -27C875C029C0116DE61C21DA0092D029E7DBEDFDDEE3D67E6936623AB53FA2AF -18BEDDD7AC19A19CADB6ED6CA7A26E6044BE414FFF59C0B98D5819A6B881F9AB -7AD0D03BDD5CD309C67811D5CF0B93F6FDC9AE64F74ED4E81F2E18D880BD842A -DAFD0BDF06300201C6946087FC0B999447BC370200BFB8CA420B668B32EBC242 -6DB1546A7164CF55B332FE9D239B65F532B69EF9F4F93828A44C8F5C526126F8 -B7A369114CA68D4F98638121F4E17F351723D9F1A902FCF087F94AFD23876517 -2D15B482AF2D68C3F31FFA864E031596E597882578AC7FB0DAE2A713B065B374 -3E2E72519ED6D50CBCA40A7275A7109A4F3ED8A4566AD8832890D3D1F4899850 -9B757442B7EA355175CD5D6D8B4152ED2D7EEB4CE30F174FF672140354046A45 -7098EC45B9DF3DF5CF7B417E201DA88308CEF4CED8E8903AF24FB8DD0187352D -25738519ECBC70304F8F620CC45D2586619205DA3955696FAFFE2082402B3502 -CB682F410DE5FFE80A4DA3D3BCF02E35BD577D0DE55E7B8A33B7A2FD5136B5DD -A0BCB61F8E7F4363C21F890CF287304DDB8FCE7FE207C0D160B81E7EA662BED2 -DFF8C444E19C91E72254257CD87240A70F1A964FA54ED9ECF27E27A57DACC3DE -EABB92C085030870C6CF5C40B6E47F5C0AEB30E84A73ECDABB2D754EF6EA28BB -16EBD6636BC288E62F4A38BFB55F5F4DD20FDD77D767F6CB52F9513E8EB75413 -07F1877B2C01278675177499E4E8EB09F2657821613F5C7643FC064293EC6E9E -B519FFAEEA36B19C9D1302CF91FCBF87FCB57C5F995CB6712BB3D8681EB6F05B -B2A4195A3C73CB4ABCCFB958EAC533BD89560D2790CDE1444C0F2E4EF27A529C -F01052964E56F6D76A190E5FF45934BB711A3406284AF130D4DC0D8112BB3752 -762CA0200CA262359D4F54C0CCFA9A50DE18C7DB14419E2990ADDC4A54B94978 -D9174CA39434022FA77FB30179EF805E2189C35919F5EBE215EE2A00B4407826 -CE56329C5586D8B414770BA5D45513C3AF1931D632FCE69B4CA504944E03362C -74A1177C6398A61A12DAA0F156543E2A8E9969C4308B7ACC21A5ECAC8F172541 -1B1316A88C0C163E574FFD3CD22FF08488662FCF2F9344BC25D02146F36CA6F9 -E2D0130C654B7485EEA9A110A33AA0C769121F81821E9A2BD062FAC158359D44 -3F9D9947200EF1EDDD5860F10438B162A69683957300C75AF7546C70C97AB2EE -37EAAF0089E2623F787F252569B06C665FDB45EC9681C0774ACFBA76B98C4E89 -7EB12AA5F8798FFC110B49C25E3A483ABE83B0BCC6DF0578403ADC369E013762 -C9D08FC94D949BAE636ACA9F36F4E3F02296775A062077B011A705B6F1784D36 -A926622CB3847533D7ACB24A4EBABB14593B5D8E1DAE2BFEF8A51835C8D4E76D -7543C126A4271C59A5881A5AF89331694F84489CA66725995DC3070F306EA447 -CF30F63CD476A46D528EC1FFBFB8EACFA2BEEDCF54C92CE2BD26DEA5827186BD -3A4D1709415CEE7D51D671357B4A5D11E835F63521B9824EE5282E58F05A8ACC -FD249461181A38C2F47BAC4E79BE368D64F886AA493C61CBCB2ED401C8AFBA61 -59CA6F6216D941A92AC52ACB3D7ECC28D6A58EF4CC70BA6DE23E80937AB38E89 -6F05FDD15B954C0826636267EDAF9F2BB466BF79D2E10EED9B04297E6BC93069 -79581ADD1A9D9FAE9306F46AC95B98C60A2E53D60CF1AA4069BE301E17E25070 -F98DD67BD8642B1D07571A32766072E48BF27E1576FFEED300D7313A358A823B -49C8F135961B7E259095C9BB67F996CE0B90E95344F203922F47E11753F70D38 -2ECB615403490310CEE6C03AFA97DA2F47ED47125D110FA69725BA0018F6A40B -29A307FDB3E52322A77A0102E6F57654CF1E96A134D13860D83AFA0A41112D3F -2247A09ACF7D06713BE443FA27C7E7220E875965D53030FE7D2D62EFD2F1DB87 -5FB091FEAF599BA8C5167525899E578AB341BFE2BC4E53A047093168AE189237 -EA55F055514EFA939DAE9E859CB5FBCF37D99484F44FE5AA5FA386B28BB642F5 -5DBAF059A50FE96C7C6D834531D64F1F2E99AB2E96EE74D149178B1C0618495E -293973D9A03E1790654B67C0882376ABEC17D74785B3737D81644F28B3BC6FFF -F92FE29126995A07E0BC5EF3A4B93789A103C428943E045B8D1A5063AE71E806 -568D48072E53DEA85253B01DF0BB7367A6BE4DD7BE514AD74E3F77C825ABA405 -64DAFA25EAFF8F63344B5F6B523629776CEB090B546469F6A6008DE43072DD3C -DEF51F62731037D1FBD0C038A1E9B669849EB3BEBA281624F13D20B61917A109 -A0A7871A73F7BAA18077360B38A4625C5DB9AB9E43BDEEB856FD0E2D3AA2E075 -267B978B9EB47F2369302E87DBD5D5B422830BEC32411FE75D584C58650EFB1D -136FEB92B94BF8939FD63AFB7349C7511E5E46AA7324F8B1FFCA9C2A9E9720C0 -A720918E8E860F137567D386AC29870FD990BD69465B3A3D2A0ECF2753578AD7 -80DC87EBB319EB5AFE0B6F6FF8616EA30C51425FE3ECBC5F8D0B0BEFDEF32FA7 -D168B4E85C804B7326A0942CFDE732B1171C643452B7099B31649CA2C38B62FB -46EBDF7180004C549B53F88021D029452C2B37D8C565BCDB0B11541039A13C0A -E45D4B68C7907B8BF08C6F41F564B62BB554235D50330E78DD02795516D969C9 -66119D718798120442CB7EB9877FF84EC69DAE25F8559DCE3BD8042959F695F8 -2F99845B1B5680DDCF181D806CC4903E077D1FF5E60918EB34C0B1E028422B71 -CA63EFBF3F4F3CD813CE831EB54265A555BDD35AD7D723F9CFBDAB29C54F8AFF -2D35C6A3299E0A2DB470C7B141B1E3E10DABB7873AE302926BA8743278FAA8C0 -DC6174501D6A289CF980A3F55F2DD5C3A514E7E7F13133C35D2697D64C25130C -DB78FC997968D6B3BC929E8A31B6D212C5128E4412632BC52B3A1049F7F2F61B -C74AE9A6AD19B9E2E240617E2882F7D29ED3A4279439107AF9AEBEE47CE85DE5 -CE9595A96A118ACF1EB1F5929930321AF7732E351E18C6AD378508E37B4C327B -0E06AAE21278AFA9255AFE5C022034DA2968D260879B4B38E7EE2E11A593DC3F -CE71ABA050C004473324CAB6F3C50E85DEDA3E9A27388D8FD3A8F6E42A79670E -F7549CFAD4CCB337A6E0BAA4846ABCA059F1E1933CF11DC0FFBFF550CC4A1B47 -CF7BCE0875FA747AA854534960F757884505A5AEE0330179A9547A4AE3E68479 -7A457DE83326DC30B67F27CFD4AB697601CEE352F72F0966B3CEE3EA24683BEF -6D23AD51B8432C3F0DD0D0F80791E1091F38988B7A54E466A9AC7810DE8B7893 -6B0AA6356597891D56190A7660BC7F657BC559E0525D41EC228078F2FBF89C6C -72D666DAD838CBF0861FBF0A1D4ECC069AA49DFBAE5C56B781A1D5D79DAAC256 -13E3F9B928A2394FC71691E4355642764459714412D6F8EF803FC5F7353822DE -6CCBB8FBE5AA1F2C7F4D384039D85E7728527DF9FE0239E2CF8BCB7411C000B7 -1FE660AE6A2A19229E5E8776CC83EFF3C27403935756463EB4721C51FE0B1197 -86C2F17842A0FB639F28083DFD4F1E86D7D3BEFA922514ABF489C5CCE93D6F72 -D2EAAE14F6CBA2BE4BBE7D7EA8EA19DB3A87350D4A52064137C3D15A5B05B03B -70B1DA7328D10713B83974C390C3270AF5A9A47C0BFBFABB9F31063B0CCFBB10 -0F236C74446688198EFF039110F6FF42FA9F82D463AD3958B5FD205BDF85DE20 -FE3F0C7AEEF350AEE6DBC1DE2E2DA4F4599956F59D6F121F7086DC120416E180 -52DBBC4E56C09746938698860F30007091E1CC0351B43990E47208ED495310F5 -7BA9C6AB3CA10A3F1B318FD47C1CE3B9FF1304321F9623E32D315AA9CE64B35B -F841E6C62B5B2488A311C94937879E5E0E170FA77AF0AC75C5E6E9F3E8F825AA -09C1702682E14FDFA72D27901C5BDE009B1E52E8C4511C6F6336251BD45261F7 -401CA3DAE7C4B0CAEB91B9954BF4A97C48ECE7FAD401351D59DDAE9DA94E2335 -74A2B880E4749D3D7026CB5299F16C204B6E00A20A6619C34922C7D3FB50F127 -3157CFC08DCC5164C8023CD1B6C3556C73CB8E4ADA845339CA9BABA1457ECEE6 -ECB9849DF1F0FEBC89E5F97C92978A500196520839CEBA6C0FD2E3D27BB4B4F0 -93CB2BB565F4627C6DB62DD0E084E627D69B5DEF42EF094381B62C0D67EFD197 -301B132420F51A41561E6106870147E0D597078435BE3819ACF0DE28AD779847 -F3D2CF667DA06955D53E0204CEA2935E9E984E76963D3079EC092031E2A10E61 -1227E5EE6770DD4D745A52655369EBA06A19BD7D95BBA271E488241199D1008E -36EA99F8DFD2A9F87B06B070158B466AA4C6EA3BA77DB0F853F0BF9A304EA291 -34069714368E0B94DFCBA3BE5EDB6C8204DFA7EAF5C3406F60A7056407D1BF6C -CB85C1F432F97D821F5518BBA79AF8453A568FB2C2D025A70CEC75F46C545011 -ACE3A99B2582793BA1DC655230AE2EFD24DE20A01D4A441AFFAB7771F223FA6B -9169849E727E494247F67D6E1EA9DCA06A082FE2094BD548AD7F08B565145634 -E7ED832FEC1378306DDC796303392ADB0CBA130B63B38ED57B7828B47732853A -893E8836FE19CCF27002AE92C2B2CACFDF8A42F1B8066E033B965D2E9157FDF8 -E1264B40813C1A4CE424274AA3528A4F09B3B53DD4D23789A68B3D17BC1398AE -0ADA2C2168427A49846DE0216908C2FFFEF4F13C1ECA12AD341E238EE46E6DC2 -B71B54C52659632911F901660261E493AE2483D64E119D9924489779B62BC9FB -A052E822FD8D83178E09ADC825DF0DA07FCE7AD68EEB29FAA275A13691B4A5A5 -B0BC0499CD6307610CD6209583C1152C559A2760823F8DC0B9B990BFFE7B7E9F -3969B968AFEAADB9FC0F1410EBBAA0DB979CF153F0B8C978405F8E6F2B6406D7 -AAFBF4A655A15DD6D1E9A7EAE10EF89264659B09283F50B734236885FC09FBE5 -98D780012FA77FCB19F15BDC522CC7312546C0730EF5225DEA8C22A3BC6554EF -4FE73B9AEB5C2F7DBD474221760E5F539A064AC450591BCF3499E3968F2CBD6B -F15BA2B37080A4129B66D4C2188524F025414F14DB3F96049A8B0E5EB2BBE7A1 -AD64A988FE875FE4FE5186BB4F5DDA16983CB052D474B7D72F3E8965663EB50E -015C72407C3437142D3D7DBC055FA627139488DBC5A0F98D805C2143D99F491A -167E07AF60EC9F17C36289368D740B632CB919A0E74C412B76CE7A5906D5200F -9E79CEB9C65ADA3A0F23E8947E834AE7A329A9F0AA7A6BF545B1D7B4666C6522 -CFF268634EA06DB3A82D91A4C0A9B227E79961212881A54A6762C335DE7E0831 -130C45D94394D21C049B9D189ED955438C2151514F17BFC67E431DD9A8349202 -2F616AEC1C7B19F63D5000EB4771370924BD4B9053FE78B5E4A244B9A149D66D -A8BF3B398396D2233E92E4A5FDC70FAADEADAFD255193D688842DBA865CF6154 -C9348D590F3FEB135D4B7BD4D76A52CB140888247CAFAB25ED51F4D187041CA0 -ABD956F83A5661CEC171B52AF92F9ADE27973B560C802E1E0FF51C4003D1289A -CDD09F8EDA8AFDFF666D35418CEADF3B0BE298F0D1E5C8E024D6A2017A7E71F3 -3A9FEC9930F1118101E040339F9D41379170928DDF5B5875212B271DC843F612 -E0C21C67263186E3D6929160464D4D5C8928E14D0845762C36FFBDE548188E20 -3B6BAFE5EECA0385142F01216FB8A90C43A472C1D4447FE5C7C78CC088FC72E7 -3FAFA062C338BDE8A430FDF1951B107D8D73FF9376FACDE5900BA362C66F8C1D -947F9545C5C13A53E4479B1C1A50472C05E8F8C266C6D4F4EB08E97B3B1BA972 -26973B844545089C5732322BCC9A5A8FC972FA0D7DB8BD85D2F515ADE65DA479 -0224F7EA2276CFED0B75B2C23AE7377F86F1F6F205D6FE19377D87E782143697 -984E731F83CA888199CEB425643C259D4FB8B58DD69A96085198306494BB497E -FE7C9954EF35B679BBE3847A9C73507874F71FC97665E2A58BA41407A1745247 -44A79B588D969D11CE4B863CDA655DAA53CEA5C3C263B345E782006CE9831D49 -603D2D95DE9E370D617F5928BA416C362BB2B4DEF16A5D44BD24B34257765F3B -6223B3F9B54DAED69A90C7050AB97B06693D253C6894CBD7B497DA449F1D9B7C -D91B421891EC0724F59C82B9CB288DC42F2D2D7A7F22EE3D910E15953D7766AE -276DABED3820390BAF2700C4653E1C77FE63DB71A66D93ED293E25B8412A1EFF -809554BF04ED0DE83F7F190883ED793803CAD2C34A66524D3A580ACDF3C13B22 -08F18905E7A4A16DA9ED2A112462FB9FFE481EC2069E484E8BBFC19D594153B7 -3DED4C11762223B7586483B06BC164D824D1A6FCAE80A35DE0DB8B33396771DF -76DC5C05578EF1BE00A70BAF3D951A01C87328DB2B0DAD6E1B4C21F37D1BC0C5 -A929BDE5EADF20DA60C4DE2E3C151005814F24824D33B95F700E09A0207EB602 -3EF60DEB1622B91DB99A855A8F1DA96358F05CFCEDBDDDFC8446AE3391BEEC41 -966E594E28D052DD5ADA49DFF65E79540EBE5329DFD86C23CC800F95221B9C18 -CBBF941D2FA47EF1EF59A89DB5DD188E75EE94AD2A79E2221107E5992C00D531 -2E00B544895A9204656867E3DE9D4CDB64B920B5CCA9A73E6514B36CABAE01BF -94C15603B86780190595560F792E5EF01650074EA4A9BBC6ED284B9AC2020641 -DCBCEE0ED27FE58171DFE104EEE4202759E594159DF45113C00236127A46FB35 -9EC705F21C0E456C1F0F924594C09AC64D4377C5FEEF764BA4A09ABA8D09DEB1 -FC13B0CD202B2F04CF5D73DEAB65C36C2FA7C0DC236BEEF6D23BFFC9C493DC8E -1831F19EEF81EEDD976E43BAC6B5CED13F901DE59835FC75490EA528A72CEB77 -24C38B258EC38B9E6B97F85CA8C10D8809BBE55A6FAA12456FCAC786942E123C -06D1E55F7ED04400088BEC968BC5081DC7A1B1B65166E7821679F76694F235FC -6854C8776AF855B83445D9FF919B1D80E98DE0741D06D6C5EEDB3E3EA6392530 -F1BA817737D8162F7B3A36AC2A03190CDEC654383E31934C3E0A012B639532C6 -26FEBE9B412F1C92D1943B7C18CEF510729D501349644C97F087F2F840074AE6 -D8CD0FB2E620FFC908BFCD938B675A0A4A687F7FBE8F3DD06A62D7B6DE7DF3E2 -49D367D60B10061EA86CD512F5A1BE8950D83C62695E130128E0037B62552D17 -064319BBB9B1FAB9D79705E5D68AAE9B36EA14BF1A59A863BDB8DAD9AB5D7B8A -E30E2B499F952D65877C8E38EDD7DB29F9579D09E629AC188DB6A6403AB4BA3A -D358B3770D727A2B77D84B6C9EC17E29D88E3421F9B7D2D822EB78BB8BB50692 -8C46DD6F9BBEF2E848A2B5669B200019802AD19661537A84D3514AEC5AA47445 -2C791E01DCEDF18D9506367241255FFADEEA6183F51A9F42448A7DE413C08359 -52DAD2A60FD606AFE14702BD3B0EC448720FE63438D020DEDFCDE3582FC31DF1 -17B25FC152789D2F17FD60B8209D292D2152DCF8D28B5ADC04F6659BBB746CDF -145163361823CA343763AA951C640B5D4A99B7787105A1609EDD6A596EFC3F6F -2FC33D0D499DBE56C6668E137715D435D6B683E0113647B2765AB0F3D98AC717 -5B33C3EDDE18506E73B4E392B022F30480BD30F59B2E3A59D93017296C3156B4 -B5722E1955777716388AA987B2665669716F866FE6BDAD5E74A523CC03915F26 -9B7B231F5D9B1F61DF7CB01ED3F27070E36547B263855DF5B2E3ABD2ACC440B9 -0826E1DF4743FAE6668B61F72C8700992755522AB11C765981A9BEE0D040039D -6C2D64ABED527082C97CA606127AF5C0D25DE3F1AE7D9F8FF63151BB62BB3E72 -F9C045F155681989DF5063C53AAEF389C38697E8DD489CF03F23E121C7ED4F6F -7DAC0AAE1806B08936B66E4568F3267A3D3EE271C44278A7104045A9EE0FDA5F -41CAA6E2522BDD69BF74808A159F08A5CFB75086654A9BD76FC718D33C7F05AF -F68C1C1241E91084BF571BD865396AE446DB9EA63D5326E1F1D0144D61E630CC -C88A5BA95B6A48DC89F4C66D10ED7B65CA7FD1A58E076F916292D2A51579B15E -E9A496D7BB2E44A8073E9CC364F8F1B7E562A8E4F7013A4D36EBAF9CCEBE7B55 -B8A0FFA678EBD574381B08987A -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMMI12 -%!PS-AdobeFont-1.0: CMMI12 003.002 -%%Title: CMMI12 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI12. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMMI12 known{/CMMI12 findfont dup/UniqueID known{dup -/UniqueID get 5087386 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMMI12 def -/FontBBox {-31 -250 1026 750 }readonly def -/UniqueID 5087386 def -/PaintType 0 def -/FontInfo 10 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMMI12.) readonly def -/FullName (CMMI12) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle -14.04 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -/ascent 750 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 68 /D put -dup 73 /I put -dup 82 /R put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3C05EF98F858322DCEA45E0874C5 -45D25FE192539D9CDA4BAA46D9C431465E6ABF4E4271F89EDED7F37BE4B31FB4 -7934F62D1F46E8671F6290D6FFF601D4937BF71C22D60FB800A15796421E3AA7 -72C500501D8B10C0093F6467C553250F7C27B2C3D893772614A846374A85BC4E -BEC0B0A89C4C161C3956ECE25274B962C854E535F418279FE26D8F83E38C5C89 -974E9A224B3CBEF90A9277AF10E0C7CAC8DC11C41DC18B814A7682E5F0248674 -11453BC81C443407AF41AF8A831A85A700CFC65E2181BCBFBFE3573BF464E2BE -882A715BE109B49A15C32F62CF5C10257E5EA12C24F72137EB63297C28625AC3 -2274038691582D6D75FE8F895A0813982793297E49CC9B54053BA2ABD429156A -7FFCD7B19DAA44E2107720921B74185AE507AC33141819511A6AC20BC20FB541 -0B5AAEC5743673E9E39C1976D5E6EB4E4D8E2B31BEA302E5AF1B2FBCEC6D9E69 -987970648B9276232093695D55A806D87648B1749CB537E78BB08AA83A5001F7 -609CD1D17FFA1043EB3807AF0B596AF38C91A9675E2A53196FEF45849C95F7DC -182A5EC0EC4435A8A4B6E1CDBF9A5AF457564EA72BF85228EB6FD244F2511F5A -CA9B71A65D53CC06EF5F7EC3A85106139A4D312378BC22183C09A229577B793A -1B7422611C03E84BF809F46C62CE52D3AE29CE01C32B202ACDAA5B72733EB0AE -C31D7EF7BA88D2D14F85313F7A8B9B7A5B124B03AB923744D336C969E5CE304D -3AD977A46664479EDEFB69F113024E761C05FA48A54072DF9E12C2F352ACB3E6 -D04F6EEFFDE209E7FA3DA22E5B1D1409461F4286B7F4F8251B44E5CB7805762E -E129FF4A06A7458F3191926B1CAF70E32C6571AD2DC07C34FF62840896F4D200 -761B1A7FA356526D1E3AB4C542AF13623BAEB9F61B1BEEF79A9205B1FEFDAE24 -8799D516A9ACC30BC0139C63C9A0523E9D5439213B67D490C96F902958779B8F -68BD8E9FDDCE8A3A2E35877DB6C94B7612382ED8F218EB1157D2ADD090A2448D -10B99FBC9211C5629ED1C61C74FE93041E5AA03EA4AC3FFDA00C2B6E719CFAA4 -262FE17F66804A6B54D3669836EE4367D2A2991580C5564463C973CA0DA38AC6 -922716E13B4A807B50304B8826CEFEAA47C305FC07EB2AF25FA7945797237B16 -56CDE17AB0834F5C97E0CC5741B061C6FF3A8DD1A79B9A173B66A6A750538E26 -32FBC92E75BA15CFFE22A7302F47908547007402569158F62C29BA2956534FEA -7DACF1E507AC309DAE8C325F2A6023D2FBD81EF42146BFCE6A16A6310A650460 -7B07BB7647C8760FADDF0DBBCD3DA6CC4645D1732DB3A22D8B76E1D2D48E4D4A -46F4BEB80CE65F3517283A1AE08391FD1C10ED452133706BC6725AABC80107FD -754A8BA47B0281D479F052CE26A723EFFACB79B213041A536542AB334769A2BF -88505D82C498ABDD5A73EB539530F47CAC52825D16A969C8BB56D4A7F2830B8F -CB63B92B576E7BD922A4B25E634751F8A3B7C4EBAFCB373EDC8B8281B1D1371A -7844E9AD990CFF09F0D7ED73A5CF873D2D5C9E8A9923CFA31E1A4B4CCCC40760 -8B3AC8FC3C88BC08BD7407725281BB879A1A822D94997826418F1B89D303F2C0 -BE7A0102E6F529630CBF1BC5BF3E4578C164A3DDE45E62A957EF3FB7F0FBBA6B -CA1E79A1ED195B6A11CFB345B663C5E72FA55D80476F604F6C4257B51686AE25 -8F7D159FE605DDA0AC74BAA5034F29FFFD403070013C6E2D8EF6A0990D91173B -D5A3AEB98B64E412991505C3CB7C2CDE13C091FEB3DFBCAF30C4C19511102300 -135BD5D444BB55692013F52056908DFAB2ABFACE81A58423ACEC59344CEF7D4A -C5A3EFFFFF70759BC3E593D878281225060B97D1BEE6B26EED90571FEAFA1812 -1115C0EEC892F5DE6FDD68321A0B3F10A2D771B79BD85476AF6018472A499A86 -07D64CFF4550866AFE590C471C80EB12CB3A989A60BC7BED39097C12D9286E39 -14C7952C4C64820B4DE44A1827B7B0B535244E93FDB80036D6332F90F95B472D -7031E7E3819E881BD0313CFA112EB3AAE943C99C47635CCA7E34DC0306C04E5D -2E9F60FF037EB11602BE74E8E6B711392E866E3E55D988F7C856417A2B9C186D -639819B4786D039B77F8578EF63C088FF28BD08D8353031445C8498A8F445BC3 -D08923D32AC04BF3CAFEFCCC1E77EA894F4E846F47EF62D6841B8D8576FEAE8F -90044626869D04D61D64D56E8C51AF8C18D6CC3FEF3B6C4F7D56FE3260354948 -10104F69B117FB8269292579A7D52FED688C663B643D8D99F13956612271073E -1A337AED059B7A93819A28CDF01569CBEB51069D22ADAE25C47355560F402B2E -8C9900DA82B79C64497C8494F42FABE5AC41791C2010D98FB7E593C744F250DC -D837DB0EAA4F75D0016970F3AE8359878A08CF9A697A06C5EA945819151265B9 -1A12122B98F79185DF852257BB4798E7DC03712EA6ED34F6E6AE1476788DBC33 -9229FADB8D581BE1A63F596698DBD6DB98A092F67197A4FD4A50B648F2691875 -EE2495D6BB310078F516785A0CEC7EB6E8305FDBAEB1D15690409FE32DD9CFAE -DBD3866FB63EBCAAB73E3E4BE5D7F3AA44793938AAF3F8341683F0790F1D46A3 -60CE083F9BEDDA22E0639A92393960F86602216FA51E2754BC2F4CD0BDECE3D8 -FFAB7E0E49613DD4956C9A10AEA798BDA1F756C755BEC12147ADECAB0FB73B7D -203A11D84DD2AB5AA98FD38C1C2573570FD49A4924A94A106D2A7D850E793608 -FB135853E8C4204441CDBE697FD0CB330B1C3596F32D2BCBF263237EAB362D09 -DA6F531B40384DC91F30674760CA7B64BA1968F6A7FC9EBEF431A1AFC5E76D7F -2D44DCB7F61C7F6B16196B3E8B47343F572DBA8B8B21B43E35BB6B2DD5C7982D -244FD4304D254D6CCB5E8CF70E77F50812F41A988EEB3B26BF0F6F69BBA18077 -31134B5A5823D10FEF6201D045AEE7A24E0F25376E9FC66340C56C05F6CD810B -724D85CC4BB8D789834A447CBBA159565D08BA5793D8599035BB5063271518E8 -F6C50E7DCE71B1D186270DDC860C6DC0CD506010EB5B1FDF6BE47A9A18CC15D7 -D657E58BED9EECAD5CE5D49F63139A39BC52C6584BB2C3264D51BD584B40F8EA -AFCD8B83F548594386EB2B05CE803105E84931DC6E7A1398073D48E130E0D907 -CD0F1ECC3254EDF5D4DDBF44415DC9BA66C673820CDB0FDF033D59BE2B5EFCEF -01FF9D33EDC88F8D522E07F1689D024DBCD09A16A63519E1764C8630FF36058D -CFC07027E0ECDA01E0E85B166C613B22F587B4D355EB018BA93E92A36007B4DA -287FF5A91F7D8A0EDF5554ACCF45AC8066E88865C5692E63EB99CAC81367B605 -8E6C19EB98EBFE0D2D161B447B9A70CDD1122C7B78A413369016E6D8481E2AE9 -9AA97B5DD0ACC9B0820F7742CEB2F46F89F3E2092621969A88DC0156B4F941A1 -6BF1546D4B136657C47B082A8A35FE96016BAF3D9679B8C32EDDD6AE6DF3BFB5 -7854074FA019707FC22BFA82299E72ADF9A980AE29A8E2434277E58B01F6B03C -192E1E25DADD49F6E3F69799AE62B56E00B60A031BF8721DB8B2CB6D4A4C15CA -AB1FDE010AB7DC0DDED977389B101B8E53A949222FAA126656E02817DD32B0D4 -A49516CEC2B97EA7C78FD66229B044EB92F502384BCC6CCDFFF995EABE3BB7A9 -50D5D1AED861E7D3BA8D333026C673C5762712E763E59261426044583D789C67 -A606B96F97663F92BF104CE02FBFDFC521EC0D6670B7D4F85A229F51426DE912 -3B729C4A535FB7C88D0A5E78074751B58885DD6BDD2DD9E9C83F105E8CF63DDF -CA7DB39D0319CA7CC2E73F42747F007574DE25AE1538B4D493D22D0D5F0F80C6 -5F6FA3937C8391DE2F0116F81DB2DB0EF751EC838A7F85F163A6F48804E84B96 -8D715EF25B7E2A5CAECC558D80F421052A1D698F3B8452AC27E30A4E6226E3CE -084C8A83ADA0818A110923CF7AC7AD4CB92AE4ABBE0A9EC1FF935FD02774C1F7 -92A278E513012AD17722A23C55EF82E18F8847B5CCE47F4FE3EC508BA563F7B2 -AE56C94285A18DED4D432FB0CEFC05A20BC17DDF9FF919C724810A8ED7358A27 -97EC93C1A13C443A91947FE1F6F528EA7B628917FA7E554A1D7B31ED46C5ABCF -92BA57961C8876DB4041305EBB029B03D8351D5E2819FF87E97ED214D8F1CEF5 -7F7668DDE223721C0B810F4A4AC81CA4EAC86EAE546E1B15D91E626FB9A31824 -5BFF17C4E79FD56ADBF6DBF01BAF6453A81EBDCB38A5FC0FD0FF0646B3B0D199 -13E2E59A1B5CAB6DE5329BE389BA0E2A2AB55CA40B711ED746C24F1E48892E76 -6DACF7DA163CDC90CF076763008E7A899870CDED5A80758E6177BE6B93B07EB1 -5800A3BF7B9AAC3FA825CE594EF5B7546B181375FA8F37608DF17856D2F8EBD5 -6030A9E6F6BEAF224AD2AEF76D03B023E2FCB922CB8E3C6816AABB61FE6E4F83 -F21B4935102C860ECA03DBEFCA461F0E5B93E5A8D18440BCF7D1D6252A24CB6E -A64FDAC8B67C4888519AA368D9C4A8C08C7155DF5BACD75C5196C571C3C456C4 -7CE8D90215FA6EE8CDD72C48740F7F5930EC3632DB63A9C8D2DA125088C0F05A -9FC83D16B7F53163F4EB6FF372C6C3115F1E68EB35967D11126EDEDF0BF80817 -E68A698183B3EB0A207DB43786E1B9D289359D75AD5E465328CAA90E712C2962 -AE2A466173F2FF30EB535A6054BB0B875DC8552C16B49DF17CF84D98D35497BD -F55E273FCBB0C735899529A69990E09149FBD2DDE64B7FA8D50AE83925DF03C8 -0B63EA158FBABB12A028803DA4B9DD6C48C0FEC469C4E730729F4BB420D5B003 -1918B4AE9CF35CFD31E8E62A44C0484E3D00143BF1D330235E821E5CFEAB4D31 -7CB4604DB1F310457FCF9075A3527279644D908DE847CCD00B6F50DBDEF91D3E -38238CAF550FDCABA2C3A46237218DCC5A09AFAF69997E1EBDA7EFE6FC99ECC8 -5D4AFD5EE35FE2346BE79B499EC8EC436868154A947D13BC02C780EBA4B9E64F -3026F1BF5DC1F8D64FEA1281EA40B4BC355638A3A59BD9055BCBB232FA45EA0B -B405131B64F105814019BC55466EE78E9E9ABB62DB30EA452F7EFD7196C76A85 -15B2CFCD89922CADC0F392B0C54A231F3999AEFB53C24EB0C63B0C8A1A1ABB6B -AAB2F93E5ECC7AB90EADA320E918106BAAFC1F8C425C617639984629018BA674 -6FF4F338AC43E23BC3740542911C058D43A49A11CB3A0CC8E3088BB5BA6048D6 -CC2AD250DE956BFBE83BB24C945C20D9C22E7105983F284EF478F9B68BFB0322 -EEB7D62802CBAAEFF1C2332159DCC7243EA40CE15C734EA905E04C476B178B82 -A08ABCB0B86A7330C75E62EE7844C9E22DDB013ADDF20AFE08122EE1B930A81D -806A0F8CC584CB7FF5F56F9B35E5FF78FD93E7E4A40C64537464EAA275FE88F4 -461FC6A467C8A69B9A9FBC10D44AC1B753D313A8E7D97F5FAEB60F82855658D1 -4DCEE043C8FCDFD8A29DD091F3BA55874A458B2B8989F35055C72FC411382361 -9AADC717E602B48D7C9521D3971A6F7EB19D539445DDE9EFBC5B58FA9E5E426C -172C45CDA24985FC4632287FC3B15849DEB56F5A061993AB10A6BC59868534E6 -69888175053108B77E4978D971B4EC57224C0F93EEA4C15AE92254140A94704E -ED5666FC06C5341F643F779CC88A9E81891565C63B6F7F6286E664F4E0A48690 -356DC96F1B98026C563700772485B83BFA06435D4E0793EF822F423C93FBACA0 -E5D889D2B76771C6F0EE997A5DB43C2F6921132890406E3C33F6F159B14C5D78 -7C151BDFFDD02B697315F191B5490073EB418A4FF2A398C68D44F0CD1B87CF9C -B52F12728B72F94D752D23151196A256908135C87991E508B8906CE2539DCA8A -31F86809C8C6C18A09F6129BD7CDC6B37E76B648788056851F22BD3E3B5772FF -EC01D822B57FFDB3BAE624F05531292641FD6A7E3666152D18F6C653048DD7D7 -98A942C840C4A0FA662F260B21C64214152BB86F03662A330109C5AC0A5EBA30 -C6201F558858130703DF76AF4FBBEE069BDE45C0D9467077D85FFED4F9BA9C61 -AED87D67CDCA453A6528AC5BA153E1039D9CCC556CEA5CBB542265FF54A1B208 -E0E13740E7E7C26AA00AEE909F8F3ADC2726081A744D8EF6BB711BF5F611A900 -76F91C26A338DA13A7160A9F42410CCEB3190000D963D036FDA05A29F598EF40 -8FAE6F8E7E6F50C99C3304A573501C13A00023085F057DF331E3354CBE65D573 -CAE73BF15B3B96B502E0AAF2B4A86237E98A997AAEFFF4227D5A26E8972C48E7 -761F430733E6EF8AB2D903C17FAFBFA21C25F8A0AC157D397BF3CC1AE7598F0A -2BE4FB46B29443CE57F41FD5F91122E9D86F903E94D5B55E2BB95949C156D138 -89883BEFD634311F9280C7F028DCA6408D3A682DF5B55B9F7ABF08F019190F60 -D39E4F0E80F0594235B09A5320109638B938633A2C196E4ED2B43DCD8643C3CF -C6123B076B7F73352F906D96FDE0FBF50CCCA432712C574D5857838BAC30B485 -D25024EB254A7EFE57D1DF0892C275CDB3DF77602F0FED0FAEBC644BCACA04B8 -B424DB125E487794CAB36E01B5E1A26F5E1E97A739AA36D77A12F5B45338EB39 -AF36CEBDED55DCBFCF497FD475FC6BAB5530AD6153C6BD982564EE8712185F1F -D5EA7ADF4104661168A01994C1FD773A50C8AD6A3E4D332E4D59521BB8BBC6C3 -866EB4AC3EA4532477E6CBF6BBF0860031C3B916AA25E3492670EA67F55CF4FD -207C684A0DDB6F4AD21B2909CBA71BCE2E762012B0927BA72367A6AE0AF87F73 -756C9BC85E4EDE35317E2CCCD138C02C7A8013AFDC1A48C3A4BB8EF257BDEEA7 -60E012F54D12D31D18DC59D5E526F12567B8688B4B67E16B56713870300016BD -A3B9DA87FDC865246AF8E94316799110D86B1DDADB8A673402D4226C519C058A -1D1E5A5778584FC28AF12819B1924060BC4F54B1054EA6AB0149E04B8C4302D4 -A56D8A347EB5D3D2A0E12CF7E35059BDB53D9FF6BD25F6D9619BC4669CFC1048 -C6C9978B8751B840F27D82A69075832BE59F55C1737CBB1220FB8FF691FDBDF3 -03BD7D225A9372AC221C38245E48320E1CCF898D9EEDD678E5B8C65B7F588321 -1A3953EEB9B39EA9A8CB72DB08C3E9234DFFF5FDF9DF804C021D57E97DA7622B -97F4CB6E0EB640E0DC9EA15C5193F92A3A7565F4C7A4C9CC327F7CD2C44900AE -D9E76FFE62FC37FA376E77131B566AE67C3E09DA80F198BBB995EE8FA47EEDB8 -4B467C6C7DB8AEA745CF8C56B8BE56534E9C56FCB2B7006426DFE93D728FA4CF -94F131C549814E54ECE7C914C5FE8E4961D3437CE7475D03534B62650F551D97 -201C794AA877445DBEB11C85ADF6119B05360700F8CEDE4766E3A1D7A35CDDC7 -9ABF7C619E3868A39D1852DBE1EEAF5D7898C78323873AC005542B68C43C5000 -CC58F675EB595F87C879694751494676465891E8A897158B481F11A171CCBBD7 -29603F00210CFD7FF31FE3D273933ECC34AFBCC4108D9B76D9ECE63EA06CF939 -4799092A54A749DACB82C1424E9879672C8BC084C360014C9C1B6D5D65C68AED -66CE329C3AD712C0A36BE7EF03FDF339CAA2E0336D387A693B1DFAB5D5164E31 -14755A158168962C9B399F8F1DF3FF5060D7464D5071058C30C572A2BC7DEE53 -84BD7614A4BEC4C84E18CF7EC81C811724463BD46CECA5FB57B0F55EAE20CC74 -6AD815D1897B037C197D2456797B992C20C70B663BF99FE28C513B4E221C8E12 -49779F8C0AE8517048ADDF7CDF0D698E3EFE60071C4997B7F5EF12B6CB65390C -224F13FBB99FFC034C0710F05019899689B6D3350BBA65C7CE7C2AB03D81B9A5 -5F3D65E4D462DAB189006669F7390A78A1B8908A4C913B15DB8827DFF15BB9A4 -A6037DDB643103B937257A7DAB025F09D53FBBC2BCB6B0BCD8D56B2B2784E498 -1F6CF8470DCC892AD0CFE11578718948BABF9C1427084643B66BB9181094E29D -5FBE37708E1D8A6B7518A96876844CB66954227A7A6AF28DD075A462526DD5D6 -40EECC56FA366106E55C7068997B54B7F0D03AC1AD45D28C67C7ECA99DBEDB1C -E18A79C353113E2E05B837E703278B202112B1C69E42A69D64B62F0E7D8F7E5B -C1F93F0F99EC20EF312046F4B0CD7DAB31E422070B629A7FAF3BC331F0A7186D -4053C7A7BB3253326E1E84A4EA2D9659CAA229C3AC407FB24F4ABE9482030869 -A9668917641FF296931F653967E8FC62C7675CE24653764A71143C68098DF21F -4F97F7B73E1C8F8C05AC12E7DF18BF04D28FC23DC3CDFC688B72FB22525E0561 -5CFE5C0FEEDA85907470E66AE5D1C45B919D8F2A3A7DEAD823117A2C0D52160A -FEE3E74E0A6661400AA6593C0D9F22F0EFADB0C6E647EFB59DF4937EAD06D56F -26FA7265B16AFEA5D5C98FB6BA08F7D2490D52BE820E539338787577DF79F878 -FA7861286917396817F253996B79C2E6795E23FA13FD6E2D95EBA8FAE2CD055F -594D28A7660BD0519FD4F6E351B5D23D56A5F78DF4E1EBCB9497257050F5DD29 -57475733A025264F885BBDA44AE31490924D0C98F0160D07B552051123B1B031 -87334A38C914E7B5D3C2B11B0B737A164983170C90F4D312B23458E20BC02A07 -D06E317D13514665AF0C5F221E0D271111AC1BF1C251DAE23C3E17C8B65B4151 -6E069C910AC5EB83F365C2C5BFABA806FC1CAA0A0BAA6FC9F78010F1F2441C12 -743C9B6B4F2F725692F6F3F1880ADB38130863787146AAB77E2018AD7398EB6C -51ECEEE4A6795561780DA578AB64238BAFD9AEF74A49FAB6ABFCB01B58FC5E32 -4E7862644C1CE0F8D155E08B72FB8393801A0F2185CB0852CAA0B261E07B0754 -9E64C075D2F2623E2C2AD3203CA375DEEF2450B5C4FA85F05A4B17C051FC0887 -5845CB473013E9FC80C10ADB4E47292D96C521CF8E2FEF0B627362F126FD6C7A -BE79ED7E904C47FBCBE69D4CF4911F0E492B550325562D57E7D91AA75D495B57 -330BD247125C586314ED15B89D13A5B21B625D0610C76AF0E53DCD8AEC13E9A6 -CCF377201B20945F4DA433F36401DEBF87858835719792069C93BE331F76BA30 -2BEAF96B514FAFF986D584BFE111932C8117EC8D5C43B0D3F768F09E0C49A362 -2EF372E274D12CD9308A67CAC1F3A7E7B629BF32BBA4C6C7F6F8CBD52E12FB5A - -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -TeXDict begin 40258437 52099154 1000 600 600 (dummy_fig.dvi) -@start /Fa 206[30 49[{}1 49.8132 /CMR6 rf /Fb 187[58 -68[{}1 66.4176 /CMMI8 rf /Fc 206[35 49[{}1 66.4176 /CMR8 -rf /Fd 173[74 8[43 4[81 68[{}3 99.6264 /CMMI12 rf end -%%EndProlog -%%BeginSetup -%%Feature: *Resolution 600dpi -TeXDict begin - end -%%EndSetup -TeXDict begin 1 0 bop Black Black Black Black 5417 952 -a @beginspecial 0 @llx 0 @lly 147 @urx 83 @ury 1470 @rwi -@setspecial -%%BeginDocument: diode_D1.pstex -%!PS-Adobe-2.0 EPSF-2.0 -%%Title: diode_ref.fig -%%Creator: fig2dev Version 3.2 Patchlevel 5 -%%CreationDate: Tue Aug 28 14:11:31 2012 -%%For: yogesh@iml21.ee.iitb.ac.in (yogesh Save) -%%BoundingBox: 0 0 147 83 -%Magnification: 1.0000 -%%EndComments -/$F2psDict 200 dict def -$F2psDict begin -$F2psDict /mtrx matrix put -/col-1 {0 setgray} bind def -/col0 {0.000 0.000 0.000 srgb} bind def -/col1 {0.000 0.000 1.000 srgb} bind def -/col2 {0.000 1.000 0.000 srgb} bind def -/col3 {0.000 1.000 1.000 srgb} bind def -/col4 {1.000 0.000 0.000 srgb} bind def -/col5 {1.000 0.000 1.000 srgb} bind def -/col6 {1.000 1.000 0.000 srgb} bind def -/col7 {1.000 1.000 1.000 srgb} bind def -/col8 {0.000 0.000 0.560 srgb} bind def -/col9 {0.000 0.000 0.690 srgb} bind def -/col10 {0.000 0.000 0.820 srgb} bind def -/col11 {0.530 0.810 1.000 srgb} bind def -/col12 {0.000 0.560 0.000 srgb} bind def -/col13 {0.000 0.690 0.000 srgb} bind def -/col14 {0.000 0.820 0.000 srgb} bind def -/col15 {0.000 0.560 0.560 srgb} bind def -/col16 {0.000 0.690 0.690 srgb} bind def -/col17 {0.000 0.820 0.820 srgb} bind def -/col18 {0.560 0.000 0.000 srgb} bind def -/col19 {0.690 0.000 0.000 srgb} bind def -/col20 {0.820 0.000 0.000 srgb} bind def -/col21 {0.560 0.000 0.560 srgb} bind def -/col22 {0.690 0.000 0.690 srgb} bind def -/col23 {0.820 0.000 0.820 srgb} bind def -/col24 {0.500 0.190 0.000 srgb} bind def -/col25 {0.630 0.250 0.000 srgb} bind def -/col26 {0.750 0.380 0.000 srgb} bind def -/col27 {1.000 0.500 0.500 srgb} bind def -/col28 {1.000 0.630 0.630 srgb} bind def -/col29 {1.000 0.750 0.750 srgb} bind def -/col30 {1.000 0.880 0.880 srgb} bind def -/col31 {1.000 0.840 0.000 srgb} bind def - -end -save -newpath 0 83 moveto 0 0 lineto 147 0 lineto 147 83 lineto closepath clip newpath --116.3 149.2 translate -1 -1 scale - -/cp {closepath} bind def -/ef {eofill} bind def -/gr {grestore} bind def -/gs {gsave} bind def -/sa {save} bind def -/rs {restore} bind def -/l {lineto} bind def -/m {moveto} bind def -/rm {rmoveto} bind def -/n {newpath} bind def -/s {stroke} bind def -/sh {show} bind def -/slc {setlinecap} bind def -/slj {setlinejoin} bind def -/slw {setlinewidth} bind def -/srgb {setrgbcolor} bind def -/rot {rotate} bind def -/sc {scale} bind def -/sd {setdash} bind def -/ff {findfont} bind def -/sf {setfont} bind def -/scf {scalefont} bind def -/sw {stringwidth} bind def -/tr {translate} bind def -/tnt {dup dup currentrgbcolor - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add srgb} - bind def -/shd {dup dup currentrgbcolor 4 -2 roll mul 4 -2 roll mul - 4 -2 roll mul srgb} bind def - /DrawEllipse { - /endangle exch def - /startangle exch def - /yrad exch def - /xrad exch def - /y exch def - /x exch def - /savematrix mtrx currentmatrix def - x y tr xrad yrad sc 0 0 1 startangle endangle arc - closepath - savematrix setmatrix - } def - -/$F2psBegin {$F2psDict begin /$F2psEnteredState save def} def -/$F2psEnd {$F2psEnteredState restore end} def - -$F2psBegin -10 setmiterlimit -0 slj 0 slc - 0.06000 0.06000 sc -% -% Fig objects follow -% -% -% here starts figure with depth 100 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1570 l 3375 1594 l 3525 1642 l 3375 1690 l 3525 1738 l - 3375 1786 l 3525 1834 l 3375 1882 l 3525 1930 l 3450 1954 l - - 3450 2100 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 50 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1350 l 4200 1350 l - 4200 1500 l gs col0 s gr -% Polyline -n 3450 2100 m 3450 2250 l 4200 2250 l - 4200 2025 l gs col0 s gr -% Polyline -n 3825 1350 m - 3825 1125 l gs col0 s gr -% Polyline -n 3825 2250 m - 3825 2475 l gs col0 s gr -% Polyline -n 2100 2250 m - 2100 2400 l gs col0 s gr -% Polyline -n 2100 1350 m - 2100 1200 l gs col0 s gr -% Polyline -n 2100 1200 m - 2100 1125 l gs col0 s gr -% Polyline -n 2100 2400 m - 2100 2475 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 0 -% Ellipse -7.500 slw -n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr - -% Polyline -0 slj -0 slc -n 4125 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4275 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1725 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1500 m - 4200 1650 l gs col-1 s gr -% Polyline -n 4200 1950 m - 4200 2100 l gs col-1 s gr -% Polyline -n 2101 2250 m - 2101 1950 l gs col-1 s gr -% Polyline -n 2101 1652 m - 2101 1352 l gs col-1 s gr -% Polyline -n 2250 1950 m - 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr -% Polyline -n 2101 1950 m 2250 1652 l 1950 1652 l - cp gs col7 1.00 shd ef gr gs col0 s gr -% here ends figure; -$F2psEnd -rs -showpage -%%Trailer -%EOF - -%%EndDocument - @endspecial 0 0 0 TeXcolorrgb 5573 458 a Fd(D)5654 473 -y Fc(1)p Black 0 0 0 TeXcolorrgb 5985 608 a Fd(R)6059 -623 y Fb(D)6117 632 y Fa(1)p Black 0 0 0 TeXcolorrgb -6623 571 a Fd(I)6666 586 y Fb(D)6724 595 y Fa(1)p Black -Black Black eop end -%%Trailer - -userdict /end-hook known{end-hook}if -%%EOF diff --git a/OSCAD/Examples/bridgeRectifier/diode_D1.pstex b/OSCAD/Examples/bridgeRectifier/diode_D1.pstex deleted file mode 100644 index 2a9db44..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D1.pstex +++ /dev/null @@ -1,187 +0,0 @@ -%!PS-Adobe-2.0 EPSF-2.0 -%%Title: diode_ref.fig -%%Creator: fig2dev Version 3.2 Patchlevel 5 -%%CreationDate: Tue Aug 28 14:11:31 2012 -%%For: yogesh@iml21.ee.iitb.ac.in (yogesh Save) -%%BoundingBox: 0 0 147 83 -%Magnification: 1.0000 -%%EndComments -/$F2psDict 200 dict def -$F2psDict begin -$F2psDict /mtrx matrix put -/col-1 {0 setgray} bind def -/col0 {0.000 0.000 0.000 srgb} bind def -/col1 {0.000 0.000 1.000 srgb} bind def -/col2 {0.000 1.000 0.000 srgb} bind def -/col3 {0.000 1.000 1.000 srgb} bind def -/col4 {1.000 0.000 0.000 srgb} bind def -/col5 {1.000 0.000 1.000 srgb} bind def -/col6 {1.000 1.000 0.000 srgb} bind def -/col7 {1.000 1.000 1.000 srgb} bind def -/col8 {0.000 0.000 0.560 srgb} bind def -/col9 {0.000 0.000 0.690 srgb} bind def -/col10 {0.000 0.000 0.820 srgb} bind def -/col11 {0.530 0.810 1.000 srgb} bind def -/col12 {0.000 0.560 0.000 srgb} bind def -/col13 {0.000 0.690 0.000 srgb} bind def -/col14 {0.000 0.820 0.000 srgb} bind def -/col15 {0.000 0.560 0.560 srgb} bind def -/col16 {0.000 0.690 0.690 srgb} bind def -/col17 {0.000 0.820 0.820 srgb} bind def -/col18 {0.560 0.000 0.000 srgb} bind def -/col19 {0.690 0.000 0.000 srgb} bind def -/col20 {0.820 0.000 0.000 srgb} bind def -/col21 {0.560 0.000 0.560 srgb} bind def -/col22 {0.690 0.000 0.690 srgb} bind def -/col23 {0.820 0.000 0.820 srgb} bind def -/col24 {0.500 0.190 0.000 srgb} bind def -/col25 {0.630 0.250 0.000 srgb} bind def -/col26 {0.750 0.380 0.000 srgb} bind def -/col27 {1.000 0.500 0.500 srgb} bind def -/col28 {1.000 0.630 0.630 srgb} bind def -/col29 {1.000 0.750 0.750 srgb} bind def -/col30 {1.000 0.880 0.880 srgb} bind def -/col31 {1.000 0.840 0.000 srgb} bind def - -end -save -newpath 0 83 moveto 0 0 lineto 147 0 lineto 147 83 lineto closepath clip newpath --116.3 149.2 translate -1 -1 scale - -/cp {closepath} bind def -/ef {eofill} bind def -/gr {grestore} bind def -/gs {gsave} bind def -/sa {save} bind def -/rs {restore} bind def -/l {lineto} bind def -/m {moveto} bind def -/rm {rmoveto} bind def -/n {newpath} bind def -/s {stroke} bind def -/sh {show} bind def -/slc {setlinecap} bind def -/slj {setlinejoin} bind def -/slw {setlinewidth} bind def -/srgb {setrgbcolor} bind def -/rot {rotate} bind def -/sc {scale} bind def -/sd {setdash} bind def -/ff {findfont} bind def -/sf {setfont} bind def -/scf {scalefont} bind def -/sw {stringwidth} bind def -/tr {translate} bind def -/tnt {dup dup currentrgbcolor - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add srgb} - bind def -/shd {dup dup currentrgbcolor 4 -2 roll mul 4 -2 roll mul - 4 -2 roll mul srgb} bind def - /DrawEllipse { - /endangle exch def - /startangle exch def - /yrad exch def - /xrad exch def - /y exch def - /x exch def - /savematrix mtrx currentmatrix def - x y tr xrad yrad sc 0 0 1 startangle endangle arc - closepath - savematrix setmatrix - } def - -/$F2psBegin {$F2psDict begin /$F2psEnteredState save def} def -/$F2psEnd {$F2psEnteredState restore end} def - -$F2psBegin -10 setmiterlimit -0 slj 0 slc - 0.06000 0.06000 sc -% -% Fig objects follow -% -% -% here starts figure with depth 100 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1570 l 3375 1594 l 3525 1642 l 3375 1690 l 3525 1738 l - 3375 1786 l 3525 1834 l 3375 1882 l 3525 1930 l 3450 1954 l - - 3450 2100 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 50 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1350 l 4200 1350 l - 4200 1500 l gs col0 s gr -% Polyline -n 3450 2100 m 3450 2250 l 4200 2250 l - 4200 2025 l gs col0 s gr -% Polyline -n 3825 1350 m - 3825 1125 l gs col0 s gr -% Polyline -n 3825 2250 m - 3825 2475 l gs col0 s gr -% Polyline -n 2100 2250 m - 2100 2400 l gs col0 s gr -% Polyline -n 2100 1350 m - 2100 1200 l gs col0 s gr -% Polyline -n 2100 1200 m - 2100 1125 l gs col0 s gr -% Polyline -n 2100 2400 m - 2100 2475 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 0 -% Ellipse -7.500 slw -n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr - -% Polyline -0 slj -0 slc -n 4125 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4275 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1725 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1500 m - 4200 1650 l gs col-1 s gr -% Polyline -n 4200 1950 m - 4200 2100 l gs col-1 s gr -% Polyline -n 2101 2250 m - 2101 1950 l gs col-1 s gr -% Polyline -n 2101 1652 m - 2101 1352 l gs col-1 s gr -% Polyline -n 2250 1950 m - 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr -% Polyline -n 2101 1950 m 2250 1652 l 1950 1652 l - cp gs col7 1.00 shd ef gr gs col0 s gr -% here ends figure; -$F2psEnd -rs -showpage -%%Trailer -%EOF diff --git a/OSCAD/Examples/bridgeRectifier/diode_D1.pstex_t b/OSCAD/Examples/bridgeRectifier/diode_D1.pstex_t deleted file mode 100644 index 554d9a1..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D1.pstex_t +++ /dev/null @@ -1,19 +0,0 @@ -\begin{picture}(0,0)% -\includegraphics{diode_D1.pstex}% -\end{picture}% -\setlength{\unitlength}{3947sp}% -% -\begingroup\makeatletter\ifx\SetFigFont\undefined% -\gdef\SetFigFont#1#2#3#4#5{% - \reset@font\fontsize{#1}{#2pt}% - \fontfamily{#3}\fontseries{#4}\fontshape{#5}% - \selectfont}% -\fi\endgroup% -\begin{picture}(2435,1374)(1939,-1648) -\put(2251,-661){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$D_{1}$}% -}}}} -\put(3076,-961){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$R_{D_{1}}$}% -}}}} -\put(4351,-886){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$I_{D_{1}}$}% -}}}} -\end{picture}% diff --git a/OSCAD/Examples/bridgeRectifier/diode_D2.eps b/OSCAD/Examples/bridgeRectifier/diode_D2.eps deleted file mode 100644 index 007b5c1..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D2.eps +++ /dev/null @@ -1,1363 +0,0 @@ -%!PS-Adobe-2.0 EPSF-2.0 -%%Creator: dvips(k) 5.98 Copyright 2009 Radical Eye Software -%%Title: dummy_fig.dvi -%%CreationDate: Wed Apr 24 17:14:03 2013 -%%BoundingBox: 721 605 883 690 -%%DocumentFonts: CMMI12 CMR8 CMMI8 CMR6 -%%EndComments -%DVIPSWebPage: (www.radicaleye.com) -%DVIPSCommandLine: dvips -E -o dummy_fig.eps dummy_fig.dvi -%DVIPSParameters: dpi=600 -%DVIPSSource: TeX output 2013.04.24:1714 -%%BeginProcSet: tex.pro 0 0 -%! -/TeXDict 300 dict def TeXDict begin/N{def}def/B{bind def}N/S{exch}N/X{S -N}B/A{dup}B/TR{translate}N/isls false N/vsize 11 72 mul N/hsize 8.5 72 -mul N/landplus90{false}def/@rigin{isls{[0 landplus90{1 -1}{-1 1}ifelse 0 -0 0]concat}if 72 Resolution div 72 VResolution div neg scale isls{ -landplus90{VResolution 72 div vsize mul 0 exch}{Resolution -72 div hsize -mul 0}ifelse TR}if Resolution VResolution vsize -72 div 1 add mul TR[ -matrix currentmatrix{A A round sub abs 0.00001 lt{round}if}forall round -exch round exch]setmatrix}N/@landscape{/isls true N}B/@manualfeed{ -statusdict/manualfeed true put}B/@copies{/#copies X}B/FMat[1 0 0 -1 0 0] -N/FBB[0 0 0 0]N/nn 0 N/IEn 0 N/ctr 0 N/df-tail{/nn 8 dict N nn begin -/FontType 3 N/FontMatrix fntrx N/FontBBox FBB N string/base X array -/BitMaps X/BuildChar{CharBuilder}N/Encoding IEn N end A{/foo setfont}2 -array copy cvx N load 0 nn put/ctr 0 N[}B/sf 0 N/df{/sf 1 N/fntrx FMat N -df-tail}B/dfs{div/sf X/fntrx[sf 0 0 sf neg 0 0]N df-tail}B/E{pop nn A -definefont setfont}B/Cw{Cd A length 5 sub get}B/Ch{Cd A length 4 sub get -}B/Cx{128 Cd A length 3 sub get sub}B/Cy{Cd A length 2 sub get 127 sub} -B/Cdx{Cd A length 1 sub get}B/Ci{Cd A type/stringtype ne{ctr get/ctr ctr -1 add N}if}B/CharBuilder{save 3 1 roll S A/base get 2 index get S -/BitMaps get S get/Cd X pop/ctr 0 N Cdx 0 Cx Cy Ch sub Cx Cw add Cy -setcachedevice Cw Ch true[1 0 0 -1 -.1 Cx sub Cy .1 sub]{Ci}imagemask -restore}B/D{/cc X A type/stringtype ne{]}if nn/base get cc ctr put nn -/BitMaps get S ctr S sf 1 ne{A A length 1 sub A 2 index S get sf div put -}if put/ctr ctr 1 add N}B/I{cc 1 add D}B/bop{userdict/bop-hook known{ -bop-hook}if/SI save N @rigin 0 0 moveto/V matrix currentmatrix A 1 get A -mul exch 0 get A mul add .99 lt{/QV}{/RV}ifelse load def pop pop}N/eop{ -SI restore userdict/eop-hook known{eop-hook}if showpage}N/@start{ -userdict/start-hook known{start-hook}if pop/VResolution X/Resolution X -1000 div/DVImag X/IEn 256 array N 2 string 0 1 255{IEn S A 360 add 36 4 -index cvrs cvn put}for pop 65781.76 div/vsize X 65781.76 div/hsize X}N -/p{show}N/RMat[1 0 0 -1 0 0]N/BDot 260 string N/Rx 0 N/Ry 0 N/V{}B/RV/v{ -/Ry X/Rx X V}B statusdict begin/product where{pop false[(Display)(NeXT) -(LaserWriter 16/600)]{A length product length le{A length product exch 0 -exch getinterval eq{pop true exit}if}{pop}ifelse}forall}{false}ifelse -end{{gsave TR -.1 .1 TR 1 1 scale Rx Ry false RMat{BDot}imagemask -grestore}}{{gsave TR -.1 .1 TR Rx Ry scale 1 1 false RMat{BDot} -imagemask grestore}}ifelse B/QV{gsave newpath transform round exch round -exch itransform moveto Rx 0 rlineto 0 Ry neg rlineto Rx neg 0 rlineto -fill grestore}B/a{moveto}B/delta 0 N/tail{A/delta X 0 rmoveto}B/M{S p -delta add tail}B/b{S p tail}B/c{-4 M}B/d{-3 M}B/e{-2 M}B/f{-1 M}B/g{0 M} -B/h{1 M}B/i{2 M}B/j{3 M}B/k{4 M}B/w{0 rmoveto}B/l{p -4 w}B/m{p -3 w}B/n{ -p -2 w}B/o{p -1 w}B/q{p 1 w}B/r{p 2 w}B/s{p 3 w}B/t{p 4 w}B/x{0 S -rmoveto}B/y{3 2 roll p a}B/bos{/SS save N}B/eos{SS restore}B end - -%%EndProcSet -%%BeginProcSet: texps.pro 0 0 -%! -TeXDict begin/rf{findfont dup length 1 add dict begin{1 index/FID ne 2 -index/UniqueID ne and{def}{pop pop}ifelse}forall[1 index 0 6 -1 roll -exec 0 exch 5 -1 roll VResolution Resolution div mul neg 0 0]FontType 0 -ne{/Metrics exch def dict begin Encoding{exch dup type/integertype ne{ -pop pop 1 sub dup 0 le{pop}{[}ifelse}{FontMatrix 0 get div Metrics 0 get -div def}ifelse}forall Metrics/Metrics currentdict end def}{{1 index type -/nametype eq{exit}if exch pop}loop}ifelse[2 index currentdict end -definefont 3 -1 roll makefont/setfont cvx]cvx def}def/ObliqueSlant{dup -sin S cos div neg}B/SlantFont{4 index mul add}def/ExtendFont{3 -1 roll -mul exch}def/ReEncodeFont{CharStrings rcheck{/Encoding false def dup[ -exch{dup CharStrings exch known not{pop/.notdef/Encoding true def}if} -forall Encoding{]exch pop}{cleartomark}ifelse}if/Encoding exch def}def -end - -%%EndProcSet -%%BeginProcSet: special.pro 0 0 -%! -TeXDict begin/SDict 200 dict N SDict begin/@SpecialDefaults{/hs 612 N -/vs 792 N/ho 0 N/vo 0 N/hsc 1 N/vsc 1 N/ang 0 N/CLIP 0 N/rwiSeen false N -/rhiSeen false N/letter{}N/note{}N/a4{}N/legal{}N}B/@scaleunit 100 N -/@hscale{@scaleunit div/hsc X}B/@vscale{@scaleunit div/vsc X}B/@hsize{ -/hs X/CLIP 1 N}B/@vsize{/vs X/CLIP 1 N}B/@clip{/CLIP 2 N}B/@hoffset{/ho -X}B/@voffset{/vo X}B/@angle{/ang X}B/@rwi{10 div/rwi X/rwiSeen true N}B -/@rhi{10 div/rhi X/rhiSeen true N}B/@llx{/llx X}B/@lly{/lly X}B/@urx{ -/urx X}B/@ury{/ury X}B/magscale true def end/@MacSetUp{userdict/md known -{userdict/md get type/dicttype eq{userdict begin md length 10 add md -maxlength ge{/md md dup length 20 add dict copy def}if end md begin -/letter{}N/note{}N/legal{}N/od{txpose 1 0 mtx defaultmatrix dtransform S -atan/pa X newpath clippath mark{transform{itransform moveto}}{transform{ -itransform lineto}}{6 -2 roll transform 6 -2 roll transform 6 -2 roll -transform{itransform 6 2 roll itransform 6 2 roll itransform 6 2 roll -curveto}}{{closepath}}pathforall newpath counttomark array astore/gc xdf -pop ct 39 0 put 10 fz 0 fs 2 F/|______Courier fnt invertflag{PaintBlack} -if}N/txpose{pxs pys scale ppr aload pop por{noflips{pop S neg S TR pop 1 --1 scale}if xflip yflip and{pop S neg S TR 180 rotate 1 -1 scale ppr 3 -get ppr 1 get neg sub neg ppr 2 get ppr 0 get neg sub neg TR}if xflip -yflip not and{pop S neg S TR pop 180 rotate ppr 3 get ppr 1 get neg sub -neg 0 TR}if yflip xflip not and{ppr 1 get neg ppr 0 get neg TR}if}{ -noflips{TR pop pop 270 rotate 1 -1 scale}if xflip yflip and{TR pop pop -90 rotate 1 -1 scale ppr 3 get ppr 1 get neg sub neg ppr 2 get ppr 0 get -neg sub neg TR}if xflip yflip not and{TR pop pop 90 rotate ppr 3 get ppr -1 get neg sub neg 0 TR}if yflip xflip not and{TR pop pop 270 rotate ppr -2 get ppr 0 get neg sub neg 0 S TR}if}ifelse scaleby96{ppr aload pop 4 --1 roll add 2 div 3 1 roll add 2 div 2 copy TR .96 dup scale neg S neg S -TR}if}N/cp{pop pop showpage pm restore}N end}if}if}N/normalscale{ -Resolution 72 div VResolution 72 div neg scale magscale{DVImag dup scale -}if 0 setgray}N/psfts{S 65781.76 div N}N/startTexFig{/psf$SavedState -save N userdict maxlength dict begin/magscale true def normalscale -currentpoint TR/psf$ury psfts/psf$urx psfts/psf$lly psfts/psf$llx psfts -/psf$y psfts/psf$x psfts currentpoint/psf$cy X/psf$cx X/psf$sx psf$x -psf$urx psf$llx sub div N/psf$sy psf$y psf$ury psf$lly sub div N psf$sx -psf$sy scale psf$cx psf$sx div psf$llx sub psf$cy psf$sy div psf$ury sub -TR/showpage{}N/erasepage{}N/setpagedevice{pop}N/copypage{}N/p 3 def -@MacSetUp}N/doclip{psf$llx psf$lly psf$urx psf$ury currentpoint 6 2 roll -newpath 4 copy 4 2 roll moveto 6 -1 roll S lineto S lineto S lineto -closepath clip newpath moveto}N/endTexFig{end psf$SavedState restore}N -/@beginspecial{SDict begin/SpecialSave save N gsave normalscale -currentpoint TR @SpecialDefaults count/ocount X/dcount countdictstack N} -N/@setspecial{CLIP 1 eq{newpath 0 0 moveto hs 0 rlineto 0 vs rlineto hs -neg 0 rlineto closepath clip}if ho vo TR hsc vsc scale ang rotate -rwiSeen{rwi urx llx sub div rhiSeen{rhi ury lly sub div}{dup}ifelse -scale llx neg lly neg TR}{rhiSeen{rhi ury lly sub div dup scale llx neg -lly neg TR}if}ifelse CLIP 2 eq{newpath llx lly moveto urx lly lineto urx -ury lineto llx ury lineto closepath clip}if/showpage{}N/erasepage{}N -/setpagedevice{pop}N/copypage{}N newpath}N/@endspecial{count ocount sub{ -pop}repeat countdictstack dcount sub{end}repeat grestore SpecialSave -restore end}N/@defspecial{SDict begin}N/@fedspecial{end}B/li{lineto}B -/rl{rlineto}B/rc{rcurveto}B/np{/SaveX currentpoint/SaveY X N 1 -setlinecap newpath}N/st{stroke SaveX SaveY moveto}N/fil{fill SaveX SaveY -moveto}N/ellipse{/endangle X/startangle X/yrad X/xrad X/savematrix -matrix currentmatrix N TR xrad yrad scale 0 0 1 startangle endangle arc -savematrix setmatrix}N end - -%%EndProcSet -%%BeginProcSet: color.pro 0 0 -%! -TeXDict begin/setcmykcolor where{pop}{/setcmykcolor{dup 10 eq{pop -setrgbcolor}{1 sub 4 1 roll 3{3 index add neg dup 0 lt{pop 0}if 3 1 roll -}repeat setrgbcolor pop}ifelse}B}ifelse/TeXcolorcmyk{setcmykcolor}def -/TeXcolorrgb{setrgbcolor}def/TeXcolorgrey{setgray}def/TeXcolorgray{ -setgray}def/TeXcolorhsb{sethsbcolor}def/currentcmykcolor where{pop}{ -/currentcmykcolor{currentrgbcolor 10}B}ifelse/DC{exch dup userdict exch -known{pop pop}{X}ifelse}B/GreenYellow{0.15 0 0.69 0 setcmykcolor}DC -/Yellow{0 0 1 0 setcmykcolor}DC/Goldenrod{0 0.10 0.84 0 setcmykcolor}DC -/Dandelion{0 0.29 0.84 0 setcmykcolor}DC/Apricot{0 0.32 0.52 0 -setcmykcolor}DC/Peach{0 0.50 0.70 0 setcmykcolor}DC/Melon{0 0.46 0.50 0 -setcmykcolor}DC/YellowOrange{0 0.42 1 0 setcmykcolor}DC/Orange{0 0.61 -0.87 0 setcmykcolor}DC/BurntOrange{0 0.51 1 0 setcmykcolor}DC -/Bittersweet{0 0.75 1 0.24 setcmykcolor}DC/RedOrange{0 0.77 0.87 0 -setcmykcolor}DC/Mahogany{0 0.85 0.87 0.35 setcmykcolor}DC/Maroon{0 0.87 -0.68 0.32 setcmykcolor}DC/BrickRed{0 0.89 0.94 0.28 setcmykcolor}DC/Red{ -0 1 1 0 setcmykcolor}DC/OrangeRed{0 1 0.50 0 setcmykcolor}DC/RubineRed{ -0 1 0.13 0 setcmykcolor}DC/WildStrawberry{0 0.96 0.39 0 setcmykcolor}DC -/Salmon{0 0.53 0.38 0 setcmykcolor}DC/CarnationPink{0 0.63 0 0 -setcmykcolor}DC/Magenta{0 1 0 0 setcmykcolor}DC/VioletRed{0 0.81 0 0 -setcmykcolor}DC/Rhodamine{0 0.82 0 0 setcmykcolor}DC/Mulberry{0.34 0.90 -0 0.02 setcmykcolor}DC/RedViolet{0.07 0.90 0 0.34 setcmykcolor}DC -/Fuchsia{0.47 0.91 0 0.08 setcmykcolor}DC/Lavender{0 0.48 0 0 -setcmykcolor}DC/Thistle{0.12 0.59 0 0 setcmykcolor}DC/Orchid{0.32 0.64 0 -0 setcmykcolor}DC/DarkOrchid{0.40 0.80 0.20 0 setcmykcolor}DC/Purple{ -0.45 0.86 0 0 setcmykcolor}DC/Plum{0.50 1 0 0 setcmykcolor}DC/Violet{ -0.79 0.88 0 0 setcmykcolor}DC/RoyalPurple{0.75 0.90 0 0 setcmykcolor}DC -/BlueViolet{0.86 0.91 0 0.04 setcmykcolor}DC/Periwinkle{0.57 0.55 0 0 -setcmykcolor}DC/CadetBlue{0.62 0.57 0.23 0 setcmykcolor}DC -/CornflowerBlue{0.65 0.13 0 0 setcmykcolor}DC/MidnightBlue{0.98 0.13 0 -0.43 setcmykcolor}DC/NavyBlue{0.94 0.54 0 0 setcmykcolor}DC/RoyalBlue{1 -0.50 0 0 setcmykcolor}DC/Blue{1 1 0 0 setcmykcolor}DC/Cerulean{0.94 0.11 -0 0 setcmykcolor}DC/Cyan{1 0 0 0 setcmykcolor}DC/ProcessBlue{0.96 0 0 0 -setcmykcolor}DC/SkyBlue{0.62 0 0.12 0 setcmykcolor}DC/Turquoise{0.85 0 -0.20 0 setcmykcolor}DC/TealBlue{0.86 0 0.34 0.02 setcmykcolor}DC -/Aquamarine{0.82 0 0.30 0 setcmykcolor}DC/BlueGreen{0.85 0 0.33 0 -setcmykcolor}DC/Emerald{1 0 0.50 0 setcmykcolor}DC/JungleGreen{0.99 0 -0.52 0 setcmykcolor}DC/SeaGreen{0.69 0 0.50 0 setcmykcolor}DC/Green{1 0 -1 0 setcmykcolor}DC/ForestGreen{0.91 0 0.88 0.12 setcmykcolor}DC -/PineGreen{0.92 0 0.59 0.25 setcmykcolor}DC/LimeGreen{0.50 0 1 0 -setcmykcolor}DC/YellowGreen{0.44 0 0.74 0 setcmykcolor}DC/SpringGreen{ -0.26 0 0.76 0 setcmykcolor}DC/OliveGreen{0.64 0 0.95 0.40 setcmykcolor} -DC/RawSienna{0 0.72 1 0.45 setcmykcolor}DC/Sepia{0 0.83 1 0.70 -setcmykcolor}DC/Brown{0 0.81 1 0.60 setcmykcolor}DC/Tan{0.14 0.42 0.56 0 -setcmykcolor}DC/Gray{0 0 0 0.50 setcmykcolor}DC/Black{0 0 0 1 -setcmykcolor}DC/White{0 0 0 0 setcmykcolor}DC end - -%%EndProcSet -%%BeginFont: CMR6 -%!PS-AdobeFont-1.0: CMR6 003.002 -%%Title: CMR6 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR6. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMR6 known{/CMR6 findfont dup/UniqueID known{dup -/UniqueID get 5000789 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMR6 def -/FontBBox {-20 -250 1193 750 }readonly def -/UniqueID 5000789 def -/PaintType 0 def -/FontInfo 9 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR6.) readonly def -/FullName (CMR6) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle 0 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 50 /two put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3DD325E55798292D7BD972BD75FA -0E079529AF9C82DF72F64195C9C210DCE34528F540DA1FFD7BEBB9B40787BA93 -51BBFB7CFC5F9152D1E5BB0AD8D016C6CFA4EB41B3C51D091C2D5440E67CFD71 -7C56816B03B901BF4A25A07175380E50A213F877C44778B3C5AADBCC86D6E551 -E6AF364B0BFCAAD22D8D558C5C81A7D425A1629DD5182206742D1D082A12F078 -0FD4F5F6D3129FCFFF1F4A912B0A7DEC8D33A57B5AE0328EF9D57ADDAC543273 -C01924195A181D03F5054A93B71E5065F8D92FE23794D2DAE339BA29C1C6F656 -1DEF13780383DAE38A868377CC7D396B2A05F341AEE0F8BD0A0191F51AD11A4D -2E927B848A1EF2BA15CFBE57A51E3AF07598275195C9613041F71C1AF39E61F9 -EFD5F6512FBDA76E29DE6B508F62F5CF9F73F5288DF1C7B0B82C92D3B6358BAD -EC3CA20BDE55DAA7CC58004AA86B6CBF8C410D8287E88BF20588A39309C2B703 -CED322F030AA6069869064486CA651DA054FF3F5E56534CA358B0829A6B954D8 -9103436E6B06DAD1658BD4A95AB41343B01F5866FC87C4EDFC71F1477C98F8E1 -1DCF27EF743FF90BF918AB8C4E5AC35841E2F745480E5EDE1C1DEAFAD8D0018D -2C1F1CFCAD9F6609859DEDFD1648A6CD23D8ABB80747F94899F17C8F3E6CA55A -E176F19CDFDAA0D7C920B3A72051A4745560AC81978C92459EEE5AFE85AB247A -32981139CBE352B248F4BE5F73503A084A3E91F05328EE521D9669E44E202584 -5407E7846F9FEE3D54EA18FFB144BF2D6803BF65AE402034B3CDBB40DD24217A -3CE0E95E2717CACD603A958187C42B3558AA38D6B6390EEEDD396F96E6041FCF -6F8888221AFA87EAD79F46E0E32CAED91E6C8500879AB6E580C581E8C8CE9B68 -2BB5EFE2604E8DCB2432D39D75EE556969F1B2FBDF6A4BC72D106AA7CF22C268 -464027898B311613E06E1584707F262F71D9F49D2149306A88E02BC60BBD6BDB -EF41D90F19197BA9AEF32B5E63D5B9FF41B5602F9F786E76621DA54D574981AB -87A72081EA05D6C6BA940EFEBD0904EA4E77BBCE17E20B42E1722617E0F6EF32 -F1ACDE9D758594E9C81049CCC10605A27C2A06872FBA9F159CB155609B496ADA -4886F478E44029B5E620DE8319E257697E93E1CDFD27D560E2E4D34507020E2C -D9FF06BFA14E056D81DF701FAC3ACE4BE6C098AE116E079F0044391EC1661F6E -7A93B9320BD7F91E8FD2E8EB3F5CAE997D5CDD35107A1D35302260D1499B8B65 -39625B7925F97D917B66BAFEEA992873F07220714F192839948CEA080BDB9A03 -77B9DD032273DDB5629CB28B5D8797EDEFDBC601823E038384C90C79012A7D96 -8F27784DA15BACE21501C26E3AFA5DCCE81B52B0ABAF71A35D33103EA86F2415 -A39A830D559C5C6CA7423945BD3DFA942B20A06D7A8D8671F9831DBB52907AB4 -4E54776D29C6085CD9970B6DD21DD3EA8EB09C49CBEC6CDCEEB0BBB1B8827109 -3BDE64DDA024D67F098D6C1998506DDFF7907ABAADA1C39C759C850E0C6F8E89 -A392D1C9329ACFFA92D361218D75E115F70A47C53B73B356D703E9C499AAD098 -AA9C8119EE9E9708A9EA3049E976FA19AD04210D5F6092C7903FD155113F3A3F -269B746560F70970AC9F8D09956E0E84DACE4112C4E7C7F6B3F0B63D26EFF95E -2B2E9699D16BC8AFC4AD9113AA3A974C9E82E877288CF71E9169D2DCC61AAAA6 -C536E5604EF0716F6487292BBB677518504B52C63822BED3BD5FD14EB41EE6A8 -AD4B6CF90D39F98E12A765B645CBA3E8552FB9A986390212CE119E7C3DD675AC -17BD006144BEC534DA2A860188619F17589008409C5A309CB83FBA70F6446B6E -2B56991B6A03B1DE10C621591CEE45BECA27C54BC8B4F1754A9E8F660812710E -117850E1BB6FD89BB13F8CE391C43DA89EA67E9C3E7A4697790EA26B0E4E2E80 -DCA508873A7AFFC11B8C02EF86C2316E8D8B6BCEA37F81A3A87546705F070C3B -9D4D28C366CEBC1EE485B8E2357DBE46E86C87B9939DADA60888AA9F1B92FECC -CC1C198DDB594BB70A8FE690ECAC21A414BAC89BF019F34D2A130F485EAE35B7 -2A10C67EA3A48A4D9734759CC93AD85C6A570500AE5AC9973FC76EFA06BF5DDC -26E20E28D16B50957EE01AF2653F8D860817967AA5A9BF9BF7ABCDA710E9F34F -4F0EBCC32B3C9C2971F6225D2DAA6A451366B83F32B2ACB83E746D365B2DE38D -C1AB7447FE7B37F9630E410E5D8F0ECE74DF46C538947B3A167AD9F3E4A7EB3D -60F5425AE75AC3A27D39311DA35696C3DC7282AF1532E7AECE63D13DDA0296A2 -01487185FDF1875AEF55A36C17D6A8DD329279D229259463A2F05CB7A874374B -E2320E1F6CFECB9C1CE62FF468C29751ACD9754AF1EABE8E7696C2888914416E -235B6766F20FFBEFF285277B639A51EA2F2E30D207BC891B00F0436008F980E0 -9EEE7FB375BB069B9E0BA11DA951A99D8E60B4F920A0495C247FA7DE904765AB -DB5C3B2D634757E43EDD6FAA4DB3C67F82D6853E1170F0B2D8CE496DD4E72B0D -28277BEF172F1402959F64527F9B640619F04416DDB9D05FB2ACD019CB9C119E -E544D24EA6DAC5C69785394EA50E6EC9AAA9E14B904EAF29A733C6D7942B63F4 -85729686742F26DEF78DF0DA1CA7CEFBB684F4CAD99021A3B3D1FE03B9C5A4B1 -BD04CAC89BB91B11952A2B17A61789BEE0C54B46C03FE9A1AE73D17CF94BA30A -237C29D414C3BCE8E3E2DDF83C0BD59DCB66C4D2C3DE73DA8378F3C6C8035D28 -7464399857E57651A53E9C4AA68DFCA91B2376CF98AC5290FDB9BDAD9EF1604E -9B0A70EDDA1E564B6D2456E7BC722454ACA8C4950FDD44B6EB9AD01169A9F845 -B06A0DDB7897C847A5B1F42258AECF3807AE936C8F52C3A7A0A85D68160AE442 -FE81543DA6702D76AB6E8701F80DFC1D87C961E350D0E52AB2A298B9E5908600 -7E14D2A87309043CBF13F69AEAAB1BC239DEA88EB5176624F6046664B1D2691F -FBB2071D3706F97DCCA355A6DCC4D09FD35DC078FBAAF672FFDECEC61050A120 -10B5A96629041303FD01ACCC7686165DED6AA712FF8E5E85DE33C4E7D877C49C -6C469A90410BAF60BE65ECD91CDC2EE7AC0CA8BA7B53865F26092BFCAA0BCA77 -B80DC51DAD09C93C8DD8E43502B4B68F3D5918C3492196292447732BA90F5AB4 -9F5E1D634ADE1CCAAD028DE5EBA9535F6FC5908DBD2D643E0A7E059C8C386FDC -E72659C0033F535C0D7F6B98D0335552D0BF3C6E302B672A5EAADFCEF81912E3 -8F54E6FB7EC2B325125159713D0AC50DEE3673B9B148643727E94C80971A2E73 -5E1E13237BE69C84FC039DCE02ECE2668AFD047F21A61BB94A9F498C9FE5CDEA -B274B40728B6F6CA9B6C15BAAF92F465B0D7311B46545CBA90D874839443CCB9 -3110F052EB247B24B45A3D2FA6FBC7EB2A4BEC2A5892914B3C5EA3F4F9B9DCBF -6F932D95700E045B49E4B1F2C9D2A42CF39CA2F5A2654E6E8E6E92473D28AACD -5E35C6705EA728F704F5996D286BED433F976AB7E018621A577AED7C0AC0A84E -A032FE1869F603E6F20386E3A190A30A21EA886249ECF8CDDE2C33D73BA8647A -3DCA7A8DD9E8EC8D9A415D126BA38B6771C489DFC419303EE9C1B83FBFB3A0B8 -97D64F30E4BCBEC24DF603FF3BF541E00D5804B6B6543D3D2B661CC551D497A9 -9DFFF535AF424B2F3150BB39AAE8CDB306AAD37767BA10BADB031DC2FAB16955 -EE78342CCC0E8B5976BF98F215461A8C6F63EBE6E2F1A1104662DDE53388CB51 -8B44F3534853B8095F3B746A2459C2EF800FB1EF7F235EBAA9731E3AB3BE4369 -1D3636E3ADD5BDF0C34FA80E90D8A1DDE770943FD196E0A7C5F1FAF6970B34C6 -4673AACA6B2B5C12B9608521AE736C1F4B97209B063D991300ED5AF3D7F27E76 -68E0B858FD8BFF86581E2B9548C691E3E5D9EC4D39C9715CDE86C7D22223CCEB -8A38C776A30AF14912390A7546DBECECD7A687D4F08646E57A12C80DCA022B7A -33399761A50B8E0ABEFA1163EDEC3DFB5DA3248792EEEDD894872D4E6814B4C3 -548BAFCDE0CABBCDB97EC6D1BA47F2E77CC1389BF19D73661749AC33F46A618E -A665A85776545BF9662F2179D7BFD604FA8EF4700591AF3AEC647E27B24B76F3 -133F9198DC15C1AED830E737909E43EB91C334C44BA35810007A3888E33F5DA5 -B3B2C35481C648AFE630CC3E08F77744E401B2934E407D1EC17ECE737606B076 -F8DE8EF3344F57495EF49D11580D6FB28AE0B1422521B320843B13467501CAE2 -3DB93D7BB779F73B6AA30050DA74BDBC3F8DBB30F32EAFD07734A151BB2BAED5 -C9B1F790059339B64BB4146470F30928C9A49AE88906BD6FDB7431A4B50809CE -0F67ABA01CDCC2320B0B097187B9299E3D80CDD7BB5DD5BFA7B28D924C5633C5 -45A23CCEE097C41C3759C1FA8DBA0DD95034BCA89BD23FAC18C70093F40FF2F8 -0FAC5DD4835F2DFD40540E9A9E9FD951A8AF2CB766597DE00147B163BACFB7E6 -EFDA4DED594F1C746D8B46A1145E0E4058F5917B3F21E9BEBDE745EE72CDCA64 -FB31EF7A2E55265F32559480E2B6726D3DE26FFC97EB4E3160F117E890C4B2E5 -8DF310E6A728ABA85540F571C024F8DD58E1D7827FE97CED5EB31547EBC36415 -02B8C0E10B7E37D816F01D56A364B8552CBFAAA95BC4BDDCFDE91CE0EF005B4B -7AB56FFB47A093AEDF0DE1EA48FC8103CA3CA1470864D2693E360006D05668A8 -AA422CCCED20DCEEBEA5CE0DA1EFB00FB93E922B18124FA11A88D0F6E0F719DA -57603DD5DA42E1C56C2FD9E5415AA199D4F334C151C1157E75C107FBBFCEB706 -5F4EA47A29B54ED8CAEB8DDA2F53D2A703B95487619780A52DA1270011648A28 -AA64338E04AA5B92C1EDF3D8DA34FA6D227A0325EA6F22E9B38B6338C657BB21 -CD4C582DC04010330F62923F817E4EDC6E5C0E6500F2A975A8A95BAA30C4A134 -BB31B5AC45A2E7F6E9CDFC810D41344C4F606049445F8E93D74271C1E29DF7CB -5459593BA28AECF64D903D3E4D77CF5C04B06DE44A41EE4D9FC769854503AC85 -69E4A5106E84016DE3D59865D4AB30BD6C9E45C45DCB5408421CC50CD6179C85 -34E55CC70FBD8FEFE9F1D5160664981716E3BC7F24B6F54E0323D9BC4B692971 -24419EE62D8B0BA726E2B4294A9A76F328B8101DA29E78BD5C4AC383350FE196 -4D42DB1653637D19530124858950C22F1E9CF5BC07D46B7A58CDE19CC88DCD2E -7FE4EEFD8AA6047E919823C8CAB2EF5274F45E861E6508CC11A8AA90AED2403A -B2BF1315C2157B3B50A3685205D93E40906EEE9DE5985405974BCE0B84BB37DB -080A45C5237B269B93C0A7CF294A18B45464A41F604C494CBEF829A381155CFD -71CEEA54CC39EEDB6DF58A9896246B09F95DC6BC40BA6916AAB5ED3D24F66154 -3662F8978FC63DA9280FF7ADB09EA5BA79D3B66E0C88BEC1EDD78DA93839073A -A4D7B0E627000C4ABA76C47CCFEE92E319315333A5584A951E34C55412049C4A -A5569FE65A006F77B416E0530AB6A8E7AD6C72340AD4CE25937158FABB2153EA -281E1D840206F5DA38E00815E9081F81DAB9FAA8F4DAB305867AC84735DB4F52 -A36129929BD2084A8EA37BB6889695204BF7290B68D5E722540BF8A276F8BB6D -451D582EE59D2FF03F6B97DDE05FA00C3D375D2D0AAC8FE298F85CC067B15481 -48D70B6A0354C705715B891915FE8EA45244677B9FCE81E72D66177E309F3F83 -F744B9EA9E55C3B30DEC6E5E03B3988FD526A82A5E8E1DC79127FC62B2FA7949 -B3AD3148868DE22BD4B5708E32CEAAE6ADEED1F463EAB9692411E18F8D6BF391 -126B2700B4CF3B59D02E3F8795130C96285A63FCD1E0F647ACB1D35E9C58BD01 -1DD06BABA00CA4343BEBEDBE677E053E9732B33A7495DF51782A07DA07F5646C -770C957AD915CC70BA8E08BE7A1F4E6BA5BB9C603E38F6FB0A2578471C4D02F4 -283069856D926B9076EC73AA39CEB0A061AFF1575C7093FDAC9F89C3DC06EA45 -06F3C2A3BC9FF21128B10CB758DF0F099B459A5264A8C24C098110D2BA1A8532 -8FAE146A91BA7D033F591AB1A94B8A6FE0FFB610F698D216D58B4EF6C87B1524 -8037CBB7E23D8550A620341C6625A1A2ECE7CEE2598D66277F857231A36155E3 -984F147783E9B93975AC38A29F2FBCF704C8A04AD84C3E04A12D2321FA56811A -5B6744813CCC187968C5C26BB8D3E6615A912FA5369C01CCF8C0DB790593B190 -1A90CFB5339B8771F325C5FC448D36C7312B11A15A8635BAB59CF3CAD176131E -026F6E141B2619EF7F3048750CC9291397F141591EEC8B612D6656DD34DB54D6 -DBDD303CED74BE76664E7DC86FCFEEF2001C9DBA56418FB61F589566A47AF36E -C94671C5E8939AF9F4D53C0DE7142B7B63C86AAFA65877EBBB48C64589AFB2CB -1280AC099FC48058855CBDEB6C2D2A0D092267996591DC3B5EC8252984E9B27D -2E9EDE8CD8303F0905DBFCAE497DE1B755B924452CDE11CF4F20893DD6FF7251 -427F520FE00580DAF1703FD968E0F8ECCDE618E1EA5820EE6CFED97C78864EF6 -26FAFEEE194A268F24249D44829AA360D731C34DC285501E966A959180718F72 -6330E4CC060588A2F65AE64A720DCAA818D49D4440F5D0B6C1F6C3A107E12445 -F1BED2D3FCBB87A9597F01C7332AA79143564056219BF87D4B907A04F77621AD -054935E883B2B137D3D1C4BC792E8335CA08B6D83227F35736C41312A0BB077A -60FC6488C5E02FD51A10AC113D4EF70038C649C1677B2204A77F2ECBE9B3C341 -F4126BECBCA61E3F3801F9188A3775924A62D30FB096B440286FA655EBA00A74 -9A4162904BEA07CE68EE76018346DEEE20839C9A2FF71179B58E1D4AB30856B5 -F5D97295A097174467010B15D733AAC5813CAA633746B430B1AAF9F997FDAAFD -436844D1A56B8E25A89D2CC4BA6EE7ABD167818FD4F6C747E07B262C99EE2C35 -323F0B471586CA50F54C6381B052B15B0C58C19DEA82C0CA29F00400B727419B -2379979CDCBFA966AD513FA903160C571C3BF1BA239540B11EF2371A3880837C -6D6CA2F374280CFA1586427AE975A2AEC34244874E4D441DBAC6CD1828841C91 -069AA87FAE849C5DC7C9EC1B9876E59F3CCDF8BB23D939F5348D7486934BFB02 -CC5A22541ED352616830A510DE7732E5D8F7E785BBD31C2BC9D348CE5632654D -2C1740F89D57FB2AA1FD8FA3304EA03F757BB8F498ED98E48485722E78D97B12 -A05F3A28438084D1CF90AC4C3FFCD7B3365941C45E1E02CB13CA1E99F7FA1D00 -1C9D489D5C95F019AB4CE89FA3B6604473DBD2CE8E278969E0A0FCBCE68C23F6 -9381882443D3FC16966555FC222F3FC4B1207522201AB7A15A7A6F22CDC9D392 -360BF4C95DAD35770E0AC7E5EFF015F2C74ED7391F40EC94B8D1C163B5DEE5B3 -911A20C2625AD3B24BD94D2A42405E655DA47D3F94F882CA2F479437B4E0BE71 -8AFA4482C6FB270F8D05B4599A01403DAAA90C01DF3AA7C2BC7E66AB6AA833AD -FB6E5EE13E45CC7CE7E200FBFE639F9CFFF5D08512C02764997FD28368969BFB -0876F236EF6189BE73AD827332DF1B2EADEAC0ED3B939CE5BC3CEC78975FC636 -44FCBC2CCF4396AC7343EC62E0E4F3DFFA2B880BF31D93ADFE201BE9CCEC8BA5 -0B9B919E05B851E0909968DA259EECC6AA0743F25247978CC09C28C4F878E29A -5070E4023BCE95FE0ACCCC01D0EE219FA8344E8F6D7D4347563BF8AC030B9097 -41F24D4BC9494915A82EE9FD37FBB6A46BF077B728FB569B1258CEA5F51F36BE -4F4D0F890D782E44748CA3FE8C8A515998371D9C7D2311F192B4B7E7C68FC6EE -3F7136714C282A2570FE591F247A08319CE9EF1E43274E4E57166E31A2ECA506 -85350DA31AA4C33C9687F5210BA225EA1007C444FBFA2126769767E47A967884 -9F68589E4BAA9ED32A7A466DE35554C132810C68ABDAE536D9D884352F28EA02 -8A555D2CE11F30598F44A65E2D86B43ECCBDEED9E4E5B5B7DCDA20EAA09D9FF7 -422FC91F2201431A9E8FC624FF44D26C0100183D77BC7E6B1A6CFBD3FA8BABC1 -AE4CB0FD382E26BE0A83169B46D91429DCB746A0326243E212F802AF6A56C709 -6E70C6C7CA3775C382F911F6DF3D26A9F9F39C6A49A61FB0FDFD443ADEB01F74 -1254040BC520FE9C85FDDA97E17CACFC505669130254F9C16D813DDFFF35ABD9 -F6BB806C8138B974A5F04238A6E74C67684411B94915503133B27DCE131280E9 -6F1C994EB581AFAB29C433337F40D3DC691D98C47FE66C75B0B49A09E086BC38 -ED8B4F690E0E9848B3602A13A3BD0FD800C618C6CA60EB9397A78C285BB8AC49 -CC99A84EE7C903DD48A13B074D142DBC3B5A765D05ED43D547D3D66879BEB840 -0B24834FF601400FC99396AC6411C9968F04EC643BB1005C0235743DD58FC6F3 -010CC1517CA0F37DA17F47FF62F3E48698FBB83E8F7C99F4D7F8BD922F3E5A9C -E074FD9E33B80308783E17221E760F500A185C89E3279101A0DE477E268D236F - -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMMI8 -%!PS-AdobeFont-1.0: CMMI8 003.002 -%%Title: CMMI8 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI8. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMMI8 known{/CMMI8 findfont dup/UniqueID known{dup -/UniqueID get 5087383 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMMI8 def -/FontBBox {-24 -250 1110 750 }readonly def -/UniqueID 5087383 def -/PaintType 0 def -/FontInfo 10 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMMI8.) readonly def -/FullName (CMMI8) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle -14.04 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -/ascent 750 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 68 /D put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3C05EF98F858322DCEA45E0874C5 -45D25FE192539D9CDA4BAA46D9C431465E6ABF4E4271F89EDED7F37BE4B31FB4 -7934F62D1F46E8671F6290D6FFF601D4937BF71C22D60FB800A15796421E3AA7 -72C500501D8B10C0093F6467C553250F7C27B2C3D893772614A846374A85BC4E -BEC0B0A89C4C161C3956ECE25274B962C854E535F418279FE26D8F83E38C5C89 -974E9A224B3CBEF90A9277AF10E0C7CAC8DC11C41DC18B814A7682E5F0248674 -11453BC81C443407AF41AF8A831A85A700CFC65E2181BCBFBA9B440A6DD72BF8 -97084C906B05FAD969086ED21AF0AA1471613182B26117D7494DD9F9270EF3ED -8DA4D957225F75D060237B6DAAD5A0AE3E702B3D1C437835B93B8AF1F9E7D966 -E739CF3AD5E256F90286A34069E5BB4122F94F18F3485658D0D25B938522A879 -8215A417CA2CBD20F71C5C5FCDE21EEA7BB27876D93BA667868A419287FE59BC -F538980597DBBA743DBBDBEBC61E3286DA7977833DC8BFC5E52FF5DF5EFD9A92 -D070EB769E31E760A50FDE012DC0057835E8B9B046FCC83F1A0C40326AFB4E3A -0CC3BFA35FCC64E32854F32EB7DF10A19F95830136BBB8139DE1663B7FD790CE -464EA431AC109FCA0E03F3E0D355FAE20AC8774D6B1CE233C27680C77DDA7356 -560A27C75993E8C980CD1E3B0683F7E8A05119B3AD567DAB4851B66E418687B7 -F9B21B3BEF607918D5973421B68E65DFD8B6C8DFDCF1CAFE2637D365148EBCE3 -FA4CC00052A2A522205EA3AE3461CEE02042E1A3F11467CB6C8C849B200CCE3D -0BC188EC7B934CBBC0AE2BF5DEA228181DBF0F774119F313516E7D97FF532621 -9278F856C166CA6547504F34991D588A0631A5CD06363F3FEE9FA0772C783447 -ECD0A200929CB58EBFB6B72008E4082B5D14AA560C24915B9463A92F38237886 -C35CBB2D4DD6D0CA8C1D4EC46093041C6181C2F6586EE3E7D4E647A107B6DB23 -DAD9AB5A0C2905455FE58075EFF6B48597078BFCCDD84812B98986F34987CE49 -7EFB19814F2A58B0233A59331F6F8EB66401F04EE7B1ECAD9BC90A2BCEBE213D -DDDB1F75C83609ED6A669A0CED58B2E269E76ECF73616D94F13CF827C9BF354A -E82202988DCFE856786B8AE569AFF3105B55C72C58D310FFC0E10B2ABAC8DB06 -40D5F72E54770E9DED1AF4616008595B8481E3D9AF4191CC9A5BFD9DDD01C9F1 -FE7165D21E488DB40879E863D470CB31CA06E5B5F1F8C3CCE04B697CEB0F3557 -ECAA358D2EC2B370519CE06138FA702314BA01F1F33881825EAE1230098BB3C9 -59666983275CA4E8D9DB34979F86535577E79393A72F84B0F768FE8C92692907 -15E9FE9894E98A0EBEA490CBC8C7E5A9F3E43B24C2C5A4BCD71DAAD3CC0B8B82 -AC13933543E295C163F61C9FD18371CB514493F90BF7FB460C029B8DD2E2BF05 -FD66B451DF277864DE1EE42100BF29E01A50258C2758F3EDE211BB3457B8243C -20BE72983FD6FA2581C5A953D94381E32E80D6D6095F2E93A5455C101BA71E8C -E560D4694E4C167EFA25FB1E9D214AEA745CE34CAA5468FAEF8F6BDB6C6BE8F4 -3D58836C26A2392E4C4DECE284A90DDB3858A16D6135FED655A600929DE71605 -6CA32F6851A2A6F71A9DF3D5D657593BB729CBCA2F4B059365B7263DC08AB211 -9C547096E6427F6AA53CB2EB87DF0AFE2ABCDBD15D7EF228D3396413B83C6B4A -79E41F9BA55A2688F62A10472675E5658F151F9FD6634EC94EC0682C17448024 -CC1633077C07A93E4DA8749D974FB8F4332B5DECF97D749C10DB60D4C90ACBFA -E65AE928C88BAE19234690EEABDB30BEDCEF2660D7464D5071058C30C572A2BC -7DEE5384BD7614A4BEC4C84E18CF7EC81C810256E8CE6520466C033E2A36D3D3 -5D6074B3857415011D8D9D49A474D994571CDBB89AF92BEA879BEBAF67663F5C -17ACAE809C2231EDD0A76641BA52FA7B19A2798D54A4A9B62C42F9905851229F -2CEE0191C8AA5AC12BB0CE9E5E3E862683AB57DBB4AAD6AC0FA8BA4F408D41E0 -755F72B82B7C18EC6B13995BF7AFD66AF4BA0EA7523DA8B75EE751744EBA9CA4 -4E8BC1FB37734503A5B24FB9F2C2D07A47CFC477F02413D55BD7DC180B0344E8 -50248801FA6BE26C97F397797F5F9DF762967E7CD92CCB8B2E587C92177619A4 -BF8046CBC72C6E69DC78B8CB6B7381A290080EF59F5B9F29C1167B261C932E9D -010D2D14BB425D157F22BC0305770AECC5BC80000F8CCFB9930255A68F299ED9 -D3B5B83A2CC00E3305EB281E1A7054734661B175C6CA0AF168790985F173DF03 -A8693B677BAFE23C3CF833FF6463B136FC370E4F0C29E322DBEF637F62C33CD9 -B0A8338FD67EC628E3BF2FCBF7CF0347D5CBA1DBE6DE878DD670176B85F69EF2 -3C5CCA1BD2B8A385F113EF1CE522F5A6AE053B9C1E39408C9459DE3E7FE2C4ED -77F026B0081BB80D40185458139C16333EA27F43EF1204BFBF80BC5301B2A3AD -B10F7EFBB4F5B7E04DA1167F68BB6D4049440B0F57385FF0A95E72760C6A12F8 -1335BB31CB74081FBAA319180DC00113CF50CC5A41D2E751E055DA1429CD75BB -0060C21CED634FDA106C49A12B356129D010E29F2919301AA7F80222AF3905ED -672FF85C9897A70241E8DDB9A53034B6BB44E140D9E739848E7A782F24B98AC8 -00DA09EBE4532787E5CF3ED815705F659D8E52DC2C2D4949374A3BF192BEEB99 -1D9A90A4F3250BF8A1FD40D91F5B34AF2CC561FD02FED712500B24330D87DA9E -4AA46B6E34BCB40B1F73A1DDE07E002B9478E9651D2BF85E67585B6ED812BE03 -A594874A235B1C1840C4BF4BA6D863583D8C12DB49EF7F8CC24DCBB6B21FBCA9 -378F3E2DC406291AB324571F76E0805DF8826090F0E8B50599CA58D124653D16 -16C782B01C91A6F3DA6346482E3163D28D95EA49866360147296838A3FD0CC53 -920F91D895F839CB61FFD2FBA296CA4C6304EEE579782AE5FD33D0FA652BA7E2 -CEC7C01DD0D3E0D56E6177EE5F609A396F7FC8EADABB465DBA7F384E215C4DCB -E64F807A50A461545107F9C3F7D7CC7D33E6EBD6D9228B1DCBFEF160703E6129 -0DCED8D45DD54E2A36E698A616E7906A50901E453BDB2A363EB77144E9EA6F2B -6BD927495EB0EBA5755165707CCFBF8759CE5856881117C7F3EF6D494EDDA7EF -E499BCA56C86467AC573DA9C2724FCC74BEB331E736FB093DCB67DAD42296655 -415D110F2729BD1D55E5C9CCE2E724116F45FB2E66AE0F790258851A5C808762 -68B8A110BD326F8D3EC45004E7CC08DA42F6CB80A6B6E7C286F139534A275BCD -2F812993DD9C9A1AEB5E7E4BDB4805DFF3A7030263AB060C9B74F0C25C5B9005 -965284884450CC2815DF28D5F9B0496DC7A3AA85E1E42741E1538797175C28D9 -FD904699C771FB066397FFDEE8E8DD1ABBDF67E6BFEF95BB700A7C1BA91354C5 -42EC3864F6E19B379E79A1CC3C786C0DA146C6B0B8E507ED58DBB1F12F613A98 -0E1F8967991427A22ED323901C4B83336CD343212131E8B59C2F5D232702ACC5 -7891BFD4EBA5D0FA35AEF9F3520CA82D121BF6885BBDAF15248A9E4649ADB94D -0735CC4D14E1D7275427D00C8E709579612F7F74DB6FC218C10C278CC63E2AE2 -37EC996B10C0229D687F0DB5E38A8C4DAFB3DD8A9E7ED37186FEFC97790A1EA6 -636A88FA9FB4D282234BAAD301A1F3AD33F252C5EEC49410562FC52809CEC466 -A0F6D148E9AF19D6DA2337C8283FBFF6005C37AAEB0B7F7217A8DC6F949B9984 -72DEF163E4D5ECE4288404448C96A7FF0AC76F732D50AD63A1D286C9180E80E7 -C218B1F48E3034FCABA6BF262CEECC284AC29E9F3CA1CFC1639A681ED66C1FBA -666F073D45C84A286E05FF809D4764FE819B6A330E73695CCF2F448B4D4EB4B3 -F63E94EC289807A2F9A1159CF328C002B467B19D6E9454CCE36FC19E0A214190 -B251818DD456EF658B0398E275514B72D9C1DA5F806EABCF1DD56BC025D69FC8 -A0C2FAAC1892B64D2AF79EA2F57F103CA623E440307600D50E783FAA998EBD40 -51D23A0CEFF8D8649B48B982DC38D613F882DCCAE5F51233A641B3CFD783F830 -D984F116DEA3ED8F0D3369AE629A006BAD4523F8E3C7C6B39A6C972508B67AE9 -32613F28CCFFC4BBC86CF31A0C25C786554F7A1F3DE97F5CFD1A941F775067A4 -784385E2D02EE1FF886701B1E87D966D3F500E15591A5012E645837FE2DBE3E6 -A3D375C6CA0ADBF96B33EC3FCFFFD888D7344B31D40427B8A8BED0FEC6FBE038 -1FB5F0714C4B5A0E607E215B5B7F76ACF0FEAA4C9790EB7E13C0E3933B7C63FE -5B934EA34F4B741C3667BF1735C685CECA63507E6FB9EB06AA010311F12AC1AB -4CE3FE8D1EA1EDB3C700BEBA516FC71D740B1CA1A60D4578003973CC3EE21DB1 -58FB1CF7E2EAEB2A4A6C742EBC3575EE6378531C6EFA6E6986E68B8E25CEEA67 -A59623FC1ED2ADDA9D72DBA627D179E47DC7F5551E07EA4D54ADB6CC8109D340 -7279F288E552EFD79C17DA3431E53EED66D16F24BF86468C2FE7EFF421560500 -12FB048D6CE2F370BE4E560F8B4AA12362ACFEBC839351C1D5100C625B14CFDC -747B66082D4AD5474A63EA0054E9C3E6295AF6B133348487B0471395857F4B73 -4BF8337DCE2FE2E1A4EAD7E7BEDC822BDDCE42B79B308C11897C98E3ADE253CD -09CEEEC0CB1DB66AB072E36E1E04911F40B535B0FD85982C21B8A587D65C38D2 -DBC5A07A0A26DFFF7460F10781069490AC1B611CF7312A14B4AA6005A4582C5D -336BCC30EB47749193BE8D457A43F54204B070DF5AC2057B6437E23705C7FE8F -7BB150560F7044BE3E48EFDDA539FEEFB0D2A7856CD4E405FCE0F5EB190D91AE -578E2EDEB9ECA218573BB1A8EF116043A27DD17A4047BCCC7C5F3C563A910778 -45ABCA32C7347E6180ACC86F9D665FF025DD8AF514FC3724B5C3510F3C37E0AC -5101D1667C6ED4E8F37F06CC2BDF66CB5A9FB7C52CAD26344FD1557571336A1E -1E340EBA149B4EB99016D1A411FB874914AAB2A415CE3F5FDFBBF5AFD7959B9F -CB127BDC68D2A2F3F07FF3D4FF32046C0371CD2E68A6471E46B08413FC3C7A80 -A107EEE57979DB387B2206D2810DB310B7232B2DAA385256C8A58964B512003F -A0C24ED21809E2576229627278118107B9C32345C1EE8C0CFB452CA362379369 -31320DEB5371037AFAD093B61E8AC7A6DCF7D49C7F8EC32DC0ECEAFD7E892810 -039570D2956289B15E078C2545911BF535F72F7DAC619BBDEEFA855BBAA81704 -18F7D351B0936357085A32157AD8E27438A58B2397D69264E748B0B8D01B33F4 -D04DC59326A7DED39E247A1C1A1AE49382BDBDE9478A1CB48F88BDF14A268B40 -A40B9FBFC4C87FD3DF1EB2464C3C14E36CA41E09EE0A9B75FEB0769F9ECEB1BA -EBF73B818427FACDBC33BB95B9654F31C59A766E931C698A8608F15290FCDBD3 -5C535D9036A19CB7B55BF54E96F9B2206DC71624E2E55FE632FDFDEC8757AEA3 -1D83D190ABED5E7A7AAE2F41FCEBC7C18626BF58F9E9F02FBAE0C8AA85E9DB21 -A3D8907522DCBAE4923C6A2A09FD2F08FE32215C544AB577B337D929E625E704 -E041C2381AFCFEA37F3133B6CA20093EFD457C772E428325E56C9CBCC447EF9A -05A8C3F28017DD4FFACC51B38E4896C5044266EAB4EB7C13FE855E790DCF8A17 -B61B1D30DD866BC57397EF6297C4891451FD6A5C6AD6D7446F58F56A68650908 -224D9F4C31C6906FD29BB51DC947465B808438E6260325752808963C808A4AAD -60422ADD62CAF315F6AE92FACEC55D5B682089AC0BC051CE1E2C06A3874736CF -0DB5F7C8F178479E4F11665402781D80397C75456F5CDF0A4F382A19EC6AD64F -71A9275264800E178F212269154DD8352167C57EBC0A38BE794AAD1601C8E541 -7E1AB8E969A76E1EB4092644958FEA2AD29635E70C4DFE2EB0D9B3E1644FAAD9 -B27AD5466EFAC724718962B62E7B8C32F412B69DFFEB792587D571FB5C591D95 -4CD441662CD1B07595E245FA537FA9EB5A20A97E5C9251EED22C9961B48B25ED -85BB7524F635F9CBA3714C6D60A6BF920C45A64F4C366C1F9D22F53084997C9A -EFE2D79FBE3347111F5093E271DB7E3770B35D253DAF93653F6A23FA145AD775 -AF11E188EA0428137D9A14542E3EDA6F7B2E5AA86C9F3D3649A85ED2F020C696 -01A339FE6D7E42BC548C8F92A4E3809C67A986C99418772403D16D0E8662595A -1F37563671D6DA0F36CAC99DAA8FEA215DF7D45E61314915A30A22FCA86A50D5 -2FF2EF08E240F9FAC030D92BDFBE40F1972DF413E6B452024CD11792BFDAA2D7 -C82716528AD4B3D637BB43E748336DCC86A952BE96F1EA423E31340FCACDC1EB -02EE932F58734AF3A5B2279361B63F1D824EE3BA9F4D2EC7B33A300A1CE8CA43 -24616444176DB8099D85AC68329B1F85E4B5B16F3B396FE2AE7774F3065D0203 -AA140DC128D6F935C44733EF585F89E8639A2096A225A2E5E49D447D8AF9FD44 -CF6C1BAD5C5E5262AECC5543EC8199B00B72BE32A0F110F64A1D0D5CCEF38FD1 -155D6198E9A343702F8ECF5052333272CAC2FE016681E12745CBE14E1065EFD5 -407DA3686080989F6F6D650A9F1EB3A813B070C30C0D3B4A1E9C206E2E4DFD51 -D8DCBE9AECF956640A2E79F1B4FD0EB8E0449AE1B8FFEBC43275743B4D7F6605 -0673B61EB3189E74F51F3780A91E6A5C6464C8CF7D563D9958D46F39B1A12087 -6BBD4898BA9ABA468AE1F24115891FD3CBC2195F75958E26DF8BF1B93F7B521A -C12112237AB23A8E5A7B7D0DC4C53692B35F3CD813EB463C0BD3A6486B0476C6 -3B36DA71FE512E5745D097FD4AF5D056E434DEE2AF926B2EE79F7FC4FEFD4130 -BB4B4BE01E5C720325A4884507CB51CBA4FFB615B78A4182444F0ECBE4161A58 -E86FE1DA2E39C2BECBCF1F1D7B9B776A26078FC252128FA8108CB83F673CFD37 -CCDA493234FB93E1550EF8D2DC049ED95B00A8A57834B024B277D3DF062E748C -B61F183F2D72AD075474F8165528CE75E4F40B38B0FAAE45751C1907F8D31619 -E88EAB02EEED415F3EE3BC5BECC6AF565D34E0BA2958FF337A2B06012DD1858E -C53DE52C108BD5AAB76C882198C72CDCC958D68EA8FD26F76F04EC1A08B2AC3F -A6D0E8724D2656555DBC0C8C42A3E22ACA7E1BC8E9F897D9AB692E0FB9EC32EC -59E31CCA4516A3C3BFD5411BAC3DEDCE374D48681CE7D67DEAB93F5B5C5290AC -FEB29C5EA2C98095692873D36C7DA24847B66F31E4CA4C7AE5C79D7CE4F0532B -78620582E3731A2A6533A03E7155B33E7CD142FE79F72721862EDB24959B9783 -F834CB616FFCB2A23497BA6D99AE34DC459A2F7B3E4DA2B54BED118ADCD92178 -66C40F4E60F6E1327D5DBCA645A2A7C770807E6D7E47E1265C753F8793BD2D1E -BDCD749CC24D4AF9315A93F01180A0F9A7F420DA1B87664DA5FD967131273271 -9DCC45C3D57EB9B8AF14771E8E751D88B98D2FFDC72F5011D402EC34FD010ACF -D3B0660304725191D64FEE106253FCB3470F1A16EB7B45C1489D3534BF94F740 -C2781DAFA5E8A9E7B25A85BD7935DF3ADDE08C960E283D8FC3976FDB4085DBB4 -B6B35FB239C28C785B18BE4FC98F3A5F410F562DB5FCA04E8074E4E790F4265E -F88117B3D0833AFAE6E8B8A71D7731BA6F14FD6F217EDA3F8CC687A494FC3914 -B84FDC37C8C335AB1E7E0BEC7FB6B7A595C50CF8F0080C8D461BCB8B579A5155 -F963B6587873FA31C3A6572740C63EFBE58A2EBB723B7517D2A243F6CB08A038 -54F4DF0F6692022B2EE8C6F6B73735ED3166BAC58D9216A06EA6FC7B63B20031 -D0F0F99D83D9030B413C2360DD2C553E34BD67851B743C3FDA676AD63C5BD759 -9131358C6BCDF05FCC048F4EBB9005899ACDD8E9EC9BB8C5A08E83485047D263 -0ED69B4D1869A38068FDA03524022A1D32FA2AE0BF728D2A654E52B6A6C90A3A -725F86627D7C3EC5AF5AC512976D35FE42AACA3FECB401788D0BFFD9F4743BB2 -EC5B4E7891F216DCA5A69E917A171E0069A03FB214ED307DE947225049D46E0C -4707503F09811A597A9113921AAC23AB1CAA9866F81A02BDF349FAB129F23E86 -E384C043053055938D42ACBF9F0EE86CEBEB011BD5BB7D593104140E6AA9CFB0 -4E0B47C91E504BB6A95B2CBC36EC03BE01897C3D498EB30FBE4BD9584B9D766F -CB3CC7C96FC8F286FD681D3B6F61BEA096CF04865BC90012554DD15DD81BDC99 -5CDAF88A278A7CA272AA93BF309FC2485B022795BA88EB5266F5C03078CBC109 -4CDEAD6500AC236E3B93A1EE0B562FA71B0B4D594E26799E73C28D23AF4CA53D -7EF51C2D2ED1F89DA3EBCF481A9CA944488F03FBC457E29B493BF35A0F75928A -3E11C87E17007E60EC992B63ACCFC6FF2217A30350F4B02E41B31E63B3C4A2BE -4F35AF890A75CBB491FAA34951434A91DECDD7828FBC23BB24CD54F54FFC0496 -C0B4F2B457397789B1CE9E8CA0EE0FAE10BDE57CA86155AB164007345FCE4444 -086032AF8AA352ECFA4F57DB442CC9D673A002ACE753F954 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMR8 -%!PS-AdobeFont-1.0: CMR8 003.002 -%%Title: CMR8 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR8. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMR8 known{/CMR8 findfont dup/UniqueID known{dup -/UniqueID get 5000791 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMR8 def -/FontBBox {-36 -250 1070 750 }readonly def -/UniqueID 5000791 def -/PaintType 0 def -/FontInfo 9 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR8.) readonly def -/FullName (CMR8) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle 0 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 50 /two put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3DD325E55798292D7BD972BD75FA -0E079529AF9C82DF72F64195C9C210DCE34528F540DA1FFD7BEBB9B40787BA93 -51BBFB7CFC5F9152D1E5BB0AD8D016C6CFA4EB41B3C51D091C2D5440E67CFD71 -7C56816B03B901BF4A25A07175380E50A213F877C44778B3C5AADBCC86D6E551 -E6AF364B0BFCAAD22D8D558C5C81A7D425A1629DD5182206742D1D082A12F078 -0FD4F5F6D3129FCFFF1F4A912B0A7DEC8D33A57B5AE0328EF9D57ADDAC543273 -C01924195A181D03F5054A93B71E5065F8D92FE23794D2DB9928A7C95D3A6E9B -8E92F84CA0AA44461D2F4FA0F8B81C6F5B7BE98C9712BE166610465CF689DFAF -27C875C029C0116DE61C21DA0092D029E7DBEDFDDEE3D67E6936623AB53FA2AF -18BEDDD7AC19A19CADB6ED6CA7A26E6044BE414FFF59C0B98D5819A6B881F9AB -7AD0D03BDD5CD309C67811D5CF0B93F6FDC9AE64F74ED4E81F2E18D880BD842A -DAFD0BDF06300201C6946087FC0B999447BC370200BFB8CA420B668B32EBC242 -6DB1546A7164CF55B332FE9D239B65F532B69EF9F4F93828A44C8F5C526126F8 -B7A369114CA68D4F98638121F4E17F351723D9F1A902FCF087F94AFD23876517 -2D15B482AF2D68C3F31FFA864E031596E597882578AC7FB0DAE2A713B065B374 -3E2E72519ED6D50CBCA40A7275A7109A4F3ED8A4566AD8832890D3D1F4899850 -9B757442B7EA355175CD5D6D8B4152ED2D7EEB4CE30F174FF672140354046A45 -7098EC45B9DF3DF5CF7B417E201DA88308CEF4CED8E8903AF24FB8DD0187352D -25738519ECBC70304F8F620CC45D2586619205DA3955696FAFFE2082402B3502 -CB682F410DE5FFE80A4DA3D3BCF02E35BD577D0DE55E7B8A33B7A2FD5136B5DD -A0BCB61F8E7F4363C21F890CF287304DDB8FCE7FE207C0D160B81E7EA662BED2 -DFF8C444E19C91E72254257CD87240A70F1A964FA54ED9ECF27E27A57DACC3DE -EABB92C085030870C6CF5C40B6E47F5C0AEB30E84A73ECDABB2D754EF6EA28BB -16EBD6636BC288E62F4A38BFB55F5F4DD20FDD77D767F6CB52F9513E8EB75413 -07F1877B2C01278675177499E4E8EB09F2657821613F5C7643FC064293EC6E9E -B519FFAEEA36B19C9D1302CF91FCBF87FCB57C5F995CB6712BB3D8681EB6F05B -B2A4195A3C73CB4ABCCFB958EAC533BD89560D2790CDE1444C0F2E4EF27A529C -F01052964E56F6D76A190E5FF45934BB711A3406284AF130D4DC0D8112BB3752 -762CA0200CA262359D4F54C0CCFA9A50DE18C7DB14419E2990ADDC4A54B94978 -D9174CA39434022FA77FB30179EF805E2189C35919F5EBE215EE2A00B4407826 -CE56329C5586D8B414770BA5D45513C3AF1931D632FCE69B4CA504944E03362C -74A1177C6398A61A12DAA0F156543E2A8E9969C4308B7ACC21A5ECAC8F172541 -1B1316A88C0C163E574FFD3CD22FF08488662FCF2F9344BC25D02146F36CA6F9 -E2D0130C654B7485EEA9A110A33AA0C769121F81821E9A2BD062FAC158359D44 -3F9D9947200EF1EDDD5860F10438B162A69683957300C75AF7546C70C97AB2EE -37EAAF0089E2623F787F252569B06C665FDB45EC9681C0774ACFBA76B98C4E89 -7EB12AA5F8798FFC110B49C25E3A483ABE83B0BCC6DF0578403ADC369E013762 -C9D08FC94D949BAE636ACA9F36F4E3F02296775A062077B011A705B6F1784D36 -A926622CB3847533D7ACB24A4EBABB14593B5D8E1DAE2BFEF8A51835C8D4E76D -7543C126A4271C59A5881A5AF89331694F84489CA66725995DC3070F306EA447 -CF30F63CD476A46D528EC1FFBFB8EACFA2BEEDCF54C92CE2BD26DEA5827186BD -3A4D1709415CEE7D51D671357B4A5D11E835F63521B9824EE5282E58F05A8ACC -FD249461181A38C2F47BAC4E79BE368D64F886AA493C61CBCB2ED401C8AFBA61 -59CA6F6216D941A92AC52ACB3D7ECC28D6A58EF4CC70BA6DE23E80937AB38E89 -6F05FDD15B954C0826636267EDAF9F2BB466BF79D2E10EED9B04297E6BC93069 -79581ADD1A9D9FAE9306F46AC95B98C60A2E53D60CF1AA4069BE301E17E25070 -F98DD67BD8642B1D07571A32766072E48BF27E1576FFEED300D7313A358A823B -49C8F135961B7E259095C9BB67F996CE0B90E95344F203922F47E11753F70D38 -2ECB615403490310CEE6C03AFA97DA2F47ED47125D110FA69725BA0018F6A40B -29A307FDB3E52322A77A0102E6F57654CF1E96A134D13860D83AFA0A41112D3F -2247A09ACF7D06713BE443FA27C7E7220E875965D53030FE7D2D62EFD2F1DB87 -5FB091FEAF599BA8C5167525899E578AB341BFE2BC4E53A047093168AE189237 -EA55F055514EFA939DAE9E859CB5FBCF37D99484F44FE5AA5FA386B28BB642F5 -5DBAF059A50FE96C7C6D834531D64F1F2E99AB2E96EE74D149178B1C0618495E -293973D9A03E1790654B67C0882376ABEC17D74785B3737D81644F28B3BC6FFF -F92FE29126995A07E0BC5EF3A4B93789A103C428943E045B8D1A5063AE71E806 -568D48072E53DEA85253B01DF0BB7367A6BE4DD7BE514AD74E3F77C825ABA405 -64DAFA25EAFF8F63344B5F6B523629776CEB090B546469F6A6008DE43072DD3C -DEF51F62731037D1FBD0C038A1E9B669849EB3BEBA281624F13D20B61917A109 -A0A7871A73F7BAA18077360B38A4625C5DB9AB9E43BDEEB856FD0E2D3AA2E075 -267B978B9EB47F2369302E87DBD5D5B422830BEC32411FE75D584C58650EFB1D -136FEB92B94BF8939FD63AFB7349C7511E5E46AA7324F8B1FFCA9C2A9E9720C0 -A720918E8E860F137567D386AC29870FD990BD69465B3A3D2A0ECF2753578AD7 -80DC87EBB319EB5AFE0B6F6FF8616EA30C51425FE3ECBC5F8D0B0BEFDEF32FA7 -D168B4E85C804B7326A0942CFDE732B1171C643452B7099B31649CA2C38B62FB -46EBDF7180004C549B53F88021D029452C2B37D8C565BCDB0B11541039A13C0A -E45D4B68C7907B8BF08C6F41F564B62BB554235D50330E78DD02795516D969C9 -66119D718798120442CB7EB9877FF84EC69DAE25F8559DCE3BD8042959F695F8 -2F99845B1B5680DDCF181D806CC4903E077D1FF5E60918EB34C0B1E028422B71 -CA63EFBF3F4F3CD813CE831EB54265A555BDD35AD7D723F9CFBDAB29C54F8AFF -2D35C6A3299E0A2DB470C7B141B1E3E10DABB7873AE302926BA8743278FAA8C0 -DC6174501D6A289CF980A3F55F2DD5C3A514E7E7F13133C35D2697D64C25130C -DB78FC997968D6B3BC929E8A31B6D212C5128E4412632BC52B3A1049F7F2F61B -C74AE9A6AD19B9E2E240617E2882F7D29ED3A4279439107AF9AEBEE47CE85DE5 -CE9595A96A118ACF1EB1F5929930321AF7732E351E18C6AD378508E37B4C327B -0E06AAE21278AFA9255AFE5C022034DA2968D260879B4B38E7EE2E11A593DC3F -CE71ABA050C004473324CAB6F3C50E85DEDA3E9A27388D8FD3A8F6E42A79670E -F7549CFAD4CCB337A6E0BAA4846ABCA059F1E1933CF11DC0FFBFF550CC4A1B47 -CF7BCE0875FA747AA854534960F757884505A5AEE0330179A9547A4AE3E68479 -7A457DE83326DC30B67F27CFD4AB697601CEE352F72F0966B3CEE3EA24683BEF -6D23AD51B8432C3F0DD0D0F80791E1091F38988B7A54E466A9AC7810DE8B7893 -6B0AA6356597891D56190A7660BC7F657BC559E0525D41EC228078F2FBF89C6C -72D666DAD838CBF0861FBF0A1D4ECC069AA49DFBAE5C56B781A1D5D79DAAC256 -13E3F9B928A2394FC71691E4355642764459714412D6F8EF803FC5F7353822DE -6CCBB8FBE5AA1F2C7F4D384039D85E7728527DF9FE0239E2CF8BCB7411C000B7 -1FE660AE6A2A19229E5E8776CC83EFF3C27403935756463EB4721C51FE0B1197 -86C2F17842A0FB639F28083DFD4F1E86D7D3BEFA922514ABF489C5CCE93D6F72 -D2EAAE14F6CBA2BE4BBE7D7EA8EA19DB3A87350D4A52064137C3D15A5B05B03B -70B1DA7328D10713B83974C390C3270AF5A9A47C0BFBFABB9F31063B0CCFBB10 -0F236C74446688198EFF039110F6FF42FA9F82D463AD3958B5FD205BDF85DE20 -FE3F0C7AEEF350AEE6DBC1DE2E2DA4F4599956F59D6F121F7086DC120416E180 -52DBBC4E56C09746938698860F30007091E1CC0351B43990E47208ED495310F5 -7BA9C6AB3CA10A3F1B318FD47C1CE3B9FF1304321F9623E32D315AA9CE64B35B -F841E6C62B5B2488A311C94937879E5E0E170FA77AF0AC75C5E6E9F3E8F825AA -09C1702682E14FDFA72D27901C5BDE009B1E52E8C4511C6F6336251BD45261F7 -401CA3DAE7C4B0CAEB91B9954BF4A97C48ECE7FAD401351D59DDAE9DA94E2335 -74A2B880E4749D3D7026CB5299F16C204B6E00A20A6619C34922C7D3FB50F127 -3157CFC08DCC5164C8023CD1B6C3556C73CB8E4ADA845339CA9BABA1457ECEE6 -ECB9849DF1F0FEBC89E5F97C92978A500196520839CEBA6C0FD2E3D27BB4B4F0 -93CB2BB565F4627C6DB62DD0E084E627D69B5DEF42EF094381B62C0D67EFD197 -301B132420F51A41561E6106870147E0D597078435BE3819ACF0DE28AD779847 -F3D2CF667DA06955D53E0204CEA2935E9E984E76963D3079EC092031E2A10E61 -1227E5EE6770DD4D745A52655369EBA06A19BD7D95BBA271E488241199D1008E -36EA99F8DFD2A9F87B06B070158B466AA4C6EA3BA77DB0F853F0BF9A304EA291 -34069714368E0B94DFCBA3BE5EDB6C8204DFA7EAF5C3406F60A7056407D1BF6C -CB85C1F432F97D821F5518BBA79AF8453A568FB2C2D025A70CEC75F46C545011 -ACE3A99B2582793BA1DC655230AE2EFD24DE20A01D4A441AFFAB7771F223FA6B -9169849E727E494247F67D6E1EA9DCA06A082FE2094BD548AD7F08B565145634 -E7ED832FEC1378306DDC796303392ADB0CBA130B63B38ED57B7828B47732853A -893E8836FE19CCF27002AE92C2B2CACFDF8A42F1B8066E033B965D2E9157FDF8 -E1264B40813C1A4CE424274AA3528A4F09B3B53DD4D23789A68B3D17BC1398AE -0ADA2C2168427A49846DE0216908C2FFFEF4F13C1ECA12AD341E238EE46E6DC2 -B71B54C52659632911F901660261E493AE2483D64E119D9924489779B62BC9FB -A052E822FD8D83178E09ADC825DF0DA07FCE7AD68EEB29FAA275A13691B4A5A5 -B0BC0499CD6307610CD6209583C1152C559A2760823F8DC0B9B990BFFE7B7E9F -3969B968AFEAADB9FC0F1410EBBAA0DB979CF153F0B8C978405F8E6F2B6406D7 -AAFBF4A655A15DD6D1E9A7EAE10EF89264659B09283F50B734236885FC09FBE5 -98D780012FA77FCB19F15BDC522CC7312546C0730EF5225DEA8C22A3BC6554EF -4FE73B9AEB5C2F7DBD474221760E5F539A064AC450591BCF3499E3968F2CBD6B -F15BA2B37080A4129B66D4C2188524F025414F14DB3F96049A8B0E5EB2BBE7A1 -AD64A988FE875FE4FE5186BB4F5DDA16983CB052D474B7D72F3E8965663EB50E -015C72407C3437142D3D7DBC055FA627139488DBC5A0F98D805C2143D99F491A -167E07AF60EC9F17C36289368D740B632CB919A0E74C412B76CE7A5906D5200F -9E79CEB9C65ADA3A0F23E8947E834AE7A329A9F0AA7A6BF545B1D7B4666C6522 -CFF268634EA06DB3A82D91A4C0A9B227E79961212881A54A6762C335DE7E0831 -130C45D94394D21C049B9D189ED955438C2151514F17BFC67E431DD9A8349202 -2F616AEC1C7B19F63D5000EB4771370924BD4B9053FE78B5E4A244B9A149D66D -A8BF3B398396D2233E92E4A5FDC70FAADEADAFD255193D688842DBA865CF6154 -C9348D590F3FEB135D4B7BD4D76A52CB140888247CAFAB25ED51F4D187041CA0 -ABD956F83A5661CEC171B52AF92F9ADE27973B560C802E1E0FF51C4003D1289A -CDD09F8EDA8AFDFF666D35418CEADF3B0BE298F0D1E5C8E024D6A2017A7E71F3 -3A9FEC9930F1118101E040339F9D41379170928DDF5B5875212B271DC843F612 -E0C21C67263186E3D6929160464D4D5C8928E14D0845762C36FFBDE548188E20 -3B6BAFE5EECA0385142F01216FB8A90C43A472C1D4447FE5C7C78CC088FC72E7 -3FAFA062C338BDE8A430FDF1951B107D8D73FF9376FACDE5900BA362C66F8C1D -947F9545C5C13A53E4479B1C1A50472C05E8F8C266C6D4F4EB08E97B3B1BA972 -26973B844545089C5732322BCC9A5A8FC972FA0D7DB8BD85D2F515ADE65DA479 -0224F7EA2276CFED0B75B2C23AE7377F86F1F6F205D6FE19377D87E782143697 -984E731F83CA888199CEB425643C259D4FB8B58DD69A96085198306494BB497E -FE7C9954EF35B679BBE3847A9C73507874F71FC97665E2A58BA41407A1745247 -44A79B588D969D11CE4B863CDA655DAA53CEA5C3C263B345E782006CE9831D49 -603D2D95DE9E370D617F5928BA416C362BB2B4DEF16A5D44BD24B34257765F3B -6223B3F9B54DAED69A90C7050AB97B06693D253C6894CBD7B497DA449F1D9B7C -D91B421891EC0724F59C82B9CB288DC42F2D2D7A7F22EE3D910E15953D7766AE -276DABED3820390BAF2700C4653E1C77FE63DB71A66D93ED293E25B8412A1EFF -809554BF04ED0DE83F7F190883ED793803CAD2C34A66524D3A580ACDF3C13B22 -08F18905E7A4A16DA9ED2A112462FB9FFE481EC2069E484E8BBFC19D594153B7 -3DED4C11762223B7586483B06BC164D824D1A6FCAE80A35DE0DB8B33396771DF -76DC5C05578EF1BE00A70BAF3D951A01C87328DB2B0DAD6E1B4C21F37D1BC0C5 -A929BDE5EADF20DA60C4DE2E3C151005814F24824D33B95F700E09A0207EB602 -3EF60DEB1622B91DB99A855A8F1DA96358F05CFCEDBDDDFC8446AE3391BEEC41 -966E594E28D052DD5ADA49DFF65E79540EBE5329DFD86C23CC800F95221B9C18 -CBBF941D2FA47EF1EF59A89DB5DD188E75EE94AD2A79E2221107E5992C00D531 -2E00B544895A9204656867E3DE9D4CDB64B920B5CCA9A73E6514B36CABAE01BF -94C15603B86780190595560F792E5EF01650074EA4A9BBC6ED284B9AC2020641 -DCBCEE0ED27FE58171DFE104EEE4202759E594159DF45113C00236127A46FB35 -9EC705F21C0E456C1F0F924594C09AC64D4377C5FEEF764BA4A09ABA8D09DEB1 -FC13B0CD202B2F04CF5D73DEAB65C36C2FA7C0DC236BEEF6D23BFFC9C493DC8E -1831F19EEF81EEDD976E43BAC6B5CED13F901DE59835FC75490EA528A72CEB77 -24C38B258EC38B9E6B97F85CA8C10D8809BBE55A6FAA12456FCAC786942E123C -06D1E55F7ED04400088BEC968BC5081DC7A1B1B65166E7821679F76694F235FC -6854C8776AF855B83445D9FF919B1D80E98DE0741D06D6C5EEDB3E3EA6392530 -F1BA817737D8162F7B3A36AC2A03190CDEC654383E31934C3E0A012B639532C6 -26FEBE9B412F1C92D1943B7C18CEF510729D501349644C97F087F2F840074AE6 -D8CD0FB2E620FFC908BFCD938B675A0A4A687F7FBE8F3DD06A62D7B6DE7DF3E2 -49D367D60B10061EA86CD512F5A1BE8950D83C62695E130128E0037B62552D17 -064319BBB9B1FAB9D79705E5D68AAE9B36EA14BF1A59A863BDB8DAD9AB5D7B8A -E30E2B499F952D65877C8E38EDD7DB29F9579D09E629AC188DB6A6403AB4BA3A -D358B3770D727A2B77D84B6C9EC17E29D88E3421F9B7D2D822EB78BB8BB50692 -8C46DD6F9BBEF2E848A2B5669B200019802AD19661537A84D3514AEC5AA47445 -2C791E01DCEDF18D9506367241255FFADEEA6183F51A9F42448A7DE413C08359 -52DAD2A60FD606AFE14702BD3B0EC448720FE63438D020DEDFCDE3582FC31DF1 -17B25FC152789D2F17FD60B8209D292D2152DCF8D28B5ADC04F6659BBB746CDF -145163361823CA343763AA951C640B5D4A99B7787105A1609EDD6A596EFC3F6F -2FC33D0D499DBE56C6668E137715D435D6B683E0113647B2765AB0F3D98AC717 -5B33C3EDDE18506E73B4E392B022F30480BD30F59B2E3A59D93017296C3156B4 -B5722E1955777716388AA987B2665669716F866FE6BDAD5E74A523CC03915F26 -9B7B231F5D9B1F61DF7CB01ED3F27070E36547B263855DF5B2E3ABD2ACC440B9 -0826E1DF4743FAE6668B61F72C8700992755522AB11C765981A9BEE0D040039D -6C2D64ABED527082C97CA606127AF5C0C98647BF46AB8149F215BB0F1087E62E -740D8676CE8A486096DFA164A37E97EE630B2A16FF4BCF31B9A630D93C278ED7 -6D6003D463C33B8AB5E8BFB9777F0B3D3243D650AC5641B91082A85801F907A1 -54CDCD22CDDFA0F5E255F1F7E04A621013F0F3841D824897E67DFC2F5AE51C4D -36411D26424AA9702018C26AE65120CE396C9B001DBE259A3638455C3F4949F2 -BB23F04E53097AC814F9DD04F0F26BE3F8C2118311C916D2FD21628BBC018A31 -021BC222B518F904ABE96333EB8A033D13E80033452B2F7C8F400CE65F0EAB91 -81EF6447CEE4BB024AC35075D24EF62ED3E393401BA04C01CA115E0231AB -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMMI12 -%!PS-AdobeFont-1.0: CMMI12 003.002 -%%Title: CMMI12 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI12. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMMI12 known{/CMMI12 findfont dup/UniqueID known{dup -/UniqueID get 5087386 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMMI12 def -/FontBBox {-31 -250 1026 750 }readonly def -/UniqueID 5087386 def -/PaintType 0 def -/FontInfo 10 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMMI12.) readonly def -/FullName (CMMI12) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle -14.04 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -/ascent 750 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 68 /D put -dup 73 /I put -dup 82 /R put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3C05EF98F858322DCEA45E0874C5 -45D25FE192539D9CDA4BAA46D9C431465E6ABF4E4271F89EDED7F37BE4B31FB4 -7934F62D1F46E8671F6290D6FFF601D4937BF71C22D60FB800A15796421E3AA7 -72C500501D8B10C0093F6467C553250F7C27B2C3D893772614A846374A85BC4E -BEC0B0A89C4C161C3956ECE25274B962C854E535F418279FE26D8F83E38C5C89 -974E9A224B3CBEF90A9277AF10E0C7CAC8DC11C41DC18B814A7682E5F0248674 -11453BC81C443407AF41AF8A831A85A700CFC65E2181BCBFBFE3573BF464E2BE -882A715BE109B49A15C32F62CF5C10257E5EA12C24F72137EB63297C28625AC3 -2274038691582D6D75FE8F895A0813982793297E49CC9B54053BA2ABD429156A -7FFCD7B19DAA44E2107720921B74185AE507AC33141819511A6AC20BC20FB541 -0B5AAEC5743673E9E39C1976D5E6EB4E4D8E2B31BEA302E5AF1B2FBCEC6D9E69 -987970648B9276232093695D55A806D87648B1749CB537E78BB08AA83A5001F7 -609CD1D17FFA1043EB3807AF0B596AF38C91A9675E2A53196FEF45849C95F7DC -182A5EC0EC4435A8A4B6E1CDBF9A5AF457564EA72BF85228EB6FD244F2511F5A -CA9B71A65D53CC06EF5F7EC3A85106139A4D312378BC22183C09A229577B793A -1B7422611C03E84BF809F46C62CE52D3AE29CE01C32B202ACDAA5B72733EB0AE -C31D7EF7BA88D2D14F85313F7A8B9B7A5B124B03AB923744D336C969E5CE304D -3AD977A46664479EDEFB69F113024E761C05FA48A54072DF9E12C2F352ACB3E6 -D04F6EEFFDE209E7FA3DA22E5B1D1409461F4286B7F4F8251B44E5CB7805762E -E129FF4A06A7458F3191926B1CAF70E32C6571AD2DC07C34FF62840896F4D200 -761B1A7FA356526D1E3AB4C542AF13623BAEB9F61B1BEEF79A9205B1FEFDAE24 -8799D516A9ACC30BC0139C63C9A0523E9D5439213B67D490C96F902958779B8F -68BD8E9FDDCE8A3A2E35877DB6C94B7612382ED8F218EB1157D2ADD090A2448D -10B99FBC9211C5629ED1C61C74FE93041E5AA03EA4AC3FFDA00C2B6E719CFAA4 -262FE17F66804A6B54D3669836EE4367D2A2991580C5564463C973CA0DA38AC6 -922716E13B4A807B50304B8826CEFEAA47C305FC07EB2AF25FA7945797237B16 -56CDE17AB0834F5C97E0CC5741B061C6FF3A8DD1A79B9A173B66A6A750538E26 -32FBC92E75BA15CFFE22A7302F47908547007402569158F62C29BA2956534FEA -7DACF1E507AC309DAE8C325F2A6023D2FBD81EF42146BFCE6A16A6310A650460 -7B07BB7647C8760FADDF0DBBCD3DA6CC4645D1732DB3A22D8B76E1D2D48E4D4A -46F4BEB80CE65F3517283A1AE08391FD1C10ED452133706BC6725AABC80107FD -754A8BA47B0281D479F052CE26A723EFFACB79B213041A536542AB334769A2BF -88505D82C498ABDD5A73EB539530F47CAC52825D16A969C8BB56D4A7F2830B8F -CB63B92B576E7BD922A4B25E634751F8A3B7C4EBAFCB373EDC8B8281B1D1371A -7844E9AD990CFF09F0D7ED73A5CF873D2D5C9E8A9923CFA31E1A4B4CCCC40760 -8B3AC8FC3C88BC08BD7407725281BB879A1A822D94997826418F1B89D303F2C0 -BE7A0102E6F529630CBF1BC5BF3E4578C164A3DDE45E62A957EF3FB7F0FBBA6B -CA1E79A1ED195B6A11CFB345B663C5E72FA55D80476F604F6C4257B51686AE25 -8F7D159FE605DDA0AC74BAA5034F29FFFD403070013C6E2D8EF6A0990D91173B -D5A3AEB98B64E412991505C3CB7C2CDE13C091FEB3DFBCAF30C4C19511102300 -135BD5D444BB55692013F52056908DFAB2ABFACE81A58423ACEC59344CEF7D4A -C5A3EFFFFF70759BC3E593D878281225060B97D1BEE6B26EED90571FEAFA1812 -1115C0EEC892F5DE6FDD68321A0B3F10A2D771B79BD85476AF6018472A499A86 -07D64CFF4550866AFE590C471C80EB12CB3A989A60BC7BED39097C12D9286E39 -14C7952C4C64820B4DE44A1827B7B0B535244E93FDB80036D6332F90F95B472D -7031E7E3819E881BD0313CFA112EB3AAE943C99C47635CCA7E34DC0306C04E5D -2E9F60FF037EB11602BE74E8E6B711392E866E3E55D988F7C856417A2B9C186D -639819B4786D039B77F8578EF63C088FF28BD08D8353031445C8498A8F445BC3 -D08923D32AC04BF3CAFEFCCC1E77EA894F4E846F47EF62D6841B8D8576FEAE8F -90044626869D04D61D64D56E8C51AF8C18D6CC3FEF3B6C4F7D56FE3260354948 -10104F69B117FB8269292579A7D52FED688C663B643D8D99F13956612271073E -1A337AED059B7A93819A28CDF01569CBEB51069D22ADAE25C47355560F402B2E -8C9900DA82B79C64497C8494F42FABE5AC41791C2010D98FB7E593C744F250DC -D837DB0EAA4F75D0016970F3AE8359878A08CF9A697A06C5EA945819151265B9 -1A12122B98F79185DF852257BB4798E7DC03712EA6ED34F6E6AE1476788DBC33 -9229FADB8D581BE1A63F596698DBD6DB98A092F67197A4FD4A50B648F2691875 -EE2495D6BB310078F516785A0CEC7EB6E8305FDBAEB1D15690409FE32DD9CFAE -DBD3866FB63EBCAAB73E3E4BE5D7F3AA44793938AAF3F8341683F0790F1D46A3 -60CE083F9BEDDA22E0639A92393960F86602216FA51E2754BC2F4CD0BDECE3D8 -FFAB7E0E49613DD4956C9A10AEA798BDA1F756C755BEC12147ADECAB0FB73B7D -203A11D84DD2AB5AA98FD38C1C2573570FD49A4924A94A106D2A7D850E793608 -FB135853E8C4204441CDBE697FD0CB330B1C3596F32D2BCBF263237EAB362D09 -DA6F531B40384DC91F30674760CA7B64BA1968F6A7FC9EBEF431A1AFC5E76D7F -2D44DCB7F61C7F6B16196B3E8B47343F572DBA8B8B21B43E35BB6B2DD5C7982D -244FD4304D254D6CCB5E8CF70E77F50812F41A988EEB3B26BF0F6F69BBA18077 -31134B5A5823D10FEF6201D045AEE7A24E0F25376E9FC66340C56C05F6CD810B -724D85CC4BB8D789834A447CBBA159565D08BA5793D8599035BB5063271518E8 -F6C50E7DCE71B1D186270DDC860C6DC0CD506010EB5B1FDF6BE47A9A18CC15D7 -D657E58BED9EECAD5CE5D49F63139A39BC52C6584BB2C3264D51BD584B40F8EA -AFCD8B83F548594386EB2B05CE803105E84931DC6E7A1398073D48E130E0D907 -CD0F1ECC3254EDF5D4DDBF44415DC9BA66C673820CDB0FDF033D59BE2B5EFCEF -01FF9D33EDC88F8D522E07F1689D024DBCD09A16A63519E1764C8630FF36058D -CFC07027E0ECDA01E0E85B166C613B22F587B4D355EB018BA93E92A36007B4DA -287FF5A91F7D8A0EDF5554ACCF45AC8066E88865C5692E63EB99CAC81367B605 -8E6C19EB98EBFE0D2D161B447B9A70CDD1122C7B78A413369016E6D8481E2AE9 -9AA97B5DD0ACC9B0820F7742CEB2F46F89F3E2092621969A88DC0156B4F941A1 -6BF1546D4B136657C47B082A8A35FE96016BAF3D9679B8C32EDDD6AE6DF3BFB5 -7854074FA019707FC22BFA82299E72ADF9A980AE29A8E2434277E58B01F6B03C -192E1E25DADD49F6E3F69799AE62B56E00B60A031BF8721DB8B2CB6D4A4C15CA -AB1FDE010AB7DC0DDED977389B101B8E53A949222FAA126656E02817DD32B0D4 -A49516CEC2B97EA7C78FD66229B044EB92F502384BCC6CCDFFF995EABE3BB7A9 -50D5D1AED861E7D3BA8D333026C673C5762712E763E59261426044583D789C67 -A606B96F97663F92BF104CE02FBFDFC521EC0D6670B7D4F85A229F51426DE912 -3B729C4A535FB7C88D0A5E78074751B58885DD6BDD2DD9E9C83F105E8CF63DDF -CA7DB39D0319CA7CC2E73F42747F007574DE25AE1538B4D493D22D0D5F0F80C6 -5F6FA3937C8391DE2F0116F81DB2DB0EF751EC838A7F85F163A6F48804E84B96 -8D715EF25B7E2A5CAECC558D80F421052A1D698F3B8452AC27E30A4E6226E3CE -084C8A83ADA0818A110923CF7AC7AD4CB92AE4ABBE0A9EC1FF935FD02774C1F7 -92A278E513012AD17722A23C55EF82E18F8847B5CCE47F4FE3EC508BA563F7B2 -AE56C94285A18DED4D432FB0CEFC05A20BC17DDF9FF919C724810A8ED7358A27 -97EC93C1A13C443A91947FE1F6F528EA7B628917FA7E554A1D7B31ED46C5ABCF -92BA57961C8876DB4041305EBB029B03D8351D5E2819FF87E97ED214D8F1CEF5 -7F7668DDE223721C0B810F4A4AC81CA4EAC86EAE546E1B15D91E626FB9A31824 -5BFF17C4E79FD56ADBF6DBF01BAF6453A81EBDCB38A5FC0FD0FF0646B3B0D199 -13E2E59A1B5CAB6DE5329BE389BA0E2A2AB55CA40B711ED746C24F1E48892E76 -6DACF7DA163CDC90CF076763008E7A899870CDED5A80758E6177BE6B93B07EB1 -5800A3BF7B9AAC3FA825CE594EF5B7546B181375FA8F37608DF17856D2F8EBD5 -6030A9E6F6BEAF224AD2AEF76D03B023E2FCB922CB8E3C6816AABB61FE6E4F83 -F21B4935102C860ECA03DBEFCA461F0E5B93E5A8D18440BCF7D1D6252A24CB6E -A64FDAC8B67C4888519AA368D9C4A8C08C7155DF5BACD75C5196C571C3C456C4 -7CE8D90215FA6EE8CDD72C48740F7F5930EC3632DB63A9C8D2DA125088C0F05A -9FC83D16B7F53163F4EB6FF372C6C3115F1E68EB35967D11126EDEDF0BF80817 -E68A698183B3EB0A207DB43786E1B9D289359D75AD5E465328CAA90E712C2962 -AE2A466173F2FF30EB535A6054BB0B875DC8552C16B49DF17CF84D98D35497BD -F55E273FCBB0C735899529A69990E09149FBD2DDE64B7FA8D50AE83925DF03C8 -0B63EA158FBABB12A028803DA4B9DD6C48C0FEC469C4E730729F4BB420D5B003 -1918B4AE9CF35CFD31E8E62A44C0484E3D00143BF1D330235E821E5CFEAB4D31 -7CB4604DB1F310457FCF9075A3527279644D908DE847CCD00B6F50DBDEF91D3E -38238CAF550FDCABA2C3A46237218DCC5A09AFAF69997E1EBDA7EFE6FC99ECC8 -5D4AFD5EE35FE2346BE79B499EC8EC436868154A947D13BC02C780EBA4B9E64F -3026F1BF5DC1F8D64FEA1281EA40B4BC355638A3A59BD9055BCBB232FA45EA0B -B405131B64F105814019BC55466EE78E9E9ABB62DB30EA452F7EFD7196C76A85 -15B2CFCD89922CADC0F392B0C54A231F3999AEFB53C24EB0C63B0C8A1A1ABB6B -AAB2F93E5ECC7AB90EADA320E918106BAAFC1F8C425C617639984629018BA674 -6FF4F338AC43E23BC3740542911C058D43A49A11CB3A0CC8E3088BB5BA6048D6 -CC2AD250DE956BFBE83BB24C945C20D9C22E7105983F284EF478F9B68BFB0322 -EEB7D62802CBAAEFF1C2332159DCC7243EA40CE15C734EA905E04C476B178B82 -A08ABCB0B86A7330C75E62EE7844C9E22DDB013ADDF20AFE08122EE1B930A81D -806A0F8CC584CB7FF5F56F9B35E5FF78FD93E7E4A40C64537464EAA275FE88F4 -461FC6A467C8A69B9A9FBC10D44AC1B753D313A8E7D97F5FAEB60F82855658D1 -4DCEE043C8FCDFD8A29DD091F3BA55874A458B2B8989F35055C72FC411382361 -9AADC717E602B48D7C9521D3971A6F7EB19D539445DDE9EFBC5B58FA9E5E426C -172C45CDA24985FC4632287FC3B15849DEB56F5A061993AB10A6BC59868534E6 -69888175053108B77E4978D971B4EC57224C0F93EEA4C15AE92254140A94704E -ED5666FC06C5341F643F779CC88A9E81891565C63B6F7F6286E664F4E0A48690 -356DC96F1B98026C563700772485B83BFA06435D4E0793EF822F423C93FBACA0 -E5D889D2B76771C6F0EE997A5DB43C2F6921132890406E3C33F6F159B14C5D78 -7C151BDFFDD02B697315F191B5490073EB418A4FF2A398C68D44F0CD1B87CF9C -B52F12728B72F94D752D23151196A256908135C87991E508B8906CE2539DCA8A -31F86809C8C6C18A09F6129BD7CDC6B37E76B648788056851F22BD3E3B5772FF -EC01D822B57FFDB3BAE624F05531292641FD6A7E3666152D18F6C653048DD7D7 -98A942C840C4A0FA662F260B21C64214152BB86F03662A330109C5AC0A5EBA30 -C6201F558858130703DF76AF4FBBEE069BDE45C0D9467077D85FFED4F9BA9C61 -AED87D67CDCA453A6528AC5BA153E1039D9CCC556CEA5CBB542265FF54A1B208 -E0E13740E7E7C26AA00AEE909F8F3ADC2726081A744D8EF6BB711BF5F611A900 -76F91C26A338DA13A7160A9F42410CCEB3190000D963D036FDA05A29F598EF40 -8FAE6F8E7E6F50C99C3304A573501C13A00023085F057DF331E3354CBE65D573 -CAE73BF15B3B96B502E0AAF2B4A86237E98A997AAEFFF4227D5A26E8972C48E7 -761F430733E6EF8AB2D903C17FAFBFA21C25F8A0AC157D397BF3CC1AE7598F0A -2BE4FB46B29443CE57F41FD5F91122E9D86F903E94D5B55E2BB95949C156D138 -89883BEFD634311F9280C7F028DCA6408D3A682DF5B55B9F7ABF08F019190F60 -D39E4F0E80F0594235B09A5320109638B938633A2C196E4ED2B43DCD8643C3CF -C6123B076B7F73352F906D96FDE0FBF50CCCA432712C574D5857838BAC30B485 -D25024EB254A7EFE57D1DF0892C275CDB3DF77602F0FED0FAEBC644BCACA04B8 -B424DB125E487794CAB36E01B5E1A26F5E1E97A739AA36D77A12F5B45338EB39 -AF36CEBDED55DCBFCF497FD475FC6BAB5530AD6153C6BD982564EE8712185F1F -D5EA7ADF4104661168A01994C1FD773A50C8AD6A3E4D332E4D59521BB8BBC6C3 -866EB4AC3EA4532477E6CBF6BBF0860031C3B916AA25E3492670EA67F55CF4FD -207C684A0DDB6F4AD21B2909CBA71BCE2E762012B0927BA72367A6AE0AF87F73 -756C9BC85E4EDE35317E2CCCD138C02C7A8013AFDC1A48C3A4BB8EF257BDEEA7 -60E012F54D12D31D18DC59D5E526F12567B8688B4B67E16B56713870300016BD -A3B9DA87FDC865246AF8E94316799110D86B1DDADB8A673402D4226C519C058A -1D1E5A5778584FC28AF12819B1924060BC4F54B1054EA6AB0149E04B8C4302D4 -A56D8A347EB5D3D2A0E12CF7E35059BDB53D9FF6BD25F6D9619BC4669CFC1048 -C6C9978B8751B840F27D82A69075832BE59F55C1737CBB1220FB8FF691FDBDF3 -03BD7D225A9372AC221C38245E48320E1CCF898D9EEDD678E5B8C65B7F588321 -1A3953EEB9B39EA9A8CB72DB08C3E9234DFFF5FDF9DF804C021D57E97DA7622B -97F4CB6E0EB640E0DC9EA15C5193F92A3A7565F4C7A4C9CC327F7CD2C44900AE -D9E76FFE62FC37FA376E77131B566AE67C3E09DA80F198BBB995EE8FA47EEDB8 -4B467C6C7DB8AEA745CF8C56B8BE56534E9C56FCB2B7006426DFE93D728FA4CF -94F131C549814E54ECE7C914C5FE8E4961D3437CE7475D03534B62650F551D97 -201C794AA877445DBEB11C85ADF6119B05360700F8CEDE4766E3A1D7A35CDDC7 -9ABF7C619E3868A39D1852DBE1EEAF5D7898C78323873AC005542B68C43C5000 -CC58F675EB595F87C879694751494676465891E8A897158B481F11A171CCBBD7 -29603F00210CFD7FF31FE3D273933ECC34AFBCC4108D9B76D9ECE63EA06CF939 -4799092A54A749DACB82C1424E9879672C8BC084C360014C9C1B6D5D65C68AED -66CE329C3AD712C0A36BE7EF03FDF339CAA2E0336D387A693B1DFAB5D5164E31 -14755A158168962C9B399F8F1DF3FF5060D7464D5071058C30C572A2BC7DEE53 -84BD7614A4BEC4C84E18CF7EC81C811724463BD46CECA5FB57B0F55EAE20CC74 -6AD815D1897B037C197D2456797B992C20C70B663BF99FE28C513B4E221C8E12 -49779F8C0AE8517048ADDF7CDF0D698E3EFE60071C4997B7F5EF12B6CB65390C -224F13FBB99FFC034C0710F05019899689B6D3350BBA65C7CE7C2AB03D81B9A5 -5F3D65E4D462DAB189006669F7390A78A1B8908A4C913B15DB8827DFF15BB9A4 -A6037DDB643103B937257A7DAB025F09D53FBBC2BCB6B0BCD8D56B2B2784E498 -1F6CF8470DCC892AD0CFE11578718948BABF9C1427084643B66BB9181094E29D -5FBE37708E1D8A6B7518A96876844CB66954227A7A6AF28DD075A462526DD5D6 -40EECC56FA366106E55C7068997B54B7F0D03AC1AD45D28C67C7ECA99DBEDB1C -E18A79C353113E2E05B837E703278B202112B1C69E42A69D64B62F0E7D8F7E5B -C1F93F0F99EC20EF312046F4B0CD7DAB31E422070B629A7FAF3BC331F0A7186D -4053C7A7BB3253326E1E84A4EA2D9659CAA229C3AC407FB24F4ABE9482030869 -A9668917641FF296931F653967E8FC62C7675CE24653764A71143C68098DF21F -4F97F7B73E1C8F8C05AC12E7DF18BF04D28FC23DC3CDFC688B72FB22525E0561 -5CFE5C0FEEDA85907470E66AE5D1C45B919D8F2A3A7DEAD823117A2C0D52160A -FEE3E74E0A6661400AA6593C0D9F22F0EFADB0C6E647EFB59DF4937EAD06D56F -26FA7265B16AFEA5D5C98FB6BA08F7D2490D52BE820E539338787577DF79F878 -FA7861286917396817F253996B79C2E6795E23FA13FD6E2D95EBA8FAE2CD055F -594D28A7660BD0519FD4F6E351B5D23D56A5F78DF4E1EBCB9497257050F5DD29 -57475733A025264F885BBDA44AE31490924D0C98F0160D07B552051123B1B031 -87334A38C914E7B5D3C2B11B0B737A164983170C90F4D312B23458E20BC02A07 -D06E317D13514665AF0C5F221E0D271111AC1BF1C251DAE23C3E17C8B65B4151 -6E069C910AC5EB83F365C2C5BFABA806FC1CAA0A0BAA6FC9F78010F1F2441C12 -743C9B6B4F2F725692F6F3F1880ADB38130863787146AAB77E2018AD7398EB6C -51ECEEE4A6795561780DA578AB64238BAFD9AEF74A49FAB6ABFCB01B58FC5E32 -4E7862644C1CE0F8D155E08B72FB8393801A0F2185CB0852CAA0B261E07B0754 -9E64C075D2F2623E2C2AD3203CA375DEEF2450B5C4FA85F05A4B17C051FC0887 -5845CB473013E9FC80C10ADB4E47292D96C521CF8E2FEF0B627362F126FD6C7A -BE79ED7E904C47FBCBE69D4CF4911F0E492B550325562D57E7D91AA75D495B57 -330BD247125C586314ED15B89D13A5B21B625D0610C76AF0E53DCD8AEC13E9A6 -CCF377201B20945F4DA433F36401DEBF87858835719792069C93BE331F76BA30 -2BEAF96B514FAFF986D584BFE111932C8117EC8D5C43B0D3F768F09E0C49A362 -2EF372E274D12CD9308A67CAC1F3A7E7B629BF32BBA4C6C7F6F8CBD52E12FB5A - -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -TeXDict begin 40258437 52099154 1000 600 600 (dummy_fig.dvi) -@start /Fa 205[30 50[{}1 49.8132 /CMR6 rf /Fb 187[58 -68[{}1 66.4176 /CMMI8 rf /Fc 205[35 50[{}1 66.4176 /CMR8 -rf /Fd 173[74 8[43 4[81 68[{}3 99.6264 /CMMI12 rf end -%%EndProlog -%%BeginSetup -%%Feature: *Resolution 600dpi -TeXDict begin - end -%%EndSetup -TeXDict begin 1 0 bop Black Black Black Black 5417 952 -a @beginspecial 0 @llx 0 @lly 147 @urx 83 @ury 1470 @rwi -@setspecial -%%BeginDocument: diode_D2.pstex -%!PS-Adobe-2.0 EPSF-2.0 -%%Title: diode_ref.fig -%%Creator: fig2dev Version 3.2 Patchlevel 5 -%%CreationDate: Tue Aug 28 14:11:31 2012 -%%For: yogesh@iml21.ee.iitb.ac.in (yogesh Save) -%%BoundingBox: 0 0 147 83 -%Magnification: 1.0000 -%%EndComments -/$F2psDict 200 dict def -$F2psDict begin -$F2psDict /mtrx matrix put -/col-1 {0 setgray} bind def -/col0 {0.000 0.000 0.000 srgb} bind def -/col1 {0.000 0.000 1.000 srgb} bind def -/col2 {0.000 1.000 0.000 srgb} bind def -/col3 {0.000 1.000 1.000 srgb} bind def -/col4 {1.000 0.000 0.000 srgb} bind def -/col5 {1.000 0.000 1.000 srgb} bind def -/col6 {1.000 1.000 0.000 srgb} bind def -/col7 {1.000 1.000 1.000 srgb} bind def -/col8 {0.000 0.000 0.560 srgb} bind def -/col9 {0.000 0.000 0.690 srgb} bind def -/col10 {0.000 0.000 0.820 srgb} bind def -/col11 {0.530 0.810 1.000 srgb} bind def -/col12 {0.000 0.560 0.000 srgb} bind def -/col13 {0.000 0.690 0.000 srgb} bind def -/col14 {0.000 0.820 0.000 srgb} bind def -/col15 {0.000 0.560 0.560 srgb} bind def -/col16 {0.000 0.690 0.690 srgb} bind def -/col17 {0.000 0.820 0.820 srgb} bind def -/col18 {0.560 0.000 0.000 srgb} bind def -/col19 {0.690 0.000 0.000 srgb} bind def -/col20 {0.820 0.000 0.000 srgb} bind def -/col21 {0.560 0.000 0.560 srgb} bind def -/col22 {0.690 0.000 0.690 srgb} bind def -/col23 {0.820 0.000 0.820 srgb} bind def -/col24 {0.500 0.190 0.000 srgb} bind def -/col25 {0.630 0.250 0.000 srgb} bind def -/col26 {0.750 0.380 0.000 srgb} bind def -/col27 {1.000 0.500 0.500 srgb} bind def -/col28 {1.000 0.630 0.630 srgb} bind def -/col29 {1.000 0.750 0.750 srgb} bind def -/col30 {1.000 0.880 0.880 srgb} bind def -/col31 {1.000 0.840 0.000 srgb} bind def - -end -save -newpath 0 83 moveto 0 0 lineto 147 0 lineto 147 83 lineto closepath clip newpath --116.3 149.2 translate -1 -1 scale - -/cp {closepath} bind def -/ef {eofill} bind def -/gr {grestore} bind def -/gs {gsave} bind def -/sa {save} bind def -/rs {restore} bind def -/l {lineto} bind def -/m {moveto} bind def -/rm {rmoveto} bind def -/n {newpath} bind def -/s {stroke} bind def -/sh {show} bind def -/slc {setlinecap} bind def -/slj {setlinejoin} bind def -/slw {setlinewidth} bind def -/srgb {setrgbcolor} bind def -/rot {rotate} bind def -/sc {scale} bind def -/sd {setdash} bind def -/ff {findfont} bind def -/sf {setfont} bind def -/scf {scalefont} bind def -/sw {stringwidth} bind def -/tr {translate} bind def -/tnt {dup dup currentrgbcolor - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add srgb} - bind def -/shd {dup dup currentrgbcolor 4 -2 roll mul 4 -2 roll mul - 4 -2 roll mul srgb} bind def - /DrawEllipse { - /endangle exch def - /startangle exch def - /yrad exch def - /xrad exch def - /y exch def - /x exch def - /savematrix mtrx currentmatrix def - x y tr xrad yrad sc 0 0 1 startangle endangle arc - closepath - savematrix setmatrix - } def - -/$F2psBegin {$F2psDict begin /$F2psEnteredState save def} def -/$F2psEnd {$F2psEnteredState restore end} def - -$F2psBegin -10 setmiterlimit -0 slj 0 slc - 0.06000 0.06000 sc -% -% Fig objects follow -% -% -% here starts figure with depth 100 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1570 l 3375 1594 l 3525 1642 l 3375 1690 l 3525 1738 l - 3375 1786 l 3525 1834 l 3375 1882 l 3525 1930 l 3450 1954 l - - 3450 2100 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 50 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1350 l 4200 1350 l - 4200 1500 l gs col0 s gr -% Polyline -n 3450 2100 m 3450 2250 l 4200 2250 l - 4200 2025 l gs col0 s gr -% Polyline -n 3825 1350 m - 3825 1125 l gs col0 s gr -% Polyline -n 3825 2250 m - 3825 2475 l gs col0 s gr -% Polyline -n 2100 2250 m - 2100 2400 l gs col0 s gr -% Polyline -n 2100 1350 m - 2100 1200 l gs col0 s gr -% Polyline -n 2100 1200 m - 2100 1125 l gs col0 s gr -% Polyline -n 2100 2400 m - 2100 2475 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 0 -% Ellipse -7.500 slw -n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr - -% Polyline -0 slj -0 slc -n 4125 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4275 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1725 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1500 m - 4200 1650 l gs col-1 s gr -% Polyline -n 4200 1950 m - 4200 2100 l gs col-1 s gr -% Polyline -n 2101 2250 m - 2101 1950 l gs col-1 s gr -% Polyline -n 2101 1652 m - 2101 1352 l gs col-1 s gr -% Polyline -n 2250 1950 m - 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr -% Polyline -n 2101 1950 m 2250 1652 l 1950 1652 l - cp gs col7 1.00 shd ef gr gs col0 s gr -% here ends figure; -$F2psEnd -rs -showpage -%%Trailer -%EOF - -%%EndDocument - @endspecial 0 0 0 TeXcolorrgb 5573 458 a Fd(D)5654 473 -y Fc(2)p Black 0 0 0 TeXcolorrgb 5985 608 a Fd(R)6059 -623 y Fb(D)6117 632 y Fa(2)p Black 0 0 0 TeXcolorrgb -6623 571 a Fd(I)6666 586 y Fb(D)6724 595 y Fa(2)p Black -Black Black eop end -%%Trailer - -userdict /end-hook known{end-hook}if -%%EOF diff --git a/OSCAD/Examples/bridgeRectifier/diode_D2.pstex b/OSCAD/Examples/bridgeRectifier/diode_D2.pstex deleted file mode 100644 index 2a9db44..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D2.pstex +++ /dev/null @@ -1,187 +0,0 @@ -%!PS-Adobe-2.0 EPSF-2.0 -%%Title: diode_ref.fig -%%Creator: fig2dev Version 3.2 Patchlevel 5 -%%CreationDate: Tue Aug 28 14:11:31 2012 -%%For: yogesh@iml21.ee.iitb.ac.in (yogesh Save) -%%BoundingBox: 0 0 147 83 -%Magnification: 1.0000 -%%EndComments -/$F2psDict 200 dict def -$F2psDict begin -$F2psDict /mtrx matrix put -/col-1 {0 setgray} bind def -/col0 {0.000 0.000 0.000 srgb} bind def -/col1 {0.000 0.000 1.000 srgb} bind def -/col2 {0.000 1.000 0.000 srgb} bind def -/col3 {0.000 1.000 1.000 srgb} bind def -/col4 {1.000 0.000 0.000 srgb} bind def -/col5 {1.000 0.000 1.000 srgb} bind def -/col6 {1.000 1.000 0.000 srgb} bind def -/col7 {1.000 1.000 1.000 srgb} bind def -/col8 {0.000 0.000 0.560 srgb} bind def -/col9 {0.000 0.000 0.690 srgb} bind def -/col10 {0.000 0.000 0.820 srgb} bind def -/col11 {0.530 0.810 1.000 srgb} bind def -/col12 {0.000 0.560 0.000 srgb} bind def -/col13 {0.000 0.690 0.000 srgb} bind def -/col14 {0.000 0.820 0.000 srgb} bind def -/col15 {0.000 0.560 0.560 srgb} bind def -/col16 {0.000 0.690 0.690 srgb} bind def -/col17 {0.000 0.820 0.820 srgb} bind def -/col18 {0.560 0.000 0.000 srgb} bind def -/col19 {0.690 0.000 0.000 srgb} bind def -/col20 {0.820 0.000 0.000 srgb} bind def -/col21 {0.560 0.000 0.560 srgb} bind def -/col22 {0.690 0.000 0.690 srgb} bind def -/col23 {0.820 0.000 0.820 srgb} bind def -/col24 {0.500 0.190 0.000 srgb} bind def -/col25 {0.630 0.250 0.000 srgb} bind def -/col26 {0.750 0.380 0.000 srgb} bind def -/col27 {1.000 0.500 0.500 srgb} bind def -/col28 {1.000 0.630 0.630 srgb} bind def -/col29 {1.000 0.750 0.750 srgb} bind def -/col30 {1.000 0.880 0.880 srgb} bind def -/col31 {1.000 0.840 0.000 srgb} bind def - -end -save -newpath 0 83 moveto 0 0 lineto 147 0 lineto 147 83 lineto closepath clip newpath --116.3 149.2 translate -1 -1 scale - -/cp {closepath} bind def -/ef {eofill} bind def -/gr {grestore} bind def -/gs {gsave} bind def -/sa {save} bind def -/rs {restore} bind def -/l {lineto} bind def -/m {moveto} bind def -/rm {rmoveto} bind def -/n {newpath} bind def -/s {stroke} bind def -/sh {show} bind def -/slc {setlinecap} bind def -/slj {setlinejoin} bind def -/slw {setlinewidth} bind def -/srgb {setrgbcolor} bind def -/rot {rotate} bind def -/sc {scale} bind def -/sd {setdash} bind def -/ff {findfont} bind def -/sf {setfont} bind def -/scf {scalefont} bind def -/sw {stringwidth} bind def -/tr {translate} bind def -/tnt {dup dup currentrgbcolor - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add srgb} - bind def -/shd {dup dup currentrgbcolor 4 -2 roll mul 4 -2 roll mul - 4 -2 roll mul srgb} bind def - /DrawEllipse { - /endangle exch def - /startangle exch def - /yrad exch def - /xrad exch def - /y exch def - /x exch def - /savematrix mtrx currentmatrix def - x y tr xrad yrad sc 0 0 1 startangle endangle arc - closepath - savematrix setmatrix - } def - -/$F2psBegin {$F2psDict begin /$F2psEnteredState save def} def -/$F2psEnd {$F2psEnteredState restore end} def - -$F2psBegin -10 setmiterlimit -0 slj 0 slc - 0.06000 0.06000 sc -% -% Fig objects follow -% -% -% here starts figure with depth 100 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1570 l 3375 1594 l 3525 1642 l 3375 1690 l 3525 1738 l - 3375 1786 l 3525 1834 l 3375 1882 l 3525 1930 l 3450 1954 l - - 3450 2100 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 50 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1350 l 4200 1350 l - 4200 1500 l gs col0 s gr -% Polyline -n 3450 2100 m 3450 2250 l 4200 2250 l - 4200 2025 l gs col0 s gr -% Polyline -n 3825 1350 m - 3825 1125 l gs col0 s gr -% Polyline -n 3825 2250 m - 3825 2475 l gs col0 s gr -% Polyline -n 2100 2250 m - 2100 2400 l gs col0 s gr -% Polyline -n 2100 1350 m - 2100 1200 l gs col0 s gr -% Polyline -n 2100 1200 m - 2100 1125 l gs col0 s gr -% Polyline -n 2100 2400 m - 2100 2475 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 0 -% Ellipse -7.500 slw -n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr - -% Polyline -0 slj -0 slc -n 4125 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4275 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1725 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1500 m - 4200 1650 l gs col-1 s gr -% Polyline -n 4200 1950 m - 4200 2100 l gs col-1 s gr -% Polyline -n 2101 2250 m - 2101 1950 l gs col-1 s gr -% Polyline -n 2101 1652 m - 2101 1352 l gs col-1 s gr -% Polyline -n 2250 1950 m - 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr -% Polyline -n 2101 1950 m 2250 1652 l 1950 1652 l - cp gs col7 1.00 shd ef gr gs col0 s gr -% here ends figure; -$F2psEnd -rs -showpage -%%Trailer -%EOF diff --git a/OSCAD/Examples/bridgeRectifier/diode_D2.pstex_t b/OSCAD/Examples/bridgeRectifier/diode_D2.pstex_t deleted file mode 100644 index f1d528c..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D2.pstex_t +++ /dev/null @@ -1,19 +0,0 @@ -\begin{picture}(0,0)% -\includegraphics{diode_D2.pstex}% -\end{picture}% -\setlength{\unitlength}{3947sp}% -% -\begingroup\makeatletter\ifx\SetFigFont\undefined% -\gdef\SetFigFont#1#2#3#4#5{% - \reset@font\fontsize{#1}{#2pt}% - \fontfamily{#3}\fontseries{#4}\fontshape{#5}% - \selectfont}% -\fi\endgroup% -\begin{picture}(2435,1374)(1939,-1648) -\put(2251,-661){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$D_{2}$}% -}}}} -\put(3076,-961){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$R_{D_{2}}$}% -}}}} -\put(4351,-886){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$I_{D_{2}}$}% -}}}} -\end{picture}% diff --git a/OSCAD/Examples/bridgeRectifier/diode_D3.eps b/OSCAD/Examples/bridgeRectifier/diode_D3.eps deleted file mode 100644 index 16557a2..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D3.eps +++ /dev/null @@ -1,1365 +0,0 @@ -%!PS-Adobe-2.0 EPSF-2.0 -%%Creator: dvips(k) 5.98 Copyright 2009 Radical Eye Software -%%Title: dummy_fig.dvi -%%CreationDate: Wed Apr 24 17:14:02 2013 -%%BoundingBox: 721 605 883 690 -%%DocumentFonts: CMMI12 CMR8 CMMI8 CMR6 -%%EndComments -%DVIPSWebPage: (www.radicaleye.com) -%DVIPSCommandLine: dvips -E -o dummy_fig.eps dummy_fig.dvi -%DVIPSParameters: dpi=600 -%DVIPSSource: TeX output 2013.04.24:1714 -%%BeginProcSet: tex.pro 0 0 -%! -/TeXDict 300 dict def TeXDict begin/N{def}def/B{bind def}N/S{exch}N/X{S -N}B/A{dup}B/TR{translate}N/isls false N/vsize 11 72 mul N/hsize 8.5 72 -mul N/landplus90{false}def/@rigin{isls{[0 landplus90{1 -1}{-1 1}ifelse 0 -0 0]concat}if 72 Resolution div 72 VResolution div neg scale isls{ -landplus90{VResolution 72 div vsize mul 0 exch}{Resolution -72 div hsize -mul 0}ifelse TR}if Resolution VResolution vsize -72 div 1 add mul TR[ -matrix currentmatrix{A A round sub abs 0.00001 lt{round}if}forall round -exch round exch]setmatrix}N/@landscape{/isls true N}B/@manualfeed{ -statusdict/manualfeed true put}B/@copies{/#copies X}B/FMat[1 0 0 -1 0 0] -N/FBB[0 0 0 0]N/nn 0 N/IEn 0 N/ctr 0 N/df-tail{/nn 8 dict N nn begin -/FontType 3 N/FontMatrix fntrx N/FontBBox FBB N string/base X array -/BitMaps X/BuildChar{CharBuilder}N/Encoding IEn N end A{/foo setfont}2 -array copy cvx N load 0 nn put/ctr 0 N[}B/sf 0 N/df{/sf 1 N/fntrx FMat N -df-tail}B/dfs{div/sf X/fntrx[sf 0 0 sf neg 0 0]N df-tail}B/E{pop nn A -definefont setfont}B/Cw{Cd A length 5 sub get}B/Ch{Cd A length 4 sub get -}B/Cx{128 Cd A length 3 sub get sub}B/Cy{Cd A length 2 sub get 127 sub} -B/Cdx{Cd A length 1 sub get}B/Ci{Cd A type/stringtype ne{ctr get/ctr ctr -1 add N}if}B/CharBuilder{save 3 1 roll S A/base get 2 index get S -/BitMaps get S get/Cd X pop/ctr 0 N Cdx 0 Cx Cy Ch sub Cx Cw add Cy -setcachedevice Cw Ch true[1 0 0 -1 -.1 Cx sub Cy .1 sub]{Ci}imagemask -restore}B/D{/cc X A type/stringtype ne{]}if nn/base get cc ctr put nn -/BitMaps get S ctr S sf 1 ne{A A length 1 sub A 2 index S get sf div put -}if put/ctr ctr 1 add N}B/I{cc 1 add D}B/bop{userdict/bop-hook known{ -bop-hook}if/SI save N @rigin 0 0 moveto/V matrix currentmatrix A 1 get A -mul exch 0 get A mul add .99 lt{/QV}{/RV}ifelse load def pop pop}N/eop{ -SI restore userdict/eop-hook known{eop-hook}if showpage}N/@start{ -userdict/start-hook known{start-hook}if pop/VResolution X/Resolution X -1000 div/DVImag X/IEn 256 array N 2 string 0 1 255{IEn S A 360 add 36 4 -index cvrs cvn put}for pop 65781.76 div/vsize X 65781.76 div/hsize X}N -/p{show}N/RMat[1 0 0 -1 0 0]N/BDot 260 string N/Rx 0 N/Ry 0 N/V{}B/RV/v{ -/Ry X/Rx X V}B statusdict begin/product where{pop false[(Display)(NeXT) -(LaserWriter 16/600)]{A length product length le{A length product exch 0 -exch getinterval eq{pop true exit}if}{pop}ifelse}forall}{false}ifelse -end{{gsave TR -.1 .1 TR 1 1 scale Rx Ry false RMat{BDot}imagemask -grestore}}{{gsave TR -.1 .1 TR Rx Ry scale 1 1 false RMat{BDot} -imagemask grestore}}ifelse B/QV{gsave newpath transform round exch round -exch itransform moveto Rx 0 rlineto 0 Ry neg rlineto Rx neg 0 rlineto -fill grestore}B/a{moveto}B/delta 0 N/tail{A/delta X 0 rmoveto}B/M{S p -delta add tail}B/b{S p tail}B/c{-4 M}B/d{-3 M}B/e{-2 M}B/f{-1 M}B/g{0 M} -B/h{1 M}B/i{2 M}B/j{3 M}B/k{4 M}B/w{0 rmoveto}B/l{p -4 w}B/m{p -3 w}B/n{ -p -2 w}B/o{p -1 w}B/q{p 1 w}B/r{p 2 w}B/s{p 3 w}B/t{p 4 w}B/x{0 S -rmoveto}B/y{3 2 roll p a}B/bos{/SS save N}B/eos{SS restore}B end - -%%EndProcSet -%%BeginProcSet: texps.pro 0 0 -%! -TeXDict begin/rf{findfont dup length 1 add dict begin{1 index/FID ne 2 -index/UniqueID ne and{def}{pop pop}ifelse}forall[1 index 0 6 -1 roll -exec 0 exch 5 -1 roll VResolution Resolution div mul neg 0 0]FontType 0 -ne{/Metrics exch def dict begin Encoding{exch dup type/integertype ne{ -pop pop 1 sub dup 0 le{pop}{[}ifelse}{FontMatrix 0 get div Metrics 0 get -div def}ifelse}forall Metrics/Metrics currentdict end def}{{1 index type -/nametype eq{exit}if exch pop}loop}ifelse[2 index currentdict end -definefont 3 -1 roll makefont/setfont cvx]cvx def}def/ObliqueSlant{dup -sin S cos div neg}B/SlantFont{4 index mul add}def/ExtendFont{3 -1 roll -mul exch}def/ReEncodeFont{CharStrings rcheck{/Encoding false def dup[ -exch{dup CharStrings exch known not{pop/.notdef/Encoding true def}if} -forall Encoding{]exch pop}{cleartomark}ifelse}if/Encoding exch def}def -end - -%%EndProcSet -%%BeginProcSet: special.pro 0 0 -%! -TeXDict begin/SDict 200 dict N SDict begin/@SpecialDefaults{/hs 612 N -/vs 792 N/ho 0 N/vo 0 N/hsc 1 N/vsc 1 N/ang 0 N/CLIP 0 N/rwiSeen false N -/rhiSeen false N/letter{}N/note{}N/a4{}N/legal{}N}B/@scaleunit 100 N -/@hscale{@scaleunit div/hsc X}B/@vscale{@scaleunit div/vsc X}B/@hsize{ -/hs X/CLIP 1 N}B/@vsize{/vs X/CLIP 1 N}B/@clip{/CLIP 2 N}B/@hoffset{/ho -X}B/@voffset{/vo X}B/@angle{/ang X}B/@rwi{10 div/rwi X/rwiSeen true N}B -/@rhi{10 div/rhi X/rhiSeen true N}B/@llx{/llx X}B/@lly{/lly X}B/@urx{ -/urx X}B/@ury{/ury X}B/magscale true def end/@MacSetUp{userdict/md known -{userdict/md get type/dicttype eq{userdict begin md length 10 add md -maxlength ge{/md md dup length 20 add dict copy def}if end md begin -/letter{}N/note{}N/legal{}N/od{txpose 1 0 mtx defaultmatrix dtransform S -atan/pa X newpath clippath mark{transform{itransform moveto}}{transform{ -itransform lineto}}{6 -2 roll transform 6 -2 roll transform 6 -2 roll -transform{itransform 6 2 roll itransform 6 2 roll itransform 6 2 roll -curveto}}{{closepath}}pathforall newpath counttomark array astore/gc xdf -pop ct 39 0 put 10 fz 0 fs 2 F/|______Courier fnt invertflag{PaintBlack} -if}N/txpose{pxs pys scale ppr aload pop por{noflips{pop S neg S TR pop 1 --1 scale}if xflip yflip and{pop S neg S TR 180 rotate 1 -1 scale ppr 3 -get ppr 1 get neg sub neg ppr 2 get ppr 0 get neg sub neg TR}if xflip -yflip not and{pop S neg S TR pop 180 rotate ppr 3 get ppr 1 get neg sub -neg 0 TR}if yflip xflip not and{ppr 1 get neg ppr 0 get neg TR}if}{ -noflips{TR pop pop 270 rotate 1 -1 scale}if xflip yflip and{TR pop pop -90 rotate 1 -1 scale ppr 3 get ppr 1 get neg sub neg ppr 2 get ppr 0 get -neg sub neg TR}if xflip yflip not and{TR pop pop 90 rotate ppr 3 get ppr -1 get neg sub neg 0 TR}if yflip xflip not and{TR pop pop 270 rotate ppr -2 get ppr 0 get neg sub neg 0 S TR}if}ifelse scaleby96{ppr aload pop 4 --1 roll add 2 div 3 1 roll add 2 div 2 copy TR .96 dup scale neg S neg S -TR}if}N/cp{pop pop showpage pm restore}N end}if}if}N/normalscale{ -Resolution 72 div VResolution 72 div neg scale magscale{DVImag dup scale -}if 0 setgray}N/psfts{S 65781.76 div N}N/startTexFig{/psf$SavedState -save N userdict maxlength dict begin/magscale true def normalscale -currentpoint TR/psf$ury psfts/psf$urx psfts/psf$lly psfts/psf$llx psfts -/psf$y psfts/psf$x psfts currentpoint/psf$cy X/psf$cx X/psf$sx psf$x -psf$urx psf$llx sub div N/psf$sy psf$y psf$ury psf$lly sub div N psf$sx -psf$sy scale psf$cx psf$sx div psf$llx sub psf$cy psf$sy div psf$ury sub -TR/showpage{}N/erasepage{}N/setpagedevice{pop}N/copypage{}N/p 3 def -@MacSetUp}N/doclip{psf$llx psf$lly psf$urx psf$ury currentpoint 6 2 roll -newpath 4 copy 4 2 roll moveto 6 -1 roll S lineto S lineto S lineto -closepath clip newpath moveto}N/endTexFig{end psf$SavedState restore}N -/@beginspecial{SDict begin/SpecialSave save N gsave normalscale -currentpoint TR @SpecialDefaults count/ocount X/dcount countdictstack N} -N/@setspecial{CLIP 1 eq{newpath 0 0 moveto hs 0 rlineto 0 vs rlineto hs -neg 0 rlineto closepath clip}if ho vo TR hsc vsc scale ang rotate -rwiSeen{rwi urx llx sub div rhiSeen{rhi ury lly sub div}{dup}ifelse -scale llx neg lly neg TR}{rhiSeen{rhi ury lly sub div dup scale llx neg -lly neg TR}if}ifelse CLIP 2 eq{newpath llx lly moveto urx lly lineto urx -ury lineto llx ury lineto closepath clip}if/showpage{}N/erasepage{}N -/setpagedevice{pop}N/copypage{}N newpath}N/@endspecial{count ocount sub{ -pop}repeat countdictstack dcount sub{end}repeat grestore SpecialSave -restore end}N/@defspecial{SDict begin}N/@fedspecial{end}B/li{lineto}B -/rl{rlineto}B/rc{rcurveto}B/np{/SaveX currentpoint/SaveY X N 1 -setlinecap newpath}N/st{stroke SaveX SaveY moveto}N/fil{fill SaveX SaveY -moveto}N/ellipse{/endangle X/startangle X/yrad X/xrad X/savematrix -matrix currentmatrix N TR xrad yrad scale 0 0 1 startangle endangle arc -savematrix setmatrix}N end - -%%EndProcSet -%%BeginProcSet: color.pro 0 0 -%! -TeXDict begin/setcmykcolor where{pop}{/setcmykcolor{dup 10 eq{pop -setrgbcolor}{1 sub 4 1 roll 3{3 index add neg dup 0 lt{pop 0}if 3 1 roll -}repeat setrgbcolor pop}ifelse}B}ifelse/TeXcolorcmyk{setcmykcolor}def -/TeXcolorrgb{setrgbcolor}def/TeXcolorgrey{setgray}def/TeXcolorgray{ -setgray}def/TeXcolorhsb{sethsbcolor}def/currentcmykcolor where{pop}{ -/currentcmykcolor{currentrgbcolor 10}B}ifelse/DC{exch dup userdict exch -known{pop pop}{X}ifelse}B/GreenYellow{0.15 0 0.69 0 setcmykcolor}DC -/Yellow{0 0 1 0 setcmykcolor}DC/Goldenrod{0 0.10 0.84 0 setcmykcolor}DC -/Dandelion{0 0.29 0.84 0 setcmykcolor}DC/Apricot{0 0.32 0.52 0 -setcmykcolor}DC/Peach{0 0.50 0.70 0 setcmykcolor}DC/Melon{0 0.46 0.50 0 -setcmykcolor}DC/YellowOrange{0 0.42 1 0 setcmykcolor}DC/Orange{0 0.61 -0.87 0 setcmykcolor}DC/BurntOrange{0 0.51 1 0 setcmykcolor}DC -/Bittersweet{0 0.75 1 0.24 setcmykcolor}DC/RedOrange{0 0.77 0.87 0 -setcmykcolor}DC/Mahogany{0 0.85 0.87 0.35 setcmykcolor}DC/Maroon{0 0.87 -0.68 0.32 setcmykcolor}DC/BrickRed{0 0.89 0.94 0.28 setcmykcolor}DC/Red{ -0 1 1 0 setcmykcolor}DC/OrangeRed{0 1 0.50 0 setcmykcolor}DC/RubineRed{ -0 1 0.13 0 setcmykcolor}DC/WildStrawberry{0 0.96 0.39 0 setcmykcolor}DC -/Salmon{0 0.53 0.38 0 setcmykcolor}DC/CarnationPink{0 0.63 0 0 -setcmykcolor}DC/Magenta{0 1 0 0 setcmykcolor}DC/VioletRed{0 0.81 0 0 -setcmykcolor}DC/Rhodamine{0 0.82 0 0 setcmykcolor}DC/Mulberry{0.34 0.90 -0 0.02 setcmykcolor}DC/RedViolet{0.07 0.90 0 0.34 setcmykcolor}DC -/Fuchsia{0.47 0.91 0 0.08 setcmykcolor}DC/Lavender{0 0.48 0 0 -setcmykcolor}DC/Thistle{0.12 0.59 0 0 setcmykcolor}DC/Orchid{0.32 0.64 0 -0 setcmykcolor}DC/DarkOrchid{0.40 0.80 0.20 0 setcmykcolor}DC/Purple{ -0.45 0.86 0 0 setcmykcolor}DC/Plum{0.50 1 0 0 setcmykcolor}DC/Violet{ -0.79 0.88 0 0 setcmykcolor}DC/RoyalPurple{0.75 0.90 0 0 setcmykcolor}DC -/BlueViolet{0.86 0.91 0 0.04 setcmykcolor}DC/Periwinkle{0.57 0.55 0 0 -setcmykcolor}DC/CadetBlue{0.62 0.57 0.23 0 setcmykcolor}DC -/CornflowerBlue{0.65 0.13 0 0 setcmykcolor}DC/MidnightBlue{0.98 0.13 0 -0.43 setcmykcolor}DC/NavyBlue{0.94 0.54 0 0 setcmykcolor}DC/RoyalBlue{1 -0.50 0 0 setcmykcolor}DC/Blue{1 1 0 0 setcmykcolor}DC/Cerulean{0.94 0.11 -0 0 setcmykcolor}DC/Cyan{1 0 0 0 setcmykcolor}DC/ProcessBlue{0.96 0 0 0 -setcmykcolor}DC/SkyBlue{0.62 0 0.12 0 setcmykcolor}DC/Turquoise{0.85 0 -0.20 0 setcmykcolor}DC/TealBlue{0.86 0 0.34 0.02 setcmykcolor}DC -/Aquamarine{0.82 0 0.30 0 setcmykcolor}DC/BlueGreen{0.85 0 0.33 0 -setcmykcolor}DC/Emerald{1 0 0.50 0 setcmykcolor}DC/JungleGreen{0.99 0 -0.52 0 setcmykcolor}DC/SeaGreen{0.69 0 0.50 0 setcmykcolor}DC/Green{1 0 -1 0 setcmykcolor}DC/ForestGreen{0.91 0 0.88 0.12 setcmykcolor}DC -/PineGreen{0.92 0 0.59 0.25 setcmykcolor}DC/LimeGreen{0.50 0 1 0 -setcmykcolor}DC/YellowGreen{0.44 0 0.74 0 setcmykcolor}DC/SpringGreen{ -0.26 0 0.76 0 setcmykcolor}DC/OliveGreen{0.64 0 0.95 0.40 setcmykcolor} -DC/RawSienna{0 0.72 1 0.45 setcmykcolor}DC/Sepia{0 0.83 1 0.70 -setcmykcolor}DC/Brown{0 0.81 1 0.60 setcmykcolor}DC/Tan{0.14 0.42 0.56 0 -setcmykcolor}DC/Gray{0 0 0 0.50 setcmykcolor}DC/Black{0 0 0 1 -setcmykcolor}DC/White{0 0 0 0 setcmykcolor}DC end - -%%EndProcSet -%%BeginFont: CMR6 -%!PS-AdobeFont-1.0: CMR6 003.002 -%%Title: CMR6 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR6. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMR6 known{/CMR6 findfont dup/UniqueID known{dup -/UniqueID get 5000789 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMR6 def -/FontBBox {-20 -250 1193 750 }readonly def -/UniqueID 5000789 def -/PaintType 0 def -/FontInfo 9 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR6.) readonly def -/FullName (CMR6) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle 0 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 51 /three put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3DD325E55798292D7BD972BD75FA -0E079529AF9C82DF72F64195C9C210DCE34528F540DA1FFD7BEBB9B40787BA93 -51BBFB7CFC5F9152D1E5BB0AD8D016C6CFA4EB41B3C51D091C2D5440E67CFD71 -7C56816B03B901BF4A25A07175380E50A213F877C44778B3C5AADBCC86D6E551 -E6AF364B0BFCAAD22D8D558C5C81A7D425A1629DD5182206742D1D082A12F078 -0FD4F5F6D3129FCFFF1F4A912B0A7DEC8D33A57B5AE0328EF9D57ADDAC543273 -C01924195A181D03F5054A93B71E5065F8D92FE23794D2DAE339BA29C1C6F656 -1DEF13780383DAE38A868377CC7D396B2A05F341AEE0F8BD0A0191F51AD11A4D -2E927B848A1EF2BA15CFBE57A51E3AF07598275195C9613041F71C1AF39E61F9 -EFD5F6512FBDA76E29DE6B508F62F5CF9F73F5288DF1C7B0B82C92D3B6358BAD -EC3CA20BDE55DAA7CC58004AA86B6CBF8C410D8287E88BF20588A39309C2B703 -CED322F030AA6069869064486CA651DA054FF3F5E56534CA358B0829A6B954D8 -9103436E6B06DAD1658BD4A95AB41343B01F5866FC87C4EDFC71F1477C98F8E1 -1DCF27EF743FF90BF918AB8C4E5AC35841E2F745480E5EDE1C1DEAFAD8D0018D -2C1F1CFCAD9F6609859DEDFD1648A6CD23D8ABB80747F94899F17C8F3E6CA55A -E176F19CDFDAA0D7C920B3A72051A4745560AC81978C92459EEE5AFE85AB247A -32981139CBE352B248F4BE5F73503A084A3E91F05328EE521D9669E44E202584 -5407E7846F9FEE3D54EA18FFB144BF2D6803BF65AE402034B3CDBB40DD24217A -3CE0E95E2717CACD603A958187C42B3558AA38D6B6390EEEDD396F96E6041FCF -6F8888221AFA87EAD79F46E0E32CAED91E6C8500879AB6E580C581E8C8CE9B68 -2BB5EFE2604E8DCB2432D39D75EE556969F1B2FBDF6A4BC72D106AA7CF22C268 -464027898B311613E06E1584707F262F71D9F49D2149306A88E02BC60BBD6BDB -EF41D90F19197BA9AEF32B5E63D5B9FF41B5602F9F786E76621DA54D574981AB -87A72081EA05D6C6BA940EFEBD0904EA4E77BBCE17E20B42E1722617E0F6EF32 -F1ACDE9D758594E9C81049CCC10605A27C2A06872FBA9F159CB155609B496ADA -4886F478E44029B5E620DE8319E257697E93E1CDFD27D560E2E4D34507020E2C -D9FF06BFA14E056D81DF701FAC3ACE4BE6C098AE116E079F0044391EC1661F6E -7A93B9320BD7F91E8FD2E8EB3F5CAE997D5CDD35107A1D35302260D1499B8B65 -39625B7925F97D917B66BAFEEA992873F07220714F192839948CEA080BDB9A03 -77B9DD032273DDB5629CB28B5D8797EDEFDBC601823E038384C90C79012A7D96 -8F27784DA15BACE21501C26E3AFA5DCCE81B52B0ABAF71A35D33103EA86F2415 -A39A830D559C5C6CA7423945BD3DFA942B20A06D7A8D8671F9831DBB52907AB4 -4E54776D29C6085CD9970B6DD21DD3EA8EB09C49CBEC6CDCEEB0BBB1B8827109 -3BDE64DDA024D67F098D6C1998506DDFF7907ABAADA1C39C759C850E0C6F8E89 -A392D1C9329ACFFA92D361218D75E115F70A47C53B73B356D703E9C499AAD098 -AA9C8119EE9E9708A9EA3049E976FA19AD04210D5F6092C7903FD155113F3A3F -269B746560F70970AC9F8D09956E0E84DACE4112C4E7C7F6B3F0B63D26EFF95E -2B2E9699D16BC8AFC4AD9113AA3A974C9E82E877288CF71E9169D2DCC61AAAA6 -C536E5604EF0716F6487292BBB677518504B52C63822BED3BD5FD14EB41EE6A8 -AD4B6CF90D39F98E12A765B645CBA3E8552FB9A986390212CE119E7C3DD675AC -17BD006144BEC534DA2A860188619F17589008409C5A309CB83FBA70F6446B6E -2B56991B6A03B1DE10C621591CEE45BECA27C54BC8B4F1754A9E8F660812710E -117850E1BB6FD89BB13F8CE391C43DA89EA67E9C3E7A4697790EA26B0E4E2E80 -DCA508873A7AFFC11B8C02EF86C2316E8D8B6BCEA37F81A3A87546705F070C3B -9D4D28C366CEBC1EE485B8E2357DBE46E86C87B9939DADA60888AA9F1B92FECC -CC1C198DDB594BB70A8FE690ECAC21A414BAC89BF019F34D2A130F485EAE35B7 -2A10C67EA3A48A4D9734759CC93AD85C6A570500AE5AC9973FC76EFA06BF5DDC -26E20E28D16B50957EE01AF2653F8D860817967AA5A9BF9BF7ABCDA710E9F34F -4F0EBCC32B3C9C2971F6225D2DAA6A451366B83F32B2ACB83E746D365B2DE38D -C1AB7447FE7B37F9630E410E5D8F0ECE74DF46C538947B3A167AD9F3E4A7EB3D -60F5425AE75AC3A27D39311DA35696C3DC7282AF1532E7AECE63D13DDA0296A2 -01487185FDF1875AEF55A36C17D6A8DD329279D229259463A2F05CB7A874374B -E2320E1F6CFECB9C1CE62FF468C29751ACD9754AF1EABE8E7696C2888914416E -235B6766F20FFBEFF285277B639A51EA2F2E30D207BC891B00F0436008F980E0 -9EEE7FB375BB069B9E0BA11DA951A99D8E60B4F920A0495C247FA7DE904765AB -DB5C3B2D634757E43EDD6FAA4DB3C67F82D6853E1170F0B2D8CE496DD4E72B0D -28277BEF172F1402959F64527F9B640619F04416DDB9D05FB2ACD019CB9C119E -E544D24EA6DAC5C69785394EA50E6EC9AAA9E14B904EAF29A733C6D7942B63F4 -85729686742F26DEF78DF0DA1CA7CEFBB684F4CAD99021A3B3D1FE03B9C5A4B1 -BD04CAC89BB91B11952A2B17A61789BEE0C54B46C03FE9A1AE73D17CF94BA30A -237C29D414C3BCE8E3E2DDF83C0BD59DCB66C4D2C3DE73DA8378F3C6C8035D28 -7464399857E57651A53E9C4AA68DFCA91B2376CF98AC5290FDB9BDAD9EF1604E -9B0A70EDDA1E564B6D2456E7BC722454ACA8C4950FDD44B6EB9AD01169A9F845 -B06A0DDB7897C847A5B1F42258AECF3807AE936C8F52C3A7A0A85D68160AE442 -FE81543DA6702D76AB6E8701F80DFC1D87C961E350D0E52AB2A298B9E5908600 -7E14D2A87309043CBF13F69AEAAB1BC239DEA88EB5176624F6046664B1D2691F -FBB2071D3706F97DCCA355A6DCC4D09FD35DC078FBAAF672FFDECEC61050A120 -10B5A96629041303FD01ACCC7686165DED6AA712FF8E5E85DE33C4E7D877C49C -6C469A90410BAF60BE65ECD91CDC2EE7AC0CA8BA7B53865F26092BFCAA0BCA77 -B80DC51DAD09C93C8DD8E43502B4B68F3D5918C3492196292447732BA90F5AB4 -9F5E1D634ADE1CCAAD028DE5EBA9535F6FC5908DBD2D643E0A7E059C8C386FDC -E72659C0033F535C0D7F6B98D0335552D0BF3C6E302B672A5EAADFCEF81912E3 -8F54E6FB7EC2B325125159713D0AC50DEE3673B9B148643727E94C80971A2E73 -5E1E13237BE69C84FC039DCE02ECE2668AFD047F21A61BB94A9F498C9FE5CDEA -B274B40728B6F6CA9B6C15BAAF92F465B0D7311B46545CBA90D874839443CCB9 -3110F052EB247B24B45A3D2FA6FBC7EB2A4BEC2A5892914B3C5EA3F4F9B9DCBF -6F932D95700E045B49E4B1F2C9D2A42CF39CA2F5A2654E6E8E6E92473D28AACD -5E35C6705EA728F704F5996D286BED433F976AB7E018621A577AED7C0AC0A84E -A032FE1869F603E6F20386E3A190A30A21EA886249ECF8CDDE2C33D73BA8647A -3DCA7A8DD9E8EC8D9A415D126BA38B6771C489DFC419303EE9C1B83FBFB3A0B8 -97D64F30E4BCBEC24DF603FF3BF541E00D5804B6B6543D3D2B661CC551D497A9 -9DFFF535AF424B2F3150BB39AAE8CDB306AAD37767BA10BADB031DC2FAB16955 -EE78342CCC0E8B5976BF98F215461A8C6F63EBE6E2F1A1104662DDE53388CB51 -8B44F3534853B8095F3B746A2459C2EF800FB1EF7F235EBAA9731E3AB3BE4369 -1D3636E3ADD5BDF0C34FA80E90D8A1DDE770943FD196E0A7C5F1FAF6970B34C6 -4673AACA6B2B5C12B9608521AE736C1F4B97209B063D991300ED5AF3D7F27E76 -68E0B858FD8BFF86581E2B9548C691E3E5D9EC4D39C9715CDE86C7D22223CCEB -8A38C776A30AF14912390A7546DBECECD7A687D4F08646E57A12C80DCA022B7A -33399761A50B8E0ABEFA1163EDEC3DFB5DA3248792EEEDD894872D4E6814B4C3 -548BAFCDE0CABBCDB97EC6D1BA47F2E77CC1389BF19D73661749AC33F46A618E -A665A85776545BF9662F2179D7BFD604FA8EF4700591AF3AEC647E27B24B76F3 -133F9198DC15C1AED830E737909E43EB91C334C44BA35810007A3888E33F5DA5 -B3B2C35481C648AFE630CC3E08F77744E401B2934E407D1EC17ECE737606B076 -F8DE8EF3344F57495EF49D11580D6FB28AE0B1422521B320843B13467501CAE2 -3DB93D7BB779F73B6AA30050DA74BDBC3F8DBB30F32EAFD07734A151BB2BAED5 -C9B1F790059339B64BB4146470F30928C9A49AE88906BD6FDB7431A4B50809CE -0F67ABA01CDCC2320B0B097187B9299E3D80CDD7BB5DD5BFA7B28D924C5633C5 -45A23CCEE097C41C3759C1FA8DBA0DD95034BCA89BD23FAC18C70093F40FF2F8 -0FAC5DD4835F2DFD40540E9A9E9FD951A8AF2CB766597DE00147B163BACFB7E6 -EFDA4DED594F1C746D8B46A1145E0E4058F5917B3F21E9BEBDE745EE72CDCA64 -FB31EF7A2E55265F32559480E2B6726D3DE26FFC97EB4E3160F117E890C4B2E5 -8DF310E6A728ABA85540F571C024F8DD58E1D7827FE97CED5EB31547EBC36415 -02B8C0E10B7E37D816F01D56A364B8552CBFAAA95BC4BDDCFDE91CE0EF005B4B -7AB56FFB47A093AEDF0DE1EA48FC8103CA3CA1470864D2693E360006D05668A8 -AA422CCCED20DCEEBEA5CE0DA1EFB00FB93E922B18124FA11A88D0F6E0F719DA -57603DD5DA42E1C56C2FD9E5415AA199D4F334C151C1157E75C107FBBFCEB706 -5F4EA47A29B54ED8CAEB8DDA2F53D2A703B95487619780A52DA1270011648A28 -AA64338E04AA5B92C1EDF3D8DA34FA6D227A0325EA6F22E9B38B6338C657BB21 -CD4C582DC04010330F62923F817E4EDC6E5C0E6500F2A975A8A95BAA30C4A134 -BB31B5AC45A2E7F6E9CDFC810D41344C4F606049445F8E93D74271C1E29DF7CB -5459593BA28AECF64D903D3E4D77CF5C04B06DE44A41EE4D9FC769854503AC85 -69E4A5106E84016DE3D59865D4AB30BD6C9E45C45DCB5408421CC50CD6179C85 -34E55CC70FBD8FEFE9F1D5160664981716E3BC7F24B6F54E0323D9BC4B692971 -24419EE62D8B0BA726E2B4294A9A76F328B8101DA29E78BD5C4AC383350FE196 -4D42DB1653637D19530124858950C22F1E9CF5BC07D46B7A58CDE19CC88DCD2E -7FE4EEFD8AA6047E919823C8CAB2EF5274F45E861E6508CC11A8AA90AED2403A -B2BF1315C2157B3B50A3685205D93E40906EEE9DE5985405974BCE0B84BB37DB -080A45C5237B269B93C0A7CF294A18B45464A41F604C494CBEF829A381155CFD -71CEEA54CC39EEDB6DF58A9896246B09F95DC6BC40BA6916AAB5ED3D24F66154 -3662F8978FC63DA9280FF7ADB09EA5BA79D3B66E0C88BEC1EDD78DA93839073A -A4D7B0E627000C4ABA76C47CCFEE92E319315333A5584A951E34C55412049C4A -A5569FE65A006F77B416E0530AB6A8E7AD6C72340AD4CE25937158FABB2153EA -281E1D840206F5DA38E00815E9081F81DAB9FAA8F4DAB305867AC84735DB4F52 -A36129929BD2084A8EA37BB6889695204BF7290B68D5E722540BF8A276F8BB6D -451D582EE59D2FF03F6B97DDE05FA00C3D375D2D0AAC8FE298F85CC067B15481 -48D70B6A0354C705715B891915FE8EA45244677B9FCE81E72D66177E309F3F83 -F744B9EA9E55C3B30DEC6E5E03B3988FD526A82A5E8E1DC79127FC62B2FA7949 -B3AD3148868DE22BD4B5708E32CEAAE6ADEED1F463EAB9692411E18F8D6BF391 -126B2700B4CF3B59D02E3F8795130C96285A63FCD1E0F647ACB1D35E9C58BD01 -1DD06BABA00CA4343BEBEDBE677E053E9732B33A7495DF51782A07DA07F5646C -770C957AD915CC70BA8E08BE7A1F4E6BA5BB9C603E38F6FB0A2578471C4D02F4 -283069856D926B9076EC73AA39CEB0A061AFF1575C7093FDAC9F89C3DC06EA45 -06F3C2A3BC9FF21128B10CB758DF0F099B459A5264A8C24C098110D2BA1A8532 -8FAE146A91BA7D033F591AB1A94B8A6FE0FFB610F698D216D58B4EF6C87B1524 -8037CBB7E23D8550A620341C6625A1A2ECE7CEE2598D66277F857231A36155E3 -984F147783E9B93975AC38A29F2FBCF704C8A04AD84C3E04A12D2321FA56811A -5B6744813CCC187968C5C26BB8D3E6615A912FA5369C01CCF8C0DB790593B190 -1A90CFB5339B8771F325C5FC448D36C7312B11A15A8635BAB59CF3CAD176131E -026F6E141B2619EF7F3048750CC9291397F141591EEC8B612D6656DD34DB54D6 -DBDD303CED74BE76664E7DC86FCFEEF2001C9DBA56418FB61F589566A47AF36E -C94671C5E8939AF9F4D53C0DE7142B7B63C86AAFA65877EBBB48C64589AFB2CB -1280AC099FC48058855CBDEB6C2D2A0D092267996591DC3B5EC8252984E9B27D -2E9EDE8CD8303F0905DBFCAE497DE1B755B924452CDE11CF4F20893DD6FF7251 -427F520FE00580DAF1703FD968E0F8ECCDE618E1EA5820EE6CFED97C78864EF6 -26FAFEEE194A268F24249D44829AA360D731C34DC285501E966A959180718F72 -6330E4CC060588A2F65AE64A720DCAA818D49D4440F5D0B6C1F6C3A107E12445 -F1BED2D3FCBB87A9597F01C7332AA79143564056219BF87D4B907A04F77621AD -054935E883B2B137D3D1C4BC792E8335CA08B6D83227F35736C41312A0BB077A -60FC6488C5E02FD51A10AC113D4EF70038C649C1677B2204A77F2ECBE9B3C341 -F4126BECBCA61E3F3801F9188A3775924A62D30FB096B440286FA655EBA00A74 -9A4162904BEA07CE68EE76018346DEEE20839C9A2FF71179B58E1D4AB30856B5 -F5D97295A097174467010B15D733AAC5813CAA633746B430B1AAF9F997FDAAFD -436844D1A56B8E25A89D2CC4BA6EE7ABD167818FD4F6C747E07B262C99EE2C35 -323F0B471586CA50F54C6381B052B15B0C58C19DEA82C0CA29F00400B727419B -2379979CDCBFA966AD513FA903160C571C3BF1BA239540B11EF2371A3880837C -6D6CA2F374280CFA1586427AE975A2AEC34244874E4D441DBAC6CD1828841C91 -069AA87FAE849C5DC7C9EC1B9876E59F3CCDF8BB23D939F5348D7486934BFB02 -CC5A22541ED352616830A510DE7732E5D8F7E785BBD31C2BC9D348CE5632654D -2C1740F89D57FB2AA1FD8FA3304EA03F757BB8F498ED98E48485722E78D97B12 -A05F3A28438084D1CF90AC4C3FFCD7B3365941C45E1E02CB13CA1E99F7FA1D00 -1C9D489D5C95F019AB4CE89FA3B6604473DBD2CE8E278969E0A0FCBCE68C23F6 -9381882443D3FC16966555FC222F3FC4B1207522201AB7A15A7A6F22CDC9D392 -360BF4C95DAD35770E0AC7E5EFF015F2C74ED7391F40EC94B8D1C163B5DEE5B3 -911A20C2625AD3B24BD94D2A42405E655DA47D3F94F882CA2F479437B4E0BE71 -8AFA4482C6FB270F8D05B4599A01403DAAA90C01DF3AA7C2BC7E66AB6AA833AD -FB6E5EE13E45CC7CE7E200FBFE639F9CFFF5D08512C02764997FD28368969BFB -0876F236EF6189BE73AD827332DF1B2EADEAC0ED3B939CE5BC3CEC78975FC636 -44FCBC2CCF4396AC7343EC62E0E4F3DFFA2B880BF31D93ADFE201BE9CCEC8BA5 -0B9B919E05B851E0909968DA259EECC6AA0743F25247978CC09C28C4F878E29A -5070E4023BCE95FE0ACCCC01D0EE219FA8344E8F6D7D4347563BF8AC030B9097 -41F24D4BC9494915A82EE9FD37FBB6A46BF077B728FB569B1258CEA5F51F36BE -4F4D0F890D782E44748CA3FE8C8A515998371D9C7D2311F192B4B7E7C68FC6EE -3F7136714C282A2570FE591F247A08319CE9EF1E43274E4E57166E31A2ECA506 -85350DA31AA4C33C9687F5210BA225EA1007C444FBFA2126769767E47A967884 -9F68589E4BAA9ED32A7A466DE35554C132810C68ABDAE536D9D884352F28EA02 -8A555D2CE11F30598F44A65E2D86B43ECCBDEED9E4E5B5B7DCDA20EAA09D9FF7 -422FC91F2201431A9E8FC624FF44D26C0100183D77BC7E6B1A6CFBD3FA8BABC1 -AE4CB0FD382E26BE0A83169B46D91429DCB746A0326243E212F802AF6A56C709 -6E70C6C7CA3775C382F911F6DF3D26A9F9F39C6A49A61FB0FDFD443ADEB01F74 -1254040BC520FE9C85FDDA97E17CACFC50567685832441CB9DD7C669DE20FF82 -3A1025F65C68315B52216E025ECB8F7A8E1F5D12B5513728F631CBB92CC62FB8 -27946E02B0BD78E564F8460E98E22DBCB974C17BFA05A5AD372EA02DC1FE9DFC -CDFCFF96016D10D4435DC64C9A852EEAE74CBC957262D3CBD3C2C1870C0C2592 -4F81B30CF2B650B8A54A6E333B1E18AC40775788297DA5C34870EB552386C6B7 -FED8A88A70B37F7B2C6D2A80A13B11E2F3CC01FC32398E5D4201AF79110AB589 -6808F4560389C87B11772C98C555FA76D2C08CC1056F38C8EE4F4A8E08B05DD3 -AB729E4AFD6478FC7C0175D6CAFEC54087BF69E44029B5E620DE857F333DCC89 -C978DDC1F562D9F6AB8EE8BF7716B355DCF06756994A7C865C592D0AE1962C8C -C641B1965BB22D -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMMI8 -%!PS-AdobeFont-1.0: CMMI8 003.002 -%%Title: CMMI8 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI8. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMMI8 known{/CMMI8 findfont dup/UniqueID known{dup -/UniqueID get 5087383 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMMI8 def -/FontBBox {-24 -250 1110 750 }readonly def -/UniqueID 5087383 def -/PaintType 0 def -/FontInfo 10 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMMI8.) readonly def -/FullName (CMMI8) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle -14.04 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -/ascent 750 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 68 /D put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3C05EF98F858322DCEA45E0874C5 -45D25FE192539D9CDA4BAA46D9C431465E6ABF4E4271F89EDED7F37BE4B31FB4 -7934F62D1F46E8671F6290D6FFF601D4937BF71C22D60FB800A15796421E3AA7 -72C500501D8B10C0093F6467C553250F7C27B2C3D893772614A846374A85BC4E -BEC0B0A89C4C161C3956ECE25274B962C854E535F418279FE26D8F83E38C5C89 -974E9A224B3CBEF90A9277AF10E0C7CAC8DC11C41DC18B814A7682E5F0248674 -11453BC81C443407AF41AF8A831A85A700CFC65E2181BCBFBA9B440A6DD72BF8 -97084C906B05FAD969086ED21AF0AA1471613182B26117D7494DD9F9270EF3ED -8DA4D957225F75D060237B6DAAD5A0AE3E702B3D1C437835B93B8AF1F9E7D966 -E739CF3AD5E256F90286A34069E5BB4122F94F18F3485658D0D25B938522A879 -8215A417CA2CBD20F71C5C5FCDE21EEA7BB27876D93BA667868A419287FE59BC -F538980597DBBA743DBBDBEBC61E3286DA7977833DC8BFC5E52FF5DF5EFD9A92 -D070EB769E31E760A50FDE012DC0057835E8B9B046FCC83F1A0C40326AFB4E3A -0CC3BFA35FCC64E32854F32EB7DF10A19F95830136BBB8139DE1663B7FD790CE -464EA431AC109FCA0E03F3E0D355FAE20AC8774D6B1CE233C27680C77DDA7356 -560A27C75993E8C980CD1E3B0683F7E8A05119B3AD567DAB4851B66E418687B7 -F9B21B3BEF607918D5973421B68E65DFD8B6C8DFDCF1CAFE2637D365148EBCE3 -FA4CC00052A2A522205EA3AE3461CEE02042E1A3F11467CB6C8C849B200CCE3D -0BC188EC7B934CBBC0AE2BF5DEA228181DBF0F774119F313516E7D97FF532621 -9278F856C166CA6547504F34991D588A0631A5CD06363F3FEE9FA0772C783447 -ECD0A200929CB58EBFB6B72008E4082B5D14AA560C24915B9463A92F38237886 -C35CBB2D4DD6D0CA8C1D4EC46093041C6181C2F6586EE3E7D4E647A107B6DB23 -DAD9AB5A0C2905455FE58075EFF6B48597078BFCCDD84812B98986F34987CE49 -7EFB19814F2A58B0233A59331F6F8EB66401F04EE7B1ECAD9BC90A2BCEBE213D -DDDB1F75C83609ED6A669A0CED58B2E269E76ECF73616D94F13CF827C9BF354A -E82202988DCFE856786B8AE569AFF3105B55C72C58D310FFC0E10B2ABAC8DB06 -40D5F72E54770E9DED1AF4616008595B8481E3D9AF4191CC9A5BFD9DDD01C9F1 -FE7165D21E488DB40879E863D470CB31CA06E5B5F1F8C3CCE04B697CEB0F3557 -ECAA358D2EC2B370519CE06138FA702314BA01F1F33881825EAE1230098BB3C9 -59666983275CA4E8D9DB34979F86535577E79393A72F84B0F768FE8C92692907 -15E9FE9894E98A0EBEA490CBC8C7E5A9F3E43B24C2C5A4BCD71DAAD3CC0B8B82 -AC13933543E295C163F61C9FD18371CB514493F90BF7FB460C029B8DD2E2BF05 -FD66B451DF277864DE1EE42100BF29E01A50258C2758F3EDE211BB3457B8243C -20BE72983FD6FA2581C5A953D94381E32E80D6D6095F2E93A5455C101BA71E8C -E560D4694E4C167EFA25FB1E9D214AEA745CE34CAA5468FAEF8F6BDB6C6BE8F4 -3D58836C26A2392E4C4DECE284A90DDB3858A16D6135FED655A600929DE71605 -6CA32F6851A2A6F71A9DF3D5D657593BB729CBCA2F4B059365B7263DC08AB211 -9C547096E6427F6AA53CB2EB87DF0AFE2ABCDBD15D7EF228D3396413B83C6B4A -79E41F9BA55A2688F62A10472675E5658F151F9FD6634EC94EC0682C17448024 -CC1633077C07A93E4DA8749D974FB8F4332B5DECF97D749C10DB60D4C90ACBFA -E65AE928C88BAE19234690EEABDB30BEDCEF2660D7464D5071058C30C572A2BC -7DEE5384BD7614A4BEC4C84E18CF7EC81C810256E8CE6520466C033E2A36D3D3 -5D6074B3857415011D8D9D49A474D994571CDBB89AF92BEA879BEBAF67663F5C -17ACAE809C2231EDD0A76641BA52FA7B19A2798D54A4A9B62C42F9905851229F -2CEE0191C8AA5AC12BB0CE9E5E3E862683AB57DBB4AAD6AC0FA8BA4F408D41E0 -755F72B82B7C18EC6B13995BF7AFD66AF4BA0EA7523DA8B75EE751744EBA9CA4 -4E8BC1FB37734503A5B24FB9F2C2D07A47CFC477F02413D55BD7DC180B0344E8 -50248801FA6BE26C97F397797F5F9DF762967E7CD92CCB8B2E587C92177619A4 -BF8046CBC72C6E69DC78B8CB6B7381A290080EF59F5B9F29C1167B261C932E9D -010D2D14BB425D157F22BC0305770AECC5BC80000F8CCFB9930255A68F299ED9 -D3B5B83A2CC00E3305EB281E1A7054734661B175C6CA0AF168790985F173DF03 -A8693B677BAFE23C3CF833FF6463B136FC370E4F0C29E322DBEF637F62C33CD9 -B0A8338FD67EC628E3BF2FCBF7CF0347D5CBA1DBE6DE878DD670176B85F69EF2 -3C5CCA1BD2B8A385F113EF1CE522F5A6AE053B9C1E39408C9459DE3E7FE2C4ED -77F026B0081BB80D40185458139C16333EA27F43EF1204BFBF80BC5301B2A3AD -B10F7EFBB4F5B7E04DA1167F68BB6D4049440B0F57385FF0A95E72760C6A12F8 -1335BB31CB74081FBAA319180DC00113CF50CC5A41D2E751E055DA1429CD75BB -0060C21CED634FDA106C49A12B356129D010E29F2919301AA7F80222AF3905ED -672FF85C9897A70241E8DDB9A53034B6BB44E140D9E739848E7A782F24B98AC8 -00DA09EBE4532787E5CF3ED815705F659D8E52DC2C2D4949374A3BF192BEEB99 -1D9A90A4F3250BF8A1FD40D91F5B34AF2CC561FD02FED712500B24330D87DA9E -4AA46B6E34BCB40B1F73A1DDE07E002B9478E9651D2BF85E67585B6ED812BE03 -A594874A235B1C1840C4BF4BA6D863583D8C12DB49EF7F8CC24DCBB6B21FBCA9 -378F3E2DC406291AB324571F76E0805DF8826090F0E8B50599CA58D124653D16 -16C782B01C91A6F3DA6346482E3163D28D95EA49866360147296838A3FD0CC53 -920F91D895F839CB61FFD2FBA296CA4C6304EEE579782AE5FD33D0FA652BA7E2 -CEC7C01DD0D3E0D56E6177EE5F609A396F7FC8EADABB465DBA7F384E215C4DCB -E64F807A50A461545107F9C3F7D7CC7D33E6EBD6D9228B1DCBFEF160703E6129 -0DCED8D45DD54E2A36E698A616E7906A50901E453BDB2A363EB77144E9EA6F2B -6BD927495EB0EBA5755165707CCFBF8759CE5856881117C7F3EF6D494EDDA7EF -E499BCA56C86467AC573DA9C2724FCC74BEB331E736FB093DCB67DAD42296655 -415D110F2729BD1D55E5C9CCE2E724116F45FB2E66AE0F790258851A5C808762 -68B8A110BD326F8D3EC45004E7CC08DA42F6CB80A6B6E7C286F139534A275BCD -2F812993DD9C9A1AEB5E7E4BDB4805DFF3A7030263AB060C9B74F0C25C5B9005 -965284884450CC2815DF28D5F9B0496DC7A3AA85E1E42741E1538797175C28D9 -FD904699C771FB066397FFDEE8E8DD1ABBDF67E6BFEF95BB700A7C1BA91354C5 -42EC3864F6E19B379E79A1CC3C786C0DA146C6B0B8E507ED58DBB1F12F613A98 -0E1F8967991427A22ED323901C4B83336CD343212131E8B59C2F5D232702ACC5 -7891BFD4EBA5D0FA35AEF9F3520CA82D121BF6885BBDAF15248A9E4649ADB94D -0735CC4D14E1D7275427D00C8E709579612F7F74DB6FC218C10C278CC63E2AE2 -37EC996B10C0229D687F0DB5E38A8C4DAFB3DD8A9E7ED37186FEFC97790A1EA6 -636A88FA9FB4D282234BAAD301A1F3AD33F252C5EEC49410562FC52809CEC466 -A0F6D148E9AF19D6DA2337C8283FBFF6005C37AAEB0B7F7217A8DC6F949B9984 -72DEF163E4D5ECE4288404448C96A7FF0AC76F732D50AD63A1D286C9180E80E7 -C218B1F48E3034FCABA6BF262CEECC284AC29E9F3CA1CFC1639A681ED66C1FBA -666F073D45C84A286E05FF809D4764FE819B6A330E73695CCF2F448B4D4EB4B3 -F63E94EC289807A2F9A1159CF328C002B467B19D6E9454CCE36FC19E0A214190 -B251818DD456EF658B0398E275514B72D9C1DA5F806EABCF1DD56BC025D69FC8 -A0C2FAAC1892B64D2AF79EA2F57F103CA623E440307600D50E783FAA998EBD40 -51D23A0CEFF8D8649B48B982DC38D613F882DCCAE5F51233A641B3CFD783F830 -D984F116DEA3ED8F0D3369AE629A006BAD4523F8E3C7C6B39A6C972508B67AE9 -32613F28CCFFC4BBC86CF31A0C25C786554F7A1F3DE97F5CFD1A941F775067A4 -784385E2D02EE1FF886701B1E87D966D3F500E15591A5012E645837FE2DBE3E6 -A3D375C6CA0ADBF96B33EC3FCFFFD888D7344B31D40427B8A8BED0FEC6FBE038 -1FB5F0714C4B5A0E607E215B5B7F76ACF0FEAA4C9790EB7E13C0E3933B7C63FE -5B934EA34F4B741C3667BF1735C685CECA63507E6FB9EB06AA010311F12AC1AB -4CE3FE8D1EA1EDB3C700BEBA516FC71D740B1CA1A60D4578003973CC3EE21DB1 -58FB1CF7E2EAEB2A4A6C742EBC3575EE6378531C6EFA6E6986E68B8E25CEEA67 -A59623FC1ED2ADDA9D72DBA627D179E47DC7F5551E07EA4D54ADB6CC8109D340 -7279F288E552EFD79C17DA3431E53EED66D16F24BF86468C2FE7EFF421560500 -12FB048D6CE2F370BE4E560F8B4AA12362ACFEBC839351C1D5100C625B14CFDC -747B66082D4AD5474A63EA0054E9C3E6295AF6B133348487B0471395857F4B73 -4BF8337DCE2FE2E1A4EAD7E7BEDC822BDDCE42B79B308C11897C98E3ADE253CD -09CEEEC0CB1DB66AB072E36E1E04911F40B535B0FD85982C21B8A587D65C38D2 -DBC5A07A0A26DFFF7460F10781069490AC1B611CF7312A14B4AA6005A4582C5D -336BCC30EB47749193BE8D457A43F54204B070DF5AC2057B6437E23705C7FE8F -7BB150560F7044BE3E48EFDDA539FEEFB0D2A7856CD4E405FCE0F5EB190D91AE -578E2EDEB9ECA218573BB1A8EF116043A27DD17A4047BCCC7C5F3C563A910778 -45ABCA32C7347E6180ACC86F9D665FF025DD8AF514FC3724B5C3510F3C37E0AC -5101D1667C6ED4E8F37F06CC2BDF66CB5A9FB7C52CAD26344FD1557571336A1E -1E340EBA149B4EB99016D1A411FB874914AAB2A415CE3F5FDFBBF5AFD7959B9F -CB127BDC68D2A2F3F07FF3D4FF32046C0371CD2E68A6471E46B08413FC3C7A80 -A107EEE57979DB387B2206D2810DB310B7232B2DAA385256C8A58964B512003F -A0C24ED21809E2576229627278118107B9C32345C1EE8C0CFB452CA362379369 -31320DEB5371037AFAD093B61E8AC7A6DCF7D49C7F8EC32DC0ECEAFD7E892810 -039570D2956289B15E078C2545911BF535F72F7DAC619BBDEEFA855BBAA81704 -18F7D351B0936357085A32157AD8E27438A58B2397D69264E748B0B8D01B33F4 -D04DC59326A7DED39E247A1C1A1AE49382BDBDE9478A1CB48F88BDF14A268B40 -A40B9FBFC4C87FD3DF1EB2464C3C14E36CA41E09EE0A9B75FEB0769F9ECEB1BA -EBF73B818427FACDBC33BB95B9654F31C59A766E931C698A8608F15290FCDBD3 -5C535D9036A19CB7B55BF54E96F9B2206DC71624E2E55FE632FDFDEC8757AEA3 -1D83D190ABED5E7A7AAE2F41FCEBC7C18626BF58F9E9F02FBAE0C8AA85E9DB21 -A3D8907522DCBAE4923C6A2A09FD2F08FE32215C544AB577B337D929E625E704 -E041C2381AFCFEA37F3133B6CA20093EFD457C772E428325E56C9CBCC447EF9A -05A8C3F28017DD4FFACC51B38E4896C5044266EAB4EB7C13FE855E790DCF8A17 -B61B1D30DD866BC57397EF6297C4891451FD6A5C6AD6D7446F58F56A68650908 -224D9F4C31C6906FD29BB51DC947465B808438E6260325752808963C808A4AAD -60422ADD62CAF315F6AE92FACEC55D5B682089AC0BC051CE1E2C06A3874736CF -0DB5F7C8F178479E4F11665402781D80397C75456F5CDF0A4F382A19EC6AD64F -71A9275264800E178F212269154DD8352167C57EBC0A38BE794AAD1601C8E541 -7E1AB8E969A76E1EB4092644958FEA2AD29635E70C4DFE2EB0D9B3E1644FAAD9 -B27AD5466EFAC724718962B62E7B8C32F412B69DFFEB792587D571FB5C591D95 -4CD441662CD1B07595E245FA537FA9EB5A20A97E5C9251EED22C9961B48B25ED -85BB7524F635F9CBA3714C6D60A6BF920C45A64F4C366C1F9D22F53084997C9A -EFE2D79FBE3347111F5093E271DB7E3770B35D253DAF93653F6A23FA145AD775 -AF11E188EA0428137D9A14542E3EDA6F7B2E5AA86C9F3D3649A85ED2F020C696 -01A339FE6D7E42BC548C8F92A4E3809C67A986C99418772403D16D0E8662595A -1F37563671D6DA0F36CAC99DAA8FEA215DF7D45E61314915A30A22FCA86A50D5 -2FF2EF08E240F9FAC030D92BDFBE40F1972DF413E6B452024CD11792BFDAA2D7 -C82716528AD4B3D637BB43E748336DCC86A952BE96F1EA423E31340FCACDC1EB -02EE932F58734AF3A5B2279361B63F1D824EE3BA9F4D2EC7B33A300A1CE8CA43 -24616444176DB8099D85AC68329B1F85E4B5B16F3B396FE2AE7774F3065D0203 -AA140DC128D6F935C44733EF585F89E8639A2096A225A2E5E49D447D8AF9FD44 -CF6C1BAD5C5E5262AECC5543EC8199B00B72BE32A0F110F64A1D0D5CCEF38FD1 -155D6198E9A343702F8ECF5052333272CAC2FE016681E12745CBE14E1065EFD5 -407DA3686080989F6F6D650A9F1EB3A813B070C30C0D3B4A1E9C206E2E4DFD51 -D8DCBE9AECF956640A2E79F1B4FD0EB8E0449AE1B8FFEBC43275743B4D7F6605 -0673B61EB3189E74F51F3780A91E6A5C6464C8CF7D563D9958D46F39B1A12087 -6BBD4898BA9ABA468AE1F24115891FD3CBC2195F75958E26DF8BF1B93F7B521A -C12112237AB23A8E5A7B7D0DC4C53692B35F3CD813EB463C0BD3A6486B0476C6 -3B36DA71FE512E5745D097FD4AF5D056E434DEE2AF926B2EE79F7FC4FEFD4130 -BB4B4BE01E5C720325A4884507CB51CBA4FFB615B78A4182444F0ECBE4161A58 -E86FE1DA2E39C2BECBCF1F1D7B9B776A26078FC252128FA8108CB83F673CFD37 -CCDA493234FB93E1550EF8D2DC049ED95B00A8A57834B024B277D3DF062E748C -B61F183F2D72AD075474F8165528CE75E4F40B38B0FAAE45751C1907F8D31619 -E88EAB02EEED415F3EE3BC5BECC6AF565D34E0BA2958FF337A2B06012DD1858E -C53DE52C108BD5AAB76C882198C72CDCC958D68EA8FD26F76F04EC1A08B2AC3F -A6D0E8724D2656555DBC0C8C42A3E22ACA7E1BC8E9F897D9AB692E0FB9EC32EC -59E31CCA4516A3C3BFD5411BAC3DEDCE374D48681CE7D67DEAB93F5B5C5290AC -FEB29C5EA2C98095692873D36C7DA24847B66F31E4CA4C7AE5C79D7CE4F0532B -78620582E3731A2A6533A03E7155B33E7CD142FE79F72721862EDB24959B9783 -F834CB616FFCB2A23497BA6D99AE34DC459A2F7B3E4DA2B54BED118ADCD92178 -66C40F4E60F6E1327D5DBCA645A2A7C770807E6D7E47E1265C753F8793BD2D1E -BDCD749CC24D4AF9315A93F01180A0F9A7F420DA1B87664DA5FD967131273271 -9DCC45C3D57EB9B8AF14771E8E751D88B98D2FFDC72F5011D402EC34FD010ACF -D3B0660304725191D64FEE106253FCB3470F1A16EB7B45C1489D3534BF94F740 -C2781DAFA5E8A9E7B25A85BD7935DF3ADDE08C960E283D8FC3976FDB4085DBB4 -B6B35FB239C28C785B18BE4FC98F3A5F410F562DB5FCA04E8074E4E790F4265E -F88117B3D0833AFAE6E8B8A71D7731BA6F14FD6F217EDA3F8CC687A494FC3914 -B84FDC37C8C335AB1E7E0BEC7FB6B7A595C50CF8F0080C8D461BCB8B579A5155 -F963B6587873FA31C3A6572740C63EFBE58A2EBB723B7517D2A243F6CB08A038 -54F4DF0F6692022B2EE8C6F6B73735ED3166BAC58D9216A06EA6FC7B63B20031 -D0F0F99D83D9030B413C2360DD2C553E34BD67851B743C3FDA676AD63C5BD759 -9131358C6BCDF05FCC048F4EBB9005899ACDD8E9EC9BB8C5A08E83485047D263 -0ED69B4D1869A38068FDA03524022A1D32FA2AE0BF728D2A654E52B6A6C90A3A -725F86627D7C3EC5AF5AC512976D35FE42AACA3FECB401788D0BFFD9F4743BB2 -EC5B4E7891F216DCA5A69E917A171E0069A03FB214ED307DE947225049D46E0C -4707503F09811A597A9113921AAC23AB1CAA9866F81A02BDF349FAB129F23E86 -E384C043053055938D42ACBF9F0EE86CEBEB011BD5BB7D593104140E6AA9CFB0 -4E0B47C91E504BB6A95B2CBC36EC03BE01897C3D498EB30FBE4BD9584B9D766F -CB3CC7C96FC8F286FD681D3B6F61BEA096CF04865BC90012554DD15DD81BDC99 -5CDAF88A278A7CA272AA93BF309FC2485B022795BA88EB5266F5C03078CBC109 -4CDEAD6500AC236E3B93A1EE0B562FA71B0B4D594E26799E73C28D23AF4CA53D -7EF51C2D2ED1F89DA3EBCF481A9CA944488F03FBC457E29B493BF35A0F75928A -3E11C87E17007E60EC992B63ACCFC6FF2217A30350F4B02E41B31E63B3C4A2BE -4F35AF890A75CBB491FAA34951434A91DECDD7828FBC23BB24CD54F54FFC0496 -C0B4F2B457397789B1CE9E8CA0EE0FAE10BDE57CA86155AB164007345FCE4444 -086032AF8AA352ECFA4F57DB442CC9D673A002ACE753F954 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMR8 -%!PS-AdobeFont-1.0: CMR8 003.002 -%%Title: CMR8 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR8. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMR8 known{/CMR8 findfont dup/UniqueID known{dup -/UniqueID get 5000791 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMR8 def -/FontBBox {-36 -250 1070 750 }readonly def -/UniqueID 5000791 def -/PaintType 0 def -/FontInfo 9 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR8.) readonly def -/FullName (CMR8) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle 0 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 51 /three put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3DD325E55798292D7BD972BD75FA -0E079529AF9C82DF72F64195C9C210DCE34528F540DA1FFD7BEBB9B40787BA93 -51BBFB7CFC5F9152D1E5BB0AD8D016C6CFA4EB41B3C51D091C2D5440E67CFD71 -7C56816B03B901BF4A25A07175380E50A213F877C44778B3C5AADBCC86D6E551 -E6AF364B0BFCAAD22D8D558C5C81A7D425A1629DD5182206742D1D082A12F078 -0FD4F5F6D3129FCFFF1F4A912B0A7DEC8D33A57B5AE0328EF9D57ADDAC543273 -C01924195A181D03F5054A93B71E5065F8D92FE23794D2DB9928A7C95D3A6E9B -8E92F84CA0AA44461D2F4FA0F8B81C6F5B7BE98C9712BE166610465CF689DFAF -27C875C029C0116DE61C21DA0092D029E7DBEDFDDEE3D67E6936623AB53FA2AF -18BEDDD7AC19A19CADB6ED6CA7A26E6044BE414FFF59C0B98D5819A6B881F9AB -7AD0D03BDD5CD309C67811D5CF0B93F6FDC9AE64F74ED4E81F2E18D880BD842A -DAFD0BDF06300201C6946087FC0B999447BC370200BFB8CA420B668B32EBC242 -6DB1546A7164CF55B332FE9D239B65F532B69EF9F4F93828A44C8F5C526126F8 -B7A369114CA68D4F98638121F4E17F351723D9F1A902FCF087F94AFD23876517 -2D15B482AF2D68C3F31FFA864E031596E597882578AC7FB0DAE2A713B065B374 -3E2E72519ED6D50CBCA40A7275A7109A4F3ED8A4566AD8832890D3D1F4899850 -9B757442B7EA355175CD5D6D8B4152ED2D7EEB4CE30F174FF672140354046A45 -7098EC45B9DF3DF5CF7B417E201DA88308CEF4CED8E8903AF24FB8DD0187352D -25738519ECBC70304F8F620CC45D2586619205DA3955696FAFFE2082402B3502 -CB682F410DE5FFE80A4DA3D3BCF02E35BD577D0DE55E7B8A33B7A2FD5136B5DD -A0BCB61F8E7F4363C21F890CF287304DDB8FCE7FE207C0D160B81E7EA662BED2 -DFF8C444E19C91E72254257CD87240A70F1A964FA54ED9ECF27E27A57DACC3DE -EABB92C085030870C6CF5C40B6E47F5C0AEB30E84A73ECDABB2D754EF6EA28BB -16EBD6636BC288E62F4A38BFB55F5F4DD20FDD77D767F6CB52F9513E8EB75413 -07F1877B2C01278675177499E4E8EB09F2657821613F5C7643FC064293EC6E9E -B519FFAEEA36B19C9D1302CF91FCBF87FCB57C5F995CB6712BB3D8681EB6F05B -B2A4195A3C73CB4ABCCFB958EAC533BD89560D2790CDE1444C0F2E4EF27A529C -F01052964E56F6D76A190E5FF45934BB711A3406284AF130D4DC0D8112BB3752 -762CA0200CA262359D4F54C0CCFA9A50DE18C7DB14419E2990ADDC4A54B94978 -D9174CA39434022FA77FB30179EF805E2189C35919F5EBE215EE2A00B4407826 -CE56329C5586D8B414770BA5D45513C3AF1931D632FCE69B4CA504944E03362C -74A1177C6398A61A12DAA0F156543E2A8E9969C4308B7ACC21A5ECAC8F172541 -1B1316A88C0C163E574FFD3CD22FF08488662FCF2F9344BC25D02146F36CA6F9 -E2D0130C654B7485EEA9A110A33AA0C769121F81821E9A2BD062FAC158359D44 -3F9D9947200EF1EDDD5860F10438B162A69683957300C75AF7546C70C97AB2EE -37EAAF0089E2623F787F252569B06C665FDB45EC9681C0774ACFBA76B98C4E89 -7EB12AA5F8798FFC110B49C25E3A483ABE83B0BCC6DF0578403ADC369E013762 -C9D08FC94D949BAE636ACA9F36F4E3F02296775A062077B011A705B6F1784D36 -A926622CB3847533D7ACB24A4EBABB14593B5D8E1DAE2BFEF8A51835C8D4E76D -7543C126A4271C59A5881A5AF89331694F84489CA66725995DC3070F306EA447 -CF30F63CD476A46D528EC1FFBFB8EACFA2BEEDCF54C92CE2BD26DEA5827186BD -3A4D1709415CEE7D51D671357B4A5D11E835F63521B9824EE5282E58F05A8ACC -FD249461181A38C2F47BAC4E79BE368D64F886AA493C61CBCB2ED401C8AFBA61 -59CA6F6216D941A92AC52ACB3D7ECC28D6A58EF4CC70BA6DE23E80937AB38E89 -6F05FDD15B954C0826636267EDAF9F2BB466BF79D2E10EED9B04297E6BC93069 -79581ADD1A9D9FAE9306F46AC95B98C60A2E53D60CF1AA4069BE301E17E25070 -F98DD67BD8642B1D07571A32766072E48BF27E1576FFEED300D7313A358A823B -49C8F135961B7E259095C9BB67F996CE0B90E95344F203922F47E11753F70D38 -2ECB615403490310CEE6C03AFA97DA2F47ED47125D110FA69725BA0018F6A40B -29A307FDB3E52322A77A0102E6F57654CF1E96A134D13860D83AFA0A41112D3F -2247A09ACF7D06713BE443FA27C7E7220E875965D53030FE7D2D62EFD2F1DB87 -5FB091FEAF599BA8C5167525899E578AB341BFE2BC4E53A047093168AE189237 -EA55F055514EFA939DAE9E859CB5FBCF37D99484F44FE5AA5FA386B28BB642F5 -5DBAF059A50FE96C7C6D834531D64F1F2E99AB2E96EE74D149178B1C0618495E -293973D9A03E1790654B67C0882376ABEC17D74785B3737D81644F28B3BC6FFF -F92FE29126995A07E0BC5EF3A4B93789A103C428943E045B8D1A5063AE71E806 -568D48072E53DEA85253B01DF0BB7367A6BE4DD7BE514AD74E3F77C825ABA405 -64DAFA25EAFF8F63344B5F6B523629776CEB090B546469F6A6008DE43072DD3C -DEF51F62731037D1FBD0C038A1E9B669849EB3BEBA281624F13D20B61917A109 -A0A7871A73F7BAA18077360B38A4625C5DB9AB9E43BDEEB856FD0E2D3AA2E075 -267B978B9EB47F2369302E87DBD5D5B422830BEC32411FE75D584C58650EFB1D -136FEB92B94BF8939FD63AFB7349C7511E5E46AA7324F8B1FFCA9C2A9E9720C0 -A720918E8E860F137567D386AC29870FD990BD69465B3A3D2A0ECF2753578AD7 -80DC87EBB319EB5AFE0B6F6FF8616EA30C51425FE3ECBC5F8D0B0BEFDEF32FA7 -D168B4E85C804B7326A0942CFDE732B1171C643452B7099B31649CA2C38B62FB -46EBDF7180004C549B53F88021D029452C2B37D8C565BCDB0B11541039A13C0A -E45D4B68C7907B8BF08C6F41F564B62BB554235D50330E78DD02795516D969C9 -66119D718798120442CB7EB9877FF84EC69DAE25F8559DCE3BD8042959F695F8 -2F99845B1B5680DDCF181D806CC4903E077D1FF5E60918EB34C0B1E028422B71 -CA63EFBF3F4F3CD813CE831EB54265A555BDD35AD7D723F9CFBDAB29C54F8AFF -2D35C6A3299E0A2DB470C7B141B1E3E10DABB7873AE302926BA8743278FAA8C0 -DC6174501D6A289CF980A3F55F2DD5C3A514E7E7F13133C35D2697D64C25130C -DB78FC997968D6B3BC929E8A31B6D212C5128E4412632BC52B3A1049F7F2F61B -C74AE9A6AD19B9E2E240617E2882F7D29ED3A4279439107AF9AEBEE47CE85DE5 -CE9595A96A118ACF1EB1F5929930321AF7732E351E18C6AD378508E37B4C327B -0E06AAE21278AFA9255AFE5C022034DA2968D260879B4B38E7EE2E11A593DC3F -CE71ABA050C004473324CAB6F3C50E85DEDA3E9A27388D8FD3A8F6E42A79670E -F7549CFAD4CCB337A6E0BAA4846ABCA059F1E1933CF11DC0FFBFF550CC4A1B47 -CF7BCE0875FA747AA854534960F757884505A5AEE0330179A9547A4AE3E68479 -7A457DE83326DC30B67F27CFD4AB697601CEE352F72F0966B3CEE3EA24683BEF -6D23AD51B8432C3F0DD0D0F80791E1091F38988B7A54E466A9AC7810DE8B7893 -6B0AA6356597891D56190A7660BC7F657BC559E0525D41EC228078F2FBF89C6C -72D666DAD838CBF0861FBF0A1D4ECC069AA49DFBAE5C56B781A1D5D79DAAC256 -13E3F9B928A2394FC71691E4355642764459714412D6F8EF803FC5F7353822DE -6CCBB8FBE5AA1F2C7F4D384039D85E7728527DF9FE0239E2CF8BCB7411C000B7 -1FE660AE6A2A19229E5E8776CC83EFF3C27403935756463EB4721C51FE0B1197 -86C2F17842A0FB639F28083DFD4F1E86D7D3BEFA922514ABF489C5CCE93D6F72 -D2EAAE14F6CBA2BE4BBE7D7EA8EA19DB3A87350D4A52064137C3D15A5B05B03B -70B1DA7328D10713B83974C390C3270AF5A9A47C0BFBFABB9F31063B0CCFBB10 -0F236C74446688198EFF039110F6FF42FA9F82D463AD3958B5FD205BDF85DE20 -FE3F0C7AEEF350AEE6DBC1DE2E2DA4F4599956F59D6F121F7086DC120416E180 -52DBBC4E56C09746938698860F30007091E1CC0351B43990E47208ED495310F5 -7BA9C6AB3CA10A3F1B318FD47C1CE3B9FF1304321F9623E32D315AA9CE64B35B -F841E6C62B5B2488A311C94937879E5E0E170FA77AF0AC75C5E6E9F3E8F825AA -09C1702682E14FDFA72D27901C5BDE009B1E52E8C4511C6F6336251BD45261F7 -401CA3DAE7C4B0CAEB91B9954BF4A97C48ECE7FAD401351D59DDAE9DA94E2335 -74A2B880E4749D3D7026CB5299F16C204B6E00A20A6619C34922C7D3FB50F127 -3157CFC08DCC5164C8023CD1B6C3556C73CB8E4ADA845339CA9BABA1457ECEE6 -ECB9849DF1F0FEBC89E5F97C92978A500196520839CEBA6C0FD2E3D27BB4B4F0 -93CB2BB565F4627C6DB62DD0E084E627D69B5DEF42EF094381B62C0D67EFD197 -301B132420F51A41561E6106870147E0D597078435BE3819ACF0DE28AD779847 -F3D2CF667DA06955D53E0204CEA2935E9E984E76963D3079EC092031E2A10E61 -1227E5EE6770DD4D745A52655369EBA06A19BD7D95BBA271E488241199D1008E -36EA99F8DFD2A9F87B06B070158B466AA4C6EA3BA77DB0F853F0BF9A304EA291 -34069714368E0B94DFCBA3BE5EDB6C8204DFA7EAF5C3406F60A7056407D1BF6C -CB85C1F432F97D821F5518BBA79AF8453A568FB2C2D025A70CEC75F46C545011 -ACE3A99B2582793BA1DC655230AE2EFD24DE20A01D4A441AFFAB7771F223FA6B -9169849E727E494247F67D6E1EA9DCA06A082FE2094BD548AD7F08B565145634 -E7ED832FEC1378306DDC796303392ADB0CBA130B63B38ED57B7828B47732853A -893E8836FE19CCF27002AE92C2B2CACFDF8A42F1B8066E033B965D2E9157FDF8 -E1264B40813C1A4CE424274AA3528A4F09B3B53DD4D23789A68B3D17BC1398AE -0ADA2C2168427A49846DE0216908C2FFFEF4F13C1ECA12AD341E238EE46E6DC2 -B71B54C52659632911F901660261E493AE2483D64E119D9924489779B62BC9FB -A052E822FD8D83178E09ADC825DF0DA07FCE7AD68EEB29FAA275A13691B4A5A5 -B0BC0499CD6307610CD6209583C1152C559A2760823F8DC0B9B990BFFE7B7E9F -3969B968AFEAADB9FC0F1410EBBAA0DB979CF153F0B8C978405F8E6F2B6406D7 -AAFBF4A655A15DD6D1E9A7EAE10EF89264659B09283F50B734236885FC09FBE5 -98D780012FA77FCB19F15BDC522CC7312546C0730EF5225DEA8C22A3BC6554EF -4FE73B9AEB5C2F7DBD474221760E5F539A064AC450591BCF3499E3968F2CBD6B -F15BA2B37080A4129B66D4C2188524F025414F14DB3F96049A8B0E5EB2BBE7A1 -AD64A988FE875FE4FE5186BB4F5DDA16983CB052D474B7D72F3E8965663EB50E -015C72407C3437142D3D7DBC055FA627139488DBC5A0F98D805C2143D99F491A -167E07AF60EC9F17C36289368D740B632CB919A0E74C412B76CE7A5906D5200F -9E79CEB9C65ADA3A0F23E8947E834AE7A329A9F0AA7A6BF545B1D7B4666C6522 -CFF268634EA06DB3A82D91A4C0A9B227E79961212881A54A6762C335DE7E0831 -130C45D94394D21C049B9D189ED955438C2151514F17BFC67E431DD9A8349202 -2F616AEC1C7B19F63D5000EB4771370924BD4B9053FE78B5E4A244B9A149D66D -A8BF3B398396D2233E92E4A5FDC70FAADEADAFD255193D688842DBA865CF6154 -C9348D590F3FEB135D4B7BD4D76A52CB140888247CAFAB25ED51F4D187041CA0 -ABD956F83A5661CEC171B52AF92F9ADE27973B560C802E1E0FF51C4003D1289A -CDD09F8EDA8AFDFF666D35418CEADF3B0BE298F0D1E5C8E024D6A2017A7E71F3 -3A9FEC9930F1118101E040339F9D41379170928DDF5B5875212B271DC843F612 -E0C21C67263186E3D6929160464D4D5C8928E14D0845762C36FFBDE548188E20 -3B6BAFE5EECA0385142F01216FB8A90C43A472C1D4447FE5C7C78CC088FC72E7 -3FAFA062C338BDE8A430FDF1951B107D8D73FF9376FACDE5900BA362C66F8C1D -947F9545C5C13A53E4479B1C1A50472C05E8F8C266C6D4F4EB08E97B3B1BA972 -26973B844545089C5732322BCC9A5A8FC972FA0D7DB8BD85D2F515ADE65DA479 -0224F7EA2276CFED0B75B2C23AE7377F86F1F6F205D6FE19377D87E782143697 -984E731F83CA888199CEB425643C259D4FB8B58DD69A96085198306494BB497E -FE7C9954EF35B679BBE3847A9C73507874F71FC97665E2A58BA41407A1745247 -44A79B588D969D11CE4B863CDA655DAA53CEA5C3C263B345E782006CE9831D49 -603D2D95DE9E370D617F5928BA416C362BB2B4DEF16A5D44BD24B34257765F3B -6223B3F9B54DAED69A90C7050AB97B06693D253C6894CBD7B497DA449F1D9B7C -D91B421891EC0724F59C82B9CB288DC42F2D2D7A7F22EE3D910E15953D7766AE -276DABED3820390BAF2700C4653E1C77FE63DB71A66D93ED293E25B8412A1EFF -809554BF04ED0DE83F7F190883ED793803CAD2C34A66524D3A580ACDF3C13B22 -08F18905E7A4A16DA9ED2A112462FB9FFE481EC2069E484E8BBFC19D594153B7 -3DED4C11762223B7586483B06BC164D824D1A6FCAE80A35DE0DB8B33396771DF -76DC5C05578EF1BE00A70BAF3D951A01C87328DB2B0DAD6E1B4C21F37D1BC0C5 -A929BDE5EADF20DA60C4DE2E3C151005814F24824D33B95F700E09A0207EB602 -3EF60DEB1622B91DB99A855A8F1DA96358F05CFCEDBDDDFC8446AE3391BEEC41 -966E594E28D052DD5ADA49DFF65E79540EBE5329DFD86C23CC800F95221B9C18 -CBBF941D2FA47EF1EF59A89DB5DD188E75EE94AD2A79E2221107E5992C00D531 -2E00B544895A9204656867E3DE9D4CDB64B920B5CCA9A73E6514B36CABAE01BF -94C15603B86780190595560F792E5EF01650074EA4A9BBC6ED284B9AC2020641 -DCBCEE0ED27FE58171DFE104EEE4202759E594159DF45113C00236127A46FB35 -9EC705F21C0E456C1F0F924594C09AC64D4377C5FEEF764BA4A09ABA8D09DEB1 -FC13B0CD202B2F04CF5D73DEAB65C36C2FA7C0DC236BEEF6D23BFFC9C493DC8E -1831F19EEF81EEDD976E43BAC6B5CED13F901DE59835FC75490EA528A72CEB77 -24C38B258EC38B9E6B97F85CA8C10D8809BBE55A6FAA12456FCAC786942E123C -06D1E55F7ED04400088BEC968BC5081DC7A1B1B65166E7821679F76694F235FC -6854C8776AF855B83445D9FF919B1D80E98DE0741D06D6C5EEDB3E3EA6392530 -F1BA817737D8162F7B3A36AC2A03190CDEC654383E31934C3E0A012B639532C6 -26FEBE9B412F1C92D1943B7C18CEF510729D501349644C97F087F2F840074AE6 -D8CD0FB2E620FFC908BFCD938B675A0A4A687F7FBE8F3DD06A62D7B6DE7DF3E2 -49D367D60B10061EA86CD512F5A1BE8950D83C62695E130128E0037B62552D17 -064319BBB9B1FAB9D79705E5D68AAE9B36EA14BF1A59A863BDB8DAD9AB5D7B8A -E30E2B499F952D65877C8E38EDD7DB29F9579D09E629AC188DB6A6403AB4BA3A -D358B3770D727A2B77D84B6C9EC17E29D88E3421F9B7D2D822EB78BB8BB50692 -8C46DD6F9BBEF2E848A2B5669B200019802AD19661537A84D3514AEC5AA47445 -2C791E01DCEDF18D9506367241255FFADEEA6183F51A9F42448A7DE413C08359 -52DAD2A60FD606AFE14702BD3B0EC448720FE63438D020DEDFCDE3582FC31DF1 -17B25FC152789D2F17FD60B8209D292D2152DCF8D28B5ADC04F6659BBB746CDF -145163361823CA343763AA951C640B5D4A99B7787105A1609EDD6A596EFC3F6F -2FC33D0D499DBE56C6668E137715D435D6B683E0113647B2765AB0F3D98AC717 -5B33C3EDDE18506E73B4E392B022F30480BD30F59B2E3A59D93017296C3156B4 -B5722E1955777716388AA987B2665669716F866FE6BDAD5E74A523CC03915F26 -9B7B231F5D9B1F61DF7CB01ED3F27070E36547B263855DF5B2E3ABD2ACC440B9 -0826E1DF4743FAE6668B61F72C8700992755522AB11C765981A9BEE0D040039D -6C2D64ABED527082C97CA606127AF5C0C999082D5A0680AD74DFB390317A8F1B -09CDAD1EF4A805F1C25A9E61A32C099E4B10F12ACF4B248457121276AF3666F2 -1D26E65CCA09BC188F90610739FB3761F2DC29F075BE27D691844A638F7214DC -C073EBBD9A313FC27DD51B2F86561261F34680D52CBDF83501D14055EC2B659C -531081700E1CACE2A61ED63F94B44D2E6425AEBA2FB8B73775B14609CEB5B007 -B1C4ADCBCB2E58240D0DA36ECAB3A4DC2F9FF2E440050A1CE41E6B326A0BE85B -28A38905A40DFC55072B6D610576B2B3873A495383DFB007F0683E21341C3FD1 -81E81BAE9C4D79EA13C3468405678B69C33179EDCEDA5ECDCE6FEA5259F99A27 -9F0BD82EC99C12B7EC37CF2F1BF77B1476BF194CDC8009E9969427 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMMI12 -%!PS-AdobeFont-1.0: CMMI12 003.002 -%%Title: CMMI12 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI12. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMMI12 known{/CMMI12 findfont dup/UniqueID known{dup -/UniqueID get 5087386 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMMI12 def -/FontBBox {-31 -250 1026 750 }readonly def -/UniqueID 5087386 def -/PaintType 0 def -/FontInfo 10 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMMI12.) readonly def -/FullName (CMMI12) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle -14.04 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -/ascent 750 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 68 /D put -dup 73 /I put -dup 82 /R put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3C05EF98F858322DCEA45E0874C5 -45D25FE192539D9CDA4BAA46D9C431465E6ABF4E4271F89EDED7F37BE4B31FB4 -7934F62D1F46E8671F6290D6FFF601D4937BF71C22D60FB800A15796421E3AA7 -72C500501D8B10C0093F6467C553250F7C27B2C3D893772614A846374A85BC4E -BEC0B0A89C4C161C3956ECE25274B962C854E535F418279FE26D8F83E38C5C89 -974E9A224B3CBEF90A9277AF10E0C7CAC8DC11C41DC18B814A7682E5F0248674 -11453BC81C443407AF41AF8A831A85A700CFC65E2181BCBFBFE3573BF464E2BE -882A715BE109B49A15C32F62CF5C10257E5EA12C24F72137EB63297C28625AC3 -2274038691582D6D75FE8F895A0813982793297E49CC9B54053BA2ABD429156A -7FFCD7B19DAA44E2107720921B74185AE507AC33141819511A6AC20BC20FB541 -0B5AAEC5743673E9E39C1976D5E6EB4E4D8E2B31BEA302E5AF1B2FBCEC6D9E69 -987970648B9276232093695D55A806D87648B1749CB537E78BB08AA83A5001F7 -609CD1D17FFA1043EB3807AF0B596AF38C91A9675E2A53196FEF45849C95F7DC -182A5EC0EC4435A8A4B6E1CDBF9A5AF457564EA72BF85228EB6FD244F2511F5A -CA9B71A65D53CC06EF5F7EC3A85106139A4D312378BC22183C09A229577B793A -1B7422611C03E84BF809F46C62CE52D3AE29CE01C32B202ACDAA5B72733EB0AE -C31D7EF7BA88D2D14F85313F7A8B9B7A5B124B03AB923744D336C969E5CE304D -3AD977A46664479EDEFB69F113024E761C05FA48A54072DF9E12C2F352ACB3E6 -D04F6EEFFDE209E7FA3DA22E5B1D1409461F4286B7F4F8251B44E5CB7805762E -E129FF4A06A7458F3191926B1CAF70E32C6571AD2DC07C34FF62840896F4D200 -761B1A7FA356526D1E3AB4C542AF13623BAEB9F61B1BEEF79A9205B1FEFDAE24 -8799D516A9ACC30BC0139C63C9A0523E9D5439213B67D490C96F902958779B8F -68BD8E9FDDCE8A3A2E35877DB6C94B7612382ED8F218EB1157D2ADD090A2448D -10B99FBC9211C5629ED1C61C74FE93041E5AA03EA4AC3FFDA00C2B6E719CFAA4 -262FE17F66804A6B54D3669836EE4367D2A2991580C5564463C973CA0DA38AC6 -922716E13B4A807B50304B8826CEFEAA47C305FC07EB2AF25FA7945797237B16 -56CDE17AB0834F5C97E0CC5741B061C6FF3A8DD1A79B9A173B66A6A750538E26 -32FBC92E75BA15CFFE22A7302F47908547007402569158F62C29BA2956534FEA -7DACF1E507AC309DAE8C325F2A6023D2FBD81EF42146BFCE6A16A6310A650460 -7B07BB7647C8760FADDF0DBBCD3DA6CC4645D1732DB3A22D8B76E1D2D48E4D4A -46F4BEB80CE65F3517283A1AE08391FD1C10ED452133706BC6725AABC80107FD -754A8BA47B0281D479F052CE26A723EFFACB79B213041A536542AB334769A2BF -88505D82C498ABDD5A73EB539530F47CAC52825D16A969C8BB56D4A7F2830B8F -CB63B92B576E7BD922A4B25E634751F8A3B7C4EBAFCB373EDC8B8281B1D1371A -7844E9AD990CFF09F0D7ED73A5CF873D2D5C9E8A9923CFA31E1A4B4CCCC40760 -8B3AC8FC3C88BC08BD7407725281BB879A1A822D94997826418F1B89D303F2C0 -BE7A0102E6F529630CBF1BC5BF3E4578C164A3DDE45E62A957EF3FB7F0FBBA6B -CA1E79A1ED195B6A11CFB345B663C5E72FA55D80476F604F6C4257B51686AE25 -8F7D159FE605DDA0AC74BAA5034F29FFFD403070013C6E2D8EF6A0990D91173B -D5A3AEB98B64E412991505C3CB7C2CDE13C091FEB3DFBCAF30C4C19511102300 -135BD5D444BB55692013F52056908DFAB2ABFACE81A58423ACEC59344CEF7D4A -C5A3EFFFFF70759BC3E593D878281225060B97D1BEE6B26EED90571FEAFA1812 -1115C0EEC892F5DE6FDD68321A0B3F10A2D771B79BD85476AF6018472A499A86 -07D64CFF4550866AFE590C471C80EB12CB3A989A60BC7BED39097C12D9286E39 -14C7952C4C64820B4DE44A1827B7B0B535244E93FDB80036D6332F90F95B472D -7031E7E3819E881BD0313CFA112EB3AAE943C99C47635CCA7E34DC0306C04E5D -2E9F60FF037EB11602BE74E8E6B711392E866E3E55D988F7C856417A2B9C186D -639819B4786D039B77F8578EF63C088FF28BD08D8353031445C8498A8F445BC3 -D08923D32AC04BF3CAFEFCCC1E77EA894F4E846F47EF62D6841B8D8576FEAE8F -90044626869D04D61D64D56E8C51AF8C18D6CC3FEF3B6C4F7D56FE3260354948 -10104F69B117FB8269292579A7D52FED688C663B643D8D99F13956612271073E -1A337AED059B7A93819A28CDF01569CBEB51069D22ADAE25C47355560F402B2E -8C9900DA82B79C64497C8494F42FABE5AC41791C2010D98FB7E593C744F250DC -D837DB0EAA4F75D0016970F3AE8359878A08CF9A697A06C5EA945819151265B9 -1A12122B98F79185DF852257BB4798E7DC03712EA6ED34F6E6AE1476788DBC33 -9229FADB8D581BE1A63F596698DBD6DB98A092F67197A4FD4A50B648F2691875 -EE2495D6BB310078F516785A0CEC7EB6E8305FDBAEB1D15690409FE32DD9CFAE -DBD3866FB63EBCAAB73E3E4BE5D7F3AA44793938AAF3F8341683F0790F1D46A3 -60CE083F9BEDDA22E0639A92393960F86602216FA51E2754BC2F4CD0BDECE3D8 -FFAB7E0E49613DD4956C9A10AEA798BDA1F756C755BEC12147ADECAB0FB73B7D -203A11D84DD2AB5AA98FD38C1C2573570FD49A4924A94A106D2A7D850E793608 -FB135853E8C4204441CDBE697FD0CB330B1C3596F32D2BCBF263237EAB362D09 -DA6F531B40384DC91F30674760CA7B64BA1968F6A7FC9EBEF431A1AFC5E76D7F -2D44DCB7F61C7F6B16196B3E8B47343F572DBA8B8B21B43E35BB6B2DD5C7982D -244FD4304D254D6CCB5E8CF70E77F50812F41A988EEB3B26BF0F6F69BBA18077 -31134B5A5823D10FEF6201D045AEE7A24E0F25376E9FC66340C56C05F6CD810B -724D85CC4BB8D789834A447CBBA159565D08BA5793D8599035BB5063271518E8 -F6C50E7DCE71B1D186270DDC860C6DC0CD506010EB5B1FDF6BE47A9A18CC15D7 -D657E58BED9EECAD5CE5D49F63139A39BC52C6584BB2C3264D51BD584B40F8EA -AFCD8B83F548594386EB2B05CE803105E84931DC6E7A1398073D48E130E0D907 -CD0F1ECC3254EDF5D4DDBF44415DC9BA66C673820CDB0FDF033D59BE2B5EFCEF -01FF9D33EDC88F8D522E07F1689D024DBCD09A16A63519E1764C8630FF36058D -CFC07027E0ECDA01E0E85B166C613B22F587B4D355EB018BA93E92A36007B4DA -287FF5A91F7D8A0EDF5554ACCF45AC8066E88865C5692E63EB99CAC81367B605 -8E6C19EB98EBFE0D2D161B447B9A70CDD1122C7B78A413369016E6D8481E2AE9 -9AA97B5DD0ACC9B0820F7742CEB2F46F89F3E2092621969A88DC0156B4F941A1 -6BF1546D4B136657C47B082A8A35FE96016BAF3D9679B8C32EDDD6AE6DF3BFB5 -7854074FA019707FC22BFA82299E72ADF9A980AE29A8E2434277E58B01F6B03C -192E1E25DADD49F6E3F69799AE62B56E00B60A031BF8721DB8B2CB6D4A4C15CA -AB1FDE010AB7DC0DDED977389B101B8E53A949222FAA126656E02817DD32B0D4 -A49516CEC2B97EA7C78FD66229B044EB92F502384BCC6CCDFFF995EABE3BB7A9 -50D5D1AED861E7D3BA8D333026C673C5762712E763E59261426044583D789C67 -A606B96F97663F92BF104CE02FBFDFC521EC0D6670B7D4F85A229F51426DE912 -3B729C4A535FB7C88D0A5E78074751B58885DD6BDD2DD9E9C83F105E8CF63DDF -CA7DB39D0319CA7CC2E73F42747F007574DE25AE1538B4D493D22D0D5F0F80C6 -5F6FA3937C8391DE2F0116F81DB2DB0EF751EC838A7F85F163A6F48804E84B96 -8D715EF25B7E2A5CAECC558D80F421052A1D698F3B8452AC27E30A4E6226E3CE -084C8A83ADA0818A110923CF7AC7AD4CB92AE4ABBE0A9EC1FF935FD02774C1F7 -92A278E513012AD17722A23C55EF82E18F8847B5CCE47F4FE3EC508BA563F7B2 -AE56C94285A18DED4D432FB0CEFC05A20BC17DDF9FF919C724810A8ED7358A27 -97EC93C1A13C443A91947FE1F6F528EA7B628917FA7E554A1D7B31ED46C5ABCF -92BA57961C8876DB4041305EBB029B03D8351D5E2819FF87E97ED214D8F1CEF5 -7F7668DDE223721C0B810F4A4AC81CA4EAC86EAE546E1B15D91E626FB9A31824 -5BFF17C4E79FD56ADBF6DBF01BAF6453A81EBDCB38A5FC0FD0FF0646B3B0D199 -13E2E59A1B5CAB6DE5329BE389BA0E2A2AB55CA40B711ED746C24F1E48892E76 -6DACF7DA163CDC90CF076763008E7A899870CDED5A80758E6177BE6B93B07EB1 -5800A3BF7B9AAC3FA825CE594EF5B7546B181375FA8F37608DF17856D2F8EBD5 -6030A9E6F6BEAF224AD2AEF76D03B023E2FCB922CB8E3C6816AABB61FE6E4F83 -F21B4935102C860ECA03DBEFCA461F0E5B93E5A8D18440BCF7D1D6252A24CB6E -A64FDAC8B67C4888519AA368D9C4A8C08C7155DF5BACD75C5196C571C3C456C4 -7CE8D90215FA6EE8CDD72C48740F7F5930EC3632DB63A9C8D2DA125088C0F05A -9FC83D16B7F53163F4EB6FF372C6C3115F1E68EB35967D11126EDEDF0BF80817 -E68A698183B3EB0A207DB43786E1B9D289359D75AD5E465328CAA90E712C2962 -AE2A466173F2FF30EB535A6054BB0B875DC8552C16B49DF17CF84D98D35497BD -F55E273FCBB0C735899529A69990E09149FBD2DDE64B7FA8D50AE83925DF03C8 -0B63EA158FBABB12A028803DA4B9DD6C48C0FEC469C4E730729F4BB420D5B003 -1918B4AE9CF35CFD31E8E62A44C0484E3D00143BF1D330235E821E5CFEAB4D31 -7CB4604DB1F310457FCF9075A3527279644D908DE847CCD00B6F50DBDEF91D3E -38238CAF550FDCABA2C3A46237218DCC5A09AFAF69997E1EBDA7EFE6FC99ECC8 -5D4AFD5EE35FE2346BE79B499EC8EC436868154A947D13BC02C780EBA4B9E64F -3026F1BF5DC1F8D64FEA1281EA40B4BC355638A3A59BD9055BCBB232FA45EA0B -B405131B64F105814019BC55466EE78E9E9ABB62DB30EA452F7EFD7196C76A85 -15B2CFCD89922CADC0F392B0C54A231F3999AEFB53C24EB0C63B0C8A1A1ABB6B -AAB2F93E5ECC7AB90EADA320E918106BAAFC1F8C425C617639984629018BA674 -6FF4F338AC43E23BC3740542911C058D43A49A11CB3A0CC8E3088BB5BA6048D6 -CC2AD250DE956BFBE83BB24C945C20D9C22E7105983F284EF478F9B68BFB0322 -EEB7D62802CBAAEFF1C2332159DCC7243EA40CE15C734EA905E04C476B178B82 -A08ABCB0B86A7330C75E62EE7844C9E22DDB013ADDF20AFE08122EE1B930A81D -806A0F8CC584CB7FF5F56F9B35E5FF78FD93E7E4A40C64537464EAA275FE88F4 -461FC6A467C8A69B9A9FBC10D44AC1B753D313A8E7D97F5FAEB60F82855658D1 -4DCEE043C8FCDFD8A29DD091F3BA55874A458B2B8989F35055C72FC411382361 -9AADC717E602B48D7C9521D3971A6F7EB19D539445DDE9EFBC5B58FA9E5E426C -172C45CDA24985FC4632287FC3B15849DEB56F5A061993AB10A6BC59868534E6 -69888175053108B77E4978D971B4EC57224C0F93EEA4C15AE92254140A94704E -ED5666FC06C5341F643F779CC88A9E81891565C63B6F7F6286E664F4E0A48690 -356DC96F1B98026C563700772485B83BFA06435D4E0793EF822F423C93FBACA0 -E5D889D2B76771C6F0EE997A5DB43C2F6921132890406E3C33F6F159B14C5D78 -7C151BDFFDD02B697315F191B5490073EB418A4FF2A398C68D44F0CD1B87CF9C -B52F12728B72F94D752D23151196A256908135C87991E508B8906CE2539DCA8A -31F86809C8C6C18A09F6129BD7CDC6B37E76B648788056851F22BD3E3B5772FF -EC01D822B57FFDB3BAE624F05531292641FD6A7E3666152D18F6C653048DD7D7 -98A942C840C4A0FA662F260B21C64214152BB86F03662A330109C5AC0A5EBA30 -C6201F558858130703DF76AF4FBBEE069BDE45C0D9467077D85FFED4F9BA9C61 -AED87D67CDCA453A6528AC5BA153E1039D9CCC556CEA5CBB542265FF54A1B208 -E0E13740E7E7C26AA00AEE909F8F3ADC2726081A744D8EF6BB711BF5F611A900 -76F91C26A338DA13A7160A9F42410CCEB3190000D963D036FDA05A29F598EF40 -8FAE6F8E7E6F50C99C3304A573501C13A00023085F057DF331E3354CBE65D573 -CAE73BF15B3B96B502E0AAF2B4A86237E98A997AAEFFF4227D5A26E8972C48E7 -761F430733E6EF8AB2D903C17FAFBFA21C25F8A0AC157D397BF3CC1AE7598F0A -2BE4FB46B29443CE57F41FD5F91122E9D86F903E94D5B55E2BB95949C156D138 -89883BEFD634311F9280C7F028DCA6408D3A682DF5B55B9F7ABF08F019190F60 -D39E4F0E80F0594235B09A5320109638B938633A2C196E4ED2B43DCD8643C3CF -C6123B076B7F73352F906D96FDE0FBF50CCCA432712C574D5857838BAC30B485 -D25024EB254A7EFE57D1DF0892C275CDB3DF77602F0FED0FAEBC644BCACA04B8 -B424DB125E487794CAB36E01B5E1A26F5E1E97A739AA36D77A12F5B45338EB39 -AF36CEBDED55DCBFCF497FD475FC6BAB5530AD6153C6BD982564EE8712185F1F -D5EA7ADF4104661168A01994C1FD773A50C8AD6A3E4D332E4D59521BB8BBC6C3 -866EB4AC3EA4532477E6CBF6BBF0860031C3B916AA25E3492670EA67F55CF4FD -207C684A0DDB6F4AD21B2909CBA71BCE2E762012B0927BA72367A6AE0AF87F73 -756C9BC85E4EDE35317E2CCCD138C02C7A8013AFDC1A48C3A4BB8EF257BDEEA7 -60E012F54D12D31D18DC59D5E526F12567B8688B4B67E16B56713870300016BD -A3B9DA87FDC865246AF8E94316799110D86B1DDADB8A673402D4226C519C058A -1D1E5A5778584FC28AF12819B1924060BC4F54B1054EA6AB0149E04B8C4302D4 -A56D8A347EB5D3D2A0E12CF7E35059BDB53D9FF6BD25F6D9619BC4669CFC1048 -C6C9978B8751B840F27D82A69075832BE59F55C1737CBB1220FB8FF691FDBDF3 -03BD7D225A9372AC221C38245E48320E1CCF898D9EEDD678E5B8C65B7F588321 -1A3953EEB9B39EA9A8CB72DB08C3E9234DFFF5FDF9DF804C021D57E97DA7622B -97F4CB6E0EB640E0DC9EA15C5193F92A3A7565F4C7A4C9CC327F7CD2C44900AE -D9E76FFE62FC37FA376E77131B566AE67C3E09DA80F198BBB995EE8FA47EEDB8 -4B467C6C7DB8AEA745CF8C56B8BE56534E9C56FCB2B7006426DFE93D728FA4CF -94F131C549814E54ECE7C914C5FE8E4961D3437CE7475D03534B62650F551D97 -201C794AA877445DBEB11C85ADF6119B05360700F8CEDE4766E3A1D7A35CDDC7 -9ABF7C619E3868A39D1852DBE1EEAF5D7898C78323873AC005542B68C43C5000 -CC58F675EB595F87C879694751494676465891E8A897158B481F11A171CCBBD7 -29603F00210CFD7FF31FE3D273933ECC34AFBCC4108D9B76D9ECE63EA06CF939 -4799092A54A749DACB82C1424E9879672C8BC084C360014C9C1B6D5D65C68AED -66CE329C3AD712C0A36BE7EF03FDF339CAA2E0336D387A693B1DFAB5D5164E31 -14755A158168962C9B399F8F1DF3FF5060D7464D5071058C30C572A2BC7DEE53 -84BD7614A4BEC4C84E18CF7EC81C811724463BD46CECA5FB57B0F55EAE20CC74 -6AD815D1897B037C197D2456797B992C20C70B663BF99FE28C513B4E221C8E12 -49779F8C0AE8517048ADDF7CDF0D698E3EFE60071C4997B7F5EF12B6CB65390C -224F13FBB99FFC034C0710F05019899689B6D3350BBA65C7CE7C2AB03D81B9A5 -5F3D65E4D462DAB189006669F7390A78A1B8908A4C913B15DB8827DFF15BB9A4 -A6037DDB643103B937257A7DAB025F09D53FBBC2BCB6B0BCD8D56B2B2784E498 -1F6CF8470DCC892AD0CFE11578718948BABF9C1427084643B66BB9181094E29D -5FBE37708E1D8A6B7518A96876844CB66954227A7A6AF28DD075A462526DD5D6 -40EECC56FA366106E55C7068997B54B7F0D03AC1AD45D28C67C7ECA99DBEDB1C -E18A79C353113E2E05B837E703278B202112B1C69E42A69D64B62F0E7D8F7E5B -C1F93F0F99EC20EF312046F4B0CD7DAB31E422070B629A7FAF3BC331F0A7186D -4053C7A7BB3253326E1E84A4EA2D9659CAA229C3AC407FB24F4ABE9482030869 -A9668917641FF296931F653967E8FC62C7675CE24653764A71143C68098DF21F -4F97F7B73E1C8F8C05AC12E7DF18BF04D28FC23DC3CDFC688B72FB22525E0561 -5CFE5C0FEEDA85907470E66AE5D1C45B919D8F2A3A7DEAD823117A2C0D52160A -FEE3E74E0A6661400AA6593C0D9F22F0EFADB0C6E647EFB59DF4937EAD06D56F -26FA7265B16AFEA5D5C98FB6BA08F7D2490D52BE820E539338787577DF79F878 -FA7861286917396817F253996B79C2E6795E23FA13FD6E2D95EBA8FAE2CD055F -594D28A7660BD0519FD4F6E351B5D23D56A5F78DF4E1EBCB9497257050F5DD29 -57475733A025264F885BBDA44AE31490924D0C98F0160D07B552051123B1B031 -87334A38C914E7B5D3C2B11B0B737A164983170C90F4D312B23458E20BC02A07 -D06E317D13514665AF0C5F221E0D271111AC1BF1C251DAE23C3E17C8B65B4151 -6E069C910AC5EB83F365C2C5BFABA806FC1CAA0A0BAA6FC9F78010F1F2441C12 -743C9B6B4F2F725692F6F3F1880ADB38130863787146AAB77E2018AD7398EB6C -51ECEEE4A6795561780DA578AB64238BAFD9AEF74A49FAB6ABFCB01B58FC5E32 -4E7862644C1CE0F8D155E08B72FB8393801A0F2185CB0852CAA0B261E07B0754 -9E64C075D2F2623E2C2AD3203CA375DEEF2450B5C4FA85F05A4B17C051FC0887 -5845CB473013E9FC80C10ADB4E47292D96C521CF8E2FEF0B627362F126FD6C7A -BE79ED7E904C47FBCBE69D4CF4911F0E492B550325562D57E7D91AA75D495B57 -330BD247125C586314ED15B89D13A5B21B625D0610C76AF0E53DCD8AEC13E9A6 -CCF377201B20945F4DA433F36401DEBF87858835719792069C93BE331F76BA30 -2BEAF96B514FAFF986D584BFE111932C8117EC8D5C43B0D3F768F09E0C49A362 -2EF372E274D12CD9308A67CAC1F3A7E7B629BF32BBA4C6C7F6F8CBD52E12FB5A - -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -TeXDict begin 40258437 52099154 1000 600 600 (dummy_fig.dvi) -@start /Fa 204[30 51[{}1 49.8132 /CMR6 rf /Fb 187[58 -68[{}1 66.4176 /CMMI8 rf /Fc 204[35 51[{}1 66.4176 /CMR8 -rf /Fd 173[74 8[43 4[81 68[{}3 99.6264 /CMMI12 rf end -%%EndProlog -%%BeginSetup -%%Feature: *Resolution 600dpi -TeXDict begin - end -%%EndSetup -TeXDict begin 1 0 bop Black Black Black Black 5417 952 -a @beginspecial 0 @llx 0 @lly 147 @urx 83 @ury 1470 @rwi -@setspecial -%%BeginDocument: diode_D3.pstex -%!PS-Adobe-2.0 EPSF-2.0 -%%Title: diode_ref.fig -%%Creator: fig2dev Version 3.2 Patchlevel 5 -%%CreationDate: Tue Aug 28 14:11:31 2012 -%%For: yogesh@iml21.ee.iitb.ac.in (yogesh Save) -%%BoundingBox: 0 0 147 83 -%Magnification: 1.0000 -%%EndComments -/$F2psDict 200 dict def -$F2psDict begin -$F2psDict /mtrx matrix put -/col-1 {0 setgray} bind def -/col0 {0.000 0.000 0.000 srgb} bind def -/col1 {0.000 0.000 1.000 srgb} bind def -/col2 {0.000 1.000 0.000 srgb} bind def -/col3 {0.000 1.000 1.000 srgb} bind def -/col4 {1.000 0.000 0.000 srgb} bind def -/col5 {1.000 0.000 1.000 srgb} bind def -/col6 {1.000 1.000 0.000 srgb} bind def -/col7 {1.000 1.000 1.000 srgb} bind def -/col8 {0.000 0.000 0.560 srgb} bind def -/col9 {0.000 0.000 0.690 srgb} bind def -/col10 {0.000 0.000 0.820 srgb} bind def -/col11 {0.530 0.810 1.000 srgb} bind def -/col12 {0.000 0.560 0.000 srgb} bind def -/col13 {0.000 0.690 0.000 srgb} bind def -/col14 {0.000 0.820 0.000 srgb} bind def -/col15 {0.000 0.560 0.560 srgb} bind def -/col16 {0.000 0.690 0.690 srgb} bind def -/col17 {0.000 0.820 0.820 srgb} bind def -/col18 {0.560 0.000 0.000 srgb} bind def -/col19 {0.690 0.000 0.000 srgb} bind def -/col20 {0.820 0.000 0.000 srgb} bind def -/col21 {0.560 0.000 0.560 srgb} bind def -/col22 {0.690 0.000 0.690 srgb} bind def -/col23 {0.820 0.000 0.820 srgb} bind def -/col24 {0.500 0.190 0.000 srgb} bind def -/col25 {0.630 0.250 0.000 srgb} bind def -/col26 {0.750 0.380 0.000 srgb} bind def -/col27 {1.000 0.500 0.500 srgb} bind def -/col28 {1.000 0.630 0.630 srgb} bind def -/col29 {1.000 0.750 0.750 srgb} bind def -/col30 {1.000 0.880 0.880 srgb} bind def -/col31 {1.000 0.840 0.000 srgb} bind def - -end -save -newpath 0 83 moveto 0 0 lineto 147 0 lineto 147 83 lineto closepath clip newpath --116.3 149.2 translate -1 -1 scale - -/cp {closepath} bind def -/ef {eofill} bind def -/gr {grestore} bind def -/gs {gsave} bind def -/sa {save} bind def -/rs {restore} bind def -/l {lineto} bind def -/m {moveto} bind def -/rm {rmoveto} bind def -/n {newpath} bind def -/s {stroke} bind def -/sh {show} bind def -/slc {setlinecap} bind def -/slj {setlinejoin} bind def -/slw {setlinewidth} bind def -/srgb {setrgbcolor} bind def -/rot {rotate} bind def -/sc {scale} bind def -/sd {setdash} bind def -/ff {findfont} bind def -/sf {setfont} bind def -/scf {scalefont} bind def -/sw {stringwidth} bind def -/tr {translate} bind def -/tnt {dup dup currentrgbcolor - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add srgb} - bind def -/shd {dup dup currentrgbcolor 4 -2 roll mul 4 -2 roll mul - 4 -2 roll mul srgb} bind def - /DrawEllipse { - /endangle exch def - /startangle exch def - /yrad exch def - /xrad exch def - /y exch def - /x exch def - /savematrix mtrx currentmatrix def - x y tr xrad yrad sc 0 0 1 startangle endangle arc - closepath - savematrix setmatrix - } def - -/$F2psBegin {$F2psDict begin /$F2psEnteredState save def} def -/$F2psEnd {$F2psEnteredState restore end} def - -$F2psBegin -10 setmiterlimit -0 slj 0 slc - 0.06000 0.06000 sc -% -% Fig objects follow -% -% -% here starts figure with depth 100 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1570 l 3375 1594 l 3525 1642 l 3375 1690 l 3525 1738 l - 3375 1786 l 3525 1834 l 3375 1882 l 3525 1930 l 3450 1954 l - - 3450 2100 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 50 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1350 l 4200 1350 l - 4200 1500 l gs col0 s gr -% Polyline -n 3450 2100 m 3450 2250 l 4200 2250 l - 4200 2025 l gs col0 s gr -% Polyline -n 3825 1350 m - 3825 1125 l gs col0 s gr -% Polyline -n 3825 2250 m - 3825 2475 l gs col0 s gr -% Polyline -n 2100 2250 m - 2100 2400 l gs col0 s gr -% Polyline -n 2100 1350 m - 2100 1200 l gs col0 s gr -% Polyline -n 2100 1200 m - 2100 1125 l gs col0 s gr -% Polyline -n 2100 2400 m - 2100 2475 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 0 -% Ellipse -7.500 slw -n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr - -% Polyline -0 slj -0 slc -n 4125 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4275 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1725 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1500 m - 4200 1650 l gs col-1 s gr -% Polyline -n 4200 1950 m - 4200 2100 l gs col-1 s gr -% Polyline -n 2101 2250 m - 2101 1950 l gs col-1 s gr -% Polyline -n 2101 1652 m - 2101 1352 l gs col-1 s gr -% Polyline -n 2250 1950 m - 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr -% Polyline -n 2101 1950 m 2250 1652 l 1950 1652 l - cp gs col7 1.00 shd ef gr gs col0 s gr -% here ends figure; -$F2psEnd -rs -showpage -%%Trailer -%EOF - -%%EndDocument - @endspecial 0 0 0 TeXcolorrgb 5573 458 a Fd(D)5654 473 -y Fc(3)p Black 0 0 0 TeXcolorrgb 5985 608 a Fd(R)6059 -623 y Fb(D)6117 632 y Fa(3)p Black 0 0 0 TeXcolorrgb -6623 571 a Fd(I)6666 586 y Fb(D)6724 595 y Fa(3)p Black -Black Black eop end -%%Trailer - -userdict /end-hook known{end-hook}if -%%EOF diff --git a/OSCAD/Examples/bridgeRectifier/diode_D3.pstex b/OSCAD/Examples/bridgeRectifier/diode_D3.pstex deleted file mode 100644 index 2a9db44..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D3.pstex +++ /dev/null @@ -1,187 +0,0 @@ -%!PS-Adobe-2.0 EPSF-2.0 -%%Title: diode_ref.fig -%%Creator: fig2dev Version 3.2 Patchlevel 5 -%%CreationDate: Tue Aug 28 14:11:31 2012 -%%For: yogesh@iml21.ee.iitb.ac.in (yogesh Save) -%%BoundingBox: 0 0 147 83 -%Magnification: 1.0000 -%%EndComments -/$F2psDict 200 dict def -$F2psDict begin -$F2psDict /mtrx matrix put -/col-1 {0 setgray} bind def -/col0 {0.000 0.000 0.000 srgb} bind def -/col1 {0.000 0.000 1.000 srgb} bind def -/col2 {0.000 1.000 0.000 srgb} bind def -/col3 {0.000 1.000 1.000 srgb} bind def -/col4 {1.000 0.000 0.000 srgb} bind def -/col5 {1.000 0.000 1.000 srgb} bind def -/col6 {1.000 1.000 0.000 srgb} bind def -/col7 {1.000 1.000 1.000 srgb} bind def -/col8 {0.000 0.000 0.560 srgb} bind def -/col9 {0.000 0.000 0.690 srgb} bind def -/col10 {0.000 0.000 0.820 srgb} bind def -/col11 {0.530 0.810 1.000 srgb} bind def -/col12 {0.000 0.560 0.000 srgb} bind def -/col13 {0.000 0.690 0.000 srgb} bind def -/col14 {0.000 0.820 0.000 srgb} bind def -/col15 {0.000 0.560 0.560 srgb} bind def -/col16 {0.000 0.690 0.690 srgb} bind def -/col17 {0.000 0.820 0.820 srgb} bind def -/col18 {0.560 0.000 0.000 srgb} bind def -/col19 {0.690 0.000 0.000 srgb} bind def -/col20 {0.820 0.000 0.000 srgb} bind def -/col21 {0.560 0.000 0.560 srgb} bind def -/col22 {0.690 0.000 0.690 srgb} bind def -/col23 {0.820 0.000 0.820 srgb} bind def -/col24 {0.500 0.190 0.000 srgb} bind def -/col25 {0.630 0.250 0.000 srgb} bind def -/col26 {0.750 0.380 0.000 srgb} bind def -/col27 {1.000 0.500 0.500 srgb} bind def -/col28 {1.000 0.630 0.630 srgb} bind def -/col29 {1.000 0.750 0.750 srgb} bind def -/col30 {1.000 0.880 0.880 srgb} bind def -/col31 {1.000 0.840 0.000 srgb} bind def - -end -save -newpath 0 83 moveto 0 0 lineto 147 0 lineto 147 83 lineto closepath clip newpath --116.3 149.2 translate -1 -1 scale - -/cp {closepath} bind def -/ef {eofill} bind def -/gr {grestore} bind def -/gs {gsave} bind def -/sa {save} bind def -/rs {restore} bind def -/l {lineto} bind def -/m {moveto} bind def -/rm {rmoveto} bind def -/n {newpath} bind def -/s {stroke} bind def -/sh {show} bind def -/slc {setlinecap} bind def -/slj {setlinejoin} bind def -/slw {setlinewidth} bind def -/srgb {setrgbcolor} bind def -/rot {rotate} bind def -/sc {scale} bind def -/sd {setdash} bind def -/ff {findfont} bind def -/sf {setfont} bind def -/scf {scalefont} bind def -/sw {stringwidth} bind def -/tr {translate} bind def -/tnt {dup dup currentrgbcolor - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add srgb} - bind def -/shd {dup dup currentrgbcolor 4 -2 roll mul 4 -2 roll mul - 4 -2 roll mul srgb} bind def - /DrawEllipse { - /endangle exch def - /startangle exch def - /yrad exch def - /xrad exch def - /y exch def - /x exch def - /savematrix mtrx currentmatrix def - x y tr xrad yrad sc 0 0 1 startangle endangle arc - closepath - savematrix setmatrix - } def - -/$F2psBegin {$F2psDict begin /$F2psEnteredState save def} def -/$F2psEnd {$F2psEnteredState restore end} def - -$F2psBegin -10 setmiterlimit -0 slj 0 slc - 0.06000 0.06000 sc -% -% Fig objects follow -% -% -% here starts figure with depth 100 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1570 l 3375 1594 l 3525 1642 l 3375 1690 l 3525 1738 l - 3375 1786 l 3525 1834 l 3375 1882 l 3525 1930 l 3450 1954 l - - 3450 2100 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 50 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1350 l 4200 1350 l - 4200 1500 l gs col0 s gr -% Polyline -n 3450 2100 m 3450 2250 l 4200 2250 l - 4200 2025 l gs col0 s gr -% Polyline -n 3825 1350 m - 3825 1125 l gs col0 s gr -% Polyline -n 3825 2250 m - 3825 2475 l gs col0 s gr -% Polyline -n 2100 2250 m - 2100 2400 l gs col0 s gr -% Polyline -n 2100 1350 m - 2100 1200 l gs col0 s gr -% Polyline -n 2100 1200 m - 2100 1125 l gs col0 s gr -% Polyline -n 2100 2400 m - 2100 2475 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 0 -% Ellipse -7.500 slw -n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr - -% Polyline -0 slj -0 slc -n 4125 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4275 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1725 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1500 m - 4200 1650 l gs col-1 s gr -% Polyline -n 4200 1950 m - 4200 2100 l gs col-1 s gr -% Polyline -n 2101 2250 m - 2101 1950 l gs col-1 s gr -% Polyline -n 2101 1652 m - 2101 1352 l gs col-1 s gr -% Polyline -n 2250 1950 m - 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr -% Polyline -n 2101 1950 m 2250 1652 l 1950 1652 l - cp gs col7 1.00 shd ef gr gs col0 s gr -% here ends figure; -$F2psEnd -rs -showpage -%%Trailer -%EOF diff --git a/OSCAD/Examples/bridgeRectifier/diode_D3.pstex_t b/OSCAD/Examples/bridgeRectifier/diode_D3.pstex_t deleted file mode 100644 index 7c9f3d5..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D3.pstex_t +++ /dev/null @@ -1,19 +0,0 @@ -\begin{picture}(0,0)% -\includegraphics{diode_D3.pstex}% -\end{picture}% -\setlength{\unitlength}{3947sp}% -% -\begingroup\makeatletter\ifx\SetFigFont\undefined% -\gdef\SetFigFont#1#2#3#4#5{% - \reset@font\fontsize{#1}{#2pt}% - \fontfamily{#3}\fontseries{#4}\fontshape{#5}% - \selectfont}% -\fi\endgroup% -\begin{picture}(2435,1374)(1939,-1648) -\put(2251,-661){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$D_{3}$}% -}}}} -\put(3076,-961){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$R_{D_{3}}$}% -}}}} -\put(4351,-886){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$I_{D_{3}}$}% -}}}} -\end{picture}% diff --git a/OSCAD/Examples/bridgeRectifier/diode_D4.eps b/OSCAD/Examples/bridgeRectifier/diode_D4.eps deleted file mode 100644 index 370ff60..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D4.eps +++ /dev/null @@ -1,1364 +0,0 @@ -%!PS-Adobe-2.0 EPSF-2.0 -%%Creator: dvips(k) 5.98 Copyright 2009 Radical Eye Software -%%Title: dummy_fig.dvi -%%CreationDate: Wed Apr 24 17:14:02 2013 -%%BoundingBox: 721 605 883 690 -%%DocumentFonts: CMMI12 CMR8 CMMI8 CMR6 -%%EndComments -%DVIPSWebPage: (www.radicaleye.com) -%DVIPSCommandLine: dvips -E -o dummy_fig.eps dummy_fig.dvi -%DVIPSParameters: dpi=600 -%DVIPSSource: TeX output 2013.04.24:1714 -%%BeginProcSet: tex.pro 0 0 -%! -/TeXDict 300 dict def TeXDict begin/N{def}def/B{bind def}N/S{exch}N/X{S -N}B/A{dup}B/TR{translate}N/isls false N/vsize 11 72 mul N/hsize 8.5 72 -mul N/landplus90{false}def/@rigin{isls{[0 landplus90{1 -1}{-1 1}ifelse 0 -0 0]concat}if 72 Resolution div 72 VResolution div neg scale isls{ -landplus90{VResolution 72 div vsize mul 0 exch}{Resolution -72 div hsize -mul 0}ifelse TR}if Resolution VResolution vsize -72 div 1 add mul TR[ -matrix currentmatrix{A A round sub abs 0.00001 lt{round}if}forall round -exch round exch]setmatrix}N/@landscape{/isls true N}B/@manualfeed{ -statusdict/manualfeed true put}B/@copies{/#copies X}B/FMat[1 0 0 -1 0 0] -N/FBB[0 0 0 0]N/nn 0 N/IEn 0 N/ctr 0 N/df-tail{/nn 8 dict N nn begin -/FontType 3 N/FontMatrix fntrx N/FontBBox FBB N string/base X array -/BitMaps X/BuildChar{CharBuilder}N/Encoding IEn N end A{/foo setfont}2 -array copy cvx N load 0 nn put/ctr 0 N[}B/sf 0 N/df{/sf 1 N/fntrx FMat N -df-tail}B/dfs{div/sf X/fntrx[sf 0 0 sf neg 0 0]N df-tail}B/E{pop nn A -definefont setfont}B/Cw{Cd A length 5 sub get}B/Ch{Cd A length 4 sub get -}B/Cx{128 Cd A length 3 sub get sub}B/Cy{Cd A length 2 sub get 127 sub} -B/Cdx{Cd A length 1 sub get}B/Ci{Cd A type/stringtype ne{ctr get/ctr ctr -1 add N}if}B/CharBuilder{save 3 1 roll S A/base get 2 index get S -/BitMaps get S get/Cd X pop/ctr 0 N Cdx 0 Cx Cy Ch sub Cx Cw add Cy -setcachedevice Cw Ch true[1 0 0 -1 -.1 Cx sub Cy .1 sub]{Ci}imagemask -restore}B/D{/cc X A type/stringtype ne{]}if nn/base get cc ctr put nn -/BitMaps get S ctr S sf 1 ne{A A length 1 sub A 2 index S get sf div put -}if put/ctr ctr 1 add N}B/I{cc 1 add D}B/bop{userdict/bop-hook known{ -bop-hook}if/SI save N @rigin 0 0 moveto/V matrix currentmatrix A 1 get A -mul exch 0 get A mul add .99 lt{/QV}{/RV}ifelse load def pop pop}N/eop{ -SI restore userdict/eop-hook known{eop-hook}if showpage}N/@start{ -userdict/start-hook known{start-hook}if pop/VResolution X/Resolution X -1000 div/DVImag X/IEn 256 array N 2 string 0 1 255{IEn S A 360 add 36 4 -index cvrs cvn put}for pop 65781.76 div/vsize X 65781.76 div/hsize X}N -/p{show}N/RMat[1 0 0 -1 0 0]N/BDot 260 string N/Rx 0 N/Ry 0 N/V{}B/RV/v{ -/Ry X/Rx X V}B statusdict begin/product where{pop false[(Display)(NeXT) -(LaserWriter 16/600)]{A length product length le{A length product exch 0 -exch getinterval eq{pop true exit}if}{pop}ifelse}forall}{false}ifelse -end{{gsave TR -.1 .1 TR 1 1 scale Rx Ry false RMat{BDot}imagemask -grestore}}{{gsave TR -.1 .1 TR Rx Ry scale 1 1 false RMat{BDot} -imagemask grestore}}ifelse B/QV{gsave newpath transform round exch round -exch itransform moveto Rx 0 rlineto 0 Ry neg rlineto Rx neg 0 rlineto -fill grestore}B/a{moveto}B/delta 0 N/tail{A/delta X 0 rmoveto}B/M{S p -delta add tail}B/b{S p tail}B/c{-4 M}B/d{-3 M}B/e{-2 M}B/f{-1 M}B/g{0 M} -B/h{1 M}B/i{2 M}B/j{3 M}B/k{4 M}B/w{0 rmoveto}B/l{p -4 w}B/m{p -3 w}B/n{ -p -2 w}B/o{p -1 w}B/q{p 1 w}B/r{p 2 w}B/s{p 3 w}B/t{p 4 w}B/x{0 S -rmoveto}B/y{3 2 roll p a}B/bos{/SS save N}B/eos{SS restore}B end - -%%EndProcSet -%%BeginProcSet: texps.pro 0 0 -%! -TeXDict begin/rf{findfont dup length 1 add dict begin{1 index/FID ne 2 -index/UniqueID ne and{def}{pop pop}ifelse}forall[1 index 0 6 -1 roll -exec 0 exch 5 -1 roll VResolution Resolution div mul neg 0 0]FontType 0 -ne{/Metrics exch def dict begin Encoding{exch dup type/integertype ne{ -pop pop 1 sub dup 0 le{pop}{[}ifelse}{FontMatrix 0 get div Metrics 0 get -div def}ifelse}forall Metrics/Metrics currentdict end def}{{1 index type -/nametype eq{exit}if exch pop}loop}ifelse[2 index currentdict end -definefont 3 -1 roll makefont/setfont cvx]cvx def}def/ObliqueSlant{dup -sin S cos div neg}B/SlantFont{4 index mul add}def/ExtendFont{3 -1 roll -mul exch}def/ReEncodeFont{CharStrings rcheck{/Encoding false def dup[ -exch{dup CharStrings exch known not{pop/.notdef/Encoding true def}if} -forall Encoding{]exch pop}{cleartomark}ifelse}if/Encoding exch def}def -end - -%%EndProcSet -%%BeginProcSet: special.pro 0 0 -%! -TeXDict begin/SDict 200 dict N SDict begin/@SpecialDefaults{/hs 612 N -/vs 792 N/ho 0 N/vo 0 N/hsc 1 N/vsc 1 N/ang 0 N/CLIP 0 N/rwiSeen false N -/rhiSeen false N/letter{}N/note{}N/a4{}N/legal{}N}B/@scaleunit 100 N -/@hscale{@scaleunit div/hsc X}B/@vscale{@scaleunit div/vsc X}B/@hsize{ -/hs X/CLIP 1 N}B/@vsize{/vs X/CLIP 1 N}B/@clip{/CLIP 2 N}B/@hoffset{/ho -X}B/@voffset{/vo X}B/@angle{/ang X}B/@rwi{10 div/rwi X/rwiSeen true N}B -/@rhi{10 div/rhi X/rhiSeen true N}B/@llx{/llx X}B/@lly{/lly X}B/@urx{ -/urx X}B/@ury{/ury X}B/magscale true def end/@MacSetUp{userdict/md known -{userdict/md get type/dicttype eq{userdict begin md length 10 add md -maxlength ge{/md md dup length 20 add dict copy def}if end md begin -/letter{}N/note{}N/legal{}N/od{txpose 1 0 mtx defaultmatrix dtransform S -atan/pa X newpath clippath mark{transform{itransform moveto}}{transform{ -itransform lineto}}{6 -2 roll transform 6 -2 roll transform 6 -2 roll -transform{itransform 6 2 roll itransform 6 2 roll itransform 6 2 roll -curveto}}{{closepath}}pathforall newpath counttomark array astore/gc xdf -pop ct 39 0 put 10 fz 0 fs 2 F/|______Courier fnt invertflag{PaintBlack} -if}N/txpose{pxs pys scale ppr aload pop por{noflips{pop S neg S TR pop 1 --1 scale}if xflip yflip and{pop S neg S TR 180 rotate 1 -1 scale ppr 3 -get ppr 1 get neg sub neg ppr 2 get ppr 0 get neg sub neg TR}if xflip -yflip not and{pop S neg S TR pop 180 rotate ppr 3 get ppr 1 get neg sub -neg 0 TR}if yflip xflip not and{ppr 1 get neg ppr 0 get neg TR}if}{ -noflips{TR pop pop 270 rotate 1 -1 scale}if xflip yflip and{TR pop pop -90 rotate 1 -1 scale ppr 3 get ppr 1 get neg sub neg ppr 2 get ppr 0 get -neg sub neg TR}if xflip yflip not and{TR pop pop 90 rotate ppr 3 get ppr -1 get neg sub neg 0 TR}if yflip xflip not and{TR pop pop 270 rotate ppr -2 get ppr 0 get neg sub neg 0 S TR}if}ifelse scaleby96{ppr aload pop 4 --1 roll add 2 div 3 1 roll add 2 div 2 copy TR .96 dup scale neg S neg S -TR}if}N/cp{pop pop showpage pm restore}N end}if}if}N/normalscale{ -Resolution 72 div VResolution 72 div neg scale magscale{DVImag dup scale -}if 0 setgray}N/psfts{S 65781.76 div N}N/startTexFig{/psf$SavedState -save N userdict maxlength dict begin/magscale true def normalscale -currentpoint TR/psf$ury psfts/psf$urx psfts/psf$lly psfts/psf$llx psfts -/psf$y psfts/psf$x psfts currentpoint/psf$cy X/psf$cx X/psf$sx psf$x -psf$urx psf$llx sub div N/psf$sy psf$y psf$ury psf$lly sub div N psf$sx -psf$sy scale psf$cx psf$sx div psf$llx sub psf$cy psf$sy div psf$ury sub -TR/showpage{}N/erasepage{}N/setpagedevice{pop}N/copypage{}N/p 3 def -@MacSetUp}N/doclip{psf$llx psf$lly psf$urx psf$ury currentpoint 6 2 roll -newpath 4 copy 4 2 roll moveto 6 -1 roll S lineto S lineto S lineto -closepath clip newpath moveto}N/endTexFig{end psf$SavedState restore}N -/@beginspecial{SDict begin/SpecialSave save N gsave normalscale -currentpoint TR @SpecialDefaults count/ocount X/dcount countdictstack N} -N/@setspecial{CLIP 1 eq{newpath 0 0 moveto hs 0 rlineto 0 vs rlineto hs -neg 0 rlineto closepath clip}if ho vo TR hsc vsc scale ang rotate -rwiSeen{rwi urx llx sub div rhiSeen{rhi ury lly sub div}{dup}ifelse -scale llx neg lly neg TR}{rhiSeen{rhi ury lly sub div dup scale llx neg -lly neg TR}if}ifelse CLIP 2 eq{newpath llx lly moveto urx lly lineto urx -ury lineto llx ury lineto closepath clip}if/showpage{}N/erasepage{}N -/setpagedevice{pop}N/copypage{}N newpath}N/@endspecial{count ocount sub{ -pop}repeat countdictstack dcount sub{end}repeat grestore SpecialSave -restore end}N/@defspecial{SDict begin}N/@fedspecial{end}B/li{lineto}B -/rl{rlineto}B/rc{rcurveto}B/np{/SaveX currentpoint/SaveY X N 1 -setlinecap newpath}N/st{stroke SaveX SaveY moveto}N/fil{fill SaveX SaveY -moveto}N/ellipse{/endangle X/startangle X/yrad X/xrad X/savematrix -matrix currentmatrix N TR xrad yrad scale 0 0 1 startangle endangle arc -savematrix setmatrix}N end - -%%EndProcSet -%%BeginProcSet: color.pro 0 0 -%! -TeXDict begin/setcmykcolor where{pop}{/setcmykcolor{dup 10 eq{pop -setrgbcolor}{1 sub 4 1 roll 3{3 index add neg dup 0 lt{pop 0}if 3 1 roll -}repeat setrgbcolor pop}ifelse}B}ifelse/TeXcolorcmyk{setcmykcolor}def -/TeXcolorrgb{setrgbcolor}def/TeXcolorgrey{setgray}def/TeXcolorgray{ -setgray}def/TeXcolorhsb{sethsbcolor}def/currentcmykcolor where{pop}{ -/currentcmykcolor{currentrgbcolor 10}B}ifelse/DC{exch dup userdict exch -known{pop pop}{X}ifelse}B/GreenYellow{0.15 0 0.69 0 setcmykcolor}DC -/Yellow{0 0 1 0 setcmykcolor}DC/Goldenrod{0 0.10 0.84 0 setcmykcolor}DC -/Dandelion{0 0.29 0.84 0 setcmykcolor}DC/Apricot{0 0.32 0.52 0 -setcmykcolor}DC/Peach{0 0.50 0.70 0 setcmykcolor}DC/Melon{0 0.46 0.50 0 -setcmykcolor}DC/YellowOrange{0 0.42 1 0 setcmykcolor}DC/Orange{0 0.61 -0.87 0 setcmykcolor}DC/BurntOrange{0 0.51 1 0 setcmykcolor}DC -/Bittersweet{0 0.75 1 0.24 setcmykcolor}DC/RedOrange{0 0.77 0.87 0 -setcmykcolor}DC/Mahogany{0 0.85 0.87 0.35 setcmykcolor}DC/Maroon{0 0.87 -0.68 0.32 setcmykcolor}DC/BrickRed{0 0.89 0.94 0.28 setcmykcolor}DC/Red{ -0 1 1 0 setcmykcolor}DC/OrangeRed{0 1 0.50 0 setcmykcolor}DC/RubineRed{ -0 1 0.13 0 setcmykcolor}DC/WildStrawberry{0 0.96 0.39 0 setcmykcolor}DC -/Salmon{0 0.53 0.38 0 setcmykcolor}DC/CarnationPink{0 0.63 0 0 -setcmykcolor}DC/Magenta{0 1 0 0 setcmykcolor}DC/VioletRed{0 0.81 0 0 -setcmykcolor}DC/Rhodamine{0 0.82 0 0 setcmykcolor}DC/Mulberry{0.34 0.90 -0 0.02 setcmykcolor}DC/RedViolet{0.07 0.90 0 0.34 setcmykcolor}DC -/Fuchsia{0.47 0.91 0 0.08 setcmykcolor}DC/Lavender{0 0.48 0 0 -setcmykcolor}DC/Thistle{0.12 0.59 0 0 setcmykcolor}DC/Orchid{0.32 0.64 0 -0 setcmykcolor}DC/DarkOrchid{0.40 0.80 0.20 0 setcmykcolor}DC/Purple{ -0.45 0.86 0 0 setcmykcolor}DC/Plum{0.50 1 0 0 setcmykcolor}DC/Violet{ -0.79 0.88 0 0 setcmykcolor}DC/RoyalPurple{0.75 0.90 0 0 setcmykcolor}DC -/BlueViolet{0.86 0.91 0 0.04 setcmykcolor}DC/Periwinkle{0.57 0.55 0 0 -setcmykcolor}DC/CadetBlue{0.62 0.57 0.23 0 setcmykcolor}DC -/CornflowerBlue{0.65 0.13 0 0 setcmykcolor}DC/MidnightBlue{0.98 0.13 0 -0.43 setcmykcolor}DC/NavyBlue{0.94 0.54 0 0 setcmykcolor}DC/RoyalBlue{1 -0.50 0 0 setcmykcolor}DC/Blue{1 1 0 0 setcmykcolor}DC/Cerulean{0.94 0.11 -0 0 setcmykcolor}DC/Cyan{1 0 0 0 setcmykcolor}DC/ProcessBlue{0.96 0 0 0 -setcmykcolor}DC/SkyBlue{0.62 0 0.12 0 setcmykcolor}DC/Turquoise{0.85 0 -0.20 0 setcmykcolor}DC/TealBlue{0.86 0 0.34 0.02 setcmykcolor}DC -/Aquamarine{0.82 0 0.30 0 setcmykcolor}DC/BlueGreen{0.85 0 0.33 0 -setcmykcolor}DC/Emerald{1 0 0.50 0 setcmykcolor}DC/JungleGreen{0.99 0 -0.52 0 setcmykcolor}DC/SeaGreen{0.69 0 0.50 0 setcmykcolor}DC/Green{1 0 -1 0 setcmykcolor}DC/ForestGreen{0.91 0 0.88 0.12 setcmykcolor}DC -/PineGreen{0.92 0 0.59 0.25 setcmykcolor}DC/LimeGreen{0.50 0 1 0 -setcmykcolor}DC/YellowGreen{0.44 0 0.74 0 setcmykcolor}DC/SpringGreen{ -0.26 0 0.76 0 setcmykcolor}DC/OliveGreen{0.64 0 0.95 0.40 setcmykcolor} -DC/RawSienna{0 0.72 1 0.45 setcmykcolor}DC/Sepia{0 0.83 1 0.70 -setcmykcolor}DC/Brown{0 0.81 1 0.60 setcmykcolor}DC/Tan{0.14 0.42 0.56 0 -setcmykcolor}DC/Gray{0 0 0 0.50 setcmykcolor}DC/Black{0 0 0 1 -setcmykcolor}DC/White{0 0 0 0 setcmykcolor}DC end - -%%EndProcSet -%%BeginFont: CMR6 -%!PS-AdobeFont-1.0: CMR6 003.002 -%%Title: CMR6 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR6. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMR6 known{/CMR6 findfont dup/UniqueID known{dup -/UniqueID get 5000789 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMR6 def -/FontBBox {-20 -250 1193 750 }readonly def -/UniqueID 5000789 def -/PaintType 0 def -/FontInfo 9 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR6.) readonly def -/FullName (CMR6) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle 0 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 52 /four put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3DD325E55798292D7BD972BD75FA -0E079529AF9C82DF72F64195C9C210DCE34528F540DA1FFD7BEBB9B40787BA93 -51BBFB7CFC5F9152D1E5BB0AD8D016C6CFA4EB41B3C51D091C2D5440E67CFD71 -7C56816B03B901BF4A25A07175380E50A213F877C44778B3C5AADBCC86D6E551 -E6AF364B0BFCAAD22D8D558C5C81A7D425A1629DD5182206742D1D082A12F078 -0FD4F5F6D3129FCFFF1F4A912B0A7DEC8D33A57B5AE0328EF9D57ADDAC543273 -C01924195A181D03F5054A93B71E5065F8D92FE23794D2DAE339BA29C1C6F656 -1DEF13780383DAE38A868377CC7D396B2A05F341AEE0F8BD0A0191F51AD11A4D -2E927B848A1EF2BA15CFBE57A51E3AF07598275195C9613041F71C1AF39E61F9 -EFD5F6512FBDA76E29DE6B508F62F5CF9F73F5288DF1C7B0B82C92D3B6358BAD -EC3CA20BDE55DAA7CC58004AA86B6CBF8C410D8287E88BF20588A39309C2B703 -CED322F030AA6069869064486CA651DA054FF3F5E56534CA358B0829A6B954D8 -9103436E6B06DAD1658BD4A95AB41343B01F5866FC87C4EDFC71F1477C98F8E1 -1DCF27EF743FF90BF918AB8C4E5AC35841E2F745480E5EDE1C1DEAFAD8D0018D -2C1F1CFCAD9F6609859DEDFD1648A6CD23D8ABB80747F94899F17C8F3E6CA55A -E176F19CDFDAA0D7C920B3A72051A4745560AC81978C92459EEE5AFE85AB247A -32981139CBE352B248F4BE5F73503A084A3E91F05328EE521D9669E44E202584 -5407E7846F9FEE3D54EA18FFB144BF2D6803BF65AE402034B3CDBB40DD24217A -3CE0E95E2717CACD603A958187C42B3558AA38D6B6390EEEDD396F96E6041FCF -6F8888221AFA87EAD79F46E0E32CAED91E6C8500879AB6E580C581E8C8CE9B68 -2BB5EFE2604E8DCB2432D39D75EE556969F1B2FBDF6A4BC72D106AA7CF22C268 -464027898B311613E06E1584707F262F71D9F49D2149306A88E02BC60BBD6BDB -EF41D90F19197BA9AEF32B5E63D5B9FF41B5602F9F786E76621DA54D574981AB -87A72081EA05D6C6BA940EFEBD0904EA4E77BBCE17E20B42E1722617E0F6EF32 -F1ACDE9D758594E9C81049CCC10605A27C2A06872FBA9F159CB155609B496ADA -4886F478E44029B5E620DE8319E257697E93E1CDFD27D560E2E4D34507020E2C -D9FF06BFA14E056D81DF701FAC3ACE4BE6C098AE116E079F0044391EC1661F6E -7A93B9320BD7F91E8FD2E8EB3F5CAE997D5CDD35107A1D35302260D1499B8B65 -39625B7925F97D917B66BAFEEA992873F07220714F192839948CEA080BDB9A03 -77B9DD032273DDB5629CB28B5D8797EDEFDBC601823E038384C90C79012A7D96 -8F27784DA15BACE21501C26E3AFA5DCCE81B52B0ABAF71A35D33103EA86F2415 -A39A830D559C5C6CA7423945BD3DFA942B20A06D7A8D8671F9831DBB52907AB4 -4E54776D29C6085CD9970B6DD21DD3EA8EB09C49CBEC6CDCEEB0BBB1B8827109 -3BDE64DDA024D67F098D6C1998506DDFF7907ABAADA1C39C759C850E0C6F8E89 -A392D1C9329ACFFA92D361218D75E115F70A47C53B73B356D703E9C499AAD098 -AA9C8119EE9E9708A9EA3049E976FA19AD04210D5F6092C7903FD155113F3A3F -269B746560F70970AC9F8D09956E0E84DACE4112C4E7C7F6B3F0B63D26EFF95E -2B2E9699D16BC8AFC4AD9113AA3A974C9E82E877288CF71E9169D2DCC61AAAA6 -C536E5604EF0716F6487292BBB677518504B52C63822BED3BD5FD14EB41EE6A8 -AD4B6CF90D39F98E12A765B645CBA3E8552FB9A986390212CE119E7C3DD675AC -17BD006144BEC534DA2A860188619F17589008409C5A309CB83FBA70F6446B6E -2B56991B6A03B1DE10C621591CEE45BECA27C54BC8B4F1754A9E8F660812710E -117850E1BB6FD89BB13F8CE391C43DA89EA67E9C3E7A4697790EA26B0E4E2E80 -DCA508873A7AFFC11B8C02EF86C2316E8D8B6BCEA37F81A3A87546705F070C3B -9D4D28C366CEBC1EE485B8E2357DBE46E86C87B9939DADA60888AA9F1B92FECC -CC1C198DDB594BB70A8FE690ECAC21A414BAC89BF019F34D2A130F485EAE35B7 -2A10C67EA3A48A4D9734759CC93AD85C6A570500AE5AC9973FC76EFA06BF5DDC -26E20E28D16B50957EE01AF2653F8D860817967AA5A9BF9BF7ABCDA710E9F34F -4F0EBCC32B3C9C2971F6225D2DAA6A451366B83F32B2ACB83E746D365B2DE38D -C1AB7447FE7B37F9630E410E5D8F0ECE74DF46C538947B3A167AD9F3E4A7EB3D -60F5425AE75AC3A27D39311DA35696C3DC7282AF1532E7AECE63D13DDA0296A2 -01487185FDF1875AEF55A36C17D6A8DD329279D229259463A2F05CB7A874374B -E2320E1F6CFECB9C1CE62FF468C29751ACD9754AF1EABE8E7696C2888914416E -235B6766F20FFBEFF285277B639A51EA2F2E30D207BC891B00F0436008F980E0 -9EEE7FB375BB069B9E0BA11DA951A99D8E60B4F920A0495C247FA7DE904765AB -DB5C3B2D634757E43EDD6FAA4DB3C67F82D6853E1170F0B2D8CE496DD4E72B0D -28277BEF172F1402959F64527F9B640619F04416DDB9D05FB2ACD019CB9C119E -E544D24EA6DAC5C69785394EA50E6EC9AAA9E14B904EAF29A733C6D7942B63F4 -85729686742F26DEF78DF0DA1CA7CEFBB684F4CAD99021A3B3D1FE03B9C5A4B1 -BD04CAC89BB91B11952A2B17A61789BEE0C54B46C03FE9A1AE73D17CF94BA30A -237C29D414C3BCE8E3E2DDF83C0BD59DCB66C4D2C3DE73DA8378F3C6C8035D28 -7464399857E57651A53E9C4AA68DFCA91B2376CF98AC5290FDB9BDAD9EF1604E -9B0A70EDDA1E564B6D2456E7BC722454ACA8C4950FDD44B6EB9AD01169A9F845 -B06A0DDB7897C847A5B1F42258AECF3807AE936C8F52C3A7A0A85D68160AE442 -FE81543DA6702D76AB6E8701F80DFC1D87C961E350D0E52AB2A298B9E5908600 -7E14D2A87309043CBF13F69AEAAB1BC239DEA88EB5176624F6046664B1D2691F -FBB2071D3706F97DCCA355A6DCC4D09FD35DC078FBAAF672FFDECEC61050A120 -10B5A96629041303FD01ACCC7686165DED6AA712FF8E5E85DE33C4E7D877C49C -6C469A90410BAF60BE65ECD91CDC2EE7AC0CA8BA7B53865F26092BFCAA0BCA77 -B80DC51DAD09C93C8DD8E43502B4B68F3D5918C3492196292447732BA90F5AB4 -9F5E1D634ADE1CCAAD028DE5EBA9535F6FC5908DBD2D643E0A7E059C8C386FDC -E72659C0033F535C0D7F6B98D0335552D0BF3C6E302B672A5EAADFCEF81912E3 -8F54E6FB7EC2B325125159713D0AC50DEE3673B9B148643727E94C80971A2E73 -5E1E13237BE69C84FC039DCE02ECE2668AFD047F21A61BB94A9F498C9FE5CDEA -B274B40728B6F6CA9B6C15BAAF92F465B0D7311B46545CBA90D874839443CCB9 -3110F052EB247B24B45A3D2FA6FBC7EB2A4BEC2A5892914B3C5EA3F4F9B9DCBF -6F932D95700E045B49E4B1F2C9D2A42CF39CA2F5A2654E6E8E6E92473D28AACD -5E35C6705EA728F704F5996D286BED433F976AB7E018621A577AED7C0AC0A84E -A032FE1869F603E6F20386E3A190A30A21EA886249ECF8CDDE2C33D73BA8647A -3DCA7A8DD9E8EC8D9A415D126BA38B6771C489DFC419303EE9C1B83FBFB3A0B8 -97D64F30E4BCBEC24DF603FF3BF541E00D5804B6B6543D3D2B661CC551D497A9 -9DFFF535AF424B2F3150BB39AAE8CDB306AAD37767BA10BADB031DC2FAB16955 -EE78342CCC0E8B5976BF98F215461A8C6F63EBE6E2F1A1104662DDE53388CB51 -8B44F3534853B8095F3B746A2459C2EF800FB1EF7F235EBAA9731E3AB3BE4369 -1D3636E3ADD5BDF0C34FA80E90D8A1DDE770943FD196E0A7C5F1FAF6970B34C6 -4673AACA6B2B5C12B9608521AE736C1F4B97209B063D991300ED5AF3D7F27E76 -68E0B858FD8BFF86581E2B9548C691E3E5D9EC4D39C9715CDE86C7D22223CCEB -8A38C776A30AF14912390A7546DBECECD7A687D4F08646E57A12C80DCA022B7A -33399761A50B8E0ABEFA1163EDEC3DFB5DA3248792EEEDD894872D4E6814B4C3 -548BAFCDE0CABBCDB97EC6D1BA47F2E77CC1389BF19D73661749AC33F46A618E -A665A85776545BF9662F2179D7BFD604FA8EF4700591AF3AEC647E27B24B76F3 -133F9198DC15C1AED830E737909E43EB91C334C44BA35810007A3888E33F5DA5 -B3B2C35481C648AFE630CC3E08F77744E401B2934E407D1EC17ECE737606B076 -F8DE8EF3344F57495EF49D11580D6FB28AE0B1422521B320843B13467501CAE2 -3DB93D7BB779F73B6AA30050DA74BDBC3F8DBB30F32EAFD07734A151BB2BAED5 -C9B1F790059339B64BB4146470F30928C9A49AE88906BD6FDB7431A4B50809CE -0F67ABA01CDCC2320B0B097187B9299E3D80CDD7BB5DD5BFA7B28D924C5633C5 -45A23CCEE097C41C3759C1FA8DBA0DD95034BCA89BD23FAC18C70093F40FF2F8 -0FAC5DD4835F2DFD40540E9A9E9FD951A8AF2CB766597DE00147B163BACFB7E6 -EFDA4DED594F1C746D8B46A1145E0E4058F5917B3F21E9BEBDE745EE72CDCA64 -FB31EF7A2E55265F32559480E2B6726D3DE26FFC97EB4E3160F117E890C4B2E5 -8DF310E6A728ABA85540F571C024F8DD58E1D7827FE97CED5EB31547EBC36415 -02B8C0E10B7E37D816F01D56A364B8552CBFAAA95BC4BDDCFDE91CE0EF005B4B -7AB56FFB47A093AEDF0DE1EA48FC8103CA3CA1470864D2693E360006D05668A8 -AA422CCCED20DCEEBEA5CE0DA1EFB00FB93E922B18124FA11A88D0F6E0F719DA -57603DD5DA42E1C56C2FD9E5415AA199D4F334C151C1157E75C107FBBFCEB706 -5F4EA47A29B54ED8CAEB8DDA2F53D2A703B95487619780A52DA1270011648A28 -AA64338E04AA5B92C1EDF3D8DA34FA6D227A0325EA6F22E9B38B6338C657BB21 -CD4C582DC04010330F62923F817E4EDC6E5C0E6500F2A975A8A95BAA30C4A134 -BB31B5AC45A2E7F6E9CDFC810D41344C4F606049445F8E93D74271C1E29DF7CB -5459593BA28AECF64D903D3E4D77CF5C04B06DE44A41EE4D9FC769854503AC85 -69E4A5106E84016DE3D59865D4AB30BD6C9E45C45DCB5408421CC50CD6179C85 -34E55CC70FBD8FEFE9F1D5160664981716E3BC7F24B6F54E0323D9BC4B692971 -24419EE62D8B0BA726E2B4294A9A76F328B8101DA29E78BD5C4AC383350FE196 -4D42DB1653637D19530124858950C22F1E9CF5BC07D46B7A58CDE19CC88DCD2E -7FE4EEFD8AA6047E919823C8CAB2EF5274F45E861E6508CC11A8AA90AED2403A -B2BF1315C2157B3B50A3685205D93E40906EEE9DE5985405974BCE0B84BB37DB -080A45C5237B269B93C0A7CF294A18B45464A41F604C494CBEF829A381155CFD -71CEEA54CC39EEDB6DF58A9896246B09F95DC6BC40BA6916AAB5ED3D24F66154 -3662F8978FC63DA9280FF7ADB09EA5BA79D3B66E0C88BEC1EDD78DA93839073A -A4D7B0E627000C4ABA76C47CCFEE92E319315333A5584A951E34C55412049C4A -A5569FE65A006F77B416E0530AB6A8E7AD6C72340AD4CE25937158FABB2153EA -281E1D840206F5DA38E00815E9081F81DAB9FAA8F4DAB305867AC84735DB4F52 -A36129929BD2084A8EA37BB6889695204BF7290B68D5E722540BF8A276F8BB6D -451D582EE59D2FF03F6B97DDE05FA00C3D375D2D0AAC8FE298F85CC067B15481 -48D70B6A0354C705715B891915FE8EA45244677B9FCE81E72D66177E309F3F83 -F744B9EA9E55C3B30DEC6E5E03B3988FD526A82A5E8E1DC79127FC62B2FA7949 -B3AD3148868DE22BD4B5708E32CEAAE6ADEED1F463EAB9692411E18F8D6BF391 -126B2700B4CF3B59D02E3F8795130C96285A63FCD1E0F647ACB1D35E9C58BD01 -1DD06BABA00CA4343BEBEDBE677E053E9732B33A7495DF51782A07DA07F5646C -770C957AD915CC70BA8E08BE7A1F4E6BA5BB9C603E38F6FB0A2578471C4D02F4 -283069856D926B9076EC73AA39CEB0A061AFF1575C7093FDAC9F89C3DC06EA45 -06F3C2A3BC9FF21128B10CB758DF0F099B459A5264A8C24C098110D2BA1A8532 -8FAE146A91BA7D033F591AB1A94B8A6FE0FFB610F698D216D58B4EF6C87B1524 -8037CBB7E23D8550A620341C6625A1A2ECE7CEE2598D66277F857231A36155E3 -984F147783E9B93975AC38A29F2FBCF704C8A04AD84C3E04A12D2321FA56811A -5B6744813CCC187968C5C26BB8D3E6615A912FA5369C01CCF8C0DB790593B190 -1A90CFB5339B8771F325C5FC448D36C7312B11A15A8635BAB59CF3CAD176131E -026F6E141B2619EF7F3048750CC9291397F141591EEC8B612D6656DD34DB54D6 -DBDD303CED74BE76664E7DC86FCFEEF2001C9DBA56418FB61F589566A47AF36E -C94671C5E8939AF9F4D53C0DE7142B7B63C86AAFA65877EBBB48C64589AFB2CB -1280AC099FC48058855CBDEB6C2D2A0D092267996591DC3B5EC8252984E9B27D -2E9EDE8CD8303F0905DBFCAE497DE1B755B924452CDE11CF4F20893DD6FF7251 -427F520FE00580DAF1703FD968E0F8ECCDE618E1EA5820EE6CFED97C78864EF6 -26FAFEEE194A268F24249D44829AA360D731C34DC285501E966A959180718F72 -6330E4CC060588A2F65AE64A720DCAA818D49D4440F5D0B6C1F6C3A107E12445 -F1BED2D3FCBB87A9597F01C7332AA79143564056219BF87D4B907A04F77621AD -054935E883B2B137D3D1C4BC792E8335CA08B6D83227F35736C41312A0BB077A -60FC6488C5E02FD51A10AC113D4EF70038C649C1677B2204A77F2ECBE9B3C341 -F4126BECBCA61E3F3801F9188A3775924A62D30FB096B440286FA655EBA00A74 -9A4162904BEA07CE68EE76018346DEEE20839C9A2FF71179B58E1D4AB30856B5 -F5D97295A097174467010B15D733AAC5813CAA633746B430B1AAF9F997FDAAFD -436844D1A56B8E25A89D2CC4BA6EE7ABD167818FD4F6C747E07B262C99EE2C35 -323F0B471586CA50F54C6381B052B15B0C58C19DEA82C0CA29F00400B727419B -2379979CDCBFA966AD513FA903160C571C3BF1BA239540B11EF2371A3880837C -6D6CA2F374280CFA1586427AE975A2AEC34244874E4D441DBAC6CD1828841C91 -069AA87FAE849C5DC7C9EC1B9876E59F3CCDF8BB23D939F5348D7486934BFB02 -CC5A22541ED352616830A510DE7732E5D8F7E785BBD31C2BC9D348CE5632654D -2C1740F89D57FB2AA1FD8FA3304EA03F757BB8F498ED98E48485722E78D97B12 -A05F3A28438084D1CF90AC4C3FFCD7B3365941C45E1E02CB13CA1E99F7FA1D00 -1C9D489D5C95F019AB4CE89FA3B6604473DBD2CE8E278969E0A0FCBCE68C23F6 -9381882443D3FC16966555FC222F3FC4B1207522201AB7A15A7A6F22CDC9D392 -360BF4C95DAD35770E0AC7E5EFF015F2C74ED7391F40EC94B8D1C163B5DEE5B3 -911A20C2625AD3B24BD94D2A42405E655DA47D3F94F882CA2F479437B4E0BE71 -8AFA4482C6FB270F8D05B4599A01403DAAA90C01DF3AA7C2BC7E66AB6AA833AD -FB6E5EE13E45CC7CE7E200FBFE639F9CFFF5D08512C02764997FD28368969BFB -0876F236EF6189BE73AD827332DF1B2EADEAC0ED3B939CE5BC3CEC78975FC636 -44FCBC2CCF4396AC7343EC62E0E4F3DFFA2B880BF31D93ADFE201BE9CCEC8BA5 -0B9B919E05B851E0909968DA259EECC6AA0743F25247978CC09C28C4F878E29A -5070E4023BCE95FE0ACCCC01D0EE219FA8344E8F6D7D4347563BF8AC030B9097 -41F24D4BC9494915A82EE9FD37FBB6A46BF077B728FB569B1258CEA5F51F36BE -4F4D0F890D782E44748CA3FE8C8A515998371D9C7D2311F192B4B7E7C68FC6EE -3F7136714C282A2570FE591F247A08319CE9EF1E43274E4E57166E31A2ECA506 -85350DA31AA4C33C9687F5210BA225EA1007C444FBFA2126769767E47A967884 -9F68589E4BAA9ED32A7A466DE35554C132810C68ABDAE536D9D884352F28EA02 -8A555D2CE11F30598F44A65E2D86B43ECCBDEED9E4E5B5B7DCDA20EAA09D9FF7 -422FC91F2201431A9E8FC624FF44D26C0100183D77BC7E6B1A6CFBD3FA8BABC1 -AE4CB0FD382E26BE0A83169B46D91429DCB746A0326243E212F802AF6A56C709 -6E70C6C7CA3775C382F911F6DF3D26A9F9F39C6A49A61FB0FDFD443ADEB01F74 -1254040BC520FE9C85FDDA97E17CACFC5044F5F1230BD2FC6EAD365F820FE2A7 -FCCF6A3DF35225F2AE6CECD9C86A349CF9BDE665D65BAA0BD5A95558B6C11B3D -8AB5462F0EAF3436F916872A436C33A6ED03F11AB36CF3C78C93C9B4E8BFCDD2 -BE73CDAC190BA0F6E3440048B84C3A79D28DE967A3FBD0C1508E374E0B00AD1C -4B4169580C8A5C82F8FDC5497254271BDF9597E7DE407379BA8F06132B3F3C2D -4C96D6E6F6CFAF755896045E4EC2CC111F3E3D6BC717721050E578F77AFBB88D -84C76D11C1A179ED898A5B41484CA2F5F3E422CBCC1990187415E7B0DC61A8CA -5A60BA75A429690D9AC1D9EDA88AB703746609C4561943BC466CA906513E632F -C43A8FE8 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMMI8 -%!PS-AdobeFont-1.0: CMMI8 003.002 -%%Title: CMMI8 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI8. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMMI8 known{/CMMI8 findfont dup/UniqueID known{dup -/UniqueID get 5087383 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMMI8 def -/FontBBox {-24 -250 1110 750 }readonly def -/UniqueID 5087383 def -/PaintType 0 def -/FontInfo 10 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMMI8.) readonly def -/FullName (CMMI8) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle -14.04 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -/ascent 750 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 68 /D put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3C05EF98F858322DCEA45E0874C5 -45D25FE192539D9CDA4BAA46D9C431465E6ABF4E4271F89EDED7F37BE4B31FB4 -7934F62D1F46E8671F6290D6FFF601D4937BF71C22D60FB800A15796421E3AA7 -72C500501D8B10C0093F6467C553250F7C27B2C3D893772614A846374A85BC4E -BEC0B0A89C4C161C3956ECE25274B962C854E535F418279FE26D8F83E38C5C89 -974E9A224B3CBEF90A9277AF10E0C7CAC8DC11C41DC18B814A7682E5F0248674 -11453BC81C443407AF41AF8A831A85A700CFC65E2181BCBFBA9B440A6DD72BF8 -97084C906B05FAD969086ED21AF0AA1471613182B26117D7494DD9F9270EF3ED -8DA4D957225F75D060237B6DAAD5A0AE3E702B3D1C437835B93B8AF1F9E7D966 -E739CF3AD5E256F90286A34069E5BB4122F94F18F3485658D0D25B938522A879 -8215A417CA2CBD20F71C5C5FCDE21EEA7BB27876D93BA667868A419287FE59BC -F538980597DBBA743DBBDBEBC61E3286DA7977833DC8BFC5E52FF5DF5EFD9A92 -D070EB769E31E760A50FDE012DC0057835E8B9B046FCC83F1A0C40326AFB4E3A -0CC3BFA35FCC64E32854F32EB7DF10A19F95830136BBB8139DE1663B7FD790CE -464EA431AC109FCA0E03F3E0D355FAE20AC8774D6B1CE233C27680C77DDA7356 -560A27C75993E8C980CD1E3B0683F7E8A05119B3AD567DAB4851B66E418687B7 -F9B21B3BEF607918D5973421B68E65DFD8B6C8DFDCF1CAFE2637D365148EBCE3 -FA4CC00052A2A522205EA3AE3461CEE02042E1A3F11467CB6C8C849B200CCE3D -0BC188EC7B934CBBC0AE2BF5DEA228181DBF0F774119F313516E7D97FF532621 -9278F856C166CA6547504F34991D588A0631A5CD06363F3FEE9FA0772C783447 -ECD0A200929CB58EBFB6B72008E4082B5D14AA560C24915B9463A92F38237886 -C35CBB2D4DD6D0CA8C1D4EC46093041C6181C2F6586EE3E7D4E647A107B6DB23 -DAD9AB5A0C2905455FE58075EFF6B48597078BFCCDD84812B98986F34987CE49 -7EFB19814F2A58B0233A59331F6F8EB66401F04EE7B1ECAD9BC90A2BCEBE213D -DDDB1F75C83609ED6A669A0CED58B2E269E76ECF73616D94F13CF827C9BF354A -E82202988DCFE856786B8AE569AFF3105B55C72C58D310FFC0E10B2ABAC8DB06 -40D5F72E54770E9DED1AF4616008595B8481E3D9AF4191CC9A5BFD9DDD01C9F1 -FE7165D21E488DB40879E863D470CB31CA06E5B5F1F8C3CCE04B697CEB0F3557 -ECAA358D2EC2B370519CE06138FA702314BA01F1F33881825EAE1230098BB3C9 -59666983275CA4E8D9DB34979F86535577E79393A72F84B0F768FE8C92692907 -15E9FE9894E98A0EBEA490CBC8C7E5A9F3E43B24C2C5A4BCD71DAAD3CC0B8B82 -AC13933543E295C163F61C9FD18371CB514493F90BF7FB460C029B8DD2E2BF05 -FD66B451DF277864DE1EE42100BF29E01A50258C2758F3EDE211BB3457B8243C -20BE72983FD6FA2581C5A953D94381E32E80D6D6095F2E93A5455C101BA71E8C -E560D4694E4C167EFA25FB1E9D214AEA745CE34CAA5468FAEF8F6BDB6C6BE8F4 -3D58836C26A2392E4C4DECE284A90DDB3858A16D6135FED655A600929DE71605 -6CA32F6851A2A6F71A9DF3D5D657593BB729CBCA2F4B059365B7263DC08AB211 -9C547096E6427F6AA53CB2EB87DF0AFE2ABCDBD15D7EF228D3396413B83C6B4A -79E41F9BA55A2688F62A10472675E5658F151F9FD6634EC94EC0682C17448024 -CC1633077C07A93E4DA8749D974FB8F4332B5DECF97D749C10DB60D4C90ACBFA -E65AE928C88BAE19234690EEABDB30BEDCEF2660D7464D5071058C30C572A2BC -7DEE5384BD7614A4BEC4C84E18CF7EC81C810256E8CE6520466C033E2A36D3D3 -5D6074B3857415011D8D9D49A474D994571CDBB89AF92BEA879BEBAF67663F5C -17ACAE809C2231EDD0A76641BA52FA7B19A2798D54A4A9B62C42F9905851229F -2CEE0191C8AA5AC12BB0CE9E5E3E862683AB57DBB4AAD6AC0FA8BA4F408D41E0 -755F72B82B7C18EC6B13995BF7AFD66AF4BA0EA7523DA8B75EE751744EBA9CA4 -4E8BC1FB37734503A5B24FB9F2C2D07A47CFC477F02413D55BD7DC180B0344E8 -50248801FA6BE26C97F397797F5F9DF762967E7CD92CCB8B2E587C92177619A4 -BF8046CBC72C6E69DC78B8CB6B7381A290080EF59F5B9F29C1167B261C932E9D -010D2D14BB425D157F22BC0305770AECC5BC80000F8CCFB9930255A68F299ED9 -D3B5B83A2CC00E3305EB281E1A7054734661B175C6CA0AF168790985F173DF03 -A8693B677BAFE23C3CF833FF6463B136FC370E4F0C29E322DBEF637F62C33CD9 -B0A8338FD67EC628E3BF2FCBF7CF0347D5CBA1DBE6DE878DD670176B85F69EF2 -3C5CCA1BD2B8A385F113EF1CE522F5A6AE053B9C1E39408C9459DE3E7FE2C4ED -77F026B0081BB80D40185458139C16333EA27F43EF1204BFBF80BC5301B2A3AD -B10F7EFBB4F5B7E04DA1167F68BB6D4049440B0F57385FF0A95E72760C6A12F8 -1335BB31CB74081FBAA319180DC00113CF50CC5A41D2E751E055DA1429CD75BB -0060C21CED634FDA106C49A12B356129D010E29F2919301AA7F80222AF3905ED -672FF85C9897A70241E8DDB9A53034B6BB44E140D9E739848E7A782F24B98AC8 -00DA09EBE4532787E5CF3ED815705F659D8E52DC2C2D4949374A3BF192BEEB99 -1D9A90A4F3250BF8A1FD40D91F5B34AF2CC561FD02FED712500B24330D87DA9E -4AA46B6E34BCB40B1F73A1DDE07E002B9478E9651D2BF85E67585B6ED812BE03 -A594874A235B1C1840C4BF4BA6D863583D8C12DB49EF7F8CC24DCBB6B21FBCA9 -378F3E2DC406291AB324571F76E0805DF8826090F0E8B50599CA58D124653D16 -16C782B01C91A6F3DA6346482E3163D28D95EA49866360147296838A3FD0CC53 -920F91D895F839CB61FFD2FBA296CA4C6304EEE579782AE5FD33D0FA652BA7E2 -CEC7C01DD0D3E0D56E6177EE5F609A396F7FC8EADABB465DBA7F384E215C4DCB -E64F807A50A461545107F9C3F7D7CC7D33E6EBD6D9228B1DCBFEF160703E6129 -0DCED8D45DD54E2A36E698A616E7906A50901E453BDB2A363EB77144E9EA6F2B -6BD927495EB0EBA5755165707CCFBF8759CE5856881117C7F3EF6D494EDDA7EF -E499BCA56C86467AC573DA9C2724FCC74BEB331E736FB093DCB67DAD42296655 -415D110F2729BD1D55E5C9CCE2E724116F45FB2E66AE0F790258851A5C808762 -68B8A110BD326F8D3EC45004E7CC08DA42F6CB80A6B6E7C286F139534A275BCD -2F812993DD9C9A1AEB5E7E4BDB4805DFF3A7030263AB060C9B74F0C25C5B9005 -965284884450CC2815DF28D5F9B0496DC7A3AA85E1E42741E1538797175C28D9 -FD904699C771FB066397FFDEE8E8DD1ABBDF67E6BFEF95BB700A7C1BA91354C5 -42EC3864F6E19B379E79A1CC3C786C0DA146C6B0B8E507ED58DBB1F12F613A98 -0E1F8967991427A22ED323901C4B83336CD343212131E8B59C2F5D232702ACC5 -7891BFD4EBA5D0FA35AEF9F3520CA82D121BF6885BBDAF15248A9E4649ADB94D -0735CC4D14E1D7275427D00C8E709579612F7F74DB6FC218C10C278CC63E2AE2 -37EC996B10C0229D687F0DB5E38A8C4DAFB3DD8A9E7ED37186FEFC97790A1EA6 -636A88FA9FB4D282234BAAD301A1F3AD33F252C5EEC49410562FC52809CEC466 -A0F6D148E9AF19D6DA2337C8283FBFF6005C37AAEB0B7F7217A8DC6F949B9984 -72DEF163E4D5ECE4288404448C96A7FF0AC76F732D50AD63A1D286C9180E80E7 -C218B1F48E3034FCABA6BF262CEECC284AC29E9F3CA1CFC1639A681ED66C1FBA -666F073D45C84A286E05FF809D4764FE819B6A330E73695CCF2F448B4D4EB4B3 -F63E94EC289807A2F9A1159CF328C002B467B19D6E9454CCE36FC19E0A214190 -B251818DD456EF658B0398E275514B72D9C1DA5F806EABCF1DD56BC025D69FC8 -A0C2FAAC1892B64D2AF79EA2F57F103CA623E440307600D50E783FAA998EBD40 -51D23A0CEFF8D8649B48B982DC38D613F882DCCAE5F51233A641B3CFD783F830 -D984F116DEA3ED8F0D3369AE629A006BAD4523F8E3C7C6B39A6C972508B67AE9 -32613F28CCFFC4BBC86CF31A0C25C786554F7A1F3DE97F5CFD1A941F775067A4 -784385E2D02EE1FF886701B1E87D966D3F500E15591A5012E645837FE2DBE3E6 -A3D375C6CA0ADBF96B33EC3FCFFFD888D7344B31D40427B8A8BED0FEC6FBE038 -1FB5F0714C4B5A0E607E215B5B7F76ACF0FEAA4C9790EB7E13C0E3933B7C63FE -5B934EA34F4B741C3667BF1735C685CECA63507E6FB9EB06AA010311F12AC1AB -4CE3FE8D1EA1EDB3C700BEBA516FC71D740B1CA1A60D4578003973CC3EE21DB1 -58FB1CF7E2EAEB2A4A6C742EBC3575EE6378531C6EFA6E6986E68B8E25CEEA67 -A59623FC1ED2ADDA9D72DBA627D179E47DC7F5551E07EA4D54ADB6CC8109D340 -7279F288E552EFD79C17DA3431E53EED66D16F24BF86468C2FE7EFF421560500 -12FB048D6CE2F370BE4E560F8B4AA12362ACFEBC839351C1D5100C625B14CFDC -747B66082D4AD5474A63EA0054E9C3E6295AF6B133348487B0471395857F4B73 -4BF8337DCE2FE2E1A4EAD7E7BEDC822BDDCE42B79B308C11897C98E3ADE253CD -09CEEEC0CB1DB66AB072E36E1E04911F40B535B0FD85982C21B8A587D65C38D2 -DBC5A07A0A26DFFF7460F10781069490AC1B611CF7312A14B4AA6005A4582C5D -336BCC30EB47749193BE8D457A43F54204B070DF5AC2057B6437E23705C7FE8F -7BB150560F7044BE3E48EFDDA539FEEFB0D2A7856CD4E405FCE0F5EB190D91AE -578E2EDEB9ECA218573BB1A8EF116043A27DD17A4047BCCC7C5F3C563A910778 -45ABCA32C7347E6180ACC86F9D665FF025DD8AF514FC3724B5C3510F3C37E0AC -5101D1667C6ED4E8F37F06CC2BDF66CB5A9FB7C52CAD26344FD1557571336A1E -1E340EBA149B4EB99016D1A411FB874914AAB2A415CE3F5FDFBBF5AFD7959B9F -CB127BDC68D2A2F3F07FF3D4FF32046C0371CD2E68A6471E46B08413FC3C7A80 -A107EEE57979DB387B2206D2810DB310B7232B2DAA385256C8A58964B512003F -A0C24ED21809E2576229627278118107B9C32345C1EE8C0CFB452CA362379369 -31320DEB5371037AFAD093B61E8AC7A6DCF7D49C7F8EC32DC0ECEAFD7E892810 -039570D2956289B15E078C2545911BF535F72F7DAC619BBDEEFA855BBAA81704 -18F7D351B0936357085A32157AD8E27438A58B2397D69264E748B0B8D01B33F4 -D04DC59326A7DED39E247A1C1A1AE49382BDBDE9478A1CB48F88BDF14A268B40 -A40B9FBFC4C87FD3DF1EB2464C3C14E36CA41E09EE0A9B75FEB0769F9ECEB1BA -EBF73B818427FACDBC33BB95B9654F31C59A766E931C698A8608F15290FCDBD3 -5C535D9036A19CB7B55BF54E96F9B2206DC71624E2E55FE632FDFDEC8757AEA3 -1D83D190ABED5E7A7AAE2F41FCEBC7C18626BF58F9E9F02FBAE0C8AA85E9DB21 -A3D8907522DCBAE4923C6A2A09FD2F08FE32215C544AB577B337D929E625E704 -E041C2381AFCFEA37F3133B6CA20093EFD457C772E428325E56C9CBCC447EF9A -05A8C3F28017DD4FFACC51B38E4896C5044266EAB4EB7C13FE855E790DCF8A17 -B61B1D30DD866BC57397EF6297C4891451FD6A5C6AD6D7446F58F56A68650908 -224D9F4C31C6906FD29BB51DC947465B808438E6260325752808963C808A4AAD -60422ADD62CAF315F6AE92FACEC55D5B682089AC0BC051CE1E2C06A3874736CF -0DB5F7C8F178479E4F11665402781D80397C75456F5CDF0A4F382A19EC6AD64F -71A9275264800E178F212269154DD8352167C57EBC0A38BE794AAD1601C8E541 -7E1AB8E969A76E1EB4092644958FEA2AD29635E70C4DFE2EB0D9B3E1644FAAD9 -B27AD5466EFAC724718962B62E7B8C32F412B69DFFEB792587D571FB5C591D95 -4CD441662CD1B07595E245FA537FA9EB5A20A97E5C9251EED22C9961B48B25ED -85BB7524F635F9CBA3714C6D60A6BF920C45A64F4C366C1F9D22F53084997C9A -EFE2D79FBE3347111F5093E271DB7E3770B35D253DAF93653F6A23FA145AD775 -AF11E188EA0428137D9A14542E3EDA6F7B2E5AA86C9F3D3649A85ED2F020C696 -01A339FE6D7E42BC548C8F92A4E3809C67A986C99418772403D16D0E8662595A -1F37563671D6DA0F36CAC99DAA8FEA215DF7D45E61314915A30A22FCA86A50D5 -2FF2EF08E240F9FAC030D92BDFBE40F1972DF413E6B452024CD11792BFDAA2D7 -C82716528AD4B3D637BB43E748336DCC86A952BE96F1EA423E31340FCACDC1EB -02EE932F58734AF3A5B2279361B63F1D824EE3BA9F4D2EC7B33A300A1CE8CA43 -24616444176DB8099D85AC68329B1F85E4B5B16F3B396FE2AE7774F3065D0203 -AA140DC128D6F935C44733EF585F89E8639A2096A225A2E5E49D447D8AF9FD44 -CF6C1BAD5C5E5262AECC5543EC8199B00B72BE32A0F110F64A1D0D5CCEF38FD1 -155D6198E9A343702F8ECF5052333272CAC2FE016681E12745CBE14E1065EFD5 -407DA3686080989F6F6D650A9F1EB3A813B070C30C0D3B4A1E9C206E2E4DFD51 -D8DCBE9AECF956640A2E79F1B4FD0EB8E0449AE1B8FFEBC43275743B4D7F6605 -0673B61EB3189E74F51F3780A91E6A5C6464C8CF7D563D9958D46F39B1A12087 -6BBD4898BA9ABA468AE1F24115891FD3CBC2195F75958E26DF8BF1B93F7B521A -C12112237AB23A8E5A7B7D0DC4C53692B35F3CD813EB463C0BD3A6486B0476C6 -3B36DA71FE512E5745D097FD4AF5D056E434DEE2AF926B2EE79F7FC4FEFD4130 -BB4B4BE01E5C720325A4884507CB51CBA4FFB615B78A4182444F0ECBE4161A58 -E86FE1DA2E39C2BECBCF1F1D7B9B776A26078FC252128FA8108CB83F673CFD37 -CCDA493234FB93E1550EF8D2DC049ED95B00A8A57834B024B277D3DF062E748C -B61F183F2D72AD075474F8165528CE75E4F40B38B0FAAE45751C1907F8D31619 -E88EAB02EEED415F3EE3BC5BECC6AF565D34E0BA2958FF337A2B06012DD1858E -C53DE52C108BD5AAB76C882198C72CDCC958D68EA8FD26F76F04EC1A08B2AC3F -A6D0E8724D2656555DBC0C8C42A3E22ACA7E1BC8E9F897D9AB692E0FB9EC32EC -59E31CCA4516A3C3BFD5411BAC3DEDCE374D48681CE7D67DEAB93F5B5C5290AC -FEB29C5EA2C98095692873D36C7DA24847B66F31E4CA4C7AE5C79D7CE4F0532B -78620582E3731A2A6533A03E7155B33E7CD142FE79F72721862EDB24959B9783 -F834CB616FFCB2A23497BA6D99AE34DC459A2F7B3E4DA2B54BED118ADCD92178 -66C40F4E60F6E1327D5DBCA645A2A7C770807E6D7E47E1265C753F8793BD2D1E -BDCD749CC24D4AF9315A93F01180A0F9A7F420DA1B87664DA5FD967131273271 -9DCC45C3D57EB9B8AF14771E8E751D88B98D2FFDC72F5011D402EC34FD010ACF -D3B0660304725191D64FEE106253FCB3470F1A16EB7B45C1489D3534BF94F740 -C2781DAFA5E8A9E7B25A85BD7935DF3ADDE08C960E283D8FC3976FDB4085DBB4 -B6B35FB239C28C785B18BE4FC98F3A5F410F562DB5FCA04E8074E4E790F4265E -F88117B3D0833AFAE6E8B8A71D7731BA6F14FD6F217EDA3F8CC687A494FC3914 -B84FDC37C8C335AB1E7E0BEC7FB6B7A595C50CF8F0080C8D461BCB8B579A5155 -F963B6587873FA31C3A6572740C63EFBE58A2EBB723B7517D2A243F6CB08A038 -54F4DF0F6692022B2EE8C6F6B73735ED3166BAC58D9216A06EA6FC7B63B20031 -D0F0F99D83D9030B413C2360DD2C553E34BD67851B743C3FDA676AD63C5BD759 -9131358C6BCDF05FCC048F4EBB9005899ACDD8E9EC9BB8C5A08E83485047D263 -0ED69B4D1869A38068FDA03524022A1D32FA2AE0BF728D2A654E52B6A6C90A3A -725F86627D7C3EC5AF5AC512976D35FE42AACA3FECB401788D0BFFD9F4743BB2 -EC5B4E7891F216DCA5A69E917A171E0069A03FB214ED307DE947225049D46E0C -4707503F09811A597A9113921AAC23AB1CAA9866F81A02BDF349FAB129F23E86 -E384C043053055938D42ACBF9F0EE86CEBEB011BD5BB7D593104140E6AA9CFB0 -4E0B47C91E504BB6A95B2CBC36EC03BE01897C3D498EB30FBE4BD9584B9D766F -CB3CC7C96FC8F286FD681D3B6F61BEA096CF04865BC90012554DD15DD81BDC99 -5CDAF88A278A7CA272AA93BF309FC2485B022795BA88EB5266F5C03078CBC109 -4CDEAD6500AC236E3B93A1EE0B562FA71B0B4D594E26799E73C28D23AF4CA53D -7EF51C2D2ED1F89DA3EBCF481A9CA944488F03FBC457E29B493BF35A0F75928A -3E11C87E17007E60EC992B63ACCFC6FF2217A30350F4B02E41B31E63B3C4A2BE -4F35AF890A75CBB491FAA34951434A91DECDD7828FBC23BB24CD54F54FFC0496 -C0B4F2B457397789B1CE9E8CA0EE0FAE10BDE57CA86155AB164007345FCE4444 -086032AF8AA352ECFA4F57DB442CC9D673A002ACE753F954 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMR8 -%!PS-AdobeFont-1.0: CMR8 003.002 -%%Title: CMR8 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR8. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMR8 known{/CMR8 findfont dup/UniqueID known{dup -/UniqueID get 5000791 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMR8 def -/FontBBox {-36 -250 1070 750 }readonly def -/UniqueID 5000791 def -/PaintType 0 def -/FontInfo 9 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR8.) readonly def -/FullName (CMR8) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle 0 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 52 /four put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3DD325E55798292D7BD972BD75FA -0E079529AF9C82DF72F64195C9C210DCE34528F540DA1FFD7BEBB9B40787BA93 -51BBFB7CFC5F9152D1E5BB0AD8D016C6CFA4EB41B3C51D091C2D5440E67CFD71 -7C56816B03B901BF4A25A07175380E50A213F877C44778B3C5AADBCC86D6E551 -E6AF364B0BFCAAD22D8D558C5C81A7D425A1629DD5182206742D1D082A12F078 -0FD4F5F6D3129FCFFF1F4A912B0A7DEC8D33A57B5AE0328EF9D57ADDAC543273 -C01924195A181D03F5054A93B71E5065F8D92FE23794D2DB9928A7C95D3A6E9B -8E92F84CA0AA44461D2F4FA0F8B81C6F5B7BE98C9712BE166610465CF689DFAF -27C875C029C0116DE61C21DA0092D029E7DBEDFDDEE3D67E6936623AB53FA2AF -18BEDDD7AC19A19CADB6ED6CA7A26E6044BE414FFF59C0B98D5819A6B881F9AB -7AD0D03BDD5CD309C67811D5CF0B93F6FDC9AE64F74ED4E81F2E18D880BD842A -DAFD0BDF06300201C6946087FC0B999447BC370200BFB8CA420B668B32EBC242 -6DB1546A7164CF55B332FE9D239B65F532B69EF9F4F93828A44C8F5C526126F8 -B7A369114CA68D4F98638121F4E17F351723D9F1A902FCF087F94AFD23876517 -2D15B482AF2D68C3F31FFA864E031596E597882578AC7FB0DAE2A713B065B374 -3E2E72519ED6D50CBCA40A7275A7109A4F3ED8A4566AD8832890D3D1F4899850 -9B757442B7EA355175CD5D6D8B4152ED2D7EEB4CE30F174FF672140354046A45 -7098EC45B9DF3DF5CF7B417E201DA88308CEF4CED8E8903AF24FB8DD0187352D -25738519ECBC70304F8F620CC45D2586619205DA3955696FAFFE2082402B3502 -CB682F410DE5FFE80A4DA3D3BCF02E35BD577D0DE55E7B8A33B7A2FD5136B5DD -A0BCB61F8E7F4363C21F890CF287304DDB8FCE7FE207C0D160B81E7EA662BED2 -DFF8C444E19C91E72254257CD87240A70F1A964FA54ED9ECF27E27A57DACC3DE -EABB92C085030870C6CF5C40B6E47F5C0AEB30E84A73ECDABB2D754EF6EA28BB -16EBD6636BC288E62F4A38BFB55F5F4DD20FDD77D767F6CB52F9513E8EB75413 -07F1877B2C01278675177499E4E8EB09F2657821613F5C7643FC064293EC6E9E -B519FFAEEA36B19C9D1302CF91FCBF87FCB57C5F995CB6712BB3D8681EB6F05B -B2A4195A3C73CB4ABCCFB958EAC533BD89560D2790CDE1444C0F2E4EF27A529C -F01052964E56F6D76A190E5FF45934BB711A3406284AF130D4DC0D8112BB3752 -762CA0200CA262359D4F54C0CCFA9A50DE18C7DB14419E2990ADDC4A54B94978 -D9174CA39434022FA77FB30179EF805E2189C35919F5EBE215EE2A00B4407826 -CE56329C5586D8B414770BA5D45513C3AF1931D632FCE69B4CA504944E03362C -74A1177C6398A61A12DAA0F156543E2A8E9969C4308B7ACC21A5ECAC8F172541 -1B1316A88C0C163E574FFD3CD22FF08488662FCF2F9344BC25D02146F36CA6F9 -E2D0130C654B7485EEA9A110A33AA0C769121F81821E9A2BD062FAC158359D44 -3F9D9947200EF1EDDD5860F10438B162A69683957300C75AF7546C70C97AB2EE -37EAAF0089E2623F787F252569B06C665FDB45EC9681C0774ACFBA76B98C4E89 -7EB12AA5F8798FFC110B49C25E3A483ABE83B0BCC6DF0578403ADC369E013762 -C9D08FC94D949BAE636ACA9F36F4E3F02296775A062077B011A705B6F1784D36 -A926622CB3847533D7ACB24A4EBABB14593B5D8E1DAE2BFEF8A51835C8D4E76D -7543C126A4271C59A5881A5AF89331694F84489CA66725995DC3070F306EA447 -CF30F63CD476A46D528EC1FFBFB8EACFA2BEEDCF54C92CE2BD26DEA5827186BD -3A4D1709415CEE7D51D671357B4A5D11E835F63521B9824EE5282E58F05A8ACC -FD249461181A38C2F47BAC4E79BE368D64F886AA493C61CBCB2ED401C8AFBA61 -59CA6F6216D941A92AC52ACB3D7ECC28D6A58EF4CC70BA6DE23E80937AB38E89 -6F05FDD15B954C0826636267EDAF9F2BB466BF79D2E10EED9B04297E6BC93069 -79581ADD1A9D9FAE9306F46AC95B98C60A2E53D60CF1AA4069BE301E17E25070 -F98DD67BD8642B1D07571A32766072E48BF27E1576FFEED300D7313A358A823B -49C8F135961B7E259095C9BB67F996CE0B90E95344F203922F47E11753F70D38 -2ECB615403490310CEE6C03AFA97DA2F47ED47125D110FA69725BA0018F6A40B -29A307FDB3E52322A77A0102E6F57654CF1E96A134D13860D83AFA0A41112D3F -2247A09ACF7D06713BE443FA27C7E7220E875965D53030FE7D2D62EFD2F1DB87 -5FB091FEAF599BA8C5167525899E578AB341BFE2BC4E53A047093168AE189237 -EA55F055514EFA939DAE9E859CB5FBCF37D99484F44FE5AA5FA386B28BB642F5 -5DBAF059A50FE96C7C6D834531D64F1F2E99AB2E96EE74D149178B1C0618495E -293973D9A03E1790654B67C0882376ABEC17D74785B3737D81644F28B3BC6FFF -F92FE29126995A07E0BC5EF3A4B93789A103C428943E045B8D1A5063AE71E806 -568D48072E53DEA85253B01DF0BB7367A6BE4DD7BE514AD74E3F77C825ABA405 -64DAFA25EAFF8F63344B5F6B523629776CEB090B546469F6A6008DE43072DD3C -DEF51F62731037D1FBD0C038A1E9B669849EB3BEBA281624F13D20B61917A109 -A0A7871A73F7BAA18077360B38A4625C5DB9AB9E43BDEEB856FD0E2D3AA2E075 -267B978B9EB47F2369302E87DBD5D5B422830BEC32411FE75D584C58650EFB1D -136FEB92B94BF8939FD63AFB7349C7511E5E46AA7324F8B1FFCA9C2A9E9720C0 -A720918E8E860F137567D386AC29870FD990BD69465B3A3D2A0ECF2753578AD7 -80DC87EBB319EB5AFE0B6F6FF8616EA30C51425FE3ECBC5F8D0B0BEFDEF32FA7 -D168B4E85C804B7326A0942CFDE732B1171C643452B7099B31649CA2C38B62FB -46EBDF7180004C549B53F88021D029452C2B37D8C565BCDB0B11541039A13C0A -E45D4B68C7907B8BF08C6F41F564B62BB554235D50330E78DD02795516D969C9 -66119D718798120442CB7EB9877FF84EC69DAE25F8559DCE3BD8042959F695F8 -2F99845B1B5680DDCF181D806CC4903E077D1FF5E60918EB34C0B1E028422B71 -CA63EFBF3F4F3CD813CE831EB54265A555BDD35AD7D723F9CFBDAB29C54F8AFF -2D35C6A3299E0A2DB470C7B141B1E3E10DABB7873AE302926BA8743278FAA8C0 -DC6174501D6A289CF980A3F55F2DD5C3A514E7E7F13133C35D2697D64C25130C -DB78FC997968D6B3BC929E8A31B6D212C5128E4412632BC52B3A1049F7F2F61B -C74AE9A6AD19B9E2E240617E2882F7D29ED3A4279439107AF9AEBEE47CE85DE5 -CE9595A96A118ACF1EB1F5929930321AF7732E351E18C6AD378508E37B4C327B -0E06AAE21278AFA9255AFE5C022034DA2968D260879B4B38E7EE2E11A593DC3F -CE71ABA050C004473324CAB6F3C50E85DEDA3E9A27388D8FD3A8F6E42A79670E -F7549CFAD4CCB337A6E0BAA4846ABCA059F1E1933CF11DC0FFBFF550CC4A1B47 -CF7BCE0875FA747AA854534960F757884505A5AEE0330179A9547A4AE3E68479 -7A457DE83326DC30B67F27CFD4AB697601CEE352F72F0966B3CEE3EA24683BEF -6D23AD51B8432C3F0DD0D0F80791E1091F38988B7A54E466A9AC7810DE8B7893 -6B0AA6356597891D56190A7660BC7F657BC559E0525D41EC228078F2FBF89C6C -72D666DAD838CBF0861FBF0A1D4ECC069AA49DFBAE5C56B781A1D5D79DAAC256 -13E3F9B928A2394FC71691E4355642764459714412D6F8EF803FC5F7353822DE -6CCBB8FBE5AA1F2C7F4D384039D85E7728527DF9FE0239E2CF8BCB7411C000B7 -1FE660AE6A2A19229E5E8776CC83EFF3C27403935756463EB4721C51FE0B1197 -86C2F17842A0FB639F28083DFD4F1E86D7D3BEFA922514ABF489C5CCE93D6F72 -D2EAAE14F6CBA2BE4BBE7D7EA8EA19DB3A87350D4A52064137C3D15A5B05B03B -70B1DA7328D10713B83974C390C3270AF5A9A47C0BFBFABB9F31063B0CCFBB10 -0F236C74446688198EFF039110F6FF42FA9F82D463AD3958B5FD205BDF85DE20 -FE3F0C7AEEF350AEE6DBC1DE2E2DA4F4599956F59D6F121F7086DC120416E180 -52DBBC4E56C09746938698860F30007091E1CC0351B43990E47208ED495310F5 -7BA9C6AB3CA10A3F1B318FD47C1CE3B9FF1304321F9623E32D315AA9CE64B35B -F841E6C62B5B2488A311C94937879E5E0E170FA77AF0AC75C5E6E9F3E8F825AA -09C1702682E14FDFA72D27901C5BDE009B1E52E8C4511C6F6336251BD45261F7 -401CA3DAE7C4B0CAEB91B9954BF4A97C48ECE7FAD401351D59DDAE9DA94E2335 -74A2B880E4749D3D7026CB5299F16C204B6E00A20A6619C34922C7D3FB50F127 -3157CFC08DCC5164C8023CD1B6C3556C73CB8E4ADA845339CA9BABA1457ECEE6 -ECB9849DF1F0FEBC89E5F97C92978A500196520839CEBA6C0FD2E3D27BB4B4F0 -93CB2BB565F4627C6DB62DD0E084E627D69B5DEF42EF094381B62C0D67EFD197 -301B132420F51A41561E6106870147E0D597078435BE3819ACF0DE28AD779847 -F3D2CF667DA06955D53E0204CEA2935E9E984E76963D3079EC092031E2A10E61 -1227E5EE6770DD4D745A52655369EBA06A19BD7D95BBA271E488241199D1008E -36EA99F8DFD2A9F87B06B070158B466AA4C6EA3BA77DB0F853F0BF9A304EA291 -34069714368E0B94DFCBA3BE5EDB6C8204DFA7EAF5C3406F60A7056407D1BF6C -CB85C1F432F97D821F5518BBA79AF8453A568FB2C2D025A70CEC75F46C545011 -ACE3A99B2582793BA1DC655230AE2EFD24DE20A01D4A441AFFAB7771F223FA6B -9169849E727E494247F67D6E1EA9DCA06A082FE2094BD548AD7F08B565145634 -E7ED832FEC1378306DDC796303392ADB0CBA130B63B38ED57B7828B47732853A -893E8836FE19CCF27002AE92C2B2CACFDF8A42F1B8066E033B965D2E9157FDF8 -E1264B40813C1A4CE424274AA3528A4F09B3B53DD4D23789A68B3D17BC1398AE -0ADA2C2168427A49846DE0216908C2FFFEF4F13C1ECA12AD341E238EE46E6DC2 -B71B54C52659632911F901660261E493AE2483D64E119D9924489779B62BC9FB -A052E822FD8D83178E09ADC825DF0DA07FCE7AD68EEB29FAA275A13691B4A5A5 -B0BC0499CD6307610CD6209583C1152C559A2760823F8DC0B9B990BFFE7B7E9F -3969B968AFEAADB9FC0F1410EBBAA0DB979CF153F0B8C978405F8E6F2B6406D7 -AAFBF4A655A15DD6D1E9A7EAE10EF89264659B09283F50B734236885FC09FBE5 -98D780012FA77FCB19F15BDC522CC7312546C0730EF5225DEA8C22A3BC6554EF -4FE73B9AEB5C2F7DBD474221760E5F539A064AC450591BCF3499E3968F2CBD6B -F15BA2B37080A4129B66D4C2188524F025414F14DB3F96049A8B0E5EB2BBE7A1 -AD64A988FE875FE4FE5186BB4F5DDA16983CB052D474B7D72F3E8965663EB50E -015C72407C3437142D3D7DBC055FA627139488DBC5A0F98D805C2143D99F491A -167E07AF60EC9F17C36289368D740B632CB919A0E74C412B76CE7A5906D5200F -9E79CEB9C65ADA3A0F23E8947E834AE7A329A9F0AA7A6BF545B1D7B4666C6522 -CFF268634EA06DB3A82D91A4C0A9B227E79961212881A54A6762C335DE7E0831 -130C45D94394D21C049B9D189ED955438C2151514F17BFC67E431DD9A8349202 -2F616AEC1C7B19F63D5000EB4771370924BD4B9053FE78B5E4A244B9A149D66D -A8BF3B398396D2233E92E4A5FDC70FAADEADAFD255193D688842DBA865CF6154 -C9348D590F3FEB135D4B7BD4D76A52CB140888247CAFAB25ED51F4D187041CA0 -ABD956F83A5661CEC171B52AF92F9ADE27973B560C802E1E0FF51C4003D1289A -CDD09F8EDA8AFDFF666D35418CEADF3B0BE298F0D1E5C8E024D6A2017A7E71F3 -3A9FEC9930F1118101E040339F9D41379170928DDF5B5875212B271DC843F612 -E0C21C67263186E3D6929160464D4D5C8928E14D0845762C36FFBDE548188E20 -3B6BAFE5EECA0385142F01216FB8A90C43A472C1D4447FE5C7C78CC088FC72E7 -3FAFA062C338BDE8A430FDF1951B107D8D73FF9376FACDE5900BA362C66F8C1D -947F9545C5C13A53E4479B1C1A50472C05E8F8C266C6D4F4EB08E97B3B1BA972 -26973B844545089C5732322BCC9A5A8FC972FA0D7DB8BD85D2F515ADE65DA479 -0224F7EA2276CFED0B75B2C23AE7377F86F1F6F205D6FE19377D87E782143697 -984E731F83CA888199CEB425643C259D4FB8B58DD69A96085198306494BB497E -FE7C9954EF35B679BBE3847A9C73507874F71FC97665E2A58BA41407A1745247 -44A79B588D969D11CE4B863CDA655DAA53CEA5C3C263B345E782006CE9831D49 -603D2D95DE9E370D617F5928BA416C362BB2B4DEF16A5D44BD24B34257765F3B -6223B3F9B54DAED69A90C7050AB97B06693D253C6894CBD7B497DA449F1D9B7C -D91B421891EC0724F59C82B9CB288DC42F2D2D7A7F22EE3D910E15953D7766AE -276DABED3820390BAF2700C4653E1C77FE63DB71A66D93ED293E25B8412A1EFF -809554BF04ED0DE83F7F190883ED793803CAD2C34A66524D3A580ACDF3C13B22 -08F18905E7A4A16DA9ED2A112462FB9FFE481EC2069E484E8BBFC19D594153B7 -3DED4C11762223B7586483B06BC164D824D1A6FCAE80A35DE0DB8B33396771DF -76DC5C05578EF1BE00A70BAF3D951A01C87328DB2B0DAD6E1B4C21F37D1BC0C5 -A929BDE5EADF20DA60C4DE2E3C151005814F24824D33B95F700E09A0207EB602 -3EF60DEB1622B91DB99A855A8F1DA96358F05CFCEDBDDDFC8446AE3391BEEC41 -966E594E28D052DD5ADA49DFF65E79540EBE5329DFD86C23CC800F95221B9C18 -CBBF941D2FA47EF1EF59A89DB5DD188E75EE94AD2A79E2221107E5992C00D531 -2E00B544895A9204656867E3DE9D4CDB64B920B5CCA9A73E6514B36CABAE01BF -94C15603B86780190595560F792E5EF01650074EA4A9BBC6ED284B9AC2020641 -DCBCEE0ED27FE58171DFE104EEE4202759E594159DF45113C00236127A46FB35 -9EC705F21C0E456C1F0F924594C09AC64D4377C5FEEF764BA4A09ABA8D09DEB1 -FC13B0CD202B2F04CF5D73DEAB65C36C2FA7C0DC236BEEF6D23BFFC9C493DC8E -1831F19EEF81EEDD976E43BAC6B5CED13F901DE59835FC75490EA528A72CEB77 -24C38B258EC38B9E6B97F85CA8C10D8809BBE55A6FAA12456FCAC786942E123C -06D1E55F7ED04400088BEC968BC5081DC7A1B1B65166E7821679F76694F235FC -6854C8776AF855B83445D9FF919B1D80E98DE0741D06D6C5EEDB3E3EA6392530 -F1BA817737D8162F7B3A36AC2A03190CDEC654383E31934C3E0A012B639532C6 -26FEBE9B412F1C92D1943B7C18CEF510729D501349644C97F087F2F840074AE6 -D8CD0FB2E620FFC908BFCD938B675A0A4A687F7FBE8F3DD06A62D7B6DE7DF3E2 -49D367D60B10061EA86CD512F5A1BE8950D83C62695E130128E0037B62552D17 -064319BBB9B1FAB9D79705E5D68AAE9B36EA14BF1A59A863BDB8DAD9AB5D7B8A -E30E2B499F952D65877C8E38EDD7DB29F9579D09E629AC188DB6A6403AB4BA3A -D358B3770D727A2B77D84B6C9EC17E29D88E3421F9B7D2D822EB78BB8BB50692 -8C46DD6F9BBEF2E848A2B5669B200019802AD19661537A84D3514AEC5AA47445 -2C791E01DCEDF18D9506367241255FFADEEA6183F51A9F42448A7DE413C08359 -52DAD2A60FD606AFE14702BD3B0EC448720FE63438D020DEDFCDE3582FC31DF1 -17B25FC152789D2F17FD60B8209D292D2152DCF8D28B5ADC04F6659BBB746CDF -145163361823CA343763AA951C640B5D4A99B7787105A1609EDD6A596EFC3F6F -2FC33D0D499DBE56C6668E137715D435D6B683E0113647B2765AB0F3D98AC717 -5B33C3EDDE18506E73B4E392B022F30480BD30F59B2E3A59D93017296C3156B4 -B5722E1955777716388AA987B2665669716F866FE6BDAD5E74A523CC03915F26 -9B7B231F5D9B1F61DF7CB01ED3F27070E36547B263855DF5B2E3ABD2ACC440B9 -0826E1DF4743FAE6668B61F72C8700992755522AB11C765981A9BEE0D040039D -6C2D64ABED527082C97CA606127AF5C0DB1A98628857960A360CE3634B206013 -83F7FBF5A8E18AB0FE204A6B2780747B7EE60AD923B4727444F4A418CCD9EAD2 -647266B7D1760337D92FC0BB4B5BFEA57C790C6F8055D06B1CA651CDE2F6AA28 -A55B76402B932751D63A528027A906619DD59D200A962166EF1DAFECA37D1AA8 -D5FFEA0EA38D04619656E5D6CD99DFA7324EAE7C03553D7FA981CF5E48BFC3C0 -97244428F5C91DFDDFD6E68CC97A0DAF718664E147A71FC4ADB79766E76BE7D9 -EEB415F4B2E027793C593C586F1554E6E385CB2406C9065BC9F37028F55FE5F8 -BE0BE8FE181E3377A07ADCD882341304A977BF9C36C7B4904467886005786A39 - -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -%%BeginFont: CMMI12 -%!PS-AdobeFont-1.0: CMMI12 003.002 -%%Title: CMMI12 -%Version: 003.002 -%%CreationDate: Mon Jul 13 16:17:00 2009 -%%Creator: David M. Jones -%Copyright: Copyright (c) 1997, 2009 American Mathematical Society -%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI12. -% This Font Software is licensed under the SIL Open Font License, Version 1.1. -% This license is in the accompanying file OFL.txt, and is also -% available with a FAQ at: http://scripts.sil.org/OFL. -%%EndComments -FontDirectory/CMMI12 known{/CMMI12 findfont dup/UniqueID known{dup -/UniqueID get 5087386 eq exch/FontType get 1 eq and}{pop false}ifelse -{save true}{false}ifelse}{false}ifelse -11 dict begin -/FontType 1 def -/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def -/FontName /CMMI12 def -/FontBBox {-31 -250 1026 750 }readonly def -/UniqueID 5087386 def -/PaintType 0 def -/FontInfo 10 dict dup begin -/version (003.002) readonly def -/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMMI12.) readonly def -/FullName (CMMI12) readonly def -/FamilyName (Computer Modern) readonly def -/Weight (Medium) readonly def -/ItalicAngle -14.04 def -/isFixedPitch false def -/UnderlinePosition -100 def -/UnderlineThickness 50 def -/ascent 750 def -end readonly def -/Encoding 256 array -0 1 255 {1 index exch /.notdef put} for -dup 68 /D put -dup 73 /I put -dup 82 /R put -readonly def -currentdict end -currentfile eexec -D9D66F633B846AB284BCF8B0411B772DE5CE3C05EF98F858322DCEA45E0874C5 -45D25FE192539D9CDA4BAA46D9C431465E6ABF4E4271F89EDED7F37BE4B31FB4 -7934F62D1F46E8671F6290D6FFF601D4937BF71C22D60FB800A15796421E3AA7 -72C500501D8B10C0093F6467C553250F7C27B2C3D893772614A846374A85BC4E -BEC0B0A89C4C161C3956ECE25274B962C854E535F418279FE26D8F83E38C5C89 -974E9A224B3CBEF90A9277AF10E0C7CAC8DC11C41DC18B814A7682E5F0248674 -11453BC81C443407AF41AF8A831A85A700CFC65E2181BCBFBFE3573BF464E2BE -882A715BE109B49A15C32F62CF5C10257E5EA12C24F72137EB63297C28625AC3 -2274038691582D6D75FE8F895A0813982793297E49CC9B54053BA2ABD429156A -7FFCD7B19DAA44E2107720921B74185AE507AC33141819511A6AC20BC20FB541 -0B5AAEC5743673E9E39C1976D5E6EB4E4D8E2B31BEA302E5AF1B2FBCEC6D9E69 -987970648B9276232093695D55A806D87648B1749CB537E78BB08AA83A5001F7 -609CD1D17FFA1043EB3807AF0B596AF38C91A9675E2A53196FEF45849C95F7DC -182A5EC0EC4435A8A4B6E1CDBF9A5AF457564EA72BF85228EB6FD244F2511F5A -CA9B71A65D53CC06EF5F7EC3A85106139A4D312378BC22183C09A229577B793A -1B7422611C03E84BF809F46C62CE52D3AE29CE01C32B202ACDAA5B72733EB0AE -C31D7EF7BA88D2D14F85313F7A8B9B7A5B124B03AB923744D336C969E5CE304D -3AD977A46664479EDEFB69F113024E761C05FA48A54072DF9E12C2F352ACB3E6 -D04F6EEFFDE209E7FA3DA22E5B1D1409461F4286B7F4F8251B44E5CB7805762E -E129FF4A06A7458F3191926B1CAF70E32C6571AD2DC07C34FF62840896F4D200 -761B1A7FA356526D1E3AB4C542AF13623BAEB9F61B1BEEF79A9205B1FEFDAE24 -8799D516A9ACC30BC0139C63C9A0523E9D5439213B67D490C96F902958779B8F -68BD8E9FDDCE8A3A2E35877DB6C94B7612382ED8F218EB1157D2ADD090A2448D -10B99FBC9211C5629ED1C61C74FE93041E5AA03EA4AC3FFDA00C2B6E719CFAA4 -262FE17F66804A6B54D3669836EE4367D2A2991580C5564463C973CA0DA38AC6 -922716E13B4A807B50304B8826CEFEAA47C305FC07EB2AF25FA7945797237B16 -56CDE17AB0834F5C97E0CC5741B061C6FF3A8DD1A79B9A173B66A6A750538E26 -32FBC92E75BA15CFFE22A7302F47908547007402569158F62C29BA2956534FEA -7DACF1E507AC309DAE8C325F2A6023D2FBD81EF42146BFCE6A16A6310A650460 -7B07BB7647C8760FADDF0DBBCD3DA6CC4645D1732DB3A22D8B76E1D2D48E4D4A -46F4BEB80CE65F3517283A1AE08391FD1C10ED452133706BC6725AABC80107FD -754A8BA47B0281D479F052CE26A723EFFACB79B213041A536542AB334769A2BF -88505D82C498ABDD5A73EB539530F47CAC52825D16A969C8BB56D4A7F2830B8F -CB63B92B576E7BD922A4B25E634751F8A3B7C4EBAFCB373EDC8B8281B1D1371A -7844E9AD990CFF09F0D7ED73A5CF873D2D5C9E8A9923CFA31E1A4B4CCCC40760 -8B3AC8FC3C88BC08BD7407725281BB879A1A822D94997826418F1B89D303F2C0 -BE7A0102E6F529630CBF1BC5BF3E4578C164A3DDE45E62A957EF3FB7F0FBBA6B -CA1E79A1ED195B6A11CFB345B663C5E72FA55D80476F604F6C4257B51686AE25 -8F7D159FE605DDA0AC74BAA5034F29FFFD403070013C6E2D8EF6A0990D91173B -D5A3AEB98B64E412991505C3CB7C2CDE13C091FEB3DFBCAF30C4C19511102300 -135BD5D444BB55692013F52056908DFAB2ABFACE81A58423ACEC59344CEF7D4A -C5A3EFFFFF70759BC3E593D878281225060B97D1BEE6B26EED90571FEAFA1812 -1115C0EEC892F5DE6FDD68321A0B3F10A2D771B79BD85476AF6018472A499A86 -07D64CFF4550866AFE590C471C80EB12CB3A989A60BC7BED39097C12D9286E39 -14C7952C4C64820B4DE44A1827B7B0B535244E93FDB80036D6332F90F95B472D -7031E7E3819E881BD0313CFA112EB3AAE943C99C47635CCA7E34DC0306C04E5D -2E9F60FF037EB11602BE74E8E6B711392E866E3E55D988F7C856417A2B9C186D -639819B4786D039B77F8578EF63C088FF28BD08D8353031445C8498A8F445BC3 -D08923D32AC04BF3CAFEFCCC1E77EA894F4E846F47EF62D6841B8D8576FEAE8F -90044626869D04D61D64D56E8C51AF8C18D6CC3FEF3B6C4F7D56FE3260354948 -10104F69B117FB8269292579A7D52FED688C663B643D8D99F13956612271073E -1A337AED059B7A93819A28CDF01569CBEB51069D22ADAE25C47355560F402B2E -8C9900DA82B79C64497C8494F42FABE5AC41791C2010D98FB7E593C744F250DC -D837DB0EAA4F75D0016970F3AE8359878A08CF9A697A06C5EA945819151265B9 -1A12122B98F79185DF852257BB4798E7DC03712EA6ED34F6E6AE1476788DBC33 -9229FADB8D581BE1A63F596698DBD6DB98A092F67197A4FD4A50B648F2691875 -EE2495D6BB310078F516785A0CEC7EB6E8305FDBAEB1D15690409FE32DD9CFAE -DBD3866FB63EBCAAB73E3E4BE5D7F3AA44793938AAF3F8341683F0790F1D46A3 -60CE083F9BEDDA22E0639A92393960F86602216FA51E2754BC2F4CD0BDECE3D8 -FFAB7E0E49613DD4956C9A10AEA798BDA1F756C755BEC12147ADECAB0FB73B7D -203A11D84DD2AB5AA98FD38C1C2573570FD49A4924A94A106D2A7D850E793608 -FB135853E8C4204441CDBE697FD0CB330B1C3596F32D2BCBF263237EAB362D09 -DA6F531B40384DC91F30674760CA7B64BA1968F6A7FC9EBEF431A1AFC5E76D7F -2D44DCB7F61C7F6B16196B3E8B47343F572DBA8B8B21B43E35BB6B2DD5C7982D -244FD4304D254D6CCB5E8CF70E77F50812F41A988EEB3B26BF0F6F69BBA18077 -31134B5A5823D10FEF6201D045AEE7A24E0F25376E9FC66340C56C05F6CD810B -724D85CC4BB8D789834A447CBBA159565D08BA5793D8599035BB5063271518E8 -F6C50E7DCE71B1D186270DDC860C6DC0CD506010EB5B1FDF6BE47A9A18CC15D7 -D657E58BED9EECAD5CE5D49F63139A39BC52C6584BB2C3264D51BD584B40F8EA -AFCD8B83F548594386EB2B05CE803105E84931DC6E7A1398073D48E130E0D907 -CD0F1ECC3254EDF5D4DDBF44415DC9BA66C673820CDB0FDF033D59BE2B5EFCEF -01FF9D33EDC88F8D522E07F1689D024DBCD09A16A63519E1764C8630FF36058D -CFC07027E0ECDA01E0E85B166C613B22F587B4D355EB018BA93E92A36007B4DA -287FF5A91F7D8A0EDF5554ACCF45AC8066E88865C5692E63EB99CAC81367B605 -8E6C19EB98EBFE0D2D161B447B9A70CDD1122C7B78A413369016E6D8481E2AE9 -9AA97B5DD0ACC9B0820F7742CEB2F46F89F3E2092621969A88DC0156B4F941A1 -6BF1546D4B136657C47B082A8A35FE96016BAF3D9679B8C32EDDD6AE6DF3BFB5 -7854074FA019707FC22BFA82299E72ADF9A980AE29A8E2434277E58B01F6B03C -192E1E25DADD49F6E3F69799AE62B56E00B60A031BF8721DB8B2CB6D4A4C15CA -AB1FDE010AB7DC0DDED977389B101B8E53A949222FAA126656E02817DD32B0D4 -A49516CEC2B97EA7C78FD66229B044EB92F502384BCC6CCDFFF995EABE3BB7A9 -50D5D1AED861E7D3BA8D333026C673C5762712E763E59261426044583D789C67 -A606B96F97663F92BF104CE02FBFDFC521EC0D6670B7D4F85A229F51426DE912 -3B729C4A535FB7C88D0A5E78074751B58885DD6BDD2DD9E9C83F105E8CF63DDF -CA7DB39D0319CA7CC2E73F42747F007574DE25AE1538B4D493D22D0D5F0F80C6 -5F6FA3937C8391DE2F0116F81DB2DB0EF751EC838A7F85F163A6F48804E84B96 -8D715EF25B7E2A5CAECC558D80F421052A1D698F3B8452AC27E30A4E6226E3CE -084C8A83ADA0818A110923CF7AC7AD4CB92AE4ABBE0A9EC1FF935FD02774C1F7 -92A278E513012AD17722A23C55EF82E18F8847B5CCE47F4FE3EC508BA563F7B2 -AE56C94285A18DED4D432FB0CEFC05A20BC17DDF9FF919C724810A8ED7358A27 -97EC93C1A13C443A91947FE1F6F528EA7B628917FA7E554A1D7B31ED46C5ABCF -92BA57961C8876DB4041305EBB029B03D8351D5E2819FF87E97ED214D8F1CEF5 -7F7668DDE223721C0B810F4A4AC81CA4EAC86EAE546E1B15D91E626FB9A31824 -5BFF17C4E79FD56ADBF6DBF01BAF6453A81EBDCB38A5FC0FD0FF0646B3B0D199 -13E2E59A1B5CAB6DE5329BE389BA0E2A2AB55CA40B711ED746C24F1E48892E76 -6DACF7DA163CDC90CF076763008E7A899870CDED5A80758E6177BE6B93B07EB1 -5800A3BF7B9AAC3FA825CE594EF5B7546B181375FA8F37608DF17856D2F8EBD5 -6030A9E6F6BEAF224AD2AEF76D03B023E2FCB922CB8E3C6816AABB61FE6E4F83 -F21B4935102C860ECA03DBEFCA461F0E5B93E5A8D18440BCF7D1D6252A24CB6E -A64FDAC8B67C4888519AA368D9C4A8C08C7155DF5BACD75C5196C571C3C456C4 -7CE8D90215FA6EE8CDD72C48740F7F5930EC3632DB63A9C8D2DA125088C0F05A -9FC83D16B7F53163F4EB6FF372C6C3115F1E68EB35967D11126EDEDF0BF80817 -E68A698183B3EB0A207DB43786E1B9D289359D75AD5E465328CAA90E712C2962 -AE2A466173F2FF30EB535A6054BB0B875DC8552C16B49DF17CF84D98D35497BD -F55E273FCBB0C735899529A69990E09149FBD2DDE64B7FA8D50AE83925DF03C8 -0B63EA158FBABB12A028803DA4B9DD6C48C0FEC469C4E730729F4BB420D5B003 -1918B4AE9CF35CFD31E8E62A44C0484E3D00143BF1D330235E821E5CFEAB4D31 -7CB4604DB1F310457FCF9075A3527279644D908DE847CCD00B6F50DBDEF91D3E -38238CAF550FDCABA2C3A46237218DCC5A09AFAF69997E1EBDA7EFE6FC99ECC8 -5D4AFD5EE35FE2346BE79B499EC8EC436868154A947D13BC02C780EBA4B9E64F -3026F1BF5DC1F8D64FEA1281EA40B4BC355638A3A59BD9055BCBB232FA45EA0B -B405131B64F105814019BC55466EE78E9E9ABB62DB30EA452F7EFD7196C76A85 -15B2CFCD89922CADC0F392B0C54A231F3999AEFB53C24EB0C63B0C8A1A1ABB6B -AAB2F93E5ECC7AB90EADA320E918106BAAFC1F8C425C617639984629018BA674 -6FF4F338AC43E23BC3740542911C058D43A49A11CB3A0CC8E3088BB5BA6048D6 -CC2AD250DE956BFBE83BB24C945C20D9C22E7105983F284EF478F9B68BFB0322 -EEB7D62802CBAAEFF1C2332159DCC7243EA40CE15C734EA905E04C476B178B82 -A08ABCB0B86A7330C75E62EE7844C9E22DDB013ADDF20AFE08122EE1B930A81D -806A0F8CC584CB7FF5F56F9B35E5FF78FD93E7E4A40C64537464EAA275FE88F4 -461FC6A467C8A69B9A9FBC10D44AC1B753D313A8E7D97F5FAEB60F82855658D1 -4DCEE043C8FCDFD8A29DD091F3BA55874A458B2B8989F35055C72FC411382361 -9AADC717E602B48D7C9521D3971A6F7EB19D539445DDE9EFBC5B58FA9E5E426C -172C45CDA24985FC4632287FC3B15849DEB56F5A061993AB10A6BC59868534E6 -69888175053108B77E4978D971B4EC57224C0F93EEA4C15AE92254140A94704E -ED5666FC06C5341F643F779CC88A9E81891565C63B6F7F6286E664F4E0A48690 -356DC96F1B98026C563700772485B83BFA06435D4E0793EF822F423C93FBACA0 -E5D889D2B76771C6F0EE997A5DB43C2F6921132890406E3C33F6F159B14C5D78 -7C151BDFFDD02B697315F191B5490073EB418A4FF2A398C68D44F0CD1B87CF9C -B52F12728B72F94D752D23151196A256908135C87991E508B8906CE2539DCA8A -31F86809C8C6C18A09F6129BD7CDC6B37E76B648788056851F22BD3E3B5772FF -EC01D822B57FFDB3BAE624F05531292641FD6A7E3666152D18F6C653048DD7D7 -98A942C840C4A0FA662F260B21C64214152BB86F03662A330109C5AC0A5EBA30 -C6201F558858130703DF76AF4FBBEE069BDE45C0D9467077D85FFED4F9BA9C61 -AED87D67CDCA453A6528AC5BA153E1039D9CCC556CEA5CBB542265FF54A1B208 -E0E13740E7E7C26AA00AEE909F8F3ADC2726081A744D8EF6BB711BF5F611A900 -76F91C26A338DA13A7160A9F42410CCEB3190000D963D036FDA05A29F598EF40 -8FAE6F8E7E6F50C99C3304A573501C13A00023085F057DF331E3354CBE65D573 -CAE73BF15B3B96B502E0AAF2B4A86237E98A997AAEFFF4227D5A26E8972C48E7 -761F430733E6EF8AB2D903C17FAFBFA21C25F8A0AC157D397BF3CC1AE7598F0A -2BE4FB46B29443CE57F41FD5F91122E9D86F903E94D5B55E2BB95949C156D138 -89883BEFD634311F9280C7F028DCA6408D3A682DF5B55B9F7ABF08F019190F60 -D39E4F0E80F0594235B09A5320109638B938633A2C196E4ED2B43DCD8643C3CF -C6123B076B7F73352F906D96FDE0FBF50CCCA432712C574D5857838BAC30B485 -D25024EB254A7EFE57D1DF0892C275CDB3DF77602F0FED0FAEBC644BCACA04B8 -B424DB125E487794CAB36E01B5E1A26F5E1E97A739AA36D77A12F5B45338EB39 -AF36CEBDED55DCBFCF497FD475FC6BAB5530AD6153C6BD982564EE8712185F1F -D5EA7ADF4104661168A01994C1FD773A50C8AD6A3E4D332E4D59521BB8BBC6C3 -866EB4AC3EA4532477E6CBF6BBF0860031C3B916AA25E3492670EA67F55CF4FD -207C684A0DDB6F4AD21B2909CBA71BCE2E762012B0927BA72367A6AE0AF87F73 -756C9BC85E4EDE35317E2CCCD138C02C7A8013AFDC1A48C3A4BB8EF257BDEEA7 -60E012F54D12D31D18DC59D5E526F12567B8688B4B67E16B56713870300016BD -A3B9DA87FDC865246AF8E94316799110D86B1DDADB8A673402D4226C519C058A -1D1E5A5778584FC28AF12819B1924060BC4F54B1054EA6AB0149E04B8C4302D4 -A56D8A347EB5D3D2A0E12CF7E35059BDB53D9FF6BD25F6D9619BC4669CFC1048 -C6C9978B8751B840F27D82A69075832BE59F55C1737CBB1220FB8FF691FDBDF3 -03BD7D225A9372AC221C38245E48320E1CCF898D9EEDD678E5B8C65B7F588321 -1A3953EEB9B39EA9A8CB72DB08C3E9234DFFF5FDF9DF804C021D57E97DA7622B -97F4CB6E0EB640E0DC9EA15C5193F92A3A7565F4C7A4C9CC327F7CD2C44900AE -D9E76FFE62FC37FA376E77131B566AE67C3E09DA80F198BBB995EE8FA47EEDB8 -4B467C6C7DB8AEA745CF8C56B8BE56534E9C56FCB2B7006426DFE93D728FA4CF -94F131C549814E54ECE7C914C5FE8E4961D3437CE7475D03534B62650F551D97 -201C794AA877445DBEB11C85ADF6119B05360700F8CEDE4766E3A1D7A35CDDC7 -9ABF7C619E3868A39D1852DBE1EEAF5D7898C78323873AC005542B68C43C5000 -CC58F675EB595F87C879694751494676465891E8A897158B481F11A171CCBBD7 -29603F00210CFD7FF31FE3D273933ECC34AFBCC4108D9B76D9ECE63EA06CF939 -4799092A54A749DACB82C1424E9879672C8BC084C360014C9C1B6D5D65C68AED -66CE329C3AD712C0A36BE7EF03FDF339CAA2E0336D387A693B1DFAB5D5164E31 -14755A158168962C9B399F8F1DF3FF5060D7464D5071058C30C572A2BC7DEE53 -84BD7614A4BEC4C84E18CF7EC81C811724463BD46CECA5FB57B0F55EAE20CC74 -6AD815D1897B037C197D2456797B992C20C70B663BF99FE28C513B4E221C8E12 -49779F8C0AE8517048ADDF7CDF0D698E3EFE60071C4997B7F5EF12B6CB65390C -224F13FBB99FFC034C0710F05019899689B6D3350BBA65C7CE7C2AB03D81B9A5 -5F3D65E4D462DAB189006669F7390A78A1B8908A4C913B15DB8827DFF15BB9A4 -A6037DDB643103B937257A7DAB025F09D53FBBC2BCB6B0BCD8D56B2B2784E498 -1F6CF8470DCC892AD0CFE11578718948BABF9C1427084643B66BB9181094E29D -5FBE37708E1D8A6B7518A96876844CB66954227A7A6AF28DD075A462526DD5D6 -40EECC56FA366106E55C7068997B54B7F0D03AC1AD45D28C67C7ECA99DBEDB1C -E18A79C353113E2E05B837E703278B202112B1C69E42A69D64B62F0E7D8F7E5B -C1F93F0F99EC20EF312046F4B0CD7DAB31E422070B629A7FAF3BC331F0A7186D -4053C7A7BB3253326E1E84A4EA2D9659CAA229C3AC407FB24F4ABE9482030869 -A9668917641FF296931F653967E8FC62C7675CE24653764A71143C68098DF21F -4F97F7B73E1C8F8C05AC12E7DF18BF04D28FC23DC3CDFC688B72FB22525E0561 -5CFE5C0FEEDA85907470E66AE5D1C45B919D8F2A3A7DEAD823117A2C0D52160A -FEE3E74E0A6661400AA6593C0D9F22F0EFADB0C6E647EFB59DF4937EAD06D56F -26FA7265B16AFEA5D5C98FB6BA08F7D2490D52BE820E539338787577DF79F878 -FA7861286917396817F253996B79C2E6795E23FA13FD6E2D95EBA8FAE2CD055F -594D28A7660BD0519FD4F6E351B5D23D56A5F78DF4E1EBCB9497257050F5DD29 -57475733A025264F885BBDA44AE31490924D0C98F0160D07B552051123B1B031 -87334A38C914E7B5D3C2B11B0B737A164983170C90F4D312B23458E20BC02A07 -D06E317D13514665AF0C5F221E0D271111AC1BF1C251DAE23C3E17C8B65B4151 -6E069C910AC5EB83F365C2C5BFABA806FC1CAA0A0BAA6FC9F78010F1F2441C12 -743C9B6B4F2F725692F6F3F1880ADB38130863787146AAB77E2018AD7398EB6C -51ECEEE4A6795561780DA578AB64238BAFD9AEF74A49FAB6ABFCB01B58FC5E32 -4E7862644C1CE0F8D155E08B72FB8393801A0F2185CB0852CAA0B261E07B0754 -9E64C075D2F2623E2C2AD3203CA375DEEF2450B5C4FA85F05A4B17C051FC0887 -5845CB473013E9FC80C10ADB4E47292D96C521CF8E2FEF0B627362F126FD6C7A -BE79ED7E904C47FBCBE69D4CF4911F0E492B550325562D57E7D91AA75D495B57 -330BD247125C586314ED15B89D13A5B21B625D0610C76AF0E53DCD8AEC13E9A6 -CCF377201B20945F4DA433F36401DEBF87858835719792069C93BE331F76BA30 -2BEAF96B514FAFF986D584BFE111932C8117EC8D5C43B0D3F768F09E0C49A362 -2EF372E274D12CD9308A67CAC1F3A7E7B629BF32BBA4C6C7F6F8CBD52E12FB5A - -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -0000000000000000000000000000000000000000000000000000000000000000 -cleartomark -{restore}if -%%EndFont -TeXDict begin 40258437 52099154 1000 600 600 (dummy_fig.dvi) -@start /Fa 203[30 52[{}1 49.8132 /CMR6 rf /Fb 187[58 -68[{}1 66.4176 /CMMI8 rf /Fc 203[35 52[{}1 66.4176 /CMR8 -rf /Fd 173[74 8[43 4[81 68[{}3 99.6264 /CMMI12 rf end -%%EndProlog -%%BeginSetup -%%Feature: *Resolution 600dpi -TeXDict begin - end -%%EndSetup -TeXDict begin 1 0 bop Black Black Black Black 5417 952 -a @beginspecial 0 @llx 0 @lly 147 @urx 83 @ury 1470 @rwi -@setspecial -%%BeginDocument: diode_D4.pstex -%!PS-Adobe-2.0 EPSF-2.0 -%%Title: diode_ref.fig -%%Creator: fig2dev Version 3.2 Patchlevel 5 -%%CreationDate: Tue Aug 28 14:11:31 2012 -%%For: yogesh@iml21.ee.iitb.ac.in (yogesh Save) -%%BoundingBox: 0 0 147 83 -%Magnification: 1.0000 -%%EndComments -/$F2psDict 200 dict def -$F2psDict begin -$F2psDict /mtrx matrix put -/col-1 {0 setgray} bind def -/col0 {0.000 0.000 0.000 srgb} bind def -/col1 {0.000 0.000 1.000 srgb} bind def -/col2 {0.000 1.000 0.000 srgb} bind def -/col3 {0.000 1.000 1.000 srgb} bind def -/col4 {1.000 0.000 0.000 srgb} bind def -/col5 {1.000 0.000 1.000 srgb} bind def -/col6 {1.000 1.000 0.000 srgb} bind def -/col7 {1.000 1.000 1.000 srgb} bind def -/col8 {0.000 0.000 0.560 srgb} bind def -/col9 {0.000 0.000 0.690 srgb} bind def -/col10 {0.000 0.000 0.820 srgb} bind def -/col11 {0.530 0.810 1.000 srgb} bind def -/col12 {0.000 0.560 0.000 srgb} bind def -/col13 {0.000 0.690 0.000 srgb} bind def -/col14 {0.000 0.820 0.000 srgb} bind def -/col15 {0.000 0.560 0.560 srgb} bind def -/col16 {0.000 0.690 0.690 srgb} bind def -/col17 {0.000 0.820 0.820 srgb} bind def -/col18 {0.560 0.000 0.000 srgb} bind def -/col19 {0.690 0.000 0.000 srgb} bind def -/col20 {0.820 0.000 0.000 srgb} bind def -/col21 {0.560 0.000 0.560 srgb} bind def -/col22 {0.690 0.000 0.690 srgb} bind def -/col23 {0.820 0.000 0.820 srgb} bind def -/col24 {0.500 0.190 0.000 srgb} bind def -/col25 {0.630 0.250 0.000 srgb} bind def -/col26 {0.750 0.380 0.000 srgb} bind def -/col27 {1.000 0.500 0.500 srgb} bind def -/col28 {1.000 0.630 0.630 srgb} bind def -/col29 {1.000 0.750 0.750 srgb} bind def -/col30 {1.000 0.880 0.880 srgb} bind def -/col31 {1.000 0.840 0.000 srgb} bind def - -end -save -newpath 0 83 moveto 0 0 lineto 147 0 lineto 147 83 lineto closepath clip newpath --116.3 149.2 translate -1 -1 scale - -/cp {closepath} bind def -/ef {eofill} bind def -/gr {grestore} bind def -/gs {gsave} bind def -/sa {save} bind def -/rs {restore} bind def -/l {lineto} bind def -/m {moveto} bind def -/rm {rmoveto} bind def -/n {newpath} bind def -/s {stroke} bind def -/sh {show} bind def -/slc {setlinecap} bind def -/slj {setlinejoin} bind def -/slw {setlinewidth} bind def -/srgb {setrgbcolor} bind def -/rot {rotate} bind def -/sc {scale} bind def -/sd {setdash} bind def -/ff {findfont} bind def -/sf {setfont} bind def -/scf {scalefont} bind def -/sw {stringwidth} bind def -/tr {translate} bind def -/tnt {dup dup currentrgbcolor - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add srgb} - bind def -/shd {dup dup currentrgbcolor 4 -2 roll mul 4 -2 roll mul - 4 -2 roll mul srgb} bind def - /DrawEllipse { - /endangle exch def - /startangle exch def - /yrad exch def - /xrad exch def - /y exch def - /x exch def - /savematrix mtrx currentmatrix def - x y tr xrad yrad sc 0 0 1 startangle endangle arc - closepath - savematrix setmatrix - } def - -/$F2psBegin {$F2psDict begin /$F2psEnteredState save def} def -/$F2psEnd {$F2psEnteredState restore end} def - -$F2psBegin -10 setmiterlimit -0 slj 0 slc - 0.06000 0.06000 sc -% -% Fig objects follow -% -% -% here starts figure with depth 100 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1570 l 3375 1594 l 3525 1642 l 3375 1690 l 3525 1738 l - 3375 1786 l 3525 1834 l 3375 1882 l 3525 1930 l 3450 1954 l - - 3450 2100 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 50 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1350 l 4200 1350 l - 4200 1500 l gs col0 s gr -% Polyline -n 3450 2100 m 3450 2250 l 4200 2250 l - 4200 2025 l gs col0 s gr -% Polyline -n 3825 1350 m - 3825 1125 l gs col0 s gr -% Polyline -n 3825 2250 m - 3825 2475 l gs col0 s gr -% Polyline -n 2100 2250 m - 2100 2400 l gs col0 s gr -% Polyline -n 2100 1350 m - 2100 1200 l gs col0 s gr -% Polyline -n 2100 1200 m - 2100 1125 l gs col0 s gr -% Polyline -n 2100 2400 m - 2100 2475 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 0 -% Ellipse -7.500 slw -n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr - -% Polyline -0 slj -0 slc -n 4125 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4275 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1725 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1500 m - 4200 1650 l gs col-1 s gr -% Polyline -n 4200 1950 m - 4200 2100 l gs col-1 s gr -% Polyline -n 2101 2250 m - 2101 1950 l gs col-1 s gr -% Polyline -n 2101 1652 m - 2101 1352 l gs col-1 s gr -% Polyline -n 2250 1950 m - 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr -% Polyline -n 2101 1950 m 2250 1652 l 1950 1652 l - cp gs col7 1.00 shd ef gr gs col0 s gr -% here ends figure; -$F2psEnd -rs -showpage -%%Trailer -%EOF - -%%EndDocument - @endspecial 0 0 0 TeXcolorrgb 5573 458 a Fd(D)5654 473 -y Fc(4)p Black 0 0 0 TeXcolorrgb 5985 608 a Fd(R)6059 -623 y Fb(D)6117 632 y Fa(4)p Black 0 0 0 TeXcolorrgb -6623 571 a Fd(I)6666 586 y Fb(D)6724 595 y Fa(4)p Black -Black Black eop end -%%Trailer - -userdict /end-hook known{end-hook}if -%%EOF diff --git a/OSCAD/Examples/bridgeRectifier/diode_D4.pstex b/OSCAD/Examples/bridgeRectifier/diode_D4.pstex deleted file mode 100644 index 2a9db44..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D4.pstex +++ /dev/null @@ -1,187 +0,0 @@ -%!PS-Adobe-2.0 EPSF-2.0 -%%Title: diode_ref.fig -%%Creator: fig2dev Version 3.2 Patchlevel 5 -%%CreationDate: Tue Aug 28 14:11:31 2012 -%%For: yogesh@iml21.ee.iitb.ac.in (yogesh Save) -%%BoundingBox: 0 0 147 83 -%Magnification: 1.0000 -%%EndComments -/$F2psDict 200 dict def -$F2psDict begin -$F2psDict /mtrx matrix put -/col-1 {0 setgray} bind def -/col0 {0.000 0.000 0.000 srgb} bind def -/col1 {0.000 0.000 1.000 srgb} bind def -/col2 {0.000 1.000 0.000 srgb} bind def -/col3 {0.000 1.000 1.000 srgb} bind def -/col4 {1.000 0.000 0.000 srgb} bind def -/col5 {1.000 0.000 1.000 srgb} bind def -/col6 {1.000 1.000 0.000 srgb} bind def -/col7 {1.000 1.000 1.000 srgb} bind def -/col8 {0.000 0.000 0.560 srgb} bind def -/col9 {0.000 0.000 0.690 srgb} bind def -/col10 {0.000 0.000 0.820 srgb} bind def -/col11 {0.530 0.810 1.000 srgb} bind def -/col12 {0.000 0.560 0.000 srgb} bind def -/col13 {0.000 0.690 0.000 srgb} bind def -/col14 {0.000 0.820 0.000 srgb} bind def -/col15 {0.000 0.560 0.560 srgb} bind def -/col16 {0.000 0.690 0.690 srgb} bind def -/col17 {0.000 0.820 0.820 srgb} bind def -/col18 {0.560 0.000 0.000 srgb} bind def -/col19 {0.690 0.000 0.000 srgb} bind def -/col20 {0.820 0.000 0.000 srgb} bind def -/col21 {0.560 0.000 0.560 srgb} bind def -/col22 {0.690 0.000 0.690 srgb} bind def -/col23 {0.820 0.000 0.820 srgb} bind def -/col24 {0.500 0.190 0.000 srgb} bind def -/col25 {0.630 0.250 0.000 srgb} bind def -/col26 {0.750 0.380 0.000 srgb} bind def -/col27 {1.000 0.500 0.500 srgb} bind def -/col28 {1.000 0.630 0.630 srgb} bind def -/col29 {1.000 0.750 0.750 srgb} bind def -/col30 {1.000 0.880 0.880 srgb} bind def -/col31 {1.000 0.840 0.000 srgb} bind def - -end -save -newpath 0 83 moveto 0 0 lineto 147 0 lineto 147 83 lineto closepath clip newpath --116.3 149.2 translate -1 -1 scale - -/cp {closepath} bind def -/ef {eofill} bind def -/gr {grestore} bind def -/gs {gsave} bind def -/sa {save} bind def -/rs {restore} bind def -/l {lineto} bind def -/m {moveto} bind def -/rm {rmoveto} bind def -/n {newpath} bind def -/s {stroke} bind def -/sh {show} bind def -/slc {setlinecap} bind def -/slj {setlinejoin} bind def -/slw {setlinewidth} bind def -/srgb {setrgbcolor} bind def -/rot {rotate} bind def -/sc {scale} bind def -/sd {setdash} bind def -/ff {findfont} bind def -/sf {setfont} bind def -/scf {scalefont} bind def -/sw {stringwidth} bind def -/tr {translate} bind def -/tnt {dup dup currentrgbcolor - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add srgb} - bind def -/shd {dup dup currentrgbcolor 4 -2 roll mul 4 -2 roll mul - 4 -2 roll mul srgb} bind def - /DrawEllipse { - /endangle exch def - /startangle exch def - /yrad exch def - /xrad exch def - /y exch def - /x exch def - /savematrix mtrx currentmatrix def - x y tr xrad yrad sc 0 0 1 startangle endangle arc - closepath - savematrix setmatrix - } def - -/$F2psBegin {$F2psDict begin /$F2psEnteredState save def} def -/$F2psEnd {$F2psEnteredState restore end} def - -$F2psBegin -10 setmiterlimit -0 slj 0 slc - 0.06000 0.06000 sc -% -% Fig objects follow -% -% -% here starts figure with depth 100 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1570 l 3375 1594 l 3525 1642 l 3375 1690 l 3525 1738 l - 3375 1786 l 3525 1834 l 3375 1882 l 3525 1930 l 3450 1954 l - - 3450 2100 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 50 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1350 l 4200 1350 l - 4200 1500 l gs col0 s gr -% Polyline -n 3450 2100 m 3450 2250 l 4200 2250 l - 4200 2025 l gs col0 s gr -% Polyline -n 3825 1350 m - 3825 1125 l gs col0 s gr -% Polyline -n 3825 2250 m - 3825 2475 l gs col0 s gr -% Polyline -n 2100 2250 m - 2100 2400 l gs col0 s gr -% Polyline -n 2100 1350 m - 2100 1200 l gs col0 s gr -% Polyline -n 2100 1200 m - 2100 1125 l gs col0 s gr -% Polyline -n 2100 2400 m - 2100 2475 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 0 -% Ellipse -7.500 slw -n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr - -% Polyline -0 slj -0 slc -n 4125 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4275 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1725 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1500 m - 4200 1650 l gs col-1 s gr -% Polyline -n 4200 1950 m - 4200 2100 l gs col-1 s gr -% Polyline -n 2101 2250 m - 2101 1950 l gs col-1 s gr -% Polyline -n 2101 1652 m - 2101 1352 l gs col-1 s gr -% Polyline -n 2250 1950 m - 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr -% Polyline -n 2101 1950 m 2250 1652 l 1950 1652 l - cp gs col7 1.00 shd ef gr gs col0 s gr -% here ends figure; -$F2psEnd -rs -showpage -%%Trailer -%EOF diff --git a/OSCAD/Examples/bridgeRectifier/diode_D4.pstex_t b/OSCAD/Examples/bridgeRectifier/diode_D4.pstex_t deleted file mode 100644 index 068f296..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_D4.pstex_t +++ /dev/null @@ -1,19 +0,0 @@ -\begin{picture}(0,0)% -\includegraphics{diode_D4.pstex}% -\end{picture}% -\setlength{\unitlength}{3947sp}% -% -\begingroup\makeatletter\ifx\SetFigFont\undefined% -\gdef\SetFigFont#1#2#3#4#5{% - \reset@font\fontsize{#1}{#2pt}% - \fontfamily{#3}\fontseries{#4}\fontshape{#5}% - \selectfont}% -\fi\endgroup% -\begin{picture}(2435,1374)(1939,-1648) -\put(2251,-661){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$D_{4}$}% -}}}} -\put(3076,-961){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$R_{D_{4}}$}% -}}}} -\put(4351,-886){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$I_{D_{4}}$}% -}}}} -\end{picture}% diff --git a/OSCAD/Examples/bridgeRectifier/diode_Dref.pstex b/OSCAD/Examples/bridgeRectifier/diode_Dref.pstex deleted file mode 100644 index 2a9db44..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_Dref.pstex +++ /dev/null @@ -1,187 +0,0 @@ -%!PS-Adobe-2.0 EPSF-2.0 -%%Title: diode_ref.fig -%%Creator: fig2dev Version 3.2 Patchlevel 5 -%%CreationDate: Tue Aug 28 14:11:31 2012 -%%For: yogesh@iml21.ee.iitb.ac.in (yogesh Save) -%%BoundingBox: 0 0 147 83 -%Magnification: 1.0000 -%%EndComments -/$F2psDict 200 dict def -$F2psDict begin -$F2psDict /mtrx matrix put -/col-1 {0 setgray} bind def -/col0 {0.000 0.000 0.000 srgb} bind def -/col1 {0.000 0.000 1.000 srgb} bind def -/col2 {0.000 1.000 0.000 srgb} bind def -/col3 {0.000 1.000 1.000 srgb} bind def -/col4 {1.000 0.000 0.000 srgb} bind def -/col5 {1.000 0.000 1.000 srgb} bind def -/col6 {1.000 1.000 0.000 srgb} bind def -/col7 {1.000 1.000 1.000 srgb} bind def -/col8 {0.000 0.000 0.560 srgb} bind def -/col9 {0.000 0.000 0.690 srgb} bind def -/col10 {0.000 0.000 0.820 srgb} bind def -/col11 {0.530 0.810 1.000 srgb} bind def -/col12 {0.000 0.560 0.000 srgb} bind def -/col13 {0.000 0.690 0.000 srgb} bind def -/col14 {0.000 0.820 0.000 srgb} bind def -/col15 {0.000 0.560 0.560 srgb} bind def -/col16 {0.000 0.690 0.690 srgb} bind def -/col17 {0.000 0.820 0.820 srgb} bind def -/col18 {0.560 0.000 0.000 srgb} bind def -/col19 {0.690 0.000 0.000 srgb} bind def -/col20 {0.820 0.000 0.000 srgb} bind def -/col21 {0.560 0.000 0.560 srgb} bind def -/col22 {0.690 0.000 0.690 srgb} bind def -/col23 {0.820 0.000 0.820 srgb} bind def -/col24 {0.500 0.190 0.000 srgb} bind def -/col25 {0.630 0.250 0.000 srgb} bind def -/col26 {0.750 0.380 0.000 srgb} bind def -/col27 {1.000 0.500 0.500 srgb} bind def -/col28 {1.000 0.630 0.630 srgb} bind def -/col29 {1.000 0.750 0.750 srgb} bind def -/col30 {1.000 0.880 0.880 srgb} bind def -/col31 {1.000 0.840 0.000 srgb} bind def - -end -save -newpath 0 83 moveto 0 0 lineto 147 0 lineto 147 83 lineto closepath clip newpath --116.3 149.2 translate -1 -1 scale - -/cp {closepath} bind def -/ef {eofill} bind def -/gr {grestore} bind def -/gs {gsave} bind def -/sa {save} bind def -/rs {restore} bind def -/l {lineto} bind def -/m {moveto} bind def -/rm {rmoveto} bind def -/n {newpath} bind def -/s {stroke} bind def -/sh {show} bind def -/slc {setlinecap} bind def -/slj {setlinejoin} bind def -/slw {setlinewidth} bind def -/srgb {setrgbcolor} bind def -/rot {rotate} bind def -/sc {scale} bind def -/sd {setdash} bind def -/ff {findfont} bind def -/sf {setfont} bind def -/scf {scalefont} bind def -/sw {stringwidth} bind def -/tr {translate} bind def -/tnt {dup dup currentrgbcolor - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add - 4 -2 roll dup 1 exch sub 3 -1 roll mul add srgb} - bind def -/shd {dup dup currentrgbcolor 4 -2 roll mul 4 -2 roll mul - 4 -2 roll mul srgb} bind def - /DrawEllipse { - /endangle exch def - /startangle exch def - /yrad exch def - /xrad exch def - /y exch def - /x exch def - /savematrix mtrx currentmatrix def - x y tr xrad yrad sc 0 0 1 startangle endangle arc - closepath - savematrix setmatrix - } def - -/$F2psBegin {$F2psDict begin /$F2psEnteredState save def} def -/$F2psEnd {$F2psEnteredState restore end} def - -$F2psBegin -10 setmiterlimit -0 slj 0 slc - 0.06000 0.06000 sc -% -% Fig objects follow -% -% -% here starts figure with depth 100 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1570 l 3375 1594 l 3525 1642 l 3375 1690 l 3525 1738 l - 3375 1786 l 3525 1834 l 3375 1882 l 3525 1930 l 3450 1954 l - - 3450 2100 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 50 -% Polyline -0 slj -0 slc -7.500 slw -n 3450 1425 m 3450 1350 l 4200 1350 l - 4200 1500 l gs col0 s gr -% Polyline -n 3450 2100 m 3450 2250 l 4200 2250 l - 4200 2025 l gs col0 s gr -% Polyline -n 3825 1350 m - 3825 1125 l gs col0 s gr -% Polyline -n 3825 2250 m - 3825 2475 l gs col0 s gr -% Polyline -n 2100 2250 m - 2100 2400 l gs col0 s gr -% Polyline -n 2100 1350 m - 2100 1200 l gs col0 s gr -% Polyline -n 2100 1200 m - 2100 1125 l gs col0 s gr -% Polyline -n 2100 2400 m - 2100 2475 l gs col0 s gr -% here ends figure; -% -% here starts figure with depth 0 -% Ellipse -7.500 slw -n 4200 1800 165 165 0 360 DrawEllipse gs col-1 s gr - -% Polyline -0 slj -0 slc -n 4125 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4275 1800 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1725 m - 4200 1875 l gs col-1 s gr -% Polyline -n 4200 1500 m - 4200 1650 l gs col-1 s gr -% Polyline -n 4200 1950 m - 4200 2100 l gs col-1 s gr -% Polyline -n 2101 2250 m - 2101 1950 l gs col-1 s gr -% Polyline -n 2101 1652 m - 2101 1352 l gs col-1 s gr -% Polyline -n 2250 1950 m - 1950 1950 l gs 0.00 setgray ef gr gs col-1 s gr -% Polyline -n 2101 1950 m 2250 1652 l 1950 1652 l - cp gs col7 1.00 shd ef gr gs col0 s gr -% here ends figure; -$F2psEnd -rs -showpage -%%Trailer -%EOF diff --git a/OSCAD/Examples/bridgeRectifier/diode_Dref.pstex_t b/OSCAD/Examples/bridgeRectifier/diode_Dref.pstex_t deleted file mode 100644 index 65c5d99..0000000 --- a/OSCAD/Examples/bridgeRectifier/diode_Dref.pstex_t +++ /dev/null @@ -1,19 +0,0 @@ -\begin{picture}(0,0)% -\includegraphics{diode_Dref.pstex}% -\end{picture}% -\setlength{\unitlength}{3947sp}% -% -\begingroup\makeatletter\ifx\SetFigFont\undefined% -\gdef\SetFigFont#1#2#3#4#5{% - \reset@font\fontsize{#1}{#2pt}% - \fontfamily{#3}\fontseries{#4}\fontshape{#5}% - \selectfont}% -\fi\endgroup% -\begin{picture}(2435,1374)(1939,-1648) -\put(2251,-661){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$D_{dnumber}$}% -}}}} -\put(3076,-961){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$R_{D_{dnumber}}$}% -}}}} -\put(4351,-886){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$I_{D_{dnumber}}$}% -}}}} -\end{picture}% diff --git a/OSCAD/Examples/bridgeRectifier/latfont b/OSCAD/Examples/bridgeRectifier/latfont deleted file mode 100644 index 90e1eb3..0000000 --- a/OSCAD/Examples/bridgeRectifier/latfont +++ /dev/null @@ -1,8 +0,0 @@ -echo {\\input{$*.pstex_t}} >& dummy_font.tex -cat latfont1.tex dummy_font.tex latfont2.tex >& dummy_fig.tex -latex dummy_fig.tex -dvips -E -o dummy_fig.eps dummy_fig.dvi -mv dummy_fig.eps $*.eps -rm dummy_fig.* -rm -rf dummy_font.tex -evince $1.eps & diff --git a/OSCAD/Examples/bridgeRectifier/latfont1.tex b/OSCAD/Examples/bridgeRectifier/latfont1.tex deleted file mode 100644 index e6301a4..0000000 --- a/OSCAD/Examples/bridgeRectifier/latfont1.tex +++ /dev/null @@ -1,20 +0,0 @@ -\documentclass[12pt]{book} -\textwidth 6.5in -\textheight 9.0in -\topmargin 0.0in -\oddsidemargin 0.2in -\evensidemargin 0.2in -\textfloatsep 0.6cm -\abovecaptionskip 0.1cm -\usepackage[dvips]{graphicx} -\usepackage{makeidx} -\usepackage{epsfig} -\usepackage{color} -\setlength{\textwidth}{50cm} -\setlength{\textheight}{50cm} -\begin{document} -\pagestyle{empty} - -\begin{center} -%\resizebox{!}{5cm}{\input{cap_trns.pstex_t}} - diff --git a/OSCAD/Examples/bridgeRectifier/latfont2.tex b/OSCAD/Examples/bridgeRectifier/latfont2.tex deleted file mode 100644 index 3f4cd92..0000000 --- a/OSCAD/Examples/bridgeRectifier/latfont2.tex +++ /dev/null @@ -1,2 +0,0 @@ -\end{center} -\end{document}
\ No newline at end of file diff --git a/OSCAD/Examples/bridgeRectifierFilter/1n4007.lib b/OSCAD/Examples/bridgeRectifierFilter/1n4007.lib deleted file mode 100644 index e95f7ea..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/1n4007.lib +++ /dev/null @@ -1,3 +0,0 @@ -.model 1n4007 D( VJ=0.7 CJO=1E-11 RS=0.0341512 IS=7.02767e-09 AF=1 -+ M=0.5 N=1.80803 BV=1000 FC=0.5 IBV=5e-08 -+ TT=1E-07 EG=1.05743 XTI=5 KF=0 )
\ No newline at end of file diff --git a/OSCAD/Examples/bridgeRectifierFilter/analysis b/OSCAD/Examples/bridgeRectifierFilter/analysis deleted file mode 100644 index 888b3aa..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 100e-06 40e-03 0e-00 diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.bak b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.bak deleted file mode 100644 index 0708079..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.bak +++ /dev/null @@ -1,121 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 20 November 2012 11:18:10 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot -# -DEF vplot U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -400 0 300 R 50 50 1 1 O -X - 2 400 0 300 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# vplot1 -# -DEF vplot1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.lib b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.lib deleted file mode 100644 index c2529f8..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter-cache.lib +++ /dev/null @@ -1,121 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 09 December 2012 03:22:19 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot -# -DEF vplot U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 2 300 0 200 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot1 -# -DEF vplot1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.bak b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.bak deleted file mode 100644 index acc6cf8..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.bak +++ /dev/null @@ -1,209 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 20 November 2012 11:18:10 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:bridgeRectifierFilter-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 nov 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3750 4400 0 80 Italic 0 -Bridge Rectifier with Capacitor Filter -Wire Wire Line - 5850 2900 5850 2850 -Wire Wire Line - 3700 2950 3700 2650 -Connection ~ 5350 4100 -Wire Wire Line - 5350 4100 5350 3900 -Connection ~ 5850 2900 -Connection ~ 5650 2900 -Wire Wire Line - 6200 3300 6200 2900 -Wire Wire Line - 6200 2900 4250 2900 -Connection ~ 3700 2950 -Connection ~ 4250 3400 -Wire Wire Line - 4250 3400 3850 3400 -Wire Wire Line - 3850 3400 3850 2950 -Wire Wire Line - 3850 2950 3400 2950 -Wire Wire Line - 3400 2950 3400 3000 -Connection ~ 4850 2900 -Wire Wire Line - 5650 2900 5650 3300 -Wire Wire Line - 4250 3700 4250 3300 -Wire Wire Line - 4850 3700 4850 3300 -Wire Wire Line - 5650 4100 5650 3800 -Connection ~ 4850 4100 -Wire Wire Line - 3400 3900 3400 4000 -Wire Wire Line - 3400 4000 3850 4000 -Wire Wire Line - 3850 4000 3850 3600 -Wire Wire Line - 3850 3600 4850 3600 -Connection ~ 4850 3600 -Connection ~ 4500 3600 -Wire Wire Line - 4250 4100 6200 4100 -Wire Wire Line - 6200 4100 6200 3700 -Connection ~ 5650 4100 -Connection ~ 5200 4100 -Wire Wire Line - 5200 4100 5200 4200 -Wire Wire Line - 4500 3600 4500 2650 -$Comp -L PWR_FLAG #FLG01 -U 1 1 50852DDA -P 5350 3900 -F 0 "#FLG01" H 5350 4170 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4130 30 0000 C CNN - 1 5350 3900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5070FDD5 -P 5200 4200 -F 0 "#PWR02" H 5200 4200 30 0001 C CNN -F 1 "GND" H 5200 4130 30 0001 C CNN - 1 5200 4200 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U2 -U 1 1 5070F9F8 -P 5850 2550 -F 0 "U2" H 5700 2650 50 0000 C CNN -F 1 "VPLOT1" H 6000 2650 50 0000 C CNN - 1 5850 2550 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT U1 -U 1 1 5070F9E6 -P 4100 2650 -F 0 "U1" H 3950 2750 50 0000 C CNN -F 1 "VPLOT" H 4250 2750 50 0000 C CNN - 1 4100 2650 - 1 0 0 -1 -$EndComp -$Comp -L SINE V1 -U 1 1 5070F9A6 -P 3400 3450 -F 0 "V1" H 3200 3550 60 0000 C CNN -F 1 "SINE" H 3200 3400 60 0000 C CNN -F 2 "R1" H 3100 3450 60 0000 C CNN - 1 3400 3450 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 5070F977 -P 6200 3500 -F 0 "C1" H 6250 3600 50 0000 L CNN -F 1 "1e-06" H 6250 3400 50 0000 L CNN - 1 6200 3500 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D4 -U 1 1 5070F878 -P 4850 3900 -F 0 "D4" H 4850 4000 40 0000 C CNN -F 1 "1n4007" H 4850 3800 40 0000 C CNN - 1 4850 3900 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D2 -U 1 1 5070F85B -P 4850 3100 -F 0 "D2" H 4850 3200 40 0000 C CNN -F 1 "1n4007" H 4850 3000 40 0000 C CNN - 1 4850 3100 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D3 -U 1 1 5070F84B -P 4250 3900 -F 0 "D3" H 4250 4000 40 0000 C CNN -F 1 "1n4007" H 4250 3800 40 0000 C CNN - 1 4250 3900 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 5070F83D -P 4250 3100 -F 0 "D1" H 4250 3200 40 0000 C CNN -F 1 "1n4007" H 4250 3000 40 0000 C CNN - 1 4250 3100 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 5070F82C -P 5650 3550 -F 0 "R1" V 5730 3550 50 0000 C CNN -F 1 "100000" V 5650 3550 50 0000 C CNN - 1 5650 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir deleted file mode 100644 index 4597fee..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Sunday 09 December 2012 03:22:39 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 3 VPLOT1 -U1 4 1 VPLOT -V1 4 1 SINE -C1 3 0 1e-06 -D4 0 1 1n4007 -D2 1 3 1n4007 -D3 0 4 1n4007 -D1 4 3 1n4007 -R1 3 0 100000 - -.end diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt deleted file mode 100644 index f6731c0..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 03:22:39 pm ist -.include 1n4007.lib - -* Plotting option vplot1 -* Plotting option vplot -v1 4 1 sine(0 5 50 0 0) -c1 3 0 1e-06 -d4 0 1 1n4007 -d2 1 3 1n4007 -d3 0 4 1n4007 -d1 4 3 1n4007 -r1 3 0 100000 - -.tran 100e-06 40e-03 0e-00 -.plot v(3) -.plot v(4)-v(1) -.end diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt.sol b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt.sol deleted file mode 100644 index 6403344..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.ckt.sol +++ /dev/null @@ -1,10 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -V 4 1 0.0000000000 0.0000000000 -C 3 0 0.0000000000 0.0000000000 -I 0 3 -0.0000000000 0.0000000000 -D 0 1 -0.0000000000 0.0000000000 -D 1 3 0.0000000000 0.0000000000 -D 0 4 -0.0000000000 0.0000000000 -D 4 3 0.0000000000 0.0000000000 -R 3 0 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.out b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.out deleted file mode 100644 index f4a26cd..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: sunday 09 december 2012 03:22:39 pm ist -.include 1n4007.lib - -* Plotting option vplot1 -* Plotting option vplot -v1 4 1 sine(0 5 50 0 0) -c1 3 0 1e-06 -d4 0 1 1n4007 -d2 1 3 1n4007 -d3 0 4 1n4007 -d1 4 3 1n4007 -r1 3 0 100000 - -.tran 100e-06 40e-03 0e-00 - -* Control Statements -.control -run -plot v(3) -plot v(4)-v(1) -.endc -.end diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.net b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.net deleted file mode 100644 index 5ff5b10..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.net +++ /dev/null @@ -1,96 +0,0 @@ -# EESchema Netlist Version 1.1 created Tuesday 02 April 2013 03:03:04 PM IST -( - ( /5070F9F8 $noname U2 VPLOT1 {Lib=VPLOT1} - ( 1 N-000003 ) - ) - ( /5070F9E6 $noname U1 VPLOT {Lib=VPLOT} - ( 1 N-000004 ) - ( 2 N-000001 ) - ) - ( /5070F9A6 R1 V1 SINE {Lib=SINE} - ( 1 N-000004 ) - ( 2 N-000001 ) - ) - ( /5070F977 $noname C1 1e-06 {Lib=C} - ( 1 N-000003 ) - ( 2 GND ) - ) - ( /5070F878 $noname D4 1n4007 {Lib=DIODE} - ( 1 GND ) - ( 2 N-000001 ) - ) - ( /5070F85B $noname D2 1n4007 {Lib=DIODE} - ( 1 N-000001 ) - ( 2 N-000003 ) - ) - ( /5070F84B $noname D3 1n4007 {Lib=DIODE} - ( 1 GND ) - ( 2 N-000004 ) - ) - ( /5070F83D $noname D1 1n4007 {Lib=DIODE} - ( 1 N-000004 ) - ( 2 N-000003 ) - ) - ( /5070F82C $noname R1 100000 {Lib=R} - ( 1 N-000003 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component V1 - 1_pin -$endlist -$component C1 - SM* - C? - C1-1 -$endlist -$component D4 - D? - S* -$endlist -$component D2 - D? - S* -$endlist -$component D3 - D? - S* -$endlist -$component D1 - D? - S* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "" "" - V1 2 - D2 1 - D4 2 - U1 2 -Net 2 "GND" "GND" - R1 2 - D3 1 - D4 1 - C1 2 -Net 3 "" "" - C1 1 - U2 1 - D2 2 - D1 2 - R1 1 -Net 4 "" "" - V1 1 - D3 2 - D1 1 - U1 1 -} -#End diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.pro b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.pro deleted file mode 100644 index 50c35d1..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 22 October 2012 04:57:56 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.proj b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.proj deleted file mode 100644 index ec5c563..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile bridgeRectifierFilter.sch diff --git a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.sch b/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.sch deleted file mode 100644 index 725f87a..0000000 --- a/OSCAD/Examples/bridgeRectifierFilter/bridgeRectifierFilter.sch +++ /dev/null @@ -1,213 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 09 December 2012 03:22:19 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:bridgeRectifierFilter-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 4400 2650 4500 2650 -Wire Wire Line - 5850 2900 5850 2850 -Wire Wire Line - 3700 2950 3700 2650 -Connection ~ 5350 4100 -Wire Wire Line - 5350 4100 5350 3900 -Connection ~ 5850 2900 -Connection ~ 5650 2900 -Wire Wire Line - 6200 3300 6200 2900 -Wire Wire Line - 6200 2900 4250 2900 -Connection ~ 3700 2950 -Connection ~ 4250 3400 -Wire Wire Line - 4250 3400 3850 3400 -Wire Wire Line - 3850 3400 3850 2950 -Wire Wire Line - 3850 2950 3400 2950 -Wire Wire Line - 3400 2950 3400 3000 -Connection ~ 4850 2900 -Wire Wire Line - 5650 2900 5650 3300 -Wire Wire Line - 4250 3700 4250 3300 -Wire Wire Line - 4850 3700 4850 3300 -Wire Wire Line - 5650 4100 5650 3800 -Connection ~ 4850 4100 -Wire Wire Line - 3400 3900 3400 4000 -Wire Wire Line - 3400 4000 3850 4000 -Wire Wire Line - 3850 4000 3850 3600 -Wire Wire Line - 3850 3600 4850 3600 -Connection ~ 4850 3600 -Connection ~ 4500 3600 -Wire Wire Line - 4250 4100 6200 4100 -Wire Wire Line - 6200 4100 6200 3700 -Connection ~ 5650 4100 -Connection ~ 5200 4100 -Wire Wire Line - 5200 4100 5200 4200 -Wire Wire Line - 4500 2650 4500 3600 -Wire Wire Line - 3700 2650 3800 2650 -Text Notes 3750 4400 0 80 Italic 0 -Bridge Rectifier with Capacitor Filter -$Comp -L PWR_FLAG #FLG01 -U 1 1 50852DDA -P 5350 3900 -F 0 "#FLG01" H 5350 4170 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4130 30 0000 C CNN - 1 5350 3900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5070FDD5 -P 5200 4200 -F 0 "#PWR02" H 5200 4200 30 0001 C CNN -F 1 "GND" H 5200 4130 30 0001 C CNN - 1 5200 4200 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT1 U2 -U 1 1 5070F9F8 -P 5850 2550 -F 0 "U2" H 5700 2650 50 0000 C CNN -F 1 "VPLOT1" H 6000 2650 50 0000 C CNN - 1 5850 2550 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT U1 -U 1 1 5070F9E6 -P 4100 2650 -F 0 "U1" H 3950 2750 50 0000 C CNN -F 1 "VPLOT" H 4250 2750 50 0000 C CNN - 1 4100 2650 - 1 0 0 -1 -$EndComp -$Comp -L SINE V1 -U 1 1 5070F9A6 -P 3400 3450 -F 0 "V1" H 3200 3550 60 0000 C CNN -F 1 "SINE" H 3200 3400 60 0000 C CNN -F 2 "R1" H 3100 3450 60 0000 C CNN - 1 3400 3450 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 5070F977 -P 6200 3500 -F 0 "C1" H 6250 3600 50 0000 L CNN -F 1 "1e-06" H 6250 3400 50 0000 L CNN - 1 6200 3500 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D4 -U 1 1 5070F878 -P 4850 3900 -F 0 "D4" H 4850 4000 40 0000 C CNN -F 1 "1n4007" H 4850 3800 40 0000 C CNN - 1 4850 3900 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D2 -U 1 1 5070F85B -P 4850 3100 -F 0 "D2" H 4850 3200 40 0000 C CNN -F 1 "1n4007" H 4850 3000 40 0000 C CNN - 1 4850 3100 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D3 -U 1 1 5070F84B -P 4250 3900 -F 0 "D3" H 4250 4000 40 0000 C CNN -F 1 "1n4007" H 4250 3800 40 0000 C CNN - 1 4250 3900 - 0 -1 -1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 5070F83D -P 4250 3100 -F 0 "D1" H 4250 3200 40 0000 C CNN -F 1 "1n4007" H 4250 3000 40 0000 C CNN - 1 4250 3100 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 5070F82C -P 5650 3550 -F 0 "R1" V 5730 3550 50 0000 C CNN -F 1 "100000" V 5650 3550 50 0000 C CNN - 1 5650 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/frequencyDivider/analysis b/OSCAD/Examples/frequencyDivider/analysis deleted file mode 100644 index 1f89c69..0000000 --- a/OSCAD/Examples/frequencyDivider/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 50e-09 5e-06 0e-00 diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider-cache.bak b/OSCAD/Examples/frequencyDivider/frequencyDivider-cache.bak deleted file mode 100644 index 1434b97..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider-cache.bak +++ /dev/null @@ -1,171 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 09:00:05 AM IST -#encoding utf-8 -# -# 74LS109 -# -DEF 74LS109 U 0 30 Y Y 2 F N -F0 "U" 0 100 60 H V C CNN -F1 "74LS109" 0 -100 60 H V C CNN -DRAW -S -350 -400 350 400 0 0 0 N -X GND 8 -250 -400 0 U 60 60 0 0 W N -X VCC 16 -250 400 0 U 60 60 0 0 W N -X Cd 1 0 -700 300 U 60 60 1 1 I I -X J 2 -650 250 300 R 60 60 1 1 I -X K 3 -650 -250 300 R 60 60 1 1 I I -X Cp 4 -650 0 300 R 60 60 1 1 I C -X Sd 5 0 700 300 D 60 60 1 1 I I -X Q 6 650 250 300 L 60 60 1 1 O -X ~Q 7 650 -250 300 L 60 60 1 1 O I -X ~Q 9 750 -250 400 L 60 60 2 1 I I -X Q 10 750 250 400 L 60 60 2 1 I -X Sd 11 0 800 400 D 60 60 2 1 I I -X Cp 12 -750 0 400 R 60 60 2 1 I C -X K 13 -750 -250 400 R 60 60 2 1 I I -X J 14 -750 250 400 R 60 60 2 1 I -X Cd 15 0 -800 400 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# CP -# -DEF CP C 0 10 N N 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "CP" 50 -100 50 H V L CNN -ALIAS CAPAPOL -$FPLIST - CP* - SM* -$ENDFPLIST -DRAW -P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N -P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F -X ~ 1 0 200 150 D 40 40 1 1 P -X ~ 2 0 -200 150 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# IC -# -DEF IC U? 0 0 Y N 1 F N -F0 "U?" 0 270 30 H V C CNN -F1 "IC" 0 230 30 H V C CNN -DRAW -X ic 1 0 0 0 U 20 20 0 0 P -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# LM555N -# -DEF LM555N X 0 40 Y Y 1 F N -F0 "X" 0 100 70 H V C CNN -F1 "LM555N" 0 -100 70 H V C CNN -DRAW -X GND 1 0 -400 0 U 60 60 0 0 W N -X VCC 8 0 400 0 D 60 60 0 0 W N -S -400 -400 400 400 0 1 0 N -X TR 2 -700 200 300 R 60 60 1 1 I -X Q 3 700 200 300 L 60 60 1 1 O -X R 4 -700 -300 300 R 60 60 1 1 I I -X CV 5 -700 -50 300 R 60 60 1 1 I -X THR 6 700 -200 300 L 60 60 1 1 I -X DIS 7 700 0 300 L 60 60 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider-cache.lib b/OSCAD/Examples/frequencyDivider/frequencyDivider-cache.lib deleted file mode 100644 index 497025f..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider-cache.lib +++ /dev/null @@ -1,171 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 10:57:17 AM IST -#encoding utf-8 -# -# 74LS109 -# -DEF 74LS109 U 0 30 Y Y 2 F N -F0 "U" 0 100 60 H V C CNN -F1 "74LS109" 0 -100 60 H V C CNN -DRAW -S -350 -400 350 400 0 0 0 N -X GND 8 -250 -400 0 U 60 60 0 0 W N -X VCC 16 -250 400 0 U 60 60 0 0 W N -X Cd 1 0 -700 300 U 60 60 1 1 I I -X J 2 -650 250 300 R 60 60 1 1 I -X K 3 -650 -250 300 R 60 60 1 1 I I -X Cp 4 -650 0 300 R 60 60 1 1 I C -X Sd 5 0 700 300 D 60 60 1 1 I I -X Q 6 650 250 300 L 60 60 1 1 O -X ~Q 7 650 -250 300 L 60 60 1 1 O I -X ~Q 9 750 -250 400 L 60 60 2 1 I I -X Q 10 750 250 400 L 60 60 2 1 I -X Sd 11 0 800 400 D 60 60 2 1 I I -X Cp 12 -750 0 400 R 60 60 2 1 I C -X K 13 -750 -250 400 R 60 60 2 1 I I -X J 14 -750 250 400 R 60 60 2 1 I -X Cd 15 0 -800 400 U 60 60 2 1 I I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# CP -# -DEF CP C 0 10 N N 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "CP" 50 -100 50 H V L CNN -ALIAS CAPAPOL -$FPLIST - CP* - SM* -$ENDFPLIST -DRAW -P 4 0 1 8 -100 50 -100 -50 100 -50 100 50 N -P 4 0 1 0 -50 50 -50 -20 50 -20 50 50 F -X ~ 1 0 200 150 D 40 40 1 1 P -X ~ 2 0 -200 150 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# IC -# -DEF IC U? 0 0 Y N 1 F N -F0 "U?" 0 270 30 H V C CNN -F1 "IC" 0 230 30 H V C CNN -DRAW -X ic 1 0 0 0 U 20 20 0 0 P -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# LM555N -# -DEF LM555N X 0 40 Y Y 1 F N -F0 "X" 0 100 70 H V C CNN -F1 "LM555N" 0 -100 70 H V C CNN -DRAW -X GND 1 0 -400 0 U 60 60 0 0 W N -X VCC 8 0 400 0 D 60 60 0 0 W N -S -400 -400 400 400 0 1 0 N -X TR 2 -700 200 300 R 60 60 1 1 I -X Q 3 700 200 300 L 60 60 1 1 O -X R 4 -700 -300 300 R 60 60 1 1 I I -X CV 5 -700 -50 300 R 60 60 1 1 I -X THR 6 700 -200 300 L 60 60 1 1 I -X DIS 7 700 0 300 L 60 60 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.bak b/OSCAD/Examples/frequencyDivider/frequencyDivider.bak deleted file mode 100644 index 48303d3..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.bak +++ /dev/null @@ -1,280 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 09:00:05 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:convergenceAidSpice -LIBS:frequencyDivider-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U1 -U 2 1 50CE9193 -P 7700 3000 -F 0 "U1" H 7550 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 7850 3100 50 0000 C CNN - 2 7700 3000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CE918C -P 6300 3000 -F 0 "U1" H 6150 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 6450 3100 50 0000 C CNN - 1 6300 3000 - 1 0 0 -1 -$EndComp -Connection ~ 4650 4100 -Wire Wire Line - 4650 4100 4650 4050 -Connection ~ 6600 2850 -Wire Wire Line - 7050 4600 6600 4600 -Wire Wire Line - 6600 4600 6600 2850 -Connection ~ 6300 3350 -Wire Wire Line - 6300 3300 6300 3900 -Connection ~ 6100 3350 -Wire Wire Line - 6300 3900 6400 3900 -Wire Wire Line - 6300 3350 5900 3350 -Wire Wire Line - 6400 2850 6400 3650 -Wire Wire Line - 6100 4550 6100 4100 -Wire Wire Line - 3650 4700 4850 4700 -Wire Wire Line - 3650 4700 3650 4050 -Wire Wire Line - 3650 2700 4450 2700 -Wire Wire Line - 3650 2700 3650 3150 -Wire Wire Line - 5900 3550 6000 3550 -Wire Wire Line - 6000 3550 6000 3000 -Wire Wire Line - 6000 3000 4150 3000 -Wire Wire Line - 4150 3000 4150 3400 -Connection ~ 4000 3400 -Wire Wire Line - 4150 3400 4000 3400 -Wire Wire Line - 4000 4150 4000 4000 -Connection ~ 4200 4100 -Wire Wire Line - 4500 3350 4200 3350 -Wire Wire Line - 4200 3350 4200 4100 -Wire Wire Line - 4300 4400 5200 4400 -Connection ~ 5700 4550 -Wire Wire Line - 5700 4550 5700 4300 -Connection ~ 4850 4550 -Wire Wire Line - 4850 4700 4850 4550 -Connection ~ 5200 4550 -Connection ~ 5200 4400 -Wire Wire Line - 5200 4550 5200 3950 -Wire Wire Line - 5900 3750 5900 4100 -Wire Wire Line - 4450 2700 4450 2850 -Connection ~ 4450 2850 -Connection ~ 5200 2850 -Wire Wire Line - 5900 4550 5900 4800 -Connection ~ 5900 4550 -Connection ~ 4450 2700 -Wire Wire Line - 4500 3850 4400 3850 -Wire Wire Line - 4400 3850 4400 2850 -Connection ~ 4400 2850 -Wire Wire Line - 4300 4000 4300 3600 -Wire Wire Line - 4300 3600 4500 3600 -Wire Wire Line - 4000 3350 4000 3500 -Wire Wire Line - 5900 4100 4000 4100 -Connection ~ 4000 4100 -Wire Wire Line - 6100 3350 6100 3600 -Wire Wire Line - 4000 4550 6400 4550 -Wire Wire Line - 6400 4550 6400 4150 -Connection ~ 6100 4550 -Wire Wire Line - 5200 2850 5200 3150 -Wire Wire Line - 4000 2850 7050 2850 -Wire Wire Line - 7050 2850 7050 3200 -Connection ~ 6400 2850 -Wire Wire Line - 7700 3650 7700 3300 -$Comp -L IC U2 -U 1 1 50CE8F30 -P 4650 4050 -F 0 "U2" H 4650 4320 30 0000 C CNN -F 1 "IC" H 4650 4280 30 0000 C CNN - 1 4650 4050 - 1 0 0 -1 -$EndComp -NoConn ~ 7700 4150 -$Comp -L 74LS109 U3 -U 1 1 50C1C9BA -P 7050 3900 -F 0 "U3" H 7050 4000 60 0000 C CNN -F 1 "74LS109" H 7050 3800 60 0000 C CNN - 1 7050 3900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 50A93D02 -P 5900 4800 -F 0 "#PWR01" H 5900 4800 30 0001 C CNN -F 1 "GND" H 5900 4730 30 0001 C CNN - 1 5900 4800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50A93CC0 -P 5700 4300 -F 0 "#FLG02" H 5700 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN - 1 5700 4300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 50A93CB7 -P 5200 2850 -F 0 "#FLG03" H 5200 3120 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 3080 30 0000 C CNN - 1 5200 2850 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 50A93C56 -P 3650 3600 -F 0 "v1" H 3450 3700 60 0000 C CNN -F 1 "5" H 3450 3550 60 0000 C CNN -F 2 "R1" H 3350 3600 60 0000 C CNN - 1 3650 3600 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A93BFE -P 6100 3850 -F 0 "R3" V 6180 3850 50 0000 C CNN -F 1 "1000" V 6100 3850 50 0000 C CNN - 1 6100 3850 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 50A93ACA -P 4300 4200 -F 0 "C2" H 4350 4300 50 0000 L CNN -F 1 "0.01e-6" H 4350 4100 50 0000 L CNN - 1 4300 4200 - 1 0 0 -1 -$EndComp -$Comp -L CP C1 -U 1 1 50A93893 -P 4000 4350 -F 0 "C1" H 4050 4450 50 0000 L CNN -F 1 "100e-12" H 4050 4250 50 0000 L CNN - 1 4000 4350 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A93858 -P 4000 3750 -F 0 "R2" V 4080 3750 50 0000 C CNN -F 1 "10000" V 4000 3750 50 0000 C CNN - 1 4000 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A93852 -P 4000 3100 -F 0 "R1" V 4080 3100 50 0000 C CNN -F 1 "1000" V 4000 3100 50 0000 C CNN - 1 4000 3100 - 1 0 0 -1 -$EndComp -$Comp -L LM555N X1 -U 1 1 50A937B9 -P 5200 3550 -F 0 "X1" H 5200 3650 70 0000 C CNN -F 1 "LM555N" H 5200 3450 70 0000 C CNN - 1 5200 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir b/OSCAD/Examples/frequencyDivider/frequencyDivider.cir deleted file mode 100644 index 5989740..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 10:57:14 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 2 VPLOT8_1 -U2 5 IC -U3 3 3 0 6 3 2 1 0 3 74LS109 -v1 3 0 5 -R3 6 0 1000 -C2 7 0 0.01e-6 -C1 5 0 100e-12 -R2 8 5 10000 -R1 3 8 1000 -X1 0 5 6 3 7 5 8 3 LM555N - -.end diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.ckt b/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.ckt deleted file mode 100644 index 293ca2e..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.ckt +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:14 am ist -.include lm555n.sub - -* Plotting option vplot8_1 -.ic v(5)=0 -* 74ls109 -v1 3 0 5 -r3 6 0 1000 -c2 7 0 0.01e-6 -c1 5 0 100e-12 -r2 8 5 10000 -r1 3 8 1000 -x1 0 5 6 3 7 5 8 3 lm555n -a1 [3 0 6 3 3] [3_in 0_in 6_in 3_in 3_in] u3adc -a2 3_in ~0_in 6_in ~3_in ~3_in 2_out 1_out u3 -a3 [2_out 1_out] [2 1] u3dac -.model u3 d_jkff -.model u3adc adc_bridge(in_low=0.8 in_high=2.0) -.model u3dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 50e-09 5e-06 0e-00 -.plot v(6) v(2) -.end diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.out b/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.out deleted file mode 100644 index 97db1fc..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.cir.out +++ /dev/null @@ -1,28 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:14 am ist -.include lm555n.sub - -* Plotting option vplot8_1 -.ic v(5)=0 -* 74ls109 -v1 3 0 5 -r3 6 0 1000 -c2 7 0 0.01e-6 -c1 5 0 100e-12 -r2 8 5 10000 -r1 3 8 1000 -x1 0 5 6 3 7 5 8 3 lm555n -a1 [3 0 6 3 3] [3_in 0_in 6_in 3_in 3_in] u3adc -a2 3_in ~0_in 6_in ~3_in ~3_in 2_out 1_out u3 -a3 [2_out 1_out] [2 1] u3dac -.model u3 d_jkff -.model u3adc adc_bridge(in_low=0.8 in_high=2.0) -.model u3dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 50e-09 5e-06 0e-00 - -* Control Statements -.control -run -plot v(6) v(2) -.endc -.end diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.pro b/OSCAD/Examples/frequencyDivider/frequencyDivider.pro deleted file mode 100644 index a4e7e69..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 17 December 2012 08:48:56 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=regul -LibName6=74xx -LibName7=cmos4000 -LibName8=adc-dac -LibName9=memory -LibName10=xilinx -LibName11=special -LibName12=microcontrollers -LibName13=dsp -LibName14=microchip -LibName15=analog_switches -LibName16=motorola -LibName17=texas -LibName18=intel -LibName19=audio -LibName20=interface -LibName21=digital-audio -LibName22=philips -LibName23=display -LibName24=cypress -LibName25=siliconi -LibName26=opto -LibName27=atmel -LibName28=contrib -LibName29=valves -LibName30=analogSpice -LibName31=converterSpice -LibName32=digitalSpice -LibName33=linearSpice -LibName34=measurementSpice -LibName35=portSpice -LibName36=sourcesSpice -LibName37=convergenceAidSpice diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.proj b/OSCAD/Examples/frequencyDivider/frequencyDivider.proj deleted file mode 100644 index 0a193f0..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile IC555AstableMultivibrator.sch diff --git a/OSCAD/Examples/frequencyDivider/frequencyDivider.sch b/OSCAD/Examples/frequencyDivider/frequencyDivider.sch deleted file mode 100644 index 3f76d3a..0000000 --- a/OSCAD/Examples/frequencyDivider/frequencyDivider.sch +++ /dev/null @@ -1,280 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 10:57:17 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:convergenceAidSpice -LIBS:frequencyDivider-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U1 -U 2 1 50CE9193 -P 7700 3000 -F 0 "U1" H 7550 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 7850 3100 50 0000 C CNN - 2 7700 3000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CE918C -P 6300 3000 -F 0 "U1" H 6150 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 6450 3100 50 0000 C CNN - 1 6300 3000 - 1 0 0 -1 -$EndComp -Connection ~ 4650 4100 -Wire Wire Line - 4650 4100 4650 4050 -Connection ~ 6600 2850 -Wire Wire Line - 7050 4600 6600 4600 -Wire Wire Line - 6600 4600 6600 2850 -Connection ~ 6300 3350 -Wire Wire Line - 6300 3300 6300 3900 -Connection ~ 6100 3350 -Wire Wire Line - 6300 3900 6400 3900 -Wire Wire Line - 6300 3350 5900 3350 -Wire Wire Line - 6400 2850 6400 3650 -Wire Wire Line - 6100 4550 6100 4100 -Wire Wire Line - 3650 4700 4850 4700 -Wire Wire Line - 3650 4700 3650 4050 -Wire Wire Line - 3650 2700 4450 2700 -Wire Wire Line - 3650 2700 3650 3150 -Wire Wire Line - 5900 3550 6000 3550 -Wire Wire Line - 6000 3550 6000 3000 -Wire Wire Line - 6000 3000 4150 3000 -Wire Wire Line - 4150 3000 4150 3400 -Connection ~ 4000 3400 -Wire Wire Line - 4150 3400 4000 3400 -Wire Wire Line - 4000 4150 4000 4000 -Connection ~ 4200 4100 -Wire Wire Line - 4500 3350 4200 3350 -Wire Wire Line - 4200 3350 4200 4100 -Wire Wire Line - 4300 4400 5200 4400 -Connection ~ 5700 4550 -Wire Wire Line - 5700 4550 5700 4300 -Connection ~ 4850 4550 -Wire Wire Line - 4850 4700 4850 4550 -Connection ~ 5200 4550 -Connection ~ 5200 4400 -Wire Wire Line - 5200 4550 5200 3950 -Wire Wire Line - 5900 3750 5900 4100 -Wire Wire Line - 4450 2700 4450 2850 -Connection ~ 4450 2850 -Connection ~ 5200 2850 -Wire Wire Line - 5900 4550 5900 4800 -Connection ~ 5900 4550 -Connection ~ 4450 2700 -Wire Wire Line - 4500 3850 4400 3850 -Wire Wire Line - 4400 3850 4400 2850 -Connection ~ 4400 2850 -Wire Wire Line - 4300 4000 4300 3600 -Wire Wire Line - 4300 3600 4500 3600 -Wire Wire Line - 4000 3350 4000 3500 -Wire Wire Line - 5900 4100 4000 4100 -Connection ~ 4000 4100 -Wire Wire Line - 6100 3350 6100 3600 -Wire Wire Line - 4000 4550 6400 4550 -Wire Wire Line - 6400 4550 6400 4150 -Connection ~ 6100 4550 -Wire Wire Line - 5200 2850 5200 3150 -Wire Wire Line - 4000 2850 7050 2850 -Wire Wire Line - 7050 2850 7050 3200 -Connection ~ 6400 2850 -Wire Wire Line - 7700 3650 7700 3300 -$Comp -L IC U2 -U 1 1 50CE8F30 -P 4650 4050 -F 0 "U2" H 4650 4320 30 0000 C CNN -F 1 "IC" H 4650 4280 30 0000 C CNN - 1 4650 4050 - 1 0 0 -1 -$EndComp -NoConn ~ 7700 4150 -$Comp -L 74LS109 U3 -U 1 1 50C1C9BA -P 7050 3900 -F 0 "U3" H 7050 4000 60 0000 C CNN -F 1 "74LS109" H 7050 3800 60 0000 C CNN - 1 7050 3900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 50A93D02 -P 5900 4800 -F 0 "#PWR01" H 5900 4800 30 0001 C CNN -F 1 "GND" H 5900 4730 30 0001 C CNN - 1 5900 4800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50A93CC0 -P 5700 4300 -F 0 "#FLG02" H 5700 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 5700 4530 30 0000 C CNN - 1 5700 4300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 50A93CB7 -P 5200 2850 -F 0 "#FLG03" H 5200 3120 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 3080 30 0000 C CNN - 1 5200 2850 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 50A93C56 -P 3650 3600 -F 0 "v1" H 3450 3700 60 0000 C CNN -F 1 "5" H 3450 3550 60 0000 C CNN -F 2 "R1" H 3350 3600 60 0000 C CNN - 1 3650 3600 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A93BFE -P 6100 3850 -F 0 "R3" V 6180 3850 50 0000 C CNN -F 1 "1000" V 6100 3850 50 0000 C CNN - 1 6100 3850 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 50A93ACA -P 4300 4200 -F 0 "C2" H 4350 4300 50 0000 L CNN -F 1 "0.01e-6" H 4350 4100 50 0000 L CNN - 1 4300 4200 - 1 0 0 -1 -$EndComp -$Comp -L CP C1 -U 1 1 50A93893 -P 4000 4350 -F 0 "C1" H 4050 4450 50 0000 L CNN -F 1 "100e-12" H 4050 4250 50 0000 L CNN - 1 4000 4350 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A93858 -P 4000 3750 -F 0 "R2" V 4080 3750 50 0000 C CNN -F 1 "10000" V 4000 3750 50 0000 C CNN - 1 4000 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A93852 -P 4000 3100 -F 0 "R1" V 4080 3100 50 0000 C CNN -F 1 "1000" V 4000 3100 50 0000 C CNN - 1 4000 3100 - 1 0 0 -1 -$EndComp -$Comp -L LM555N X1 -U 1 1 50A937B9 -P 5200 3550 -F 0 "X1" H 5200 3650 70 0000 C CNN -F 1 "LM555N" H 5200 3450 70 0000 C CNN - 1 5200 3550 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/frequencyDivider/lm555n-cache.bak b/OSCAD/Examples/frequencyDivider/lm555n-cache.bak deleted file mode 100644 index 2cfdb3a..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n-cache.bak +++ /dev/null @@ -1,207 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 10:48:46 AM IST -#encoding utf-8 -# -# ADC8 -# -DEF ADC8 U 0 10 Y Y 8 L N -F0 "U" -100 100 40 H V C CNN -F1 "ADC8" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in1 1 -300 0 150 R 25 25 1 1 I -X out1 9 300 0 150 L 25 25 1 1 O -X in2 2 -300 0 150 R 25 25 2 1 I -X out2 10 300 0 150 L 25 25 2 1 O -X in3 3 -300 0 150 R 25 25 3 1 I -X out3 11 300 0 150 L 25 25 3 1 O -X in4 4 -300 0 150 R 25 25 4 1 I -X out4 12 300 0 150 L 25 25 4 1 O -X in5 5 -300 0 150 R 25 25 5 1 I -X out5 13 300 0 150 L 25 25 5 1 O -X in6 6 -300 0 150 R 25 25 6 1 I -X out6 14 300 0 150 L 25 25 6 1 O -X in7 7 -300 0 150 R 25 25 7 1 I -X out7 15 300 0 150 L 25 25 7 1 O -X in8 8 -300 0 150 R 25 25 8 1 I -X out8 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# d_inverter -# -DEF d_inverter U 0 40 Y Y 1 F N -F0 "U" -150 100 40 H V C CNN -F1 "d_inverter" 100 100 40 H V C CNN -DRAW -P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N -X in 1 -250 0 150 R 25 25 1 1 I -X out 2 250 0 150 L 25 25 1 1 O I -ENDDRAW -ENDDEF -# -# D_SRLatch -# -DEF D_SRLatch U 0 40 Y Y 1 F N -F0 "U" -200 250 60 H V C CNN -F1 "D_SRLatch" 0 100 60 H V C CNN -DRAW -S -300 200 300 -200 0 1 0 N -X S 1 -600 150 300 R 50 50 1 1 I -X R 2 -600 -150 300 R 50 50 1 1 I -X Enable 3 -600 0 300 R 50 50 1 1 I -X Set 4 150 -500 300 U 50 50 1 1 I -X Reset 5 -150 -500 300 U 50 50 1 1 I -X Q 6 600 150 300 L 50 50 1 1 O -X ~Q 7 600 -150 300 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# DAC8 -# -DEF DAC8 U 0 10 Y Y 8 L N -F0 "U" -100 100 40 H V C CNN -F1 "DAC8" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in1 1 -300 0 150 R 25 25 1 1 I -X out1 9 300 0 150 L 25 25 1 1 O -X in2 2 -300 0 150 R 25 25 2 1 I -X out2 10 300 0 150 L 25 25 2 1 O -X in3 3 -300 0 150 R 25 25 3 1 I -X out3 11 300 0 150 L 25 25 3 1 O -X in4 4 -300 0 150 R 25 25 4 1 I -X out4 12 300 0 150 L 25 25 4 1 O -X in5 5 -300 0 150 R 25 25 5 1 I -X out5 13 300 0 150 L 25 25 5 1 O -X in6 6 -300 0 150 R 25 25 6 1 I -X out6 14 300 0 150 L 25 25 6 1 O -X in7 7 -300 0 150 R 25 25 7 1 I -X out7 15 300 0 150 L 25 25 7 1 O -X in8 8 -300 0 150 R 25 25 8 1 I -X out8 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# LIMIT8 -# -DEF LIMIT8 U 0 40 Y Y 8 F N -F0 "U" 0 100 30 H V C CNN -F1 "LIMIT8" 0 0 30 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in 1 -300 0 150 R 25 25 1 1 I -X out 9 300 0 150 L 25 25 1 1 O -X in 2 -300 0 150 R 25 25 2 1 I -X out 10 300 0 150 L 25 25 2 1 O -X in 3 -300 0 150 R 25 25 3 1 I -X out 11 300 0 150 L 25 25 3 1 O -X in 4 -300 0 150 R 25 25 4 1 I -X out 12 300 0 150 L 25 25 4 1 O -X in 5 -300 0 150 R 25 25 5 1 I -X out 13 300 0 150 L 25 25 5 1 O -X in 6 -300 0 150 R 25 25 6 1 I -X out 14 300 0 150 L 25 25 6 1 O -X in 7 -300 0 150 R 25 25 7 1 I -X out 15 300 0 150 L 25 25 7 1 O -X in 8 -300 0 150 R 25 25 8 1 I -X out 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/frequencyDivider/lm555n-cache.lib b/OSCAD/Examples/frequencyDivider/lm555n-cache.lib deleted file mode 100644 index 1f8bfd1..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n-cache.lib +++ /dev/null @@ -1,207 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 10:57:52 AM IST -#encoding utf-8 -# -# ADC8 -# -DEF ADC8 U 0 10 Y Y 8 L N -F0 "U" -100 100 40 H V C CNN -F1 "ADC8" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in1 1 -300 0 150 R 25 25 1 1 I -X out1 9 300 0 150 L 25 25 1 1 O -X in2 2 -300 0 150 R 25 25 2 1 I -X out2 10 300 0 150 L 25 25 2 1 O -X in3 3 -300 0 150 R 25 25 3 1 I -X out3 11 300 0 150 L 25 25 3 1 O -X in4 4 -300 0 150 R 25 25 4 1 I -X out4 12 300 0 150 L 25 25 4 1 O -X in5 5 -300 0 150 R 25 25 5 1 I -X out5 13 300 0 150 L 25 25 5 1 O -X in6 6 -300 0 150 R 25 25 6 1 I -X out6 14 300 0 150 L 25 25 6 1 O -X in7 7 -300 0 150 R 25 25 7 1 I -X out7 15 300 0 150 L 25 25 7 1 O -X in8 8 -300 0 150 R 25 25 8 1 I -X out8 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# d_inverter -# -DEF d_inverter U 0 40 Y Y 1 F N -F0 "U" -150 100 40 H V C CNN -F1 "d_inverter" 100 100 40 H V C CNN -DRAW -P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N -X in 1 -250 0 150 R 25 25 1 1 I -X out 2 250 0 150 L 25 25 1 1 O I -ENDDRAW -ENDDEF -# -# D_SRLatch -# -DEF D_SRLatch U 0 40 Y Y 1 F N -F0 "U" -200 250 60 H V C CNN -F1 "D_SRLatch" 0 100 60 H V C CNN -DRAW -S -300 200 300 -200 0 1 0 N -X S 1 -600 150 300 R 50 50 1 1 I -X R 2 -600 -150 300 R 50 50 1 1 I -X Enable 3 -600 0 300 R 50 50 1 1 I -X Set 4 150 -500 300 U 50 50 1 1 I -X Reset 5 -150 -500 300 U 50 50 1 1 I -X Q 6 600 150 300 L 50 50 1 1 O -X ~Q 7 600 -150 300 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# DAC8 -# -DEF DAC8 U 0 10 Y Y 8 L N -F0 "U" -100 100 40 H V C CNN -F1 "DAC8" 0 0 40 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in1 1 -300 0 150 R 25 25 1 1 I -X out1 9 300 0 150 L 25 25 1 1 O -X in2 2 -300 0 150 R 25 25 2 1 I -X out2 10 300 0 150 L 25 25 2 1 O -X in3 3 -300 0 150 R 25 25 3 1 I -X out3 11 300 0 150 L 25 25 3 1 O -X in4 4 -300 0 150 R 25 25 4 1 I -X out4 12 300 0 150 L 25 25 4 1 O -X in5 5 -300 0 150 R 25 25 5 1 I -X out5 13 300 0 150 L 25 25 5 1 O -X in6 6 -300 0 150 R 25 25 6 1 I -X out6 14 300 0 150 L 25 25 6 1 O -X in7 7 -300 0 150 R 25 25 7 1 I -X out7 15 300 0 150 L 25 25 7 1 O -X in8 8 -300 0 150 R 25 25 8 1 I -X out8 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# LIMIT8 -# -DEF LIMIT8 U 0 40 Y Y 8 F N -F0 "U" 0 100 30 H V C CNN -F1 "LIMIT8" 0 0 30 H V C CNN -DRAW -S -150 50 150 -50 0 1 0 N -X in 1 -300 0 150 R 25 25 1 1 I -X out 9 300 0 150 L 25 25 1 1 O -X in 2 -300 0 150 R 25 25 2 1 I -X out 10 300 0 150 L 25 25 2 1 O -X in 3 -300 0 150 R 25 25 3 1 I -X out 11 300 0 150 L 25 25 3 1 O -X in 4 -300 0 150 R 25 25 4 1 I -X out 12 300 0 150 L 25 25 4 1 O -X in 5 -300 0 150 R 25 25 5 1 I -X out 13 300 0 150 L 25 25 5 1 O -X in 6 -300 0 150 R 25 25 6 1 I -X out 14 300 0 150 L 25 25 6 1 O -X in 7 -300 0 150 R 25 25 7 1 I -X out 15 300 0 150 L 25 25 7 1 O -X in 8 -300 0 150 R 25 25 8 1 I -X out 16 300 0 150 L 25 25 8 1 O -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/frequencyDivider/lm555n.bak b/OSCAD/Examples/frequencyDivider/lm555n.bak deleted file mode 100644 index 92d1f7a..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.bak +++ /dev/null @@ -1,435 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 10:48:46 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:lm555n-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L D_INVERTER U5 -U 1 1 50CEA9C5 -P 6700 4050 -F 0 "U5" H 6550 4150 40 0000 C CNN -F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN - 1 6700 4050 - 1 0 0 -1 -$EndComp -$Comp -L D_SRLATCH U6 -U 1 1 50CEA9AE -P 7100 3400 -F 0 "U6" H 6900 3650 60 0000 C CNN -F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN - 1 7100 3400 - 1 0 0 -1 -$EndComp -Text Notes 5750 3050 0 60 ~ 0 -IC 555 -Wire Wire Line - 4700 3000 4900 3000 -Wire Wire Line - 4700 4750 4700 4650 -Connection ~ 4400 3550 -Connection ~ 4400 4900 -Wire Wire Line - 4300 4900 7700 4900 -Wire Wire Line - 4400 4200 4400 4100 -Wire Wire Line - 7700 4900 7700 4800 -Wire Wire Line - 7700 3250 7850 3250 -Wire Wire Line - 7400 4600 7100 4600 -Wire Wire Line - 7100 4600 7100 4250 -Wire Wire Line - 7700 3650 7700 3550 -Wire Wire Line - 6350 4050 6450 4050 -Wire Wire Line - 6950 3900 6950 4000 -Wire Wire Line - 7150 4000 7150 4050 -Wire Wire Line - 7150 4050 6950 4050 -Wire Wire Line - 6500 3550 6200 3550 -Wire Wire Line - 6350 3250 6500 3250 -Wire Wire Line - 5400 3250 5100 3250 -Wire Wire Line - 5100 3250 5100 3750 -Wire Wire Line - 5550 4500 5550 4350 -Wire Wire Line - 5700 3550 5800 3550 -Wire Wire Line - 5900 3250 6000 3250 -Wire Wire Line - 6000 3850 6350 3850 -Wire Wire Line - 5800 4150 6200 4150 -Wire Wire Line - 5200 3550 5200 3700 -Wire Wire Line - 5200 3700 5550 3700 -Wire Wire Line - 5550 3700 5550 3750 -Connection ~ 5550 4450 -Wire Wire Line - 5750 4400 5750 4450 -Wire Wire Line - 5100 4350 5100 4450 -Wire Wire Line - 5100 4450 5750 4450 -Wire Wire Line - 6500 3400 6450 3400 -Wire Wire Line - 6450 3400 6450 4050 -Wire Wire Line - 6950 4000 7250 4000 -Wire Wire Line - 7250 4000 7250 3900 -Connection ~ 7150 4000 -Wire Wire Line - 7600 4250 7700 4250 -Wire Wire Line - 7700 4400 7700 4350 -Wire Wire Line - 7700 4350 7800 4350 -Wire Wire Line - 7850 3850 7900 3850 -Wire Wire Line - 4400 4900 4400 4700 -Wire Wire Line - 4400 3600 4400 3500 -Wire Wire Line - 4300 3000 4400 3000 -Wire Wire Line - 4400 4150 4700 4150 -Connection ~ 4400 4150 -Wire Wire Line - 4300 3550 4700 3550 -Wire Wire Line - 4700 3550 4700 3500 -Wire Wire Line - 6350 4750 6350 4650 -Text Label 4850 4100 0 60 ~ 0 -d -$Comp -L VCVS E2 -U 1 1 50AA12FF -P 5050 4050 -F 0 "E2" H 4850 4150 50 0000 C CNN -F 1 "10000" H 4850 4000 50 0000 C CNN - 1 5050 4050 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 2 1 50B4E21B -P 6000 3550 -F 0 "U4" H 6000 3650 30 0000 C CNN -F 1 "LIMIT8" H 6000 3550 30 0000 C CNN - 2 6000 3550 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 1 1 50B4E215 -P 5800 3850 -F 0 "U4" H 5800 3950 30 0000 C CNN -F 1 "LIMIT8" H 5800 3850 30 0000 C CNN - 1 5800 3850 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 2 1 50AAFCE7 -P 7700 3950 -F 0 "U3" H 7600 4050 40 0000 C CNN -F 1 "DAC8" H 7700 3950 40 0000 C CNN - 2 7700 3950 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 1 1 50AAFC9A -P 7850 3550 -F 0 "U3" H 7750 3650 40 0000 C CNN -F 1 "DAC8" H 7850 3550 40 0000 C CNN - 1 7850 3550 - 0 1 1 0 -$EndComp -$Comp -L ADC8 U2 -U 3 1 50AAFB76 -P 6350 4350 -F 0 "U2" H 6250 4450 40 0000 C CNN -F 1 "ADC8" H 6350 4350 40 0000 C CNN - 3 6350 4350 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 2 1 50AAFB64 -P 6350 3550 -F 0 "U2" H 6250 3650 40 0000 C CNN -F 1 "ADC8" H 6350 3550 40 0000 C CNN - 2 6350 3550 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 1 1 50AAFB55 -P 6200 3850 -F 0 "U2" H 6100 3950 40 0000 C CNN -F 1 "ADC8" H 6200 3850 40 0000 C CNN - 1 6200 3850 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50AA39A3 -P 5750 4400 -F 0 "#FLG01" H 5750 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 4630 30 0000 C CNN - 1 5750 4400 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 5 1 50AA2210 -P 4050 3550 -F 0 "U1" H 4050 3500 30 0000 C CNN -F 1 "PORT" H 4050 3550 30 0000 C CNN - 5 4050 3550 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 1 1 50AA21C7 -P 4050 4900 -F 0 "U1" H 4050 4850 30 0000 C CNN -F 1 "PORT" H 4050 4900 30 0000 C CNN - 1 4050 4900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 50AA21BC -P 4700 5000 -F 0 "U1" H 4700 4950 30 0000 C CNN -F 1 "PORT" H 4700 5000 30 0000 C CNN - 2 4700 5000 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 4 1 50AA21A9 -P 6350 5000 -F 0 "U1" H 6350 4950 30 0000 C CNN -F 1 "PORT" H 6350 5000 30 0000 C CNN - 4 6350 5000 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 7 1 50AA21A0 -P 8050 4350 -F 0 "U1" H 8050 4300 30 0000 C CNN -F 1 "PORT" H 8050 4350 30 0000 C CNN - 7 8050 4350 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 3 1 50AA2181 -P 8150 3850 -F 0 "U1" H 8150 3800 30 0000 C CNN -F 1 "PORT" H 8150 3850 30 0000 C CNN - 3 8150 3850 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 6 1 50AA2171 -P 5150 3000 -F 0 "U1" H 5150 2950 30 0000 C CNN -F 1 "PORT" H 5150 3000 30 0000 C CNN - 6 5150 3000 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 8 1 50AA2162 -P 4050 3000 -F 0 "U1" H 4050 2950 30 0000 C CNN -F 1 "PORT" H 4050 3000 30 0000 C CNN - 8 4050 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R8 -U 1 1 50AA20DA -P 7350 4250 -F 0 "R8" V 7430 4250 50 0000 C CNN -F 1 "1500" V 7350 4250 50 0000 C CNN - 1 7350 4250 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 50AA2050 -P 7600 4600 -F 0 "Q1" H 7600 4450 50 0000 R CNN -F 1 "QNOM" H 7600 4750 50 0000 R CNN - 1 7600 4600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50AA140C -P 5550 4500 -F 0 "#PWR02" H 5550 4500 30 0001 C CNN -F 1 "GND" H 5550 4430 30 0001 C CNN - 1 5550 4500 - 1 0 0 -1 -$EndComp -Text Label 4850 4000 0 60 ~ 0 -c -Text Label 4700 4650 0 60 ~ 0 -d -Text Label 4700 4150 0 60 ~ 0 -c -$Comp -L R R7 -U 1 1 50AA12F7 -P 5650 3250 -F 0 "R7" V 5730 3250 50 0000 C CNN -F 1 "25" V 5650 3250 50 0000 C CNN - 1 5650 3250 - 0 -1 -1 0 -$EndComp -$Comp -L R R6 -U 1 1 50AA12B0 -P 5450 3550 -F 0 "R6" V 5530 3550 50 0000 C CNN -F 1 "25" V 5450 3550 50 0000 C CNN - 1 5450 3550 - 0 -1 -1 0 -$EndComp -Text Label 5300 4000 0 60 ~ 0 -b -Text Label 5300 4100 0 60 ~ 0 -a -Text Label 4700 3000 0 60 ~ 0 -b -Text Label 4700 3500 0 60 ~ 0 -a -$Comp -L VCVS E1 -U 1 1 50AA11B6 -P 5500 4050 -F 0 "E1" H 5300 4150 50 0000 C CNN -F 1 "10000" H 5300 4000 50 0000 C CNN - 1 5500 4050 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50A9E00B -P 4700 3250 -F 0 "R4" V 4780 3250 50 0000 C CNN -F 1 "2E6" V 4700 3250 50 0000 C CNN - 1 4700 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50A9E001 -P 4700 4400 -F 0 "R5" V 4780 4400 50 0000 C CNN -F 1 "2E6" V 4700 4400 50 0000 C CNN - 1 4700 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A9DF09 -P 4400 4450 -F 0 "R3" V 4480 4450 50 0000 C CNN -F 1 "5000" V 4400 4450 50 0000 C CNN - 1 4400 4450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A9DF03 -P 4400 3850 -F 0 "R2" V 4480 3850 50 0000 C CNN -F 1 "5000" V 4400 3850 50 0000 C CNN - 1 4400 3850 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A9DEFE -P 4400 3250 -F 0 "R1" V 4480 3250 50 0000 C CNN -F 1 "5000" V 4400 3250 50 0000 C CNN - 1 4400 3250 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/frequencyDivider/lm555n.cir b/OSCAD/Examples/frequencyDivider/lm555n.cir deleted file mode 100644 index 9483a64..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.cir +++ /dev/null @@ -1,25 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 10:57:49 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U5 5 21 D_INVERTER -U6 1 4 5 21 21 8 10 D_SRLATCH -E2 18 0 23 14 10000 -U4 19 20 11 12 LIMIT8 -U3 8 10 7 9 DAC8 -U2 11 12 6 4 1 5 ADC8 -U1 22 14 7 6 15 16 3 13 PORT -R8 9 2 1500 -Q1 22 2 3 QNOM -R7 18 20 25 -R6 17 19 25 -E1 17 0 16 15 10000 -R4 16 15 2E6 -R5 23 14 2E6 -R3 23 22 5000 -R2 15 23 5000 -R1 13 15 5000 - -.end diff --git a/OSCAD/Examples/frequencyDivider/lm555n.cir.ckt b/OSCAD/Examples/frequencyDivider/lm555n.cir.ckt deleted file mode 100644 index 90f04a3..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.cir.ckt +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/OSCAD/Examples/frequencyDivider/lm555n.cir.out b/OSCAD/Examples/frequencyDivider/lm555n.cir.out deleted file mode 100644 index 90f04a3..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.cir.out +++ /dev/null @@ -1,35 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist - -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -u1 22 14 7 6 15 16 3 13 port -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) diff --git a/OSCAD/Examples/frequencyDivider/lm555n.pro b/OSCAD/Examples/frequencyDivider/lm555n.pro deleted file mode 100644 index 09fa54e..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.pro +++ /dev/null @@ -1,73 +0,0 @@ -update=Monday 19 November 2012 04:56:38 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=analogXSpice -LibName33=converterSpice -LibName34=digitalSpice -LibName35=linearSpice -LibName36=measurementSpice -LibName37=portSpice -LibName38=sourcesSpice -LibName39=digitalXSpice diff --git a/OSCAD/Examples/frequencyDivider/lm555n.sch b/OSCAD/Examples/frequencyDivider/lm555n.sch deleted file mode 100644 index fabbb66..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.sch +++ /dev/null @@ -1,435 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 10:57:52 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:lm555n-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L D_INVERTER U5 -U 1 1 50CEA9C5 -P 6700 4050 -F 0 "U5" H 6550 4150 40 0000 C CNN -F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN - 1 6700 4050 - 1 0 0 -1 -$EndComp -$Comp -L D_SRLATCH U6 -U 1 1 50CEA9AE -P 7100 3400 -F 0 "U6" H 6900 3650 60 0000 C CNN -F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN - 1 7100 3400 - 1 0 0 -1 -$EndComp -Text Notes 5750 3050 0 60 ~ 0 -IC 555 -Wire Wire Line - 4700 3000 4900 3000 -Wire Wire Line - 4700 4750 4700 4650 -Connection ~ 4400 3550 -Connection ~ 4400 4900 -Wire Wire Line - 4300 4900 7700 4900 -Wire Wire Line - 4400 4200 4400 4100 -Wire Wire Line - 7700 4900 7700 4800 -Wire Wire Line - 7700 3250 7850 3250 -Wire Wire Line - 7400 4600 7100 4600 -Wire Wire Line - 7100 4600 7100 4250 -Wire Wire Line - 7700 3650 7700 3550 -Wire Wire Line - 6350 4050 6450 4050 -Wire Wire Line - 6950 3900 6950 4000 -Wire Wire Line - 7150 4000 7150 4050 -Wire Wire Line - 7150 4050 6950 4050 -Wire Wire Line - 6500 3550 6200 3550 -Wire Wire Line - 6350 3250 6500 3250 -Wire Wire Line - 5400 3250 5100 3250 -Wire Wire Line - 5100 3250 5100 3750 -Wire Wire Line - 5550 4500 5550 4350 -Wire Wire Line - 5700 3550 5800 3550 -Wire Wire Line - 5900 3250 6000 3250 -Wire Wire Line - 6000 3850 6350 3850 -Wire Wire Line - 5800 4150 6200 4150 -Wire Wire Line - 5200 3550 5200 3700 -Wire Wire Line - 5200 3700 5550 3700 -Wire Wire Line - 5550 3700 5550 3750 -Connection ~ 5550 4450 -Wire Wire Line - 5750 4400 5750 4450 -Wire Wire Line - 5100 4350 5100 4450 -Wire Wire Line - 5100 4450 5750 4450 -Wire Wire Line - 6500 3400 6450 3400 -Wire Wire Line - 6450 3400 6450 4050 -Wire Wire Line - 6950 4000 7250 4000 -Wire Wire Line - 7250 4000 7250 3900 -Connection ~ 7150 4000 -Wire Wire Line - 7600 4250 7700 4250 -Wire Wire Line - 7700 4400 7700 4350 -Wire Wire Line - 7700 4350 7800 4350 -Wire Wire Line - 7850 3850 7900 3850 -Wire Wire Line - 4400 4900 4400 4700 -Wire Wire Line - 4400 3600 4400 3500 -Wire Wire Line - 4300 3000 4400 3000 -Wire Wire Line - 4400 4150 4700 4150 -Connection ~ 4400 4150 -Wire Wire Line - 4300 3550 4700 3550 -Wire Wire Line - 4700 3550 4700 3500 -Wire Wire Line - 6350 4750 6350 4650 -Text Label 4850 4100 0 60 ~ 0 -d -$Comp -L VCVS E2 -U 1 1 50AA12FF -P 5050 4050 -F 0 "E2" H 4850 4150 50 0000 C CNN -F 1 "10000" H 4850 4000 50 0000 C CNN - 1 5050 4050 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 2 1 50B4E21B -P 6000 3550 -F 0 "U4" H 6000 3650 30 0000 C CNN -F 1 "LIMIT8" H 6000 3550 30 0000 C CNN - 2 6000 3550 - 0 1 1 0 -$EndComp -$Comp -L LIMIT8 U4 -U 1 1 50B4E215 -P 5800 3850 -F 0 "U4" H 5800 3950 30 0000 C CNN -F 1 "LIMIT8" H 5800 3850 30 0000 C CNN - 1 5800 3850 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 2 1 50AAFCE7 -P 7700 3950 -F 0 "U3" H 7600 4050 40 0000 C CNN -F 1 "DAC8" H 7700 3950 40 0000 C CNN - 2 7700 3950 - 0 1 1 0 -$EndComp -$Comp -L DAC8 U3 -U 1 1 50AAFC9A -P 7850 3550 -F 0 "U3" H 7750 3650 40 0000 C CNN -F 1 "DAC8" H 7850 3550 40 0000 C CNN - 1 7850 3550 - 0 1 1 0 -$EndComp -$Comp -L ADC8 U2 -U 3 1 50AAFB76 -P 6350 4350 -F 0 "U2" H 6250 4450 40 0000 C CNN -F 1 "ADC8" H 6350 4350 40 0000 C CNN - 3 6350 4350 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 2 1 50AAFB64 -P 6350 3550 -F 0 "U2" H 6250 3650 40 0000 C CNN -F 1 "ADC8" H 6350 3550 40 0000 C CNN - 2 6350 3550 - 0 -1 -1 0 -$EndComp -$Comp -L ADC8 U2 -U 1 1 50AAFB55 -P 6200 3850 -F 0 "U2" H 6100 3950 40 0000 C CNN -F 1 "ADC8" H 6200 3850 40 0000 C CNN - 1 6200 3850 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50AA39A3 -P 5750 4400 -F 0 "#FLG01" H 5750 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 4630 30 0000 C CNN - 1 5750 4400 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 5 1 50AA2210 -P 4050 3550 -F 0 "U1" H 4050 3500 30 0000 C CNN -F 1 "PORT" H 4050 3550 30 0000 C CNN - 5 4050 3550 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 1 1 50AA21C7 -P 4050 4900 -F 0 "U1" H 4050 4850 30 0000 C CNN -F 1 "PORT" H 4050 4900 30 0000 C CNN - 1 4050 4900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 50AA21BC -P 4700 5000 -F 0 "U1" H 4700 4950 30 0000 C CNN -F 1 "PORT" H 4700 5000 30 0000 C CNN - 2 4700 5000 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 4 1 50AA21A9 -P 6350 5000 -F 0 "U1" H 6350 4950 30 0000 C CNN -F 1 "PORT" H 6350 5000 30 0000 C CNN - 4 6350 5000 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 7 1 50AA21A0 -P 8050 4350 -F 0 "U1" H 8050 4300 30 0000 C CNN -F 1 "PORT" H 8050 4350 30 0000 C CNN - 7 8050 4350 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 3 1 50AA2181 -P 8150 3850 -F 0 "U1" H 8150 3800 30 0000 C CNN -F 1 "PORT" H 8150 3850 30 0000 C CNN - 3 8150 3850 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 6 1 50AA2171 -P 5150 3000 -F 0 "U1" H 5150 2950 30 0000 C CNN -F 1 "PORT" H 5150 3000 30 0000 C CNN - 6 5150 3000 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 8 1 50AA2162 -P 4050 3000 -F 0 "U1" H 4050 2950 30 0000 C CNN -F 1 "PORT" H 4050 3000 30 0000 C CNN - 8 4050 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R8 -U 1 1 50AA20DA -P 7350 4250 -F 0 "R8" V 7430 4250 50 0000 C CNN -F 1 "1500" V 7350 4250 50 0000 C CNN - 1 7350 4250 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 50AA2050 -P 7600 4600 -F 0 "Q1" H 7600 4450 50 0000 R CNN -F 1 "QNOM" H 7600 4750 50 0000 R CNN - 1 7600 4600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50AA140C -P 5550 4500 -F 0 "#PWR02" H 5550 4500 30 0001 C CNN -F 1 "GND" H 5550 4430 30 0001 C CNN - 1 5550 4500 - 1 0 0 -1 -$EndComp -Text Label 4850 4000 0 60 ~ 0 -c -Text Label 4700 4650 0 60 ~ 0 -d -Text Label 4700 4150 0 60 ~ 0 -c -$Comp -L R R7 -U 1 1 50AA12F7 -P 5650 3250 -F 0 "R7" V 5730 3250 50 0000 C CNN -F 1 "25" V 5650 3250 50 0000 C CNN - 1 5650 3250 - 0 -1 -1 0 -$EndComp -$Comp -L R R6 -U 1 1 50AA12B0 -P 5450 3550 -F 0 "R6" V 5530 3550 50 0000 C CNN -F 1 "25" V 5450 3550 50 0000 C CNN - 1 5450 3550 - 0 -1 -1 0 -$EndComp -Text Label 5300 4000 0 60 ~ 0 -b -Text Label 5300 4100 0 60 ~ 0 -a -Text Label 4700 3000 0 60 ~ 0 -b -Text Label 4700 3500 0 60 ~ 0 -a -$Comp -L VCVS E1 -U 1 1 50AA11B6 -P 5500 4050 -F 0 "E1" H 5300 4150 50 0000 C CNN -F 1 "10000" H 5300 4000 50 0000 C CNN - 1 5500 4050 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50A9E00B -P 4700 3250 -F 0 "R4" V 4780 3250 50 0000 C CNN -F 1 "2E6" V 4700 3250 50 0000 C CNN - 1 4700 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50A9E001 -P 4700 4400 -F 0 "R5" V 4780 4400 50 0000 C CNN -F 1 "2E6" V 4700 4400 50 0000 C CNN - 1 4700 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50A9DF09 -P 4400 4450 -F 0 "R3" V 4480 4450 50 0000 C CNN -F 1 "5000" V 4400 4450 50 0000 C CNN - 1 4400 4450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50A9DF03 -P 4400 3850 -F 0 "R2" V 4480 3850 50 0000 C CNN -F 1 "5000" V 4400 3850 50 0000 C CNN - 1 4400 3850 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50A9DEFE -P 4400 3250 -F 0 "R1" V 4480 3250 50 0000 C CNN -F 1 "5000" V 4400 3250 50 0000 C CNN - 1 4400 3250 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/frequencyDivider/lm555n.sub b/OSCAD/Examples/frequencyDivider/lm555n.sub deleted file mode 100644 index 254c530..0000000 --- a/OSCAD/Examples/frequencyDivider/lm555n.sub +++ /dev/null @@ -1,37 +0,0 @@ -* Subcircuit lm555n -.subckt lm555n 22 14 7 6 15 16 3 13 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist -* Inverter d_inverter -* SR Latch d_srlatch -e2 18 0 23 14 10000 -* Limiter limit8 -* Digital to Analog converter dac8 -* Analog to Digital converter adc8 -r8 9 2 1500 -q1 3 2 22 qnom -r7 18 20 25 -r6 17 19 25 -e1 17 0 16 15 10000 -r4 16 15 2e6 -r5 23 14 2e6 -r3 23 22 5000 -r2 15 23 5000 -r1 13 15 5000 -a1 5 21 u5 -.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12) -a2 1 4 5 21 21 8 10 u6 -.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0 -+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12 -+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12) -a3 19 11 u4 -a4 20 12 u4 -.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0) -a5 [8] [7] u3 -a6 [10] [9] u3 -.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 ) -a7 [11] [4] u2 -a8 [12] [1] u2 -a9 [6] [5] u2 -.model u2 adc_bridge(in_low=0.8 in_high=2.0 ) - -.ends lm555n
\ No newline at end of file diff --git a/OSCAD/Examples/linear1/analysis b/OSCAD/Examples/linear1/analysis deleted file mode 100644 index 162ad08..0000000 --- a/OSCAD/Examples/linear1/analysis +++ /dev/null @@ -1 +0,0 @@ -.op
\ No newline at end of file diff --git a/OSCAD/Examples/linear1/linear1-cache.bak b/OSCAD/Examples/linear1/linear1-cache.bak deleted file mode 100644 index b2b47b7..0000000 --- a/OSCAD/Examples/linear1/linear1-cache.bak +++ /dev/null @@ -1,106 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:21:41 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCCS -# -DEF VCCS G 0 40 Y Y 1 F N -F0 "G" -200 100 50 H V C CNN -F1 "VCCS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# vprint1 -# -DEF vprint1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vprint1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/linear1/linear1-cache.lib b/OSCAD/Examples/linear1/linear1-cache.lib deleted file mode 100644 index 55c3d03..0000000 --- a/OSCAD/Examples/linear1/linear1-cache.lib +++ /dev/null @@ -1,106 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:24:11 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCCS -# -DEF VCCS G 0 40 Y Y 1 F N -F0 "G" -200 100 50 H V C CNN -F1 "VCCS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# vprint1 -# -DEF vprint1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vprint1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/linear1/linear1.bak b/OSCAD/Examples/linear1/linear1.bak deleted file mode 100644 index 2be3d0e..0000000 --- a/OSCAD/Examples/linear1/linear1.bak +++ /dev/null @@ -1,233 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:21:41 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:linear1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6100 2500 5650 2500 -Wire Wire Line - 5650 2500 5650 2900 -Connection ~ 5650 2900 -Wire Wire Line - 5350 2900 5750 2900 -Connection ~ 6850 3800 -Wire Wire Line - 6850 3800 6850 3600 -Connection ~ 7300 2900 -Wire Wire Line - 7300 3000 7300 2500 -Connection ~ 6400 3800 -Wire Wire Line - 6400 3500 6400 3800 -Connection ~ 5500 3800 -Wire Wire Line - 7300 3500 7300 3800 -Wire Wire Line - 7300 3800 3750 3800 -Connection ~ 4600 2900 -Wire Wire Line - 4600 3000 4600 2900 -Connection ~ 6400 2900 -Wire Wire Line - 6550 2900 6250 2900 -Wire Wire Line - 4750 2900 4450 2900 -Wire Wire Line - 3750 2900 3950 2900 -Wire Wire Line - 6400 2900 6400 3000 -Wire Wire Line - 7300 2900 7050 2900 -Wire Wire Line - 4600 3500 4600 3800 -Connection ~ 4600 3800 -Wire Wire Line - 5800 3800 5800 4000 -Connection ~ 5800 3800 -Wire Wire Line - 7300 2500 6700 2500 -Wire Wire Line - 7300 2750 7700 2750 -Connection ~ 7300 2750 -$Comp -L VPRINT1 U1 -U 1 1 506964BE -P 7700 2450 -F 0 "U1" H 7550 2550 50 0001 C CNN -F 1 "VPRINT1" H 7850 2550 50 0000 C CNN - 1 7700 2450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50695F5E -P 6850 3600 -F 0 "#FLG01" H 6850 3870 30 0001 C CNN -F 1 "PWR_FLAG" H 6850 3830 30 0000 C CNN - 1 6850 3600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50695EE6 -P 5800 4000 -F 0 "#PWR02" H 5800 4000 30 0001 C CNN -F 1 "GND" H 5800 3930 30 0001 C CNN - 1 5800 4000 - 1 0 0 -1 -$EndComp -Text Label 6100 3800 0 60 ~ 0 -c -Text Label 6350 2750 0 60 ~ 0 -c -Text Label 6450 2750 0 60 ~ 0 -b -Text Label 6550 2900 0 60 ~ 0 -b -Text Label 5100 3150 0 60 ~ 0 -b -Text Label 5000 3150 0 60 ~ 0 -a -Text Label 7150 2900 0 60 ~ 0 -a -$Comp -L VCVS E1 -U 1 1 50695730 -P 5050 2950 -F 0 "E1" H 4850 3050 50 0000 C CNN -F 1 "0.5" H 4850 2900 50 0000 C CNN - 1 5050 2950 - 1 0 0 -1 -$EndComp -$Comp -L DC I1 -U 1 1 506956A6 -P 5500 3350 -F 0 "I1" H 5300 3450 60 0000 C CNN -F 1 "1" H 5300 3300 60 0000 C CNN -F 2 "R1" H 5200 3350 60 0000 C CNN - 1 5500 3350 - -1 0 0 1 -$EndComp -$Comp -L DC V1 -U 1 1 50695694 -P 3750 3350 -F 0 "V1" H 3550 3450 60 0000 C CNN -F 1 "1" H 3550 3300 60 0000 C CNN -F 2 "R1" H 3450 3350 60 0000 C CNN - 1 3750 3350 - 1 0 0 -1 -$EndComp -$Comp -L VCCS G1 -U 1 1 5069566A -P 6400 2550 -F 0 "G1" H 6200 2650 50 0000 C CNN -F 1 "0.5" H 6200 2500 50 0000 C CNN - 1 6400 2550 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 506955DC -P 7300 3250 -F 0 "R6" V 7380 3250 50 0000 C CNN -F 1 "1" V 7300 3250 50 0000 C CNN - 1 7300 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 506955D8 -P 6400 3250 -F 0 "R3" V 6480 3250 50 0000 C CNN -F 1 "1" V 6400 3250 50 0000 C CNN - 1 6400 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 506955D1 -P 6800 2900 -F 0 "R5" V 6880 2900 50 0000 C CNN -F 1 "0.5" V 6800 2900 50 0000 C CNN - 1 6800 2900 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 506955CC -P 6000 2900 -F 0 "R4" V 6080 2900 50 0000 C CNN -F 1 "1" V 6000 2900 50 0000 C CNN - 1 6000 2900 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 506955C7 -P 4600 3250 -F 0 "R2" V 4680 3250 50 0000 C CNN -F 1 "1" V 4600 3250 50 0000 C CNN - 1 4600 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 506955C2 -P 4200 2900 -F 0 "R1" V 4280 2900 50 0000 C CNN -F 1 "1" V 4200 2900 50 0000 C CNN - 1 4200 2900 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/linear1/linear1.brd b/OSCAD/Examples/linear1/linear1.brd deleted file mode 100644 index a04a203..0000000 --- a/OSCAD/Examples/linear1/linear1.brd +++ /dev/null @@ -1,84 +0,0 @@ -PCBNEW-BOARD Version 1 date Thursday 04 October 2012 03:56:07 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 0 -NoConn 0 -Di 0 0 117000 82670 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 0 -Nnets 1 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "4 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -$EndNCLASS -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/linear1/linear1.cir b/OSCAD/Examples/linear1/linear1.cir deleted file mode 100644 index 349f95a..0000000 --- a/OSCAD/Examples/linear1/linear1.cir +++ /dev/null @@ -1,19 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:24:34 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 1 VPRINT1 -E1 4 6 1 2 0.5 -I1 0 6 1 -V1 3 0 1 -G1 6 1 0 2 0.5 -R6 1 0 1 -R3 2 0 1 -R5 1 2 0.5 -R4 2 6 1 -R2 4 0 1 -R1 4 3 1 - -.end diff --git a/OSCAD/Examples/linear1/linear1.cir.ckt b/OSCAD/Examples/linear1/linear1.cir.ckt deleted file mode 100644 index 6738a45..0000000 --- a/OSCAD/Examples/linear1/linear1.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:24:34 am ist - -* Printing option vprint1 -e1 4 6 1 2 0.5 -i1 0 6 1 -v1 3 0 1 -g1 6 1 0 2 0.5 -r6 1 0 1 -r3 2 0 1 -r5 1 2 0.5 -r4 2 6 1 -r2 4 0 1 -r1 4 3 1 - -.op -.print v(1) -.end diff --git a/OSCAD/Examples/linear1/linear1.cir.ckt.sol b/OSCAD/Examples/linear1/linear1.cir.ckt.sol deleted file mode 100644 index 5727235..0000000 --- a/OSCAD/Examples/linear1/linear1.cir.ckt.sol +++ /dev/null @@ -1,14 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -E 4 6 0.0000000000 0.0000000000 -I 1 2 0.0000000000 0.0000000000 -I 0 6 -0.0000000000 0.0000000000 -V 3 0 0.0000000000 0.0000000000 -G 6 1 0.0000000000 -0.0000000000 -I 0 2 -0.0000000000 0.0000000000 -R 1 0 0.0000000000 0.0000000000 -R 2 0 0.0000000000 0.0000000000 -R 1 2 0.0000000000 0.0000000000 -R 2 6 0.0000000000 0.0000000000 -R 4 0 0.0000000000 0.0000000000 -R 4 3 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/linear1/linear1.cir.out b/OSCAD/Examples/linear1/linear1.cir.out deleted file mode 100644 index b996360..0000000 --- a/OSCAD/Examples/linear1/linear1.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:24:34 am ist - -* Printing option vprint1 -e1 4 6 1 2 0.5 -i1 0 6 1 -v1 3 0 1 -g1 6 1 0 2 0.5 -r6 1 0 1 -r3 2 0 1 -r5 1 2 0.5 -r4 2 6 1 -r2 4 0 1 -r1 4 3 1 - -.op - -* Control Statements -.control -run -print v(1) -.endc -.end diff --git a/OSCAD/Examples/linear1/linear1.cmp b/OSCAD/Examples/linear1/linear1.cmp deleted file mode 100644 index 84671d7..0000000 --- a/OSCAD/Examples/linear1/linear1.cmp +++ /dev/null @@ -1,73 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 22 October 2012 04:10:55 PM IST - -BeginCmp -TimeStamp = /50695730; -Reference = E1; -ValeurCmp = 0.5; -IdModule = bornier4; -EndCmp - -BeginCmp -TimeStamp = /5069566A; -Reference = G1; -ValeurCmp = 0.5; -IdModule = bornier4; -EndCmp - -BeginCmp -TimeStamp = /506956A6; -Reference = I1; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /506955C2; -Reference = R1; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506955C7; -Reference = R2; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506955D8; -Reference = R3; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506955CC; -Reference = R4; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506955D1; -Reference = R5; -ValeurCmp = 0.5; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /506955DC; -Reference = R6; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /50695694; -Reference = V1; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -EndListe diff --git a/OSCAD/Examples/linear1/linear1.net b/OSCAD/Examples/linear1/linear1.net deleted file mode 100644 index c615a65..0000000 --- a/OSCAD/Examples/linear1/linear1.net +++ /dev/null @@ -1,99 +0,0 @@ -# EESchema Netlist Version 1.1 created Monday 22 October 2012 04:10:55 PM IST -( - ( /50695730 bornier4 E1 0.5 - ( 1 N-000005 ) - ( 2 N-000006 ) - ( 3 /a ) - ( 4 /b ) - ) - ( /5069566A bornier4 G1 0.5 - ( 1 N-000006 ) - ( 2 /a ) - ( 3 GND ) - ( 4 /b ) - ) - ( /506956A6 R1 I1 DC - ( 1 GND ) - ( 2 N-000006 ) - ) - ( /506955C2 R3 R1 1 - ( 1 N-000005 ) - ( 2 N-000004 ) - ) - ( /506955C7 R3 R2 1 - ( 1 N-000005 ) - ( 2 GND ) - ) - ( /506955D8 R3 R3 1 - ( 1 /b ) - ( 2 GND ) - ) - ( /506955CC R3 R4 1 - ( 1 /b ) - ( 2 N-000006 ) - ) - ( /506955D1 R3 R5 0.5 - ( 1 /a ) - ( 2 /b ) - ) - ( /506955DC R3 R6 1 - ( 1 /a ) - ( 2 GND ) - ) - ( /50695694 R1 V1 DC - ( 1 N-000004 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component E1 - 1_pin -$endlist -$component G1 - 1_pin -$endlist -$component I1 - 1_pin -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R4 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R5 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R6 - R? - SM0603 - SM0805 - R?-* -$endlist -$component V1 - 1_pin -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/linear1/linear1.pro b/OSCAD/Examples/linear1/linear1.pro deleted file mode 100644 index 0a485f9..0000000 --- a/OSCAD/Examples/linear1/linear1.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 22 October 2012 04:08:41 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/linear1/linear1.proj b/OSCAD/Examples/linear1/linear1.proj deleted file mode 100644 index e532113..0000000 --- a/OSCAD/Examples/linear1/linear1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile linear1.sch diff --git a/OSCAD/Examples/linear1/linear1.sch b/OSCAD/Examples/linear1/linear1.sch deleted file mode 100644 index 452dbd0..0000000 --- a/OSCAD/Examples/linear1/linear1.sch +++ /dev/null @@ -1,234 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:24:11 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:linear1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5500 2900 -Wire Wire Line - 5350 2900 5750 2900 -Connection ~ 7300 2750 -Wire Wire Line - 7300 2750 7700 2750 -Wire Wire Line - 6700 2500 7300 2500 -Connection ~ 5800 3800 -Wire Wire Line - 5800 3800 5800 4000 -Connection ~ 4600 3800 -Wire Wire Line - 4600 3500 4600 3800 -Wire Wire Line - 7300 2900 7050 2900 -Wire Wire Line - 6400 2900 6400 3000 -Wire Wire Line - 3750 2900 3950 2900 -Wire Wire Line - 4750 2900 4450 2900 -Wire Wire Line - 6550 2900 6250 2900 -Connection ~ 6400 2900 -Wire Wire Line - 4600 3000 4600 2900 -Connection ~ 4600 2900 -Wire Wire Line - 3750 3800 7300 3800 -Wire Wire Line - 7300 3800 7300 3500 -Connection ~ 5500 3800 -Wire Wire Line - 6400 3500 6400 3800 -Connection ~ 6400 3800 -Wire Wire Line - 7300 2500 7300 3000 -Connection ~ 7300 2900 -Wire Wire Line - 6850 3800 6850 3600 -Connection ~ 6850 3800 -Connection ~ 5650 2900 -Wire Wire Line - 5650 2900 5650 2500 -Wire Wire Line - 5650 2500 6100 2500 -$Comp -L VPRINT1 U1 -U 1 1 506964BE -P 7700 2450 -F 0 "U1" H 7550 2550 50 0001 C CNN -F 1 "VPRINT1" H 7850 2550 50 0000 C CNN - 1 7700 2450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50695F5E -P 6850 3600 -F 0 "#FLG01" H 6850 3870 30 0001 C CNN -F 1 "PWR_FLAG" H 6850 3830 30 0000 C CNN - 1 6850 3600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50695EE6 -P 5800 4000 -F 0 "#PWR02" H 5800 4000 30 0001 C CNN -F 1 "GND" H 5800 3930 30 0001 C CNN - 1 5800 4000 - 1 0 0 -1 -$EndComp -Text Label 6100 3800 0 60 ~ 0 -c -Text Label 6350 2750 0 60 ~ 0 -c -Text Label 6450 2750 0 60 ~ 0 -b -Text Label 6550 2900 0 60 ~ 0 -b -Text Label 5100 3150 0 60 ~ 0 -b -Text Label 5000 3150 0 60 ~ 0 -a -Text Label 7150 2900 0 60 ~ 0 -a -$Comp -L VCVS E1 -U 1 1 50695730 -P 5050 2950 -F 0 "E1" H 4850 3050 50 0000 C CNN -F 1 "0.5" H 4850 2900 50 0000 C CNN - 1 5050 2950 - 1 0 0 -1 -$EndComp -$Comp -L DC I1 -U 1 1 506956A6 -P 5500 3350 -F 0 "I1" H 5300 3450 60 0000 C CNN -F 1 "1" H 5300 3300 60 0000 C CNN -F 2 "R1" H 5200 3350 60 0000 C CNN - 1 5500 3350 - -1 0 0 1 -$EndComp -$Comp -L DC V1 -U 1 1 50695694 -P 3750 3350 -F 0 "V1" H 3550 3450 60 0000 C CNN -F 1 "1" H 3550 3300 60 0000 C CNN -F 2 "R1" H 3450 3350 60 0000 C CNN - 1 3750 3350 - 1 0 0 -1 -$EndComp -$Comp -L VCCS G1 -U 1 1 5069566A -P 6400 2550 -F 0 "G1" H 6200 2650 50 0000 C CNN -F 1 "0.5" H 6200 2500 50 0000 C CNN - 1 6400 2550 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 506955DC -P 7300 3250 -F 0 "R6" V 7380 3250 50 0000 C CNN -F 1 "1" V 7300 3250 50 0000 C CNN - 1 7300 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 506955D8 -P 6400 3250 -F 0 "R3" V 6480 3250 50 0000 C CNN -F 1 "1" V 6400 3250 50 0000 C CNN - 1 6400 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 506955D1 -P 6800 2900 -F 0 "R5" V 6880 2900 50 0000 C CNN -F 1 "0.5" V 6800 2900 50 0000 C CNN - 1 6800 2900 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 506955CC -P 6000 2900 -F 0 "R4" V 6080 2900 50 0000 C CNN -F 1 "1" V 6000 2900 50 0000 C CNN - 1 6000 2900 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 506955C7 -P 4600 3250 -F 0 "R2" V 4680 3250 50 0000 C CNN -F 1 "1" V 4600 3250 50 0000 C CNN - 1 4600 3250 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 506955C2 -P 4200 2900 -F 0 "R1" V 4280 2900 50 0000 C CNN -F 1 "1" V 4200 2900 50 0000 C CNN - 1 4200 2900 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/linear2/analysis b/OSCAD/Examples/linear2/analysis deleted file mode 100644 index 162ad08..0000000 --- a/OSCAD/Examples/linear2/analysis +++ /dev/null @@ -1 +0,0 @@ -.op
\ No newline at end of file diff --git a/OSCAD/Examples/linear2/linear2-cache.bak b/OSCAD/Examples/linear2/linear2-cache.bak deleted file mode 100644 index df2206b..0000000 --- a/OSCAD/Examples/linear2/linear2-cache.bak +++ /dev/null @@ -1,89 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:32:27 AM IST -#encoding utf-8 -# -# CCVS -# -DEF CCVS H 0 40 Y Y 1 F N -F0 "H" -200 100 50 H V C CNN -F1 "CCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vprint1 -# -DEF vprint1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vprint1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/linear2/linear2-cache.lib b/OSCAD/Examples/linear2/linear2-cache.lib deleted file mode 100644 index 79f9376..0000000 --- a/OSCAD/Examples/linear2/linear2-cache.lib +++ /dev/null @@ -1,89 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:32:49 AM IST -#encoding utf-8 -# -# CCVS -# -DEF CCVS H 0 40 Y Y 1 F N -F0 "H" -200 100 50 H V C CNN -F1 "CCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vprint1 -# -DEF vprint1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vprint1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/linear2/linear2.bak b/OSCAD/Examples/linear2/linear2.bak deleted file mode 100644 index e9d9386..0000000 --- a/OSCAD/Examples/linear2/linear2.bak +++ /dev/null @@ -1,181 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:32:27 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:linear2-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 6450 4000 -Wire Wire Line - 6450 4000 6450 3800 -Connection ~ 6750 3000 -Wire Wire Line - 6750 3000 6750 2850 -Connection ~ 6000 4000 -Wire Wire Line - 6000 3800 6000 4000 -Connection ~ 5300 3000 -Wire Wire Line - 5300 3300 5300 3000 -Wire Wire Line - 6850 3800 6850 4000 -Wire Wire Line - 6850 4000 4800 4000 -Wire Wire Line - 4800 4000 4800 3950 -Wire Wire Line - 5850 3000 6100 3000 -Wire Wire Line - 4800 3050 4800 3000 -Wire Wire Line - 4800 3000 5350 3000 -Wire Wire Line - 6600 3000 6850 3000 -Wire Wire Line - 6850 3000 6850 3200 -Wire Wire Line - 5300 3800 5300 4000 -Connection ~ 5300 4000 -Wire Wire Line - 6000 3000 6000 3150 -Connection ~ 6000 3000 -Wire Wire Line - 5600 4000 5600 4150 -Connection ~ 5600 4000 -$Comp -L PWR_FLAG #FLG01 -U 1 1 5069EA51 -P 6450 3800 -F 0 "#FLG01" H 6450 4070 30 0001 C CNN -F 1 "PWR_FLAG" H 6450 4030 30 0000 C CNN - 1 6450 3800 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5069EA30 -P 5600 4150 -F 0 "#PWR02" H 5600 4150 30 0001 C CNN -F 1 "GND" H 5600 4080 30 0001 C CNN - 1 5600 4150 - 1 0 0 -1 -$EndComp -$Comp -L VPRINT1 U1 -U 1 1 5069E9D3 -P 6750 2550 -F 0 "U1" H 6600 2650 50 0001 C CNN -F 1 "VPRINT1" H 6900 2650 50 0000 C CNN - 1 6750 2550 - 1 0 0 -1 -$EndComp -Text Label 6600 3550 0 60 ~ 0 -b -Text Label 6600 3450 0 60 ~ 0 -a -Text Label 6000 3300 0 60 ~ 0 -b -Text Label 6000 3150 0 60 ~ 0 -a -$Comp -L R R4 -U 1 1 5069E7B0 -P 6350 3000 -F 0 "R4" V 6430 3000 50 0000 C CNN -F 1 "0.1" V 6350 3000 50 0000 C CNN - 1 6350 3000 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 5069E7AC -P 5300 3550 -F 0 "R1" V 5380 3550 50 0000 C CNN -F 1 "0.2" V 5300 3550 50 0000 C CNN - 1 5300 3550 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5069E7A9 -P 5600 3000 -F 0 "R2" V 5680 3000 50 0000 C CNN -F 1 "0.1" V 5600 3000 50 0000 C CNN - 1 5600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 5069E7A6 -P 6000 3550 -F 0 "R3" V 6080 3550 50 0000 C CNN -F 1 "0.2" V 6000 3550 50 0000 C CNN - 1 6000 3550 - 1 0 0 -1 -$EndComp -$Comp -L CCVS H1 -U 1 1 5069E78C -P 6800 3500 -F 0 "H1" H 6600 3600 50 0000 C CNN -F 1 "2" H 6600 3450 50 0000 C CNN - 1 6800 3500 - 0 1 1 0 -$EndComp -$Comp -L DC I1 -U 1 1 5069E6DB -P 4800 3500 -F 0 "I1" H 4600 3600 60 0000 C CNN -F 1 "1" H 4600 3450 60 0000 C CNN -F 2 "R1" H 4500 3500 60 0000 C CNN - 1 4800 3500 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/linear2/linear2.brd b/OSCAD/Examples/linear2/linear2.brd deleted file mode 100644 index ab9dee7..0000000 --- a/OSCAD/Examples/linear2/linear2.brd +++ /dev/null @@ -1,398 +0,0 @@ -PCBNEW-BOARD Version 1 date Tuesday 02 October 2012 12:48:38 AM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 9 -NoConn 0 -Di 48825 32959 59875 43721 -Ndraw 0 -Ntrack 25 -Nzone 0 -BoardThickness 630 -Nmodule 6 -Nnets 6 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "1 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "/a" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "/b" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 5 "N-000005" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "/a" -AddNet "/b" -AddNet "GND" -AddNet "N-000004" -AddNet "N-000005" -$EndNCLASS -$MODULE R3 -Po 58000 34500 0 15 00200000 5069EAF6 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5069EAF6 -AR /5069E7AC -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R1" -T1 0 0 550 500 0 80 N I 21 N "0.2" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 58000 39500 0 15 00200000 5069EAF8 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5069EAF8 -AR /5069E7A9 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R2" -T1 0 0 550 500 0 80 N I 21 N "0.1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "/a" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 58000 37000 0 15 00200000 5069EAFA ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5069EAFA -AR /5069E7A6 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R3" -T1 0 0 550 500 0 80 N I 21 N "0.2" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "/b" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 58000 42500 0 15 00200000 5069EAFC ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5069EAFC -AR /5069E7B0 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R4" -T1 0 0 550 500 0 80 N I 21 N "0.1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 5 "N-000005" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "/a" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R1 -Po 52000 34000 0 15 00200000 5069EAFD ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 5069EAFD -AR /5069E6DB -Op A A 0 -T0 -400 1000 550 500 0 80 N V 21 N "I1" -T1 -450 1000 550 500 0 80 N I 21 N "DC" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE bornier4 -Po 52000 39500 900 15 3EC0ED29 5069EAFE ~~ -Li bornier4 -Cd Bornier d'alimentation 4 pins -Kw DEV -Sc 5069EAFE -AR /5069E78C -Op 0 0 0 -T0 0 -2500 1030 629 900 120 N V 21 N "H1" -T1 0 2000 600 600 900 120 N V 21 N "2" -DS -4000 -1500 -4000 1500 120 21 -DS 4000 1500 4000 -1500 120 21 -DS 4000 1000 -4000 1000 120 21 -DS -4000 -1500 4000 -1500 120 21 -DS -4000 1500 4000 1500 120 21 -$PAD -Sh "2" C 1500 1500 0 0 900 -Dr 600 0 0 -At STD N 00E0FFFF -Ne 3 "GND" -Po -1000 0 -$EndPAD -$PAD -Sh "3" C 1500 1500 0 0 900 -Dr 600 0 0 -At STD N 00E0FFFF -Ne 1 "/a" -Po 1000 0 -$EndPAD -$PAD -Sh "1" R 1500 1500 0 0 900 -Dr 600 0 0 -At STD N 00E0FFFF -Ne 5 "N-000005" -Po -3000 0 -$EndPAD -$PAD -Sh "4" C 1500 1500 0 0 900 -Dr 600 0 0 -At STD N 00E0FFFF -Ne 2 "/b" -Po 3000 0 -$EndPAD -$SHAPE3D -Na "device/bornier_4.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE bornier4 -$TRACK -Po 0 56500 39500 58000 39500 80 -1 -De 0 0 1 0 400000 -Po 0 59500 41000 59500 42500 80 -1 -De 0 0 1 0 800000 -Po 0 58000 39500 59500 41000 80 -1 -De 0 0 1 0 0 -Po 0 52000 38500 55500 38500 80 -1 -De 0 0 1 0 400000 -Po 0 55500 38500 56500 39500 80 -1 -De 0 0 1 0 800000 -Po 0 52000 36500 56000 36500 80 -1 -De 0 0 2 0 400000 -Po 0 56000 36500 56500 37000 80 -1 -De 0 0 2 0 800000 -Po 0 52000 40500 50500 39000 80 -1 -De 0 0 3 0 400000 -Po 0 52500 33500 52500 34000 80 -1 -De 0 0 3 0 800000 -Po 0 52000 33000 52500 33500 80 -1 -De 0 0 3 0 0 -Po 0 51000 33000 52000 33000 80 -1 -De 0 0 3 0 0 -Po 0 50500 33500 51000 33000 80 -1 -De 0 0 3 0 0 -Po 0 50500 39000 50500 33500 80 -1 -De 0 0 3 0 0 -Po 0 59500 34500 59500 37000 80 -1 -De 0 0 3 0 C00000 -Po 0 52500 34000 55000 34000 80 -1 -De 0 0 3 0 400000 -Po 0 58500 33500 59500 34500 80 -1 -De 0 0 3 0 800000 -Po 0 55500 33500 58500 33500 80 -1 -De 0 0 3 0 0 -Po 0 55000 34000 55500 33500 80 -1 -De 0 0 3 0 0 -Po 0 56500 34500 57500 34500 80 -1 -De 0 0 4 0 400000 -Po 0 58500 38500 59500 39500 80 -1 -De 0 0 4 0 800000 -Po 0 58500 35500 58500 38500 80 -1 -De 0 0 4 0 0 -Po 0 57500 34500 58500 35500 80 -1 -De 0 0 4 0 0 -Po 0 51500 34000 52000 34500 80 -1 -De 0 0 4 0 400000 -Po 0 52000 34500 56500 34500 80 -1 -De 0 0 4 0 800000 -Po 0 52000 42500 56500 42500 80 -1 -De 0 0 5 0 C00000 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/linear2/linear2.cir b/OSCAD/Examples/linear2/linear2.cir deleted file mode 100644 index f3a43b2..0000000 --- a/OSCAD/Examples/linear2/linear2.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:32:43 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 5 VPRINT1 -R4 5 2 0.1 -R1 4 0 0.2 -R2 2 4 0.1 -R3 3 0 0.2 -H1 5 0 2 3 2 -I1 4 0 1 - -.end diff --git a/OSCAD/Examples/linear2/linear2.cir.ckt b/OSCAD/Examples/linear2/linear2.cir.ckt deleted file mode 100644 index 04d0eb4..0000000 --- a/OSCAD/Examples/linear2/linear2.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:32:43 am ist
-
-* Printing option vprint1
-r4 5 2 0.1
-r1 4 0 0.2
-r2 2 4 0.1
-r3 3 0 0.2
-* h1
-i1 4 0 1
-Vh1 2 3 0
-h1 5 0 Vh1 2
-
-.op
-.print v(5)
-.end
diff --git a/OSCAD/Examples/linear2/linear2.cir.ckt.sol b/OSCAD/Examples/linear2/linear2.cir.ckt.sol deleted file mode 100644 index 924ce9b..0000000 --- a/OSCAD/Examples/linear2/linear2.cir.ckt.sol +++ /dev/null @@ -1,9 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -R 5 2 0.0000000000 0.0000000000 -R 4 0 0.0000000000 0.0000000000 -R 2 4 0.0000000000 0.0000000000 -R 3 0 0.0000000000 0.0000000000 -I 4 0 0.0000000000 0.0000000000 -V 2 3 0.0000000000 0.0000000000 -H 5 0 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/linear2/linear2.cir.out b/OSCAD/Examples/linear2/linear2.cir.out deleted file mode 100644 index e0328e7..0000000 --- a/OSCAD/Examples/linear2/linear2.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:32:43 am ist
-
-* Printing option vprint1
-r4 5 2 0.1
-r1 4 0 0.2
-r2 2 4 0.1
-r3 3 0 0.2
-* h1
-i1 4 0 1
-Vh1 2 3 0
-h1 5 0 Vh1 2
-
-.op
-
-* Control Statements
-.control
-run
-print v(5)
-.endc
-.end
diff --git a/OSCAD/Examples/linear2/linear2.cmp b/OSCAD/Examples/linear2/linear2.cmp deleted file mode 100644 index 3d50822..0000000 --- a/OSCAD/Examples/linear2/linear2.cmp +++ /dev/null @@ -1,45 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Tuesday 02 October 2012 12:41:01 AM IST - -BeginCmp -TimeStamp = /5069E78C; -Reference = H1; -ValeurCmp = 2; -IdModule = bornier4; -EndCmp - -BeginCmp -TimeStamp = /5069E6DB; -Reference = I1; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /5069E7AC; -Reference = R1; -ValeurCmp = 0.2; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5069E7A9; -Reference = R2; -ValeurCmp = 0.1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5069E7A6; -Reference = R3; -ValeurCmp = 0.2; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5069E7B0; -Reference = R4; -ValeurCmp = 0.1; -IdModule = R3; -EndCmp - -EndListe diff --git a/OSCAD/Examples/linear2/linear2.net b/OSCAD/Examples/linear2/linear2.net deleted file mode 100644 index 11706cb..0000000 --- a/OSCAD/Examples/linear2/linear2.net +++ /dev/null @@ -1,63 +0,0 @@ -# EESchema Netlist Version 1.1 created Tuesday 02 October 2012 12:41:01 AM IST -( - ( /5069E78C bornier4 H1 2 - ( 1 N-000005 ) - ( 2 GND ) - ( 3 /a ) - ( 4 /b ) - ) - ( /5069E6DB R1 I1 DC - ( 1 N-000004 ) - ( 2 GND ) - ) - ( /5069E7AC R3 R1 0.2 - ( 1 N-000004 ) - ( 2 GND ) - ) - ( /5069E7A9 R3 R2 0.1 - ( 1 /a ) - ( 2 N-000004 ) - ) - ( /5069E7A6 R3 R3 0.2 - ( 1 /b ) - ( 2 GND ) - ) - ( /5069E7B0 R3 R4 0.1 - ( 1 N-000005 ) - ( 2 /a ) - ) -) -* -{ Allowed footprints by component: -$component H1 - 1_pin -$endlist -$component I1 - 1_pin -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R4 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/linear2/linear2.pro b/OSCAD/Examples/linear2/linear2.pro deleted file mode 100644 index a5dcd33..0000000 --- a/OSCAD/Examples/linear2/linear2.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 22 October 2012 04:17:19 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/linear2/linear2.proj b/OSCAD/Examples/linear2/linear2.proj deleted file mode 100644 index 8bb7fa3..0000000 --- a/OSCAD/Examples/linear2/linear2.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile linear2.sch diff --git a/OSCAD/Examples/linear2/linear2.sch b/OSCAD/Examples/linear2/linear2.sch deleted file mode 100644 index c85a06a..0000000 --- a/OSCAD/Examples/linear2/linear2.sch +++ /dev/null @@ -1,181 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:32:49 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:linear2-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 6450 4000 -Wire Wire Line - 6450 4000 6450 3800 -Connection ~ 6750 3000 -Wire Wire Line - 6750 3000 6750 2850 -Connection ~ 6000 4000 -Wire Wire Line - 6000 3800 6000 4000 -Connection ~ 5300 3000 -Wire Wire Line - 5300 3300 5300 3000 -Wire Wire Line - 6850 3800 6850 4000 -Wire Wire Line - 6850 4000 4800 4000 -Wire Wire Line - 4800 4000 4800 3950 -Wire Wire Line - 5850 3000 6100 3000 -Wire Wire Line - 4800 3050 4800 3000 -Wire Wire Line - 4800 3000 5350 3000 -Wire Wire Line - 6600 3000 6850 3000 -Wire Wire Line - 6850 3000 6850 3200 -Wire Wire Line - 5300 3800 5300 4000 -Connection ~ 5300 4000 -Wire Wire Line - 6000 3000 6000 3150 -Connection ~ 6000 3000 -Wire Wire Line - 5600 4000 5600 4150 -Connection ~ 5600 4000 -$Comp -L PWR_FLAG #FLG01 -U 1 1 5069EA51 -P 6450 3800 -F 0 "#FLG01" H 6450 4070 30 0001 C CNN -F 1 "PWR_FLAG" H 6450 4030 30 0000 C CNN - 1 6450 3800 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5069EA30 -P 5600 4150 -F 0 "#PWR02" H 5600 4150 30 0001 C CNN -F 1 "GND" H 5600 4080 30 0001 C CNN - 1 5600 4150 - 1 0 0 -1 -$EndComp -$Comp -L VPRINT1 U1 -U 1 1 5069E9D3 -P 6750 2550 -F 0 "U1" H 6600 2650 50 0001 C CNN -F 1 "VPRINT1" H 6900 2650 50 0000 C CNN - 1 6750 2550 - 1 0 0 -1 -$EndComp -Text Label 6600 3550 0 60 ~ 0 -b -Text Label 6600 3450 0 60 ~ 0 -a -Text Label 6000 3300 0 60 ~ 0 -b -Text Label 6000 3150 0 60 ~ 0 -a -$Comp -L R R4 -U 1 1 5069E7B0 -P 6350 3000 -F 0 "R4" V 6430 3000 50 0000 C CNN -F 1 "0.1" V 6350 3000 50 0000 C CNN - 1 6350 3000 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 5069E7AC -P 5300 3550 -F 0 "R1" V 5380 3550 50 0000 C CNN -F 1 "0.2" V 5300 3550 50 0000 C CNN - 1 5300 3550 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5069E7A9 -P 5600 3000 -F 0 "R2" V 5680 3000 50 0000 C CNN -F 1 "0.1" V 5600 3000 50 0000 C CNN - 1 5600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 5069E7A6 -P 6000 3550 -F 0 "R3" V 6080 3550 50 0000 C CNN -F 1 "0.2" V 6000 3550 50 0000 C CNN - 1 6000 3550 - 1 0 0 -1 -$EndComp -$Comp -L CCVS H1 -U 1 1 5069E78C -P 6800 3500 -F 0 "H1" H 6600 3600 50 0000 C CNN -F 1 "2" H 6600 3450 50 0000 C CNN - 1 6800 3500 - 0 1 1 0 -$EndComp -$Comp -L DC I1 -U 1 1 5069E6DB -P 4800 3500 -F 0 "I1" H 4600 3600 60 0000 C CNN -F 1 "1" H 4600 3450 60 0000 C CNN -F 2 "R1" H 4500 3500 60 0000 C CNN - 1 4800 3500 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/mixMode/analysis b/OSCAD/Examples/mixMode/analysis deleted file mode 100644 index bf5e632..0000000 --- a/OSCAD/Examples/mixMode/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-09 1e-06 0e-00 diff --git a/OSCAD/Examples/mixMode/mixMode-cache.bak b/OSCAD/Examples/mixMode/mixMode-cache.bak deleted file mode 100644 index 9e5fbb3..0000000 --- a/OSCAD/Examples/mixMode/mixMode-cache.bak +++ /dev/null @@ -1,122 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:40:24 AM IST -#encoding utf-8 -# -# 74HCT04 -# -DEF 74HCT04 U 0 30 Y Y 6 F N -F0 "U" 150 100 40 H V C CNN -F1 "74HCT04" 200 -100 40 H V C CNN -ALIAS 74HC14 74HC04 74LS14 -DRAW -P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N -X GND 7 -50 -100 0 U 30 20 0 0 W N -X VCC 14 -50 100 0 D 30 20 0 0 W N -X ~ 1 -450 0 300 R 60 60 1 1 I -X ~ 2 450 0 300 L 60 60 1 1 O I -X ~ 3 -450 0 300 R 60 60 2 1 I -X ~ 4 450 0 300 L 60 60 2 1 O I -X ~ 5 -450 0 300 R 60 60 3 1 I -X ~ 6 450 0 300 L 60 60 3 1 O I -X ~ 8 450 0 300 L 60 60 4 1 O I -X ~ 9 -450 0 300 R 60 60 4 1 I -X ~ 10 450 0 300 L 60 60 5 1 O I -X ~ 11 -450 0 300 R 60 60 5 1 I -X ~ 12 450 0 300 L 60 60 6 1 O I -X ~ 13 -450 0 300 R 60 60 6 1 I -X ~ 1 -450 0 300 R 60 60 1 2 I I -X ~ 2 450 0 300 L 60 60 1 2 O -X ~ 3 -450 0 300 R 60 60 2 2 I I -X ~ 4 450 0 300 L 60 60 2 2 O -X ~ 5 -450 0 300 R 60 60 3 2 I I -X ~ 6 450 0 300 L 60 60 3 2 O -X ~ 8 450 0 300 L 60 60 4 2 O -X ~ 9 -450 0 300 R 60 60 4 2 I I -X ~ 10 450 0 300 L 60 60 5 2 O -X ~ 11 -450 0 300 R 60 60 5 2 I I -X ~ 12 450 0 300 L 60 60 6 2 O -X ~ 13 -450 0 300 R 60 60 6 2 I I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/mixMode/mixMode-cache.lib b/OSCAD/Examples/mixMode/mixMode-cache.lib deleted file mode 100644 index ab75e8e..0000000 --- a/OSCAD/Examples/mixMode/mixMode-cache.lib +++ /dev/null @@ -1,122 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:41:04 AM IST -#encoding utf-8 -# -# 74HCT04 -# -DEF 74HCT04 U 0 30 Y Y 6 F N -F0 "U" 150 100 40 H V C CNN -F1 "74HCT04" 200 -100 40 H V C CNN -ALIAS 74HC14 74HC04 74LS14 -DRAW -P 4 0 0 0 -150 150 -150 -150 150 0 -150 150 N -X GND 7 -50 -100 0 U 30 20 0 0 W N -X VCC 14 -50 100 0 D 30 20 0 0 W N -X ~ 1 -450 0 300 R 60 60 1 1 I -X ~ 2 450 0 300 L 60 60 1 1 O I -X ~ 3 -450 0 300 R 60 60 2 1 I -X ~ 4 450 0 300 L 60 60 2 1 O I -X ~ 5 -450 0 300 R 60 60 3 1 I -X ~ 6 450 0 300 L 60 60 3 1 O I -X ~ 8 450 0 300 L 60 60 4 1 O I -X ~ 9 -450 0 300 R 60 60 4 1 I -X ~ 10 450 0 300 L 60 60 5 1 O I -X ~ 11 -450 0 300 R 60 60 5 1 I -X ~ 12 450 0 300 L 60 60 6 1 O I -X ~ 13 -450 0 300 R 60 60 6 1 I -X ~ 1 -450 0 300 R 60 60 1 2 I I -X ~ 2 450 0 300 L 60 60 1 2 O -X ~ 3 -450 0 300 R 60 60 2 2 I I -X ~ 4 450 0 300 L 60 60 2 2 O -X ~ 5 -450 0 300 R 60 60 3 2 I I -X ~ 6 450 0 300 L 60 60 3 2 O -X ~ 8 450 0 300 L 60 60 4 2 O -X ~ 9 -450 0 300 R 60 60 4 2 I I -X ~ 10 450 0 300 L 60 60 5 2 O -X ~ 11 -450 0 300 R 60 60 5 2 I I -X ~ 12 450 0 300 L 60 60 6 2 O -X ~ 13 -450 0 300 R 60 60 6 2 I I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/mixMode/mixMode.bak b/OSCAD/Examples/mixMode/mixMode.bak deleted file mode 100644 index 1f9d2dd..0000000 --- a/OSCAD/Examples/mixMode/mixMode.bak +++ /dev/null @@ -1,165 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:40:24 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:mixMode-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB729 -P 7150 2900 -F 0 "U1" H 7000 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 7300 3000 50 0000 C CNN - 2 7150 2900 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB722 -P 5600 2950 -F 0 "U1" H 5450 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 5750 3050 50 0000 C CNN - 1 5600 2950 - 1 0 0 -1 -$EndComp -Connection ~ 5750 4400 -Wire Wire Line - 5750 4400 5750 4300 -Connection ~ 7150 3350 -Wire Wire Line - 7150 3350 7150 3200 -Wire Wire Line - 5950 3350 4800 3350 -Wire Wire Line - 7350 4000 7350 4400 -Wire Wire Line - 7350 4400 4800 4400 -Connection ~ 5600 3350 -Wire Wire Line - 5600 3250 5600 3350 -Wire Wire Line - 5350 3350 5350 3650 -Wire Wire Line - 4800 4550 4800 4250 -Connection ~ 4800 4400 -Connection ~ 5350 3350 -Wire Wire Line - 6850 3350 7350 3350 -Wire Wire Line - 7350 3350 7350 3500 -Wire Wire Line - 6350 3000 6350 3250 -Wire Wire Line - 5350 4400 5350 4150 -Connection ~ 5350 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 50653022 -P 6350 3000 -F 0 "#FLG01" H 6350 3270 30 0001 C CNN -F 1 "PWR_FLAG" H 6350 3230 30 0000 C CNN - 1 6350 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50652FB6 -P 7350 3750 -F 0 "R2" V 7430 3750 50 0000 C CNN -F 1 "1000" V 7350 3750 50 0000 C CNN - 1 7350 3750 - 1 0 0 -1 -$EndComp -$Comp -L 74HC04 U2 -U 1 1 505FDE5C -P 6400 3350 -F 0 "U2" H 6550 3450 40 0000 C CNN -F 1 "74HC04" H 6600 3250 40 0000 C CNN - 1 6400 3350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 505CA177 -P 5750 4300 -F 0 "#FLG02" H 5750 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 4530 30 0000 C CNN - 1 5750 4300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 505C9F25 -P 5350 3900 -F 0 "R1" V 5430 3900 50 0000 C CNN -F 1 "1000" V 5350 3900 50 0000 C CNN - 1 5350 3900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 505C9EE8 -P 4800 4550 -F 0 "#PWR03" H 4800 4550 30 0001 C CNN -F 1 "GND" H 4800 4480 30 0001 C CNN - 1 4800 4550 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 505C9ECF -P 4800 3800 -F 0 "v1" H 4600 3900 60 0000 C CNN -F 1 "PULSE" H 4600 3750 60 0000 C CNN - 1 4800 3800 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/mixMode/mixMode.brd b/OSCAD/Examples/mixMode/mixMode.brd deleted file mode 100644 index a68ce3f..0000000 --- a/OSCAD/Examples/mixMode/mixMode.brd +++ /dev/null @@ -1,400 +0,0 @@ -PCBNEW-BOARD Version 1 date Friday 28 September 2012 10:42:25 AM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 7 -NoConn 7 -Di 40017 31950 63751 53251 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 7 -Nnets 7 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "28 sep 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000001" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000004" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000005" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 5 "N-000006" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 6 "VCC" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000001" -AddNet "N-000004" -AddNet "N-000005" -AddNet "N-000006" -AddNet "VCC" -$EndNCLASS -$MODULE R1 -Po 47000 39000 0 15 00200000 50653175 ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 50653175 -AR /505C9F25 -Op A A 0 -T0 -400 1000 550 500 0 80 N V 21 N "R1" -T1 -450 1000 550 500 0 80 N I 21 N "1000" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 5 "N-000006" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE R1 -Po 46000 43000 0 15 00200000 50653177 ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 50653177 -AR /50652FB6 -Op A A 0 -T0 -400 1000 550 500 0 80 N V 21 N "R2" -T1 -450 1000 550 500 0 80 N I 21 N "R" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE DIP-14__300_ELL -Po 52500 34000 0 15 00200000 50653178 ~~ -Li DIP-14__300_ELL -Cd 14 pins DIL package, elliptical pads -Kw DIL -Sc 50653178 -AR /505FDE5C -Op 0 0 0 -T0 -2000 -500 600 450 0 113 N V 21 N "U2" -T1 500 500 600 450 0 113 N V 21 N "74HC04" -DS -4000 -1000 4000 -1000 150 21 -DS 4000 1000 -4000 1000 150 21 -DS -4000 1000 -4000 -1000 150 21 -DS -4000 -500 -3500 -500 150 21 -DS -3500 -500 -3500 500 150 21 -DS -3500 500 -4000 500 150 21 -DS 4000 -1000 4000 1000 150 21 -$PAD -Sh "1" R 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000005" -Po -3000 1500 -$EndPAD -$PAD -Sh "2" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000004" -Po -2000 1500 -$EndPAD -$PAD -Sh "3" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po -1000 1500 -$EndPAD -$PAD -Sh "4" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 0 1500 -$EndPAD -$PAD -Sh "5" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 1000 1500 -$EndPAD -$PAD -Sh "6" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 2000 1500 -$EndPAD -$PAD -Sh "7" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 3000 1500 -$EndPAD -$PAD -Sh "8" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 3000 -1500 -$EndPAD -$PAD -Sh "9" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 2000 -1500 -$EndPAD -$PAD -Sh "10" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 1000 -1500 -$EndPAD -$PAD -Sh "11" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 0 -1500 -$EndPAD -$PAD -Sh "12" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po -1000 -1500 -$EndPAD -$PAD -Sh "13" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po -2000 -1500 -$EndPAD -$PAD -Sh "14" O 620 900 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 6 "VCC" -Po -3000 -1500 -$EndPAD -$SHAPE3D -Na "dil/dil_14.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE DIP-14__300_ELL -$MODULE 2PIN_6mm -Po 55000 50500 0 15 00200000 50653179 ~~ -Li 2PIN_6mm -Cd module 2 pin (trou 6 mm) -Kw DEV -Sc 50653179 -AR /505C9ECF -Op 0 0 0 -T0 0 500 600 600 0 120 N V 21 N "v1" -T1 0 -500 600 600 0 120 N V 21 N "PULSE" -DS -8500 -2500 8500 -2500 150 21 -DS 8500 -2500 8500 2500 150 21 -DS 8500 2500 -8500 2500 150 21 -DS -8500 2500 -8500 -2500 150 21 -$PAD -Sh "1" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 5 "N-000006" -Po -5900 0 -$EndPAD -$PAD -Sh "2" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 5900 0 -$EndPAD -$SHAPE3D -Na "device/douille_4mm(red).wrl" -Sc 1.800000 1.800000 1.800000 -Of -0.590000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$SHAPE3D -Na "device/douille_4mm(red).wrl" -Sc 1.800000 1.800000 1.800000 -Of 0.590000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE 2PIN_6mm -$MODULE 1pin -Po 50000 44000 0 15 00200000 5065317A ~~ -Li 1pin -Cd module 1 pin (ou trou mecanique de percage) -Kw DEV -Sc 5065317A -AR /505FD8A0 -Op 0 0 0 -T0 0 -1200 400 400 0 100 N V 21 N "U1" -T1 0 1100 400 400 0 100 N I 21 N "ADC" -DC 0 0 0 -900 150 21 -$PAD -Sh "1" C 1600 1600 0 0 0 -Dr 1200 0 0 -At STD N 00E0FFFF -Ne 5 "N-000006" -Po 0 0 -$EndPAD -$EndMODULE 1pin -$MODULE 1pin -Po 59500 43500 0 15 00200000 5065317C ~~ -Li 1pin -Cd module 1 pin (ou trou mecanique de percage) -Kw DEV -Sc 5065317C -AR /505FDC21 -Op 0 0 0 -T0 0 -1200 400 400 0 100 N V 21 N "U3" -T1 0 1100 400 400 0 100 N I 21 N "DAC" -DC 0 0 0 -900 150 21 -$PAD -Sh "1" C 1600 1600 0 0 0 -Dr 1200 0 0 -At STD N 00E0FFFF -Ne 3 "N-000004" -Po 0 0 -$EndPAD -$EndMODULE 1pin -$MODULE 1pin -Po 41500 45500 0 15 00200000 5065317E ~~ -Li 1pin -Cd module 1 pin (ou trou mecanique de percage) -Kw DEV -Sc 5065317E -AR /5061678B -Op 0 0 0 -T0 0 -1200 400 400 0 100 N V 21 N "U4" -T1 0 1100 400 400 0 100 N I 21 N "VPLOT1" -DC 0 0 0 -900 150 21 -$PAD -Sh "1" C 1600 1600 0 0 0 -Dr 1200 0 0 -At STD N 00E0FFFF -Ne 5 "N-000006" -Po 0 0 -$EndPAD -$EndMODULE 1pin -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/mixMode/mixMode.cir b/OSCAD/Examples/mixMode/mixMode.cir deleted file mode 100644 index 3db9950..0000000 --- a/OSCAD/Examples/mixMode/mixMode.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:41:09 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 3 4 VPLOT8_1 -R2 4 0 1000 -U2 3 4 0 2 74HC04 -R1 3 0 1000 -v1 3 0 PULSE - -.end diff --git a/OSCAD/Examples/mixMode/mixMode.cir.ckt b/OSCAD/Examples/mixMode/mixMode.cir.ckt deleted file mode 100644 index 590cf66..0000000 --- a/OSCAD/Examples/mixMode/mixMode.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:41:09 am ist - -* Plotting option vplot8_1 -r2 4 0 1000 -* 74hc04 -r1 3 0 1000 -v1 3 0 pulse(0 5 0 1e-8 1e-8 0.25e-6 0.5e-6) -a1 [3] [3_in] u2adc -a2 3_in 4_out u2 -a3 [4_out] [4] u2dac -.model u2 d_inverter -.model u2adc adc_bridge(in_low=0.8 in_high=2.0) -.model u2dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 -.plot v(3) v(4) -.end diff --git a/OSCAD/Examples/mixMode/mixMode.cir.out b/OSCAD/Examples/mixMode/mixMode.cir.out deleted file mode 100644 index 27f8a8c..0000000 --- a/OSCAD/Examples/mixMode/mixMode.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:41:09 am ist - -* Plotting option vplot8_1 -r2 4 0 1000 -* 74hc04 -r1 3 0 1000 -v1 3 0 pulse(0 5 0 1e-8 1e-8 0.25e-6 0.5e-6) -a1 [3] [3_in] u2adc -a2 3_in 4_out u2 -a3 [4_out] [4] u2dac -.model u2 d_inverter -.model u2adc adc_bridge(in_low=0.8 in_high=2.0) -.model u2dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 - -* Control Statements -.control -run -plot v(3) v(4) -.endc -.end diff --git a/OSCAD/Examples/mixMode/mixMode.cmp b/OSCAD/Examples/mixMode/mixMode.cmp deleted file mode 100644 index 8a56a56..0000000 --- a/OSCAD/Examples/mixMode/mixMode.cmp +++ /dev/null @@ -1,52 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Friday 28 September 2012 10:41:02 AM IST - -BeginCmp -TimeStamp = /505C9F25; -Reference = R1; -ValeurCmp = 1000; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /50652FB6; -Reference = R2; -ValeurCmp = R; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /505FD8A0; -Reference = U1; -ValeurCmp = ADC; -IdModule = 1pin; -EndCmp - -BeginCmp -TimeStamp = /505FDE5C; -Reference = U2; -ValeurCmp = 74HC04; -IdModule = DIP-14__300_ELL; -EndCmp - -BeginCmp -TimeStamp = /505FDC21; -Reference = U3; -ValeurCmp = DAC; -IdModule = 1pin; -EndCmp - -BeginCmp -TimeStamp = /5061678B; -Reference = U4; -ValeurCmp = VPLOT1; -IdModule = 1pin; -EndCmp - -BeginCmp -TimeStamp = /505C9ECF; -Reference = v1; -ValeurCmp = PULSE; -IdModule = 2PIN_6mm; -EndCmp - -EndListe diff --git a/OSCAD/Examples/mixMode/mixMode.net b/OSCAD/Examples/mixMode/mixMode.net deleted file mode 100644 index 0175d5c..0000000 --- a/OSCAD/Examples/mixMode/mixMode.net +++ /dev/null @@ -1,77 +0,0 @@ -# EESchema Netlist Version 1.1 created Friday 28 September 2012 12:26:55 PM IST -( - ( /50653344 $noname U5 VPLOT1 {Lib=VPLOT1} - ( 1 N-000005 ) - ) - ( /50652FB6 $noname R2 1000 {Lib=R} - ( 1 N-000005 ) - ( 2 GND ) - ) - ( /5061678B $noname U4 VPLOT1 {Lib=VPLOT1} - ( 1 N-000001 ) - ) - ( /505FDE5C $noname U2 74HC04 {Lib=74HC04} - ( 1 N-000006 ) - ( 2 N-000004 ) - ( 7 GND ) - ( 14 VCC ) - ) - ( /505FDC21 $noname U3 DAC {Lib=DAC} - ( 1 N-000004 ) - ( 2 N-000005 ) - ) - ( /505FD8A0 $noname U1 ADC {Lib=ADC} - ( 1 N-000001 ) - ( 2 N-000006 ) - ) - ( /505C9F25 $noname R1 1000 {Lib=R} - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /505C9ECF $noname v1 PULSE {Lib=PULSE} - ( 1 N-000001 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component v1 - 1_pin -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "" "" - U1 1 - v1 1 - R1 1 - U4 1 -Net 2 "GND" "GND" - v1 2 - R2 2 - R1 2 - U2 7 -Net 4 "" "" - U2 2 - U3 1 -Net 5 "" "" - U3 2 - U5 1 - R2 1 -Net 6 "" "" - U1 2 - U2 1 -} -#End diff --git a/OSCAD/Examples/mixMode/mixMode.pro b/OSCAD/Examples/mixMode/mixMode.pro deleted file mode 100644 index 353cc12..0000000 --- a/OSCAD/Examples/mixMode/mixMode.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Tuesday 30 October 2012 11:12:31 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/mixMode/mixMode.proj b/OSCAD/Examples/mixMode/mixMode.proj deleted file mode 100644 index 465ba2d..0000000 --- a/OSCAD/Examples/mixMode/mixMode.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile mixMode.sch diff --git a/OSCAD/Examples/mixMode/mixMode.sch b/OSCAD/Examples/mixMode/mixMode.sch deleted file mode 100644 index 493dc4e..0000000 --- a/OSCAD/Examples/mixMode/mixMode.sch +++ /dev/null @@ -1,165 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:41:04 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:mixMode-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB729 -P 7150 2900 -F 0 "U1" H 7000 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 7300 3000 50 0000 C CNN - 2 7150 2900 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB722 -P 5600 2950 -F 0 "U1" H 5450 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 5750 3050 50 0000 C CNN - 1 5600 2950 - 1 0 0 -1 -$EndComp -Connection ~ 5750 4400 -Wire Wire Line - 5750 4400 5750 4300 -Connection ~ 7150 3350 -Wire Wire Line - 7150 3350 7150 3200 -Wire Wire Line - 5950 3350 4800 3350 -Wire Wire Line - 7350 4000 7350 4400 -Wire Wire Line - 7350 4400 4800 4400 -Connection ~ 5600 3350 -Wire Wire Line - 5600 3250 5600 3350 -Wire Wire Line - 5350 3350 5350 3650 -Wire Wire Line - 4800 4550 4800 4250 -Connection ~ 4800 4400 -Connection ~ 5350 3350 -Wire Wire Line - 6850 3350 7350 3350 -Wire Wire Line - 7350 3350 7350 3500 -Wire Wire Line - 6350 3000 6350 3250 -Wire Wire Line - 5350 4400 5350 4150 -Connection ~ 5350 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 50653022 -P 6350 3000 -F 0 "#FLG01" H 6350 3270 30 0001 C CNN -F 1 "PWR_FLAG" H 6350 3230 30 0000 C CNN - 1 6350 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50652FB6 -P 7350 3750 -F 0 "R2" V 7430 3750 50 0000 C CNN -F 1 "1000" V 7350 3750 50 0000 C CNN - 1 7350 3750 - 1 0 0 -1 -$EndComp -$Comp -L 74HC04 U2 -U 1 1 505FDE5C -P 6400 3350 -F 0 "U2" H 6550 3450 40 0000 C CNN -F 1 "74HC04" H 6600 3250 40 0000 C CNN - 1 6400 3350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 505CA177 -P 5750 4300 -F 0 "#FLG02" H 5750 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 4530 30 0000 C CNN - 1 5750 4300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 505C9F25 -P 5350 3900 -F 0 "R1" V 5430 3900 50 0000 C CNN -F 1 "1000" V 5350 3900 50 0000 C CNN - 1 5350 3900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 505C9EE8 -P 4800 4550 -F 0 "#PWR03" H 4800 4550 30 0001 C CNN -F 1 "GND" H 4800 4480 30 0001 C CNN - 1 4800 4550 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 505C9ECF -P 4800 3800 -F 0 "v1" H 4600 3900 60 0000 C CNN -F 1 "PULSE" H 4600 3750 60 0000 C CNN - 1 4800 3800 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/modifiedNodalExample/$savepcb.brd b/OSCAD/Examples/modifiedNodalExample/$savepcb.brd deleted file mode 100644 index d688470..0000000 --- a/OSCAD/Examples/modifiedNodalExample/$savepcb.brd +++ /dev/null @@ -1,366 +0,0 @@ -PCBNEW-BOARD Version 1 date Monday 01 October 2012 11:13:48 AM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 8 -NoConn 2 -Di 48625 31085 56375 36121 -Ndraw 0 -Ntrack 20 -Nzone 0 -BoardThickness 630 -Nmodule 6 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "1 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000002" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000002" -AddNet "N-000003" -AddNet "N-000004" -$EndNCLASS -$MODULE R3 -Po 54500 32500 1800 15 50692D16 50692991 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692991 -AR /50692613 -Op 0 A 0 -T0 0 0 550 500 2700 80 N V 21 N "R1" -T1 0 0 550 500 1800 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 50500 35500 1800 15 00200000 50692993 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692993 -AR /5067FEAC -Op 0 A 0 -T0 0 0 550 500 1800 80 N V 21 N "R2" -T1 0 0 550 500 1800 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 54500 34000 0 15 00200000 50692995 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692995 -AR /50692628 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R3" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 54500 35500 0 15 00200000 50692997 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692997 -AR /5069261E -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R4" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R1 -Po 49500 32500 1800 15 00200000 50692998 ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 50692998 -AR /5067FE8A -Op A A 0 -T0 -400 1000 550 500 1800 80 N V 21 N "v1" -T1 -450 1000 550 500 1800 80 N I 21 N "DC" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE R1 -Po 49500 34000 1800 15 00200000 5069299A ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 5069299A -AR /5067FE8E -Op A A 0 -T0 -400 1000 550 500 1800 80 N V 21 N "v2" -T1 -450 1000 550 500 1800 80 N I 21 N "DC" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$TRACK -Po 0 49000 34000 49500 33500 80 -1 -De 0 0 1 0 400000 -Po 0 49500 33000 49000 32500 80 -1 -De 0 0 1 0 800000 -Po 0 49500 33500 49500 33000 80 -1 -De 0 0 1 0 0 -Po 0 49000 35500 49500 35000 80 -1 -De 0 0 1 0 400000 -Po 0 49500 34500 49000 34000 80 -1 -De 0 0 1 0 800000 -Po 0 49500 35000 49500 34500 80 -1 -De 0 0 1 0 0 -Po 0 56000 32500 55500 33000 80 -1 -De 0 0 2 0 400000 -Po 0 55500 33500 56000 34000 80 -1 -De 0 0 2 0 800000 -Po 0 55500 33000 55500 33500 80 -1 -De 0 0 2 0 0 -Po 0 50000 32500 50500 32500 80 -1 -De 0 0 3 0 400000 -Po 0 52500 33000 53000 32500 80 -1 -De 0 0 3 0 800000 -Po 0 51000 33000 52500 33000 80 -1 -De 0 0 3 0 0 -Po 0 50500 32500 51000 33000 80 -1 -De 0 0 3 0 0 -Po 0 50000 34000 50500 34000 80 -1 -De 0 0 4 0 400000 -Po 0 52500 33500 53000 34000 80 -1 -De 0 0 4 0 800000 -Po 0 51000 33500 52500 33500 80 -1 -De 0 0 4 0 0 -Po 0 50500 34000 51000 33500 80 -1 -De 0 0 4 0 0 -Po 0 53000 35500 52500 35000 80 -1 -De 0 0 4 0 400000 -Po 0 52500 34500 53000 34000 80 -1 -De 0 0 4 0 800000 -Po 0 52500 35000 52500 34500 80 -1 -De 0 0 4 0 0 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/modifiedNodalExample/analysis b/OSCAD/Examples/modifiedNodalExample/analysis deleted file mode 100644 index 162ad08..0000000 --- a/OSCAD/Examples/modifiedNodalExample/analysis +++ /dev/null @@ -1 +0,0 @@ -.op
\ No newline at end of file diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodal.proj b/OSCAD/Examples/modifiedNodalExample/modifiedNodal.proj deleted file mode 100644 index 7b01bfb..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodal.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile modifiedNodal.sch diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample-cache.bak b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample-cache.bak deleted file mode 100644 index 35c96a0..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample-cache.bak +++ /dev/null @@ -1,72 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 22 October 2012 03:59:40 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 I -X - 2 0 -450 300 U 50 50 1 1 I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vprint1 -# -DEF vprint1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vprint1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -400 300 U 50 50 1 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample-cache.lib b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample-cache.lib deleted file mode 100644 index 7d128f1..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample-cache.lib +++ /dev/null @@ -1,72 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:46:55 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vprint1 -# -DEF vprint1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vprint1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.000 b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.000 deleted file mode 100644 index 8be4d3d..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.000 +++ /dev/null @@ -1,326 +0,0 @@ -PCBNEW-BOARD Version 1 date Monday 01 October 2012 10:59:42 AM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 8 -NoConn 8 -Di 48125 31765 56375 38121 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 6 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "1 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000002" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000002" -AddNet "N-000003" -AddNet "N-000004" -$EndNCLASS -$MODULE R3 -Po 54500 32500 0 15 00200000 50692991 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692991 -AR /50692613 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R1" -T1 0 0 550 500 0 80 N I 21 N "R" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 50000 37500 0 15 00200000 50692993 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692993 -AR /5069261E -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R2" -T1 0 0 550 500 0 80 N I 21 N "R" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 54500 37500 0 15 00200000 50692995 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692995 -AR /5067FEAC -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R3" -T1 0 0 550 500 0 80 N I 21 N "R" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 54500 35000 0 15 00200000 50692997 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692997 -AR /50692628 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R4" -T1 0 0 550 500 0 80 N I 21 N "R" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R1 -Po 49500 32500 0 15 00200000 50692998 ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 50692998 -AR /5067FE8A -Op A A 0 -T0 -400 1000 550 500 0 80 N V 21 N "v1" -T1 -450 1000 550 500 0 80 N I 21 N "DC" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE R1 -Po 49500 35000 0 15 00200000 5069299A ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 5069299A -AR /5067FE8E -Op A A 0 -T0 -400 1000 550 500 0 80 N V 21 N "v2" -T1 -450 1000 550 500 0 80 N I 21 N "DC" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.bak b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.bak deleted file mode 100644 index 0917845..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.bak +++ /dev/null @@ -1,169 +0,0 @@ -EESchema Schematic File Version 2 date Monday 22 October 2012 03:59:40 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:modifiedNodalExample-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5300 2650 5300 3250 -Wire Wire Line - 5300 3250 4950 3250 -Wire Wire Line - 4950 3250 4950 3550 -Connection ~ 4750 4250 -Wire Wire Line - 4750 4250 4750 4400 -Wire Wire Line - 4650 3050 4100 3050 -Wire Wire Line - 4100 3050 4100 3350 -Wire Wire Line - 4100 4250 5800 4250 -Wire Wire Line - 5550 3350 5800 3350 -Wire Wire Line - 4100 3350 4350 3350 -Wire Wire Line - 4850 3350 5050 3350 -Connection ~ 4950 3350 -Wire Wire Line - 4950 4050 4950 4250 -Connection ~ 4950 4250 -Wire Wire Line - 5800 3350 5800 3050 -Wire Wire Line - 5800 3050 5150 3050 -Wire Wire Line - 5300 4250 5300 4100 -Connection ~ 5300 4250 -$Comp -L VPRINT1 U1 -U 1 1 50692E86 -P 5300 2250 -F 0 "U1" H 5150 2350 50 0001 C CNN -F 1 "VPRINT1" H 5450 2350 50 0000 C CNN - 1 5300 2250 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5069279A -P 5300 4100 -F 0 "#FLG01" H 5300 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 4330 30 0000 C CNN - 1 5300 4100 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50692771 -P 4750 4400 -F 0 "#PWR02" H 4750 4400 30 0001 C CNN -F 1 "GND" H 4750 4330 30 0001 C CNN - 1 4750 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50692628 -P 5300 3350 -F 0 "R3" V 5380 3350 50 0000 C CNN -F 1 "1" V 5300 3350 50 0000 C CNN - 1 5300 3350 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 5069261E -P 4900 3050 -F 0 "R4" V 4980 3050 50 0000 C CNN -F 1 "1" V 4900 3050 50 0000 C CNN - 1 4900 3050 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 50692613 -P 4600 3350 -F 0 "R1" V 4680 3350 50 0000 C CNN -F 1 "1" V 4600 3350 50 0000 C CNN - 1 4600 3350 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5067FEAC -P 4950 3800 -F 0 "R2" V 5030 3800 50 0000 C CNN -F 1 "1" V 4950 3800 50 0000 C CNN - 1 4950 3800 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5067FE8E -P 5800 3800 -F 0 "v2" H 5600 3900 60 0000 C CNN -F 1 "10" H 5600 3750 60 0000 C CNN -F 2 "R3" H 5500 3800 60 0000 C CNN - 1 5800 3800 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5067FE8A -P 4100 3800 -F 0 "v1" H 3900 3900 60 0000 C CNN -F 1 "5" H 3900 3750 60 0000 C CNN -F 2 "R3" H 3800 3800 60 0000 C CNN - 1 4100 3800 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.brd b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.brd deleted file mode 100644 index 0eb5ac6..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.brd +++ /dev/null @@ -1,386 +0,0 @@ -PCBNEW-BOARD Version 1 date Monday 01 October 2012 11:15:23 AM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 8 -NoConn 0 -Di 48625 31085 57041 36121 -Ndraw 0 -Ntrack 30 -Nzone 0 -BoardThickness 630 -Nmodule 6 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "1 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000002" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000002" -AddNet "N-000003" -AddNet "N-000004" -$EndNCLASS -$MODULE R3 -Po 54500 32500 1800 15 50692D16 50692991 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692991 -AR /50692613 -Op 0 A 0 -T0 0 0 550 500 2700 80 N V 21 N "R1" -T1 0 0 550 500 1800 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 50500 35500 1800 15 00200000 50692993 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692993 -AR /5067FEAC -Op 0 A 0 -T0 0 0 550 500 1800 80 N V 21 N "R2" -T1 0 0 550 500 1800 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 54500 34000 0 15 00200000 50692995 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692995 -AR /50692628 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R3" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000002" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 54500 35500 0 15 00200000 50692997 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50692997 -AR /5069261E -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R4" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R1 -Po 49500 32500 1800 15 00200000 50692998 ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 50692998 -AR /5067FE8A -Op A A 0 -T0 -400 1000 550 500 1800 80 N V 21 N "v1" -T1 -450 1000 550 500 1800 80 N I 21 N "DC" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE R1 -Po 49500 34000 1800 15 00200000 5069299A ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 5069299A -AR /5067FE8E -Op A A 0 -T0 -400 1000 550 500 1800 80 N V 21 N "v2" -T1 -450 1000 550 500 1800 80 N I 21 N "DC" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 1800 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$TRACK -Po 0 49000 34000 49500 33500 80 -1 -De 0 0 1 0 400000 -Po 0 49500 33000 49000 32500 80 -1 -De 0 0 1 0 800000 -Po 0 49500 33500 49500 33000 80 -1 -De 0 0 1 0 0 -Po 0 49000 35500 49500 35000 80 -1 -De 0 0 1 0 400000 -Po 0 49500 34500 49000 34000 80 -1 -De 0 0 1 0 800000 -Po 0 49500 35000 49500 34500 80 -1 -De 0 0 1 0 0 -Po 0 52000 35500 52500 36000 80 -1 -De 0 0 2 0 400000 -Po 0 57000 35000 56000 34000 80 -1 -De 0 0 2 0 800000 -Po 0 57000 35500 57000 35000 80 -1 -De 0 0 2 0 0 -Po 0 56500 36000 57000 35500 80 -1 -De 0 0 2 0 0 -Po 0 56000 36000 56500 36000 80 -1 -De 0 0 2 0 0 -Po 0 52500 36000 56000 36000 80 -1 -De 0 0 2 0 0 -Po 0 56000 32500 55500 33000 80 -1 -De 0 0 2 0 400000 -Po 0 55500 33500 56000 34000 80 -1 -De 0 0 2 0 800000 -Po 0 55500 33000 55500 33500 80 -1 -De 0 0 2 0 0 -Po 0 53000 32500 53500 33000 80 -1 -De 0 0 3 0 400000 -Po 0 54000 35500 56000 35500 80 -1 -De 0 0 3 0 800000 -Po 0 53500 35000 54000 35500 80 -1 -De 0 0 3 0 0 -Po 0 53500 33000 53500 35000 80 -1 -De 0 0 3 0 0 -Po 0 50000 32500 50500 32500 80 -1 -De 0 0 3 0 400000 -Po 0 52500 33000 53000 32500 80 -1 -De 0 0 3 0 800000 -Po 0 51000 33000 52500 33000 80 -1 -De 0 0 3 0 0 -Po 0 50500 32500 51000 33000 80 -1 -De 0 0 3 0 0 -Po 0 50000 34000 50500 34000 80 -1 -De 0 0 4 0 400000 -Po 0 52500 33500 53000 34000 80 -1 -De 0 0 4 0 800000 -Po 0 51000 33500 52500 33500 80 -1 -De 0 0 4 0 0 -Po 0 50500 34000 51000 33500 80 -1 -De 0 0 4 0 0 -Po 0 53000 35500 52500 35000 80 -1 -De 0 0 4 0 400000 -Po 0 52500 34500 53000 34000 80 -1 -De 0 0 4 0 800000 -Po 0 52500 35000 52500 34500 80 -1 -De 0 0 4 0 0 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir deleted file mode 100644 index e2ac261..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:47:07 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 4 VPRINT1 -R3 2 4 1 -R4 2 3 1 -R1 4 3 1 -R2 4 0 1 -v2 2 0 10 -v1 3 0 5 - -.end diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt deleted file mode 100644 index 3a980a1..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:47:07 am ist - -* Printing option vprint1 -r3 2 4 1 -r4 2 3 1 -r1 4 3 1 -r2 4 0 1 -v2 2 0 10 -v1 3 0 5 - -.op -.print v(4) -.end diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt.sol b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt.sol deleted file mode 100644 index 9332aad..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.ckt.sol +++ /dev/null @@ -1,8 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -R 2 4 0.0000000000 0.0000000000 -R 2 3 0.0000000000 0.0000000000 -R 4 3 0.0000000000 0.0000000000 -R 4 0 0.0000000000 0.0000000000 -V 2 0 0.0000000000 0.0000000000 -V 3 0 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.out b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.out deleted file mode 100644 index 8ee50f6..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:47:07 am ist - -* Printing option vprint1 -r3 2 4 1 -r4 2 3 1 -r1 4 3 1 -r2 4 0 1 -v2 2 0 10 -v1 3 0 5 - -.op - -* Control Statements -.control -run -print v(4) -.endc -.end diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cmp b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cmp deleted file mode 100644 index 8d4d327..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.cmp +++ /dev/null @@ -1,45 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Monday 01 October 2012 11:03:36 AM IST - -BeginCmp -TimeStamp = /50692613; -Reference = R1; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5067FEAC; -Reference = R2; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /50692628; -Reference = R3; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5069261E; -Reference = R4; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /5067FE8A; -Reference = v1; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /5067FE8E; -Reference = v2; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -EndListe diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.net b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.net deleted file mode 100644 index 997296f..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.net +++ /dev/null @@ -1,80 +0,0 @@ -# EESchema Netlist Version 1.1 created Monday 01 October 2012 11:23:34 AM IST -( - ( /50692628 $noname R3 1 {Lib=R} - ( 1 N-000003 ) - ( 2 N-000004 ) - ) - ( /5069261E $noname R4 1 {Lib=R} - ( 1 N-000003 ) - ( 2 N-000001 ) - ) - ( /50692613 $noname R1 1 {Lib=R} - ( 1 N-000004 ) - ( 2 N-000001 ) - ) - ( /5067FEAC $noname R2 1 {Lib=R} - ( 1 N-000004 ) - ( 2 GND ) - ) - ( /5067FE8E R3 v2 DC {Lib=DC} - ( 1 N-000003 ) - ( 2 GND ) - ) - ( /5067FE8A R3 v1 DC {Lib=DC} - ( 1 N-000001 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R4 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component v2 - 1_pin -$endlist -$component v1 - 1_pin -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "" "" - R4 2 - R1 2 - v1 1 -Net 2 "GND" "GND" - v1 2 - v2 2 - R2 2 -Net 3 "" "" - v2 1 - R3 1 - R4 1 -Net 4 "" "" - R3 2 - R2 1 - R1 1 -} -#End diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.pro b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.pro deleted file mode 100644 index 5e4c1b7..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Monday 22 October 2012 03:55:41 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.proj b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.proj deleted file mode 100644 index a5a0162..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile modifiedNodalExample.sch diff --git a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.sch b/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.sch deleted file mode 100644 index 634ee69..0000000 --- a/OSCAD/Examples/modifiedNodalExample/modifiedNodalExample.sch +++ /dev/null @@ -1,169 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:46:55 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:modifiedNodalExample-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5300 3200 5300 3250 -Connection ~ 5300 4250 -Wire Wire Line - 5300 4250 5300 4100 -Wire Wire Line - 5150 3050 5800 3050 -Wire Wire Line - 5800 3050 5800 3350 -Connection ~ 4950 4250 -Wire Wire Line - 4950 4050 4950 4250 -Connection ~ 4950 3350 -Wire Wire Line - 4850 3350 5050 3350 -Wire Wire Line - 4350 3350 4100 3350 -Wire Wire Line - 5800 3350 5550 3350 -Wire Wire Line - 4100 4250 5800 4250 -Wire Wire Line - 4100 3350 4100 3050 -Wire Wire Line - 4100 3050 4650 3050 -Wire Wire Line - 4750 4250 4750 4400 -Connection ~ 4750 4250 -Wire Wire Line - 4950 3550 4950 3250 -Wire Wire Line - 4950 3250 5300 3250 -$Comp -L VPRINT1 U1 -U 1 1 50692E86 -P 5300 2900 -F 0 "U1" H 5150 3000 50 0001 C CNN -F 1 "VPRINT1" H 5450 3000 50 0000 C CNN - 1 5300 2900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5069279A -P 5300 4100 -F 0 "#FLG01" H 5300 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 4330 30 0000 C CNN - 1 5300 4100 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50692771 -P 4750 4400 -F 0 "#PWR02" H 4750 4400 30 0001 C CNN -F 1 "GND" H 4750 4330 30 0001 C CNN - 1 4750 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50692628 -P 5300 3350 -F 0 "R3" V 5380 3350 50 0000 C CNN -F 1 "1" V 5300 3350 50 0000 C CNN - 1 5300 3350 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 5069261E -P 4900 3050 -F 0 "R4" V 4980 3050 50 0000 C CNN -F 1 "1" V 4900 3050 50 0000 C CNN - 1 4900 3050 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 50692613 -P 4600 3350 -F 0 "R1" V 4680 3350 50 0000 C CNN -F 1 "1" V 4600 3350 50 0000 C CNN - 1 4600 3350 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5067FEAC -P 4950 3800 -F 0 "R2" V 5030 3800 50 0000 C CNN -F 1 "1" V 4950 3800 50 0000 C CNN - 1 4950 3800 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5067FE8E -P 5800 3800 -F 0 "v2" H 5600 3900 60 0000 C CNN -F 1 "10" H 5600 3750 60 0000 C CNN -F 2 "R3" H 5500 3800 60 0000 C CNN - 1 5800 3800 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5067FE8A -P 4100 3800 -F 0 "v1" H 3900 3900 60 0000 C CNN -F 1 "5" H 3900 3750 60 0000 C CNN -F 2 "R3" H 3800 3800 60 0000 C CNN - 1 4100 3800 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/nodalExample/$savepcb.brd b/OSCAD/Examples/nodalExample/$savepcb.brd deleted file mode 100644 index 1801707..0000000 --- a/OSCAD/Examples/nodalExample/$savepcb.brd +++ /dev/null @@ -1,391 +0,0 @@ -PCBNEW-BOARD Version 1 date Thursday 27 September 2012 02:38:42 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 10 -NoConn 8 -Di 35879 32459 45375 39121 -Ndraw 0 -Ntrack 7 -Nzone 0 -BoardThickness 630 -Nmodule 7 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "27 sep 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000001" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000001" -AddNet "N-000003" -AddNet "N-000004" -$EndNCLASS -$MODULE R3 -Po 39500 35000 900 15 00200000 50641555 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50641555 -AR /5063F506 -Op 0 A 0 -T0 0 0 550 500 900 80 N V 21 N "i1" -T1 0 0 550 500 900 80 N I 21 N "DC" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 36500 35000 900 15 00200000 50641557 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50641557 -AR /50641279 -Op 0 A 0 -T0 0 0 550 500 900 80 N V 21 N "i2" -T1 0 0 550 500 900 80 N I 21 N "DC" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 43500 33500 0 15 00200000 50641559 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50641559 -AR /50640DA0 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R1" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 43500 35000 0 15 00200000 5064155B ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5064155B -AR /50640DC3 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R2" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 43500 36500 0 15 00200000 5064155D ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5064155D -AR /50640DA8 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R3" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 38000 38500 0 15 00200000 5064155F ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5064155F -AR /50640DAA -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R4" -T1 0 0 550 500 0 80 N I 21 N "2" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 43500 38500 0 15 00200000 50641561 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50641561 -AR /50641261 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R5" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$TRACK -Po 0 39500 33500 40000 33500 80 -1 -De 0 0 1 0 400000 -Po 0 44000 32500 45000 33500 80 -1 -De 0 0 1 0 800000 -Po 0 41000 32500 44000 32500 80 -1 -De 0 0 1 0 0 -Po 0 40000 33500 41000 32500 80 -1 -De 0 0 1 0 0 -Po 0 36500 33500 37000 33000 80 -1 -De 0 0 1 0 400000 -Po 0 39000 33000 39500 33500 80 -1 -De 0 0 1 0 800000 -Po 0 37000 33000 39000 33000 80 -1 -De 0 0 1 0 0 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/nodalExample/analysis b/OSCAD/Examples/nodalExample/analysis deleted file mode 100644 index 162ad08..0000000 --- a/OSCAD/Examples/nodalExample/analysis +++ /dev/null @@ -1 +0,0 @@ -.op
\ No newline at end of file diff --git a/OSCAD/Examples/nodalExample/nodalExample-cache.bak b/OSCAD/Examples/nodalExample/nodalExample-cache.bak deleted file mode 100644 index f0c5c5f..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample-cache.bak +++ /dev/null @@ -1,72 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:49:30 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vprint1 -# -DEF vprint1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vprint1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/nodalExample/nodalExample-cache.lib b/OSCAD/Examples/nodalExample/nodalExample-cache.lib deleted file mode 100644 index e1bdb6e..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample-cache.lib +++ /dev/null @@ -1,72 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:49:49 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vprint1 -# -DEF vprint1 U 0 40 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "vprint1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/nodalExample/nodalExample.000 b/OSCAD/Examples/nodalExample/nodalExample.000 deleted file mode 100644 index d9787a7..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.000 +++ /dev/null @@ -1,439 +0,0 @@ -PCBNEW-BOARD Version 1 date Thursday 27 September 2012 03:41:37 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 10 -NoConn 0 -Di 37379 32459 45541 39121 -Ndraw 0 -Ntrack 31 -Nzone 0 -BoardThickness 630 -Nmodule 7 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "27 sep 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000001" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000001" -AddNet "N-000003" -AddNet "N-000004" -$EndNCLASS -$MODULE R3 -Po 39500 35000 900 15 00200000 50641555 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50641555 -AR /5063F506 -Op 0 A 0 -T0 0 0 550 500 900 80 N V 21 N "i1" -T1 0 0 550 500 900 80 N I 21 N "DC" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 38000 35000 900 15 00200000 50641557 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50641557 -AR /50641279 -Op 0 A 0 -T0 0 0 550 500 900 80 N V 21 N "i2" -T1 0 0 550 500 900 80 N I 21 N "DC" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 43500 33500 0 15 00200000 50641559 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50641559 -AR /50640DA0 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R1" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 43500 35000 0 15 00200000 5064155B ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5064155B -AR /50640DC3 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R2" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 43500 36500 0 15 00200000 5064155D ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5064155D -AR /50640DA8 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R3" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 39500 38500 0 15 00200000 5064259E ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5064259E -AR /50640DAA -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R4" -T1 0 0 550 500 0 80 N I 21 N "2" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 43500 38500 0 15 00200000 50641561 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50641561 -AR /50641261 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R5" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$TRACK -Po 0 38000 33500 38500 33000 80 -1 -De 0 0 1 0 400000 -Po 0 39000 33000 39500 33500 80 -1 -De 0 0 1 0 800000 -Po 0 38500 33000 39000 33000 80 -1 -De 0 0 1 0 0 -Po 0 45000 36500 45500 37000 80 -1 -De 0 0 1 0 400000 -Po 0 45500 38000 45000 38500 80 -1 -De 0 0 1 0 800000 -Po 0 45500 37000 45500 38000 80 -1 -De 0 0 1 0 0 -Po 0 45000 33500 45500 34000 80 -1 -De 0 0 1 0 400000 -Po 0 45500 36000 45000 36500 80 -1 -De 0 0 1 0 800000 -Po 0 45500 34000 45500 36000 80 -1 -De 0 0 1 0 0 -Po 0 39500 33500 40000 33500 80 -1 -De 0 0 1 0 400000 -Po 0 44000 32500 45000 33500 80 -1 -De 0 0 1 0 800000 -Po 0 41000 32500 44000 32500 80 -1 -De 0 0 1 0 0 -Po 0 40000 33500 41000 32500 80 -1 -De 0 0 1 0 0 -Po 0 42000 33500 43000 33500 80 -1 -De 0 0 2 0 400000 -Po 0 44500 35000 45000 35000 80 -1 -De 0 0 2 0 800000 -Po 0 43000 33500 44500 35000 80 -1 -De 0 0 2 0 0 -Po 0 39500 36500 40500 36500 80 -1 -De 0 0 2 0 400000 -Po 0 41000 34500 42000 33500 80 -1 -De 0 0 2 0 800000 -Po 0 41000 36000 41000 34500 80 -1 -De 0 0 2 0 0 -Po 0 40500 36500 41000 36000 80 -1 -De 0 0 2 0 0 -Po 0 41000 38500 41000 37500 80 -1 -De 0 0 3 0 400000 -Po 0 41000 37500 42000 36500 80 -1 -De 0 0 3 0 800000 -Po 0 42000 35000 41500 35500 80 -1 -De 0 0 3 0 400000 -Po 0 41500 36000 42000 36500 80 -1 -De 0 0 3 0 800000 -Po 0 41500 35500 41500 36000 80 -1 -De 0 0 3 0 0 -Po 0 42000 38500 41500 39000 80 -1 -De 0 0 4 0 400000 -Po 0 38500 39000 38000 38500 80 -1 -De 0 0 4 0 800000 -Po 0 41500 39000 38500 39000 80 -1 -De 0 0 4 0 0 -Po 0 38000 36500 37500 37000 80 -1 -De 0 0 4 0 400000 -Po 0 37500 38000 38000 38500 80 -1 -De 0 0 4 0 800000 -Po 0 37500 37000 37500 38000 80 -1 -De 0 0 4 0 0 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/nodalExample/nodalExample.bak b/OSCAD/Examples/nodalExample/nodalExample.bak deleted file mode 100644 index 60ad6aa..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.bak +++ /dev/null @@ -1,184 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:49:30 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:nodalExample-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6100 2850 6100 3250 -Connection ~ 5600 4000 -Wire Wire Line - 5600 3900 5600 4000 -Connection ~ 6100 4000 -Wire Wire Line - 6100 3750 6100 4000 -Wire Wire Line - 7850 3900 7850 4000 -Wire Wire Line - 7850 4000 4700 4000 -Wire Wire Line - 4700 4000 4700 3950 -Connection ~ 5250 3000 -Wire Wire Line - 5250 3300 5250 3000 -Wire Wire Line - 5850 3000 6350 3000 -Wire Wire Line - 4700 3050 4700 3000 -Wire Wire Line - 4700 3000 5350 3000 -Wire Wire Line - 6850 3000 7850 3000 -Wire Wire Line - 7100 3200 7100 3000 -Connection ~ 7100 3000 -Connection ~ 6100 3000 -Wire Wire Line - 7100 3700 7100 4000 -Connection ~ 7100 4000 -Wire Wire Line - 5250 3800 5250 4000 -Connection ~ 5250 4000 -Wire Wire Line - 5450 4100 5450 4000 -Connection ~ 5450 4000 -$Comp -L VPRINT1 U1 -U 1 1 506489B3 -P 6100 2550 -F 0 "U1" H 5950 2650 50 0000 C CNN -F 1 "VPRINT1" H 6250 2650 50 0000 C CNN - 1 6100 2550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 50641423 -P 5450 4100 -F 0 "#PWR01" H 5450 4100 30 0001 C CNN -F 1 "GND" H 5450 4030 30 0001 C CNN - 1 5450 4100 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 506413F9 -P 5600 3900 -F 0 "#FLG02" H 5600 4170 30 0001 C CNN -F 1 "PWR_FLAG" H 5600 4130 30 0000 C CNN - 1 5600 3900 - 1 0 0 -1 -$EndComp -$Comp -L DC i2 -U 1 1 50641279 -P 7850 3450 -F 0 "i2" H 7650 3550 60 0000 C CNN -F 1 "1" H 7650 3400 60 0000 C CNN -F 2 "R3" H 7550 3450 60 0000 C CNN - 1 7850 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50641261 -P 7100 3450 -F 0 "R5" V 7180 3450 50 0000 C CNN -F 1 "1" V 7100 3450 50 0000 C CNN - 1 7100 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50640DC3 -P 5600 3000 -F 0 "R2" V 5680 3000 50 0000 C CNN -F 1 "1" V 5600 3000 50 0000 C CNN - 1 5600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50640DAA -P 6600 3000 -F 0 "R4" V 6680 3000 50 0000 C CNN -F 1 "2" V 6600 3000 50 0000 C CNN - 1 6600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 50640DA8 -P 6100 3500 -F 0 "R3" V 6180 3500 50 0000 C CNN -F 1 "1" V 6100 3500 50 0000 C CNN - 1 6100 3500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50640DA0 -P 5250 3550 -F 0 "R1" V 5330 3550 50 0000 C CNN -F 1 "1" V 5250 3550 50 0000 C CNN - 1 5250 3550 - 1 0 0 -1 -$EndComp -$Comp -L DC i1 -U 1 1 5063F506 -P 4700 3500 -F 0 "i1" H 4500 3600 60 0000 C CNN -F 1 "1" H 4500 3450 60 0000 C CNN -F 2 "R3" H 4400 3500 60 0000 C CNN - 1 4700 3500 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/nodalExample/nodalExample.brd b/OSCAD/Examples/nodalExample/nodalExample.brd deleted file mode 100644 index 375772b..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.brd +++ /dev/null @@ -1,423 +0,0 @@ -PCBNEW-BOARD Version 1 date Sunday 30 September 2012 12:21:31 PM IST - -# Created by Pcbnew(2011-05-25)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 10 -NoConn 0 -Di 36959 32379 45541 37621 -Ndraw 0 -Ntrack 29 -Nzone 0 -BoardThickness 630 -Nmodule 7 -Nnets 5 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "30 sep 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000001" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000003" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 4 "N-000004" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000001" -AddNet "N-000003" -AddNet "N-000004" -$EndNCLASS -$MODULE R3 -Po 43500 33000 0 15 00200000 50641559 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50641559 -AR /50640DA0 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R1" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 43500 35000 0 15 00200000 5064155B ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5064155B -AR /50640DC3 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R2" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 43500 37000 0 15 00200000 5064155D ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5064155D -AR /50640DA8 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R3" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 39000 35500 0 15 00200000 5064259E ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 5064259E -AR /50640DAA -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R4" -T1 0 0 550 500 0 80 N I 21 N "2" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 3 "N-000003" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R3 -Po 39000 37000 0 15 00200000 50641561 ~~ -Li R3 -Cd Resitance 3 pas -Kw R -Sc 50641561 -AR /50641261 -Op 0 A 0 -T0 0 0 550 500 0 80 N V 21 N "R5" -T1 0 0 550 500 0 80 N I 21 N "1" -DS -1500 0 -1300 0 120 21 -DS 1500 0 1300 0 120 21 -DS 1300 0 1300 -400 120 21 -DS 1300 -400 -1300 -400 120 21 -DS -1300 -400 -1300 400 120 21 -DS -1300 400 1300 400 120 21 -DS 1300 400 1300 0 120 21 -DS -1300 -200 -1100 -400 120 21 -$PAD -Sh "1" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -1500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 0 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 1500 0 -$EndPAD -$SHAPE3D -Na "discret/resistor.wrl" -Sc 0.300000 0.300000 0.300000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R3 -$MODULE R1 -Po 40000 33500 900 15 00200000 50641555 ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 50641555 -AR /5063F506 -Op A A 0 -T0 -400 1000 550 500 900 80 N V 21 N "i1" -T1 -450 1000 550 500 900 80 N I 21 N "DC" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 2 "N-000001" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$MODULE R1 -Po 38000 33500 900 15 00200000 50641557 ~~ -Li R1 -Cd Resistance verticale -Kw R -Sc 50641557 -AR /50641279 -Op A A 0 -T0 -400 1000 550 500 900 80 N V 21 N "i2" -T1 -450 1000 550 500 900 80 N I 21 N "DC" -DS -500 0 500 0 150 21 -DC -500 0 -250 500 150 21 -$PAD -Sh "1" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 4 "N-000004" -Po -500 0 -$EndPAD -$PAD -Sh "2" C 550 550 0 0 900 -Dr 320 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 500 0 -$EndPAD -$SHAPE3D -Na "discret/verti_resistor.wrl" -Sc 1.000000 1.000000 1.000000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE R1 -$TRACK -Po 0 40000 33000 40500 32500 80 -1 -De 0 0 1 0 400000 -Po 0 44500 32500 45000 33000 80 -1 -De 0 0 1 0 800000 -Po 0 40500 32500 44500 32500 80 -1 -De 0 0 1 0 0 -Po 0 38000 33000 38500 32500 80 -1 -De 0 0 1 0 400000 -Po 0 39500 32500 40000 33000 80 -1 -De 0 0 1 0 800000 -Po 0 38500 32500 39500 32500 80 -1 -De 0 0 1 0 0 -Po 0 40500 37000 41000 37000 80 -1 -De 0 0 1 0 400000 -Po 0 44500 37500 45000 37000 80 -1 -De 0 0 1 0 800000 -Po 0 41500 37500 44500 37500 80 -1 -De 0 0 1 0 0 -Po 0 41000 37000 41500 37500 80 -1 -De 0 0 1 0 0 -Po 0 45000 33000 45500 33500 80 -1 -De 0 0 1 0 400000 -Po 0 45500 33500 45500 36500 80 -1 -De 0 0 1 0 0 -Po 0 45500 36500 45000 37000 80 -1 -De 0 0 1 0 800000 -Po 0 42000 33000 43000 33000 80 -1 -De 0 0 2 0 400000 -Po 0 43000 33000 45000 35000 80 -1 -De 0 0 2 0 800000 -Po 0 40000 34000 41000 34000 80 -1 -De 0 0 2 0 400000 -Po 0 41000 34000 42000 33000 80 -1 -De 0 0 2 0 800000 -Po 0 40500 35500 41000 35000 80 -1 -De 0 0 3 0 400000 -Po 0 41000 35000 42000 35000 80 -1 -De 0 0 3 0 800000 -Po 0 42000 37000 41500 36500 80 -1 -De 0 0 3 0 400000 -Po 0 41500 35500 42000 35000 80 -1 -De 0 0 3 0 800000 -Po 0 41500 36500 41500 35500 80 -1 -De 0 0 3 0 0 -Po 0 37500 35500 37000 35000 80 -1 -De 0 0 4 0 400000 -Po 0 37500 34000 38000 34000 80 -1 -De 0 0 4 0 800000 -Po 0 37000 34500 37500 34000 80 -1 -De 0 0 4 0 0 -Po 0 37000 35000 37000 34500 80 -1 -De 0 0 4 0 0 -Po 0 37500 37000 37000 36500 80 -1 -De 0 0 4 0 400000 -Po 0 37000 36000 37500 35500 80 -1 -De 0 0 4 0 800000 -Po 0 37000 36500 37000 36000 80 -1 -De 0 0 4 0 0 -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/nodalExample/nodalExample.cir b/OSCAD/Examples/nodalExample/nodalExample.cir deleted file mode 100644 index 73cd5c1..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:49:47 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 4 VPRINT1 -i2 1 0 1 -R5 1 0 1 -R2 4 3 1 -R4 1 4 2 -R3 4 0 1 -R1 3 0 1 -i1 3 0 1 - -.end diff --git a/OSCAD/Examples/nodalExample/nodalExample.cir.ckt b/OSCAD/Examples/nodalExample/nodalExample.cir.ckt deleted file mode 100644 index 84ba089..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.cir.ckt +++ /dev/null @@ -1,14 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:49:47 am ist - -* Printing option vprint1 -i2 1 0 1 -r5 1 0 1 -r2 4 3 1 -r4 1 4 2 -r3 4 0 1 -r1 3 0 1 -i1 3 0 1 - -.op -.print v(4) -.end diff --git a/OSCAD/Examples/nodalExample/nodalExample.cir.ckt.sol b/OSCAD/Examples/nodalExample/nodalExample.cir.ckt.sol deleted file mode 100644 index 5c5bae8..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.cir.ckt.sol +++ /dev/null @@ -1,9 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------------- -I 1 0 0.0000000000 0.0000000000 -R 1 0 0.0000000000 0.0000000000 -R 4 3 0.0000000000 0.0000000000 -R 1 4 0.0000000000 0.0000000000 -R 4 0 0.0000000000 0.0000000000 -R 3 0 0.0000000000 0.0000000000 -I 3 0 0.0000000000 0.0000000000 diff --git a/OSCAD/Examples/nodalExample/nodalExample.cir.out b/OSCAD/Examples/nodalExample/nodalExample.cir.out deleted file mode 100644 index c1fe81b..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.cir.out +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:49:47 am ist - -* Printing option vprint1 -i2 1 0 1 -r5 1 0 1 -r2 4 3 1 -r4 1 4 2 -r3 4 0 1 -r1 3 0 1 -i1 3 0 1 - -.op - -* Control Statements -.control -run -print v(4) -.endc -.end diff --git a/OSCAD/Examples/nodalExample/nodalExample.ckt b/OSCAD/Examples/nodalExample/nodalExample.ckt deleted file mode 100644 index 41347f6..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) -* creation date: thursday 27 september 2012 02:26:44 pm ist - -i2 4 0 dc 1 -r5 4 0 1 -r2 3 1 1 -r4 4 3 2 -r3 3 0 1 -r1 1 0 1 -i1 1 0 dc 1 -.op -.end - diff --git a/OSCAD/Examples/nodalExample/nodalExample.ckt.sol b/OSCAD/Examples/nodalExample/nodalExample.ckt.sol deleted file mode 100644 index f7eb9ba..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.ckt.sol +++ /dev/null @@ -1,9 +0,0 @@ -Name Source Sink Voltage Current ----------------------------------------------------- -I 4 0 -0.8181818182 1.0000000000 -R 4 0 -0.8181818182 -0.8181818182 -R 3 1 0.2727272727 0.2727272727 -R 4 3 -0.3636363636 -0.1818181818 -R 3 0 -0.4545454545 -0.4545454545 -R 1 0 -0.7272727273 -0.7272727273 -I 1 0 -0.7272727273 1.0000000000 diff --git a/OSCAD/Examples/nodalExample/nodalExample.cmp b/OSCAD/Examples/nodalExample/nodalExample.cmp deleted file mode 100644 index 07b5330..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.cmp +++ /dev/null @@ -1,52 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Sunday 30 September 2012 12:14:32 PM IST - -BeginCmp -TimeStamp = /5063F506; -Reference = i1; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /50641279; -Reference = i2; -ValeurCmp = DC; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /50640DA0; -Reference = R1; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /50640DC3; -Reference = R2; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /50640DA8; -Reference = R3; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /50640DAA; -Reference = R4; -ValeurCmp = 2; -IdModule = R3; -EndCmp - -BeginCmp -TimeStamp = /50641261; -Reference = R5; -ValeurCmp = 1; -IdModule = R3; -EndCmp - -EndListe diff --git a/OSCAD/Examples/nodalExample/nodalExample.net b/OSCAD/Examples/nodalExample/nodalExample.net deleted file mode 100644 index 14f7e3f..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.net +++ /dev/null @@ -1,71 +0,0 @@ -# EESchema Netlist Version 1.1 created Sunday 30 September 2012 12:14:32 PM IST -( - ( /5063F506 R1 i1 DC - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /50641279 R1 i2 DC - ( 1 N-000004 ) - ( 2 GND ) - ) - ( /50640DA0 R3 R1 1 - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /50640DC3 R3 R2 1 - ( 1 N-000003 ) - ( 2 N-000001 ) - ) - ( /50640DA8 R3 R3 1 - ( 1 N-000003 ) - ( 2 GND ) - ) - ( /50640DAA R3 R4 2 - ( 1 N-000004 ) - ( 2 N-000003 ) - ) - ( /50641261 R3 R5 1 - ( 1 N-000004 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component i1 - 1_pin -$endlist -$component i2 - 1_pin -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R4 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R5 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/nodalExample/nodalExample.pdf b/OSCAD/Examples/nodalExample/nodalExample.pdf Binary files differdeleted file mode 100644 index c5c0762..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.pdf +++ /dev/null diff --git a/OSCAD/Examples/nodalExample/nodalExample.pro b/OSCAD/Examples/nodalExample/nodalExample.pro deleted file mode 100644 index 44552ea..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Sunday 21 October 2012 11:22:58 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/nodalExample/nodalExample.proj b/OSCAD/Examples/nodalExample/nodalExample.proj deleted file mode 100644 index 3272af6..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile nodalExample.sch diff --git a/OSCAD/Examples/nodalExample/nodalExample.ps b/OSCAD/Examples/nodalExample/nodalExample.ps deleted file mode 100644 index f4ab9c6..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.ps +++ /dev/null @@ -1,2406 +0,0 @@ -%!PS-Adobe-3.0 -%%Creator: EESchema-PS -%%CreationDate: Sun Oct 21 23:30:34 2012 -%%Title: nodalExample.ps -%%Pages: 1 -%%PageOrder: Ascend -%%BoundingBox: 0 0 596 843 -%%DocumentMedia: A4 595 842 0 () () -%%Orientation: Landscape -%%EndComments -%%Page: 1 1 -/line { - newpath - moveto - lineto - stroke -} bind def -/cir0 { newpath 0 360 arc stroke } bind def -/cir1 { newpath 0 360 arc gsave fill grestore stroke } bind def -/cir2 { newpath 0 360 arc gsave fill grestore stroke } bind def -/arc0 { newpath arc stroke } bind def -/arc1 { newpath 4 index 4 index moveto arc closepath gsave fill grestore stroke } bind def -/arc2 { newpath 4 index 4 index moveto arc closepath gsave fill grestore stroke } bind def -/poly0 { stroke } bind def -/poly1 { closepath gsave fill grestore stroke } bind def -/poly2 { closepath gsave fill grestore stroke } bind def -/rect0 { rectstroke } bind def -/rect1 { rectfill } bind def -/rect2 { rectfill } bind def -/linemode0 { 0 setlinecap 0 setlinejoin 0 setlinewidth } bind def -/linemode1 { 1 setlinecap 1 setlinejoin } bind def -/dashedline { [50 50] 0 setdash } bind def -/solidline { [] 0 setdash } bind def -gsave -0.0072 0.0072 scale -linemode1 -82670 0 translate 90 rotate -60 setlinewidth -0 0 0 setrgbcolor -0 0 0 setrgbcolor -newpath -4000 78670 moveto -113000 78670 lineto -113000 4000 lineto -4000 4000 lineto -4000 78670 lineto -stroke -newpath -4700 77970 moveto -112300 77970 lineto -112300 4700 lineto -4700 4700 lineto -4700 77970 lineto -stroke -newpath -25800 78670 moveto -25800 77970 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -newpath -15040 78120 moveto -14760 78120 lineto -stroke -newpath -14900 78120 moveto -14900 78620 lineto -14850 78550 lineto -14800 78500 lineto -14760 78470 lineto -stroke -newpath -25800 4000 moveto -25800 4700 lineto -stroke -0 0 0 setrgbcolor -newpath -15040 4150 moveto -14760 4150 lineto -stroke -newpath -14900 4150 moveto -14900 4650 lineto -14850 4580 lineto -14800 4530 lineto -14760 4500 lineto -stroke -newpath -47600 78670 moveto -47600 77970 lineto -stroke -0 0 0 setrgbcolor -newpath -36560 78570 moveto -36580 78590 lineto -36630 78620 lineto -36750 78620 lineto -36790 78590 lineto -36820 78570 lineto -36840 78520 lineto -36840 78470 lineto -36820 78400 lineto -36530 78120 lineto -36840 78120 lineto -stroke -newpath -47600 4000 moveto -47600 4700 lineto -stroke -0 0 0 setrgbcolor -newpath -36560 4600 moveto -36580 4620 lineto -36630 4650 lineto -36750 4650 lineto -36790 4620 lineto -36820 4600 lineto -36840 4550 lineto -36840 4500 lineto -36820 4430 lineto -36530 4150 lineto -36840 4150 lineto -stroke -newpath -69400 78670 moveto -69400 77970 lineto -stroke -0 0 0 setrgbcolor -newpath -58330 78620 moveto -58640 78620 lineto -58470 78430 lineto -58550 78430 lineto -58590 78400 lineto -58620 78380 lineto -58640 78330 lineto -58640 78210 lineto -58620 78170 lineto -58590 78140 lineto -58550 78120 lineto -58400 78120 lineto -58360 78140 lineto -58330 78170 lineto -stroke -newpath -69400 4000 moveto -69400 4700 lineto -stroke -0 0 0 setrgbcolor -newpath -58330 4650 moveto -58640 4650 lineto -58470 4460 lineto -58550 4460 lineto -58590 4430 lineto -58620 4410 lineto -58640 4360 lineto -58640 4240 lineto -58620 4200 lineto -58590 4170 lineto -58550 4150 lineto -58400 4150 lineto -58360 4170 lineto -58330 4200 lineto -stroke -newpath -91200 78670 moveto -91200 77970 lineto -stroke -0 0 0 setrgbcolor -newpath -80390 78450 moveto -80390 78120 lineto -stroke -newpath -80270 78640 moveto -80160 78280 lineto -80460 78280 lineto -stroke -newpath -91200 4000 moveto -91200 4700 lineto -stroke -0 0 0 setrgbcolor -newpath -80390 4480 moveto -80390 4150 lineto -stroke -newpath -80270 4670 moveto -80160 4310 lineto -80460 4310 lineto -stroke -0 0 0 setrgbcolor -newpath -102220 78620 moveto -101980 78620 lineto -101960 78380 lineto -101980 78400 lineto -102030 78430 lineto -102150 78430 lineto -102190 78400 lineto -102220 78380 lineto -102240 78330 lineto -102240 78210 lineto -102220 78170 lineto -102190 78140 lineto -102150 78120 lineto -102030 78120 lineto -101980 78140 lineto -101960 78170 lineto -stroke -0 0 0 setrgbcolor -newpath -102220 4650 moveto -101980 4650 lineto -101960 4410 lineto -101980 4430 lineto -102030 4460 lineto -102150 4460 lineto -102190 4430 lineto -102220 4410 lineto -102240 4360 lineto -102240 4240 lineto -102220 4200 lineto -102190 4170 lineto -102150 4150 lineto -102030 4150 lineto -101980 4170 lineto -101960 4200 lineto -stroke -newpath -4000 53780 moveto -4700 53780 lineto -stroke -0 0 0 setrgbcolor -newpath -4240 66160 moveto -4470 66160 lineto -stroke -newpath -4190 66020 moveto -4350 66520 lineto -4520 66020 lineto -stroke -newpath -113000 53780 moveto -112300 53780 lineto -stroke -0 0 0 setrgbcolor -newpath -112540 66160 moveto -112770 66160 lineto -stroke -newpath -112490 66020 moveto -112650 66520 lineto -112820 66020 lineto -stroke -newpath -4000 28890 moveto -4700 28890 lineto -stroke -0 0 0 setrgbcolor -newpath -4390 41390 moveto -4460 41370 lineto -4480 41340 lineto -4500 41290 lineto -4500 41220 lineto -4480 41180 lineto -4460 41150 lineto -4410 41130 lineto -4220 41130 lineto -4220 41630 lineto -4390 41630 lineto -4430 41600 lineto -4460 41580 lineto -4480 41530 lineto -4480 41480 lineto -4460 41440 lineto -4430 41410 lineto -4390 41390 lineto -4220 41390 lineto -stroke -newpath -113000 28890 moveto -112300 28890 lineto -stroke -0 0 0 setrgbcolor -newpath -112690 41390 moveto -112760 41370 lineto -112780 41340 lineto -112800 41290 lineto -112800 41220 lineto -112780 41180 lineto -112760 41150 lineto -112710 41130 lineto -112520 41130 lineto -112520 41630 lineto -112690 41630 lineto -112730 41600 lineto -112760 41580 lineto -112780 41530 lineto -112780 41480 lineto -112760 41440 lineto -112730 41410 lineto -112690 41390 lineto -112520 41390 lineto -stroke -0 0 0 setrgbcolor -newpath -4500 16290 moveto -4480 16260 lineto -4410 16240 lineto -4360 16240 lineto -4290 16260 lineto -4240 16310 lineto -4220 16360 lineto -4200 16450 lineto -4200 16520 lineto -4220 16620 lineto -4240 16670 lineto -4290 16710 lineto -4360 16740 lineto -4410 16740 lineto -4480 16710 lineto -4500 16690 lineto -stroke -0 0 0 setrgbcolor -newpath -112800 16290 moveto -112780 16260 lineto -112710 16240 lineto -112660 16240 lineto -112590 16260 lineto -112540 16310 lineto -112520 16360 lineto -112500 16450 lineto -112500 16520 lineto -112520 16620 lineto -112540 16670 lineto -112590 16710 lineto -112660 16740 lineto -112710 16740 lineto -112780 16710 lineto -112800 16690 lineto -stroke -120 setlinewidth -0 0 0 setrgbcolor -newpath -79440 6260 moveto -79440 6860 lineto -79590 6860 lineto -79670 6830 lineto -79730 6770 lineto -79760 6710 lineto -79790 6600 lineto -79790 6510 lineto -79760 6400 lineto -79730 6340 lineto -79670 6290 lineto -79590 6260 lineto -79440 6260 lineto -stroke -newpath -80300 6260 moveto -80300 6570 lineto -80270 6630 lineto -80210 6660 lineto -80100 6660 lineto -80040 6630 lineto -stroke -newpath -80300 6290 moveto -80240 6260 lineto -80100 6260 lineto -80040 6290 lineto -80010 6340 lineto -80010 6400 lineto -80040 6460 lineto -80100 6490 lineto -80240 6490 lineto -80300 6510 lineto -stroke -newpath -80500 6660 moveto -80730 6660 lineto -stroke -newpath -80580 6860 moveto -80580 6340 lineto -80610 6290 lineto -80670 6260 lineto -80730 6260 lineto -stroke -newpath -81150 6290 moveto -81090 6260 lineto -80980 6260 lineto -80920 6290 lineto -80890 6340 lineto -80890 6570 lineto -80920 6630 lineto -80980 6660 lineto -81090 6660 lineto -81150 6630 lineto -81180 6570 lineto -81180 6510 lineto -80890 6460 lineto -stroke -newpath -81430 6310 moveto -81460 6290 lineto -81430 6260 lineto -81400 6290 lineto -81430 6310 lineto -81430 6260 lineto -stroke -newpath -81430 6630 moveto -81460 6600 lineto -81430 6570 lineto -81400 6600 lineto -81430 6630 lineto -81430 6570 lineto -stroke -newpath -82150 6800 moveto -82180 6830 lineto -82240 6860 lineto -82380 6860 lineto -82440 6830 lineto -82470 6800 lineto -82500 6740 lineto -82500 6690 lineto -82470 6600 lineto -82130 6260 lineto -82500 6260 lineto -stroke -newpath -82700 6860 moveto -83100 6860 lineto -82840 6260 lineto -stroke -newpath -83750 6290 moveto -83810 6260 lineto -83930 6260 lineto -83980 6290 lineto -84010 6340 lineto -84010 6370 lineto -83980 6430 lineto -83930 6460 lineto -83840 6460 lineto -83780 6490 lineto -83750 6540 lineto -83750 6570 lineto -83780 6630 lineto -83840 6660 lineto -83930 6660 lineto -83980 6630 lineto -stroke -newpath -84500 6290 moveto -84440 6260 lineto -84330 6260 lineto -84270 6290 lineto -84240 6340 lineto -84240 6570 lineto -84270 6630 lineto -84330 6660 lineto -84440 6660 lineto -84500 6630 lineto -84530 6570 lineto -84530 6510 lineto -84240 6460 lineto -stroke -newpath -84780 6660 moveto -84780 6060 lineto -stroke -newpath -84780 6630 moveto -84840 6660 lineto -84950 6660 lineto -85010 6630 lineto -85040 6600 lineto -85070 6540 lineto -85070 6370 lineto -85040 6310 lineto -85010 6290 lineto -84950 6260 lineto -84840 6260 lineto -84780 6290 lineto -stroke -newpath -85750 6800 moveto -85780 6830 lineto -85840 6860 lineto -85980 6860 lineto -86040 6830 lineto -86070 6800 lineto -86100 6740 lineto -86100 6690 lineto -86070 6600 lineto -85730 6260 lineto -86100 6260 lineto -stroke -newpath -86470 6860 moveto -86520 6860 lineto -86580 6830 lineto -86610 6800 lineto -86640 6740 lineto -86670 6630 lineto -86670 6490 lineto -86640 6370 lineto -86610 6310 lineto -86580 6290 lineto -86520 6260 lineto -86470 6260 lineto -86410 6290 lineto -86380 6310 lineto -86350 6370 lineto -86320 6490 lineto -86320 6630 lineto -86350 6740 lineto -86380 6800 lineto -86410 6830 lineto -86470 6860 lineto -stroke -newpath -87240 6260 moveto -86890 6260 lineto -stroke -newpath -87070 6260 moveto -87070 6860 lineto -87010 6770 lineto -86950 6710 lineto -86890 6690 lineto -stroke -newpath -87460 6800 moveto -87490 6830 lineto -87550 6860 lineto -87690 6860 lineto -87750 6830 lineto -87780 6800 lineto -87810 6740 lineto -87810 6690 lineto -87780 6600 lineto -87440 6260 lineto -87810 6260 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -newpath -71040 5060 moveto -71040 5660 lineto -stroke -newpath -71390 5060 moveto -71130 5400 lineto -stroke -newpath -71390 5660 moveto -71040 5310 lineto -stroke -newpath -71640 5060 moveto -71640 5460 lineto -stroke -newpath -71640 5660 moveto -71610 5630 lineto -71640 5600 lineto -71670 5630 lineto -71640 5660 lineto -71640 5600 lineto -stroke -newpath -72280 5110 moveto -72250 5090 lineto -72160 5060 lineto -72100 5060 lineto -72020 5090 lineto -71960 5140 lineto -71930 5200 lineto -71900 5310 lineto -71900 5400 lineto -71930 5510 lineto -71960 5570 lineto -72020 5630 lineto -72100 5660 lineto -72160 5660 lineto -72250 5630 lineto -72280 5600 lineto -stroke -newpath -72790 5060 moveto -72790 5370 lineto -72760 5430 lineto -72700 5460 lineto -72590 5460 lineto -72530 5430 lineto -stroke -newpath -72790 5090 moveto -72730 5060 lineto -72590 5060 lineto -72530 5090 lineto -72500 5140 lineto -72500 5200 lineto -72530 5260 lineto -72590 5290 lineto -72730 5290 lineto -72790 5310 lineto -stroke -newpath -73330 5060 moveto -73330 5660 lineto -stroke -newpath -73330 5090 moveto -73270 5060 lineto -73160 5060 lineto -73100 5090 lineto -73070 5110 lineto -73040 5170 lineto -73040 5340 lineto -73070 5400 lineto -73100 5430 lineto -73160 5460 lineto -73270 5460 lineto -73330 5430 lineto -stroke -newpath -74070 5370 moveto -74270 5370 lineto -stroke -newpath -74360 5060 moveto -74070 5060 lineto -74070 5660 lineto -74360 5660 lineto -stroke -newpath -74610 5110 moveto -74640 5090 lineto -74610 5060 lineto -74580 5090 lineto -74610 5110 lineto -74610 5060 lineto -stroke -newpath -74900 5060 moveto -74900 5660 lineto -75050 5660 lineto -75130 5630 lineto -75190 5570 lineto -75220 5510 lineto -75250 5400 lineto -75250 5310 lineto -75220 5200 lineto -75190 5140 lineto -75130 5090 lineto -75050 5060 lineto -74900 5060 lineto -stroke -newpath -75500 5110 moveto -75530 5090 lineto -75500 5060 lineto -75470 5090 lineto -75500 5110 lineto -75500 5060 lineto -stroke -newpath -75760 5230 moveto -76050 5230 lineto -stroke -newpath -75710 5060 moveto -75910 5660 lineto -76110 5060 lineto -stroke -newpath -76300 5110 moveto -76330 5090 lineto -76300 5060 lineto -76270 5090 lineto -76300 5110 lineto -76300 5060 lineto -stroke -120 setlinewidth -0 0 0 setrgbcolor -newpath -104590 6260 moveto -104390 6540 lineto -stroke -newpath -104240 6260 moveto -104240 6860 lineto -104470 6860 lineto -104530 6830 lineto -104560 6800 lineto -104590 6740 lineto -104590 6660 lineto -104560 6600 lineto -104530 6570 lineto -104470 6540 lineto -104240 6540 lineto -stroke -newpath -105070 6290 moveto -105010 6260 lineto -104900 6260 lineto -104840 6290 lineto -104810 6340 lineto -104810 6570 lineto -104840 6630 lineto -104900 6660 lineto -105010 6660 lineto -105070 6630 lineto -105100 6570 lineto -105100 6510 lineto -104810 6460 lineto -stroke -newpath -105300 6660 moveto -105440 6260 lineto -105580 6660 lineto -stroke -newpath -105810 6310 moveto -105840 6290 lineto -105810 6260 lineto -105780 6290 lineto -105810 6310 lineto -105810 6260 lineto -stroke -newpath -105810 6630 moveto -105840 6600 lineto -105810 6570 lineto -105780 6600 lineto -105810 6630 lineto -105810 6570 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -newpath -71010 6290 moveto -71100 6260 lineto -71240 6260 lineto -71300 6290 lineto -71330 6310 lineto -71360 6370 lineto -71360 6430 lineto -71330 6490 lineto -71300 6510 lineto -71240 6540 lineto -71130 6570 lineto -71070 6600 lineto -71040 6630 lineto -71010 6690 lineto -71010 6740 lineto -71040 6800 lineto -71070 6830 lineto -71130 6860 lineto -71270 6860 lineto -71360 6830 lineto -stroke -newpath -71610 6260 moveto -71610 6660 lineto -stroke -newpath -71610 6860 moveto -71580 6830 lineto -71610 6800 lineto -71640 6830 lineto -71610 6860 lineto -71610 6800 lineto -stroke -newpath -71850 6660 moveto -72160 6660 lineto -71850 6260 lineto -72160 6260 lineto -stroke -newpath -72620 6290 moveto -72560 6260 lineto -72450 6260 lineto -72390 6290 lineto -72360 6340 lineto -72360 6570 lineto -72390 6630 lineto -72450 6660 lineto -72560 6660 lineto -72620 6630 lineto -72650 6570 lineto -72650 6510 lineto -72360 6460 lineto -stroke -newpath -72900 6310 moveto -72930 6290 lineto -72900 6260 lineto -72870 6290 lineto -72900 6310 lineto -72900 6260 lineto -stroke -newpath -72900 6630 moveto -72930 6600 lineto -72900 6570 lineto -72870 6600 lineto -72900 6630 lineto -72900 6570 lineto -stroke -newpath -73620 6430 moveto -73910 6430 lineto -stroke -newpath -73570 6260 moveto -73770 6860 lineto -73970 6260 lineto -stroke -newpath -74420 6660 moveto -74420 6260 lineto -stroke -newpath -74280 6890 moveto -74130 6460 lineto -74510 6460 lineto -stroke -0 0 0 setrgbcolor -newpath -104240 5060 moveto -104240 5660 lineto -stroke -newpath -104790 5060 moveto -104790 5660 lineto -stroke -newpath -104790 5090 moveto -104730 5060 lineto -104620 5060 lineto -104560 5090 lineto -104530 5110 lineto -104500 5170 lineto -104500 5340 lineto -104530 5400 lineto -104560 5430 lineto -104620 5460 lineto -104730 5460 lineto -104790 5430 lineto -stroke -newpath -105070 5110 moveto -105100 5090 lineto -105070 5060 lineto -105040 5090 lineto -105070 5110 lineto -105070 5060 lineto -stroke -newpath -105070 5430 moveto -105100 5400 lineto -105070 5370 lineto -105040 5400 lineto -105070 5430 lineto -105070 5370 lineto -stroke -newpath -106140 5060 moveto -105790 5060 lineto -stroke -newpath -105970 5060 moveto -105970 5660 lineto -105910 5570 lineto -105850 5510 lineto -105790 5490 lineto -stroke -newpath -106820 5690 moveto -106310 4910 lineto -stroke -newpath -107340 5060 moveto -106990 5060 lineto -stroke -newpath -107170 5060 moveto -107170 5660 lineto -107110 5570 lineto -107050 5510 lineto -106990 5490 lineto -stroke -120 setlinewidth -0 0 0 setrgbcolor -newpath -70960 8060 moveto -71300 8060 lineto -stroke -newpath -71130 7460 moveto -71130 8060 lineto -stroke -newpath -71500 7460 moveto -71500 7860 lineto -stroke -newpath -71500 8060 moveto -71470 8030 lineto -71500 8000 lineto -71530 8030 lineto -71500 8060 lineto -71500 8000 lineto -stroke -newpath -71710 7860 moveto -71940 7860 lineto -stroke -newpath -71790 8060 moveto -71790 7540 lineto -71820 7490 lineto -71880 7460 lineto -71940 7460 lineto -stroke -newpath -72220 7460 moveto -72160 7490 lineto -72130 7540 lineto -72130 8060 lineto -stroke -newpath -72670 7490 moveto -72610 7460 lineto -72500 7460 lineto -72440 7490 lineto -72410 7540 lineto -72410 7770 lineto -72440 7830 lineto -72500 7860 lineto -72610 7860 lineto -72670 7830 lineto -72700 7770 lineto -72700 7710 lineto -72410 7660 lineto -stroke -newpath -72950 7510 moveto -72980 7490 lineto -72950 7460 lineto -72920 7490 lineto -72950 7510 lineto -72950 7460 lineto -stroke -newpath -72950 7830 moveto -72980 7800 lineto -72950 7770 lineto -72920 7800 lineto -72950 7830 lineto -72950 7770 lineto -stroke -0 setlinewidth -0 0 0 setrgbcolor -newpath -71240 10170 moveto -71040 10170 lineto -stroke -newpath -71040 9860 moveto -71040 10460 lineto -71330 10460 lineto -stroke -newpath -71550 9860 moveto -71550 10260 lineto -stroke -newpath -71550 10460 moveto -71520 10430 lineto -71550 10400 lineto -71580 10430 lineto -71550 10460 lineto -71550 10400 lineto -stroke -newpath -71930 9860 moveto -71870 9890 lineto -71840 9940 lineto -71840 10460 lineto -stroke -newpath -72380 9890 moveto -72320 9860 lineto -72210 9860 lineto -72150 9890 lineto -72120 9940 lineto -72120 10170 lineto -72150 10230 lineto -72210 10260 lineto -72320 10260 lineto -72380 10230 lineto -72410 10170 lineto -72410 10110 lineto -72120 10060 lineto -stroke -newpath -72660 9910 moveto -72690 9890 lineto -72660 9860 lineto -72630 9890 lineto -72660 9910 lineto -72660 9860 lineto -stroke -newpath -72660 10230 moveto -72690 10200 lineto -72660 10170 lineto -72630 10200 lineto -72660 10230 lineto -72660 10170 lineto -stroke -newpath -73410 10260 moveto -73410 9860 lineto -stroke -newpath -73410 10200 moveto -73440 10230 lineto -73500 10260 lineto -73580 10260 lineto -73640 10230 lineto -73670 10170 lineto -73670 9860 lineto -stroke -newpath -74040 9860 moveto -73980 9890 lineto -73950 9910 lineto -73920 9970 lineto -73920 10140 lineto -73950 10200 lineto -73980 10230 lineto -74040 10260 lineto -74120 10260 lineto -74180 10230 lineto -74210 10200 lineto -74240 10140 lineto -74240 9970 lineto -74210 9910 lineto -74180 9890 lineto -74120 9860 lineto -74040 9860 lineto -stroke -newpath -74750 9860 moveto -74750 10460 lineto -stroke -newpath -74750 9890 moveto -74690 9860 lineto -74580 9860 lineto -74520 9890 lineto -74490 9910 lineto -74460 9970 lineto -74460 10140 lineto -74490 10200 lineto -74520 10230 lineto -74580 10260 lineto -74690 10260 lineto -74750 10230 lineto -stroke -newpath -75290 9860 moveto -75290 10170 lineto -75260 10230 lineto -75200 10260 lineto -75090 10260 lineto -75030 10230 lineto -stroke -newpath -75290 9890 moveto -75230 9860 lineto -75090 9860 lineto -75030 9890 lineto -75000 9940 lineto -75000 10000 lineto -75030 10060 lineto -75090 10090 lineto -75230 10090 lineto -75290 10110 lineto -stroke -newpath -75660 9860 moveto -75600 9890 lineto -75570 9940 lineto -75570 10460 lineto -stroke -newpath -75880 10170 moveto -76080 10170 lineto -stroke -newpath -76170 9860 moveto -75880 9860 lineto -75880 10460 lineto -76170 10460 lineto -stroke -newpath -76370 9860 moveto -76680 10260 lineto -stroke -newpath -76370 10260 moveto -76680 9860 lineto -stroke -newpath -77170 9860 moveto -77170 10170 lineto -77140 10230 lineto -77080 10260 lineto -76970 10260 lineto -76910 10230 lineto -stroke -newpath -77170 9890 moveto -77110 9860 lineto -76970 9860 lineto -76910 9890 lineto -76880 9940 lineto -76880 10000 lineto -76910 10060 lineto -76970 10090 lineto -77110 10090 lineto -77170 10110 lineto -stroke -newpath -77450 9860 moveto -77450 10260 lineto -stroke -newpath -77450 10200 moveto -77480 10230 lineto -77540 10260 lineto -77620 10260 lineto -77680 10230 lineto -77710 10170 lineto -77710 9860 lineto -stroke -newpath -77710 10170 moveto -77740 10230 lineto -77800 10260 lineto -77880 10260 lineto -77940 10230 lineto -77970 10170 lineto -77970 9860 lineto -stroke -newpath -78250 10260 moveto -78250 9660 lineto -stroke -newpath -78250 10230 moveto -78310 10260 lineto -78420 10260 lineto -78480 10230 lineto -78510 10200 lineto -78540 10140 lineto -78540 9970 lineto -78510 9910 lineto -78480 9890 lineto -78420 9860 lineto -78310 9860 lineto -78250 9890 lineto -stroke -newpath -78880 9860 moveto -78820 9890 lineto -78790 9940 lineto -78790 10460 lineto -stroke -newpath -79330 9890 moveto -79270 9860 lineto -79160 9860 lineto -79100 9890 lineto -79070 9940 lineto -79070 10170 lineto -79100 10230 lineto -79160 10260 lineto -79270 10260 lineto -79330 10230 lineto -79360 10170 lineto -79360 10110 lineto -79070 10060 lineto -stroke -newpath -79610 9910 moveto -79640 9890 lineto -79610 9860 lineto -79580 9890 lineto -79610 9910 lineto -79610 9860 lineto -stroke -newpath -79870 9890 moveto -79930 9860 lineto -80050 9860 lineto -80100 9890 lineto -80130 9940 lineto -80130 9970 lineto -80100 10030 lineto -80050 10060 lineto -79960 10060 lineto -79900 10090 lineto -79870 10140 lineto -79870 10170 lineto -79900 10230 lineto -79960 10260 lineto -80050 10260 lineto -80100 10230 lineto -stroke -newpath -80650 9890 moveto -80590 9860 lineto -80480 9860 lineto -80420 9890 lineto -80390 9910 lineto -80360 9970 lineto -80360 10140 lineto -80390 10200 lineto -80420 10230 lineto -80480 10260 lineto -80590 10260 lineto -80650 10230 lineto -stroke -newpath -80900 9860 moveto -80900 10460 lineto -stroke -newpath -81160 9860 moveto -81160 10170 lineto -81130 10230 lineto -81070 10260 lineto -80990 10260 lineto -80930 10230 lineto -80900 10200 lineto -stroke -0 0 0 setrgbcolor -newpath -71010 8690 moveto -71100 8660 lineto -71240 8660 lineto -71300 8690 lineto -71330 8710 lineto -71360 8770 lineto -71360 8830 lineto -71330 8890 lineto -71300 8910 lineto -71240 8940 lineto -71130 8970 lineto -71070 9000 lineto -71040 9030 lineto -71010 9090 lineto -71010 9140 lineto -71040 9200 lineto -71070 9230 lineto -71130 9260 lineto -71270 9260 lineto -71360 9230 lineto -stroke -newpath -71610 8660 moveto -71610 9260 lineto -stroke -newpath -71870 8660 moveto -71870 8970 lineto -71840 9030 lineto -71780 9060 lineto -71700 9060 lineto -71640 9030 lineto -71610 9000 lineto -stroke -newpath -72380 8690 moveto -72320 8660 lineto -72210 8660 lineto -72150 8690 lineto -72120 8740 lineto -72120 8970 lineto -72150 9030 lineto -72210 9060 lineto -72320 9060 lineto -72380 9030 lineto -72410 8970 lineto -72410 8910 lineto -72120 8860 lineto -stroke -newpath -72890 8690 moveto -72830 8660 lineto -72720 8660 lineto -72660 8690 lineto -72630 8740 lineto -72630 8970 lineto -72660 9030 lineto -72720 9060 lineto -72830 9060 lineto -72890 9030 lineto -72920 8970 lineto -72920 8910 lineto -72630 8860 lineto -stroke -newpath -73090 9060 moveto -73320 9060 lineto -stroke -newpath -73170 9260 moveto -73170 8740 lineto -73200 8690 lineto -73260 8660 lineto -73320 8660 lineto -stroke -newpath -73510 8710 moveto -73540 8690 lineto -73510 8660 lineto -73480 8690 lineto -73510 8710 lineto -73510 8660 lineto -stroke -newpath -73510 9030 moveto -73540 9000 lineto -73510 8970 lineto -73480 9000 lineto -73510 9030 lineto -73510 8970 lineto -stroke -newpath -74690 9290 moveto -74180 8510 lineto -stroke -newpath -70300 10700 moveto -70300 4700 lineto -stroke -newpath -70300 10700 moveto -112300 10700 lineto -stroke -newpath -70300 10700 moveto -112300 10700 lineto -stroke -newpath -70300 8300 moveto -112300 8300 lineto -stroke -newpath -103500 7100 moveto -103500 4700 lineto -stroke -newpath -70300 5900 moveto -112300 5900 lineto -stroke -newpath -70300 7100 moveto -112300 7100 lineto -stroke -newpath -76900 7100 moveto -76900 5900 lineto -stroke -60 setlinewidth -0 0.627 0 setrgbcolor -newpath -61000 54170 moveto -61000 50170 lineto -stroke -0 setlinewidth -0 0.627 0 setrgbcolor -60 setlinewidth -56000 42670 160 cir1 -0 0.627 0 setrgbcolor -newpath -56000 43670 moveto -56000 42670 lineto -stroke -0 setlinewidth -0 0.627 0 setrgbcolor -60 setlinewidth -61000 42670 160 cir1 -0 0.627 0 setrgbcolor -newpath -61000 45170 moveto -61000 42670 lineto -stroke -0 0.627 0 setrgbcolor -newpath -78500 43670 moveto -78500 42670 lineto -stroke -0 0.627 0 setrgbcolor -newpath -78500 42670 moveto -47000 42670 lineto -stroke -0 0.627 0 setrgbcolor -newpath -47000 42670 moveto -47000 43170 lineto -stroke -0 setlinewidth -0 0.627 0 setrgbcolor -60 setlinewidth -52500 52670 160 cir1 -0 0.627 0 setrgbcolor -newpath -52500 49670 moveto -52500 52670 lineto -stroke -0 0.627 0 setrgbcolor -newpath -58500 52670 moveto -63500 52670 lineto -stroke -0 0.627 0 setrgbcolor -newpath -47000 52170 moveto -47000 52670 lineto -stroke -0 0.627 0 setrgbcolor -newpath -47000 52670 moveto -53500 52670 lineto -stroke -0 0.627 0 setrgbcolor -newpath -68500 52670 moveto -78500 52670 lineto -stroke -0 0.627 0 setrgbcolor -newpath -71000 50670 moveto -71000 52670 lineto -stroke -0 setlinewidth -0 0.627 0 setrgbcolor -60 setlinewidth -71000 52670 160 cir1 -0 setlinewidth -0 0.627 0 setrgbcolor -60 setlinewidth -61000 52670 160 cir1 -0 0.627 0 setrgbcolor -newpath -71000 45670 moveto -71000 42670 lineto -stroke -0 setlinewidth -0 0.627 0 setrgbcolor -60 setlinewidth -71000 42670 160 cir1 -0 0.627 0 setrgbcolor -newpath -52500 44670 moveto -52500 42670 lineto -stroke -0 setlinewidth -0 0.627 0 setrgbcolor -60 setlinewidth -52500 42670 160 cir1 -0 0.627 0 setrgbcolor -newpath -54500 41670 moveto -54500 42670 lineto -stroke -0 setlinewidth -0 0.627 0 setrgbcolor -60 setlinewidth -54500 42670 160 cir1 -0 setlinewidth -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -60 setlinewidth -61000 58170 1000 cir0 -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -61000 57170 moveto -61000 54170 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -61010 57690 moveto -61010 58070 lineto -stroke -newpath -61200 57880 moveto -60820 57880 lineto -stroke -0.627 0 0 setrgbcolor -newpath -60850 55810 moveto -60850 55530 lineto -stroke -newpath -60850 55670 moveto -60350 55670 lineto -60420 55620 lineto -60470 55570 lineto -60500 55530 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -59120 59470 moveto -59120 59060 lineto -59140 59020 lineto -59170 58990 lineto -59210 58970 lineto -59310 58970 lineto -59360 58990 lineto -59380 59020 lineto -59400 59060 lineto -59400 59470 lineto -stroke -newpath -59900 58970 moveto -59620 58970 lineto -stroke -newpath -59760 58970 moveto -59760 59470 lineto -59710 59400 lineto -59660 59350 lineto -59620 59320 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -61030 59470 moveto -61190 58970 lineto -61360 59470 lineto -stroke -newpath -61530 58970 moveto -61530 59470 lineto -61720 59470 lineto -61770 59440 lineto -61790 59420 lineto -61810 59370 lineto -61810 59300 lineto -61790 59250 lineto -61770 59230 lineto -61720 59210 lineto -61530 59210 lineto -stroke -newpath -62310 58970 moveto -62150 59210 lineto -stroke -newpath -62030 58970 moveto -62030 59470 lineto -62220 59470 lineto -62270 59440 lineto -62290 59420 lineto -62310 59370 lineto -62310 59300 lineto -62290 59250 lineto -62270 59230 lineto -62220 59210 lineto -62030 59210 lineto -stroke -newpath -62530 58970 moveto -62530 59470 lineto -stroke -newpath -62770 58970 moveto -62770 59470 lineto -63050 58970 lineto -63050 59470 lineto -stroke -newpath -63220 59470 moveto -63500 59470 lineto -stroke -newpath -63360 58970 moveto -63360 59470 lineto -stroke -newpath -63930 58970 moveto -63650 58970 lineto -stroke -newpath -63790 58970 moveto -63790 59470 lineto -63740 59400 lineto -63690 59350 lineto -63650 59320 lineto -stroke -0 setlinewidth -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -60 setlinewidth -newpath -54000 41670 moveto -54500 41170 lineto -55000 41670 lineto -54000 41670 lineto -poly0 -0.627 0 0 setrgbcolor -0 setlinewidth -0.627 0 0 setrgbcolor -60 setlinewidth -0.627 0 0 setrgbcolor -newpath -56000 43670 moveto -56000 43670 lineto -stroke -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -56000 43670 moveto -56000 44670 lineto -56000 44670 lineto -poly0 -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -56000 44670 moveto -55000 45170 lineto -56000 45670 lineto -57000 45170 lineto -56000 44670 lineto -poly0 -50 setlinewidth -0 0.627 0.627 setrgbcolor -newpath -54960 45850 moveto -54960 46150 lineto -55080 46150 lineto -55100 46130 lineto -55120 46120 lineto -55130 46090 lineto -55130 46050 lineto -55120 46020 lineto -55100 46010 lineto -55080 45990 lineto -54960 45990 lineto -stroke -newpath -55230 46150 moveto -55300 45850 lineto -55360 46060 lineto -55420 45850 lineto -55490 46150 lineto -stroke -newpath -55770 45850 moveto -55670 45990 lineto -stroke -newpath -55600 45850 moveto -55600 46150 lineto -55720 46150 lineto -55740 46130 lineto -55760 46120 lineto -55770 46090 lineto -55770 46050 lineto -55760 46020 lineto -55740 46010 lineto -55720 45990 lineto -55600 45990 lineto -stroke -newpath -55830 45820 moveto -56060 45820 lineto -stroke -newpath -56230 46010 moveto -56130 46010 lineto -stroke -newpath -56130 45850 moveto -56130 46150 lineto -56270 46150 lineto -stroke -newpath -56530 45850 moveto -56390 45850 lineto -56390 46150 lineto -stroke -newpath -56620 45930 moveto -56760 45930 lineto -stroke -newpath -56590 45850 moveto -56690 46150 lineto -56790 45850 lineto -stroke -newpath -57050 46130 moveto -57020 46150 lineto -56980 46150 lineto -56930 46130 lineto -56910 46110 lineto -56890 46080 lineto -56880 46020 lineto -56880 45980 lineto -56890 45920 lineto -56910 45890 lineto -56930 45860 lineto -56980 45850 lineto -57010 45850 lineto -57050 45860 lineto -57060 45880 lineto -57060 45980 lineto -57010 45980 lineto -stroke -0 setlinewidth -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -60 setlinewidth -78500 48170 1500 cir0 -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -78500 49670 moveto -78500 52670 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -78510 48770 moveto -78510 49150 lineto -stroke -newpath -78700 48960 moveto -78320 48960 lineto -stroke -0.627 0 0 setrgbcolor -newpath -78350 51310 moveto -78350 51030 lineto -stroke -newpath -78350 51170 moveto -77850 51170 lineto -77920 51120 lineto -77970 51070 lineto -78000 51030 lineto -stroke -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -78500 46670 moveto -78500 43670 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -78510 47190 moveto -78510 47570 lineto -stroke -0.627 0 0 setrgbcolor -newpath -77900 45030 moveto -77880 45050 lineto -77850 45100 lineto -77850 45220 lineto -77880 45260 lineto -77900 45290 lineto -77950 45310 lineto -78000 45310 lineto -78070 45290 lineto -78350 45000 lineto -78350 45310 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -76210 48930 moveto -76210 49330 lineto -stroke -newpath -76210 49530 moveto -76180 49500 lineto -76210 49470 lineto -76240 49500 lineto -76210 49530 lineto -76210 49470 lineto -stroke -newpath -76470 49470 moveto -76500 49500 lineto -76560 49530 lineto -76700 49530 lineto -76760 49500 lineto -76790 49470 lineto -76820 49410 lineto -76820 49360 lineto -76790 49270 lineto -76450 48930 lineto -76820 48930 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -76040 47430 moveto -76040 48030 lineto -76190 48030 lineto -76270 48000 lineto -76330 47940 lineto -76360 47880 lineto -76390 47770 lineto -76390 47680 lineto -76360 47570 lineto -76330 47510 lineto -76270 47460 lineto -76190 47430 lineto -76040 47430 lineto -stroke -newpath -76990 47480 moveto -76960 47460 lineto -76870 47430 lineto -76810 47430 lineto -76730 47460 lineto -76670 47510 lineto -76640 47570 lineto -76610 47680 lineto -76610 47770 lineto -76640 47880 lineto -76670 47940 lineto -76730 48000 lineto -76810 48030 lineto -76870 48030 lineto -76960 48000 lineto -76990 47970 lineto -stroke -0.627 0 0.627 setrgbcolor -newpath -75410 47930 moveto -75210 48210 lineto -stroke -newpath -75060 47930 moveto -75060 48530 lineto -75290 48530 lineto -75350 48500 lineto -75380 48470 lineto -75410 48410 lineto -75410 48330 lineto -75380 48270 lineto -75350 48240 lineto -75290 48210 lineto -75060 48210 lineto -stroke -newpath -75610 48530 moveto -75980 48530 lineto -75780 48300 lineto -75860 48300 lineto -75920 48270 lineto -75950 48240 lineto -75980 48180 lineto -75980 48040 lineto -75950 47980 lineto -75920 47960 lineto -75860 47930 lineto -75690 47930 lineto -75630 47960 lineto -75610 47980 lineto -stroke -0 setlinewidth -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -120 setlinewidth -70600 49670 800 -3000 rect0 -0.627 0 0 setrgbcolor -60 setlinewidth -0.627 0 0 setrgbcolor -newpath -71000 49670 moveto -71000 50670 lineto -stroke -0 0.627 0.627 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -71000 46670 moveto -71000 45670 lineto -stroke -0 0.627 0.627 setrgbcolor -0 0.627 0.627 setrgbcolor -newpath -72000 48080 moveto -71760 47920 lineto -stroke -newpath -72000 47800 moveto -71500 47800 lineto -71500 47990 lineto -71530 48040 lineto -71550 48060 lineto -71600 48080 lineto -71670 48080 lineto -71720 48060 lineto -71740 48040 lineto -71760 47990 lineto -71760 47800 lineto -stroke -newpath -71500 48540 moveto -71500 48300 lineto -71740 48280 lineto -71720 48300 lineto -71690 48350 lineto -71690 48470 lineto -71720 48510 lineto -71740 48540 lineto -71790 48560 lineto -71910 48560 lineto -71950 48540 lineto -71980 48510 lineto -72000 48470 lineto -72000 48350 lineto -71980 48300 lineto -71950 48280 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -71200 48310 moveto -71200 48030 lineto -stroke -newpath -71200 48170 moveto -70700 48170 lineto -70770 48120 lineto -70820 48070 lineto -70850 48030 lineto -stroke -0 setlinewidth -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -120 setlinewidth -57500 53070 -3000 -800 rect0 -0.627 0 0 setrgbcolor -60 setlinewidth -0.627 0 0 setrgbcolor -newpath -57500 52670 moveto -58500 52670 lineto -stroke -0 0.627 0.627 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -54500 52670 moveto -53500 52670 lineto -stroke -0 0.627 0.627 setrgbcolor -0 0.627 0.627 setrgbcolor -newpath -55910 51670 moveto -55750 51910 lineto -stroke -newpath -55630 51670 moveto -55630 52170 lineto -55820 52170 lineto -55870 52140 lineto -55890 52120 lineto -55910 52070 lineto -55910 52000 lineto -55890 51950 lineto -55870 51930 lineto -55820 51910 lineto -55630 51910 lineto -stroke -newpath -56110 52120 moveto -56130 52140 lineto -56180 52170 lineto -56300 52170 lineto -56340 52140 lineto -56370 52120 lineto -56390 52070 lineto -56390 52020 lineto -56370 51950 lineto -56080 51670 lineto -56390 51670 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -56140 52470 moveto -55860 52470 lineto -stroke -newpath -56000 52470 moveto -56000 52970 lineto -55950 52900 lineto -55900 52850 lineto -55860 52820 lineto -stroke -0 setlinewidth -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -120 setlinewidth -67500 53070 -3000 -800 rect0 -0.627 0 0 setrgbcolor -60 setlinewidth -0.627 0 0 setrgbcolor -newpath -67500 52670 moveto -68500 52670 lineto -stroke -0 0.627 0.627 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -64500 52670 moveto -63500 52670 lineto -stroke -0 0.627 0.627 setrgbcolor -0 0.627 0.627 setrgbcolor -newpath -65910 51670 moveto -65750 51910 lineto -stroke -newpath -65630 51670 moveto -65630 52170 lineto -65820 52170 lineto -65870 52140 lineto -65890 52120 lineto -65910 52070 lineto -65910 52000 lineto -65890 51950 lineto -65870 51930 lineto -65820 51910 lineto -65630 51910 lineto -stroke -newpath -66340 52000 moveto -66340 51670 lineto -stroke -newpath -66220 52190 moveto -66110 51830 lineto -66410 51830 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -65860 52920 moveto -65880 52940 lineto -65930 52970 lineto -66050 52970 lineto -66090 52940 lineto -66120 52920 lineto -66140 52870 lineto -66140 52820 lineto -66120 52750 lineto -65830 52470 lineto -66140 52470 lineto -stroke -0 setlinewidth -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -120 setlinewidth -60600 49170 800 -3000 rect0 -0.627 0 0 setrgbcolor -60 setlinewidth -0.627 0 0 setrgbcolor -newpath -61000 49170 moveto -61000 50170 lineto -stroke -0 0.627 0.627 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -61000 46170 moveto -61000 45170 lineto -stroke -0 0.627 0.627 setrgbcolor -0 0.627 0.627 setrgbcolor -newpath -62000 47580 moveto -61760 47420 lineto -stroke -newpath -62000 47300 moveto -61500 47300 lineto -61500 47490 lineto -61530 47540 lineto -61550 47560 lineto -61600 47580 lineto -61670 47580 lineto -61720 47560 lineto -61740 47540 lineto -61760 47490 lineto -61760 47300 lineto -stroke -newpath -61500 47750 moveto -61500 48060 lineto -61690 47890 lineto -61690 47970 lineto -61720 48010 lineto -61740 48040 lineto -61790 48060 lineto -61910 48060 lineto -61950 48040 lineto -61980 48010 lineto -62000 47970 lineto -62000 47820 lineto -61980 47780 lineto -61950 47750 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -61200 47810 moveto -61200 47530 lineto -stroke -newpath -61200 47670 moveto -60700 47670 lineto -60770 47620 lineto -60820 47570 lineto -60850 47530 lineto -stroke -0 setlinewidth -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -120 setlinewidth -52100 48670 800 -3000 rect0 -0.627 0 0 setrgbcolor -60 setlinewidth -0.627 0 0 setrgbcolor -newpath -52500 48670 moveto -52500 49670 lineto -stroke -0 0.627 0.627 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -52500 45670 moveto -52500 44670 lineto -stroke -0 0.627 0.627 setrgbcolor -0 0.627 0.627 setrgbcolor -newpath -53500 47080 moveto -53260 46920 lineto -stroke -newpath -53500 46800 moveto -53000 46800 lineto -53000 46990 lineto -53030 47040 lineto -53050 47060 lineto -53100 47080 lineto -53170 47080 lineto -53220 47060 lineto -53240 47040 lineto -53260 46990 lineto -53260 46800 lineto -stroke -newpath -53500 47560 moveto -53500 47280 lineto -stroke -newpath -53500 47420 moveto -53000 47420 lineto -53070 47370 lineto -53120 47320 lineto -53150 47280 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -52700 47310 moveto -52700 47030 lineto -stroke -newpath -52700 47170 moveto -52200 47170 lineto -52270 47120 lineto -52320 47070 lineto -52350 47030 lineto -stroke -0 setlinewidth -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -60 setlinewidth -47000 47670 1500 cir0 -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -47000 49170 moveto -47000 52170 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -47010 48270 moveto -47010 48650 lineto -stroke -newpath -47200 48460 moveto -46820 48460 lineto -stroke -0.627 0 0 setrgbcolor -newpath -46850 50810 moveto -46850 50530 lineto -stroke -newpath -46850 50670 moveto -46350 50670 lineto -46420 50620 lineto -46470 50570 lineto -46500 50530 lineto -stroke -0.627 0 0 setrgbcolor -0.627 0 0 setrgbcolor -newpath -47000 46170 moveto -47000 43170 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -47010 46690 moveto -47010 47070 lineto -stroke -0.627 0 0 setrgbcolor -newpath -46400 44530 moveto -46380 44550 lineto -46350 44600 lineto -46350 44720 lineto -46380 44760 lineto -46400 44790 lineto -46450 44810 lineto -46500 44810 lineto -46570 44790 lineto -46850 44500 lineto -46850 44810 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -44710 48430 moveto -44710 48830 lineto -stroke -newpath -44710 49030 moveto -44680 49000 lineto -44710 48970 lineto -44740 49000 lineto -44710 49030 lineto -44710 48970 lineto -stroke -newpath -45320 48430 moveto -44970 48430 lineto -stroke -newpath -45150 48430 moveto -45150 49030 lineto -45090 48940 lineto -45030 48880 lineto -44970 48860 lineto -stroke -0 0.627 0.627 setrgbcolor -newpath -44540 46930 moveto -44540 47530 lineto -44690 47530 lineto -44770 47500 lineto -44830 47440 lineto -44860 47380 lineto -44890 47270 lineto -44890 47180 lineto -44860 47070 lineto -44830 47010 lineto -44770 46960 lineto -44690 46930 lineto -44540 46930 lineto -stroke -newpath -45490 46980 moveto -45460 46960 lineto -45370 46930 lineto -45310 46930 lineto -45230 46960 lineto -45170 47010 lineto -45140 47070 lineto -45110 47180 lineto -45110 47270 lineto -45140 47380 lineto -45170 47440 lineto -45230 47500 lineto -45310 47530 lineto -45370 47530 lineto -45460 47500 lineto -45490 47470 lineto -stroke -0.627 0 0.627 setrgbcolor -newpath -43910 47430 moveto -43710 47710 lineto -stroke -newpath -43560 47430 moveto -43560 48030 lineto -43790 48030 lineto -43850 48000 lineto -43880 47970 lineto -43910 47910 lineto -43910 47830 lineto -43880 47770 lineto -43850 47740 lineto -43790 47710 lineto -43560 47710 lineto -stroke -newpath -44110 48030 moveto -44480 48030 lineto -44280 47800 lineto -44360 47800 lineto -44420 47770 lineto -44450 47740 lineto -44480 47680 lineto -44480 47540 lineto -44450 47480 lineto -44420 47460 lineto -44360 47430 lineto -44190 47430 lineto -44130 47460 lineto -44110 47480 lineto -stroke -showpage -grestore -%%EOF diff --git a/OSCAD/Examples/nodalExample/nodalExample.sch b/OSCAD/Examples/nodalExample/nodalExample.sch deleted file mode 100644 index 11e24ab..0000000 --- a/OSCAD/Examples/nodalExample/nodalExample.sch +++ /dev/null @@ -1,184 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:49:49 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:nodalExample-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6100 2850 6100 3250 -Connection ~ 5600 4000 -Wire Wire Line - 5600 3900 5600 4000 -Connection ~ 6100 4000 -Wire Wire Line - 6100 3750 6100 4000 -Wire Wire Line - 7850 3900 7850 4000 -Wire Wire Line - 7850 4000 4700 4000 -Wire Wire Line - 4700 4000 4700 3950 -Connection ~ 5250 3000 -Wire Wire Line - 5250 3300 5250 3000 -Wire Wire Line - 5850 3000 6350 3000 -Wire Wire Line - 4700 3050 4700 3000 -Wire Wire Line - 4700 3000 5350 3000 -Wire Wire Line - 6850 3000 7850 3000 -Wire Wire Line - 7100 3200 7100 3000 -Connection ~ 7100 3000 -Connection ~ 6100 3000 -Wire Wire Line - 7100 3700 7100 4000 -Connection ~ 7100 4000 -Wire Wire Line - 5250 3800 5250 4000 -Connection ~ 5250 4000 -Wire Wire Line - 5450 4100 5450 4000 -Connection ~ 5450 4000 -$Comp -L VPRINT1 U1 -U 1 1 506489B3 -P 6100 2550 -F 0 "U1" H 5950 2650 50 0000 C CNN -F 1 "VPRINT1" H 6250 2650 50 0000 C CNN - 1 6100 2550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 50641423 -P 5450 4100 -F 0 "#PWR01" H 5450 4100 30 0001 C CNN -F 1 "GND" H 5450 4030 30 0001 C CNN - 1 5450 4100 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 506413F9 -P 5600 3900 -F 0 "#FLG02" H 5600 4170 30 0001 C CNN -F 1 "PWR_FLAG" H 5600 4130 30 0000 C CNN - 1 5600 3900 - 1 0 0 -1 -$EndComp -$Comp -L DC i2 -U 1 1 50641279 -P 7850 3450 -F 0 "i2" H 7650 3550 60 0000 C CNN -F 1 "1" H 7650 3400 60 0000 C CNN -F 2 "R3" H 7550 3450 60 0000 C CNN - 1 7850 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50641261 -P 7100 3450 -F 0 "R5" V 7180 3450 50 0000 C CNN -F 1 "1" V 7100 3450 50 0000 C CNN - 1 7100 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50640DC3 -P 5600 3000 -F 0 "R2" V 5680 3000 50 0000 C CNN -F 1 "1" V 5600 3000 50 0000 C CNN - 1 5600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50640DAA -P 6600 3000 -F 0 "R4" V 6680 3000 50 0000 C CNN -F 1 "2" V 6600 3000 50 0000 C CNN - 1 6600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 50640DA8 -P 6100 3500 -F 0 "R3" V 6180 3500 50 0000 C CNN -F 1 "1" V 6100 3500 50 0000 C CNN - 1 6100 3500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50640DA0 -P 5250 3550 -F 0 "R1" V 5330 3550 50 0000 C CNN -F 1 "1" V 5250 3550 50 0000 C CNN - 1 5250 3550 - 1 0 0 -1 -$EndComp -$Comp -L DC i1 -U 1 1 5063F506 -P 4700 3500 -F 0 "i1" H 4500 3600 60 0000 C CNN -F 1 "1" H 4500 3450 60 0000 C CNN -F 2 "R3" H 4400 3500 60 0000 C CNN - 1 4700 3500 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/nodalExample_plot/analysis b/OSCAD/Examples/nodalExample_plot/analysis deleted file mode 100644 index 7dd51c6..0000000 --- a/OSCAD/Examples/nodalExample_plot/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc i1 0e-00 10e-00 1e-00 diff --git a/OSCAD/Examples/nodalExample_plot/nodalExample_plot-cache.lib b/OSCAD/Examples/nodalExample_plot/nodalExample_plot-cache.lib deleted file mode 100644 index 532ca7e..0000000 --- a/OSCAD/Examples/nodalExample_plot/nodalExample_plot-cache.lib +++ /dev/null @@ -1,79 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 24 May 2013 02:15:51 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.bak b/OSCAD/Examples/nodalExample_plot/nodalExample_plot.bak deleted file mode 100644 index c19435c..0000000 --- a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.bak +++ /dev/null @@ -1,187 +0,0 @@ -EESchema Schematic File Version 2 date Friday 24 May 2013 02:14:17 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:nodalExample-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "24 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6100 2850 6100 3250 -Connection ~ 5600 4000 -Wire Wire Line - 5600 3900 5600 4000 -Connection ~ 6100 4000 -Wire Wire Line - 6100 3750 6100 4000 -Wire Wire Line - 7850 3900 7850 4000 -Wire Wire Line - 7850 4000 4700 4000 -Wire Wire Line - 4700 4000 4700 3950 -Connection ~ 5250 3000 -Wire Wire Line - 5250 3300 5250 3000 -Wire Wire Line - 5850 3000 6350 3000 -Wire Wire Line - 4700 3050 4700 3000 -Wire Wire Line - 4700 3000 5350 3000 -Wire Wire Line - 6850 3000 7850 3000 -Wire Wire Line - 7100 3200 7100 3000 -Connection ~ 7100 3000 -Connection ~ 6100 3000 -Wire Wire Line - 7100 3700 7100 4000 -Connection ~ 7100 4000 -Wire Wire Line - 5250 3800 5250 4000 -Connection ~ 5250 4000 -Wire Wire Line - 5450 4100 5450 4000 -Connection ~ 5450 4000 -$Comp -L VPRINT1 U1 -U 1 1 506489B3 -P 6100 2550 -F 0 "U1" H 5950 2650 50 0000 C CNN -F 1 "VPRINT1" H 6250 2650 50 0000 C CNN - 1 6100 2550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 50641423 -P 5450 4100 -F 0 "#PWR01" H 5450 4100 30 0001 C CNN -F 1 "GND" H 5450 4030 30 0001 C CNN - 1 5450 4100 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 506413F9 -P 5600 3900 -F 0 "#FLG02" H 5600 4170 30 0001 C CNN -F 1 "PWR_FLAG" H 5600 4130 30 0000 C CNN - 1 5600 3900 - 1 0 0 -1 -$EndComp -$Comp -L DC i2 -U 1 1 50641279 -P 7850 3450 -F 0 "i2" H 7650 3550 60 0000 C CNN -F 1 "1" H 7650 3400 60 0000 C CNN -F 2 "R3" H 7550 3450 60 0000 C CNN - 1 7850 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50641261 -P 7100 3450 -F 0 "R5" V 7180 3450 50 0000 C CNN -F 1 "1" V 7100 3450 50 0000 C CNN - 1 7100 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50640DC3 -P 5600 3000 -F 0 "R2" V 5680 3000 50 0000 C CNN -F 1 "1" V 5600 3000 50 0000 C CNN - 1 5600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50640DAA -P 6600 3000 -F 0 "R4" V 6680 3000 50 0000 C CNN -F 1 "2" V 6600 3000 50 0000 C CNN - 1 6600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 50640DA8 -P 6100 3500 -F 0 "R3" V 6180 3500 50 0000 C CNN -F 1 "1" V 6100 3500 50 0000 C CNN - 1 6100 3500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50640DA0 -P 5250 3550 -F 0 "R1" V 5330 3550 50 0000 C CNN -F 1 "1" V 5250 3550 50 0000 C CNN - 1 5250 3550 - 1 0 0 -1 -$EndComp -$Comp -L DC i1 -U 1 1 5063F506 -P 4700 3500 -F 0 "i1" H 4500 3600 60 0000 C CNN -F 1 "1" H 4500 3450 60 0000 C CNN -F 2 "R3" H 4400 3500 60 0000 C CNN - 1 4700 3500 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.cir b/OSCAD/Examples/nodalExample_plot/nodalExample_plot.cir deleted file mode 100644 index f2dda85..0000000 --- a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 24 May 2013 02:18:18 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 4 VPLOT8_1 -i2 1 0 1 -R5 1 0 1 -R2 4 3 1 -R4 1 4 2 -R3 4 0 1 -R1 3 0 1 -i1 3 0 1 - -.end diff --git a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.cir.ckt b/OSCAD/Examples/nodalExample_plot/nodalExample_plot.cir.ckt deleted file mode 100644 index 219dd07..0000000 --- a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.cir.ckt +++ /dev/null @@ -1,14 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 02:18:18 pm ist - -* Plotting option vplot8_1 -i2 1 0 1 -r5 1 0 1 -r2 4 3 1 -r4 1 4 2 -r3 4 0 1 -r1 3 0 1 -i1 3 0 1 - -.dc i1 0e-00 10e-00 1e-00 -.plot v(4) -.end diff --git a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.cir.out b/OSCAD/Examples/nodalExample_plot/nodalExample_plot.cir.out deleted file mode 100644 index a7809b6..0000000 --- a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.cir.out +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 24 may 2013 02:18:18 pm ist - -* Plotting option vplot8_1 -i2 1 0 1 -r5 1 0 1 -r2 4 3 1 -r4 1 4 2 -r3 4 0 1 -r1 3 0 1 -i1 3 0 1 - -.dc i1 0e-00 10e-00 1e-00 - -* Control Statements -.control -run -plot v(4) -.endc -.end diff --git a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.pro b/OSCAD/Examples/nodalExample_plot/nodalExample_plot.pro deleted file mode 100644 index fb3c608..0000000 --- a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Friday 24 May 2013 02:15:07 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.proj b/OSCAD/Examples/nodalExample_plot/nodalExample_plot.proj deleted file mode 100644 index 0f13a25..0000000 --- a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile nodalExample_plot.sch diff --git a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.sch b/OSCAD/Examples/nodalExample_plot/nodalExample_plot.sch deleted file mode 100644 index 4ac9466..0000000 --- a/OSCAD/Examples/nodalExample_plot/nodalExample_plot.sch +++ /dev/null @@ -1,186 +0,0 @@ -EESchema Schematic File Version 2 date Friday 24 May 2013 02:15:51 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "24 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U1 -U 1 1 519F28A8 -P 6100 2550 -F 0 "U1" H 5950 2650 50 0000 C CNN -F 1 "VPLOT8_1" H 6250 2650 50 0000 C CNN - 1 6100 2550 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6100 2850 6100 3250 -Connection ~ 5600 4000 -Wire Wire Line - 5600 3900 5600 4000 -Connection ~ 6100 4000 -Wire Wire Line - 6100 3750 6100 4000 -Wire Wire Line - 7850 3900 7850 4000 -Wire Wire Line - 7850 4000 4700 4000 -Wire Wire Line - 4700 4000 4700 3950 -Connection ~ 5250 3000 -Wire Wire Line - 5250 3300 5250 3000 -Wire Wire Line - 5850 3000 6350 3000 -Wire Wire Line - 4700 3050 4700 3000 -Wire Wire Line - 4700 3000 5350 3000 -Wire Wire Line - 6850 3000 7850 3000 -Wire Wire Line - 7100 3200 7100 3000 -Connection ~ 7100 3000 -Connection ~ 6100 3000 -Wire Wire Line - 7100 3700 7100 4000 -Connection ~ 7100 4000 -Wire Wire Line - 5250 3800 5250 4000 -Connection ~ 5250 4000 -Wire Wire Line - 5450 4100 5450 4000 -Connection ~ 5450 4000 -$Comp -L GND #PWR1 -U 1 1 50641423 -P 5450 4100 -F 0 "#PWR1" H 5450 4100 30 0001 C CNN -F 1 "GND" H 5450 4030 30 0001 C CNN - 1 5450 4100 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 506413F9 -P 5600 3900 -F 0 "#FLG1" H 5600 4170 30 0001 C CNN -F 1 "PWR_FLAG" H 5600 4130 30 0000 C CNN - 1 5600 3900 - 1 0 0 -1 -$EndComp -$Comp -L DC i2 -U 1 1 50641279 -P 7850 3450 -F 0 "i2" H 7650 3550 60 0000 C CNN -F 1 "1" H 7650 3400 60 0000 C CNN -F 2 "R3" H 7550 3450 60 0000 C CNN - 1 7850 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 50641261 -P 7100 3450 -F 0 "R5" V 7180 3450 50 0000 C CNN -F 1 "1" V 7100 3450 50 0000 C CNN - 1 7100 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 50640DC3 -P 5600 3000 -F 0 "R2" V 5680 3000 50 0000 C CNN -F 1 "1" V 5600 3000 50 0000 C CNN - 1 5600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 50640DAA -P 6600 3000 -F 0 "R4" V 6680 3000 50 0000 C CNN -F 1 "2" V 6600 3000 50 0000 C CNN - 1 6600 3000 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 50640DA8 -P 6100 3500 -F 0 "R3" V 6180 3500 50 0000 C CNN -F 1 "1" V 6100 3500 50 0000 C CNN - 1 6100 3500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50640DA0 -P 5250 3550 -F 0 "R1" V 5330 3550 50 0000 C CNN -F 1 "1" V 5250 3550 50 0000 C CNN - 1 5250 3550 - 1 0 0 -1 -$EndComp -$Comp -L DC i1 -U 1 1 5063F506 -P 4700 3500 -F 0 "i1" H 4500 3600 60 0000 C CNN -F 1 "1" H 4500 3450 60 0000 C CNN -F 2 "R3" H 4400 3500 60 0000 C CNN - 1 4700 3500 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/nonInvertingAmplifier/analysis b/OSCAD/Examples/nonInvertingAmplifier/analysis deleted file mode 100644 index 888b3aa..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 100e-06 40e-03 0e-00 diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.bak b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.bak deleted file mode 100644 index 036ee3a..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.bak +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:47:24 AM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.lib b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.lib deleted file mode 100644 index 8835104..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier-cache.lib +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:47:58 AM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.bak b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.bak deleted file mode 100644 index 695fcbc..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.bak +++ /dev/null @@ -1,199 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:47:24 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:nonInvertingAmplifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4300 3300 -Wire Wire Line - 4300 3200 4300 3650 -Wire Wire Line - 5100 3300 5300 3300 -Wire Wire Line - 4600 3500 4600 3700 -Wire Wire Line - 5100 3500 5300 3500 -Connection ~ 6550 3400 -Wire Wire Line - 6300 3400 6850 3400 -Wire Wire Line - 6850 3100 6850 3650 -Connection ~ 6850 3400 -Connection ~ 4300 4650 -Wire Wire Line - 4300 4650 4600 4650 -Wire Wire Line - 4600 4650 4600 4400 -Wire Wire Line - 4300 4550 4300 4700 -Wire Wire Line - 6850 4150 6850 4400 -Wire Wire Line - 6050 4050 6550 4050 -Wire Wire Line - 6550 4050 6550 3400 -Wire Wire Line - 5200 3500 5200 4050 -Wire Wire Line - 5200 4050 5550 4050 -Connection ~ 5200 3500 -Wire Wire Line - 4300 3300 4600 3300 -$Comp -L R R? -U 1 1 50D14DC5 -P 4850 3300 -F 0 "R?" V 4930 3300 50 0000 C CNN -F 1 "1000" V 4850 3300 50 0000 C CNN - 1 4850 3300 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR01 -U 1 1 508240AD -P 6850 4400 -F 0 "#PWR01" H 6850 4400 30 0001 C CNN -F 1 "GND" H 6850 4330 30 0001 C CNN - 1 6850 4400 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB089 -P 6850 2800 -F 0 "U1" H 6700 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN - 2 6850 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB075 -P 4300 2900 -F 0 "U1" H 4150 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 4450 3000 50 0000 C CNN - 1 4300 2900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 508245D2 -P 4600 4400 -F 0 "#FLG02" H 4600 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN - 1 4600 4400 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X1 -U 1 1 50824595 -P 5800 3400 -F 0 "X1" H 5950 3550 60 0000 C CNN -F 1 "UA741" H 5950 3650 60 0000 C CNN - 1 5800 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 508240CB -P 4600 3700 -F 0 "#PWR03" H 4600 3700 30 0001 C CNN -F 1 "GND" H 4600 3630 30 0001 C CNN - 1 4600 3700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 508240B7 -P 4300 4700 -F 0 "#PWR04" H 4300 4700 30 0001 C CNN -F 1 "GND" H 4300 4630 30 0001 C CNN - 1 4300 4700 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 50824091 -P 4300 4100 -F 0 "v1" H 4100 4200 60 0000 C CNN -F 1 "SINE" H 4100 4050 60 0000 C CNN -F 2 "R1" H 4000 4100 60 0000 C CNN - 1 4300 4100 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50824073 -P 6850 3900 -F 0 "R3" V 6930 3900 50 0000 C CNN -F 1 "10000" V 6850 3900 50 0000 C CNN - 1 6850 3900 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50824062 -P 4850 3500 -F 0 "R1" V 4930 3500 50 0000 C CNN -F 1 "1000" V 4850 3500 50 0000 C CNN - 1 4850 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 50824045 -P 5800 4050 -F 0 "R2" V 5880 4050 50 0000 C CNN -F 1 "2000" V 5800 4050 50 0000 C CNN - 1 5800 4050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir deleted file mode 100644 index 99dd1d0..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 19 December 2012 10:47:55 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R4 1 4 1000 -U1 4 3 VPLOT8_1 -X1 5 1 3 UA741 -v1 4 0 SINE -R3 3 0 10000 -R1 5 0 1000 -R2 3 5 2000 - -.end diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.ckt b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.ckt deleted file mode 100644 index 1aac163..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.ckt +++ /dev/null @@ -1,14 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:47:55 am ist -.include ua741.sub - -r4 1 4 1000 -* Plotting option vplot8_1 -x1 5 1 3 ua741 -v1 4 0 sine(0 5 50 0 0) -r3 3 0 10000 -r1 5 0 1000 -r2 3 5 2000 - -.tran 100e-06 40e-03 0e-00 -.plot v(4) v(3) -.end diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.out b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.out deleted file mode 100644 index 6417831..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cir.out +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:47:55 am ist -.include ua741.sub - -r4 1 4 1000 -* Plotting option vplot8_1 -x1 5 1 3 ua741 -v1 4 0 sine(0 5 50 0 0) -r3 3 0 10000 -r1 5 0 1000 -r2 3 5 2000 - -.tran 100e-06 40e-03 0e-00 - -* Control Statements -.control -run -plot v(4) v(3) -.endc -.end diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cmp b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cmp deleted file mode 100644 index c3e04af..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.cmp +++ /dev/null @@ -1,38 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Saturday 20 October 2012 11:59:17 AM IST - -BeginCmp -TimeStamp = /50824062; -Reference = R1; -ValeurCmp = 1000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824045; -Reference = R2; -ValeurCmp = 2000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824073; -Reference = R3; -ValeurCmp = 10000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824091; -Reference = v1; -ValeurCmp = SINE; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /50823E96; -Reference = X1; -ValeurCmp = LM741; -IdModule = DIP-8__300; -EndCmp - -EndListe diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.net b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.net deleted file mode 100644 index 938591e..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.net +++ /dev/null @@ -1,70 +0,0 @@ -# EESchema Netlist Version 1.1 created Saturday 20 October 2012 12:03:26 PM IST -( - ( /50824595 $noname X1 UA741 {Lib=UA741} - ( 2 N-000004 ) - ( 3 GND ) - ( 6 N-000001 ) - ) - ( /50824091 R1 v1 SINE {Lib=SINE} - ( 1 N-000002 ) - ( 2 GND ) - ) - ( /50824073 $noname R3 10000 {Lib=R} - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /50824062 $noname R1 1000 {Lib=R} - ( 1 N-000004 ) - ( 2 N-000002 ) - ) - ( /50824045 $noname R2 2000 {Lib=R} - ( 1 N-000001 ) - ( 2 N-000004 ) - ) -) -* -{ Allowed footprints by component: -$component X1 - DIP-8__300 -$endlist -$component v1 - 1_pin -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "" "" - R2 1 - X1 6 - R3 1 -Net 2 "" "" - R1 2 - v1 1 -Net 3 "GND" "GND" - X1 3 - v1 2 - R3 2 -Net 4 "" "" - X1 2 - R1 1 - R2 2 -} -#End diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.pro b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.pro deleted file mode 100644 index 9f5d056..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:16:29 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.proj b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.proj deleted file mode 100644 index c78c533..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile InvertingAmplifier.sch diff --git a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.sch b/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.sch deleted file mode 100644 index df340bb..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/nonInvertingAmplifier.sch +++ /dev/null @@ -1,199 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:47:58 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:nonInvertingAmplifier-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4300 3300 -Wire Wire Line - 4300 3200 4300 3650 -Wire Wire Line - 5100 3300 5300 3300 -Wire Wire Line - 4600 3500 4600 3700 -Wire Wire Line - 5100 3500 5300 3500 -Connection ~ 6550 3400 -Wire Wire Line - 6300 3400 6850 3400 -Wire Wire Line - 6850 3100 6850 3650 -Connection ~ 6850 3400 -Connection ~ 4300 4650 -Wire Wire Line - 4300 4650 4600 4650 -Wire Wire Line - 4600 4650 4600 4400 -Wire Wire Line - 4300 4550 4300 4700 -Wire Wire Line - 6850 4150 6850 4400 -Wire Wire Line - 6050 4050 6550 4050 -Wire Wire Line - 6550 4050 6550 3400 -Wire Wire Line - 5200 3500 5200 4050 -Wire Wire Line - 5200 4050 5550 4050 -Connection ~ 5200 3500 -Wire Wire Line - 4300 3300 4600 3300 -$Comp -L R R4 -U 1 1 50D14DC5 -P 4850 3300 -F 0 "R4" V 4930 3300 50 0000 C CNN -F 1 "1000" V 4850 3300 50 0000 C CNN - 1 4850 3300 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR01 -U 1 1 508240AD -P 6850 4400 -F 0 "#PWR01" H 6850 4400 30 0001 C CNN -F 1 "GND" H 6850 4330 30 0001 C CNN - 1 6850 4400 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB089 -P 6850 2800 -F 0 "U1" H 6700 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN - 2 6850 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB075 -P 4300 2900 -F 0 "U1" H 4150 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 4450 3000 50 0000 C CNN - 1 4300 2900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 508245D2 -P 4600 4400 -F 0 "#FLG02" H 4600 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN - 1 4600 4400 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X1 -U 1 1 50824595 -P 5800 3400 -F 0 "X1" H 5950 3550 60 0000 C CNN -F 1 "UA741" H 5950 3650 60 0000 C CNN - 1 5800 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 508240CB -P 4600 3700 -F 0 "#PWR03" H 4600 3700 30 0001 C CNN -F 1 "GND" H 4600 3630 30 0001 C CNN - 1 4600 3700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 508240B7 -P 4300 4700 -F 0 "#PWR04" H 4300 4700 30 0001 C CNN -F 1 "GND" H 4300 4630 30 0001 C CNN - 1 4300 4700 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 50824091 -P 4300 4100 -F 0 "v1" H 4100 4200 60 0000 C CNN -F 1 "SINE" H 4100 4050 60 0000 C CNN -F 2 "R1" H 4000 4100 60 0000 C CNN - 1 4300 4100 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50824073 -P 6850 3900 -F 0 "R3" V 6930 3900 50 0000 C CNN -F 1 "10000" V 6850 3900 50 0000 C CNN - 1 6850 3900 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50824062 -P 4850 3500 -F 0 "R1" V 4930 3500 50 0000 C CNN -F 1 "1000" V 4850 3500 50 0000 C CNN - 1 4850 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 50824045 -P 5800 4050 -F 0 "R2" V 5880 4050 50 0000 C CNN -F 1 "2000" V 5800 4050 50 0000 C CNN - 1 5800 4050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741-cache.bak b/OSCAD/Examples/nonInvertingAmplifier/ua741-cache.bak deleted file mode 100644 index e2ece32..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741-cache.bak +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:17:01 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741-cache.lib b/OSCAD/Examples/nonInvertingAmplifier/ua741-cache.lib deleted file mode 100644 index cbec3a5..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741-cache.lib +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 19 December 2012 10:15:16 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741.bak b/OSCAD/Examples/nonInvertingAmplifier/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741.cir b/OSCAD/Examples/nonInvertingAmplifier/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741.cir.ckt b/OSCAD/Examples/nonInvertingAmplifier/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741.cir.out b/OSCAD/Examples/nonInvertingAmplifier/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741.pro b/OSCAD/Examples/nonInvertingAmplifier/ua741.pro deleted file mode 100644 index 9aa118e..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:14:06 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741.sch b/OSCAD/Examples/nonInvertingAmplifier/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/nonInvertingAmplifier/ua741.sub b/OSCAD/Examples/nonInvertingAmplifier/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/nonInvertingAmplifier/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/analysis b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/analysis deleted file mode 100644 index ea22c29..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 1e-00 3e-00 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak deleted file mode 100644 index c0bd60e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak +++ /dev/null @@ -1,145 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 07 May 2013 12:28:25 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.lib b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.lib deleted file mode 100644 index dfad98c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.lib +++ /dev/null @@ -1,145 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 02:05:36 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.bak b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.bak deleted file mode 100644 index 025172a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.bak +++ /dev/null @@ -1,193 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 07 May 2013 12:28:25 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_12.8-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "7 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 8250 2800 8400 2800 -Connection ~ 7000 2750 -Wire Wire Line - 8600 2250 8600 2000 -Wire Wire Line - 8600 2000 7500 2000 -Wire Wire Line - 6900 3650 7900 3650 -Wire Wire Line - 7750 3650 7750 3300 -Wire Wire Line - 7500 2000 7500 2200 -Connection ~ 7200 2750 -Wire Wire Line - 7200 2750 6900 2750 -Wire Wire Line - 7750 2800 7750 2750 -Connection ~ 7500 2750 -Wire Wire Line - 7750 2750 7500 2750 -Wire Wire Line - 7500 2600 7500 2850 -Wire Wire Line - 7200 2400 7200 3050 -Connection ~ 7750 2750 -Wire Wire Line - 7500 3250 7500 3450 -Connection ~ 7750 3650 -Wire Wire Line - 7500 3450 8600 3450 -Wire Wire Line - 8600 3450 8600 3150 -Wire Wire Line - 7750 3300 8400 3300 -$Comp -L IPLOT U1 -U 1 1 5188A5F5 -P 8000 2800 -F 0 "U1" H 7850 2900 50 0000 C CNN -F 1 "IPLOT" H 8150 2900 50 0000 C CNN - 1 8000 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 5188A185 -P 7750 2450 -F 0 "U2" H 7600 2550 50 0000 C CNN -F 1 "VPLOT8_1" H 7900 2550 50 0000 C CNN - 2 7750 2450 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 51889CD8 -P 7000 2450 -F 0 "U2" H 6850 2550 50 0000 C CNN -F 1 "VPLOT8_1" H 7150 2550 50 0000 C CNN - 1 7000 2450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 518897EF -P 7200 2750 -F 0 "#FLG01" H 7200 3020 30 0001 C CNN -F 1 "PWR_FLAG" H 7200 2980 30 0000 C CNN - 1 7200 2750 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 51889574 -P 6900 3200 -F 0 "v1" H 6700 3300 60 0000 C CNN -F 1 "SINE" H 6700 3150 60 0000 C CNN -F 2 "R1" H 6600 3200 60 0000 C CNN - 1 6900 3200 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 51889502 -P 7750 3650 -F 0 "#FLG02" H 7750 3920 30 0001 C CNN -F 1 "PWR_FLAG" H 7750 3880 30 0000 C CNN - 1 7750 3650 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 518894F5 -P 7900 3650 -F 0 "#PWR03" H 7900 3650 30 0001 C CNN -F 1 "GND" H 7900 3580 30 0001 C CNN - 1 7900 3650 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 518894AB -P 8600 2700 -F 0 "v2" H 8400 2800 60 0000 C CNN -F 1 "23" H 8400 2650 60 0000 C CNN -F 2 "R1" H 8300 2700 60 0000 C CNN - 1 8600 2700 - -1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5188943C -P 8400 3050 -F 0 "R1" V 8480 3050 50 0000 C CNN -F 1 "8" V 8400 3050 50 0000 C CNN - 1 8400 3050 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q2 -U 1 1 518893FC -P 7400 3050 -F 0 "Q2" H 7400 2900 60 0000 R CNN -F 1 "PNP" H 7400 3200 60 0000 R CNN - 1 7400 3050 - 1 0 0 1 -$EndComp -$Comp -L NPN Q1 -U 1 1 518893F7 -P 7400 2400 -F 0 "Q1" H 7400 2250 50 0000 R CNN -F 1 "NPN" H 7400 2550 50 0000 R CNN - 1 7400 2400 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir deleted file mode 100644 index 93fe4d6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 02:05:33 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v3 0 5 23 -U1 6 4 IPLOT -U2 2 6 VPLOT8_1 -v1 2 0 SINE -v2 1 0 23 -R1 4 0 8 -Q2 6 2 5 PNP -Q1 6 2 1 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt deleted file mode 100644 index 903850c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 02:05:33 pm ist - -v3 0 5 23 -V_u1 6 4 0 -* Plotting option vplot8_1 -v1 2 0 sine( 17.9 1000 ) -v2 1 0 23 -r1 4 0 8 -q2 5 2 6 pnp -q1 1 2 6 npn - -.tran 1e-00 3e-00 0e-00 -.plot i(V_u1) -.plot v(2) v(6) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out deleted file mode 100644 index 061ce43..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 02:05:33 pm ist - -v3 0 5 23 -V_u1 6 4 0 -* Plotting option vplot8_1 -v1 2 0 sine( 17.9 1000 ) -v2 1 0 23 -r1 4 0 8 -q2 5 2 6 pnp -q1 1 2 6 npn - -.tran 1e-00 3e-00 0e-00 - -* Control Statements -.control -run -plot i(V_u1) -plot v(2) v(6) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.pro b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.pro deleted file mode 100644 index c84bea9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 07 May 2013 11:10:57 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.proj b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.proj deleted file mode 100644 index fdaaf23..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_12.8.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.sch b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.sch deleted file mode 100644 index 15b79e2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.sch +++ /dev/null @@ -1,221 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 02:05:36 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_12.8-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L GND #PWR01 -U 1 1 5190A5AD -P 9250 2600 -F 0 "#PWR01" H 9250 2600 30 0001 C CNN -F 1 "GND" H 9250 2530 30 0001 C CNN - 1 9250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 8950 2600 -Wire Wire Line - 8950 2600 9250 2600 -Wire Wire Line - 8950 3600 8600 3600 -Wire Wire Line - 8600 3600 8600 3450 -Wire Wire Line - 8250 2800 8400 2800 -Connection ~ 7000 2750 -Wire Wire Line - 7500 2000 8600 2000 -Wire Wire Line - 6900 3650 7900 3650 -Wire Wire Line - 7750 3650 7750 3300 -Wire Wire Line - 7500 2000 7500 2200 -Connection ~ 7200 2750 -Wire Wire Line - 7200 2750 6900 2750 -Wire Wire Line - 7750 2800 7750 2750 -Connection ~ 7500 2750 -Wire Wire Line - 7750 2750 7500 2750 -Wire Wire Line - 7500 2600 7500 2850 -Wire Wire Line - 7200 2400 7200 3050 -Connection ~ 7750 2750 -Wire Wire Line - 7500 3250 7500 3450 -Connection ~ 7750 3650 -Wire Wire Line - 7500 3450 8600 3450 -Wire Wire Line - 7750 3300 8400 3300 -Wire Wire Line - 8600 2000 8600 1600 -Wire Wire Line - 8600 1600 8950 1600 -Wire Wire Line - 8950 2500 8950 2700 -$Comp -L DC v3 -U 1 1 5190A59B -P 8950 3150 -F 0 "v3" H 8750 3250 60 0000 C CNN -F 1 "23" H 8750 3100 60 0000 C CNN -F 2 "R1" H 8650 3150 60 0000 C CNN - 1 8950 3150 - -1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 5188A5F5 -P 8000 2800 -F 0 "U1" H 7850 2900 50 0000 C CNN -F 1 "IPLOT" H 8150 2900 50 0000 C CNN - 1 8000 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 5188A185 -P 7750 2450 -F 0 "U2" H 7600 2550 50 0000 C CNN -F 1 "VPLOT8_1" H 7900 2550 50 0000 C CNN - 2 7750 2450 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 51889CD8 -P 7000 2450 -F 0 "U2" H 6850 2550 50 0000 C CNN -F 1 "VPLOT8_1" H 7150 2550 50 0000 C CNN - 1 7000 2450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 518897EF -P 7200 2750 -F 0 "#FLG02" H 7200 3020 30 0001 C CNN -F 1 "PWR_FLAG" H 7200 2980 30 0000 C CNN - 1 7200 2750 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 51889574 -P 6900 3200 -F 0 "v1" H 6700 3300 60 0000 C CNN -F 1 "SINE" H 6700 3150 60 0000 C CNN -F 2 "R1" H 6600 3200 60 0000 C CNN - 1 6900 3200 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 51889502 -P 7750 3650 -F 0 "#FLG03" H 7750 3920 30 0001 C CNN -F 1 "PWR_FLAG" H 7750 3880 30 0000 C CNN - 1 7750 3650 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 518894F5 -P 7900 3650 -F 0 "#PWR04" H 7900 3650 30 0001 C CNN -F 1 "GND" H 7900 3580 30 0001 C CNN - 1 7900 3650 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 518894AB -P 8950 2050 -F 0 "v2" H 8750 2150 60 0000 C CNN -F 1 "23" H 8750 2000 60 0000 C CNN -F 2 "R1" H 8650 2050 60 0000 C CNN - 1 8950 2050 - -1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5188943C -P 8400 3050 -F 0 "R1" V 8480 3050 50 0000 C CNN -F 1 "8" V 8400 3050 50 0000 C CNN - 1 8400 3050 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q2 -U 1 1 518893FC -P 7400 3050 -F 0 "Q2" H 7400 2900 60 0000 R CNN -F 1 "PNP" H 7400 3200 60 0000 R CNN - 1 7400 3050 - 1 0 0 1 -$EndComp -$Comp -L NPN Q1 -U 1 1 518893F7 -P 7400 2400 -F 0 "Q1" H 7400 2250 50 0000 R CNN -F 1 "NPN" H 7400 2550 50 0000 R CNN - 1 7400 2400 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/1n4007.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/1n4007.lib deleted file mode 100644 index 89d421d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/1n4007.lib +++ /dev/null @@ -1,2 +0,0 @@ -.model 1n4007 D( IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 BV=1000 IBV=5e-08 CJO=1E-11 -+VJ=0.7 M=0.5 FC=0.5 TT=1E-07 KF=0 AF=1 ) diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/analysis deleted file mode 100644 index 09ae223..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-03 1e-01 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.bak deleted file mode 100644 index a47b560..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.bak +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 11:21:47 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.lib deleted file mode 100644 index 6d1cabe..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.lib +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 11:52:16 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak deleted file mode 100644 index 3314c60..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak +++ /dev/null @@ -1,133 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 14 May 2013 11:21:47 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:example_2.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "14 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5750 5050 -Wire Wire Line - 5550 3150 5650 3150 -Wire Wire Line - 5050 4550 5050 5050 -Wire Wire Line - 6500 4900 6500 5050 -Wire Wire Line - 6050 3150 6500 3150 -Wire Wire Line - 5750 5050 5750 5800 -Connection ~ 5750 5550 -Connection ~ 6500 3150 -Wire Wire Line - 6500 3150 6500 3350 -Wire Wire Line - 6500 3850 6500 4000 -Wire Wire Line - 5050 3150 5050 3650 -Wire Wire Line - 6500 5050 5050 5050 -$Comp -L DC v2 -U 1 1 516BA020 -P 6500 4450 -F 0 "v2" H 6300 4550 60 0000 C CNN -F 1 "DC" H 6300 4400 60 0000 C CNN -F 2 "R1" H 6200 4450 60 0000 C CNN - 1 6500 4450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5167CC3A -P 5750 5550 -F 0 "#FLG01" H 5750 5645 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 5730 30 0000 C CNN - 1 5750 5550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5167CC15 -P 5750 5800 -F 0 "#PWR02" H 5750 5800 30 0001 C CNN -F 1 "GND" H 5750 5730 30 0001 C CNN - 1 5750 5800 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 5166A34A -P 6500 3600 -F 0 "U1" H 6350 3700 50 0000 C CNN -F 1 "IPLOT" H 6650 3700 50 0000 C CNN - 1 6500 3600 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166A210 -P 5850 3150 -F 0 "D1" H 5850 3250 40 0000 C CNN -F 1 "DIODE" H 5850 3050 40 0000 C CNN - 1 5850 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166A1EB -P 5300 3150 -F 0 "R1" V 5380 3150 50 0000 C CNN -F 1 "100" V 5300 3150 50 0000 C CNN - 1 5300 3150 - 0 -1 -1 0 -$EndComp -$Comp -L SINE v1 -U 1 1 5166A1AC -P 5050 4100 -F 0 "v1" H 4850 4200 60 0000 C CNN -F 1 "SINE" H 4850 4050 60 0000 C CNN -F 2 "R1" H 4750 4100 60 0000 C CNN - 1 5050 4100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd deleted file mode 100644 index bf4bd89..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd +++ /dev/null @@ -1,172 +0,0 @@ -PCBNEW-BOARD Version 1 date Friday 12 April 2013 02:43:29 PM IST - -# Created by Pcbnew(2012-apr-16-27)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 0 -NoConn 0 -Di 40424 25540 76751 39450 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 2 -Nnets 4 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "12 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000018" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000019" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000018" -AddNet "N-000019" -$EndNCLASS -$MODULE 1pin -Po 41500 38000 0 15 00200000 5167CFD9 ~~ -Li 1pin -Cd module 1 pin (ou trou mecanique de percage) -Kw DEV -Sc 5167CFD9 -AR 1pin -Op 0 0 0 -T0 0 -1200 400 400 0 100 N V 21 N "1PIN" -T1 0 1100 400 400 0 100 N I 21 N "P***" -DC 0 0 0 -900 150 21 -$PAD -Sh "1" C 1600 1600 0 0 0 -Dr 1200 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 0 0 -$EndPAD -$EndMODULE 1pin -$MODULE 3PIN_6mm -Po 68000 29000 0 15 00200000 5167CFEC ~~ -Li 3PIN_6mm -Cd module 2 pin (trou 6 mm) -Kw DEV -Sc 5167CFEC -AR -Op 0 0 0 -T0 4000 -3000 600 600 0 120 N V 21 N "K1" -T1 -3000 -3000 600 600 0 120 N V 21 N "CONN_3" -DS -8500 -2500 8500 -2500 150 21 -DS 8500 -2500 8500 2500 150 21 -DS 8500 2500 -8500 2500 150 21 -DS -8500 2500 -8500 -2500 150 21 -$PAD -Sh "1" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 2 "N-000018" -Po -5900 0 -$EndPAD -$PAD -Sh "3" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 3 "N-000019" -Po 5900 0 -$EndPAD -$PAD -Sh "2" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 0 0 -$EndPAD -$SHAPE3D -Na "device/douille_4mm(black).wrl" -Sc 1.800000 1.800000 1.800000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$SHAPE3D -Na "device/douille_4mm(red).wrl" -Sc 1.800000 1.800000 1.800000 -Of -0.590000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$SHAPE3D -Na "device/douille_4mm(green).wrl" -Sc 1.800000 1.800000 1.800000 -Of 0.590000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE 3PIN_6mm -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir deleted file mode 100644 index 16861f7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 12:08:03 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v2 1 0 DC -U1 3 1 IPLOT -D1 5 3 DIODE -R1 2 5 100 -v1 2 0 SINE - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt deleted file mode 100644 index 6d02b34..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt +++ /dev/null @@ -1,11 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 12:08:03 pm ist - -v2 1 0 dc 12 -V_u1 3 1 0 -d1 5 3 diode -r1 2 5 100 -v1 2 0 sine(0 24 50 0 0) - -.tran 10e-03 1e-01 0e-00 -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out deleted file mode 100644 index 52cc067..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out +++ /dev/null @@ -1,16 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 12:08:03 pm ist - -v2 1 0 dc 12 -V_u1 3 1 0 -d1 5 3 diode -r1 2 5 100 -v1 2 0 sine(0 24 50 0 0) - -.tran 10e-03 1e-01 0e-00 - -* Control Statements -.control -run -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp deleted file mode 100644 index 779ff51..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp +++ /dev/null @@ -1,38 +0,0 @@ -Cmp-Mod V01 Created by CvPcb (2012-apr-16-27)-stable date = Friday 12 April 2013 02:41:23 PM IST - -BeginCmp -TimeStamp = /5166A210; -Reference = D1; -ValeurCmp = DIODE; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5166A1EB; -Reference = R1; -ValeurCmp = 100; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5166A34A; -Reference = U1; -ValeurCmp = IPLOT; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5166A1AC; -Reference = v1; -ValeurCmp = SINE; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /5166A26E; -Reference = v2; -ValeurCmp = 12V; -IdModule = R1; -EndCmp - -EndListe diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net deleted file mode 100644 index eeea8db..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net +++ /dev/null @@ -1,44 +0,0 @@ -# EESchema Netlist Version 1.1 created Friday 12 April 2013 02:41:23 PM IST -( - ( /5166A210 $noname$ D1 DIODE - ( 1 N-000002 ) - ( 2 N-000004 ) - ) - ( /5166A1EB $noname$ R1 100 - ( 1 N-000001 ) - ( 2 N-000002 ) - ) - ( /5166A34A $noname$ U1 IPLOT - ( 1 N-000004 ) - ( 2 N-000003 ) - ) - ( /5166A1AC R1 v1 SINE - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /5166A26E R1 v2 12V - ( 1 N-000003 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component D1 - D? - S* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* - SM1206 -$endlist -$component v1 - 1_pin -$endlist -$component v2 - 1_pin -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro deleted file mode 100644 index f5826c2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Thursday 11 April 2013 05:12:20 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj deleted file mode 100644 index 3cb5076..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.1.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch deleted file mode 100644 index dfa5e1d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch +++ /dev/null @@ -1,133 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 14 May 2013 11:52:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:example_2.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "14 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5750 5050 -Wire Wire Line - 5550 3150 5650 3150 -Wire Wire Line - 5050 4550 5050 5050 -Wire Wire Line - 6500 4900 6500 5050 -Wire Wire Line - 6050 3150 6500 3150 -Wire Wire Line - 5750 5050 5750 5800 -Connection ~ 5750 5550 -Connection ~ 6500 3150 -Wire Wire Line - 6500 3150 6500 3350 -Wire Wire Line - 6500 3850 6500 4000 -Wire Wire Line - 5050 3150 5050 3650 -Wire Wire Line - 6500 5050 5050 5050 -$Comp -L DC v2 -U 1 1 516BA020 -P 6500 4450 -F 0 "v2" H 6300 4550 60 0000 C CNN -F 1 "DC" H 6300 4400 60 0000 C CNN -F 2 "R1" H 6200 4450 60 0000 C CNN - 1 6500 4450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5167CC3A -P 5750 5550 -F 0 "#FLG01" H 5750 5645 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 5730 30 0000 C CNN - 1 5750 5550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5167CC15 -P 5750 5800 -F 0 "#PWR02" H 5750 5800 30 0001 C CNN -F 1 "GND" H 5750 5730 30 0001 C CNN - 1 5750 5800 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 5166A34A -P 6500 3600 -F 0 "U1" H 6350 3700 50 0000 C CNN -F 1 "IPLOT" H 6650 3700 50 0000 C CNN - 1 6500 3600 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166A210 -P 5850 3150 -F 0 "D1" H 5850 3250 40 0000 C CNN -F 1 "DIODE" H 5850 3050 40 0000 C CNN - 1 5850 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166A1EB -P 5300 3150 -F 0 "R1" V 5380 3150 50 0000 C CNN -F 1 "100" V 5300 3150 50 0000 C CNN - 1 5300 3150 - 0 -1 -1 0 -$EndComp -$Comp -L SINE v1 -U 1 1 5166A1AC -P 5050 4100 -F 0 "v1" H 4850 4200 60 0000 C CNN -F 1 "SINE" H 4850 4050 60 0000 C CNN -F 2 "R1" H 4750 4100 60 0000 C CNN - 1 5050 4100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/analysis deleted file mode 100644 index 403e10c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v2 0e-00 10e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.bak deleted file mode 100644 index fc013c5..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.bak +++ /dev/null @@ -1,90 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 14 April 2013 04:43:15 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 95 30 H I C CNN -F1 "PWR_FLAG" 0 180 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* - SM1206 -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.lib deleted file mode 100644 index aea3592..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.lib +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 12:54:28 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.bak deleted file mode 100644 index 6ce76aa..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.bak +++ /dev/null @@ -1,162 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 14 April 2013 04:43:15 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.2-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "14 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PWR_FLAG #FLG01 -U 1 1 516A8F23 -P 4150 6650 -F 0 "#FLG01" H 4150 6745 30 0001 C CNN -F 1 "PWR_FLAG" H 4150 6830 30 0000 C CNN - 1 4150 6650 - 0 1 1 0 -$EndComp -Connection ~ 4150 6650 -Connection ~ 6350 4000 -Wire Wire Line - 6350 3350 6350 3150 -Connection ~ 4150 5200 -Wire Wire Line - 6350 5200 4150 5200 -Wire Wire Line - 4800 3150 4150 3150 -Wire Wire Line - 4150 5350 4150 4650 -Wire Wire Line - 6350 3150 5700 3150 -Wire Wire Line - 6350 4650 6350 4800 -Wire Wire Line - 4150 5750 4150 6000 -Wire Wire Line - 6350 3850 6350 4150 -Wire Wire Line - 4150 3150 4150 4150 -Wire Wire Line - 4150 6850 4150 6500 -$Comp -L GND #PWR02 -U 1 1 5167DAB9 -P 4150 6850 -F 0 "#PWR02" H 4150 6850 30 0001 C CNN -F 1 "GND" H 4150 6780 30 0001 C CNN - 1 4150 6850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 5167DA8B -P 4150 6250 -F 0 "U1" H 4000 6350 50 0000 C CNN -F 1 "IPLOT" H 4300 6350 50 0000 C CNN - 1 4150 6250 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 5167D9D2 -P 6350 3600 -F 0 "U2" H 6200 3700 50 0000 C CNN -F 1 "IPLOT" H 6500 3700 50 0000 C CNN - 1 6350 3600 - 0 1 1 0 -$EndComp -$Comp -L DIODE D2 -U 1 1 5167D956 -P 6350 5000 -F 0 "D2" H 6350 5100 40 0000 C CNN -F 1 "DIODE" H 6350 4900 40 0000 C CNN - 1 6350 5000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 5167D912 -P 5250 3150 -F 0 "v1" H 5050 3250 60 0000 C CNN -F 1 "10V" H 5050 3100 60 0000 C CNN -F 2 "R1" H 4950 3150 60 0000 C CNN - 1 5250 3150 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5167D8E5 -P 6350 4400 -F 0 "R2" V 6430 4400 50 0000 C CNN -F 1 "10k" V 6350 4400 50 0000 C CNN - 1 6350 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5167D8B8 -P 4150 4400 -F 0 "R1" V 4230 4400 50 0000 C CNN -F 1 "5k" V 4150 4400 50 0000 C CNN - 1 4150 4400 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D1 -U 1 1 5167D869 -P 4150 5550 -F 0 "D1" H 4150 5650 40 0000 C CNN -F 1 "DIODE" H 4150 5450 40 0000 C CNN - 1 4150 5550 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir deleted file mode 100644 index a8ccf76..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 12:54:07 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 6 VPLOT8_1 -v2 1 0 10V -v1 0 4 10V -U1 5 0 IPLOT -U2 1 7 IPLOT -D2 6 3 DIODE -R2 7 6 5k -R1 4 3 10k -D1 5 3 DIODE - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.ckt deleted file mode 100644 index ec3f080..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:54:07 pm ist - -* Plotting option vplot8_1 -v2 1 0 10v -v1 0 4 10v -V_u1 5 0 0 -V_u2 1 7 0 -d2 6 3 diode -r2 7 6 5k -r1 4 3 10k -d1 5 3 diode - -.dc v2 0e-00 10e-00 1e-00 -.plot v(6) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.out deleted file mode 100644 index b89d0e8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:54:07 pm ist - -* Plotting option vplot8_1 -v2 1 0 10v -v1 0 4 10v -V_u1 5 0 0 -V_u2 1 7 0 -d2 6 3 diode -r2 7 6 5k -r1 4 3 10k -d1 5 3 diode - -.dc v2 0e-00 10e-00 1e-00 - -* Control Statements -.control -run -plot v(6) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.pro deleted file mode 100644 index 49fe832..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 13 May 2013 12:52:59 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.proj deleted file mode 100644 index 049873b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.2.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.sch deleted file mode 100644 index de929d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.sch +++ /dev/null @@ -1,195 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 12:54:28 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.2-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 6650 4750 -$Comp -L VPLOT8_1 U3 -U 1 1 519094DB -P 6650 4450 -F 0 "U3" H 6500 4550 50 0000 C CNN -F 1 "VPLOT8_1" H 6800 4550 50 0000 C CNN - 1 6650 4450 - 1 0 0 -1 -$EndComp -Connection ~ 6350 4750 -Wire Wire Line - 6350 4750 6650 4750 -Wire Wire Line - 5050 3150 5450 3150 -Wire Wire Line - 4150 6850 4150 6500 -Wire Wire Line - 4150 3150 4150 4150 -Wire Wire Line - 6350 3850 6350 4150 -Wire Wire Line - 4150 5750 4150 6000 -Wire Wire Line - 6350 4650 6350 4800 -Wire Wire Line - 4150 5350 4150 4650 -Wire Wire Line - 6350 5200 4150 5200 -Connection ~ 4150 5200 -Wire Wire Line - 6350 3350 6350 3150 -Connection ~ 6350 4000 -Connection ~ 4150 6650 -Wire Wire Line - 5250 3150 5250 3300 -Connection ~ 5250 3150 -$Comp -L GND #PWR01 -U 1 1 51909464 -P 5250 3300 -F 0 "#PWR01" H 5250 3300 30 0001 C CNN -F 1 "GND" H 5250 3230 30 0001 C CNN - 1 5250 3300 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 51909454 -P 5900 3150 -F 0 "v2" H 5700 3250 60 0000 C CNN -F 1 "10V" H 5700 3100 60 0000 C CNN -F 2 "R1" H 5600 3150 60 0000 C CNN - 1 5900 3150 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 5167D912 -P 4600 3150 -F 0 "v1" H 4400 3250 60 0000 C CNN -F 1 "10V" H 4400 3100 60 0000 C CNN -F 2 "R1" H 4300 3150 60 0000 C CNN - 1 4600 3150 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516A8F23 -P 4150 6650 -F 0 "#FLG02" H 4150 6745 30 0001 C CNN -F 1 "PWR_FLAG" H 4150 6830 30 0000 C CNN - 1 4150 6650 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5167DAB9 -P 4150 6850 -F 0 "#PWR03" H 4150 6850 30 0001 C CNN -F 1 "GND" H 4150 6780 30 0001 C CNN - 1 4150 6850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 5167DA8B -P 4150 6250 -F 0 "U1" H 4000 6350 50 0000 C CNN -F 1 "IPLOT" H 4300 6350 50 0000 C CNN - 1 4150 6250 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 5167D9D2 -P 6350 3600 -F 0 "U2" H 6200 3700 50 0000 C CNN -F 1 "IPLOT" H 6500 3700 50 0000 C CNN - 1 6350 3600 - 0 1 1 0 -$EndComp -$Comp -L DIODE D2 -U 1 1 5167D956 -P 6350 5000 -F 0 "D2" H 6350 5100 40 0000 C CNN -F 1 "DIODE" H 6350 4900 40 0000 C CNN - 1 6350 5000 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5167D8E5 -P 6350 4400 -F 0 "R2" V 6430 4400 50 0000 C CNN -F 1 "5k" V 6350 4400 50 0000 C CNN - 1 6350 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5167D8B8 -P 4150 4400 -F 0 "R1" V 4230 4400 50 0000 C CNN -F 1 "10k" V 4150 4400 50 0000 C CNN - 1 4150 4400 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D1 -U 1 1 5167D869 -P 4150 5550 -F 0 "D1" H 4150 5650 40 0000 C CNN -F 1 "DIODE" H 4150 5450 40 0000 C CNN - 1 4150 5550 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/analysis deleted file mode 100644 index f481193..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 50e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/diode.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/diode.lib deleted file mode 100644 index f4b7c8a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/diode.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model diode D( Vj=.65 Nbvl=14.976 Cjo=175p Rs=.20 Isr=1.859n -+ Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u -+ Bv=8.1 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m -+ Is=880.5E-18 Xti=3 Ibvl=1.9556m )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak deleted file mode 100644 index f7ad596..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak +++ /dev/null @@ -1,105 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 12 April 2013 03:08:39 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* - SM1206 -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.lib deleted file mode 100644 index 1321f82..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.lib +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 12:59:04 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.bak deleted file mode 100644 index 132334d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.bak +++ /dev/null @@ -1,133 +0,0 @@ -EESchema Schematic File Version 2 date Friday 12 April 2013 03:08:39 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "12 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5700 3600 5500 3600 -Wire Wire Line - 6100 3650 6100 4100 -Connection ~ 5500 4100 -Wire Wire Line - 6100 4100 4200 4100 -Wire Wire Line - 4650 2850 4200 2850 -Wire Wire Line - 4200 2850 4200 3200 -Wire Wire Line - 5700 3200 5700 2850 -Wire Wire Line - 5150 2850 6100 2850 -Connection ~ 5700 2850 -Wire Wire Line - 6100 2850 6100 3050 -Wire Wire Line - 5200 4100 5200 4650 -Connection ~ 5200 4100 -$Comp -L IPLOT U2 -U 1 1 5167D5E8 -P 5500 3850 -F 0 "U2" H 5350 3950 50 0000 C CNN -F 1 "IPLOT" H 5650 3950 50 0000 C CNN - 1 5500 3850 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR01 -U 1 1 5166ABF9 -P 5200 4650 -F 0 "#PWR01" H 5200 4650 30 0001 C CNN -F 1 "GND" H 5200 4580 30 0001 C CNN - 1 5200 4650 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8 U1 -U 1 1 5166A97D -P 6100 3350 -F 0 "U1" H 5950 3450 50 0000 C CNN -F 1 "VPLOT8" H 6250 3450 50 0000 C CNN - 1 6100 3350 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166A924 -P 5700 3400 -F 0 "D1" H 5700 3500 40 0000 C CNN -F 1 "DIODE" H 5700 3300 40 0000 C CNN - 1 5700 3400 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 5166A8EF -P 4900 2850 -F 0 "R1" V 4980 2850 50 0000 C CNN -F 1 "1000" V 4900 2850 50 0000 C CNN - 1 4900 2850 - 0 -1 -1 0 -$EndComp -$Comp -L DC v1 -U 1 1 5166A8CD -P 4200 3650 -F 0 "v1" H 4000 3750 60 0000 C CNN -F 1 "5V" H 4000 3600 60 0000 C CNN -F 2 "R1" H 3900 3650 60 0000 C CNN - 1 4200 3650 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir deleted file mode 100644 index 3731a3e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 12:59:00 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 2 VPLOT8_1 -U2 3 0 IPLOT -D1 2 3 DIODE -R1 1 2 1000 -v1 1 0 5V - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt deleted file mode 100644 index 43a6aa9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:59:00 pm ist -.include diode.lib - -* Plotting option vplot8_1 -V_u2 3 0 0 -d1 2 3 diode -r1 1 2 1000 -v1 1 0 5v - -.dc v1 0e-00 5e-00 50e-03 -.plot v(2) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out deleted file mode 100644 index 3ce4892..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:59:00 pm ist -.include diode.lib - -* Plotting option vplot8_1 -V_u2 3 0 0 -d1 2 3 diode -r1 1 2 1000 -v1 1 0 5v - -.dc v1 0e-00 5e-00 50e-03 - -* Control Statements -.control -run -plot v(2) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro deleted file mode 100644 index 9718ce6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 13 May 2013 12:58:14 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj deleted file mode 100644 index eb6337b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch deleted file mode 100644 index 7aac593..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch +++ /dev/null @@ -1,139 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 12:59:04 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PWR_FLAG #FLG01 -U 1 1 51909635 -P 5200 4200 -F 0 "#FLG01" H 5200 4470 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 4430 30 0000 C CNN - 1 5200 4200 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5190961B -P 5700 2550 -F 0 "U1" H 5550 2650 50 0000 C CNN -F 1 "VPLOT8_1" H 5850 2650 50 0000 C CNN - 1 5700 2550 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5150 2850 5700 2850 -Wire Wire Line - 5700 3600 5700 3700 -Connection ~ 5200 4200 -Wire Wire Line - 5200 4200 5200 4750 -Connection ~ 5700 2850 -Wire Wire Line - 5700 2850 5700 3200 -Wire Wire Line - 4200 3200 4200 2850 -Wire Wire Line - 4200 2850 4650 2850 -Wire Wire Line - 4200 4100 4200 4200 -Wire Wire Line - 4200 4200 5700 4200 -$Comp -L IPLOT U2 -U 1 1 5167D5E8 -P 5700 3950 -F 0 "U2" H 5550 4050 50 0000 C CNN -F 1 "IPLOT" H 5850 4050 50 0000 C CNN - 1 5700 3950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166ABF9 -P 5200 4750 -F 0 "#PWR02" H 5200 4750 30 0001 C CNN -F 1 "GND" H 5200 4680 30 0001 C CNN - 1 5200 4750 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166A924 -P 5700 3400 -F 0 "D1" H 5700 3500 40 0000 C CNN -F 1 "DIODE" H 5700 3300 40 0000 C CNN - 1 5700 3400 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 5166A8EF -P 4900 2850 -F 0 "R1" V 4980 2850 50 0000 C CNN -F 1 "1000" V 4900 2850 50 0000 C CNN - 1 4900 2850 - 0 -1 -1 0 -$EndComp -$Comp -L DC v1 -U 1 1 5166A8CD -P 4200 3650 -F 0 "v1" H 4000 3750 60 0000 C CNN -F 1 "5V" H 4000 3600 60 0000 C CNN -F 2 "R1" H 3900 3650 60 0000 C CNN - 1 4200 3650 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/analysis deleted file mode 100644 index 0a70a74..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/diode.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/diode.lib deleted file mode 100644 index d5c42a7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/diode.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model diode D( Is=880.5E-18 Nbvl=14.976 Cjo=175p Rs=20 Isr=1.859n -+ Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u -+ Bv=8.1 Fc=.5 Ikf=0 Xti=3 Nr=2 -+ Vj=.65 Ibv=20.245m Ibvl=1.9556m )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak deleted file mode 100644 index 4dd86fe..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 02:41:15 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.lib deleted file mode 100644 index 9adc092..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.lib +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 21 May 2013 11:07:18 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.bak deleted file mode 100644 index 21d43d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.bak +++ /dev/null @@ -1,164 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 14 May 2013 02:41:15 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.5-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "14 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L DC v1 -U 1 1 5191FF90 -P 5000 3850 -F 0 "v1" H 4800 3950 60 0000 C CNN -F 1 "DC" H 4800 3800 60 0000 C CNN -F 2 "R1" H 4700 3850 60 0000 C CNN - 1 5000 3850 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5190978A -P 6250 5300 -F 0 "#FLG01" H 6250 5570 30 0001 C CNN -F 1 "PWR_FLAG" H 6250 5530 30 0000 C CNN - 1 6250 5300 - 1 0 0 -1 -$EndComp -Connection ~ 6600 2100 -$Comp -L VPLOT8_1 U1 -U 1 1 51909775 -P 6600 1800 -F 0 "U1" H 6450 1900 50 0000 C CNN -F 1 "VPLOT8_1" H 6750 1900 50 0000 C CNN - 1 6600 1800 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6250 5300 5000 5300 -Wire Wire Line - 6250 3300 6250 3350 -Wire Wire Line - 6250 4850 6250 5500 -Wire Wire Line - 6250 2350 6250 2100 -Connection ~ 6250 5300 -Connection ~ 6250 2100 -Wire Wire Line - 5250 2100 5000 2100 -Wire Wire Line - 5750 2100 6600 2100 -Connection ~ 6250 5300 -Wire Wire Line - 6250 2750 6250 2800 -Wire Wire Line - 5000 2100 5000 3400 -Wire Wire Line - 6250 4250 6250 4350 -Wire Wire Line - 5000 5300 5000 4300 -$Comp -L IPLOT U2 -U 1 1 519096FE -P 6250 4600 -F 0 "U2" H 6100 4700 50 0000 C CNN -F 1 "IPLOT" H 6400 4700 50 0000 C CNN - 1 6250 4600 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 519096A6 -P 6250 3050 -F 0 "R2" V 6330 3050 50 0000 C CNN -F 1 "20m" V 6250 3050 50 0000 C CNN - 1 6250 3050 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5190969F -P 6250 3800 -F 0 "v2" H 6050 3900 60 0000 C CNN -F 1 "65m" H 6050 3750 60 0000 C CNN -F 2 "R1" H 5950 3800 60 0000 C CNN - 1 6250 3800 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516A928C -P 5500 2100 -F 0 "R1" V 5580 2100 50 0000 C CNN -F 1 "1000" V 5500 2100 50 0000 C CNN - 1 5500 2100 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166AFB9 -P 6250 5500 -F 0 "#PWR02" H 6250 5500 30 0001 C CNN -F 1 "GND" H 6250 5430 30 0001 C CNN - 1 6250 5500 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166AF28 -P 6250 2550 -F 0 "D1" H 6250 2650 40 0000 C CNN -F 1 "DIODE" H 6250 2450 40 0000 C CNN - 1 6250 2550 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir deleted file mode 100644 index ab9de69..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 14 May 2013 02:41:09 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 1 0 DC -U1 5 VPLOT8_1 -U2 4 0 IPLOT -R2 3 2 20m -v2 2 4 65m -R1 1 5 1000 -D1 5 3 DIODE - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt deleted file mode 100644 index eb19daf..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 14 may 2013 02:41:09 pm ist -.include diode.lib - -v1 1 0 dc 5 -* Plotting option vplot8_1 -V_u2 4 0 0 -r2 3 2 20m -v2 2 4 65m -r1 1 5 1000 -d1 5 3 diode - -.dc v1 0e-00 5e-00 1e-00 -.plot v(5) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out deleted file mode 100644 index a3bbe2c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 14 may 2013 02:41:09 pm ist -.include diode.lib - -v1 1 0 dc 5 -* Plotting option vplot8_1 -V_u2 4 0 0 -r2 3 2 20m -v2 2 4 65m -r1 1 5 1000 -d1 5 3 diode - -.dc v1 0e-00 5e-00 1e-00 - -* Control Statements -.control -run -plot v(5) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro deleted file mode 100644 index 8e9a0fd..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 13 May 2013 01:04:04 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj deleted file mode 100644 index 1148c23..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.5.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch deleted file mode 100644 index ff9da18..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch +++ /dev/null @@ -1,168 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 21 May 2013 11:07:18 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.5-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "21 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 6650 2050 0 90 Italic 18 -Vd -Text Notes 6450 3850 0 90 Italic 18 -Id -$Comp -L DC v1 -U 1 1 5191FF90 -P 5000 3850 -F 0 "v1" H 4800 3950 60 0000 C CNN -F 1 "DC" H 4800 3800 60 0000 C CNN -F 2 "R1" H 4700 3850 60 0000 C CNN - 1 5000 3850 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5190978A -P 6250 5300 -F 0 "#FLG01" H 6250 5570 30 0001 C CNN -F 1 "PWR_FLAG" H 6250 5530 30 0000 C CNN - 1 6250 5300 - 1 0 0 -1 -$EndComp -Connection ~ 6600 2100 -$Comp -L VPLOT8_1 U1 -U 1 1 51909775 -P 6600 1800 -F 0 "U1" H 6450 1900 50 0000 C CNN -F 1 "VPLOT8_1" H 6750 1900 50 0000 C CNN - 1 6600 1800 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6250 5300 5000 5300 -Wire Wire Line - 6250 3300 6250 3350 -Wire Wire Line - 6250 4850 6250 5500 -Wire Wire Line - 6250 2350 6250 2100 -Connection ~ 6250 5300 -Connection ~ 6250 2100 -Wire Wire Line - 5250 2100 5000 2100 -Wire Wire Line - 5750 2100 6600 2100 -Connection ~ 6250 5300 -Wire Wire Line - 6250 2750 6250 2800 -Wire Wire Line - 5000 2100 5000 3400 -Wire Wire Line - 6250 4250 6250 4350 -Wire Wire Line - 5000 5300 5000 4300 -$Comp -L IPLOT U2 -U 1 1 519096FE -P 6250 4600 -F 0 "U2" H 6100 4700 50 0000 C CNN -F 1 "IPLOT" H 6400 4700 50 0000 C CNN - 1 6250 4600 - 0 1 1 0 -$EndComp -$Comp -L R Rd -U 1 1 519096A6 -P 6250 3050 -F 0 "Rd" V 6330 3050 50 0000 C CNN -F 1 "20m" V 6250 3050 50 0000 C CNN - 1 6250 3050 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5190969F -P 6250 3800 -F 0 "v2" H 6050 3900 60 0000 C CNN -F 1 "65m" H 6050 3750 60 0000 C CNN -F 2 "R1" H 5950 3800 60 0000 C CNN - 1 6250 3800 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516A928C -P 5500 2100 -F 0 "R1" V 5580 2100 50 0000 C CNN -F 1 "1000" V 5500 2100 50 0000 C CNN - 1 5500 2100 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166AFB9 -P 6250 5500 -F 0 "#PWR02" H 6250 5500 30 0001 C CNN -F 1 "GND" H 6250 5430 30 0001 C CNN - 1 6250 5500 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166AF28 -P 6250 2550 -F 0 "D1" H 6250 2650 40 0000 C CNN -F 1 "DIODE" H 6250 2450 40 0000 C CNN - 1 6250 2550 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/analysis deleted file mode 100644 index 35318bb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.bak deleted file mode 100644 index c86efd4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.bak +++ /dev/null @@ -1,93 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 03:23:37 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -# ZENER -# -DEF ZENER D 0 40 N N 1 F N -F0 "D" 0 100 50 H V C CNN -F1 "ZENER" 0 -100 40 H V C CNN -$FPLIST - D? - SO* - SM* -$ENDFPLIST -DRAW -P 5 0 1 0 50 0 -50 50 -50 -50 50 0 50 0 F -P 5 0 1 8 70 50 50 30 50 -30 30 -50 30 -50 N -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.lib deleted file mode 100644 index 68b8c20..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8-cache.lib +++ /dev/null @@ -1,93 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 03:25:17 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -# ZENER -# -DEF ZENER D 0 40 N N 1 F N -F0 "D" 0 100 50 H V C CNN -F1 "ZENER" 0 -100 40 H V C CNN -$FPLIST - D? - SO* - SM* -$ENDFPLIST -DRAW -P 5 0 1 0 50 0 -50 50 -50 -50 50 0 50 0 F -P 5 0 1 8 70 50 50 30 50 -30 30 -50 30 -50 N -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.bak deleted file mode 100644 index 298b82a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.bak +++ /dev/null @@ -1,132 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 03:23:37 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 7200 2400 -Connection ~ 7200 1800 -Wire Wire Line - 6450 2400 7550 2400 -Wire Wire Line - 6450 2400 6450 2250 -Connection ~ 6850 2400 -Wire Wire Line - 7550 2400 7550 2300 -Wire Wire Line - 6850 2000 6850 1700 -Wire Wire Line - 6850 1200 6450 1200 -Wire Wire Line - 7550 1800 6850 1800 -Connection ~ 6850 1800 -Wire Wire Line - 6450 1200 6450 1350 -Wire Wire Line - 7100 2400 7100 2600 -Connection ~ 7100 2400 -$Comp -L GND #PWR01 -U 1 1 516BCDAC -P 7100 2600 -F 0 "#PWR01" H 7100 2600 30 0001 C CNN -F 1 "GND" H 7100 2530 30 0001 C CNN - 1 7100 2600 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 516BCD76 -P 6450 1800 -F 0 "v1" H 6250 1900 60 0000 C CNN -F 1 "DC" H 6250 1750 60 0000 C CNN -F 2 "R1" H 6150 1800 60 0000 C CNN - 1 6450 1800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8 U1 -U 1 1 516BCD56 -P 7200 2100 -F 0 "U1" H 7050 2200 50 0000 C CNN -F 1 "VPLOT8" H 7350 2200 50 0000 C CNN - 1 7200 2100 - 0 -1 -1 0 -$EndComp -$Comp -L R R2 -U 1 1 516BCD26 -P 7550 2050 -F 0 "R2" V 7630 2050 50 0000 C CNN -F 1 "R" V 7550 2050 50 0000 C CNN - 1 7550 2050 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516BCCFA -P 6850 1450 -F 0 "R1" V 6930 1450 50 0000 C CNN -F 1 "R" V 6850 1450 50 0000 C CNN - 1 6850 1450 - 1 0 0 -1 -$EndComp -$Comp -L ZENER D1 -U 1 1 516BCCC7 -P 6850 2200 -F 0 "D1" H 6850 2300 50 0000 C CNN -F 1 "ZENER" H 6850 2100 40 0000 C CNN - 1 6850 2200 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir deleted file mode 100644 index 69c2aea..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 03:25:12 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 3 0 DC -U1 0 1 VPLOT8 -R2 1 0 2000 -R1 3 1 500 -D1 0 1 ZENER - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.ckt deleted file mode 100644 index cd705cf..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.ckt +++ /dev/null @@ -1,10 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 03:25:12 pm ist - -v1 3 0 dc 10 -r2 1 0 2000 -r1 3 1 500 -d1 0 1 zener - -.dc v1 0e-00 10e-00 5e-03 -.plot -v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.out deleted file mode 100644 index 2cdd76d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.out +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 03:25:12 pm ist - -v1 3 0 dc 10 -r2 1 0 2000 -r1 3 1 500 -d1 0 1 zener - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot -v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj deleted file mode 100644 index e0d6a2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.8.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch deleted file mode 100644 index ddb3704..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch +++ /dev/null @@ -1,123 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 03:25:17 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:example_2.8-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 7200 2400 -Connection ~ 7200 1800 -Wire Wire Line - 6450 2400 7550 2400 -Wire Wire Line - 6450 2400 6450 2250 -Connection ~ 6850 2400 -Wire Wire Line - 7550 2400 7550 2300 -Wire Wire Line - 6850 2000 6850 1700 -Wire Wire Line - 6850 1200 6450 1200 -Wire Wire Line - 7550 1800 6850 1800 -Connection ~ 6850 1800 -Wire Wire Line - 6450 1200 6450 1350 -Wire Wire Line - 7100 2400 7100 2600 -Connection ~ 7100 2400 -$Comp -L GND #PWR01 -U 1 1 516BCDAC -P 7100 2600 -F 0 "#PWR01" H 7100 2600 30 0001 C CNN -F 1 "GND" H 7100 2530 30 0001 C CNN - 1 7100 2600 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 516BCD76 -P 6450 1800 -F 0 "v1" H 6250 1900 60 0000 C CNN -F 1 "DC" H 6250 1750 60 0000 C CNN -F 2 "R1" H 6150 1800 60 0000 C CNN - 1 6450 1800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8 U1 -U 1 1 516BCD56 -P 7200 2100 -F 0 "U1" H 7050 2200 50 0000 C CNN -F 1 "VPLOT8" H 7350 2200 50 0000 C CNN - 1 7200 2100 - 0 -1 -1 0 -$EndComp -$Comp -L R R2 -U 1 1 516BCD26 -P 7550 2050 -F 0 "R2" V 7630 2050 50 0000 C CNN -F 1 "2000" V 7550 2050 50 0000 C CNN - 1 7550 2050 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516BCCFA -P 6850 1450 -F 0 "R1" V 6930 1450 50 0000 C CNN -F 1 "500" V 6850 1450 50 0000 C CNN - 1 6850 1450 - 1 0 0 -1 -$EndComp -$Comp -L ZENER D1 -U 1 1 516BCCC7 -P 6850 2200 -F 0 "D1" H 6850 2300 50 0000 C CNN -F 1 "ZENER" H 6850 2100 40 0000 C CNN - 1 6850 2200 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/analysis deleted file mode 100644 index 73c8f09..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 4e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.bak deleted file mode 100644 index 1d8b498..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 04:09:27 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.lib deleted file mode 100644 index f2704f3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.lib +++ /dev/null @@ -1,131 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 11:42:22 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.bak b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.bak deleted file mode 100644 index ca5b9de..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.bak +++ /dev/null @@ -1,167 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 04:02:35 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example3.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5900 2550 5900 1050 -Wire Wire Line - 4400 4300 4400 3050 -Wire Wire Line - 5000 3800 5000 3250 -Wire Wire Line - 5000 2050 5000 1550 -Connection ~ 5000 5450 -Wire Wire Line - 4400 5450 5900 5450 -Wire Wire Line - 5900 1050 5000 1050 -Wire Wire Line - 4400 3050 4700 3050 -Wire Wire Line - 4400 5450 4400 5200 -Wire Wire Line - 5000 4950 5000 5750 -Connection ~ 5000 5600 -Connection ~ 5000 3450 -Wire Wire Line - 5000 2550 5000 2850 -Wire Wire Line - 5000 4300 5000 4450 -Wire Wire Line - 5900 5450 5900 3450 -$Comp -L IPLOT U2 -U 1 1 516BD643 -P 5000 4050 -F 0 "U2" H 4850 4150 50 0000 C CNN -F 1 "IPLOT" H 5150 4150 50 0000 C CNN - 1 5000 4050 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516BD5F9 -P 5000 2300 -F 0 "U1" H 4850 2400 50 0000 C CNN -F 1 "IPLOT" H 5150 2400 50 0000 C CNN - 1 5000 2300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5166BF83 -P 5000 5600 -F 0 "#FLG01" H 5000 5695 30 0001 C CNN -F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN - 1 5000 5600 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166BF64 -P 5000 5750 -F 0 "#PWR02" H 5000 5750 30 0001 C CNN -F 1 "GND" H 5000 5680 30 0001 C CNN - 1 5000 5750 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166BEE6 -P 4400 4750 -F 0 "v1" H 4200 4850 60 0000 C CNN -F 1 "4" H 4200 4700 60 0000 C CNN -F 2 "R1" H 4100 4750 60 0000 C CNN - 1 4400 4750 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5166BED7 -P 5900 3000 -F 0 "v2" H 5700 3100 60 0000 C CNN -F 1 "10V" H 5700 2950 60 0000 C CNN -F 2 "R1" H 5600 3000 60 0000 C CNN - 1 5900 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166BE96 -P 5000 4700 -F 0 "R2" V 5080 4700 50 0000 C CNN -F 1 "3300" V 5000 4700 50 0000 C CNN - 1 5000 4700 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166BE8E -P 5000 1300 -F 0 "R1" V 5080 1300 50 0000 C CNN -F 1 "4700" V 5000 1300 50 0000 C CNN - 1 5000 1300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166BE53 -P 4900 3050 -F 0 "Q1" H 4900 2900 50 0000 R CNN -F 1 "NPN" H 4900 3200 50 0000 R CNN - 1 4900 3050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir deleted file mode 100644 index 87e5f07..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 04:09:24 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 6 7 VPLOT8_1 -U2 7 3 IPLOT -U1 5 6 IPLOT -v1 2 0 4 -v2 4 0 10V -R2 3 0 3300 -R1 4 5 4700 -Q1 7 2 6 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.ckt deleted file mode 100644 index 21ea9e6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.ckt +++ /dev/null @@ -1,16 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 04:09:24 pm ist - -* Plotting option vplot8_1 -V_u2 7 3 0 -V_u1 5 6 0 -v1 2 0 4 -v2 4 0 10v -r2 3 0 3300 -r1 4 5 4700 -q1 6 2 7 npn - -.dc v1 0e-00 4e-00 5e-03 -.plot v(6) v(7) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.out deleted file mode 100644 index b00fc82..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.out +++ /dev/null @@ -1,21 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 04:09:24 pm ist - -* Plotting option vplot8_1 -V_u2 7 3 0 -V_u1 5 6 0 -v1 2 0 4 -v2 4 0 10v -r2 3 0 3300 -r1 4 5 4700 -q1 6 2 7 npn - -.dc v1 0e-00 4e-00 5e-03 - -* Control Statements -.control -run -plot v(6) v(7) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.pro b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.pro deleted file mode 100644 index a38bf27..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 15 April 2013 04:08:24 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.proj b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.proj deleted file mode 100644 index 9978f31..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example3.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.sch b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.sch deleted file mode 100644 index 4138df7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.sch +++ /dev/null @@ -1,186 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 04:09:27 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example3.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5000 2650 -$Comp -L VPLOT8_1 U3 -U 1 1 516BD8B9 -P 5300 2650 -F 0 "U3" H 5150 2750 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 2750 50 0000 C CNN - 1 5300 2650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516BD8AC -P 5300 3450 -F 0 "U3" H 5150 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 3550 50 0000 C CNN - 2 5300 3450 - 0 1 1 0 -$EndComp -Wire Wire Line - 5900 2550 5900 1050 -Wire Wire Line - 4400 4300 4400 3050 -Wire Wire Line - 5000 3800 5000 3250 -Wire Wire Line - 5000 2050 5000 1550 -Connection ~ 5000 5450 -Wire Wire Line - 4400 5450 5900 5450 -Wire Wire Line - 5900 1050 5000 1050 -Wire Wire Line - 4400 3050 4700 3050 -Wire Wire Line - 4400 5450 4400 5200 -Wire Wire Line - 5000 4950 5000 5750 -Connection ~ 5000 5600 -Connection ~ 5000 3450 -Wire Wire Line - 5000 2550 5000 2850 -Wire Wire Line - 5000 4300 5000 4450 -Wire Wire Line - 5900 5450 5900 3450 -$Comp -L IPLOT U2 -U 1 1 516BD643 -P 5000 4050 -F 0 "U2" H 4850 4150 50 0000 C CNN -F 1 "IPLOT" H 5150 4150 50 0000 C CNN - 1 5000 4050 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516BD5F9 -P 5000 2300 -F 0 "U1" H 4850 2400 50 0000 C CNN -F 1 "IPLOT" H 5150 2400 50 0000 C CNN - 1 5000 2300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5166BF83 -P 5000 5600 -F 0 "#FLG01" H 5000 5695 30 0001 C CNN -F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN - 1 5000 5600 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166BF64 -P 5000 5750 -F 0 "#PWR02" H 5000 5750 30 0001 C CNN -F 1 "GND" H 5000 5680 30 0001 C CNN - 1 5000 5750 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166BEE6 -P 4400 4750 -F 0 "v1" H 4200 4850 60 0000 C CNN -F 1 "4" H 4200 4700 60 0000 C CNN -F 2 "R1" H 4100 4750 60 0000 C CNN - 1 4400 4750 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5166BED7 -P 5900 3000 -F 0 "v2" H 5700 3100 60 0000 C CNN -F 1 "10V" H 5700 2950 60 0000 C CNN -F 2 "R1" H 5600 3000 60 0000 C CNN - 1 5900 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166BE96 -P 5000 4700 -F 0 "R2" V 5080 4700 50 0000 C CNN -F 1 "3300" V 5000 4700 50 0000 C CNN - 1 5000 4700 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166BE8E -P 5000 1300 -F 0 "R1" V 5080 1300 50 0000 C CNN -F 1 "4700" V 5000 1300 50 0000 C CNN - 1 5000 1300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166BE53 -P 4900 3050 -F 0 "Q1" H 4900 2900 50 0000 R CNN -F 1 "NPN" H 4900 3200 50 0000 R CNN - 1 4900 3050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/analysis deleted file mode 100644 index 395e205..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v2 0e-00 15e-00 15e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.bak deleted file mode 100644 index 3c23bc8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.bak +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 06:57:20 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.lib deleted file mode 100644 index b1e32d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 06:59:23 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.bak deleted file mode 100644 index 9b63b41..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.bak +++ /dev/null @@ -1,154 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 06:57:20 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5750 5350 5750 5950 -Connection ~ 4300 4400 -Connection ~ 5750 4100 -Wire Wire Line - 4300 4500 4300 4400 -Wire Wire Line - 4300 4400 5450 4400 -Connection ~ 4750 4400 -Wire Wire Line - 4750 4600 4750 4050 -Wire Wire Line - 4750 3150 4750 2750 -Wire Wire Line - 4750 2750 5750 2750 -Wire Wire Line - 5750 4600 5750 4850 -Wire Wire Line - 4750 5500 4750 5950 -Wire Wire Line - 4750 5950 5750 5950 -Wire Wire Line - 5750 4200 5750 3250 -$Comp -L DC v1 -U 1 1 517A27AF -P 4750 3600 -F 0 "v1" H 4550 3700 60 0000 C CNN -F 1 "DC" H 4550 3550 60 0000 C CNN -F 2 "R1" H 4450 3600 60 0000 C CNN - 1 4750 3600 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 517A278C -P 4750 5050 -F 0 "v2" H 4550 5150 60 0000 C CNN -F 1 "DC" H 4550 5000 60 0000 C CNN -F 2 "R1" H 4450 5050 60 0000 C CNN - 1 4750 5050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5178C864 -P 6050 4100 -F 0 "U1" H 5900 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 6200 4200 50 0000 C CNN - 1 6050 4100 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 5178C812 -P 5650 4400 -F 0 "Q1" H 5650 4250 50 0000 R CNN -F 1 "NPN" H 5650 4550 50 0000 R CNN - 1 5650 4400 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516BDAF0 -P 4300 4400 -F 0 "#FLG01" H 4300 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4300 4630 30 0000 C CNN - 1 4300 4400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516BDAE0 -P 4300 4500 -F 0 "#PWR02" H 4300 4500 30 0001 C CNN -F 1 "GND" H 4300 4430 30 0001 C CNN - 1 4300 4500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516BD9B5 -P 5750 3000 -F 0 "R1" V 5830 3000 50 0000 C CNN -F 1 "5k" V 5750 3000 50 0000 C CNN - 1 5750 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516BD9A9 -P 5750 5100 -F 0 "R2" V 5850 5100 50 0000 C CNN -F 1 "7.07k" V 5750 5100 50 0000 C CNN - 1 5750 5100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir deleted file mode 100644 index bdacb65..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 15 May 2013 06:59:18 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 4 3 IPLOT -v1 1 0 DC -v2 0 5 DC -U1 3 VPLOT8_1 -Q1 2 0 3 NPN -R1 1 4 5k -R2 2 5 7.07k - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt deleted file mode 100644 index 055c4d2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 06:59:18 pm ist -.include npn.lib - -V_u2 4 3 0 -v1 1 0 dc 15 -v2 0 5 dc 15 -* Plotting option vplot8_1 -q1 3 0 2 npn -r1 1 4 5k -r2 2 5 7.07k - -.dc v2 0e-00 15e-00 15e-00 -.plot i(V_u2) -.plot v(3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out deleted file mode 100644 index 17c61c2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 06:59:18 pm ist -.include npn.lib - -V_u2 4 3 0 -v1 1 0 dc 15 -v2 0 5 dc 15 -* Plotting option vplot8_1 -q1 3 0 2 npn -r1 1 4 5k -r2 2 5 7.07k - -.dc v2 0e-00 15e-00 15e-00 - -* Control Statements -.control -run -plot i(V_u2) -plot v(3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro deleted file mode 100644 index 5bf994d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 04:46:53 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj deleted file mode 100644 index 3a2ba21..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.1.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch deleted file mode 100644 index 7873ea6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch +++ /dev/null @@ -1,165 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 06:59:23 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5750 4200 5750 3850 -Wire Wire Line - 5750 5350 5750 5950 -Connection ~ 4300 4400 -Connection ~ 5750 4100 -Wire Wire Line - 4300 4500 4300 4400 -Wire Wire Line - 4300 4400 5450 4400 -Connection ~ 4750 4400 -Wire Wire Line - 4750 4600 4750 4050 -Wire Wire Line - 4750 3150 4750 2750 -Wire Wire Line - 4750 2750 5750 2750 -Wire Wire Line - 5750 4600 5750 4850 -Wire Wire Line - 4750 5500 4750 5950 -Wire Wire Line - 4750 5950 5750 5950 -Wire Wire Line - 5750 3250 5750 3350 -$Comp -L IPLOT U2 -U 1 1 51938D87 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "IPLOT" H 5900 3700 50 0000 C CNN - 1 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 517A27AF -P 4750 3600 -F 0 "v1" H 4550 3700 60 0000 C CNN -F 1 "DC" H 4550 3550 60 0000 C CNN -F 2 "R1" H 4450 3600 60 0000 C CNN - 1 4750 3600 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 517A278C -P 4750 5050 -F 0 "v2" H 4550 5150 60 0000 C CNN -F 1 "DC" H 4550 5000 60 0000 C CNN -F 2 "R1" H 4450 5050 60 0000 C CNN - 1 4750 5050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5178C864 -P 6050 4100 -F 0 "U1" H 5900 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 6200 4200 50 0000 C CNN - 1 6050 4100 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 5178C812 -P 5650 4400 -F 0 "Q1" H 5650 4250 50 0000 R CNN -F 1 "NPN" H 5650 4550 50 0000 R CNN - 1 5650 4400 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 516BDAF0 -P 4300 4400 -F 0 "#FLG1" H 4300 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4300 4630 30 0000 C CNN - 1 4300 4400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516BDAE0 -P 4300 4500 -F 0 "#PWR1" H 4300 4500 30 0001 C CNN -F 1 "GND" H 4300 4430 30 0001 C CNN - 1 4300 4500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516BD9B5 -P 5750 3000 -F 0 "R1" V 5830 3000 50 0000 C CNN -F 1 "5k" V 5750 3000 50 0000 C CNN - 1 5750 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516BD9A9 -P 5750 5100 -F 0 "R2" V 5850 5100 50 0000 C CNN -F 1 "7.07k" V 5750 5100 50 0000 C CNN - 1 5750 5100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/npn.lib deleted file mode 100644 index 1ff6b05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 -+ Is=6.734f Eg=1.11 ) diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/analysis deleted file mode 100644 index bd0d4e6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 15e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib deleted file mode 100644 index a66f15e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 10:01:35 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir deleted file mode 100644 index 6cc7243..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 10:01:31 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 1 3 7 VPLOT8_1 -R2 1 0 50000 -R1 5 1 100000 -R4 4 0 3000 -U4 7 4 IPLOT -v1 5 0 15V -U3 6 3 IPLOT -R3 5 6 5000 -Q1 7 1 3 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt deleted file mode 100644 index 6b82c7f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:01:31 pm ist - -* Plotting option vplot8_1 -r2 1 0 50000 -r1 5 1 100000 -r4 4 0 3000 -V_u4 7 4 0 -v1 5 0 15v -V_u3 6 3 0 -r3 5 6 5000 -q1 3 1 7 npn - -.dc v1 0e-00 15e-00 5e-03 -.plot v(1) v(3) v(7) -.plot i(V_u4) -.plot i(V_u3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out deleted file mode 100644 index 0e51a81..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:01:31 pm ist - -* Plotting option vplot8_1 -r2 1 0 50000 -r1 5 1 100000 -r4 4 0 3000 -V_u4 7 4 0 -v1 5 0 15v -V_u3 6 3 0 -r3 5 6 5000 -q1 3 1 7 npn - -.dc v1 0e-00 15e-00 5e-03 - -* Control Statements -.control -run -plot v(1) v(3) v(7) -plot i(V_u4) -plot i(V_u3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro deleted file mode 100644 index 78f9f3c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 09:51:55 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj deleted file mode 100644 index 6fef01d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.10.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch deleted file mode 100644 index 54adb65..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch +++ /dev/null @@ -1,209 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 10:01:35 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5050 3350 4200 3350 -Wire Wire Line - 6850 2850 6850 1300 -Wire Wire Line - 6850 1300 4200 1300 -Wire Wire Line - 4200 1300 4200 2200 -Connection ~ 4200 3350 -Wire Wire Line - 4200 2700 4200 3800 -Wire Wire Line - 6850 3750 6850 5150 -Wire Wire Line - 5350 3550 5350 3750 -Wire Wire Line - 5350 2050 5350 2250 -Wire Wire Line - 5350 1550 5350 1300 -Wire Wire Line - 5350 2750 5350 3150 -Wire Wire Line - 5350 4250 5350 4400 -Wire Wire Line - 4200 4300 4200 5150 -Wire Wire Line - 4200 5150 6850 5150 -Connection ~ 5350 5150 -Connection ~ 5350 1300 -Wire Wire Line - 5350 5650 5350 4900 -Connection ~ 5350 5500 -Connection ~ 5350 3650 -Connection ~ 5350 2900 -Connection ~ 5000 3350 -$Comp -L VPLOT8_1 U2 -U 3 1 516C2B0C -P 5650 3650 -F 0 "U2" H 5500 3750 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3750 50 0000 C CNN - 3 5650 3650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C2B05 -P 5650 2900 -F 0 "U2" H 5500 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3000 50 0000 C CNN - 2 5650 2900 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C2AFE -P 5000 3050 -F 0 "U2" H 4850 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5150 3150 50 0000 C CNN - 1 5000 3050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C2AB7 -P 5350 5500 -F 0 "#FLG01" H 5350 5770 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 5730 30 0000 C CNN - 1 5350 5500 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C2AAB -P 5350 5650 -F 0 "#PWR02" H 5350 5650 30 0001 C CNN -F 1 "GND" H 5350 5580 30 0001 C CNN - 1 5350 5650 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516C2A3E -P 4200 4050 -F 0 "R2" V 4280 4050 50 0000 C CNN -F 1 "50000" V 4200 4050 50 0000 C CNN - 1 4200 4050 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C2A13 -P 4200 2450 -F 0 "R1" V 4280 2450 50 0000 C CNN -F 1 "100000" V 4200 2450 50 0000 C CNN - 1 4200 2450 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 516C29D9 -P 5350 4650 -F 0 "R4" V 5430 4650 50 0000 C CNN -F 1 "3000" V 5350 4650 50 0000 C CNN - 1 5350 4650 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C29CD -P 5350 4000 -F 0 "U4" H 5200 4100 50 0000 C CNN -F 1 "IPLOT" H 5500 4100 50 0000 C CNN - 1 5350 4000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C296E -P 6850 3300 -F 0 "v1" H 6650 3400 60 0000 C CNN -F 1 "15V" H 6650 3250 60 0000 C CNN -F 2 "R1" H 6550 3300 60 0000 C CNN - 1 6850 3300 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C2958 -P 5350 2500 -F 0 "U3" H 5200 2600 50 0000 C CNN -F 1 "IPLOT" H 5500 2600 50 0000 C CNN - 1 5350 2500 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C293A -P 5350 1800 -F 0 "R3" V 5430 1800 50 0000 C CNN -F 1 "5000" V 5350 1800 50 0000 C CNN - 1 5350 1800 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C2934 -P 5250 3350 -F 0 "Q1" H 5250 3200 50 0000 R CNN -F 1 "NPN" H 5250 3500 50 0000 R CNN - 1 5250 3350 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/analysis deleted file mode 100644 index bd0d4e6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 15e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib deleted file mode 100644 index c412639..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib +++ /dev/null @@ -1,127 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 10:18:23 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir deleted file mode 100644 index 72eb140..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir +++ /dev/null @@ -1,23 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 10:18:19 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U4 11 VPLOT8_1 -R1 7 11 100000 -U3 1 4 6 5 VPLOT8_1 -R5 7 3 2000 -U5 3 6 IPLOT -R6 2 0 2700 -U6 5 2 IPLOT -R4 10 0 3000 -U2 4 10 IPLOT -R3 7 9 5000 -U1 9 1 IPLOT -v1 7 0 DC -R2 11 0 50000 -Q2 6 1 5 PNP -Q1 4 11 1 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.ckt deleted file mode 100644 index 5e6583e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.ckt +++ /dev/null @@ -1,26 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:18:19 pm ist - -* Plotting option vplot8_1 -r1 7 11 100000 -* Plotting option vplot8_1 -r5 7 3 2000 -V_u5 3 6 0 -r6 2 0 2700 -V_u6 5 2 0 -r4 10 0 3000 -V_u2 4 10 0 -r3 7 9 5000 -V_u1 9 1 0 -v1 7 0 dc 15 -r2 11 0 50000 -q2 5 1 6 pnp -q1 1 11 4 npn - -.dc v1 0e-00 15e-00 5e-03 -.plot v(11) -.plot v(1) v(4) v(6) v(5) -.plot i(V_u5) -.plot i(V_u6) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.out deleted file mode 100644 index 1a2f17d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.out +++ /dev/null @@ -1,31 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:18:19 pm ist - -* Plotting option vplot8_1 -r1 7 11 100000 -* Plotting option vplot8_1 -r5 7 3 2000 -V_u5 3 6 0 -r6 2 0 2700 -V_u6 5 2 0 -r4 10 0 3000 -V_u2 4 10 0 -r3 7 9 5000 -V_u1 9 1 0 -v1 7 0 dc 15 -r2 11 0 50000 -q2 5 1 6 pnp -q1 1 11 4 npn - -.dc v1 0e-00 15e-00 5e-03 - -* Control Statements -.control -run -plot v(11) -plot v(1) v(4) v(6) v(5) -plot i(V_u5) -plot i(V_u6) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.pro deleted file mode 100644 index 9c11e90..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 10:04:33 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.proj deleted file mode 100644 index 1bbfadb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.11.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.sch deleted file mode 100644 index 766b40d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.sch +++ /dev/null @@ -1,295 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 10:18:23 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5150 3800 -$Comp -L VPLOT8_1 U4 -U 1 1 516C2F31 -P 5150 4100 -F 0 "U4" H 5000 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5300 4200 50 0000 C CNN - 1 5150 4100 - -1 0 0 1 -$EndComp -Wire Wire Line - 7350 3200 6700 3200 -Connection ~ 4600 1600 -Wire Wire Line - 3350 3150 3350 1600 -Wire Wire Line - 3350 1600 7650 1600 -Wire Wire Line - 4600 5600 4600 4950 -Connection ~ 5750 1600 -Wire Wire Line - 4600 1600 4600 2100 -Wire Wire Line - 5450 3800 4600 3800 -Connection ~ 5750 3400 -Wire Wire Line - 6700 3200 6700 3400 -Wire Wire Line - 6700 3400 5750 3400 -Wire Wire Line - 7650 2100 7650 2250 -Wire Wire Line - 7650 3400 7650 3700 -Wire Wire Line - 5750 4900 5750 5100 -Wire Wire Line - 5750 2750 5750 2600 -Wire Wire Line - 5750 3600 5750 3250 -Wire Wire Line - 5750 4000 5750 4400 -Wire Wire Line - 7650 4200 7650 4350 -Wire Wire Line - 7650 4850 7650 5600 -Connection ~ 7650 5600 -Wire Wire Line - 7650 3000 7650 2750 -Wire Wire Line - 5750 1600 5750 2100 -Wire Wire Line - 4600 4450 4600 2600 -Connection ~ 4600 3800 -Wire Wire Line - 6450 5600 6450 5900 -Connection ~ 6450 5600 -Wire Wire Line - 3350 4050 3350 5600 -Wire Wire Line - 3350 5600 7650 5600 -Connection ~ 4600 5600 -Connection ~ 6450 5750 -Connection ~ 5750 3500 -Connection ~ 5750 4250 -Connection ~ 7650 2900 -Connection ~ 7650 3550 -Connection ~ 5750 5600 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C2ECC -P 6450 5750 -F 0 "#FLG01" H 6450 6020 30 0001 C CNN -F 1 "PWR_FLAG" H 6450 5980 30 0000 C CNN - 1 6450 5750 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C2EBF -P 6450 5900 -F 0 "#PWR02" H 6450 5900 30 0001 C CNN -F 1 "GND" H 6450 5830 30 0001 C CNN - 1 6450 5900 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C2DFD -P 4600 2350 -F 0 "R1" V 4680 2350 50 0000 C CNN -F 1 "100000" V 4600 2350 50 0000 C CNN - 1 4600 2350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 3 1 516C2DD6 -P 7950 2900 -F 0 "U3" H 7800 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 8100 3000 50 0000 C CNN - 3 7950 2900 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 4 1 516C2DD0 -P 7950 3550 -F 0 "U3" H 7800 3650 50 0000 C CNN -F 1 "VPLOT8_1" H 8100 3650 50 0000 C CNN - 4 7950 3550 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516C2DCC -P 6050 4250 -F 0 "U3" H 5900 4350 50 0000 C CNN -F 1 "VPLOT8_1" H 6200 4350 50 0000 C CNN - 2 6050 4250 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C2DC4 -P 6050 3500 -F 0 "U3" H 5900 3600 50 0000 C CNN -F 1 "VPLOT8_1" H 6200 3600 50 0000 C CNN - 1 6050 3500 - 0 1 1 0 -$EndComp -$Comp -L R R5 -U 1 1 516C2D81 -P 7650 1850 -F 0 "R5" V 7730 1850 50 0000 C CNN -F 1 "2000" V 7650 1850 50 0000 C CNN - 1 7650 1850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U5 -U 1 1 516C2D75 -P 7650 2500 -F 0 "U5" H 7500 2600 50 0000 C CNN -F 1 "IPLOT" H 7800 2600 50 0000 C CNN - 1 7650 2500 - 0 1 1 0 -$EndComp -$Comp -L R R6 -U 1 1 516C2D45 -P 7650 4600 -F 0 "R6" V 7730 4600 50 0000 C CNN -F 1 "2700" V 7650 4600 50 0000 C CNN - 1 7650 4600 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U6 -U 1 1 516C2D2F -P 7650 3950 -F 0 "U6" H 7500 4050 50 0000 C CNN -F 1 "IPLOT" H 7800 4050 50 0000 C CNN - 1 7650 3950 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 516C2CD2 -P 5750 5350 -F 0 "R4" V 5830 5350 50 0000 C CNN -F 1 "3000" V 5750 5350 50 0000 C CNN - 1 5750 5350 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C2CC9 -P 5750 4650 -F 0 "U2" H 5600 4750 50 0000 C CNN -F 1 "IPLOT" H 5900 4750 50 0000 C CNN - 1 5750 4650 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C2CA0 -P 5750 2350 -F 0 "R3" V 5830 2350 50 0000 C CNN -F 1 "5000" V 5750 2350 50 0000 C CNN - 1 5750 2350 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C2C8D -P 5750 3000 -F 0 "U1" H 5600 3100 50 0000 C CNN -F 1 "IPLOT" H 5900 3100 50 0000 C CNN - 1 5750 3000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C2C6F -P 3350 3600 -F 0 "v1" H 3150 3700 60 0000 C CNN -F 1 "DC" H 3150 3550 60 0000 C CNN -F 2 "R1" H 3050 3600 60 0000 C CNN - 1 3350 3600 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516C2C49 -P 4600 4700 -F 0 "R2" V 4680 4700 50 0000 C CNN -F 1 "50000" V 4600 4700 50 0000 C CNN - 1 4600 4700 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q2 -U 1 1 516C2C3A -P 7550 3200 -F 0 "Q2" H 7550 3050 60 0000 R CNN -F 1 "PNP" H 7550 3350 60 0000 R CNN - 1 7550 3200 - 1 0 0 1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C2C30 -P 5650 3800 -F 0 "Q1" H 5650 3650 50 0000 R CNN -F 1 "NPN" H 5650 3950 50 0000 R CNN - 1 5650 3800 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/analysis deleted file mode 100644 index aa8d005..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v3 0e-00 5e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.bak deleted file mode 100644 index e34974d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 11:09:27 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.lib deleted file mode 100644 index b975094..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:31:57 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.bak deleted file mode 100644 index 99334cc..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.bak +++ /dev/null @@ -1,207 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:09:27 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.12-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4900 3850 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE3EB -P 4900 3850 -F 0 "#FLG01" H 4900 3945 30 0001 C CNN -F 1 "PWR_FLAG" H 4900 4030 30 0000 C CNN - 1 4900 3850 - 1 0 0 -1 -$EndComp -Wire Wire Line - 3850 4950 3850 3850 -Wire Wire Line - 6650 4100 6650 5950 -Wire Wire Line - 5350 3400 5350 3450 -Wire Wire Line - 3850 5850 3850 5950 -Wire Wire Line - 3850 5950 6650 5950 -Connection ~ 5050 3850 -Wire Wire Line - 4700 3850 5050 3850 -Wire Wire Line - 5700 4100 5350 4100 -Connection ~ 5350 4100 -Connection ~ 6500 4100 -Wire Wire Line - 6500 2550 5350 2550 -Wire Wire Line - 5350 2550 5350 3000 -Wire Wire Line - 5350 4900 5350 4600 -Wire Wire Line - 5350 5300 5350 5850 -Wire Wire Line - 5350 5850 6500 5850 -Wire Wire Line - 6750 4100 6200 4100 -Connection ~ 6650 4100 -Wire Wire Line - 3850 3850 4200 3850 -Wire Wire Line - 5050 5100 5050 3200 -Wire Wire Line - 5350 4100 5350 3950 -Wire Wire Line - 6500 4950 6500 3450 -$Comp -L IPLOT U1 -U 1 1 516C3068 -P 5350 3700 -F 0 "U1" H 5200 3800 50 0000 C CNN -F 1 "IPLOT" H 5500 3800 50 0000 C CNN - 1 5350 3700 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C304B -P 5350 4350 -F 0 "U2" H 5200 4450 50 0000 C CNN -F 1 "IPLOT" H 5500 4450 50 0000 C CNN - 1 5350 4350 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 5166EE0B -P 3850 5400 -F 0 "v3" H 3650 5500 60 0000 C CNN -F 1 "5V" H 3650 5350 60 0000 C CNN -F 2 "R1" H 3550 5400 60 0000 C CNN - 1 3850 5400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166ED91 -P 4450 3850 -F 0 "R2" V 4530 3850 50 0000 C CNN -F 1 "10000" V 4450 3850 50 0000 C CNN - 1 4450 3850 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 5166ED50 -P 6650 4100 -F 0 "#FLG02" H 6650 4195 30 0001 C CNN -F 1 "PWR_FLAG" H 6650 4280 30 0000 C CNN - 1 6650 4100 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166ED33 -P 6750 4100 -F 0 "#PWR03" H 6750 4100 30 0001 C CNN -F 1 "GND" H 6750 4030 30 0001 C CNN - 1 6750 4100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166ED03 -P 5950 4100 -F 0 "R1" V 6030 4100 50 0000 C CNN -F 1 "1000" V 5950 4100 50 0000 C CNN - 1 5950 4100 - 0 -1 -1 0 -$EndComp -$Comp -L DC v2 -U 1 1 5166ECC4 -P 6500 5400 -F 0 "v2" H 6300 5500 60 0000 C CNN -F 1 "5V" H 6300 5350 60 0000 C CNN -F 2 "R1" H 6200 5400 60 0000 C CNN - 1 6500 5400 - -1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166EC91 -P 6500 3000 -F 0 "v1" H 6300 3100 60 0000 C CNN -F 1 "5V" H 6300 2950 60 0000 C CNN -F 2 "R1" H 6200 3000 60 0000 C CNN - 1 6500 3000 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q2 -U 1 1 5166EC64 -P 5250 5100 -F 0 "Q2" H 5250 4950 60 0000 R CNN -F 1 "PNP" H 5250 5250 60 0000 R CNN - 1 5250 5100 - 1 0 0 1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166EC56 -P 5250 3200 -F 0 "Q1" H 5250 3050 50 0000 R CNN -F 1 "NPN" H 5250 3350 50 0000 R CNN - 1 5250 3200 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir deleted file mode 100644 index 1961478..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:31:53 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 5 1 IPLOT -U1 3 8 IPLOT -U2 1 7 IPLOT -v3 4 0 5V -R2 4 2 10000 -R1 5 0 1000 -v2 0 6 5V -v1 3 0 5V -Q2 7 2 6 PNP -Q1 1 2 8 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt deleted file mode 100644 index 2283488..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:31:53 pm ist - -V_u3 5 1 0 -V_u1 3 8 0 -V_u2 1 7 0 -v3 4 0 5v -r2 4 2 10000 -r1 5 0 1000 -v2 0 6 5v -v1 3 0 5v -q2 6 2 7 pnp -q1 8 2 1 npn - -.dc v3 0e-00 5e-00 1e-00 -.plot i(V_u3) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out deleted file mode 100644 index 61a3934..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:31:53 pm ist - -V_u3 5 1 0 -V_u1 3 8 0 -V_u2 1 7 0 -v3 4 0 5v -r2 4 2 10000 -r1 5 0 1000 -v2 0 6 5v -v1 3 0 5v -q2 6 2 7 pnp -q1 8 2 1 npn - -.dc v3 0e-00 5e-00 1e-00 - -* Control Statements -.control -run -plot i(V_u3) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro deleted file mode 100644 index d4fedff..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 15 April 2013 10:21:09 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj deleted file mode 100644 index cf8b515..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.12.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch deleted file mode 100644 index a133513..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch +++ /dev/null @@ -1,222 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 01:31:57 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.12-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5350 4000 -Connection ~ 6300 4100 -Wire Wire Line - 6300 4350 6300 4100 -Wire Wire Line - 5350 3400 5350 4100 -Wire Wire Line - 4950 2500 4950 2550 -Wire Wire Line - 4950 2550 6500 2550 -Wire Wire Line - 6500 4950 6500 3450 -Wire Wire Line - 5050 5100 5050 3200 -Wire Wire Line - 4200 3850 3850 3850 -Connection ~ 6650 4100 -Wire Wire Line - 6750 4100 6200 4100 -Wire Wire Line - 6500 5850 5350 5850 -Wire Wire Line - 5350 5850 5350 5300 -Wire Wire Line - 5350 4900 5350 4600 -Connection ~ 6500 4100 -Connection ~ 5350 4100 -Wire Wire Line - 4700 3850 5050 3850 -Connection ~ 5050 3850 -Wire Wire Line - 3850 5950 6650 5950 -Wire Wire Line - 3850 5950 3850 5850 -Wire Wire Line - 6650 5950 6650 4100 -Wire Wire Line - 3850 3850 3850 4950 -Connection ~ 4900 3850 -Wire Wire Line - 4950 3000 5350 3000 -Wire Wire Line - 5850 4000 5850 4350 -Wire Wire Line - 5850 4350 5800 4350 -$Comp -L IPLOT U3 -U 1 1 51909DB6 -P 5600 4000 -F 0 "U3" H 5450 4100 50 0000 C CNN -F 1 "IPLOT" H 5750 4100 50 0000 C CNN - 1 5600 4000 - -1 0 0 1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE3EB -P 4900 3850 -F 0 "#FLG01" H 4900 3945 30 0001 C CNN -F 1 "PWR_FLAG" H 4900 4030 30 0000 C CNN - 1 4900 3850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C3068 -P 4950 2750 -F 0 "U1" H 4800 2850 50 0000 C CNN -F 1 "IPLOT" H 5100 2850 50 0000 C CNN - 1 4950 2750 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C304B -P 5350 4350 -F 0 "U2" H 5200 4450 50 0000 C CNN -F 1 "IPLOT" H 5500 4450 50 0000 C CNN - 1 5350 4350 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 5166EE0B -P 3850 5400 -F 0 "v3" H 3650 5500 60 0000 C CNN -F 1 "5V" H 3650 5350 60 0000 C CNN -F 2 "R1" H 3550 5400 60 0000 C CNN - 1 3850 5400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166ED91 -P 4450 3850 -F 0 "R2" V 4530 3850 50 0000 C CNN -F 1 "10000" V 4450 3850 50 0000 C CNN - 1 4450 3850 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 5166ED50 -P 6650 4100 -F 0 "#FLG02" H 6650 4195 30 0001 C CNN -F 1 "PWR_FLAG" H 6650 4280 30 0000 C CNN - 1 6650 4100 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166ED33 -P 6750 4100 -F 0 "#PWR03" H 6750 4100 30 0001 C CNN -F 1 "GND" H 6750 4030 30 0001 C CNN - 1 6750 4100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166ED03 -P 6050 4350 -F 0 "R1" V 6130 4350 50 0000 C CNN -F 1 "1000" V 6050 4350 50 0000 C CNN - 1 6050 4350 - 0 -1 -1 0 -$EndComp -$Comp -L DC v2 -U 1 1 5166ECC4 -P 6500 5400 -F 0 "v2" H 6300 5500 60 0000 C CNN -F 1 "5V" H 6300 5350 60 0000 C CNN -F 2 "R1" H 6200 5400 60 0000 C CNN - 1 6500 5400 - -1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166EC91 -P 6500 3000 -F 0 "v1" H 6300 3100 60 0000 C CNN -F 1 "5V" H 6300 2950 60 0000 C CNN -F 2 "R1" H 6200 3000 60 0000 C CNN - 1 6500 3000 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q2 -U 1 1 5166EC64 -P 5250 5100 -F 0 "Q2" H 5250 4950 60 0000 R CNN -F 1 "PNP" H 5250 5250 60 0000 R CNN - 1 5250 5100 - 1 0 0 1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166EC56 -P 5250 3200 -F 0 "Q1" H 5250 3050 50 0000 R CNN -F 1 "NPN" H 5250 3350 50 0000 R CNN - 1 5250 3200 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/analysis deleted file mode 100644 index 11459c7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 12e-00 12e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13-cache.lib deleted file mode 100644 index efa56af..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 11:31:21 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak deleted file mode 100644 index db1ff38..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak +++ /dev/null @@ -1,210 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:16:49 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.10-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5050 3350 4200 3350 -Wire Wire Line - 6850 2850 6850 1300 -Wire Wire Line - 6850 1300 4200 1300 -Wire Wire Line - 4200 1300 4200 2200 -Connection ~ 4200 3350 -Wire Wire Line - 4200 2700 4200 3800 -Wire Wire Line - 6850 3750 6850 5150 -Wire Wire Line - 5350 3550 5350 3750 -Wire Wire Line - 5350 2050 5350 2250 -Wire Wire Line - 5350 1550 5350 1300 -Wire Wire Line - 5350 2750 5350 3150 -Wire Wire Line - 5350 4250 5350 4400 -Wire Wire Line - 4200 4300 4200 5150 -Wire Wire Line - 4200 5150 6850 5150 -Connection ~ 5350 5150 -Connection ~ 5350 1300 -Wire Wire Line - 5350 5650 5350 4900 -Connection ~ 5350 5500 -Connection ~ 5350 3650 -Connection ~ 5350 2900 -Connection ~ 5000 3350 -$Comp -L VPLOT8_1 U2 -U 3 1 516C2B0C -P 5650 3650 -F 0 "U2" H 5500 3750 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3750 50 0000 C CNN - 3 5650 3650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C2B05 -P 5650 2900 -F 0 "U2" H 5500 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3000 50 0000 C CNN - 2 5650 2900 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C2AFE -P 5000 3050 -F 0 "U2" H 4850 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5150 3150 50 0000 C CNN - 1 5000 3050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C2AB7 -P 5350 5500 -F 0 "#FLG01" H 5350 5770 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 5730 30 0000 C CNN - 1 5350 5500 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C2AAB -P 5350 5650 -F 0 "#PWR02" H 5350 5650 30 0001 C CNN -F 1 "GND" H 5350 5580 30 0001 C CNN - 1 5350 5650 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516C2A3E -P 4200 4050 -F 0 "R2" V 4280 4050 50 0000 C CNN -F 1 "50000" V 4200 4050 50 0000 C CNN - 1 4200 4050 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C2A13 -P 4200 2450 -F 0 "R1" V 4280 2450 50 0000 C CNN -F 1 "100000" V 4200 2450 50 0000 C CNN - 1 4200 2450 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 516C29D9 -P 5350 4650 -F 0 "R4" V 5430 4650 50 0000 C CNN -F 1 "3000" V 5350 4650 50 0000 C CNN - 1 5350 4650 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C29CD -P 5350 4000 -F 0 "U4" H 5200 4100 50 0000 C CNN -F 1 "IPLOT" H 5500 4100 50 0000 C CNN - 1 5350 4000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C296E -P 6850 3300 -F 0 "v1" H 6650 3400 60 0000 C CNN -F 1 "15V" H 6650 3250 60 0000 C CNN -F 2 "R1" H 6550 3300 60 0000 C CNN - 1 6850 3300 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C2958 -P 5350 2500 -F 0 "U3" H 5200 2600 50 0000 C CNN -F 1 "IPLOT" H 5500 2600 50 0000 C CNN - 1 5350 2500 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C293A -P 5350 1800 -F 0 "R3" V 5430 1800 50 0000 C CNN -F 1 "5000" V 5350 1800 50 0000 C CNN - 1 5350 1800 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C2934 -P 5250 3350 -F 0 "Q1" H 5250 3200 50 0000 R CNN -F 1 "NPN" H 5250 3500 50 0000 R CNN - 1 5250 3350 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir deleted file mode 100644 index 2015439..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 11:31:17 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R1 5 7 80000 -U2 7 2 1 VPLOT8_1 -R2 7 0 40000 -R4 4 0 3300 -U4 1 4 IPLOT -v1 5 0 12V -U3 6 2 IPLOT -R3 5 6 4000 -Q1 1 7 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt deleted file mode 100644 index cc4fac4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 11:31:17 am ist - -r1 5 7 80000 -* Plotting option vplot8_1 -r2 7 0 40000 -r4 4 0 3300 -V_u4 1 4 0 -v1 5 0 12v -V_u3 6 2 0 -r3 5 6 4000 -q1 2 7 1 npn - -.dc v1 0e-00 12e-00 12e-03 -.plot v(7) v(2) v(1) -.plot i(V_u4) -.plot i(V_u3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.out deleted file mode 100644 index d5ce68a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 11:31:17 am ist - -r1 5 7 80000 -* Plotting option vplot8_1 -r2 7 0 40000 -r4 4 0 3300 -V_u4 1 4 0 -v1 5 0 12v -V_u3 6 2 0 -r3 5 6 4000 -q1 2 7 1 npn - -.dc v1 0e-00 12e-00 12e-03 - -* Control Statements -.control -run -plot v(7) v(2) v(1) -plot i(V_u4) -plot i(V_u3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.pro deleted file mode 100644 index 9ed7c71..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 11:12:52 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.proj deleted file mode 100644 index a04af44..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.13.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.sch deleted file mode 100644 index d0ef771..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.sch +++ /dev/null @@ -1,209 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:31:21 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L R R1 -U 1 1 516CE8DE -P 4200 2450 -F 0 "R1" V 4280 2450 50 0000 C CNN -F 1 "80000" V 4200 2450 50 0000 C CNN - 1 4200 2450 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5050 3350 4200 3350 -Wire Wire Line - 6850 2850 6850 1300 -Wire Wire Line - 6850 1300 4200 1300 -Wire Wire Line - 4200 1300 4200 2200 -Connection ~ 4200 3350 -Wire Wire Line - 4200 2700 4200 3800 -Wire Wire Line - 6850 3750 6850 5150 -Wire Wire Line - 5350 3550 5350 3750 -Wire Wire Line - 5350 2050 5350 2250 -Wire Wire Line - 5350 1550 5350 1300 -Wire Wire Line - 5350 2750 5350 3150 -Wire Wire Line - 5350 4250 5350 4400 -Wire Wire Line - 4200 4300 4200 5150 -Wire Wire Line - 4200 5150 6850 5150 -Connection ~ 5350 5150 -Connection ~ 5350 1300 -Wire Wire Line - 5350 5650 5350 4900 -Connection ~ 5350 5500 -Connection ~ 5350 3650 -Connection ~ 5350 2900 -Connection ~ 5000 3350 -$Comp -L VPLOT8_1 U2 -U 3 1 516C2B0C -P 5650 3650 -F 0 "U2" H 5500 3750 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3750 50 0000 C CNN - 3 5650 3650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C2B05 -P 5650 2900 -F 0 "U2" H 5500 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3000 50 0000 C CNN - 2 5650 2900 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C2AFE -P 5000 3050 -F 0 "U2" H 4850 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5150 3150 50 0000 C CNN - 1 5000 3050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C2AB7 -P 5350 5500 -F 0 "#FLG01" H 5350 5770 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 5730 30 0000 C CNN - 1 5350 5500 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C2AAB -P 5350 5650 -F 0 "#PWR02" H 5350 5650 30 0001 C CNN -F 1 "GND" H 5350 5580 30 0001 C CNN - 1 5350 5650 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516C2A3E -P 4200 4050 -F 0 "R2" V 4280 4050 50 0000 C CNN -F 1 "40000" V 4200 4050 50 0000 C CNN - 1 4200 4050 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 516C29D9 -P 5350 4650 -F 0 "R4" V 5430 4650 50 0000 C CNN -F 1 "3300" V 5350 4650 50 0000 C CNN - 1 5350 4650 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C29CD -P 5350 4000 -F 0 "U4" H 5200 4100 50 0000 C CNN -F 1 "IPLOT" H 5500 4100 50 0000 C CNN - 1 5350 4000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C296E -P 6850 3300 -F 0 "v1" H 6650 3400 60 0000 C CNN -F 1 "12V" H 6650 3250 60 0000 C CNN -F 2 "R1" H 6550 3300 60 0000 C CNN - 1 6850 3300 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C2958 -P 5350 2500 -F 0 "U3" H 5200 2600 50 0000 C CNN -F 1 "IPLOT" H 5500 2600 50 0000 C CNN - 1 5350 2500 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C293A -P 5350 1800 -F 0 "R3" V 5430 1800 50 0000 C CNN -F 1 "4000" V 5350 1800 50 0000 C CNN - 1 5350 1800 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C2934 -P 5250 3350 -F 0 "Q1" H 5250 3200 50 0000 R CNN -F 1 "NPN" H 5250 3500 50 0000 R CNN - 1 5250 3350 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/analysis deleted file mode 100644 index 6295799..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 5e-00 100e-00 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14-cache.lib deleted file mode 100644 index 4090ea9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14-cache.lib +++ /dev/null @@ -1,131 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:35:55 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak deleted file mode 100644 index 850e6be..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak +++ /dev/null @@ -1,227 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:42:22 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example3.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5000 5750 5000 4300 -Connection ~ 4550 3050 -Connection ~ 4650 3050 -Wire Wire Line - 4300 3050 4700 3050 -Wire Wire Line - 3800 3050 3700 3050 -Connection ~ 5000 2650 -Wire Wire Line - 5900 2550 5900 1050 -Wire Wire Line - 5000 3800 5000 3250 -Wire Wire Line - 5000 2050 5000 1550 -Connection ~ 5000 5450 -Wire Wire Line - 5900 1050 5000 1050 -Wire Wire Line - 2900 3050 3200 3050 -Wire Wire Line - 2900 5200 2900 5450 -Connection ~ 5000 5600 -Connection ~ 5000 3450 -Wire Wire Line - 5000 2550 5000 2850 -Wire Wire Line - 5900 3450 5900 5450 -Wire Wire Line - 2900 3950 2900 4300 -Wire Wire Line - 5900 5450 2900 5450 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CEB5B -P 4550 3050 -F 0 "#FLG01" H 4550 3145 30 0001 C CNN -F 1 "PWR_FLAG" H 4550 3230 30 0000 C CNN - 1 4550 3050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U5 -U 1 1 516CEB46 -P 4650 3350 -F 0 "U5" H 4500 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 4800 3450 50 0000 C CNN - 1 4650 3350 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CEB0E -P 4050 3050 -F 0 "U4" H 3900 3150 50 0000 C CNN -F 1 "IPLOT" H 4200 3150 50 0000 C CNN - 1 4050 3050 - -1 0 0 1 -$EndComp -$Comp -L R R2 -U 1 1 516CEAFA -P 3450 3050 -F 0 "R2" V 3530 3050 50 0000 C CNN -F 1 "100000" V 3450 3050 50 0000 C CNN - 1 3450 3050 - 0 1 1 0 -$EndComp -$Comp -L PULSE v3 -U 1 1 516CEAC5 -P 2900 3500 -F 0 "v3" H 2700 3600 60 0000 C CNN -F 1 "PULSE" H 2700 3450 60 0000 C CNN -F 2 "R1" H 2600 3500 60 0000 C CNN - 1 2900 3500 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516BD8B9 -P 5300 2650 -F 0 "U3" H 5150 2750 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 2750 50 0000 C CNN - 1 5300 2650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516BD8AC -P 5300 3450 -F 0 "U3" H 5150 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 3550 50 0000 C CNN - 2 5300 3450 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516BD643 -P 5000 4050 -F 0 "U2" H 4850 4150 50 0000 C CNN -F 1 "IPLOT" H 5150 4150 50 0000 C CNN - 1 5000 4050 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516BD5F9 -P 5000 2300 -F 0 "U1" H 4850 2400 50 0000 C CNN -F 1 "IPLOT" H 5150 2400 50 0000 C CNN - 1 5000 2300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 5166BF83 -P 5000 5600 -F 0 "#FLG02" H 5000 5695 30 0001 C CNN -F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN - 1 5000 5600 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166BF64 -P 5000 5750 -F 0 "#PWR03" H 5000 5750 30 0001 C CNN -F 1 "GND" H 5000 5680 30 0001 C CNN - 1 5000 5750 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166BEE6 -P 2900 4750 -F 0 "v1" H 2700 4850 60 0000 C CNN -F 1 "3V" H 2700 4700 60 0000 C CNN -F 2 "R1" H 2600 4750 60 0000 C CNN - 1 2900 4750 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5166BED7 -P 5900 3000 -F 0 "v2" H 5700 3100 60 0000 C CNN -F 1 "10V" H 5700 2950 60 0000 C CNN -F 2 "R1" H 5600 3000 60 0000 C CNN - 1 5900 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166BE8E -P 5000 1300 -F 0 "R1" V 5080 1300 50 0000 C CNN -F 1 "3000" V 5000 1300 50 0000 C CNN - 1 5000 1300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166BE53 -P 4900 3050 -F 0 "Q1" H 4900 2900 50 0000 R CNN -F 1 "NPN" H 4900 3200 50 0000 R CNN - 1 4900 3050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir deleted file mode 100644 index e9d15ad..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir +++ /dev/null @@ -1,20 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:35:51 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U6 8 VPLOT8_1 -U5 9 VPLOT8_1 -U4 9 1 IPLOT -R2 1 8 100000 -v3 8 4 PULSE -U3 2 3 VPLOT8_1 -U2 3 0 IPLOT -U1 7 2 IPLOT -v1 4 0 3V -v2 6 0 10V -R1 6 7 3000 -Q1 3 9 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt deleted file mode 100644 index b1e99c7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:35:51 pm ist - -* Plotting option vplot8_1 -* Plotting option vplot8_1 -V_u4 9 1 0 -r2 1 8 100000 -v3 8 4 pulse(0 1 0 0 0 2 ) -* Plotting option vplot8_1 -V_u2 3 0 0 -V_u1 7 2 0 -v1 4 0 3v -v2 6 0 10v -r1 6 7 3000 -q1 2 9 3 npn - -.tran 5e-00 100e-00 0e-00 -.plot v(8) -.plot v(9) -.plot i(V_u4) -.plot v(2) v(3) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out deleted file mode 100644 index be85aa9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out +++ /dev/null @@ -1,28 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:35:51 pm ist - -* Plotting option vplot8_1 -* Plotting option vplot8_1 -V_u4 9 1 0 -r2 1 8 100000 -v3 8 4 pulse(0 1 0 0 0 2 ) -* Plotting option vplot8_1 -V_u2 3 0 0 -V_u1 7 2 0 -v1 4 0 3v -v2 6 0 10v -r1 6 7 3000 -q1 2 9 3 npn - -.tran 5e-00 100e-00 0e-00 - -* Control Statements -.control -run -plot v(8) -plot v(9) -plot i(V_u4) -plot v(2) v(3) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro deleted file mode 100644 index b5f9bd7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 11:34:19 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj deleted file mode 100644 index 2c95037..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.14.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch deleted file mode 100644 index 4f4f51a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch +++ /dev/null @@ -1,236 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 01:35:55 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 3050 3050 -$Comp -L VPLOT8_1 U6 -U 1 1 51909ECA -P 3050 3350 -F 0 "U6" H 2900 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 3200 3450 50 0000 C CNN - 1 3050 3350 - -1 0 0 1 -$EndComp -Wire Wire Line - 5000 5750 5000 4300 -Connection ~ 4550 3050 -Connection ~ 4650 3050 -Wire Wire Line - 4300 3050 4700 3050 -Wire Wire Line - 3800 3050 3700 3050 -Connection ~ 5000 2650 -Wire Wire Line - 5900 2550 5900 1050 -Wire Wire Line - 5000 3800 5000 3250 -Wire Wire Line - 5000 2050 5000 1550 -Connection ~ 5000 5450 -Wire Wire Line - 5900 1050 5000 1050 -Wire Wire Line - 2900 3050 3200 3050 -Wire Wire Line - 2900 5200 2900 5450 -Connection ~ 5000 5600 -Connection ~ 5000 3450 -Wire Wire Line - 5000 2550 5000 2850 -Wire Wire Line - 5900 3450 5900 5450 -Wire Wire Line - 2900 3950 2900 4300 -Wire Wire Line - 5900 5450 2900 5450 -$Comp -L PWR_FLAG #FLG1 -U 1 1 516CEB5B -P 4550 3050 -F 0 "#FLG1" H 4550 3145 30 0001 C CNN -F 1 "PWR_FLAG" H 4550 3230 30 0000 C CNN - 1 4550 3050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U5 -U 1 1 516CEB46 -P 4650 3350 -F 0 "U5" H 4500 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 4800 3450 50 0000 C CNN - 1 4650 3350 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CEB0E -P 4050 3050 -F 0 "U4" H 3900 3150 50 0000 C CNN -F 1 "IPLOT" H 4200 3150 50 0000 C CNN - 1 4050 3050 - -1 0 0 1 -$EndComp -$Comp -L R R2 -U 1 1 516CEAFA -P 3450 3050 -F 0 "R2" V 3530 3050 50 0000 C CNN -F 1 "100000" V 3450 3050 50 0000 C CNN - 1 3450 3050 - 0 1 1 0 -$EndComp -$Comp -L PULSE v3 -U 1 1 516CEAC5 -P 2900 3500 -F 0 "v3" H 2700 3600 60 0000 C CNN -F 1 "PULSE" H 2700 3450 60 0000 C CNN -F 2 "R1" H 2600 3500 60 0000 C CNN - 1 2900 3500 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516BD8B9 -P 5300 2650 -F 0 "U3" H 5150 2750 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 2750 50 0000 C CNN - 1 5300 2650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516BD8AC -P 5300 3450 -F 0 "U3" H 5150 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 3550 50 0000 C CNN - 2 5300 3450 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516BD643 -P 5000 4050 -F 0 "U2" H 4850 4150 50 0000 C CNN -F 1 "IPLOT" H 5150 4150 50 0000 C CNN - 1 5000 4050 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516BD5F9 -P 5000 2300 -F 0 "U1" H 4850 2400 50 0000 C CNN -F 1 "IPLOT" H 5150 2400 50 0000 C CNN - 1 5000 2300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG2 -U 1 1 5166BF83 -P 5000 5600 -F 0 "#FLG2" H 5000 5695 30 0001 C CNN -F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN - 1 5000 5600 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 5166BF64 -P 5000 5750 -F 0 "#PWR1" H 5000 5750 30 0001 C CNN -F 1 "GND" H 5000 5680 30 0001 C CNN - 1 5000 5750 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166BEE6 -P 2900 4750 -F 0 "v1" H 2700 4850 60 0000 C CNN -F 1 "3V" H 2700 4700 60 0000 C CNN -F 2 "R1" H 2600 4750 60 0000 C CNN - 1 2900 4750 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5166BED7 -P 5900 3000 -F 0 "v2" H 5700 3100 60 0000 C CNN -F 1 "10V" H 5700 2950 60 0000 C CNN -F 2 "R1" H 5600 3000 60 0000 C CNN - 1 5900 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166BE8E -P 5000 1300 -F 0 "R1" V 5080 1300 50 0000 C CNN -F 1 "3000" V 5000 1300 50 0000 C CNN - 1 5000 1300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166BE53 -P 4900 3050 -F 0 "Q1" H 4900 2900 50 0000 R CNN -F 1 "NPN" H 4900 3200 50 0000 R CNN - 1 4900 3050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/analysis deleted file mode 100644 index 05351e0..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 1e-00 10e-00 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib deleted file mode 100644 index e8eb963..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib +++ /dev/null @@ -1,131 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:27:16 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak deleted file mode 100644 index 8773c0d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak +++ /dev/null @@ -1,221 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:24:14 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5450 4850 5450 5350 -Connection ~ 4300 5050 -Wire Wire Line - 4300 5050 4300 3300 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Wire Wire Line - 3500 3550 3500 3050 -Wire Wire Line - 3500 3050 5450 3050 -Wire Wire Line - 5450 4200 5450 4350 -$Comp -L R R1 -U 1 1 516CF523 -P 5450 4600 -F 0 "R1" V 5530 4600 50 0000 C CNN -F 1 "5000" V 5450 4600 50 0000 C CNN - 1 5450 4600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "10000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir deleted file mode 100644 index e62088b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 12:27:13 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 7 0 PULSE -R1 1 0 5000 -U2 2 7 6 VPLOT8_1 -U1 2 0 IPLOT -R2 4 5 10000 -U3 5 7 IPLOT -v2 4 0 10V -U4 6 1 IPLOT -Q1 6 2 7 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt deleted file mode 100644 index 3741239..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 12:27:13 pm ist - -v1 7 0 pulse(0 5 0 0 0 1 2) -r1 1 0 5000 -* Plotting option vplot8_1 -V_u1 2 0 0 -r2 4 5 10000 -V_u3 5 7 0 -v2 4 0 10v -V_u4 6 1 0 -q1 7 2 6 npn - -.tran 1e-00 10e-00 0e-00 -.plot v(2) v(7) v(6) -.plot i(V_u1) -.plot i(V_u3) -.plot i(V_u4) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out deleted file mode 100644 index 86e4303..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 12:27:13 pm ist - -v1 7 0 pulse(0 5 0 0 0 1 2) -r1 1 0 5000 -* Plotting option vplot8_1 -V_u1 2 0 0 -r2 4 5 10000 -V_u3 5 7 0 -v2 4 0 10v -V_u4 6 1 0 -q1 7 2 6 npn - -.tran 1e-00 10e-00 0e-00 - -* Control Statements -.control -run -plot v(2) v(7) v(6) -plot i(V_u1) -plot i(V_u3) -plot i(V_u4) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.pro deleted file mode 100644 index ebd9c0e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 12:26:32 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.proj deleted file mode 100644 index 5af6371..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.16.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.sch deleted file mode 100644 index 95e37c9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.sch +++ /dev/null @@ -1,220 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:27:16 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PULSE v1 -U 1 1 516CF62D -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "PULSE" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5450 4850 5450 5350 -Connection ~ 4300 5050 -Wire Wire Line - 4300 5050 4300 3300 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Wire Wire Line - 3500 3550 3500 3050 -Wire Wire Line - 3500 3050 5450 3050 -Wire Wire Line - 5450 4200 5450 4350 -$Comp -L R R1 -U 1 1 516CF523 -P 5450 4600 -F 0 "R1" V 5530 4600 50 0000 C CNN -F 1 "5000" V 5450 4600 50 0000 C CNN - 1 5450 4600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "10000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/analysis deleted file mode 100644 index 31f2ad8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 2e-00 2e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak deleted file mode 100644 index 646744a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 26 April 2013 04:00:58 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# Idc -# -DEF Idc i 0 40 Y Y 1 F N -F0 "i" -200 100 60 H V C CNN -F1 "Idc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib deleted file mode 100644 index b92ac3a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 26 April 2013 04:23:31 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# Idc -# -DEF Idc i 0 40 Y Y 1 F N -F0 "i" -200 100 60 H V C CNN -F1 "Idc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak deleted file mode 100644 index 65ec82c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak +++ /dev/null @@ -1,188 +0,0 @@ -EESchema Schematic File Version 2 date Friday 26 April 2013 04:00:58 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.20-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "26 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6350 3300 6350 2800 -Wire Wire Line - 6350 2800 5950 2800 -Wire Wire Line - 4750 4200 4950 4200 -Wire Wire Line - 5450 4200 5650 4200 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 4200 5950 4050 -Connection ~ 5950 5350 -Connection ~ 5950 5450 -Connection ~ 5950 3450 -Connection ~ 5950 4100 -Wire Wire Line - 6350 4200 6350 5350 -Wire Wire Line - 5650 4200 5650 3850 -Connection ~ 5650 3850 -Connection ~ 5650 3950 -Wire Wire Line - 5950 5600 5950 4700 -Wire Wire Line - 6350 5350 5450 5350 -Wire Wire Line - 5450 5350 5450 5100 -Wire Wire Line - 5450 5100 4750 5100 -$Comp -L IDC i1 -U 1 1 517A17EC -P 4750 4650 -F 0 "i1" H 4550 4750 60 0000 C CNN -F 1 "IDC" H 4550 4600 60 0000 C CNN -F 2 "R1" H 4450 4650 60 0000 C CNN - 1 4750 4650 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 517A1753 -P 5950 5350 -F 0 "#FLG01" H 5950 5620 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 5580 30 0000 C CNN - 1 5950 5350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517A174B -P 5650 3950 -F 0 "#FLG02" H 5650 4220 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN - 1 5650 3950 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 517A172B -P 5950 4450 -F 0 "U4" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 517A1709 -P 5200 4200 -F 0 "U2" H 5050 4300 50 0000 C CNN -F 1 "IPLOT" H 5350 4300 50 0000 C CNN - 1 5200 4200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 517A16C8 -P 5950 3050 -F 0 "U3" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166C87D -P 5950 5600 -F 0 "#PWR03" H 5950 5600 30 0001 C CNN -F 1 "GND" H 5950 5530 30 0001 C CNN - 1 5950 5600 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "2" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir deleted file mode 100644 index 419bc05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 26 April 2013 03:55:55 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -i1 5 0 IDC -U4 0 1 IPLOT -U2 3 5 IPLOT -U3 4 6 IPLOT -U1 6 1 VPLOT8_1 -v1 4 0 2 -Q1 1 3 6 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt deleted file mode 100644 index a91b990..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 26 april 2013 03:55:55 pm ist -.include npn.lib - -i1 5 0 idc -V_u4 0 1 0 -V_u2 3 5 0 -V_u3 4 6 0 -* Plotting option vplot8_1 -v1 4 0 2 -q1 6 3 1 npn - -.dc v1 0e-00 2e-00 2e-03 -.plot i(V_u4) -.plot i(V_u2) -.plot i(V_u3) -.plot v(6) v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out deleted file mode 100644 index b2caa59..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 26 april 2013 03:55:55 pm ist -.include npn.lib - -i1 5 0 idc -V_u4 0 1 0 -V_u2 3 5 0 -V_u3 4 6 0 -* Plotting option vplot8_1 -v1 4 0 2 -q1 6 3 1 npn - -.dc v1 0e-00 2e-00 2e-03 - -* Control Statements -.control -run -plot i(V_u4) -plot i(V_u2) -plot i(V_u3) -plot v(6) v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro deleted file mode 100644 index d4ac2ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 12:53:24 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj deleted file mode 100644 index 231747a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.20.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch deleted file mode 100644 index a694eb1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch +++ /dev/null @@ -1,183 +0,0 @@ -EESchema Schematic File Version 2 date Friday 26 April 2013 04:23:31 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.20-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "26 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6350 4200 6350 5100 -Wire Wire Line - 6350 3300 6350 2800 -Wire Wire Line - 6350 2800 5950 2800 -Wire Wire Line - 4750 4200 4950 4200 -Wire Wire Line - 5450 4200 5650 4200 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 4200 5950 4050 -Connection ~ 5950 5100 -Connection ~ 5950 3450 -Connection ~ 5950 4100 -Wire Wire Line - 5650 4200 5650 3850 -Connection ~ 5650 3850 -Connection ~ 5650 3950 -Wire Wire Line - 6350 5100 4750 5100 -Wire Wire Line - 5950 5200 5950 4700 -$Comp -L IDC i1 -U 1 1 517A17EC -P 4750 4650 -F 0 "i1" H 4550 4750 60 0000 C CNN -F 1 "IDC" H 4550 4600 60 0000 C CNN -F 2 "R1" H 4450 4650 60 0000 C CNN - 1 4750 4650 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 517A1753 -P 5950 5100 -F 0 "#FLG01" H 5950 5370 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 5330 30 0000 C CNN - 1 5950 5100 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517A174B -P 5650 3950 -F 0 "#FLG02" H 5650 4220 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN - 1 5650 3950 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 517A172B -P 5950 4450 -F 0 "U4" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 517A1709 -P 5200 4200 -F 0 "U2" H 5050 4300 50 0000 C CNN -F 1 "IPLOT" H 5350 4300 50 0000 C CNN - 1 5200 4200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 517A16C8 -P 5950 3050 -F 0 "U3" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166C87D -P 5950 5200 -F 0 "#PWR03" H 5950 5200 30 0001 C CNN -F 1 "GND" H 5950 5130 30 0001 C CNN - 1 5950 5200 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "2" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib deleted file mode 100644 index 1ff6b05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 -+ Is=6.734f Eg=1.11 ) diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis deleted file mode 100644 index 10c280a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib deleted file mode 100644 index a8411e8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model bjt NPN( Vtf=1.7 Cjc=7.306p Nc=2 Tr=46.91n Ne=1.307 -+ Cje=22.01p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=411.1p Xti=3 Ikr=0 Bf=50 Fc=.5 -+ Ise=14.34f Br=6.092 Ikf=.2847 Mje=.377 Mjc=.3416 -+ Vaf=74.03 Vjc=.2 Vje=.75 Xtf=3 Itf=.6 -+ Is=14.34f Eg=1.11 )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak deleted file mode 100644 index dad7e0c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak +++ /dev/null @@ -1,218 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:57:15 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir deleted file mode 100644 index 2e072a8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 12:03:45 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -Q1 7 1 5 PNP -v1 7 0 PULSE -R1 6 0 5000 -U2 1 7 5 VPLOT8_1 -U1 1 0 IPLOT -R2 3 4 10000 -U3 4 7 IPLOT -v2 3 0 10V -U4 5 6 IPLOT - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch deleted file mode 100644 index e0eb696..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch +++ /dev/null @@ -1,235 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:03:50 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CF0A9 -P 4000 3050 -F 0 "#FLG01" H 4000 3320 30 0001 C CNN -F 1 "PWR_FLAG" H 4000 3280 30 0000 C CNN - 1 4000 3050 - 1 0 0 -1 -$EndComp -Wire Wire Line - 3500 4200 3500 5050 -Connection ~ 4300 5050 -Wire Wire Line - 4300 5050 4300 3300 -Connection ~ 3500 3300 -Wire Wire Line - 3500 3550 3500 3050 -Wire Wire Line - 5450 4200 5450 4350 -Connection ~ 4000 3050 -Wire Wire Line - 3500 5050 6650 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Wire Wire Line - 5450 5350 5450 4850 -Wire Wire Line - 5150 3300 4800 3300 -Wire Wire Line - 3500 3050 5450 3050 -Wire Wire Line - 5450 3050 5450 3000 -Connection ~ 5450 3000 -$Comp -L PNP Q1 -U 1 1 516CEFD3 -P 5350 3300 -F 0 "Q1" H 5350 3150 60 0000 R CNN -F 1 "PNP" H 5350 3450 60 0000 R CNN - 1 5350 3300 - 1 0 0 1 -$EndComp -$Comp -L PULSE v1 -U 1 1 516CEF97 -P 3500 3750 -F 0 "v1" H 3300 3850 60 0000 C CNN -F 1 "PULSE" H 3300 3700 60 0000 C CNN -F 2 "R1" H 3200 3750 60 0000 C CNN - 1 3500 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CEF60 -P 5450 4600 -F 0 "R1" V 5530 4600 50 0000 C CNN -F 1 "5000" V 5450 4600 50 0000 C CNN - 1 5450 4600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG02" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG03" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR04" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "10000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak deleted file mode 100644 index f265808..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:24:14 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib deleted file mode 100644 index 8652c69..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 25 April 2013 02:05:06 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak deleted file mode 100644 index 246ba5c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak +++ /dev/null @@ -1,217 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:04:07 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir deleted file mode 100644 index 97a0042..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 25 April 2013 02:05:01 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 7 2 5 VPLOT8_1 -U1 7 1 IPLOT -v1 1 0 5V -R1 1 1 2200 -R2 3 4 1k -U3 4 2 IPLOT -v2 3 0 10V -U4 5 0 IPLOT -Q1 5 7 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt deleted file mode 100644 index 51d6e2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 02:05:01 pm ist -.include npn.lib - -* Plotting option vplot8_1 -V_u1 7 1 0 -v1 1 0 5v -r1 1 1 2200 -r2 3 4 1k -V_u3 4 2 0 -v2 3 0 10v -V_u4 5 0 0 -q1 2 7 5 npn - -.dc v1 0e-00 5e-00 5e-00 -.plot v(7) v(2) v(5) -.plot i(V_u1) -.plot i(V_u3) -.plot i(V_u4) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out deleted file mode 100644 index 30154d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out +++ /dev/null @@ -1,24 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 02:05:01 pm ist -.include npn.lib - -* Plotting option vplot8_1 -V_u1 7 1 0 -v1 1 0 5v -r1 1 1 2200 -r2 3 4 1k -V_u3 4 2 0 -v2 3 0 10v -V_u4 5 0 0 -q1 2 7 5 npn - -.dc v1 0e-00 5e-00 5e-00 - -* Control Statements -.control -run -plot v(7) v(2) v(5) -plot i(V_u1) -plot i(V_u3) -plot i(V_u4) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro deleted file mode 100644 index f37394e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 10:53:01 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj deleted file mode 100644 index 00153d6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.3.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch deleted file mode 100644 index 0bfa3f7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch +++ /dev/null @@ -1,218 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 25 April 2013 02:05:06 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "25 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1k" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib deleted file mode 100644 index 5aecc2e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf= Cjc= Nc= Tr= Ne= -+ Cje= Vjc= Xtb= Rb= Rc= -+ Tf= Xti= Ikr= Bf=50 Fc= -+ Ikf= Br= Mje= Mjc= Vaf= -+ Isc= Ise= Xtf= Vje= Is= -+ Itf= Eg= )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/analysis deleted file mode 100644 index 35318bb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak deleted file mode 100644 index ea673cb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 10:43:17 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.lib deleted file mode 100644 index ee59c22..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.lib +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:52:43 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# VCCS -# -DEF VCCS G 0 40 Y Y 1 F N -F0 "G" -200 100 50 H V C CNN -F1 "VCCS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak deleted file mode 100644 index 6e5ac9b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak +++ /dev/null @@ -1,172 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 07:53:26 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.6-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5650 3850 5650 5350 -Wire Wire Line - 5950 4700 5950 4850 -Wire Wire Line - 5950 2800 5950 2650 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 2150 6350 2150 -Wire Wire Line - 5950 4200 5950 4050 -Wire Wire Line - 5650 5350 6350 5350 -Connection ~ 5950 5350 -Wire Wire Line - 5950 5350 5950 5600 -Connection ~ 5950 5450 -Connection ~ 5950 3450 -Connection ~ 5950 4100 -Wire Wire Line - 6350 2150 6350 3300 -Wire Wire Line - 6350 5350 6350 4200 -$Comp -L IPLOT U3 -U 1 1 516C0D28 -P 5950 4450 -F 0 "U3" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0CED -P 5950 3050 -F 0 "U2" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5166C8C4 -P 5950 5450 -F 0 "#FLG01" H 5950 5545 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 5630 30 0000 C CNN - 1 5950 5450 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166C87D -P 5950 5600 -F 0 "#PWR02" H 5950 5600 30 0001 C CNN -F 1 "GND" H 5950 5530 30 0001 C CNN - 1 5950 5600 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166C822 -P 5950 2400 -F 0 "R1" V 6030 2400 50 0000 C CNN -F 1 "4700" V 5950 2400 50 0000 C CNN - 1 5950 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166C7EC -P 5950 5100 -F 0 "R2" V 6030 5100 50 0000 C CNN -F 1 "3300" V 5950 5100 50 0000 C CNN - 1 5950 5100 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "10V" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir deleted file mode 100644 index c9bc6a1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 10:43:13 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U4 0 7 IPLOT -U3 4 1 IPLOT -U2 2 3 IPLOT -U1 2 1 VPLOT8_1 -R1 5 3 4700 -R2 4 0 3300 -v1 5 0 10V -Q1 1 7 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt deleted file mode 100644 index f76426b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 10:43:13 am ist -.include npn.lib - -V_u4 0 7 0 -V_u3 4 1 0 -V_u2 2 3 0 -* Plotting option vplot8_1 -r1 5 3 4700 -r2 4 0 3300 -v1 5 0 10v -q1 2 7 1 npn - -.dc v1 0e-00 10e-00 5e-03 -.plot i(V_u4) -.plot i(V_u3) -.plot i(V_u2) -.plot v(2) v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out deleted file mode 100644 index c87b0a7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 10:43:13 am ist -.include npn.lib - -V_u4 0 7 0 -V_u3 4 1 0 -V_u2 2 3 0 -* Plotting option vplot8_1 -r1 5 3 4700 -r2 4 0 3300 -v1 5 0 10v -q1 2 7 1 npn - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot i(V_u4) -plot i(V_u3) -plot i(V_u2) -plot v(2) v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro deleted file mode 100644 index 36d0202..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Tuesday 16 April 2013 12:39:39 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj deleted file mode 100644 index 3ace945..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.6.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch deleted file mode 100644 index d3d6988..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch +++ /dev/null @@ -1,195 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 10:43:17 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.6-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5650 3950 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CDDBE -P 5650 3950 -F 0 "#FLG01" H 5650 4220 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN - 1 5650 3950 - 0 -1 -1 0 -$EndComp -Connection ~ 5650 3850 -Connection ~ 5700 5350 -Wire Wire Line - 5650 4700 5650 5350 -Wire Wire Line - 5650 3850 5650 4200 -Wire Wire Line - 6350 4200 6350 5350 -Wire Wire Line - 6350 3300 6350 2150 -Connection ~ 5950 4100 -Connection ~ 5950 3450 -Connection ~ 5950 5450 -Wire Wire Line - 5950 5350 5950 5600 -Connection ~ 5950 5350 -Wire Wire Line - 6350 5350 5650 5350 -Wire Wire Line - 5950 4200 5950 4050 -Wire Wire Line - 6350 2150 5950 2150 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 2800 5950 2650 -Wire Wire Line - 5950 4700 5950 4850 -$Comp -L IPLOT U4 -U 1 1 516CDCFB -P 5650 4450 -F 0 "U4" H 5500 4550 50 0000 C CNN -F 1 "IPLOT" H 5800 4550 50 0000 C CNN - 1 5650 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C0D28 -P 5950 4450 -F 0 "U3" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0CED -P 5950 3050 -F 0 "U2" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 5166C8C4 -P 5700 5350 -F 0 "#FLG02" H 5700 5445 30 0001 C CNN -F 1 "PWR_FLAG" H 5700 5530 30 0000 C CNN - 1 5700 5350 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166C87D -P 5950 5600 -F 0 "#PWR03" H 5950 5600 30 0001 C CNN -F 1 "GND" H 5950 5530 30 0001 C CNN - 1 5950 5600 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166C822 -P 5950 2400 -F 0 "R1" V 6030 2400 50 0000 C CNN -F 1 "4700" V 5950 2400 50 0000 C CNN - 1 5950 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166C7EC -P 5950 5100 -F 0 "R2" V 6030 5100 50 0000 C CNN -F 1 "3300" V 5950 5100 50 0000 C CNN - 1 5950 5100 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "10V" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/npn.lib deleted file mode 100644 index f84808e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=1.7 Cjc=7.306p Nc=2 Tr=46.91n Ne=1.307 -+ Cje=22.01p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=411.1p Xti=3 Ikr=0 Bf=400 Fc=.5 -+ Ise=14.34f Br=6.092 Ikf=.2847 Mje=.377 Mjc=.3416 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=3 Itf=.6 -+ Is=14.34f Eg=1.11 )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/analysis deleted file mode 100644 index 35318bb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak deleted file mode 100644 index 1c7c96a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:09:14 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib deleted file mode 100644 index 0acf0b6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:10:59 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak deleted file mode 100644 index ca1bf82..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak +++ /dev/null @@ -1,172 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 08:09:14 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5050 4700 -Connection ~ 5050 3500 -Connection ~ 4500 5050 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C10CC -P 4500 5050 -F 0 "#FLG01" H 4500 5320 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 5280 30 0000 C CNN - 1 4500 5050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C10B9 -P 4450 5350 -F 0 "#PWR02" H 4450 5350 30 0001 C CNN -F 1 "GND" H 4450 5280 30 0001 C CNN - 1 4450 5350 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4450 5350 4500 5350 -Wire Wire Line - 4500 5350 4500 3750 -Wire Wire Line - 4500 3750 4750 3750 -Wire Wire Line - 5050 4550 5050 4850 -Wire Wire Line - 5050 5350 5650 5350 -Wire Wire Line - 5050 3450 5050 3550 -Wire Wire Line - 5050 2850 5050 2950 -Wire Wire Line - 5050 3950 5050 4050 -Wire Wire Line - 5050 2350 5650 2350 -Wire Wire Line - 5650 2350 5650 3200 -Wire Wire Line - 5650 5350 5650 4100 -$Comp -L VPLOT8_1 U3 -U 2 1 516C107A -P 5350 4700 -F 0 "U3" H 5200 4800 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 4800 50 0000 C CNN - 2 5350 4700 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C103D -P 5650 3650 -F 0 "v1" H 5450 3750 60 0000 C CNN -F 1 "DC" H 5450 3600 60 0000 C CNN -F 2 "R1" H 5350 3650 60 0000 C CNN - 1 5650 3650 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C1001 -P 5350 3500 -F 0 "U3" H 5200 3600 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 3600 50 0000 C CNN - 1 5350 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C0FB5 -P 5050 5100 -F 0 "R2" V 5130 5100 50 0000 C CNN -F 1 "R" V 5050 5100 50 0000 C CNN - 1 5050 5100 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0FAB -P 5050 4300 -F 0 "U2" H 4900 4400 50 0000 C CNN -F 1 "IPLOT" H 5200 4400 50 0000 C CNN - 1 5050 4300 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C0F0F -P 5050 3200 -F 0 "U1" H 4900 3300 50 0000 C CNN -F 1 "IPLOT" H 5200 3300 50 0000 C CNN - 1 5050 3200 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516C0F01 -P 5050 2600 -F 0 "R1" V 5130 2600 50 0000 C CNN -F 1 "R" V 5050 2600 50 0000 C CNN - 1 5050 2600 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C0EEC -P 4950 3750 -F 0 "Q1" H 4950 3600 60 0000 R CNN -F 1 "PNP" H 4950 3900 60 0000 R CNN - 1 4950 3750 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir deleted file mode 100644 index 7d111e3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 08:10:56 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 4 6 VPLOT8_1 -v1 3 5 10 -R2 6 3 2000 -U2 6 2 IPLOT -U1 4 1 IPLOT -R1 5 1 1000 -Q1 2 0 4 PNP - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt deleted file mode 100644 index d569e7a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:10:56 pm ist - -* Plotting option vplot8_1 -v1 3 5 10 -r2 6 3 2000 -V_u2 6 2 0 -V_u1 4 1 0 -r1 5 1 1000 -q1 4 0 2 pnp - -.dc v1 0e-00 10e-00 5e-03 -.plot v(4) v(6) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out deleted file mode 100644 index 946ba9b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:10:56 pm ist - -* Plotting option vplot8_1 -v1 3 5 10 -r2 6 3 2000 -V_u2 6 2 0 -V_u1 4 1 0 -r1 5 1 1000 -q1 4 0 2 pnp - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot v(4) v(6) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro deleted file mode 100644 index 7b4f272..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 07:58:37 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj deleted file mode 100644 index b07d448..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.7.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch deleted file mode 100644 index c9780ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch +++ /dev/null @@ -1,173 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 08:10:59 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.7-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5050 4700 -Connection ~ 5050 3500 -Connection ~ 4500 5050 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C10CC -P 4500 5050 -F 0 "#FLG01" H 4500 5320 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 5280 30 0000 C CNN - 1 4500 5050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C10B9 -P 4450 5350 -F 0 "#PWR02" H 4450 5350 30 0001 C CNN -F 1 "GND" H 4450 5280 30 0001 C CNN - 1 4450 5350 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4450 5350 4500 5350 -Wire Wire Line - 4500 5350 4500 3750 -Wire Wire Line - 4500 3750 4750 3750 -Wire Wire Line - 5050 4550 5050 4850 -Wire Wire Line - 5050 5350 5650 5350 -Wire Wire Line - 5050 3450 5050 3550 -Wire Wire Line - 5050 2850 5050 2950 -Wire Wire Line - 5050 3950 5050 4050 -Wire Wire Line - 5050 2350 5650 2350 -Wire Wire Line - 5650 2350 5650 3200 -Wire Wire Line - 5650 5350 5650 4100 -$Comp -L VPLOT8_1 U3 -U 2 1 516C107A -P 5350 4700 -F 0 "U3" H 5200 4800 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 4800 50 0000 C CNN - 2 5350 4700 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C103D -P 5650 3650 -F 0 "v1" H 5450 3750 60 0000 C CNN -F 1 "10" H 5450 3600 60 0000 C CNN -F 2 "R1" H 5350 3650 60 0000 C CNN - 1 5650 3650 - 1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C1001 -P 5350 3500 -F 0 "U3" H 5200 3600 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 3600 50 0000 C CNN - 1 5350 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C0FB5 -P 5050 5100 -F 0 "R2" V 5130 5100 50 0000 C CNN -F 1 "2000" V 5050 5100 50 0000 C CNN - 1 5050 5100 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0FAB -P 5050 4300 -F 0 "U2" H 4900 4400 50 0000 C CNN -F 1 "IPLOT" H 5200 4400 50 0000 C CNN - 1 5050 4300 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C0F0F -P 5050 3200 -F 0 "U1" H 4900 3300 50 0000 C CNN -F 1 "IPLOT" H 5200 3300 50 0000 C CNN - 1 5050 3200 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516C0F01 -P 5050 2600 -F 0 "R1" V 5130 2600 50 0000 C CNN -F 1 "1000" V 5050 2600 50 0000 C CNN - 1 5050 2600 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C0EEC -P 4950 3750 -F 0 "Q1" H 4950 3600 60 0000 R CNN -F 1 "PNP" H 4950 3900 60 0000 R CNN - 1 4950 3750 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/analysis deleted file mode 100644 index 7946c35..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib deleted file mode 100644 index c582dbc..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:58:27 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir deleted file mode 100644 index 073dc21..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 08:58:23 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 3 0 5V -v2 2 0 10V -R1 6 3 100 -U3 1 4 VPLOT8_1 -U2 0 4 IPLOT -U1 1 5 IPLOT -R2 2 5 2000 -Q1 4 6 1 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt deleted file mode 100644 index bf04d00..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt +++ /dev/null @@ -1,16 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:58:23 pm ist - -v1 3 0 5v -v2 2 0 10v -r1 6 3 100 -* Plotting option vplot8_1 -V_u2 0 4 0 -V_u1 1 5 0 -r2 2 5 2000 -q1 1 6 4 npn - -.dc v1 0e-00 5e-00 5e-03 -.plot v(1) v(4) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out deleted file mode 100644 index 4fa87ff..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out +++ /dev/null @@ -1,21 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:58:23 pm ist - -v1 3 0 5v -v2 2 0 10v -r1 6 3 100 -* Plotting option vplot8_1 -V_u2 0 4 0 -V_u1 1 5 0 -r2 2 5 2000 -q1 1 6 4 npn - -.dc v1 0e-00 5e-00 5e-03 - -* Control Statements -.control -run -plot v(1) v(4) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.pro deleted file mode 100644 index 829ea15..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 08:14:03 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.proj deleted file mode 100644 index 2797ff1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.8.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.sch deleted file mode 100644 index f8c5751..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.sch +++ /dev/null @@ -1,181 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 08:58:27 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5500 4450 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C1C70 -P 5500 4450 -F 0 "#FLG01" H 5500 4720 30 0001 C CNN -F 1 "PWR_FLAG" H 5500 4680 30 0000 C CNN - 1 5500 4450 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C1C57 -P 5500 4500 -F 0 "#PWR02" H 5500 4500 30 0001 C CNN -F 1 "GND" H 5500 4430 30 0001 C CNN - 1 5500 4500 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5500 4500 5500 4000 -Connection ~ 5500 4350 -Wire Wire Line - 4600 4350 6400 4350 -Wire Wire Line - 6400 2150 6400 1800 -Wire Wire Line - 6400 1800 5500 1800 -Connection ~ 5500 3450 -Connection ~ 5500 2950 -Wire Wire Line - 5500 2300 5500 2400 -Wire Wire Line - 5500 3000 5500 2900 -Wire Wire Line - 5500 3400 5500 3500 -Wire Wire Line - 5200 3200 5100 3200 -Wire Wire Line - 4600 4350 4600 4100 -Wire Wire Line - 6400 4350 6400 3050 -$Comp -L DC v1 -U 1 1 516C1BAA -P 4600 3650 -F 0 "v1" H 4400 3750 60 0000 C CNN -F 1 "5V" H 4400 3600 60 0000 C CNN -F 2 "R1" H 4300 3650 60 0000 C CNN - 1 4600 3650 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 516C1B93 -P 6400 2600 -F 0 "v2" H 6200 2700 60 0000 C CNN -F 1 "10V" H 6200 2550 60 0000 C CNN -F 2 "R1" H 6100 2600 60 0000 C CNN - 1 6400 2600 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C130D -P 4850 3200 -F 0 "R1" V 4930 3200 50 0000 C CNN -F 1 "100" V 4850 3200 50 0000 C CNN - 1 4850 3200 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516C12F0 -P 5800 3450 -F 0 "U3" H 5650 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5950 3550 50 0000 C CNN - 2 5800 3450 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C12D2 -P 5500 3750 -F 0 "U2" H 5350 3850 50 0000 C CNN -F 1 "IPLOT" H 5650 3850 50 0000 C CNN - 1 5500 3750 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C128C -P 5800 2950 -F 0 "U3" H 5650 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 5950 3050 50 0000 C CNN - 1 5800 2950 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C1282 -P 5500 2650 -F 0 "U1" H 5350 2750 50 0000 C CNN -F 1 "IPLOT" H 5650 2750 50 0000 C CNN - 1 5500 2650 - 0 -1 -1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C125F -P 5500 2050 -F 0 "R2" V 5580 2050 50 0000 C CNN -F 1 "2000" V 5500 2050 50 0000 C CNN - 1 5500 2050 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C1252 -P 5400 3200 -F 0 "Q1" H 5400 3050 50 0000 R CNN -F 1 "NPN" H 5400 3350 50 0000 R CNN - 1 5400 3200 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/analysis deleted file mode 100644 index 7946c35..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak deleted file mode 100644 index ab4ac6a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 09:47:58 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.lib deleted file mode 100644 index 19bc1ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:19:52 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.bak deleted file mode 100644 index 9b2890f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.bak +++ /dev/null @@ -1,200 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 09:47:58 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 4800 3600 4150 3600 -Wire Wire Line - 6500 2900 6500 2050 -Wire Wire Line - 6500 2050 5100 2050 -Wire Wire Line - 5100 5100 5100 5250 -Wire Wire Line - 5100 3800 5100 3950 -Wire Wire Line - 5100 3250 5100 3400 -Wire Wire Line - 5100 2650 5100 2750 -Wire Wire Line - 5100 4450 5100 4600 -Wire Wire Line - 5100 2050 5100 2150 -Connection ~ 5100 3350 -Connection ~ 5100 3900 -Wire Wire Line - 3650 3600 3650 5100 -Connection ~ 5100 2050 -Connection ~ 5100 2050 -Connection ~ 5100 2050 -Wire Wire Line - 6500 3800 6500 5250 -Wire Wire Line - 6500 5250 5100 5250 -Connection ~ 4750 3600 -Connection ~ 3650 3600 -Connection ~ 4150 3600 -Connection ~ 3950 3600 -Connection ~ 4800 3600 -Connection ~ 3650 4850 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C1E89 -P 3650 4850 -F 0 "#FLG01" H 3650 5120 30 0001 C CNN -F 1 "PWR_FLAG" H 3650 5080 30 0000 C CNN - 1 3650 4850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C1EFD -P 4750 3300 -F 0 "U2" H 4600 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 4900 3400 50 0000 C CNN - 1 4750 3300 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C1E7B -P 3650 5100 -F 0 "#PWR02" H 3650 5100 30 0001 C CNN -F 1 "GND" H 3650 5030 30 0001 C CNN - 1 3650 5100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C1E56 -P 3900 3600 -F 0 "R1" V 3980 3600 50 0000 C CNN -F 1 "10000" V 3900 3600 50 0000 C CNN - 1 3900 3600 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516C1E37 -P 5400 3900 -F 0 "U2" H 5250 4000 50 0000 C CNN -F 1 "VPLOT8_1" H 5550 4000 50 0000 C CNN - 3 5400 3900 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C1E04 -P 5100 4850 -F 0 "R3" V 5180 4850 50 0000 C CNN -F 1 "10000" V 5100 4850 50 0000 C CNN - 1 5100 4850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C1DF8 -P 5100 4200 -F 0 "U4" H 4950 4300 50 0000 C CNN -F 1 "IPLOT" H 5250 4300 50 0000 C CNN - 1 5100 4200 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C1DCB -P 5400 3350 -F 0 "U2" H 5250 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 5550 3450 50 0000 C CNN - 2 5400 3350 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C1DBD -P 6500 3350 -F 0 "v1" H 6300 3450 60 0000 C CNN -F 1 "5" H 6300 3300 60 0000 C CNN -F 2 "R1" H 6200 3350 60 0000 C CNN - 1 6500 3350 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C1DAD -P 5100 3000 -F 0 "U3" H 4950 3100 50 0000 C CNN -F 1 "IPLOT" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C1D7F -P 5100 2400 -F 0 "R2" V 5180 2400 50 0000 C CNN -F 1 "1000" V 5100 2400 50 0000 C CNN - 1 5100 2400 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C1D57 -P 5000 3600 -F 0 "Q1" H 5000 3450 60 0000 R CNN -F 1 "PNP" H 5000 3750 60 0000 R CNN - 1 5000 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir deleted file mode 100644 index 484dfb8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:19:49 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v2 0 4 5 -U2 2 6 3 VPLOT8_1 -R1 2 0 10000 -R3 5 4 10000 -U4 3 5 IPLOT -v1 7 0 5 -U3 8 6 IPLOT -R2 7 8 1000 -Q1 3 2 6 PNP - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt deleted file mode 100644 index 3c4d3e8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:19:49 pm ist - -v2 0 4 5 -* Plotting option vplot8_1 -r1 2 0 10000 -r3 5 4 10000 -V_u4 3 5 0 -v1 7 0 5 -V_u3 8 6 0 -r2 7 8 1000 -q1 6 2 3 pnp - -.dc v1 0e-00 5e-00 5e-03 -.plot v(2) v(6) v(3) -.plot i(V_u4) -.plot i(V_u3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out deleted file mode 100644 index 00c3815..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:19:49 pm ist - -v2 0 4 5 -* Plotting option vplot8_1 -r1 2 0 10000 -r3 5 4 10000 -V_u4 3 5 0 -v1 7 0 5 -V_u3 8 6 0 -r2 7 8 1000 -q1 6 2 3 pnp - -.dc v1 0e-00 5e-00 5e-03 - -* Control Statements -.control -run -plot v(2) v(6) v(3) -plot i(V_u4) -plot i(V_u3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro deleted file mode 100644 index 50bea06..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 09:01:17 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj deleted file mode 100644 index cf438f1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.9.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch deleted file mode 100644 index da988b4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch +++ /dev/null @@ -1,221 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 01:19:52 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.9-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L GND #PWR01 -U 1 1 51909AF0 -P 6700 3550 -F 0 "#PWR01" H 6700 3550 30 0001 C CNN -F 1 "GND" H 6700 3480 30 0001 C CNN - 1 6700 3550 - 1 0 0 -1 -$EndComp -Connection ~ 6500 3550 -Wire Wire Line - 6500 3550 6700 3550 -Wire Wire Line - 4800 3600 4150 3600 -Wire Wire Line - 6500 2050 5100 2050 -Wire Wire Line - 5100 5100 5100 5250 -Wire Wire Line - 5100 3800 5100 3950 -Wire Wire Line - 5100 3250 5100 3400 -Wire Wire Line - 5100 2650 5100 2750 -Wire Wire Line - 5100 4450 5100 4600 -Wire Wire Line - 5100 2050 5100 2150 -Connection ~ 5100 3350 -Connection ~ 5100 3900 -Wire Wire Line - 3650 3600 3650 5100 -Connection ~ 5100 2050 -Connection ~ 5100 2050 -Connection ~ 5100 2050 -Wire Wire Line - 5100 5250 6500 5250 -Connection ~ 4750 3600 -Connection ~ 3650 3600 -Connection ~ 4150 3600 -Connection ~ 3950 3600 -Connection ~ 4800 3600 -Connection ~ 3650 4850 -Wire Wire Line - 6500 2950 6500 4350 -$Comp -L DC v2 -U 1 1 51909ACB -P 6500 4800 -F 0 "v2" H 6300 4900 60 0000 C CNN -F 1 "5" H 6300 4750 60 0000 C CNN -F 2 "R1" H 6200 4800 60 0000 C CNN - 1 6500 4800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516C1E89 -P 3650 4850 -F 0 "#FLG02" H 3650 5120 30 0001 C CNN -F 1 "PWR_FLAG" H 3650 5080 30 0000 C CNN - 1 3650 4850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C1EFD -P 4750 3300 -F 0 "U2" H 4600 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 4900 3400 50 0000 C CNN - 1 4750 3300 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516C1E7B -P 3650 5100 -F 0 "#PWR03" H 3650 5100 30 0001 C CNN -F 1 "GND" H 3650 5030 30 0001 C CNN - 1 3650 5100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C1E56 -P 3900 3600 -F 0 "R1" V 3980 3600 50 0000 C CNN -F 1 "10000" V 3900 3600 50 0000 C CNN - 1 3900 3600 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516C1E37 -P 5400 3900 -F 0 "U2" H 5250 4000 50 0000 C CNN -F 1 "VPLOT8_1" H 5550 4000 50 0000 C CNN - 3 5400 3900 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C1E04 -P 5100 4850 -F 0 "R3" V 5180 4850 50 0000 C CNN -F 1 "10000" V 5100 4850 50 0000 C CNN - 1 5100 4850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C1DF8 -P 5100 4200 -F 0 "U4" H 4950 4300 50 0000 C CNN -F 1 "IPLOT" H 5250 4300 50 0000 C CNN - 1 5100 4200 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C1DCB -P 5400 3350 -F 0 "U2" H 5250 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 5550 3450 50 0000 C CNN - 2 5400 3350 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C1DBD -P 6500 2500 -F 0 "v1" H 6300 2600 60 0000 C CNN -F 1 "5" H 6300 2450 60 0000 C CNN -F 2 "R1" H 6200 2500 60 0000 C CNN - 1 6500 2500 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C1DAD -P 5100 3000 -F 0 "U3" H 4950 3100 50 0000 C CNN -F 1 "IPLOT" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C1D7F -P 5100 2400 -F 0 "R2" V 5180 2400 50 0000 C CNN -F 1 "1000" V 5100 2400 50 0000 C CNN - 1 5100 2400 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C1D57 -P 5000 3600 -F 0 "Q1" H 5000 3450 60 0000 R CNN -F 1 "PNP" H 5000 3750 60 0000 R CNN - 1 5000 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/npn.lib deleted file mode 100644 index caa3cb7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 -+ Is=6.734 Eg=1.11 )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/1n4007.lib b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/1n4007.lib deleted file mode 100644 index 89d421d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/1n4007.lib +++ /dev/null @@ -1,2 +0,0 @@ -.model 1n4007 D( IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 BV=1000 IBV=5e-08 CJO=1E-11 -+VJ=0.7 M=0.5 FC=0.5 TT=1E-07 KF=0 AF=1 ) diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/analysis b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/analysis deleted file mode 100644 index f74e3c8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/cd4007.txt b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/cd4007.txt deleted file mode 100644 index 0552575..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/cd4007.txt +++ /dev/null @@ -1,22 +0,0 @@ -* CD4007 NMOS and PMOS transistor SPICE models - -* Typical - Typical Condition - -.model mos_n NMOS -+ Level=1 Gamma= 0 Xj=0 -+ Tox=1200n Phi=.6 Rs=0 Kp=111u Vto=1.4 Lambda=0.01 -+ Rd=0 Cbd=2.0p Cbs=2.0p Pb=.8 Cgso=0.1p -+ Cgdo=0.1p Is=16.64p N=1 - -*The default W and L is 30 and 10 um respectively and AD and AS -*should not be included. - - -.model mos_p PMOS -+ Level=1 Gamma= 0 Xj=0 -+ Tox=1200n Phi=.6 Rs=0 Kp=1u Vto=-1.2 Lambda=0.04 -+ Rd=0 Cbd=4.0p Cbs=4.0p Pb=.8 Cgso=0.2p -+ Cgdo=0.2p Is=16.64p N=1 - -*The default W and L is 60 and 10 um respectively and AD and AS -*should not be included. diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.bak b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.bak deleted file mode 100644 index 5cb1eee..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.bak +++ /dev/null @@ -1,110 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 16 May 2013 11:39:19 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# MOS_N -# -DEF MOS_N M 0 0 N Y 1 F N -F0 "M" 10 170 60 H V R CNN -F1 "MOS_N" 10 -150 60 H V R CNN -ALIAS MOSFET_N -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 8 100 -100 100 0 50 0 N -P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.lib b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.lib deleted file mode 100644 index df97081..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5-cache.lib +++ /dev/null @@ -1,110 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 16 May 2013 11:43:16 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# MOS_N -# -DEF MOS_N M 0 0 N Y 1 F N -F0 "M" 10 170 60 H V R CNN -F1 "MOS_N" 10 -150 60 H V R CNN -ALIAS MOSFET_N -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 8 100 -100 100 0 50 0 N -P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.bak b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.bak deleted file mode 100644 index c4bf9b0..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.bak +++ /dev/null @@ -1,214 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 16 May 2013 11:39:19 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_4.5-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 6600 3650 -$Comp -L VPLOT8_1 U4 -U 2 1 519477A9 -P 6900 3650 -F 0 "U4" H 6750 3750 50 0000 C CNN -F 1 "VPLOT8_1" H 7050 3750 50 0000 C CNN - 2 6900 3650 - 0 1 1 0 -$EndComp -Wire Wire Line - 6600 4350 6600 4700 -Wire Wire Line - 5800 5500 5800 5550 -Wire Wire Line - 6600 2700 6600 3000 -Connection ~ 5800 5500 -Wire Wire Line - 5000 2850 5000 850 -Connection ~ 5700 850 -Wire Wire Line - 5000 850 6600 850 -Connection ~ 5700 3200 -Wire Wire Line - 5700 5500 5700 5200 -Wire Wire Line - 5700 1200 5700 850 -Wire Wire Line - 6600 850 6600 1200 -Wire Wire Line - 6600 5200 6600 5500 -Wire Wire Line - 6300 3200 5700 3200 -Connection ~ 5700 3200 -Connection ~ 6600 2850 -Connection ~ 6600 850 -Connection ~ 6600 5500 -Wire Wire Line - 5700 4700 5700 1700 -Wire Wire Line - 6600 5500 5000 5500 -Connection ~ 5700 5500 -Wire Wire Line - 5000 5500 5000 3750 -Wire Wire Line - 6600 1700 6600 2200 -Wire Wire Line - 6600 3400 6600 3800 -$Comp -L IPLOT U2 -U 1 1 51947793 -P 6600 4050 -F 0 "U2" H 6450 4150 50 0000 C CNN -F 1 "IPLOT" H 6750 4150 50 0000 C CNN - 1 6600 4050 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 518B75C0 -P 6600 2450 -F 0 "U1" H 6450 2550 50 0000 C CNN -F 1 "IPLOT" H 6750 2550 50 0000 C CNN - 1 6600 2450 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U4 -U 1 1 518B74B3 -P 6000 3200 -F 0 "U4" H 5850 3300 50 0000 C CNN -F 1 "VPLOT8_1" H 6150 3300 50 0000 C CNN - 1 6000 3200 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR01 -U 1 1 517A3B91 -P 5800 5550 -F 0 "#PWR01" H 5800 5550 30 0001 C CNN -F 1 "GND" H 5800 5480 30 0001 C CNN - 1 5800 5550 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517A3B8C -P 5800 5500 -F 0 "#FLG02" H 5800 5770 30 0001 C CNN -F 1 "PWR_FLAG" H 5800 5730 30 0000 C CNN - 1 5800 5500 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 517A3ABD -P 5000 3300 -F 0 "v1" H 4800 3400 60 0000 C CNN -F 1 "10" H 4800 3250 60 0000 C CNN -F 2 "R1" H 4700 3300 60 0000 C CNN - 1 5000 3300 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516BA47D -P 6900 2850 -F 0 "U3" H 6750 2950 50 0000 C CNN -F 1 "VPLOT8_1" H 7050 2950 50 0000 C CNN - 1 6900 2850 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5166F1C0 -P 5700 4950 -F 0 "R2" V 5780 4950 50 0000 C CNN -F 1 "10M" V 5700 4950 50 0000 C CNN - 1 5700 4950 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166F1AE -P 5700 1450 -F 0 "R1" V 5780 1450 50 0000 C CNN -F 1 "10M" V 5700 1450 50 0000 C CNN - 1 5700 1450 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 5166F187 -P 6600 4950 -F 0 "R4" V 6680 4950 50 0000 C CNN -F 1 "6k" V 6600 4950 50 0000 C CNN - 1 6600 4950 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 5166F163 -P 6600 1450 -F 0 "R3" V 6680 1450 50 0000 C CNN -F 1 "6k" V 6600 1450 50 0000 C CNN - 1 6600 1450 - 1 0 0 -1 -$EndComp -$Comp -L MOS_N M1 -U 1 1 5166F12C -P 6500 3200 -F 0 "M1" H 6510 3370 60 0000 R CNN -F 1 "MOS_N" H 6510 3050 60 0000 R CNN - 1 6500 3200 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir deleted file mode 100644 index 4a904e0..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 16 May 2013 11:43:12 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U4 6 7 VPLOT8_1 -U2 7 4 IPLOT -U1 5 1 IPLOT -v1 3 0 10 -U3 1 VPLOT8_1 -R2 6 0 10M -R1 3 6 10M -R4 4 0 6k -R3 3 5 6k -M1 1 6 7 MOS_N - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.ckt deleted file mode 100644 index 68ce4e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.ckt +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 16 may 2013 11:43:12 am ist - -* Plotting option vplot8_1 -V_u2 7 4 0 -V_u1 5 1 0 -v1 3 0 10 -* Plotting option vplot8_1 -r2 6 0 10m -r1 3 6 10m -r4 4 0 6k -r3 3 5 6k -m1 1 6 7 mos_n - -.dc v1 0e-00 10e-00 1e-00 -.plot v(6) v(7) -.plot i(V_u2) -.plot i(V_u1) -.plot v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.out b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.out deleted file mode 100644 index b363435..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.cir.out +++ /dev/null @@ -1,24 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 16 may 2013 11:43:12 am ist - -* Plotting option vplot8_1 -V_u2 7 4 0 -V_u1 5 1 0 -v1 3 0 10 -* Plotting option vplot8_1 -r2 6 0 10m -r1 3 6 10m -r4 4 0 6k -r3 3 5 6k -m1 1 6 7 mos_n - -.dc v1 0e-00 10e-00 1e-00 - -* Control Statements -.control -run -plot v(6) v(7) -plot i(V_u2) -plot i(V_u1) -plot v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.pro b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.pro deleted file mode 100644 index 2585a32..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Tuesday 07 May 2013 02:38:55 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.proj b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.proj deleted file mode 100644 index 2320ec1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_4.5.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.sch b/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.sch deleted file mode 100644 index a1406f4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_4/example_4.5/example_4.5.sch +++ /dev/null @@ -1,214 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 16 May 2013 11:43:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_4.5-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6600 4300 6600 4700 -Wire Wire Line - 6600 3400 6600 3800 -Wire Wire Line - 6600 1700 6600 2200 -Wire Wire Line - 5000 3750 5000 5500 -Connection ~ 5700 5500 -Wire Wire Line - 5000 5500 6600 5500 -Wire Wire Line - 5700 4700 5700 1700 -Connection ~ 6600 5500 -Connection ~ 6600 850 -Connection ~ 6600 2850 -Connection ~ 5700 3200 -Wire Wire Line - 6300 3200 5700 3200 -Wire Wire Line - 6600 5500 6600 5200 -Wire Wire Line - 6600 1200 6600 850 -Wire Wire Line - 5700 1200 5700 850 -Wire Wire Line - 5700 5500 5700 5200 -Connection ~ 5700 3200 -Wire Wire Line - 6600 850 5000 850 -Connection ~ 5700 850 -Wire Wire Line - 5000 850 5000 2850 -Connection ~ 5800 5500 -Wire Wire Line - 6600 2700 6600 3000 -Wire Wire Line - 5800 5500 5800 5550 -Connection ~ 6600 3650 -$Comp -L VPLOT8_1 U4 -U 2 1 519477A9 -P 6900 3650 -F 0 "U4" H 6750 3750 50 0000 C CNN -F 1 "VPLOT8_1" H 7050 3750 50 0000 C CNN - 2 6900 3650 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 51947793 -P 6600 4050 -F 0 "U2" H 6450 4150 50 0000 C CNN -F 1 "IPLOT" H 6750 4150 50 0000 C CNN - 1 6600 4050 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 518B75C0 -P 6600 2450 -F 0 "U1" H 6450 2550 50 0000 C CNN -F 1 "IPLOT" H 6750 2550 50 0000 C CNN - 1 6600 2450 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U4 -U 1 1 518B74B3 -P 6000 3200 -F 0 "U4" H 5850 3300 50 0000 C CNN -F 1 "VPLOT8_1" H 6150 3300 50 0000 C CNN - 1 6000 3200 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR01 -U 1 1 517A3B91 -P 5800 5550 -F 0 "#PWR01" H 5800 5550 30 0001 C CNN -F 1 "GND" H 5800 5480 30 0001 C CNN - 1 5800 5550 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517A3B8C -P 5800 5500 -F 0 "#FLG02" H 5800 5770 30 0001 C CNN -F 1 "PWR_FLAG" H 5800 5730 30 0000 C CNN - 1 5800 5500 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 517A3ABD -P 5000 3300 -F 0 "v1" H 4800 3400 60 0000 C CNN -F 1 "10" H 4800 3250 60 0000 C CNN -F 2 "R1" H 4700 3300 60 0000 C CNN - 1 5000 3300 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516BA47D -P 6900 2850 -F 0 "U3" H 6750 2950 50 0000 C CNN -F 1 "VPLOT8_1" H 7050 2950 50 0000 C CNN - 1 6900 2850 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5166F1C0 -P 5700 4950 -F 0 "R2" V 5780 4950 50 0000 C CNN -F 1 "10M" V 5700 4950 50 0000 C CNN - 1 5700 4950 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166F1AE -P 5700 1450 -F 0 "R1" V 5780 1450 50 0000 C CNN -F 1 "10M" V 5700 1450 50 0000 C CNN - 1 5700 1450 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 5166F187 -P 6600 4950 -F 0 "R4" V 6680 4950 50 0000 C CNN -F 1 "6k" V 6600 4950 50 0000 C CNN - 1 6600 4950 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 5166F163 -P 6600 1450 -F 0 "R3" V 6680 1450 50 0000 C CNN -F 1 "6k" V 6600 1450 50 0000 C CNN - 1 6600 1450 - 1 0 0 -1 -$EndComp -$Comp -L MOS_N M1 -U 1 1 5166F12C -P 6500 3200 -F 0 "M1" H 6510 3370 60 0000 R CNN -F 1 "MOS_N" H 6510 3050 60 0000 R CNN - 1 6500 3200 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/analysis deleted file mode 100644 index 1665db7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 100e-03 100e-06 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.bak deleted file mode 100644 index 7a3e4b4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.bak +++ /dev/null @@ -1,126 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 09 May 2013 05:04:50 PM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# LM741 -# -DEF LM741 U 0 20 Y Y 1 F N -F0 "U" 150 150 60 H V C CNN -F1 "LM741" 150 250 60 H V C CNN -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X ~ 1 0 -400 300 U 40 40 1 1 I -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X V- 4 -100 -400 250 U 40 40 1 1 I -X ~ 5 100 -400 350 U 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -X V+ 7 -100 400 250 D 40 40 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.lib deleted file mode 100644 index 5b4c901..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 10:18:21 AM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.bak deleted file mode 100644 index abf9a53..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.bak +++ /dev/null @@ -1,181 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 09 May 2013 05:04:50 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "9 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L LM741 U? -U 1 1 518B89AE -P 8800 3550 -F 0 "U?" H 8950 3700 60 0000 C CNN -F 1 "LM741" H 8950 3800 60 0000 C CNN - 1 8800 3550 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X? -U 1 1 518B899E -P 9050 2450 -F 0 "X?" H 9200 2600 60 0000 C CNN -F 1 "UA741" H 9200 2700 60 0000 C CNN - 1 9050 2450 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 516F84E1 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "SINE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 7150 3300 6350 3300 -Wire Wire Line - 5300 2400 5300 3200 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4200 5350 3400 -Connection ~ 5300 3200 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 6900 2400 7050 2400 -Wire Wire Line - 7050 2400 7050 3300 -Wire Wire Line - 6400 2400 5800 2400 -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7050 3600 -F 0 "U3" H 6900 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 7200 3700 50 0000 C CNN - 1 7050 3600 - -1 0 0 1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG1" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2400 -F 0 "U2" H 5400 2500 50 0000 C CNN -F 1 "IPLOT" H 5700 2500 50 0000 C CNN - 1 5550 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6650 2400 -F 0 "R2" V 6730 2400 50 0000 C CNN -F 1 "10000" V 6650 2400 50 0000 C CNN - 1 6650 2400 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR1" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir deleted file mode 100644 index d11b7e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir +++ /dev/null @@ -1,24 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 18 April 2013 10:42:46 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 4 0 PULSE -v2 11 0 10V -U3 8 3 VPLOT8_1 -R5 13 3 10000 -R4 0 13 10000 -R3 1 11 10000 -U5 8 2 IPLOT -Q2 1 1 2 NPN -X2 1 13 3 UA741 -U4 10 8 IPLOT -Q1 10 0 9 NPN -U1 6 7 IPLOT -U2 7 9 IPLOT -R2 8 5 10000 -R1 6 4 1000 -X1 7 0 5 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.ckt deleted file mode 100644 index db0e45e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.ckt +++ /dev/null @@ -1,16 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 02:25:09 pm ist -.include ua741.sub - -* Plotting option vplot8_1 -V_u1 6 5 0 -V_u2 5 4 0 -r2 1 4 100000 -v1 3 0 100m -r1 6 3 1000 -x1 5 0 1 ua741 - -.dc v1 0e-00 100e-03 100e-06 -.plot v(1) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.out deleted file mode 100644 index d01be76..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.cir.out +++ /dev/null @@ -1,21 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 02:25:09 pm ist -.include ua741.sub - -* Plotting option vplot8_1 -V_u1 6 5 0 -V_u2 5 4 0 -r2 1 4 100000 -v1 3 0 100m -r1 6 3 1000 -x1 5 0 1 ua741 - -.dc v1 0e-00 100e-03 100e-06 - -* Control Statements -.control -run -plot v(1) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.net b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.net deleted file mode 100644 index 6696e60..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.net +++ /dev/null @@ -1,76 +0,0 @@ -# EESchema Netlist Version 1.1 created Thursday 18 April 2013 11:00:24 AM IST -( - ( /516F84E1 R1 v1 SINE {Lib=SINE} - ( 1 N-000005 ) - ( 2 GND ) - ) - ( /516D117B $noname U3 VPLOT8_1 {Lib=VPLOT8_1} - ( 1 N-000004 ) - ) - ( /516D1019 $noname U1 IPLOT {Lib=IPLOT} - ( 1 N-000002 ) - ( 2 N-000003 ) - ) - ( /516D0FEC $noname U2 IPLOT {Lib=IPLOT} - ( 1 N-000003 ) - ( 2 N-000001 ) - ) - ( /516D0FE2 $noname R2 10000 {Lib=R} - ( 1 N-000004 ) - ( 2 N-000001 ) - ) - ( /516D0F10 $noname R1 1000 {Lib=R} - ( 1 N-000002 ) - ( 2 N-000005 ) - ) - ( /516D0E60 $noname X1 UA741 {Lib=UA741} - ( 2 N-000003 ) - ( 3 GND ) - ( 6 N-000004 ) - ) -) -* -{ Allowed footprints by component: -$component v1 - 1_pin -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component X1 - DIP-8__300 -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "" "" - R2 2 - U2 2 -Net 2 "" "" - R1 1 - U1 1 -Net 3 "" "" - X1 2 - U2 1 - U1 2 -Net 4 "" "" - U3 1 - R2 1 - X1 6 -Net 5 "" "" - v1 1 - R1 2 -Net 6 "GND" "GND" - X1 3 - v1 2 -} -#End diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.pro deleted file mode 100644 index 2d33bde..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 02:06:21 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.proj deleted file mode 100644 index fb6ad90..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.1.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.sch deleted file mode 100644 index 9267154..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/example_5.1.sch +++ /dev/null @@ -1,163 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 10:18:21 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L SINE v1 -U 1 1 516F84E1 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "SINE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 7150 3300 6350 3300 -Wire Wire Line - 5300 2400 5300 3200 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4200 5350 3400 -Connection ~ 5300 3200 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 6900 2400 7050 2400 -Wire Wire Line - 7050 2400 7050 3300 -Wire Wire Line - 6400 2400 5800 2400 -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7050 3600 -F 0 "U3" H 6900 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 7200 3700 50 0000 C CNN - 1 7050 3600 - -1 0 0 1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG1" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2400 -F 0 "U2" H 5400 2500 50 0000 C CNN -F 1 "IPLOT" H 5700 2500 50 0000 C CNN - 1 5550 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6650 2400 -F 0 "R2" V 6730 2400 50 0000 C CNN -F 1 "10000" V 6650 2400 50 0000 C CNN - 1 6650 2400 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR1" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741-cache.lib deleted file mode 100644 index e9ec641..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741-cache.lib +++ /dev/null @@ -1,63 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 02:55:26 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.pro deleted file mode 100644 index 46bdf8d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Tuesday 16 April 2013 02:56:39 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.1/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/analysis deleted file mode 100644 index 63f4a40..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/analysis +++ /dev/null @@ -1,8 +0,0 @@ - -.ac lin 20 1Hz 10Meg - - -.end -.control -run -.endc diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.bak deleted file mode 100644 index 3c7e9ce..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.bak +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 12 May 2013 08:39:09 PM IST -#encoding utf-8 -# -# AC -# -DEF AC AC 0 40 Y Y 1 F N -F0 "AC" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.lib deleted file mode 100644 index 1541b6a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10-cache.lib +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:50:16 PM IST -#encoding utf-8 -# -# AC -# -DEF AC AC 0 40 Y Y 1 F N -F0 "AC" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.bak deleted file mode 100644 index 7d24c57..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.bak +++ /dev/null @@ -1,143 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 12 May 2013 08:39:09 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.10-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "12 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5200 3800 -$Comp -L VPLOT8_1 U1 -U 1 1 51877E04 -P 5200 4100 -F 0 "U1" H 5050 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5350 4200 50 0000 C CNN - 1 5200 4100 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 51877DFD -P 6500 3400 -F 0 "U1" H 6350 3500 50 0000 C CNN -F 1 "VPLOT8_1" H 6650 3500 50 0000 C CNN - 2 6500 3400 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 51877DEF -P 4850 4700 -F 0 "#FLG01" H 4850 4970 30 0001 C CNN -F 1 "PWR_FLAG" H 4850 4930 30 0000 C CNN - 1 4850 4700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 51877DE4 -P 4850 4850 -F 0 "#PWR02" H 4850 4850 30 0001 C CNN -F 1 "GND" H 4850 4780 30 0001 C CNN - 1 4850 4850 - 1 0 0 -1 -$EndComp -Connection ~ 4850 4700 -Wire Wire Line - 4850 4700 4850 4850 -Connection ~ 6350 3700 -Wire Wire Line - 6500 3700 6250 3700 -Wire Wire Line - 5050 3800 5250 3800 -Wire Wire Line - 5250 3600 5050 3600 -Wire Wire Line - 5150 3600 5150 3200 -Connection ~ 5150 3600 -Wire Wire Line - 5150 3200 6350 3200 -Wire Wire Line - 6350 3200 6350 3700 -Wire Wire Line - 4550 3600 4550 4700 -Wire Wire Line - 4550 4700 5050 4700 -$Comp -L AC V1 -U 1 1 51877DB5 -P 5050 4250 -F 0 "V1" H 4850 4350 60 0000 C CNN -F 1 "AC" H 4850 4200 60 0000 C CNN -F 2 "R1" H 4750 4250 60 0000 C CNN - 1 5050 4250 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 51877DA4 -P 4800 3600 -F 0 "R1" V 4880 3600 50 0000 C CNN -F 1 "R" V 4800 3600 50 0000 C CNN - 1 4800 3600 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 51877D93 -P 5750 3700 -F 0 "X1" H 5900 3850 60 0000 C CNN -F 1 "UA741" H 5900 3950 60 0000 C CNN - 1 5750 3700 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir deleted file mode 100644 index 103691f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:50:12 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R2 1 4 100k -U1 3 1 VPLOT8_1 -V1 3 0 AC -R1 4 0 1k -X1 3 4 1 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.ckt deleted file mode 100644 index b3db0c4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.ckt +++ /dev/null @@ -1,12 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:50:12 pm ist -.include ua741.sub - -r2 1 4 100k -* Plotting option vplot8_1 -v1 3 0 ac 1 -r1 4 0 1k -x1 3 4 1 ua741 - -.ac lin 10 1Hz 1Meg -.plot v(3) v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.out deleted file mode 100644 index 3554667..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.cir.out +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:50:12 pm ist -.include ua741.sub - -r2 1 4 100k -* Plotting option vplot8_1 -v1 3 0 ac 1 -r1 4 0 1k -x1 3 4 1 ua741 - -.ac lin 10 1Hz 1Meg - -* Control Statements -.control -run -plot v(3) v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.pro deleted file mode 100644 index 77913bc..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 06 May 2013 03:19:21 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.proj deleted file mode 100644 index 81a471e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.10.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.sch deleted file mode 100644 index 8601e68..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/example_5.10.sch +++ /dev/null @@ -1,154 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 01:50:16 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.10-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6000 3200 6350 3200 -Connection ~ 5200 3800 -Connection ~ 4850 4700 -Wire Wire Line - 4850 4700 4850 4850 -Connection ~ 6350 3700 -Wire Wire Line - 6500 3700 6250 3700 -Wire Wire Line - 5050 3800 5250 3800 -Wire Wire Line - 5250 3600 5050 3600 -Wire Wire Line - 5150 3600 5150 3200 -Connection ~ 5150 3600 -Wire Wire Line - 6350 3200 6350 3700 -Wire Wire Line - 4550 3600 4550 4700 -Wire Wire Line - 4550 4700 5050 4700 -Wire Wire Line - 5150 3200 5500 3200 -$Comp -L R R2 -U 1 1 5190A20F -P 5750 3200 -F 0 "R2" V 5830 3200 50 0000 C CNN -F 1 "100k" V 5750 3200 50 0000 C CNN - 1 5750 3200 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 51877E04 -P 5200 4100 -F 0 "U1" H 5050 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5350 4200 50 0000 C CNN - 1 5200 4100 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 51877DFD -P 6500 3400 -F 0 "U1" H 6350 3500 50 0000 C CNN -F 1 "VPLOT8_1" H 6650 3500 50 0000 C CNN - 2 6500 3400 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 51877DEF -P 4850 4700 -F 0 "#FLG1" H 4850 4970 30 0001 C CNN -F 1 "PWR_FLAG" H 4850 4930 30 0000 C CNN - 1 4850 4700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR1 -U 1 1 51877DE4 -P 4850 4850 -F 0 "#PWR1" H 4850 4850 30 0001 C CNN -F 1 "GND" H 4850 4780 30 0001 C CNN - 1 4850 4850 - 1 0 0 -1 -$EndComp -$Comp -L AC V1 -U 1 1 51877DB5 -P 5050 4250 -F 0 "V1" H 4850 4350 60 0000 C CNN -F 1 "AC" H 4850 4200 60 0000 C CNN -F 2 "R1" H 4750 4250 60 0000 C CNN - 1 5050 4250 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 51877DA4 -P 4800 3600 -F 0 "R1" V 4880 3600 50 0000 C CNN -F 1 "1k" V 4800 3600 50 0000 C CNN - 1 4800 3600 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 51877D93 -P 5750 3700 -F 0 "X1" H 5900 3850 60 0000 C CNN -F 1 "UA741" H 5900 3950 60 0000 C CNN - 1 5750 3700 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.bak deleted file mode 100644 index 696ddb5..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.bak +++ /dev/null @@ -1,116 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 07 May 2013 04:32:37 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCCS -# -DEF VCCS G 0 40 Y Y 1 F N -F0 "G" -200 100 50 H V C CNN -F1 "VCCS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.lib deleted file mode 100644 index 4ffd70b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741-cache.lib +++ /dev/null @@ -1,116 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 08 May 2013 02:27:06 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCCS -# -DEF VCCS G 0 40 Y Y 1 F N -F0 "G" -200 100 50 H V C CNN -F1 "VCCS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.pro deleted file mode 100644 index e55b2df..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Sunday 12 May 2013 08:34:27 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.10/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/analysis deleted file mode 100644 index 7946c35..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2-cache.lib deleted file mode 100644 index 40f51d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2-cache.lib +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 03:05:48 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.bak deleted file mode 100644 index 9eb4b13..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.bak +++ /dev/null @@ -1,171 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 02:59:48 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 6400 3350 6400 2950 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4200 5350 3400 -Connection ~ 5300 3200 -Wire Wire Line - 5300 2950 5300 3200 -Wire Wire Line - 5350 3200 5250 3200 -Connection ~ 6400 3300 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Wire Wire Line - 6350 3300 6400 3300 -Connection ~ 6350 3300 -Connection ~ 6400 3350 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 6700 3350 -F 0 "U3" H 6550 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 6850 3450 50 0000 C CNN - 1 6700 3350 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "100000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516D0FD3 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "100m" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir deleted file mode 100644 index b0ee189..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir +++ /dev/null @@ -1,19 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 03:05:45 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U5 3 8 IPLOT -U4 2 VPLOT8_1 -R3 0 2 100000 -R4 3 2 100000 -U3 8 VPLOT8_1 -U1 6 4 IPLOT -U2 4 5 IPLOT -R2 2 5 100000 -v1 7 0 100m -R1 6 7 1000 -X1 4 0 8 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.ckt deleted file mode 100644 index ea512f4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.ckt +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 03:05:45 pm ist -.include ua741.sub - -V_u5 3 8 0 -* Plotting option vplot8_1 -r3 0 2 100000 -r4 3 2 100000 -* Plotting option vplot8_1 -V_u1 6 4 0 -V_u2 4 5 0 -r2 2 5 100000 -v1 7 0 100m -r1 6 7 1000 -x1 4 0 8 ua741 - -.dc v1 0e-00 5e-00 5e-03 -.plot i(V_u5) -.plot v(2) -.plot v(8) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.out deleted file mode 100644 index fdcc306..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.cir.out +++ /dev/null @@ -1,27 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 03:05:45 pm ist -.include ua741.sub - -V_u5 3 8 0 -* Plotting option vplot8_1 -r3 0 2 100000 -r4 3 2 100000 -* Plotting option vplot8_1 -V_u1 6 4 0 -V_u2 4 5 0 -r2 2 5 100000 -v1 7 0 100m -r1 6 7 1000 -x1 4 0 8 ua741 - -.dc v1 0e-00 5e-00 5e-03 - -* Control Statements -.control -run -plot i(V_u5) -plot v(2) -plot v(8) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.pro deleted file mode 100644 index 4197879..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 02:59:20 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.proj deleted file mode 100644 index e56c1d2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.2.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.sch deleted file mode 100644 index 5dbaecc..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/example_5.2.sch +++ /dev/null @@ -1,224 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 03:05:48 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 7000 3000 7000 3350 -Connection ~ 7000 2400 -Connection ~ 6450 2500 -Connection ~ 6450 2400 -Wire Wire Line - 6350 3300 7000 3300 -Wire Wire Line - 6450 2900 6450 3000 -Connection ~ 7000 3350 -Connection ~ 6350 3300 -Connection ~ 5350 4100 -Wire Wire Line - 4150 3200 4050 3200 -Wire Wire Line - 5900 2400 5800 2400 -Connection ~ 7000 3300 -Wire Wire Line - 5350 3200 5250 3200 -Connection ~ 5300 3200 -Wire Wire Line - 5350 4200 5350 3400 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 6400 2400 6500 2400 -Wire Wire Line - 5300 2400 5300 3200 -Wire Wire Line - 7000 2400 7000 2500 -$Comp -L IPLOT U5 -U 1 1 516D1AB3 -P 7000 2750 -F 0 "U5" H 6850 2850 50 0000 C CNN -F 1 "IPLOT" H 7150 2850 50 0000 C CNN - 1 7000 2750 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U4 -U 1 1 516D1A8F -P 6450 2100 -F 0 "U4" H 6300 2200 50 0000 C CNN -F 1 "VPLOT8_1" H 6600 2200 50 0000 C CNN - 1 6450 2100 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR01 -U 1 1 516D1A5C -P 6450 3000 -F 0 "#PWR01" H 6450 3000 30 0001 C CNN -F 1 "GND" H 6450 2930 30 0001 C CNN - 1 6450 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 516D1A47 -P 6450 2650 -F 0 "R3" V 6530 2650 50 0000 C CNN -F 1 "100000" V 6450 2650 50 0000 C CNN - 1 6450 2650 - -1 0 0 1 -$EndComp -$Comp -L R R4 -U 1 1 516D1A3E -P 6750 2400 -F 0 "R4" V 6830 2400 50 0000 C CNN -F 1 "100000" V 6750 2400 50 0000 C CNN - 1 6750 2400 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG02" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7300 3350 -F 0 "U3" H 7150 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 7450 3450 50 0000 C CNN - 1 7300 3350 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG03" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2400 -F 0 "U2" H 5400 2500 50 0000 C CNN -F 1 "IPLOT" H 5700 2500 50 0000 C CNN - 1 5550 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2400 -F 0 "R2" V 6230 2400 50 0000 C CNN -F 1 "100000" V 6150 2400 50 0000 C CNN - 1 6150 2400 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516D0FD3 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "100m" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR04" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.pro deleted file mode 100644 index 34303c7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Tuesday 16 April 2013 03:06:44 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.2/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/analysis deleted file mode 100644 index 7946c35..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.bak deleted file mode 100644 index e6f6afe..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.bak +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 09:35:11 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.lib deleted file mode 100644 index 4daeb80..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3-cache.lib +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 21 May 2013 11:13:50 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.bak deleted file mode 100644 index d0ef6de..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.bak +++ /dev/null @@ -1,182 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 09:35:11 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 7050 3300 7050 2950 -Wire Wire Line - 6450 3300 6350 3300 -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 3400 5350 4200 -Connection ~ 5300 3200 -Wire Wire Line - 5300 2950 5300 3200 -Wire Wire Line - 5250 3200 5350 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 7050 3300 6950 3300 -Wire Wire Line - 7050 2950 6400 2950 -$Comp -L R R3 -U 1 1 516D1D5E -P 6700 3300 -F 0 "R3" V 6780 3300 50 0000 C CNN -F 1 "100k" V 6700 3300 50 0000 C CNN - 1 6700 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "1000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516D0FD3 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "10" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "10" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir deleted file mode 100644 index 25f7e67..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 15 May 2013 09:29:30 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R3 1 7 100k -U3 1 VPLOT8_1 -U1 5 2 IPLOT -U2 2 3 IPLOT -R2 1 3 1000 -v1 6 0 10 -R1 5 6 10 -X1 2 0 7 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.ckt deleted file mode 100644 index 5cc8d66..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 09:29:30 pm ist -.include ua741.sub - -r3 1 7 100k -* Plotting option vplot8_1 -V_u1 5 2 0 -V_u2 2 3 0 -r2 1 3 1000 -v1 6 0 10 -r1 5 6 10 -x1 2 0 7 ua741 - -.dc v1 0e-00 5e-00 5e-03 -.plot v(1) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.out deleted file mode 100644 index 1d3b745..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 09:29:30 pm ist -.include ua741.sub - -r3 1 7 100k -* Plotting option vplot8_1 -V_u1 5 2 0 -V_u2 2 3 0 -r2 1 3 1000 -v1 6 0 10 -r1 5 6 10 -x1 2 0 7 ua741 - -.dc v1 0e-00 5e-00 5e-03 - -* Control Statements -.control -run -plot v(1) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.pro deleted file mode 100644 index 68ef472..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 03:20:48 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.proj deleted file mode 100644 index 36f23a8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.3.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.sch deleted file mode 100644 index a549a57..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/example_5.3.sch +++ /dev/null @@ -1,183 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 21 May 2013 11:13:50 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "21 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 7050 3300 7050 2950 -Wire Wire Line - 6450 3300 6350 3300 -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 3400 5350 4200 -Connection ~ 5300 3200 -Wire Wire Line - 5300 2950 5300 3200 -Wire Wire Line - 5250 3200 5350 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 7050 3300 6950 3300 -Wire Wire Line - 7050 2950 6400 2950 -$Comp -L R RL -U 1 1 516D1D5E -P 6700 3300 -F 0 "RL" V 6780 3300 50 0000 C CNN -F 1 "100k" V 6700 3300 50 0000 C CNN - 1 6700 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R Rf -U 1 1 516D0FE2 -P 6150 2950 -F 0 "Rf" V 6230 2950 50 0000 C CNN -F 1 "1000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516D0FD3 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "10" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "10" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.pro deleted file mode 100644 index 1f35813..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Wednesday 15 May 2013 09:42:35 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.3/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/analysis deleted file mode 100644 index 35318bb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.bak deleted file mode 100644 index c4ca8fc..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.bak +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 17 April 2013 12:43:16 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.lib deleted file mode 100644 index 18a7cf4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4-cache.lib +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 17 April 2013 12:47:25 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.bak deleted file mode 100644 index f68a6c8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.bak +++ /dev/null @@ -1,345 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 17 April 2013 12:43:16 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 1400 6300 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D2826 -P 1400 6300 -F 0 "#FLG01" H 1400 6570 30 0001 C CNN -F 1 "PWR_FLAG" H 1400 6530 30 0000 C CNN - 1 1400 6300 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516D27F8 -P 1400 6450 -F 0 "#PWR02" H 1400 6450 30 0001 C CNN -F 1 "GND" H 1400 6380 30 0001 C CNN - 1 1400 6450 - 1 0 0 -1 -$EndComp -Connection ~ 1400 6100 -Wire Wire Line - 1400 6100 1400 6450 -Connection ~ 2400 3250 -Connection ~ 4500 3450 -Connection ~ 4500 4400 -Connection ~ 6750 3900 -Wire Wire Line - 5100 4700 5100 4850 -Wire Wire Line - 1600 5200 1600 5000 -Wire Wire Line - 1600 5000 2400 5000 -Connection ~ 3650 4900 -Wire Wire Line - 3900 4400 3900 4900 -Wire Wire Line - 3900 4900 3400 4900 -Connection ~ 2400 4500 -Wire Wire Line - 2400 4500 2600 4500 -Wire Wire Line - 3650 3000 3650 3550 -Wire Wire Line - 3650 3550 3100 3550 -Wire Wire Line - 2400 4250 2400 4800 -Wire Wire Line - 6750 3900 6750 3950 -Wire Wire Line - 6750 3950 6150 3950 -Wire Wire Line - 5300 3350 5100 3350 -Connection ~ 5100 3850 -Wire Wire Line - 5100 3350 5100 3850 -Wire Wire Line - 4400 3450 4550 3450 -Wire Wire Line - 4550 3450 4550 3850 -Wire Wire Line - 5150 3850 5050 3850 -Wire Wire Line - 5150 4050 5050 4050 -Wire Wire Line - 4550 4050 4550 4400 -Wire Wire Line - 4550 4400 4400 4400 -Wire Wire Line - 5800 3350 5950 3350 -Wire Wire Line - 6450 3350 6450 3950 -Connection ~ 6450 3950 -Wire Wire Line - 2400 3750 2400 3100 -Wire Wire Line - 2400 3550 2600 3550 -Connection ~ 2400 3550 -Wire Wire Line - 3400 3000 3900 3000 -Wire Wire Line - 3900 3000 3900 3450 -Connection ~ 3650 3000 -Wire Wire Line - 3100 4500 3650 4500 -Wire Wire Line - 3650 4500 3650 4900 -Wire Wire Line - 2400 2900 1150 2900 -Wire Wire Line - 1150 2900 1150 3600 -Wire Wire Line - 5100 4050 5100 4200 -Connection ~ 5100 4050 -Wire Wire Line - 1150 4500 1150 6100 -Wire Wire Line - 1150 6100 1600 6100 -$Comp -L DC v2 -U 1 1 516D27D5 -P 1600 5650 -F 0 "v2" H 1400 5750 60 0000 C CNN -F 1 "DC" H 1400 5600 60 0000 C CNN -F 2 "R1" H 1300 5650 60 0000 C CNN - 1 1600 5650 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 516D27D0 -P 1150 4050 -F 0 "v1" H 950 4150 60 0000 C CNN -F 1 "DC" H 950 4000 60 0000 C CNN -F 2 "R1" H 850 4050 60 0000 C CNN - 1 1150 4050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 516D27AE -P 2400 4200 -F 0 "U1" H 2250 4300 50 0000 C CNN -F 1 "VPLOT8_1" H 2550 4300 50 0000 C CNN - 2 2400 4200 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 516D27A5 -P 2400 3250 -F 0 "U1" H 2250 3350 50 0000 C CNN -F 1 "VPLOT8_1" H 2550 3350 50 0000 C CNN - 1 2400 3250 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 5 1 516D278E -P 6750 3600 -F 0 "U1" H 6600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 6900 3700 50 0000 C CNN - 5 6750 3600 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 4 1 516D2789 -P 4500 4100 -F 0 "U1" H 4350 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 4650 4200 50 0000 C CNN - 4 4500 4100 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 3 1 516D2785 -P 4500 3150 -F 0 "U1" H 4350 3250 50 0000 C CNN -F 1 "VPLOT8_1" H 4650 3250 50 0000 C CNN - 3 4500 3150 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D274C -P 5100 4850 -F 0 "#PWR03" H 5100 4850 30 0001 C CNN -F 1 "GND" H 5100 4780 30 0001 C CNN - 1 5100 4850 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 516D2736 -P 5100 4450 -F 0 "R6" V 5180 4450 50 0000 C CNN -F 1 "R" V 5100 4450 50 0000 C CNN - 1 5100 4450 - -1 0 0 1 -$EndComp -$Comp -L R R3 -U 1 1 516D26F4 -P 2850 4500 -F 0 "R3" V 2930 4500 50 0000 C CNN -F 1 "R" V 2850 4500 50 0000 C CNN - 1 2850 4500 - 0 -1 -1 0 -$EndComp -$Comp -L R R2 -U 1 1 516D26CE -P 2850 3550 -F 0 "R2" V 2930 3550 50 0000 C CNN -F 1 "R" V 2850 3550 50 0000 C CNN - 1 2850 3550 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516D26AE -P 2400 4000 -F 0 "R1" V 2480 4000 50 0000 C CNN -F 1 "R" V 2400 4000 50 0000 C CNN - 1 2400 4000 - -1 0 0 1 -$EndComp -$Comp -L R R7 -U 1 1 516D268C -P 6200 3350 -F 0 "R7" V 6280 3350 50 0000 C CNN -F 1 "R" V 6200 3350 50 0000 C CNN - 1 6200 3350 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516D267F -P 5550 3350 -F 0 "U4" H 5400 3450 50 0000 C CNN -F 1 "IPLOT" H 5700 3450 50 0000 C CNN - 1 5550 3350 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X2 -U 1 1 516D2661 -P 2900 4900 -F 0 "X2" H 3050 5050 60 0000 C CNN -F 1 "UA741" H 3050 5150 60 0000 C CNN - 1 2900 4900 - 1 0 0 1 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D2656 -P 2900 3000 -F 0 "X1" H 3050 3150 60 0000 C CNN -F 1 "UA741" H 3050 3250 60 0000 C CNN - 1 2900 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516D264E -P 4150 4400 -F 0 "U3" H 4000 4500 50 0000 C CNN -F 1 "IPLOT" H 4300 4500 50 0000 C CNN - 1 4150 4400 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D2648 -P 4150 3450 -F 0 "U2" H 4000 3550 50 0000 C CNN -F 1 "IPLOT" H 4300 3550 50 0000 C CNN - 1 4150 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 516D2600 -P 4800 4050 -F 0 "R5" V 4880 4050 50 0000 C CNN -F 1 "R" V 4800 4050 50 0000 C CNN - 1 4800 4050 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 516D25EC -P 4800 3850 -F 0 "R4" V 4880 3850 50 0000 C CNN -F 1 "R" V 4800 3850 50 0000 C CNN - 1 4800 3850 - 0 1 1 0 -$EndComp -$Comp -L UA741 X3 -U 1 1 516D25CD -P 5650 3950 -F 0 "X3" H 5800 4100 60 0000 C CNN -F 1 "UA741" H 5800 4200 60 0000 C CNN - 1 5650 3950 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir deleted file mode 100644 index 4788ef3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir +++ /dev/null @@ -1,24 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 17 April 2013 12:47:21 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v2 5 0 10V -v1 9 0 20V -U1 3 4 6 2 11 VPLOT8_1 -R6 0 7 R -R3 4 12 R -R2 3 8 R -R1 4 3 R -R7 11 10 R -U4 13 10 IPLOT -X2 4 5 12 UA741 -X1 3 9 8 UA741 -U3 12 2 IPLOT -U2 8 6 IPLOT -R5 7 2 R -R4 13 6 R -X3 13 7 11 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.ckt deleted file mode 100644 index 2fc3967..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.ckt +++ /dev/null @@ -1,26 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:47:21 pm ist -.include ua741.sub - -v2 5 0 10v -v1 9 0 20v -* Plotting option vplot8_1 -r6 0 7 r -r3 4 12 r -r2 3 8 r -r1 4 3 r -r7 11 10 r -V_u4 13 10 0 -x2 4 5 12 ua741 -x1 3 9 8 ua741 -V_u3 12 2 0 -V_u2 8 6 0 -r5 7 2 r -r4 13 6 r -x3 13 7 11 ua741 - -.dc v1 0e-00 10e-00 5e-03 -.plot v(3) v(4) v(6) v(2) v(11) -.plot i(V_u4) -.plot i(V_u3) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.out deleted file mode 100644 index 98912a5..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.cir.out +++ /dev/null @@ -1,31 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:47:21 pm ist -.include ua741.sub - -v2 5 0 10v -v1 9 0 20v -* Plotting option vplot8_1 -r6 0 7 r -r3 4 12 r -r2 3 8 r -r1 4 3 r -r7 11 10 r -V_u4 13 10 0 -x2 4 5 12 ua741 -x1 3 9 8 ua741 -V_u3 12 2 0 -V_u2 8 6 0 -r5 7 2 r -r4 13 6 r -x3 13 7 11 ua741 - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot v(3) v(4) v(6) v(2) v(11) -plot i(V_u4) -plot i(V_u3) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.pro deleted file mode 100644 index ac34f0e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 03:49:31 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.proj deleted file mode 100644 index 799253b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.sch deleted file mode 100644 index 8b83c0d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/example_5.4.sch +++ /dev/null @@ -1,345 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 17 April 2013 12:47:25 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 1400 6300 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D2826 -P 1400 6300 -F 0 "#FLG01" H 1400 6570 30 0001 C CNN -F 1 "PWR_FLAG" H 1400 6530 30 0000 C CNN - 1 1400 6300 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516D27F8 -P 1400 6450 -F 0 "#PWR02" H 1400 6450 30 0001 C CNN -F 1 "GND" H 1400 6380 30 0001 C CNN - 1 1400 6450 - 1 0 0 -1 -$EndComp -Connection ~ 1400 6100 -Wire Wire Line - 1400 6100 1400 6450 -Connection ~ 2400 3250 -Connection ~ 4500 3450 -Connection ~ 4500 4400 -Connection ~ 6750 3900 -Wire Wire Line - 5100 4700 5100 4850 -Wire Wire Line - 1600 5200 1600 5000 -Wire Wire Line - 1600 5000 2400 5000 -Connection ~ 3650 4900 -Wire Wire Line - 3900 4400 3900 4900 -Wire Wire Line - 3900 4900 3400 4900 -Connection ~ 2400 4500 -Wire Wire Line - 2400 4500 2600 4500 -Wire Wire Line - 3650 3000 3650 3550 -Wire Wire Line - 3650 3550 3100 3550 -Wire Wire Line - 2400 4250 2400 4800 -Wire Wire Line - 6750 3900 6750 3950 -Wire Wire Line - 6750 3950 6150 3950 -Wire Wire Line - 5300 3350 5100 3350 -Connection ~ 5100 3850 -Wire Wire Line - 5100 3350 5100 3850 -Wire Wire Line - 4400 3450 4550 3450 -Wire Wire Line - 4550 3450 4550 3850 -Wire Wire Line - 5150 3850 5050 3850 -Wire Wire Line - 5150 4050 5050 4050 -Wire Wire Line - 4550 4050 4550 4400 -Wire Wire Line - 4550 4400 4400 4400 -Wire Wire Line - 5800 3350 5950 3350 -Wire Wire Line - 6450 3350 6450 3950 -Connection ~ 6450 3950 -Wire Wire Line - 2400 3750 2400 3100 -Wire Wire Line - 2400 3550 2600 3550 -Connection ~ 2400 3550 -Wire Wire Line - 3400 3000 3900 3000 -Wire Wire Line - 3900 3000 3900 3450 -Connection ~ 3650 3000 -Wire Wire Line - 3100 4500 3650 4500 -Wire Wire Line - 3650 4500 3650 4900 -Wire Wire Line - 2400 2900 1150 2900 -Wire Wire Line - 1150 2900 1150 3600 -Wire Wire Line - 5100 4050 5100 4200 -Connection ~ 5100 4050 -Wire Wire Line - 1150 4500 1150 6100 -Wire Wire Line - 1150 6100 1600 6100 -$Comp -L DC v2 -U 1 1 516D27D5 -P 1600 5650 -F 0 "v2" H 1400 5750 60 0000 C CNN -F 1 "10V" H 1400 5600 60 0000 C CNN -F 2 "R1" H 1300 5650 60 0000 C CNN - 1 1600 5650 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 516D27D0 -P 1150 4050 -F 0 "v1" H 950 4150 60 0000 C CNN -F 1 "20V" H 950 4000 60 0000 C CNN -F 2 "R1" H 850 4050 60 0000 C CNN - 1 1150 4050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 516D27AE -P 2400 4200 -F 0 "U1" H 2250 4300 50 0000 C CNN -F 1 "VPLOT8_1" H 2550 4300 50 0000 C CNN - 2 2400 4200 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 516D27A5 -P 2400 3250 -F 0 "U1" H 2250 3350 50 0000 C CNN -F 1 "VPLOT8_1" H 2550 3350 50 0000 C CNN - 1 2400 3250 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 5 1 516D278E -P 6750 3600 -F 0 "U1" H 6600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 6900 3700 50 0000 C CNN - 5 6750 3600 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 4 1 516D2789 -P 4500 4100 -F 0 "U1" H 4350 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 4650 4200 50 0000 C CNN - 4 4500 4100 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 3 1 516D2785 -P 4500 3150 -F 0 "U1" H 4350 3250 50 0000 C CNN -F 1 "VPLOT8_1" H 4650 3250 50 0000 C CNN - 3 4500 3150 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D274C -P 5100 4850 -F 0 "#PWR03" H 5100 4850 30 0001 C CNN -F 1 "GND" H 5100 4780 30 0001 C CNN - 1 5100 4850 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 516D2736 -P 5100 4450 -F 0 "R6" V 5180 4450 50 0000 C CNN -F 1 "R" V 5100 4450 50 0000 C CNN - 1 5100 4450 - -1 0 0 1 -$EndComp -$Comp -L R R3 -U 1 1 516D26F4 -P 2850 4500 -F 0 "R3" V 2930 4500 50 0000 C CNN -F 1 "R" V 2850 4500 50 0000 C CNN - 1 2850 4500 - 0 -1 -1 0 -$EndComp -$Comp -L R R2 -U 1 1 516D26CE -P 2850 3550 -F 0 "R2" V 2930 3550 50 0000 C CNN -F 1 "R" V 2850 3550 50 0000 C CNN - 1 2850 3550 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516D26AE -P 2400 4000 -F 0 "R1" V 2480 4000 50 0000 C CNN -F 1 "R" V 2400 4000 50 0000 C CNN - 1 2400 4000 - -1 0 0 1 -$EndComp -$Comp -L R R7 -U 1 1 516D268C -P 6200 3350 -F 0 "R7" V 6280 3350 50 0000 C CNN -F 1 "R" V 6200 3350 50 0000 C CNN - 1 6200 3350 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516D267F -P 5550 3350 -F 0 "U4" H 5400 3450 50 0000 C CNN -F 1 "IPLOT" H 5700 3450 50 0000 C CNN - 1 5550 3350 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X2 -U 1 1 516D2661 -P 2900 4900 -F 0 "X2" H 3050 5050 60 0000 C CNN -F 1 "UA741" H 3050 5150 60 0000 C CNN - 1 2900 4900 - 1 0 0 1 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D2656 -P 2900 3000 -F 0 "X1" H 3050 3150 60 0000 C CNN -F 1 "UA741" H 3050 3250 60 0000 C CNN - 1 2900 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516D264E -P 4150 4400 -F 0 "U3" H 4000 4500 50 0000 C CNN -F 1 "IPLOT" H 4300 4500 50 0000 C CNN - 1 4150 4400 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D2648 -P 4150 3450 -F 0 "U2" H 4000 3550 50 0000 C CNN -F 1 "IPLOT" H 4300 3550 50 0000 C CNN - 1 4150 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 516D2600 -P 4800 4050 -F 0 "R5" V 4880 4050 50 0000 C CNN -F 1 "R" V 4800 4050 50 0000 C CNN - 1 4800 4050 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 516D25EC -P 4800 3850 -F 0 "R4" V 4880 3850 50 0000 C CNN -F 1 "R" V 4800 3850 50 0000 C CNN - 1 4800 3850 - 0 1 1 0 -$EndComp -$Comp -L UA741 X3 -U 1 1 516D25CD -P 5650 3950 -F 0 "X3" H 5800 4100 60 0000 C CNN -F 1 "UA741" H 5800 4200 60 0000 C CNN - 1 5650 3950 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.pro deleted file mode 100644 index 0d94955..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Wednesday 17 April 2013 12:46:01 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.4/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/analysis deleted file mode 100644 index c9183fa..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-03 20e-03 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.bak deleted file mode 100644 index 79f0251..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 17 April 2013 11:57:44 AM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.lib deleted file mode 100644 index 951b224..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 17 April 2013 12:50:53 PM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.bak deleted file mode 100644 index 9eaa078..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.bak +++ /dev/null @@ -1,171 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 17 April 2013 11:57:44 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L SINE v1 -U 1 1 516E3BC9 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "SINE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 6350 3300 7050 3300 -Wire Wire Line - 6400 2950 7050 2950 -Connection ~ 7050 3300 -Connection ~ 6350 3300 -Connection ~ 5350 4100 -Wire Wire Line - 4150 3200 4050 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 5300 2950 5300 3200 -Connection ~ 5300 3200 -Wire Wire Line - 5350 4200 5350 3400 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 7050 2950 7050 3300 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "9000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir deleted file mode 100644 index cbcca2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 17 April 2013 12:50:50 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R3 6 0 1000 -v1 5 0 SINE -U3 6 VPLOT8_1 -U1 4 2 IPLOT -U2 2 3 IPLOT -R2 6 3 9000 -R1 4 5 1000 -X1 2 0 6 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.ckt deleted file mode 100644 index 6843d47..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:50:50 pm ist -.include ua741.sub - -r3 6 0 1000 -v1 5 0 sine(0 5 50 0 0) -* Plotting option vplot8_1 -V_u1 4 2 0 -V_u2 2 3 0 -r2 6 3 9000 -r1 4 5 1000 -x1 2 0 6 ua741 - -.tran 10e-03 20e-03 0e-00 -.plot v(6) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.out deleted file mode 100644 index 9e60789..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 17 april 2013 12:50:50 pm ist -.include ua741.sub - -r3 6 0 1000 -v1 5 0 sine(0 5 50 0 0) -* Plotting option vplot8_1 -V_u1 4 2 0 -V_u2 2 3 0 -r2 6 3 9000 -r1 4 5 1000 -x1 2 0 6 ua741 - -.tran 10e-03 20e-03 0e-00 - -* Control Statements -.control -run -plot v(6) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.pro deleted file mode 100644 index ead436b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Wednesday 17 April 2013 11:37:31 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.proj deleted file mode 100644 index 8554126..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.6.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.sch deleted file mode 100644 index 73864f6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/example_5.6.sch +++ /dev/null @@ -1,183 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 17 April 2013 12:50:53 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.6-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 4050 4100 7050 4100 -Wire Wire Line - 7050 4100 7050 4000 -Wire Wire Line - 7050 3300 6350 3300 -Wire Wire Line - 6400 2950 7050 2950 -Connection ~ 7050 3300 -Connection ~ 6350 3300 -Connection ~ 5350 4100 -Wire Wire Line - 4150 3200 4050 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 5300 2950 5300 3200 -Connection ~ 5300 3200 -Wire Wire Line - 5350 4200 5350 3400 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 7050 2950 7050 3500 -$Comp -L R R3 -U 1 1 516E4D07 -P 7050 3750 -F 0 "R3" V 7130 3750 50 0000 C CNN -F 1 "1000" V 7050 3750 50 0000 C CNN - 1 7050 3750 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 516E3BC9 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "SINE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "9000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.pro deleted file mode 100644 index 1235eb1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Wednesday 17 April 2013 12:51:39 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.6/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/analysis deleted file mode 100644 index 234e759..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/analysis +++ /dev/null @@ -1,8 +0,0 @@ - -.ac lin 10 1Hz 1Meg - - -.end -.control -run -.endc diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.bak deleted file mode 100644 index bef6862..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.bak +++ /dev/null @@ -1,127 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 10:40:53 PM IST -#encoding utf-8 -# -# AC -# -DEF AC AC 0 40 Y Y 1 F N -F0 "AC" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.lib deleted file mode 100644 index a99ee60..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7-cache.lib +++ /dev/null @@ -1,127 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 10:41:23 PM IST -#encoding utf-8 -# -# AC -# -DEF AC AC 0 40 Y Y 1 F N -F0 "AC" -200 100 60 H V C CNN -F1 "AC" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.bak deleted file mode 100644 index 5b65555..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.bak +++ /dev/null @@ -1,210 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 10:40:53 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.7-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L AC AC1 -U 1 1 5193C186 -P 4050 3650 -F 0 "AC1" H 3850 3750 60 0000 C CNN -F 1 "AC" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 7050 3500 7050 2950 -Connection ~ 6500 2950 -Wire Wire Line - 6500 2950 6500 2550 -Wire Wire Line - 6500 2550 6300 2550 -Connection ~ 5300 2950 -Wire Wire Line - 5300 2550 5300 3200 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4200 5350 3400 -Connection ~ 5300 3200 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 7050 2950 6400 2950 -Wire Wire Line - 6350 3300 7050 3300 -Wire Wire Line - 5800 2550 5900 2550 -Wire Wire Line - 4050 4100 7050 4100 -Wire Wire Line - 7050 4100 7050 4000 -Connection ~ 7050 3400 -$Comp -L R R3 -U 1 1 516E71B7 -P 7050 3750 -F 0 "R3" V 7130 3750 50 0000 C CNN -F 1 "R" V 7050 3750 50 0000 C CNN - 1 7050 3750 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG2 -U 1 1 516E6E61 -P 5350 4100 -F 0 "#FLG2" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516E6E43 -P 7350 3400 -F 0 "U3" H 7200 3500 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3500 50 0000 C CNN - 1 7350 3400 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG1" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L C C1 -U 1 1 516E6B62 -P 6100 2550 -F 0 "C1" H 6150 2650 50 0000 L CNN -F 1 "1.59n" H 6150 2450 50 0000 L CNN - 1 6100 2550 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516E6B56 -P 5550 2550 -F 0 "U4" H 5400 2650 50 0000 C CNN -F 1 "IPLOT" H 5700 2650 50 0000 C CNN - 1 5550 2550 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "10000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR1" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir deleted file mode 100644 index 944330f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 15 May 2013 10:41:20 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 6 0 AC -R3 7 0 R -U3 7 VPLOT8_1 -C1 7 3 1.59n -U4 1 3 IPLOT -U1 5 1 IPLOT -U2 1 4 IPLOT -R2 7 4 10000 -R1 5 6 1000 -X1 1 0 7 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.ckt deleted file mode 100644 index 28de072..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.ckt +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 10:41:20 pm ist -.include ua741.sub - -v1 6 0 ac 1 -r3 7 0 r -* Plotting option vplot8_1 -c1 7 3 1.59n -V_u4 1 3 0 -V_u1 5 1 0 -V_u2 1 4 0 -r2 7 4 10000 -r1 5 6 1000 -x1 1 0 7 ua741 - -.ac lin 10 1Hz 1Meg -.plot v(7) -.plot i(V_u4) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.out deleted file mode 100644 index 9002bf8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.cir.out +++ /dev/null @@ -1,25 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 10:41:20 pm ist -.include ua741.sub - -v1 6 0 ac 1 -r3 7 0 r -* Plotting option vplot8_1 -c1 7 3 1.59n -V_u4 1 3 0 -V_u1 5 1 0 -V_u2 1 4 0 -r2 7 4 10000 -r1 5 6 1000 -x1 1 0 7 ua741 - -.ac lin 10 1Hz 1Meg - -* Control Statements -.control -run -plot v(7) -plot i(V_u4) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.pro deleted file mode 100644 index a2b4ce1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Wednesday 17 April 2013 12:56:50 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.proj deleted file mode 100644 index 304c734..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.7.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.sch deleted file mode 100644 index d7677e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/example_5.7.sch +++ /dev/null @@ -1,210 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 10:41:23 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.7-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L AC v1 -U 1 1 5193C186 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "AC" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -Wire Wire Line - 7050 3500 7050 2950 -Connection ~ 6500 2950 -Wire Wire Line - 6500 2950 6500 2550 -Wire Wire Line - 6500 2550 6300 2550 -Connection ~ 5300 2950 -Wire Wire Line - 5300 2550 5300 3200 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4200 5350 3400 -Connection ~ 5300 3200 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 7050 2950 6400 2950 -Wire Wire Line - 6350 3300 7050 3300 -Wire Wire Line - 5800 2550 5900 2550 -Wire Wire Line - 4050 4100 7050 4100 -Wire Wire Line - 7050 4100 7050 4000 -Connection ~ 7050 3400 -$Comp -L R R3 -U 1 1 516E71B7 -P 7050 3750 -F 0 "R3" V 7130 3750 50 0000 C CNN -F 1 "R" V 7050 3750 50 0000 C CNN - 1 7050 3750 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516E6E61 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516E6E43 -P 7350 3400 -F 0 "U3" H 7200 3500 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3500 50 0000 C CNN - 1 7350 3400 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L C C1 -U 1 1 516E6B62 -P 6100 2550 -F 0 "C1" H 6150 2650 50 0000 L CNN -F 1 "1.59n" H 6150 2450 50 0000 L CNN - 1 6100 2550 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516E6B56 -P 5550 2550 -F 0 "U4" H 5400 2650 50 0000 C CNN -F 1 "IPLOT" H 5700 2650 50 0000 C CNN - 1 5550 2550 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "10000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.pro deleted file mode 100644 index 9aa118e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:14:06 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.7/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/analysis deleted file mode 100644 index 64c6d69..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 1e-03 2e-03 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.1.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.1.sch deleted file mode 100644 index d6f19aa..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.1.sch +++ /dev/null @@ -1,172 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 17 April 2013 05:15:51 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 6350 3300 7050 3300 -Wire Wire Line - 6400 2950 7050 2950 -Connection ~ 7050 3300 -Connection ~ 6350 3300 -Connection ~ 5350 4100 -Wire Wire Line - 4150 3200 4050 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 5300 2950 5300 3200 -Connection ~ 5300 3200 -Wire Wire Line - 5350 4200 5350 3400 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 7050 2950 7050 3300 -$Comp -L SINE v1 -U 1 1 516E3AE9 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "SINE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG01" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG02" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "10000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR03" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.bak deleted file mode 100644 index 969d8ac..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.bak +++ /dev/null @@ -1,157 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 18 April 2013 09:19:41 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.lib b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.lib deleted file mode 100644 index 32852ba..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8-cache.lib +++ /dev/null @@ -1,157 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 18 April 2013 10:25:50 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.bak deleted file mode 100644 index a102621..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.bak +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 18 April 2013 09:19:41 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.8-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "18 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 3300 3700 3300 4300 -Wire Wire Line - 3300 3100 3300 2850 -Wire Wire Line - 3300 2850 4200 2850 -Wire Wire Line - 4200 2850 4200 3200 -Wire Wire Line - 5800 2600 5900 2600 -Wire Wire Line - 4050 4100 5350 4100 -Wire Wire Line - 6350 3300 7050 3300 -Wire Wire Line - 7050 2950 6400 2950 -Connection ~ 7050 3300 -Connection ~ 6350 3300 -Connection ~ 5350 4100 -Wire Wire Line - 4150 3200 4050 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 5250 3200 5350 3200 -Connection ~ 5300 3200 -Wire Wire Line - 5350 3400 5350 4200 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5300 3200 5300 2600 -Connection ~ 5300 2950 -Wire Wire Line - 6300 2600 7050 2600 -Wire Wire Line - 7050 2600 7050 3300 -Connection ~ 7050 2950 -Connection ~ 4100 3200 -Wire Wire Line - 4250 4100 4250 4300 -Connection ~ 4250 4100 -Wire Wire Line - 4250 4300 3300 4300 -$Comp -L VPLOT8 U5 -U 1 1 516F6D28 -P 3300 3400 -F 0 "U5" H 3150 3500 50 0000 C CNN -F 1 "VPLOT8" H 3450 3500 50 0000 C CNN - 1 3300 3400 - 0 1 1 0 -$EndComp -$Comp -L PULSE v1 -U 1 1 516E8CD4 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "PULSE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 516E8BE7 -P 6100 2600 -F 0 "C1" H 6150 2700 50 0000 L CNN -F 1 "10n" H 6150 2500 50 0000 L CNN - 1 6100 2600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516E8BCF -P 5550 2600 -F 0 "U4" H 5400 2700 50 0000 C CNN -F 1 "IPLOT" H 5700 2700 50 0000 C CNN - 1 5550 2600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG2 -U 1 1 516D11A2 -P 5350 4100 -F 0 "#FLG2" H 5350 4370 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 4330 30 0000 C CNN - 1 5350 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG1" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "1000000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR1" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "10000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir deleted file mode 100644 index b53502b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 18 April 2013 10:25:46 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U5 5 0 VPLOT8 -v1 5 0 PULSE -C1 6 1 10n -U4 2 1 IPLOT -U3 6 VPLOT8_1 -U1 4 2 IPLOT -U2 2 3 IPLOT -R2 6 3 1000000 -R1 4 5 10000 -X1 2 0 6 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.ckt deleted file mode 100644 index 63570ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.ckt +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:25:46 am ist -.include ua741.sub - -v1 5 0 pulse(1 0 0 0 0 0.001 0.002) -c1 6 1 10n -V_u4 2 1 0 -* Plotting option vplot8_1 -V_u1 4 2 0 -V_u2 2 3 0 -r2 6 3 1000000 -r1 4 5 10000 -x1 2 0 6 ua741 - -.tran 1e-03 2e-03 0e-00 -.plot v(5) -.plot i(V_u4) -.plot v(6) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.out deleted file mode 100644 index ed95f2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.cir.out +++ /dev/null @@ -1,25 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:25:46 am ist -.include ua741.sub - -v1 5 0 pulse(1 0 0 0 0 0.001 0.002) -c1 6 1 10n -V_u4 2 1 0 -* Plotting option vplot8_1 -V_u1 4 2 0 -V_u2 2 3 0 -r2 6 3 1000000 -r1 4 5 10000 -x1 2 0 6 ua741 - -.tran 1e-03 2e-03 0e-00 - -* Control Statements -.control -run -plot v(5) -plot i(V_u4) -plot v(6) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.pro deleted file mode 100644 index 62130f3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Wednesday 17 April 2013 05:14:42 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.proj deleted file mode 100644 index a7ce942..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.8.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.sch deleted file mode 100644 index 976a836..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/example_5.8.sch +++ /dev/null @@ -1,214 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 18 April 2013 10:25:50 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.8-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "18 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 4100 3200 4100 2950 -Wire Wire Line - 4100 2950 4200 2950 -Wire Wire Line - 4200 2950 4200 2850 -Wire Wire Line - 4250 4300 3300 4300 -Connection ~ 4250 4100 -Wire Wire Line - 4250 4300 4250 4100 -Connection ~ 4100 3200 -Connection ~ 7050 2950 -Wire Wire Line - 7050 2600 7050 3300 -Wire Wire Line - 7050 2600 6300 2600 -Connection ~ 5300 2950 -Wire Wire Line - 5300 3200 5300 2600 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 3400 5350 4200 -Connection ~ 5300 3200 -Wire Wire Line - 5250 3200 5350 3200 -Wire Wire Line - 5900 2950 5800 2950 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 7050 2950 6400 2950 -Wire Wire Line - 7050 3300 6350 3300 -Wire Wire Line - 4050 4100 5350 4100 -Wire Wire Line - 5800 2600 5900 2600 -Wire Wire Line - 3300 4300 3300 3700 -Wire Wire Line - 3300 3100 3300 2850 -Wire Wire Line - 3300 2850 4200 2850 -$Comp -L VPLOT8 U5 -U 1 1 516F6D28 -P 3300 3400 -F 0 "U5" H 3150 3500 50 0000 C CNN -F 1 "VPLOT8" H 3450 3500 50 0000 C CNN - 1 3300 3400 - 0 1 1 0 -$EndComp -$Comp -L PULSE v1 -U 1 1 516E8CD4 -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "PULSE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 516E8BE7 -P 6100 2600 -F 0 "C1" H 6150 2700 50 0000 L CNN -F 1 "10n" H 6150 2500 50 0000 L CNN - 1 6100 2600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516E8BCF -P 5550 2600 -F 0 "U4" H 5400 2700 50 0000 C CNN -F 1 "IPLOT" H 5700 2700 50 0000 C CNN - 1 5550 2600 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7350 3300 -F 0 "U3" H 7200 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 7500 3400 50 0000 C CNN - 1 7350 3300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG01" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2950 -F 0 "U2" H 5400 3050 50 0000 C CNN -F 1 "IPLOT" H 5700 3050 50 0000 C CNN - 1 5550 2950 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6150 2950 -F 0 "R2" V 6230 2950 50 0000 C CNN -F 1 "1000000" V 6150 2950 50 0000 C CNN - 1 6150 2950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR02" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "10000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.pro deleted file mode 100644 index 9aa118e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:14:06 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.8/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/analysis b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/analysis deleted file mode 100644 index 48302a3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 2e-03 4e-03 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir deleted file mode 100644 index d30b232..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir +++ /dev/null @@ -1,24 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 18 April 2013 10:53:39 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 4 0 PULSE -v2 11 0 10V -U3 8 3 VPLOT8_1 -R5 13 3 10000 -R4 0 13 10000 -R3 1 11 10000 -U5 8 2 IPLOT -Q2 1 1 2 NPN -X2 1 13 3 UA741 -U4 10 8 IPLOT -Q1 10 0 9 NPN -U1 6 7 IPLOT -U2 7 9 IPLOT -R2 8 5 10000 -R1 6 4 1000 -X1 7 0 5 UA741 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.ckt deleted file mode 100644 index 0decb7c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.ckt +++ /dev/null @@ -1,27 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:53:39 am ist -.include ua741.sub - -v1 4 0 pulse(0 1 0.002 0.004) -v2 11 0 10v -* Plotting option vplot8_1 -r5 13 3 10000 -r4 0 13 10000 -r3 1 11 10000 -V_u5 8 2 0 -q2 2 1 1 npn -x2 1 13 3 ua741 -V_u4 10 8 0 -q1 10 0 9 npn -V_u1 6 7 0 -V_u2 7 9 0 -r2 8 5 10000 -r1 6 4 1000 -x1 7 0 5 ua741 - -.tran 2e-03 4e-03 0e-00 -.plot v(8) v(3) -.plot i(V_u5) -.plot i(V_u4) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.out deleted file mode 100644 index f4b917f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.cir.out +++ /dev/null @@ -1,32 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 18 april 2013 10:53:39 am ist -.include ua741.sub - -v1 4 0 pulse(0 1 0.002 0.004) -v2 11 0 10v -* Plotting option vplot8_1 -r5 13 3 10000 -r4 0 13 10000 -r3 1 11 10000 -V_u5 8 2 0 -q2 2 1 1 npn -x2 1 13 3 ua741 -V_u4 10 8 0 -q1 10 0 9 npn -V_u1 6 7 0 -V_u2 7 9 0 -r2 8 5 10000 -r1 6 4 1000 -x1 7 0 5 ua741 - -.tran 2e-03 4e-03 0e-00 - -* Control Statements -.control -run -plot v(8) v(3) -plot i(V_u5) -plot i(V_u4) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.pro deleted file mode 100644 index 6a09490..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Thursday 18 April 2013 10:31:10 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.proj b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.proj deleted file mode 100644 index da8b8d1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_5.9.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.sch deleted file mode 100644 index 481506c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/example_5.9.sch +++ /dev/null @@ -1,324 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 18 April 2013 10:52:19 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_5.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "18 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L GND #PWR01 -U 1 1 516F8096 -P 6150 2850 -F 0 "#PWR01" H 6150 2850 30 0001 C CNN -F 1 "GND" H 6150 2780 30 0001 C CNN - 1 6150 2850 - 1 0 0 -1 -$EndComp -Connection ~ 6150 2750 -$Comp -L PWR_FLAG #FLG02 -U 1 1 516F807F -P 6150 2750 -F 0 "#FLG02" H 6150 3020 30 0001 C CNN -F 1 "PWR_FLAG" H 6150 2980 30 0000 C CNN - 1 6150 2750 - 0 -1 -1 0 -$EndComp -Wire Wire Line - 6150 2700 6150 2850 -Wire Wire Line - 10200 3750 10200 5050 -Wire Wire Line - 10200 2850 10200 2400 -Wire Wire Line - 10200 2400 8100 2400 -Wire Wire Line - 9250 3700 9400 3700 -Wire Wire Line - 8250 3800 8250 4100 -Connection ~ 8100 3300 -Wire Wire Line - 8100 3050 8100 3600 -Wire Wire Line - 7900 3600 8250 3600 -Wire Wire Line - 7150 3300 6950 3300 -Wire Wire Line - 6350 2400 6400 2400 -Wire Wire Line - 5300 2400 5300 3200 -Wire Wire Line - 6350 3300 6450 3300 -Wire Wire Line - 4750 3200 4650 3200 -Wire Wire Line - 5350 4200 5350 3400 -Connection ~ 5300 3200 -Wire Wire Line - 5350 3200 5250 3200 -Wire Wire Line - 4150 3200 4050 3200 -Connection ~ 5350 4100 -Connection ~ 6350 3300 -Connection ~ 7050 3300 -Wire Wire Line - 5350 4100 4050 4100 -Wire Wire Line - 5800 2400 5950 2400 -Wire Wire Line - 6900 2400 7050 2400 -Wire Wire Line - 7050 2400 7050 3300 -Wire Wire Line - 7650 3300 7700 3300 -Connection ~ 8100 3600 -Wire Wire Line - 8100 2400 8100 2550 -Wire Wire Line - 8250 4000 8450 4000 -Connection ~ 8250 4000 -Wire Wire Line - 9300 3700 9300 4000 -Wire Wire Line - 9300 4000 8950 4000 -Connection ~ 9300 3700 -Connection ~ 9400 3700 -Connection ~ 8100 2400 -Wire Wire Line - 10200 5050 8250 5050 -Wire Wire Line - 8250 5250 8250 4600 -Connection ~ 8250 5050 -Connection ~ 8250 5150 -$Comp -L GND #PWR03 -U 1 1 516F8034 -P 8250 5250 -F 0 "#PWR03" H 8250 5250 30 0001 C CNN -F 1 "GND" H 8250 5180 30 0001 C CNN - 1 8250 5250 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 516F801F -P 4050 3650 -F 0 "v1" H 3850 3750 60 0000 C CNN -F 1 "PULSE" H 3850 3600 60 0000 C CNN -F 2 "R1" H 3750 3650 60 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 516F7FED -P 10200 3300 -F 0 "v2" H 10000 3400 60 0000 C CNN -F 1 "10V" H 10000 3250 60 0000 C CNN -F 2 "R1" H 9900 3300 60 0000 C CNN - 1 10200 3300 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516F7F85 -P 9400 4000 -F 0 "U3" H 9250 4100 50 0000 C CNN -F 1 "VPLOT8_1" H 9550 4100 50 0000 C CNN - 2 9400 4000 - -1 0 0 1 -$EndComp -$Comp -L R R5 -U 1 1 516F7F66 -P 8700 4000 -F 0 "R5" V 8780 4000 50 0000 C CNN -F 1 "10000" V 8700 4000 50 0000 C CNN - 1 8700 4000 - 0 -1 -1 0 -$EndComp -$Comp -L R R4 -U 1 1 516F7F56 -P 8250 4350 -F 0 "R4" V 8330 4350 50 0000 C CNN -F 1 "10000" V 8250 4350 50 0000 C CNN - 1 8250 4350 - -1 0 0 1 -$EndComp -$Comp -L R R3 -U 1 1 516F7F35 -P 8100 2800 -F 0 "R3" V 8180 2800 50 0000 C CNN -F 1 "10000" V 8100 2800 50 0000 C CNN - 1 8100 2800 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U5 -U 1 1 516F7EEB -P 7400 3300 -F 0 "U5" H 7250 3400 50 0000 C CNN -F 1 "IPLOT" H 7550 3400 50 0000 C CNN - 1 7400 3300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q2 -U 1 1 516F7EDC -P 7900 3400 -F 0 "Q2" H 7900 3250 50 0000 R CNN -F 1 "NPN" H 7900 3550 50 0000 R CNN - 1 7900 3400 - 0 -1 -1 0 -$EndComp -$Comp -L UA741 X2 -U 1 1 516F7ED1 -P 8750 3700 -F 0 "X2" H 8900 3850 60 0000 C CNN -F 1 "UA741" H 8900 3950 60 0000 C CNN - 1 8750 3700 - 1 0 0 1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516F7EB1 -P 6650 2400 -F 0 "U4" H 6500 2500 50 0000 C CNN -F 1 "IPLOT" H 6800 2500 50 0000 C CNN - 1 6650 2400 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516F7E9D -P 6150 2500 -F 0 "Q1" H 6150 2350 50 0000 R CNN -F 1 "NPN" H 6150 2650 50 0000 R CNN - 1 6150 2500 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516D117B -P 7050 3600 -F 0 "U3" H 6900 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 7200 3700 50 0000 C CNN - 1 7050 3600 - -1 0 0 1 -$EndComp -$Comp -L PWR_FLAG #FLG04 -U 1 1 516D1102 -P 5300 3200 -F 0 "#FLG04" H 5300 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 5300 3430 30 0000 C CNN - 1 5300 3200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516D1019 -P 5000 3200 -F 0 "U1" H 4850 3300 50 0000 C CNN -F 1 "IPLOT" H 5150 3300 50 0000 C CNN - 1 5000 3200 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516D0FEC -P 5550 2400 -F 0 "U2" H 5400 2500 50 0000 C CNN -F 1 "IPLOT" H 5700 2500 50 0000 C CNN - 1 5550 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516D0FE2 -P 6700 3300 -F 0 "R2" V 6780 3300 50 0000 C CNN -F 1 "10000" V 6700 3300 50 0000 C CNN - 1 6700 3300 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR05 -U 1 1 516D0F6B -P 5350 4200 -F 0 "#PWR05" H 5350 4200 30 0001 C CNN -F 1 "GND" H 5350 4130 30 0001 C CNN - 1 5350 4200 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516D0F10 -P 4400 3200 -F 0 "R1" V 4480 3200 50 0000 C CNN -F 1 "1000" V 4400 3200 50 0000 C CNN - 1 4400 3200 - 0 1 1 0 -$EndComp -$Comp -L UA741 X1 -U 1 1 516D0E60 -P 5850 3300 -F 0 "X1" H 6000 3450 60 0000 C CNN -F 1 "UA741" H 6000 3550 60 0000 C CNN - 1 5850 3300 - 1 0 0 1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.bak b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.bak deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.out b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.pro b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.pro deleted file mode 100644 index df98e42..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.pro +++ /dev/null @@ -1,82 +0,0 @@ -update=Thursday 18 April 2013 01:48:22 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice -LibName39=/home/holy/OSCAD/library/analogSpice -LibName40=/home/holy/OSCAD/library/analogXSpice -LibName41=/home/holy/OSCAD/library/convergenceAidSpice -LibName42=/home/holy/OSCAD/library/converterSpice -LibName43=/home/holy/OSCAD/library/digitalSpice -LibName44=/home/holy/OSCAD/library/digitalXSpice -LibName45=/home/holy/OSCAD/library/linearSpice -LibName46=/home/holy/OSCAD/library/measurementSpice -LibName47=/home/holy/OSCAD/library/portSpice -LibName48=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.sch b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.sch deleted file mode 100644 index 7dfc5e1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.sub b/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_5/example_5.9/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/analysis b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/analysis deleted file mode 100644 index 0e8f996..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 2e-03 20e-03 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.bak b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.bak deleted file mode 100644 index 6284625..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.bak +++ /dev/null @@ -1,98 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 22 April 2013 12:05:40 PM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.lib b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.lib deleted file mode 100644 index 388a263..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1-cache.lib +++ /dev/null @@ -1,98 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 22 April 2013 12:09:56 PM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.bak b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.bak deleted file mode 100644 index cc13116..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.bak +++ /dev/null @@ -1,231 +0,0 @@ -EESchema Schematic File Version 2 date Monday 22 April 2013 12:05:40 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_7.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 1050 3250 -$Comp -L VPLOT8_1 U2 -U 1 1 5174D971 -P 1050 2950 -F 0 "U2" H 900 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 1200 3050 50 0000 C CNN - 1 1050 2950 - 1 0 0 -1 -$EndComp -Connection ~ 2950 3200 -$Comp -L PWR_FLAG #FLG01 -U 1 1 5174D14C -P 2050 5350 -F 0 "#FLG01" H 2050 5620 30 0001 C CNN -F 1 "PWR_FLAG" H 2050 5580 30 0000 C CNN - 1 2050 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5174D02B -P 2950 2900 -F 0 "U1" H 2800 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 3100 3000 50 0000 C CNN - 2 2950 2900 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5174D021 -P 2050 2900 -F 0 "U1" H 1900 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 2200 3000 50 0000 C CNN - 1 2050 2900 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 3 1 5174D010 -P 4050 2900 -F 0 "U1" H 3900 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 4200 3000 50 0000 C CNN - 3 4050 2900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5174CFD9 -P 2050 5500 -F 0 "#PWR02" H 2050 5500 30 0001 C CNN -F 1 "GND" H 2050 5430 30 0001 C CNN - 1 2050 5500 - 1 0 0 -1 -$EndComp -Connection ~ 2750 5350 -Wire Wire Line - 2750 3950 2750 5350 -Connection ~ 2050 5350 -Wire Wire Line - 1050 4200 1050 5350 -Connection ~ 2050 4600 -Wire Wire Line - 2050 4800 2050 4000 -Wire Wire Line - 3650 4600 3800 4600 -Connection ~ 3800 3200 -Wire Wire Line - 3800 4600 3800 3200 -Connection ~ 4050 3200 -Wire Wire Line - 4050 3200 4050 3350 -Wire Wire Line - 2050 4200 2500 4200 -Connection ~ 2050 4200 -Wire Wire Line - 2500 4200 2500 3700 -Wire Wire Line - 1050 3200 1050 3300 -Wire Wire Line - 2050 3200 2050 3500 -Wire Wire Line - 1550 3200 2500 3200 -Wire Wire Line - 2500 3200 2500 3600 -Connection ~ 2050 3200 -Wire Wire Line - 2750 3350 2750 3200 -Wire Wire Line - 2750 3200 3100 3200 -Wire Wire Line - 3600 3200 4250 3200 -Wire Wire Line - 2050 4600 3150 4600 -Wire Wire Line - 2050 5300 2050 5500 -Wire Wire Line - 4050 3850 4050 5350 -Wire Wire Line - 4050 5350 1050 5350 -$Comp -L R R3 -U 1 1 5174CF9E -P 2050 5050 -F 0 "R3" V 2130 5050 50 0000 C CNN -F 1 "1000" V 2050 5050 50 0000 C CNN - 1 2050 5050 - -1 0 0 1 -$EndComp -$Comp -L R R5 -U 1 1 5174CF7E -P 3400 4600 -F 0 "R5" V 3480 4600 50 0000 C CNN -F 1 "100000" V 3400 4600 50 0000 C CNN - 1 3400 4600 - 0 1 1 0 -$EndComp -$Comp -L R R6 -U 1 1 5174CF4D -P 4050 3600 -F 0 "R6" V 4130 3600 50 0000 C CNN -F 1 "2000" V 4050 3600 50 0000 C CNN - 1 4050 3600 - -1 0 0 1 -$EndComp -$Comp -L R R4 -U 1 1 5174CF16 -P 3350 3200 -F 0 "R4" V 3430 3200 50 0000 C CNN -F 1 "1000" V 3350 3200 50 0000 C CNN - 1 3350 3200 - 0 1 1 0 -$EndComp -$Comp -L VCVS E1 -U 1 1 5174CEE8 -P 2700 3650 -F 0 "E1" H 2500 3750 50 0000 C CNN -F 1 "10000" H 2500 3600 50 0000 C CNN - 1 2700 3650 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5174CEC2 -P 2050 3750 -F 0 "R2" V 2130 3750 50 0000 C CNN -F 1 "100000" V 2050 3750 50 0000 C CNN - 1 2050 3750 - -1 0 0 1 -$EndComp -$Comp -L SINE v1 -U 1 1 5174CE88 -P 1050 3750 -F 0 "v1" H 850 3850 60 0000 C CNN -F 1 "SINE" H 850 3700 60 0000 C CNN -F 2 "R1" H 750 3750 60 0000 C CNN - 1 1050 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5174CE5E -P 1300 3200 -F 0 "R1" V 1380 3200 50 0000 C CNN -F 1 "10000" V 1300 3200 50 0000 C CNN - 1 1300 3200 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir deleted file mode 100644 index c73ab3c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 22 April 2013 12:19:08 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -XU2 1 VPLOT8_1 -XU1 4 3 5 VPLOT8_1 -R3 0 6 1000 -R5 5 6 100000 -R6 0 5 2000 -R4 5 3 1000 -E1 3 0 4 6 2 -R2 6 4 100000 -v1 1 0 SINE -R1 4 1 10000 - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.ckt deleted file mode 100644 index 9a79ca6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 22 april 2013 12:09:21 pm ist - -* Plotting option vplot8_1 -* Plotting option vplot8_1 -r3 0 6 1000 -r5 5 6 100000 -r6 0 5 2000 -r4 5 3 1000 -e1 3 0 4 6 2 -r2 6 4 100000 -v1 1 0 sine(0 5 50 0 0) -r1 4 1 10000 - -.tran 2e-03 20e-03 0e-00 -.plot v(1) -.plot v(4) v(3) v(5) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.out deleted file mode 100644 index 222f9bd..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 22 april 2013 12:09:21 pm ist - -* Plotting option vplot8_1 -* Plotting option vplot8_1 -r3 0 6 1000 -r5 5 6 100000 -r6 0 5 2000 -r4 5 3 1000 -e1 3 0 4 6 2 -r2 6 4 100000 -v1 1 0 sine(0 5 50 0 0) -r1 4 1 10000 - -.tran 2e-03 20e-03 0e-00 - -* Control Statements -.control -run -plot v(1) -plot v(4) v(3) v(5) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.pro b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.pro deleted file mode 100644 index 414c8ad..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 22 April 2013 11:14:03 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.proj b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.proj deleted file mode 100644 index dafbe48..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_7.1.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.sch b/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.sch deleted file mode 100644 index 7980439..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.1/example_7.1.sch +++ /dev/null @@ -1,231 +0,0 @@ -EESchema Schematic File Version 2 date Monday 22 April 2013 12:09:56 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_7.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 1050 3250 -$Comp -L VPLOT8_1 U2 -U 1 1 5174D971 -P 1050 2950 -F 0 "U2" H 900 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 1200 3050 50 0000 C CNN - 1 1050 2950 - 1 0 0 -1 -$EndComp -Connection ~ 2950 3200 -$Comp -L PWR_FLAG #FLG01 -U 1 1 5174D14C -P 2050 5350 -F 0 "#FLG01" H 2050 5620 30 0001 C CNN -F 1 "PWR_FLAG" H 2050 5580 30 0000 C CNN - 1 2050 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5174D02B -P 2950 2900 -F 0 "U1" H 2800 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 3100 3000 50 0000 C CNN - 2 2950 2900 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5174D021 -P 2050 2900 -F 0 "U1" H 1900 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 2200 3000 50 0000 C CNN - 1 2050 2900 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 3 1 5174D010 -P 4050 2900 -F 0 "U1" H 3900 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 4200 3000 50 0000 C CNN - 3 4050 2900 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5174CFD9 -P 2050 5500 -F 0 "#PWR02" H 2050 5500 30 0001 C CNN -F 1 "GND" H 2050 5430 30 0001 C CNN - 1 2050 5500 - 1 0 0 -1 -$EndComp -Connection ~ 2750 5350 -Wire Wire Line - 2750 3950 2750 5350 -Connection ~ 2050 5350 -Wire Wire Line - 1050 4200 1050 5350 -Connection ~ 2050 4600 -Wire Wire Line - 2050 4800 2050 4000 -Wire Wire Line - 3650 4600 3800 4600 -Connection ~ 3800 3200 -Wire Wire Line - 3800 4600 3800 3200 -Connection ~ 4050 3200 -Wire Wire Line - 4050 3200 4050 3350 -Wire Wire Line - 2050 4200 2500 4200 -Connection ~ 2050 4200 -Wire Wire Line - 2500 4200 2500 3700 -Wire Wire Line - 1050 3200 1050 3300 -Wire Wire Line - 2050 3200 2050 3500 -Wire Wire Line - 1550 3200 2500 3200 -Wire Wire Line - 2500 3200 2500 3600 -Connection ~ 2050 3200 -Wire Wire Line - 2750 3350 2750 3200 -Wire Wire Line - 2750 3200 3100 3200 -Wire Wire Line - 3600 3200 4250 3200 -Wire Wire Line - 2050 4600 3150 4600 -Wire Wire Line - 2050 5300 2050 5500 -Wire Wire Line - 4050 3850 4050 5350 -Wire Wire Line - 4050 5350 1050 5350 -$Comp -L R R3 -U 1 1 5174CF9E -P 2050 5050 -F 0 "R3" V 2130 5050 50 0000 C CNN -F 1 "1000" V 2050 5050 50 0000 C CNN - 1 2050 5050 - -1 0 0 1 -$EndComp -$Comp -L R R5 -U 1 1 5174CF7E -P 3400 4600 -F 0 "R5" V 3480 4600 50 0000 C CNN -F 1 "100000" V 3400 4600 50 0000 C CNN - 1 3400 4600 - 0 1 1 0 -$EndComp -$Comp -L R R6 -U 1 1 5174CF4D -P 4050 3600 -F 0 "R6" V 4130 3600 50 0000 C CNN -F 1 "2000" V 4050 3600 50 0000 C CNN - 1 4050 3600 - -1 0 0 1 -$EndComp -$Comp -L R R4 -U 1 1 5174CF16 -P 3350 3200 -F 0 "R4" V 3430 3200 50 0000 C CNN -F 1 "1000" V 3350 3200 50 0000 C CNN - 1 3350 3200 - 0 1 1 0 -$EndComp -$Comp -L VCVS E1 -U 1 1 5174CEE8 -P 2700 3650 -F 0 "E1" H 2500 3750 50 0000 C CNN -F 1 "2" H 2500 3600 50 0000 C CNN - 1 2700 3650 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5174CEC2 -P 2050 3750 -F 0 "R2" V 2130 3750 50 0000 C CNN -F 1 "100000" V 2050 3750 50 0000 C CNN - 1 2050 3750 - -1 0 0 1 -$EndComp -$Comp -L SINE v1 -U 1 1 5174CE88 -P 1050 3750 -F 0 "v1" H 850 3850 60 0000 C CNN -F 1 "SINE" H 850 3700 60 0000 C CNN -F 2 "R1" H 750 3750 60 0000 C CNN - 1 1050 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5174CE5E -P 1300 3200 -F 0 "R1" V 1380 3200 50 0000 C CNN -F 1 "10000" V 1300 3200 50 0000 C CNN - 1 1300 3200 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/analysis b/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/analysis deleted file mode 100644 index 0e8f996..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 2e-03 20e-03 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3-cache.lib b/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3-cache.lib deleted file mode 100644 index 394db4b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3-cache.lib +++ /dev/null @@ -1,115 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 22 April 2013 02:21:52 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir b/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir deleted file mode 100644 index fc9aa74..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 22 April 2013 02:21:49 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 5 4 VPLOT8_1 -v2 2 0 12 -R2 4 3 47000 -R1 3 5 10000 -v1 5 0 SINE -R3 2 4 4700 -Q1 0 3 4 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.ckt deleted file mode 100644 index 421fe94..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 22 april 2013 02:21:49 pm ist - -* Plotting option vplot8_1 -v2 2 0 12 -r2 4 3 47000 -r1 3 5 10000 -v1 5 0 sine( 5 50 ) -r3 2 4 4700 -q1 4 3 0 npn - -.tran 2e-03 20e-03 0e-00 -.plot v(5) v(4) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.out b/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.out deleted file mode 100644 index db0fe26..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 22 april 2013 02:21:49 pm ist - -* Plotting option vplot8_1 -v2 2 0 12 -r2 4 3 47000 -r1 3 5 10000 -v1 5 0 sine( 5 50 ) -r3 2 4 4700 -q1 4 3 0 npn - -.tran 2e-03 20e-03 0e-00 - -* Control Statements -.control -run -plot v(5) v(4) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.pro b/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.pro deleted file mode 100644 index 1618111..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 22 April 2013 02:17:45 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.proj b/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.proj deleted file mode 100644 index ff14336..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_7.3.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.sch b/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.sch deleted file mode 100644 index fddbc06..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.3/example_7.3.sch +++ /dev/null @@ -1,175 +0,0 @@ -EESchema Schematic File Version 2 date Monday 22 April 2013 02:21:52 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L VPLOT8_1 U1 -U 1 1 5174FA0E -P 3850 3350 -F 0 "U1" H 3700 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 4000 3450 50 0000 C CNN - 1 3850 3350 - 1 0 0 -1 -$EndComp -Connection ~ 3850 3650 -Wire Wire Line - 3850 3650 3800 3650 -Connection ~ 4350 3650 -Connection ~ 5300 3350 -Wire Wire Line - 4950 4650 4950 3850 -Wire Wire Line - 5800 3200 5800 2800 -Wire Wire Line - 5800 2800 4950 2800 -Wire Wire Line - 4350 3350 4350 3650 -Wire Wire Line - 4350 3350 4450 3350 -Wire Wire Line - 4950 3450 4950 3300 -Wire Wire Line - 4350 3650 4650 3650 -Wire Wire Line - 4950 3350 5300 3350 -Connection ~ 4950 3350 -Wire Wire Line - 5800 4100 5800 4550 -Wire Wire Line - 5800 4550 3800 4550 -Connection ~ 4950 4550 -$Comp -L VPLOT8_1 U1 -U 2 1 5174F9F2 -P 5300 3050 -F 0 "U1" H 5150 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 3150 50 0000 C CNN - 2 5300 3050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5174F9DF -P 4950 4550 -F 0 "#FLG01" H 4950 4820 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 4780 30 0000 C CNN - 1 4950 4550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5174F9D4 -P 4950 4650 -F 0 "#PWR02" H 4950 4650 30 0001 C CNN -F 1 "GND" H 4950 4580 30 0001 C CNN - 1 4950 4650 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5174F994 -P 5800 3650 -F 0 "v2" H 5600 3750 60 0000 C CNN -F 1 "12" H 5600 3600 60 0000 C CNN -F 2 "R1" H 5500 3650 60 0000 C CNN - 1 5800 3650 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5174F959 -P 4700 3350 -F 0 "R2" V 4780 3350 50 0000 C CNN -F 1 "47000" V 4700 3350 50 0000 C CNN - 1 4700 3350 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 5174F943 -P 4100 3650 -F 0 "R1" V 4180 3650 50 0000 C CNN -F 1 "10000" V 4100 3650 50 0000 C CNN - 1 4100 3650 - 0 1 1 0 -$EndComp -$Comp -L SINE v1 -U 1 1 5174F939 -P 3800 4100 -F 0 "v1" H 3600 4200 60 0000 C CNN -F 1 "SINE" H 3600 4050 60 0000 C CNN -F 2 "R1" H 3500 4100 60 0000 C CNN - 1 3800 4100 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 5174F90B -P 4950 3050 -F 0 "R3" V 5030 3050 50 0000 C CNN -F 1 "4700" V 4950 3050 50 0000 C CNN - 1 4950 3050 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5174F8FA -P 4850 3650 -F 0 "Q1" H 4850 3500 50 0000 R CNN -F 1 "NPN" H 4850 3800 50 0000 R CNN - 1 4850 3650 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/analysis b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/analysis deleted file mode 100644 index 0e8f996..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 2e-03 20e-03 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.bak b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.bak deleted file mode 100644 index 61d077a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.bak +++ /dev/null @@ -1,133 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 23 April 2013 11:46:23 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.lib b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.lib deleted file mode 100644 index b4c0e94..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4-cache.lib +++ /dev/null @@ -1,133 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 23 April 2013 12:03:44 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.bak b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.bak deleted file mode 100644 index 0eedc93..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.bak +++ /dev/null @@ -1,348 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 23 April 2013 11:46:23 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_7.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "23 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 6350 3000 -$Comp -L VPLOT8_1 U1 -U 1 1 517625EA -P 6350 2700 -F 0 "U1" H 6200 2800 50 0000 C CNN -F 1 "VPLOT8_1" H 6500 2800 50 0000 C CNN - 1 6350 2700 - 1 0 0 -1 -$EndComp -Connection ~ 7000 2450 -$Comp -L VPLOT8_1 U1 -U 2 1 517625DB -P 7000 2150 -F 0 "U1" H 6850 2250 50 0000 C CNN -F 1 "VPLOT8_1" H 7150 2250 50 0000 C CNN - 2 7000 2150 - 1 0 0 -1 -$EndComp -Connection ~ 5800 2700 -$Comp -L PWR_FLAG #FLG01 -U 1 1 517625B5 -P 5800 2700 -F 0 "#FLG01" H 5800 2970 30 0001 C CNN -F 1 "PWR_FLAG" H 5800 2930 30 0000 C CNN - 1 5800 2700 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517625AE -P 4050 3100 -F 0 "#FLG02" H 4050 3370 30 0001 C CNN -F 1 "PWR_FLAG" H 4050 3330 30 0000 C CNN - 1 4050 3100 - 1 0 0 -1 -$EndComp -Connection ~ 3250 4150 -$Comp -L PWR_FLAG #FLG03 -U 1 1 5176256A -P 3250 4150 -F 0 "#FLG03" H 3250 4420 30 0001 C CNN -F 1 "PWR_FLAG" H 3250 4380 30 0000 C CNN - 1 3250 4150 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 5176255C -P 3250 4300 -F 0 "#PWR04" H 3250 4300 30 0001 C CNN -F 1 "GND" H 3250 4230 30 0001 C CNN - 1 3250 4300 - 1 0 0 -1 -$EndComp -Connection ~ 3250 3950 -Wire Wire Line - 3250 3950 3250 4300 -Wire Wire Line - 2500 3100 2750 3100 -Connection ~ 6200 1700 -Wire Wire Line - 7500 2400 7500 1700 -Wire Wire Line - 7500 1700 4050 1700 -Wire Wire Line - 5200 4350 5000 4350 -Wire Wire Line - 6600 3000 6600 4350 -Connection ~ 6200 3000 -Wire Wire Line - 6600 3000 6200 3000 -Connection ~ 4050 3950 -Wire Wire Line - 3850 3100 4400 3100 -Connection ~ 4050 3100 -Wire Wire Line - 4050 3450 4050 2650 -Connection ~ 4700 1700 -Wire Wire Line - 4050 1700 4050 2150 -Connection ~ 6200 3950 -Wire Wire Line - 6200 3550 6200 3950 -Wire Wire Line - 6900 2450 7050 2450 -Wire Wire Line - 5200 3450 5200 3400 -Connection ~ 4700 3400 -Wire Wire Line - 5200 3400 4700 3400 -Wire Wire Line - 4700 3300 4700 3450 -Wire Wire Line - 6200 2500 6200 2350 -Wire Wire Line - 4700 2600 4700 2900 -Wire Wire Line - 5900 2700 4700 2700 -Connection ~ 4700 2700 -Wire Wire Line - 6200 2450 6500 2450 -Connection ~ 6200 2450 -Wire Wire Line - 6200 2900 6200 3050 -Wire Wire Line - 5200 3950 5200 3850 -Wire Wire Line - 7050 3950 7050 2950 -Connection ~ 5200 3950 -Wire Wire Line - 4700 1700 4700 2100 -Wire Wire Line - 6200 1700 6200 1850 -Connection ~ 4700 3950 -Wire Wire Line - 3450 3100 3250 3100 -Wire Wire Line - 6600 4350 5600 4350 -Wire Wire Line - 4500 4350 3950 4350 -Wire Wire Line - 3950 4350 3950 3100 -Connection ~ 3950 3100 -Wire Wire Line - 7500 3300 7500 3950 -Wire Wire Line - 7500 3950 2750 3950 -Connection ~ 7050 3950 -Wire Wire Line - 2750 3950 2750 4000 -Wire Wire Line - 2750 4000 2500 4000 -$Comp -L SINE v1 -U 1 1 5176244C -P 2500 3550 -F 0 "v1" H 2300 3650 60 0000 C CNN -F 1 "SINE" H 2300 3500 60 0000 C CNN -F 2 "R1" H 2200 3550 60 0000 C CNN - 1 2500 3550 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 51761AB3 -P 4750 4350 -F 0 "R6" V 4830 4350 50 0000 C CNN -F 1 "10k" V 4750 4350 50 0000 C CNN - 1 4750 4350 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 51761A46 -P 3000 3100 -F 0 "R1" V 3080 3100 50 0000 C CNN -F 1 "10k" V 3000 3100 50 0000 C CNN - 1 3000 3100 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 51761A2D -P 3650 3100 -F 0 "C1" H 3700 3200 50 0000 L CNN -F 1 "1k" H 3700 3000 50 0000 L CNN - 1 3650 3100 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 51761A14 -P 4050 3700 -F 0 "R3" V 4130 3700 50 0000 C CNN -F 1 "15k" V 4050 3700 50 0000 C CNN - 1 4050 3700 - 1 0 0 -1 -$EndComp -$Comp -L R R9 -U 1 1 517619D2 -P 7050 2700 -F 0 "R9" V 7130 2700 50 0000 C CNN -F 1 "1k" V 7050 2700 50 0000 C CNN - 1 7050 2700 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 517619B5 -P 5200 3650 -F 0 "C2" H 5250 3750 50 0000 L CNN -F 1 "1k" H 5250 3550 50 0000 L CNN - 1 5200 3650 - 1 0 0 -1 -$EndComp -$Comp -L R R7 -U 1 1 517619A1 -P 6200 2100 -F 0 "R7" V 6280 2100 50 0000 C CNN -F 1 "8k" V 6200 2100 50 0000 C CNN - 1 6200 2100 - 1 0 0 -1 -$EndComp -$Comp -L R R8 -U 1 1 5176198B -P 6200 3300 -F 0 "R8" V 6280 3300 50 0000 C CNN -F 1 "3.4k" V 6200 3300 50 0000 C CNN - 1 6200 3300 - 1 0 0 -1 -$EndComp -$Comp -L C C4 -U 1 1 5176197A -P 6700 2450 -F 0 "C4" H 6750 2550 50 0000 L CNN -F 1 "1k" H 6750 2350 50 0000 L CNN - 1 6700 2450 - 0 1 1 0 -$EndComp -$Comp -L R R5 -U 1 1 51761974 -P 4700 3700 -F 0 "R5" V 4780 3700 50 0000 C CNN -F 1 "870" V 4700 3700 50 0000 C CNN - 1 4700 3700 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 51761961 -P 4700 2350 -F 0 "R4" V 4780 2350 50 0000 C CNN -F 1 "10k" V 4700 2350 50 0000 C CNN - 1 4700 2350 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5176195A -P 7500 2850 -F 0 "v2" H 7300 2950 60 0000 C CNN -F 1 "12" H 7300 2800 60 0000 C CNN -F 2 "R1" H 7200 2850 60 0000 C CNN - 1 7500 2850 - 1 0 0 -1 -$EndComp -$Comp -L C C3 -U 1 1 51761951 -P 5400 4350 -F 0 "C3" H 5450 4450 50 0000 L CNN -F 1 "1k" H 5450 4250 50 0000 L CNN - 1 5400 4350 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5176194E -P 4050 2400 -F 0 "R2" V 4130 2400 50 0000 C CNN -F 1 "100k" V 4050 2400 50 0000 C CNN - 1 4050 2400 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q2 -U 1 1 5176191C -P 6100 2700 -F 0 "Q2" H 6100 2550 50 0000 R CNN -F 1 "NPN" H 6100 2850 50 0000 R CNN - 1 6100 2700 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 517618FE -P 4600 3100 -F 0 "Q1" H 4600 2950 50 0000 R CNN -F 1 "NPN" H 4600 3250 50 0000 R CNN - 1 4600 3100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir deleted file mode 100644 index 66167e8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir +++ /dev/null @@ -1,26 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 23 April 2013 12:03:40 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 8 7 VPLOT8_1 -v1 2 0 SINE -R6 3 6 10k -R1 1 2 10k -C1 6 1 1m -R3 6 0 15k -R9 7 0 1k -C2 11 0 1m -R7 4 9 8k -R8 8 0 3.4k -C4 7 9 1m -R5 11 0 870 -R4 4 10 10k -v2 4 0 12 -C3 8 3 1m -R2 4 6 100k -Q2 8 10 9 NPN -Q1 11 6 10 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.ckt deleted file mode 100644 index d627f6f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.ckt +++ /dev/null @@ -1,24 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 23 april 2013 12:03:40 pm ist - -* Plotting option vplot8_1 -v1 2 0 sine(0 1 50 ) -r6 3 6 10k -r1 1 2 10k -c1 6 1 1m -r3 6 0 15k -r9 7 0 1k -c2 11 0 1m -r7 4 9 8k -r8 8 0 3.4k -c4 7 9 1m -r5 11 0 870 -r4 4 10 10k -v2 4 0 12 -c3 8 3 1m -r2 4 6 100k -q2 9 10 8 npn -q1 10 6 11 npn - -.tran 2e-03 20e-03 0e-00 -.plot v(8) v(7) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.out deleted file mode 100644 index 669fcbb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.cir.out +++ /dev/null @@ -1,29 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 23 april 2013 12:03:40 pm ist - -* Plotting option vplot8_1 -v1 2 0 sine(0 1 50 ) -r6 3 6 10k -r1 1 2 10k -c1 6 1 1m -r3 6 0 15k -r9 7 0 1k -c2 11 0 1m -r7 4 9 8k -r8 8 0 3.4k -c4 7 9 1m -r5 11 0 870 -r4 4 10 10k -v2 4 0 12 -c3 8 3 1m -r2 4 6 100k -q2 9 10 8 npn -q1 10 6 11 npn - -.tran 2e-03 20e-03 0e-00 - -* Control Statements -.control -run -plot v(8) v(7) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.pro b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.pro deleted file mode 100644 index 29f504b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 23 April 2013 10:45:01 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.proj b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.proj deleted file mode 100644 index a6cb330..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_7.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.sch b/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.sch deleted file mode 100644 index 1f165d6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_7/example_7.4/example_7.4.sch +++ /dev/null @@ -1,348 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 23 April 2013 12:03:44 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_7.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "23 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 6350 3000 -$Comp -L VPLOT8_1 U1 -U 1 1 517625EA -P 6350 2700 -F 0 "U1" H 6200 2800 50 0000 C CNN -F 1 "VPLOT8_1" H 6500 2800 50 0000 C CNN - 1 6350 2700 - 1 0 0 -1 -$EndComp -Connection ~ 7000 2450 -$Comp -L VPLOT8_1 U1 -U 2 1 517625DB -P 7000 2150 -F 0 "U1" H 6850 2250 50 0000 C CNN -F 1 "VPLOT8_1" H 7150 2250 50 0000 C CNN - 2 7000 2150 - 1 0 0 -1 -$EndComp -Connection ~ 5800 2700 -$Comp -L PWR_FLAG #FLG01 -U 1 1 517625B5 -P 5800 2700 -F 0 "#FLG01" H 5800 2970 30 0001 C CNN -F 1 "PWR_FLAG" H 5800 2930 30 0000 C CNN - 1 5800 2700 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517625AE -P 4050 3100 -F 0 "#FLG02" H 4050 3370 30 0001 C CNN -F 1 "PWR_FLAG" H 4050 3330 30 0000 C CNN - 1 4050 3100 - 1 0 0 -1 -$EndComp -Connection ~ 3250 4150 -$Comp -L PWR_FLAG #FLG03 -U 1 1 5176256A -P 3250 4150 -F 0 "#FLG03" H 3250 4420 30 0001 C CNN -F 1 "PWR_FLAG" H 3250 4380 30 0000 C CNN - 1 3250 4150 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 5176255C -P 3250 4300 -F 0 "#PWR04" H 3250 4300 30 0001 C CNN -F 1 "GND" H 3250 4230 30 0001 C CNN - 1 3250 4300 - 1 0 0 -1 -$EndComp -Connection ~ 3250 3950 -Wire Wire Line - 3250 3950 3250 4300 -Wire Wire Line - 2500 3100 2750 3100 -Connection ~ 6200 1700 -Wire Wire Line - 7500 2400 7500 1700 -Wire Wire Line - 7500 1700 4050 1700 -Wire Wire Line - 5200 4350 5000 4350 -Wire Wire Line - 6600 3000 6600 4350 -Connection ~ 6200 3000 -Wire Wire Line - 6600 3000 6200 3000 -Connection ~ 4050 3950 -Wire Wire Line - 3850 3100 4400 3100 -Connection ~ 4050 3100 -Wire Wire Line - 4050 3450 4050 2650 -Connection ~ 4700 1700 -Wire Wire Line - 4050 1700 4050 2150 -Connection ~ 6200 3950 -Wire Wire Line - 6200 3550 6200 3950 -Wire Wire Line - 6900 2450 7050 2450 -Wire Wire Line - 5200 3450 5200 3400 -Connection ~ 4700 3400 -Wire Wire Line - 5200 3400 4700 3400 -Wire Wire Line - 4700 3300 4700 3450 -Wire Wire Line - 6200 2500 6200 2350 -Wire Wire Line - 4700 2600 4700 2900 -Wire Wire Line - 5900 2700 4700 2700 -Connection ~ 4700 2700 -Wire Wire Line - 6200 2450 6500 2450 -Connection ~ 6200 2450 -Wire Wire Line - 6200 2900 6200 3050 -Wire Wire Line - 5200 3950 5200 3850 -Wire Wire Line - 7050 3950 7050 2950 -Connection ~ 5200 3950 -Wire Wire Line - 4700 1700 4700 2100 -Wire Wire Line - 6200 1700 6200 1850 -Connection ~ 4700 3950 -Wire Wire Line - 3450 3100 3250 3100 -Wire Wire Line - 6600 4350 5600 4350 -Wire Wire Line - 4500 4350 3950 4350 -Wire Wire Line - 3950 4350 3950 3100 -Connection ~ 3950 3100 -Wire Wire Line - 7500 3300 7500 3950 -Wire Wire Line - 7500 3950 2750 3950 -Connection ~ 7050 3950 -Wire Wire Line - 2750 3950 2750 4000 -Wire Wire Line - 2750 4000 2500 4000 -$Comp -L SINE v1 -U 1 1 5176244C -P 2500 3550 -F 0 "v1" H 2300 3650 60 0000 C CNN -F 1 "SINE" H 2300 3500 60 0000 C CNN -F 2 "R1" H 2200 3550 60 0000 C CNN - 1 2500 3550 - 1 0 0 -1 -$EndComp -$Comp -L R R6 -U 1 1 51761AB3 -P 4750 4350 -F 0 "R6" V 4830 4350 50 0000 C CNN -F 1 "10k" V 4750 4350 50 0000 C CNN - 1 4750 4350 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 51761A46 -P 3000 3100 -F 0 "R1" V 3080 3100 50 0000 C CNN -F 1 "10k" V 3000 3100 50 0000 C CNN - 1 3000 3100 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 51761A2D -P 3650 3100 -F 0 "C1" H 3700 3200 50 0000 L CNN -F 1 "1m" H 3700 3000 50 0000 L CNN - 1 3650 3100 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 51761A14 -P 4050 3700 -F 0 "R3" V 4130 3700 50 0000 C CNN -F 1 "15k" V 4050 3700 50 0000 C CNN - 1 4050 3700 - 1 0 0 -1 -$EndComp -$Comp -L R R9 -U 1 1 517619D2 -P 7050 2700 -F 0 "R9" V 7130 2700 50 0000 C CNN -F 1 "1k" V 7050 2700 50 0000 C CNN - 1 7050 2700 - 1 0 0 -1 -$EndComp -$Comp -L C C2 -U 1 1 517619B5 -P 5200 3650 -F 0 "C2" H 5250 3750 50 0000 L CNN -F 1 "1m" H 5250 3550 50 0000 L CNN - 1 5200 3650 - 1 0 0 -1 -$EndComp -$Comp -L R R7 -U 1 1 517619A1 -P 6200 2100 -F 0 "R7" V 6280 2100 50 0000 C CNN -F 1 "8k" V 6200 2100 50 0000 C CNN - 1 6200 2100 - 1 0 0 -1 -$EndComp -$Comp -L R R8 -U 1 1 5176198B -P 6200 3300 -F 0 "R8" V 6280 3300 50 0000 C CNN -F 1 "3.4k" V 6200 3300 50 0000 C CNN - 1 6200 3300 - 1 0 0 -1 -$EndComp -$Comp -L C C4 -U 1 1 5176197A -P 6700 2450 -F 0 "C4" H 6750 2550 50 0000 L CNN -F 1 "1m" H 6750 2350 50 0000 L CNN - 1 6700 2450 - 0 1 1 0 -$EndComp -$Comp -L R R5 -U 1 1 51761974 -P 4700 3700 -F 0 "R5" V 4780 3700 50 0000 C CNN -F 1 "870" V 4700 3700 50 0000 C CNN - 1 4700 3700 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 51761961 -P 4700 2350 -F 0 "R4" V 4780 2350 50 0000 C CNN -F 1 "10k" V 4700 2350 50 0000 C CNN - 1 4700 2350 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5176195A -P 7500 2850 -F 0 "v2" H 7300 2950 60 0000 C CNN -F 1 "12" H 7300 2800 60 0000 C CNN -F 2 "R1" H 7200 2850 60 0000 C CNN - 1 7500 2850 - 1 0 0 -1 -$EndComp -$Comp -L C C3 -U 1 1 51761951 -P 5400 4350 -F 0 "C3" H 5450 4450 50 0000 L CNN -F 1 "1m" H 5450 4250 50 0000 L CNN - 1 5400 4350 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5176194E -P 4050 2400 -F 0 "R2" V 4130 2400 50 0000 C CNN -F 1 "100k" V 4050 2400 50 0000 C CNN - 1 4050 2400 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q2 -U 1 1 5176191C -P 6100 2700 -F 0 "Q2" H 6100 2550 50 0000 R CNN -F 1 "NPN" H 6100 2850 50 0000 R CNN - 1 6100 2700 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 517618FE -P 4600 3100 -F 0 "Q1" H 4600 2950 50 0000 R CNN -F 1 "NPN" H 4600 3250 50 0000 R CNN - 1 4600 3100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/analysis b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/analysis deleted file mode 100644 index 0e8f996..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 2e-03 20e-03 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.bak b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.bak deleted file mode 100644 index 6eed972..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.bak +++ /dev/null @@ -1,139 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 25 April 2013 11:20:04 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# Idc -# -DEF Idc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "Idc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.lib b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.lib deleted file mode 100644 index 008a8d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1-cache.lib +++ /dev/null @@ -1,139 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 26 April 2013 04:42:05 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# Idc -# -DEF Idc i 0 40 Y Y 1 F N -F0 "i" -200 100 60 H V C CNN -F1 "Idc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.bak b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.bak deleted file mode 100644 index a480fc4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.bak +++ /dev/null @@ -1,245 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 25 April 2013 11:20:04 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_8-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "25 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4700 4600 -$Comp -L PWR_FLAG #FLG01 -U 1 1 5178C3EF -P 4700 4600 -F 0 "#FLG01" H 4700 4870 30 0001 C CNN -F 1 "PWR_FLAG" H 4700 4830 30 0000 C CNN - 1 4700 4600 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5178C3E3 -P 4700 4700 -F 0 "#PWR02" H 4700 4700 30 0001 C CNN -F 1 "GND" H 4700 4630 30 0001 C CNN - 1 4700 4700 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4700 4500 4700 4700 -Connection ~ 5800 2350 -Wire Wire Line - 5600 2350 5800 2350 -Wire Wire Line - 3600 4250 3600 5000 -Wire Wire Line - 6100 2700 6100 5000 -Wire Wire Line - 6600 3750 6600 4750 -Wire Wire Line - 6600 4750 5300 4750 -Wire Wire Line - 4450 2700 4100 2700 -Wire Wire Line - 4750 1650 5800 1650 -Wire Wire Line - 5800 2900 5800 3200 -Wire Wire Line - 4750 2900 4750 3200 -Wire Wire Line - 4750 2150 4750 2500 -Wire Wire Line - 5800 2150 5800 2500 -Wire Wire Line - 5800 3700 4750 3700 -Wire Wire Line - 6100 5000 4100 5000 -Wire Wire Line - 5300 3700 5300 3850 -Connection ~ 5300 3700 -Wire Wire Line - 5750 1650 5750 1400 -Connection ~ 5750 1650 -Wire Wire Line - 5750 1400 6600 1400 -Wire Wire Line - 6600 1400 6600 2850 -Wire Wire Line - 3600 2700 3600 3350 -Wire Wire Line - 5000 2350 4750 2350 -Connection ~ 4750 2350 -Wire Wire Line - 5300 3800 4700 3800 -Connection ~ 5300 3800 -Wire Wire Line - 4700 3800 4700 4000 -$Comp -L R R7 -U 1 1 5178C3D2 -P 4700 4250 -F 0 "R7" V 4780 4250 50 0000 C CNN -F 1 "150" V 4700 4250 50 0000 C CNN - 1 4700 4250 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 5178C33C -P 3600 3800 -F 0 "v1" H 3400 3900 60 0000 C CNN -F 1 "SINE" H 3400 3750 60 0000 C CNN -F 2 "R1" H 3300 3800 60 0000 C CNN - 1 3600 3800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8 U1 -U 1 1 51779652 -P 5300 2350 -F 0 "U1" H 5150 2450 50 0000 C CNN -F 1 "VPLOT8" H 5450 2450 50 0000 C CNN - 1 5300 2350 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 517794FF -P 3850 2700 -F 0 "R1" V 3930 2700 50 0000 C CNN -F 1 "5k" V 3850 2700 50 0000 C CNN - 1 3850 2700 - 0 1 1 0 -$EndComp -$Comp -L R R6 -U 1 1 517794EA -P 5800 3450 -F 0 "R6" V 5880 3450 50 0000 C CNN -F 1 "150" V 5800 3450 50 0000 C CNN - 1 5800 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 517794E3 -P 4750 3450 -F 0 "R4" V 4830 3450 50 0000 C CNN -F 1 "150" V 4750 3450 50 0000 C CNN - 1 4750 3450 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 517794C9 -P 5800 1900 -F 0 "R5" V 5880 1900 50 0000 C CNN -F 1 "10k" V 5800 1900 50 0000 C CNN - 1 5800 1900 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 517794BE -P 4750 1900 -F 0 "R3" V 4830 1900 50 0000 C CNN -F 1 "10k" V 4750 1900 50 0000 C CNN - 1 4750 1900 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q2 -U 1 1 5177949E -P 5900 2700 -F 0 "Q2" H 5900 2550 50 0000 R CNN -F 1 "NPN" H 5900 2850 50 0000 R CNN - 1 5900 2700 - -1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 51779433 -P 3850 5000 -F 0 "R2" V 3930 5000 50 0000 C CNN -F 1 "R" V 3850 5000 50 0000 C CNN - 1 3850 5000 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 51779424 -P 6600 3300 -F 0 "v3" H 6400 3400 60 0000 C CNN -F 1 "15" H 6400 3250 60 0000 C CNN -F 2 "R1" H 6300 3300 60 0000 C CNN - 1 6600 3300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 51779415 -P 4650 2700 -F 0 "Q1" H 4650 2550 50 0000 R CNN -F 1 "NPN" H 4650 2850 50 0000 R CNN - 1 4650 2700 - 1 0 0 -1 -$EndComp -$Comp -L IDC v2 -U 1 1 5177940C -P 5300 4300 -F 0 "v2" H 5100 4400 60 0000 C CNN -F 1 "1m" H 5100 4250 60 0000 C CNN -F 2 "R1" H 5000 4300 60 0000 C CNN - 1 5300 4300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir deleted file mode 100644 index b1cc053..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir +++ /dev/null @@ -1,21 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 25 April 2013 11:19:59 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R7 9 0 150 -v1 2 5 SINE -U1 1 11 VPLOT8 -R1 8 2 5k -R6 3 9 150 -R4 7 9 150 -R5 12 11 10k -R3 12 1 10k -Q2 3 4 11 NPN -R2 4 5 R -v3 12 6 15 -Q1 7 8 1 NPN -v2 9 6 1m - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.ckt deleted file mode 100644 index d42cb97..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 11:19:59 am ist - -r7 9 0 150 -v1 2 5 sine( 5 50 ) -r1 8 2 5k -r6 3 9 150 -r4 7 9 150 -r5 12 11 10k -r3 12 1 10k -q2 11 4 3 npn -r2 4 5 r -v3 12 6 15 -q1 1 8 7 npn -v2 9 6 1m - -.tran 2e-03 20e-03 0e-00 -.plot v(1)-v(11) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.out deleted file mode 100644 index 95b8ceb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 11:19:59 am ist - -r7 9 0 150 -v1 2 5 sine( 5 50 ) -r1 8 2 5k -r6 3 9 150 -r4 7 9 150 -r5 12 11 10k -r3 12 1 10k -q2 11 4 3 npn -r2 4 5 r -v3 12 6 15 -q1 1 8 7 npn -v2 9 6 1m - -.tran 2e-03 20e-03 0e-00 - -* Control Statements -.control -run -plot v(1)-v(11) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.pro b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.pro deleted file mode 100644 index 71bd9f1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Thursday 18 April 2013 03:16:09 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.proj b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.proj deleted file mode 100644 index fe0de23..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_8.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.sch b/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.sch deleted file mode 100644 index 06b9dfa..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.1/example_8.1.sch +++ /dev/null @@ -1,245 +0,0 @@ -EESchema Schematic File Version 2 date Friday 26 April 2013 04:42:05 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_8.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "26 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5450 5400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 5178C3EF -P 5450 5400 -F 0 "#FLG01" H 5450 5670 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5630 30 0000 C CNN - 1 5450 5400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5178C3E3 -P 5450 5500 -F 0 "#PWR02" H 5450 5500 30 0001 C CNN -F 1 "GND" H 5450 5430 30 0001 C CNN - 1 5450 5500 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5450 5300 5450 5500 -Connection ~ 6550 3150 -Wire Wire Line - 6350 3150 6550 3150 -Wire Wire Line - 4350 5050 4350 5800 -Wire Wire Line - 6850 3500 6850 5800 -Wire Wire Line - 7350 4550 7350 5550 -Wire Wire Line - 7350 5550 6050 5550 -Wire Wire Line - 5200 3500 4850 3500 -Wire Wire Line - 5500 2450 6550 2450 -Wire Wire Line - 6550 3700 6550 4000 -Wire Wire Line - 5500 3700 5500 4000 -Wire Wire Line - 5500 2950 5500 3300 -Wire Wire Line - 6550 2950 6550 3300 -Wire Wire Line - 6550 4500 5500 4500 -Wire Wire Line - 6850 5800 4850 5800 -Wire Wire Line - 6050 4500 6050 4650 -Connection ~ 6050 4500 -Wire Wire Line - 6500 2450 6500 2200 -Connection ~ 6500 2450 -Wire Wire Line - 6500 2200 7350 2200 -Wire Wire Line - 7350 2200 7350 3650 -Wire Wire Line - 4350 3500 4350 4150 -Wire Wire Line - 5750 3150 5500 3150 -Connection ~ 5500 3150 -Wire Wire Line - 6050 4600 5450 4600 -Connection ~ 6050 4600 -Wire Wire Line - 5450 4600 5450 4800 -$Comp -L R R7 -U 1 1 5178C3D2 -P 5450 5050 -F 0 "R7" V 5530 5050 50 0000 C CNN -F 1 "150" V 5450 5050 50 0000 C CNN - 1 5450 5050 - 1 0 0 -1 -$EndComp -$Comp -L SINE v1 -U 1 1 5178C33C -P 4350 4600 -F 0 "v1" H 4150 4700 60 0000 C CNN -F 1 "SINE" H 4150 4550 60 0000 C CNN -F 2 "R1" H 4050 4600 60 0000 C CNN - 1 4350 4600 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8 U1 -U 1 1 51779652 -P 6050 3150 -F 0 "U1" H 5900 3250 50 0000 C CNN -F 1 "VPLOT8" H 6200 3250 50 0000 C CNN - 1 6050 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 517794FF -P 4600 3500 -F 0 "R1" V 4680 3500 50 0000 C CNN -F 1 "5k" V 4600 3500 50 0000 C CNN - 1 4600 3500 - 0 1 1 0 -$EndComp -$Comp -L R R6 -U 1 1 517794EA -P 6550 4250 -F 0 "R6" V 6630 4250 50 0000 C CNN -F 1 "150" V 6550 4250 50 0000 C CNN - 1 6550 4250 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 517794E3 -P 5500 4250 -F 0 "R4" V 5580 4250 50 0000 C CNN -F 1 "150" V 5500 4250 50 0000 C CNN - 1 5500 4250 - 1 0 0 -1 -$EndComp -$Comp -L R R5 -U 1 1 517794C9 -P 6550 2700 -F 0 "R5" V 6630 2700 50 0000 C CNN -F 1 "10k" V 6550 2700 50 0000 C CNN - 1 6550 2700 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 517794BE -P 5500 2700 -F 0 "R3" V 5580 2700 50 0000 C CNN -F 1 "10k" V 5500 2700 50 0000 C CNN - 1 5500 2700 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q2 -U 1 1 5177949E -P 6650 3500 -F 0 "Q2" H 6650 3350 50 0000 R CNN -F 1 "NPN" H 6650 3650 50 0000 R CNN - 1 6650 3500 - -1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 51779433 -P 4600 5800 -F 0 "R2" V 4680 5800 50 0000 C CNN -F 1 "R" V 4600 5800 50 0000 C CNN - 1 4600 5800 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 51779424 -P 7350 4100 -F 0 "v3" H 7150 4200 60 0000 C CNN -F 1 "15" H 7150 4050 60 0000 C CNN -F 2 "R1" H 7050 4100 60 0000 C CNN - 1 7350 4100 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 51779415 -P 5400 3500 -F 0 "Q1" H 5400 3350 50 0000 R CNN -F 1 "NPN" H 5400 3650 50 0000 R CNN - 1 5400 3500 - 1 0 0 -1 -$EndComp -$Comp -L IDC v2 -U 1 1 5177940C -P 6050 5100 -F 0 "v2" H 5850 5200 60 0000 C CNN -F 1 "1m" H 5850 5050 60 0000 C CNN -F 2 "R1" H 5750 5100 60 0000 C CNN - 1 6050 5100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/analysis b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/analysis deleted file mode 100644 index 722124c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 15e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib Binary files differdeleted file mode 100644 index e93b428..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib +++ /dev/null diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir deleted file mode 100644 index 7f3611e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir +++ /dev/null @@ -1,41 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 29 April 2013 11:24:11 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 0 25 0 21 25 24 22 21 VPLOT8_1 -U13 23 VPLOT8_1 -v2 0 8 15 -U14 12 6 IPLOT -U11 5 18 IPLOT -R7 7 8 3k -U15 9 7 IPLOT -Q9 9 23 6 NPN -U12 23 1 IPLOT -R6 1 8 15.7k -U9 2 8 IPLOT -U6 11 8 IPLOT -U2 10 8 IPLOT -Q6 2 25 4 NPN -U8 3 4 IPLOT -R5 12 5 2.3k -U10 19 22 IPLOT -U7 13 21 IPLOT -U4 14 24 IPLOT -U5 15 16 IPLOT -U1 17 25 IPLOT -Q8 23 22 18 NPN -R4 12 19 3k -Q7 3 21 22 NPN -Q5 3 24 12 NPN -R1 0 17 28.6k -Q1 10 25 25 NPN -Q3 11 25 16 NPN -R3 12 13 20k -Q4 15 0 21 NPN -v1 12 0 15 -R2 12 14 20k -Q2 15 0 24 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt deleted file mode 100644 index 14076b8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt +++ /dev/null @@ -1,53 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 29 april 2013 11:24:11 am ist
-
-* Plotting option vplot8_1
-* Plotting option vplot8_1
-v2 0 8 15
-V_u14 12 6 0
-V_u11 5 18 0
-r7 7 8 3k
-V_u15 9 7 0
-q9 6 23 9 npn
-V_u12 23 1 0
-r6 1 8 15.7k
-V_u9 2 8 0
-V_u6 11 8 0
-V_u2 10 8 0
-q6 4 25 2 npn
-V_u8 3 4 0
-r5 12 5 2.3k
-V_u10 19 22 0
-V_u7 13 21 0
-V_u4 14 24 0
-V_u5 15 16 0
-V_u1 17 25 0
-q8 18 22 23 npn
-r4 12 19 3k
-q7 22 21 3 npn
-q5 12 24 3 npn
-r1 0 17 28.6k
-q1 25 25 10 npn
-q3 16 25 11 npn
-r3 12 13 20k
-q4 21 0 15 npn
-v1 12 0 15
-r2 12 14 20k
-q2 24 0 15 npn
-
-.dc v1 0e-00 15e-00 1e-00
-.plot v(0) v(25) v(0) v(21) v(25) v(24) v(22) v(21)
-.plot v(23)
-.plot i(V_u14)
-.plot i(V_u11)
-.plot i(V_u15)
-.plot i(V_u12)
-.plot i(V_u9)
-.plot i(V_u6)
-.plot i(V_u2)
-.plot i(V_u8)
-.plot i(V_u10)
-.plot i(V_u7)
-.plot i(V_u4)
-.plot i(V_u5)
-.plot i(V_u1)
-.end
diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out deleted file mode 100644 index a08c832..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out +++ /dev/null @@ -1,58 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 29 april 2013 11:24:11 am ist
-
-* Plotting option vplot8_1
-* Plotting option vplot8_1
-v2 0 8 15
-V_u14 12 6 0
-V_u11 5 18 0
-r7 7 8 3k
-V_u15 9 7 0
-q9 6 23 9 npn
-V_u12 23 1 0
-r6 1 8 15.7k
-V_u9 2 8 0
-V_u6 11 8 0
-V_u2 10 8 0
-q6 4 25 2 npn
-V_u8 3 4 0
-r5 12 5 2.3k
-V_u10 19 22 0
-V_u7 13 21 0
-V_u4 14 24 0
-V_u5 15 16 0
-V_u1 17 25 0
-q8 18 22 23 npn
-r4 12 19 3k
-q7 22 21 3 npn
-q5 12 24 3 npn
-r1 0 17 28.6k
-q1 25 25 10 npn
-q3 16 25 11 npn
-r3 12 13 20k
-q4 21 0 15 npn
-v1 12 0 15
-r2 12 14 20k
-q2 24 0 15 npn
-
-.dc v1 0e-00 15e-00 1e-00
-
-* Control Statements
-.control
-run
-plot v(0) v(25) v(0) v(21) v(25) v(24) v(22) v(21)
-plot v(23)
-plot i(V_u14)
-plot i(V_u11)
-plot i(V_u15)
-plot i(V_u12)
-plot i(V_u9)
-plot i(V_u6)
-plot i(V_u2)
-plot i(V_u8)
-plot i(V_u10)
-plot i(V_u7)
-plot i(V_u4)
-plot i(V_u5)
-plot i(V_u1)
-.endc
-.end
diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro deleted file mode 100644 index 767e17f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 29 April 2013 10:50:36 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj deleted file mode 100644 index c332699..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_8.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch deleted file mode 100644 index cc68262..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch +++ /dev/null @@ -1,573 +0,0 @@ -EESchema Schematic File Version 2 date Monday 29 April 2013 11:24:17 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "29 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 3450 1150 -Connection ~ 3300 5050 -Connection ~ 4900 2900 -$Comp -L VPLOT8_1 U3 -U 8 1 517E0976 -P 4900 2600 -F 0 "U3" H 4750 2700 50 0000 C CNN -F 1 "VPLOT8_1" H 5050 2700 50 0000 C CNN - 8 4900 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3750 3100 -Connection ~ 3900 2550 -Connection ~ 4000 3000 -Connection ~ 4750 2600 -Connection ~ 5500 2950 -Connection ~ 3900 4150 -$Comp -L VPLOT8_1 U3 -U 5 1 517E0908 -P 3900 3850 -F 0 "U3" H 3750 3950 50 0000 C CNN -F 1 "VPLOT8_1" H 4050 3950 50 0000 C CNN - 5 3900 3850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 517E0903 -P 2950 3850 -F 0 "U3" H 2800 3950 50 0000 C CNN -F 1 "VPLOT8_1" H 3100 3950 50 0000 C CNN - 2 2950 3850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 517E08FC -P 2750 2650 -F 0 "U3" H 2600 2750 50 0000 C CNN -F 1 "VPLOT8_1" H 2900 2750 50 0000 C CNN - 1 2750 2650 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 3 1 517E08F3 -P 3750 2800 -F 0 "U3" H 3600 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 3900 2900 50 0000 C CNN - 3 3750 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 6 1 517E08EB -P 4000 2700 -F 0 "U3" H 3850 2800 50 0000 C CNN -F 1 "VPLOT8_1" H 4150 2800 50 0000 C CNN - 6 4000 2700 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 4 1 517E08E7 -P 3900 2250 -F 0 "U3" H 3750 2350 50 0000 C CNN -F 1 "VPLOT8_1" H 4050 2350 50 0000 C CNN - 4 3900 2250 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 7 1 517E08DA -P 4750 2300 -F 0 "U3" H 4600 2400 50 0000 C CNN -F 1 "VPLOT8_1" H 4900 2400 50 0000 C CNN - 7 4750 2300 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U13 -U 1 1 517E08D5 -P 5500 2650 -F 0 "U13" H 5350 2750 50 0000 C CNN -F 1 "VPLOT8_1" H 5650 2750 50 0000 C CNN - 1 5500 2650 - 1 0 0 -1 -$EndComp -Connection ~ 4000 5050 -Wire Wire Line - 4000 5050 4000 5550 -Wire Wire Line - 4000 5550 3350 5550 -Connection ~ 2350 2550 -Wire Wire Line - 2350 2550 2350 4150 -Wire Wire Line - 2350 4150 1900 4150 -Connection ~ 3100 1150 -Connection ~ 2400 2550 -Connection ~ 2650 2750 -Wire Wire Line - 2250 2550 2650 2550 -Wire Wire Line - 2650 2550 2650 2950 -Connection ~ 2750 2950 -Wire Wire Line - 2750 2950 2750 3300 -Wire Wire Line - 2750 3300 3750 3300 -Wire Wire Line - 3750 3300 3750 2950 -Wire Wire Line - 5250 2250 5250 2400 -Wire Wire Line - 5900 2750 5900 2450 -Wire Wire Line - 5900 3800 5900 4000 -Connection ~ 5250 2950 -Wire Wire Line - 5250 2950 5600 2950 -Wire Wire Line - 5250 3650 5250 4200 -Wire Wire Line - 4500 4350 4500 4550 -Wire Wire Line - 4500 3750 4500 3950 -Connection ~ 3450 2550 -Wire Wire Line - 3450 2550 4900 2550 -Wire Wire Line - 4900 2550 4900 3000 -Connection ~ 4350 1150 -Wire Wire Line - 3100 1650 3100 1950 -Wire Wire Line - 4600 1650 4600 1950 -Wire Wire Line - 2550 3250 2550 3350 -Wire Wire Line - 4350 3200 4600 3200 -Wire Wire Line - 3300 4550 3300 4350 -Wire Wire Line - 2550 4350 2550 4550 -Wire Wire Line - 2550 3850 2550 3950 -Connection ~ 3300 3150 -Wire Wire Line - 3300 3750 3300 3950 -Wire Wire Line - 3450 3150 3100 3150 -Wire Wire Line - 2650 2950 2800 2950 -Wire Wire Line - 3100 2750 3100 2450 -Wire Wire Line - 3450 2450 3450 2750 -Wire Wire Line - 3000 4150 2850 4150 -Wire Wire Line - 2550 3900 2950 3900 -Wire Wire Line - 2950 3900 2950 4150 -Connection ~ 2950 4150 -Connection ~ 2550 3900 -Wire Wire Line - 3100 2650 3950 2650 -Connection ~ 3100 2650 -Wire Wire Line - 3950 2650 3950 3000 -Wire Wire Line - 3950 3000 4050 3000 -Wire Wire Line - 4600 2800 4600 2450 -Wire Wire Line - 3300 3150 3300 3250 -Wire Wire Line - 3450 1650 3450 1950 -Wire Wire Line - 4350 1150 4350 2800 -Wire Wire Line - 4950 2600 4600 2600 -Connection ~ 4600 2600 -Connection ~ 4600 1150 -Wire Wire Line - 4500 3200 4500 3250 -Connection ~ 4500 3200 -Wire Wire Line - 2950 4150 4200 4150 -Wire Wire Line - 5250 2800 5250 3150 -Wire Wire Line - 5250 5050 5250 4700 -Connection ~ 4500 5050 -Wire Wire Line - 5900 3150 5900 3300 -Wire Wire Line - 5900 4500 5900 5050 -Wire Wire Line - 5900 5050 2550 5050 -Connection ~ 5250 5050 -Wire Wire Line - 5250 1650 5250 1750 -Wire Wire Line - 5900 1950 5900 1150 -Connection ~ 5250 1150 -Wire Wire Line - 2650 2750 2550 2750 -Wire Wire Line - 5900 1150 1900 1150 -Wire Wire Line - 1900 1150 1900 3250 -Wire Wire Line - 2450 2550 2450 5550 -Connection ~ 2450 2550 -$Comp -L DC v2 -U 1 1 517E089A -P 2900 5550 -F 0 "v2" H 2700 5650 60 0000 C CNN -F 1 "15" H 2700 5500 60 0000 C CNN -F 2 "R1" H 2600 5550 60 0000 C CNN - 1 2900 5550 - 0 -1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 517E07C2 -P 2400 2550 -F 0 "#FLG01" H 2400 2820 30 0001 C CNN -F 1 "PWR_FLAG" H 2400 2780 30 0000 C CNN - 1 2400 2550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 517E07B3 -P 2250 2550 -F 0 "#PWR02" H 2250 2550 30 0001 C CNN -F 1 "GND" H 2250 2480 30 0001 C CNN - 1 2250 2550 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U14 -U 1 1 517E06CB -P 5900 2200 -F 0 "U14" H 5750 2300 50 0000 C CNN -F 1 "IPLOT" H 6050 2300 50 0000 C CNN - 1 5900 2200 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U11 -U 1 1 517E06B1 -P 5250 2000 -F 0 "U11" H 5100 2100 50 0000 C CNN -F 1 "IPLOT" H 5400 2100 50 0000 C CNN - 1 5250 2000 - 0 1 1 0 -$EndComp -$Comp -L R R7 -U 1 1 517E061A -P 5900 4250 -F 0 "R7" V 5980 4250 50 0000 C CNN -F 1 "3k" V 5900 4250 50 0000 C CNN - 1 5900 4250 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U15 -U 1 1 517E060D -P 5900 3550 -F 0 "U15" H 5750 3650 50 0000 C CNN -F 1 "IPLOT" H 6050 3650 50 0000 C CNN - 1 5900 3550 - 0 1 1 0 -$EndComp -$Comp -L NPN Q9 -U 1 1 517E05E2 -P 5800 2950 -F 0 "Q9" H 5800 2800 50 0000 R CNN -F 1 "NPN" H 5800 3100 50 0000 R CNN - 1 5800 2950 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U12 -U 1 1 517E05AE -P 5250 3400 -F 0 "U12" H 5100 3500 50 0000 C CNN -F 1 "IPLOT" H 5400 3500 50 0000 C CNN - 1 5250 3400 - 0 1 1 0 -$EndComp -$Comp -L R R6 -U 1 1 517E0593 -P 5250 4450 -F 0 "R6" V 5330 4450 50 0000 C CNN -F 1 "15.7k" V 5250 4450 50 0000 C CNN - 1 5250 4450 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U9 -U 1 1 517E0566 -P 4500 4800 -F 0 "U9" H 4350 4900 50 0000 C CNN -F 1 "IPLOT" H 4650 4900 50 0000 C CNN - 1 4500 4800 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U6 -U 1 1 517E0562 -P 3300 4800 -F 0 "U6" H 3150 4900 50 0000 C CNN -F 1 "IPLOT" H 3450 4900 50 0000 C CNN - 1 3300 4800 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 517E055E -P 2550 4800 -F 0 "U2" H 2400 4900 50 0000 C CNN -F 1 "IPLOT" H 2700 4900 50 0000 C CNN - 1 2550 4800 - 0 1 1 0 -$EndComp -$Comp -L NPN Q6 -U 1 1 517E0538 -P 4400 4150 -F 0 "Q6" H 4400 4000 50 0000 R CNN -F 1 "NPN" H 4400 4300 50 0000 R CNN - 1 4400 4150 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U8 -U 1 1 517E0528 -P 4500 3500 -F 0 "U8" H 4350 3600 50 0000 C CNN -F 1 "IPLOT" H 4650 3600 50 0000 C CNN - 1 4500 3500 - 0 1 1 0 -$EndComp -$Comp -L R R5 -U 1 1 517E04FA -P 5250 1400 -F 0 "R5" V 5330 1400 50 0000 C CNN -F 1 "2.3k" V 5250 1400 50 0000 C CNN - 1 5250 1400 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U10 -U 1 1 517E04B8 -P 4600 2200 -F 0 "U10" H 4450 2300 50 0000 C CNN -F 1 "IPLOT" H 4750 2300 50 0000 C CNN - 1 4600 2200 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U7 -U 1 1 517E04B5 -P 3450 2200 -F 0 "U7" H 3300 2300 50 0000 C CNN -F 1 "IPLOT" H 3600 2300 50 0000 C CNN - 1 3450 2200 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 517E04B0 -P 3100 2200 -F 0 "U4" H 2950 2300 50 0000 C CNN -F 1 "IPLOT" H 3250 2300 50 0000 C CNN - 1 3100 2200 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U5 -U 1 1 517E0481 -P 3300 3500 -F 0 "U5" H 3150 3600 50 0000 C CNN -F 1 "IPLOT" H 3450 3600 50 0000 C CNN - 1 3300 3500 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 517E0473 -P 2550 3600 -F 0 "U1" H 2400 3700 50 0000 C CNN -F 1 "IPLOT" H 2700 3700 50 0000 C CNN - 1 2550 3600 - 0 1 1 0 -$EndComp -$Comp -L NPN Q8 -U 1 1 517E0432 -P 5150 2600 -F 0 "Q8" H 5150 2450 50 0000 R CNN -F 1 "NPN" H 5150 2750 50 0000 R CNN - 1 5150 2600 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 517E0427 -P 4600 1400 -F 0 "R4" V 4680 1400 50 0000 C CNN -F 1 "3k" V 4600 1400 50 0000 C CNN - 1 4600 1400 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q7 -U 1 1 517E0411 -P 4700 3000 -F 0 "Q7" H 4700 2850 50 0000 R CNN -F 1 "NPN" H 4700 3150 50 0000 R CNN - 1 4700 3000 - -1 0 0 -1 -$EndComp -$Comp -L NPN Q5 -U 1 1 517E03F6 -P 4250 3000 -F 0 "Q5" H 4250 2850 50 0000 R CNN -F 1 "NPN" H 4250 3150 50 0000 R CNN - 1 4250 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 517E03C0 -P 2550 3000 -F 0 "R1" V 2630 3000 50 0000 C CNN -F 1 "28.6k" V 2550 3000 50 0000 C CNN - 1 2550 3000 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 517E03AD -P 2650 4150 -F 0 "Q1" H 2650 4000 50 0000 R CNN -F 1 "NPN" H 2650 4300 50 0000 R CNN - 1 2650 4150 - -1 0 0 -1 -$EndComp -$Comp -L NPN Q3 -U 1 1 517E03A2 -P 3200 4150 -F 0 "Q3" H 3200 4000 50 0000 R CNN -F 1 "NPN" H 3200 4300 50 0000 R CNN - 1 3200 4150 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 517E0387 -P 3450 1400 -F 0 "R3" V 3530 1400 50 0000 C CNN -F 1 "20k" V 3450 1400 50 0000 C CNN - 1 3450 1400 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q4 -U 1 1 517E0370 -P 3550 2950 -F 0 "Q4" H 3550 2800 50 0000 R CNN -F 1 "NPN" H 3550 3100 50 0000 R CNN - 1 3550 2950 - -1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 517E0351 -P 1900 3700 -F 0 "v1" H 1700 3800 60 0000 C CNN -F 1 "15" H 1700 3650 60 0000 C CNN -F 2 "R1" H 1600 3700 60 0000 C CNN - 1 1900 3700 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 517E0341 -P 3100 1400 -F 0 "R2" V 3180 1400 50 0000 C CNN -F 1 "20k" V 3100 1400 50 0000 C CNN - 1 3100 1400 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q2 -U 1 1 517E0337 -P 3000 2950 -F 0 "Q2" H 3000 2800 50 0000 R CNN -F 1 "NPN" H 3000 3100 50 0000 R CNN - 1 3000 2950 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/analysis b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/analysis deleted file mode 100644 index f74e3c8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/cd4007.txt b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/cd4007.txt deleted file mode 100644 index cb5beb4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/cd4007.txt +++ /dev/null @@ -1,22 +0,0 @@ -* CD4007 NMOS and PMOS transistor SPICE models - -* Typical - Typical Condition - -.model MbreakND NMOS -+ Level=1 Gamma= 0 Xj=0 -+ Tox=1200n Phi=.6 Rs=0 Kp=111u Vto=1.4 Lambda=0.01 -+ Rd=0 Cbd=2.0p Cbs=2.0p Pb=.8 Cgso=0.1p -+ Cgdo=0.1p Is=16.64p N=1 - -*The default W and L is 30 and 10 um respectively and AD and AS -*should not be included. - - -.model MbreakPD PMOS -+ Level=1 Gamma= 0 Xj=0 -+ Tox=1200n Phi=.6 Rs=0 Kp=55u Vto=-1.2 Lambda=0.04 -+ Rd=0 Cbd=4.0p Cbs=4.0p Pb=.8 Cgso=0.2p -+ Cgdo=0.2p Is=16.64p N=1 - -*The default W and L is 60 and 10 um respectively and AD and AS -*should not be included. diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.bak b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.bak deleted file mode 100644 index cc8bedb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.bak +++ /dev/null @@ -1,118 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 10 May 2013 04:54:25 PM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# MOS_N -# -DEF MOS_N M 0 0 N Y 1 F N -F0 "M" 10 170 60 H V R CNN -F1 "MOS_N" 10 -150 60 H V R CNN -ALIAS MOSFET_N -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 8 100 -100 100 0 50 0 N -P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# MOS_P -# -DEF MOS_P M 0 40 Y N 1 F N -F0 "M" 0 190 60 H V R CNN -F1 "MOS_P" 0 -180 60 H V R CNN -ALIAS MOSFET_P -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 8 30 0 0 0 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 0 80 0 100 0 100 -100 N -P 5 0 1 8 30 40 30 -30 80 0 30 40 30 40 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.lib b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.lib deleted file mode 100644 index 5680002..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4-cache.lib +++ /dev/null @@ -1,118 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 16 May 2013 11:24:57 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# MOS_N -# -DEF MOS_N M 0 0 N Y 1 F N -F0 "M" 10 170 60 H V R CNN -F1 "MOS_N" 10 -150 60 H V R CNN -ALIAS MOSFET_N -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 8 100 -100 100 0 50 0 N -P 5 0 1 8 50 30 50 -30 0 0 50 30 50 30 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# MOS_P -# -DEF MOS_P M 0 40 Y N 1 F N -F0 "M" 0 190 60 H V R CNN -F1 "MOS_P" 0 -180 60 H V R CNN -ALIAS MOSFET_P -DRAW -P 2 0 1 8 -50 -100 -50 100 N -P 2 0 1 10 0 -150 0 150 N -P 2 0 1 8 30 0 0 0 N -P 2 0 1 0 100 -100 0 -100 N -P 2 0 1 0 100 100 0 100 N -P 3 0 1 0 80 0 100 0 100 -100 N -P 5 0 1 8 30 40 30 -30 80 0 30 40 30 40 N -X D D 100 200 100 D 40 40 1 1 P -X G G -200 0 150 R 40 40 1 1 I -X S S 100 -200 100 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.bak b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.bak deleted file mode 100644 index e14fb9e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.bak +++ /dev/null @@ -1,194 +0,0 @@ -EESchema Schematic File Version 2 date Friday 10 May 2013 04:54:25 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_9.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "10 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5750 3600 -Wire Wire Line - 5750 3600 5300 3600 -Wire Wire Line - 5300 3600 5300 3850 -Connection ~ 5600 3450 -Wire Wire Line - 5600 3650 5600 3450 -Wire Wire Line - 6050 3450 6400 3450 -Connection ~ 6050 4300 -Wire Wire Line - 6050 4050 6050 4350 -Wire Wire Line - 6050 4350 5100 4350 -Wire Wire Line - 6650 3900 6650 4300 -Wire Wire Line - 6050 2850 6050 2700 -Wire Wire Line - 6050 3250 6050 3650 -Wire Wire Line - 5750 3050 5750 3850 -Connection ~ 6050 3450 -Wire Wire Line - 6400 3450 6400 3750 -Connection ~ 6400 4300 -Wire Wire Line - 6050 2700 6650 2700 -Wire Wire Line - 6650 2700 6650 3000 -Wire Wire Line - 5750 3450 5100 3450 -Connection ~ 5750 3450 -Wire Wire Line - 5100 3450 5100 3550 -Wire Wire Line - 6400 4400 6400 4150 -Connection ~ 5500 3450 -Wire Wire Line - 6650 4300 6050 4300 -Connection ~ 6200 3450 -Wire Wire Line - 5600 4050 5600 4350 -Connection ~ 5600 4350 -$Comp -L MOS_N M3 -U 1 1 518CD8BE -P 5500 3850 -F 0 "M3" H 5510 4020 60 0000 R CNN -F 1 "MOS_N" H 5510 3700 60 0000 R CNN - 1 5500 3850 - 1 0 0 -1 -$EndComp -$Comp -L MOS_P M1 -U 1 1 5188E486 -P 5950 3050 -F 0 "M1" H 5950 3240 60 0000 R CNN -F 1 "MOS_P" H 5950 2870 60 0000 R CNN - 1 5950 3050 - 1 0 0 1 -$EndComp -$Comp -L MOS_N M2 -U 1 1 5188E477 -P 5950 3850 -F 0 "M2" H 5960 4020 60 0000 R CNN -F 1 "MOS_N" H 5960 3700 60 0000 R CNN - 1 5950 3850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 5188E0A2 -P 6200 3150 -F 0 "U2" H 6050 3250 50 0000 C CNN -F 1 "VPLOT8_1" H 6350 3250 50 0000 C CNN - 2 6200 3150 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5188E094 -P 6400 4300 -F 0 "#FLG01" H 6400 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 6400 4530 30 0000 C CNN - 1 6400 4300 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 517F5425 -P 6650 3450 -F 0 "v2" H 6450 3550 60 0000 C CNN -F 1 "10" H 6450 3400 60 0000 C CNN -F 2 "R1" H 6350 3450 60 0000 C CNN - 1 6650 3450 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 517F5879 -P 5500 3150 -F 0 "U2" H 5350 3250 50 0000 C CNN -F 1 "VPLOT8_1" H 5650 3250 50 0000 C CNN - 1 5500 3150 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 517F5470 -P 6400 4400 -F 0 "#PWR02" H 6400 4400 30 0001 C CNN -F 1 "GND" H 6400 4330 30 0001 C CNN - 1 6400 4400 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 517F544C -P 5100 3900 -F 0 "v1" H 4900 4000 60 0000 C CNN -F 1 "DC" H 4900 3850 60 0000 C CNN -F 2 "R1" H 4800 3900 60 0000 C CNN - 1 5100 3900 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 517F53E7 -P 6400 3950 -F 0 "C1" H 6450 4050 50 0000 L CNN -F 1 ".5p" H 6450 3850 50 0000 L CNN - 1 6400 3950 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir deleted file mode 100644 index f3aa33e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir +++ /dev/null @@ -1,14 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 16 May 2013 11:24:53 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -M1 4 3 1 MOS_P -M2 4 3 0 MOS_N -U2 3 4 VPLOT8_1 -v2 1 0 10 -v1 3 0 DC -C1 4 0 .5p - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.ckt deleted file mode 100644 index 0699b0a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.ckt +++ /dev/null @@ -1,14 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 16 may 2013 11:24:53 am ist -.include mos_p.lib -.include mos_n.lib - -m1 4 3 1 1 mos_p -m2 4 3 0 0 mos_n -* Plotting option vplot8_1 -v2 1 0 10 -v1 3 0 dc 10 -c1 4 0 .5p - -.dc v1 0e-00 10e-00 1e-00 -.plot v(3) v(4) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.out deleted file mode 100644 index 4fc3ec2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.cir.out +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 16 may 2013 11:24:53 am ist -.include mos_p.lib -.include mos_n.lib - -m1 4 3 1 1 mos_p -m2 4 3 0 0 mos_n -* Plotting option vplot8_1 -v2 1 0 10 -v1 3 0 dc 10 -c1 4 0 .5p - -.dc v1 0e-00 10e-00 1e-00 - -* Control Statements -.control -run -plot v(3) v(4) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.pro b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.pro deleted file mode 100644 index d4ca737..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 30 April 2013 10:42:25 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.proj b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.proj deleted file mode 100644 index 8fac45c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_9.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.sch b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.sch deleted file mode 100644 index de8111b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/example_9.4.sch +++ /dev/null @@ -1,175 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 16 May 2013 11:24:57 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_9.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5750 3600 -Wire Wire Line - 6050 3450 6400 3450 -Connection ~ 6050 4300 -Wire Wire Line - 6050 4050 6050 4350 -Wire Wire Line - 6050 4350 5100 4350 -Wire Wire Line - 6650 3900 6650 4300 -Wire Wire Line - 6050 2850 6050 2700 -Wire Wire Line - 6050 3250 6050 3650 -Wire Wire Line - 5750 3050 5750 3850 -Connection ~ 6050 3450 -Wire Wire Line - 6400 3450 6400 3750 -Connection ~ 6400 4300 -Wire Wire Line - 6050 2700 6650 2700 -Wire Wire Line - 6650 2700 6650 3000 -Wire Wire Line - 5750 3450 5100 3450 -Connection ~ 5750 3450 -Wire Wire Line - 5100 3450 5100 3550 -Wire Wire Line - 6400 4400 6400 4150 -Connection ~ 5500 3450 -Wire Wire Line - 6650 4300 6050 4300 -Connection ~ 6200 3450 -$Comp -L MOS_P M1 -U 1 1 5188E486 -P 5950 3050 -F 0 "M1" H 5950 3240 60 0000 R CNN -F 1 "MOS_P" H 5950 2870 60 0000 R CNN - 1 5950 3050 - 1 0 0 1 -$EndComp -$Comp -L MOS_N M2 -U 1 1 5188E477 -P 5950 3850 -F 0 "M2" H 5960 4020 60 0000 R CNN -F 1 "MOS_N" H 5960 3700 60 0000 R CNN - 1 5950 3850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 5188E0A2 -P 6200 3150 -F 0 "U2" H 6050 3250 50 0000 C CNN -F 1 "VPLOT8_1" H 6350 3250 50 0000 C CNN - 2 6200 3150 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5188E094 -P 6400 4300 -F 0 "#FLG01" H 6400 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 6400 4530 30 0000 C CNN - 1 6400 4300 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 517F5425 -P 6650 3450 -F 0 "v2" H 6450 3550 60 0000 C CNN -F 1 "10" H 6450 3400 60 0000 C CNN -F 2 "R1" H 6350 3450 60 0000 C CNN - 1 6650 3450 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 517F5879 -P 5500 3150 -F 0 "U2" H 5350 3250 50 0000 C CNN -F 1 "VPLOT8_1" H 5650 3250 50 0000 C CNN - 1 5500 3150 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 517F5470 -P 6400 4400 -F 0 "#PWR02" H 6400 4400 30 0001 C CNN -F 1 "GND" H 6400 4330 30 0001 C CNN - 1 6400 4400 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 517F544C -P 5100 3900 -F 0 "v1" H 4900 4000 60 0000 C CNN -F 1 "DC" H 4900 3850 60 0000 C CNN -F 2 "R1" H 4800 3900 60 0000 C CNN - 1 5100 3900 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 517F53E7 -P 6400 3950 -F 0 "C1" H 6450 4050 50 0000 L CNN -F 1 ".5p" H 6450 3850 50 0000 L CNN - 1 6400 3950 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_n.lib b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_n.lib deleted file mode 100644 index 23ac1f6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_n.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model mos_n NMOS( Cgso=877.2p Tox=100n Rs=70.6m Tt=140n Vto=-3.67 -+ Pb=.8 Rg=.811 Theta=0 Phi=.6 Fc=.5 -+ Delta=0 Vmax=0 Kappa=0 Rds=444.4K Level=3 -+ L=2u Mj=.5 Uo=300 Eta=0 W=1.9 -+ Cgdo=369.3p Gamma=0 Xj=0 Rd=60.66m Cbd=2.141n -+ Is=52.23E-18 N=2 Kp=10.15u ) diff --git a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_p.lib b/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_p.lib deleted file mode 100644 index 2c58d87..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_9/example_9.4/mos_p.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model mos_p PMOS( Cgso=877.2p Tox=100n Rs=70.6m Tt=140n Vto=-3.67 -+ Pb=.8 Rg=.811 Theta=0 Phi=.6 Fc=.5 -+ Delta=0 Vmax=0 Kappa=0 Rds=444.4K Level=3 -+ L=2u Mj=.5 Uo=300 Eta=0 W=1.9 -+ Cgdo=369.3p Gamma=0 Xj=0 Rd=60.66m Cbd=2.141n -+ Is=52.23E-18 N=2 Kp=10.15u )
\ No newline at end of file diff --git a/OSCAD/Examples/simpleTTL/analysis b/OSCAD/Examples/simpleTTL/analysis deleted file mode 100644 index bf5e632..0000000 --- a/OSCAD/Examples/simpleTTL/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-09 1e-06 0e-00 diff --git a/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak b/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak deleted file mode 100644 index 4bb51e9..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak +++ /dev/null @@ -1,148 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 20 December 2012 12:04:47 AM IST -#encoding utf-8 -# -# 74LS00 -# -DEF 74LS00 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS00" 0 -100 60 H V C CNN -ALIAS 74LS37 7400 74HCT00 74HC00 -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O I -X ~ 8 600 0 300 L 60 60 3 1 O I -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O I -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O -X ~ 8 600 0 300 L 60 60 3 2 O -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/simpleTTL/simpleTTL-cache.lib b/OSCAD/Examples/simpleTTL/simpleTTL-cache.lib deleted file mode 100644 index bd572f0..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL-cache.lib +++ /dev/null @@ -1,148 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 02 April 2013 03:01:00 PM IST -#encoding utf-8 -# -# 74LS00 -# -DEF 74LS00 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS00" 0 -100 60 H V C CNN -ALIAS 74LS37 7400 74HCT00 74HC00 -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O I -X ~ 8 600 0 300 L 60 60 3 1 O I -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O I -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O -X ~ 8 600 0 300 L 60 60 3 2 O -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.bak b/OSCAD/Examples/simpleTTL/simpleTTL.bak deleted file mode 100644 index 2bf0b11..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.bak +++ /dev/null @@ -1,166 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 20 December 2012 12:04:47 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:analogXSpice -LIBS:simpleTTL-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5550 3450 -Wire Wire Line - 5550 3300 5550 3600 -Wire Wire Line - 2950 4600 5550 4600 -Connection ~ 4500 4600 -Wire Wire Line - 4500 4300 4500 4600 -Wire Wire Line - 3700 4600 3700 4450 -Connection ~ 2950 4600 -Wire Wire Line - 2950 3350 4150 3350 -Wire Wire Line - 2950 4250 2950 4800 -Wire Wire Line - 3700 3550 4150 3550 -Connection ~ 3700 4600 -Wire Wire Line - 4550 2900 4550 3250 -Wire Wire Line - 3450 3350 3450 3250 -Connection ~ 3450 3350 -Wire Wire Line - 5550 3450 5350 3450 -Wire Wire Line - 5550 4600 5550 4100 -$Comp -L VPLOT8_1 U2 -U 2 1 50CEBA04 -P 5550 3000 -F 0 "U2" H 5400 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5700 3100 50 0000 C CNN - 2 5550 3000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 50CEBA01 -P 3450 2950 -F 0 "U2" H 3300 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 3600 3050 50 0000 C CNN - 1 3450 2950 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50862FAD -P 4550 2900 -F 0 "#FLG01" H 4550 3170 30 0001 C CNN -F 1 "PWR_FLAG" H 4550 3130 30 0000 C CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50862FA6 -P 4500 4300 -F 0 "#FLG02" H 4500 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 4530 30 0000 C CNN - 1 4500 4300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50862F73 -P 5550 3850 -F 0 "R1" V 5630 3850 50 0000 C CNN -F 1 "1000" V 5550 3850 50 0000 C CNN - 1 5550 3850 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 50862F55 -P 2950 3800 -F 0 "v1" H 2750 3900 60 0000 C CNN -F 1 "PULSE" H 2750 3750 60 0000 C CNN -F 2 "R1" H 2650 3800 60 0000 C CNN - 1 2950 3800 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 50862CF3 -P 2950 4800 -F 0 "#PWR03" H 2950 4800 30 0001 C CNN -F 1 "GND" H 2950 4730 30 0001 C CNN - 1 2950 4800 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 50862BA3 -P 3700 4000 -F 0 "v2" H 3500 4100 60 0000 C CNN -F 1 "5" H 3500 3950 60 0000 C CNN -F 2 "R1" H 3400 4000 60 0000 C CNN - 1 3700 4000 - 1 0 0 -1 -$EndComp -$Comp -L 7400 U1 -U 3 1 50862B5B -P 4750 3450 -F 0 "U1" H 4750 3500 60 0000 C CNN -F 1 "7400" H 4750 3350 60 0000 C CNN - 3 4750 3450 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir b/OSCAD/Examples/simpleTTL/simpleTTL.cir deleted file mode 100644 index b4463d3..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 02 April 2013 03:00:52 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -XU2 1 5 VPLOT8_1 -R1 5 0 1000 -v1 1 0 PULSE -v2 4 0 5 -XU1 0 5 1 4 3 7400 - -.end diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt b/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt deleted file mode 100644 index 7bbb5a4..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 20 december 2012 12:05:00 am ist - -* Plotting option vplot8_1 -r1 5 0 1000 -v1 1 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) -v2 4 0 5 -* 7400 -a1 [1] [1_in] u1adc -a2 [4] [4_in] u1adc -a3 [1_in 4_in] 5_out u1 -a4 [5_out] [5] u1dac -.model u1 d_nand -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 -.plot v(1) v(5) -.end diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir.out b/OSCAD/Examples/simpleTTL/simpleTTL.cir.out deleted file mode 100644 index 666b204..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 20 december 2012 12:05:00 am ist - -* Plotting option vplot8_1 -r1 5 0 1000 -v1 1 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) -v2 4 0 5 -* 7400 -a1 [1] [1_in] u1adc -a2 [4] [4_in] u1adc -a3 [1_in 4_in] 5_out u1 -a4 [5_out] [5] u1dac -.model u1 d_nand -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 - -* Control Statements -.control -run -plot v(1) v(5) -.endc -.end diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.pro b/OSCAD/Examples/simpleTTL/simpleTTL.pro deleted file mode 100644 index b16deac..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.pro +++ /dev/null @@ -1,73 +0,0 @@ -update=Tuesday 18 December 2012 10:13:38 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=digitalXSpice -LibName39=analogXSpice diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.proj b/OSCAD/Examples/simpleTTL/simpleTTL.proj deleted file mode 100644 index 72370e2..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile simpleTTL.sch diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.sch b/OSCAD/Examples/simpleTTL/simpleTTL.sch deleted file mode 100644 index cb6e4f2..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.sch +++ /dev/null @@ -1,157 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 02 April 2013 03:01:00 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:simpleTTL-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "2 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5550 3450 -Wire Wire Line - 5550 3300 5550 3600 -Wire Wire Line - 2950 4600 5550 4600 -Connection ~ 4500 4600 -Wire Wire Line - 4500 4300 4500 4600 -Wire Wire Line - 3700 4600 3700 4450 -Connection ~ 2950 4600 -Wire Wire Line - 2950 3350 4150 3350 -Wire Wire Line - 2950 4250 2950 4800 -Wire Wire Line - 3700 3550 4150 3550 -Connection ~ 3700 4600 -Wire Wire Line - 4550 2900 4550 3250 -Wire Wire Line - 3450 3350 3450 3250 -Connection ~ 3450 3350 -Wire Wire Line - 5550 3450 5350 3450 -Wire Wire Line - 5550 4600 5550 4100 -$Comp -L VPLOT8_1 U2 -U 2 1 50CEBA04 -P 5550 3000 -F 0 "U2" H 5400 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5700 3100 50 0000 C CNN - 2 5550 3000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 50CEBA01 -P 3450 2950 -F 0 "U2" H 3300 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 3600 3050 50 0000 C CNN - 1 3450 2950 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50862FAD -P 4550 2900 -F 0 "#FLG01" H 4550 3170 30 0001 C CNN -F 1 "PWR_FLAG" H 4550 3130 30 0000 C CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50862FA6 -P 4500 4300 -F 0 "#FLG02" H 4500 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 4530 30 0000 C CNN - 1 4500 4300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50862F73 -P 5550 3850 -F 0 "R1" V 5630 3850 50 0000 C CNN -F 1 "1000" V 5550 3850 50 0000 C CNN - 1 5550 3850 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 50862F55 -P 2950 3800 -F 0 "v1" H 2750 3900 60 0000 C CNN -F 1 "PULSE" H 2750 3750 60 0000 C CNN -F 2 "R1" H 2650 3800 60 0000 C CNN - 1 2950 3800 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 50862CF3 -P 2950 4800 -F 0 "#PWR03" H 2950 4800 30 0001 C CNN -F 1 "GND" H 2950 4730 30 0001 C CNN - 1 2950 4800 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 50862BA3 -P 3700 4000 -F 0 "v2" H 3500 4100 60 0000 C CNN -F 1 "5" H 3500 3950 60 0000 C CNN -F 2 "R1" H 3400 4000 60 0000 C CNN - 1 3700 4000 - 1 0 0 -1 -$EndComp -$Comp -L 7400 U1 -U 3 1 50862B5B -P 4750 3450 -F 0 "U1" H 4750 3500 60 0000 C CNN -F 1 "7400" H 4750 3350 60 0000 C CNN - 3 4750 3450 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/slewRateExample/analysis b/OSCAD/Examples/slewRateExample/analysis deleted file mode 100644 index f635959..0000000 --- a/OSCAD/Examples/slewRateExample/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 1e-09 1e-06 0e-00 diff --git a/OSCAD/Examples/slewRateExample/slewRateExample-cache.bak b/OSCAD/Examples/slewRateExample/slewRateExample-cache.bak deleted file mode 100644 index 96fc3bb..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample-cache.bak +++ /dev/null @@ -1,101 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 03:22:05 PM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/slewRateExample/slewRateExample-cache.lib b/OSCAD/Examples/slewRateExample/slewRateExample-cache.lib deleted file mode 100644 index eb08e6b..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample-cache.lib +++ /dev/null @@ -1,101 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 03:24:18 PM IST -#encoding utf-8 -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# uA741 -# -DEF uA741 X 0 20 Y Y 1 F N -F0 "X" 150 150 60 H V C CNN -F1 "uA741" 150 250 60 H V C CNN -$FPLIST - DIP-8__300 -$ENDFPLIST -DRAW -P 4 0 1 0 -200 200 200 0 -200 -200 -200 200 N -X - 2 -500 -100 300 R 40 40 1 1 I -X + 3 -500 100 300 R 40 40 1 1 I -X ~ 6 500 0 300 L 40 40 1 1 O -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.bak b/OSCAD/Examples/slewRateExample/slewRateExample.bak deleted file mode 100644 index 1f8a1ee..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.bak +++ /dev/null @@ -1,193 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 03:22:05 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:slewRateExample-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PULSE v1 -U 1 1 50CEEB0C -P 4300 4100 -F 0 "v1" H 4100 4200 60 0000 C CNN -F 1 "PULSE" H 4100 4050 60 0000 C CNN -F 2 "R1" H 4000 4100 60 0000 C CNN - 1 4300 4100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6850 3100 6850 3650 -Connection ~ 6850 3400 -Connection ~ 4300 4650 -Wire Wire Line - 4300 4650 4600 4650 -Wire Wire Line - 4600 4650 4600 4400 -Wire Wire Line - 6850 3400 6300 3400 -Wire Wire Line - 4300 4550 4300 4700 -Wire Wire Line - 4900 3500 5300 3500 -Wire Wire Line - 4300 3650 4300 3500 -Wire Wire Line - 4300 3500 4400 3500 -Wire Wire Line - 5300 3300 4300 3300 -Wire Wire Line - 4300 3300 4300 3400 -Wire Wire Line - 5150 3500 5150 4050 -Wire Wire Line - 5150 4050 5550 4050 -Connection ~ 5150 3500 -Wire Wire Line - 6850 4150 6850 4400 -Wire Wire Line - 6050 4050 6550 4050 -Wire Wire Line - 6550 4050 6550 3400 -Connection ~ 6550 3400 -Wire Wire Line - 3400 3100 3400 3550 -Wire Wire Line - 3400 3550 4300 3550 -Connection ~ 4300 3550 -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB089 -P 6850 2800 -F 0 "U1" H 6700 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN - 2 6850 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB075 -P 3400 2800 -F 0 "U1" H 3250 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 3550 2900 50 0000 C CNN - 1 3400 2800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 508245D2 -P 4600 4400 -F 0 "#FLG01" H 4600 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN - 1 4600 4400 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X1 -U 1 1 50824595 -P 5800 3400 -F 0 "X1" H 5950 3550 60 0000 C CNN -F 1 "UA741" H 5950 3650 60 0000 C CNN - 1 5800 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 508240CB -P 4300 3400 -F 0 "#PWR02" H 4300 3400 30 0001 C CNN -F 1 "GND" H 4300 3330 30 0001 C CNN - 1 4300 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 508240B7 -P 4300 4700 -F 0 "#PWR03" H 4300 4700 30 0001 C CNN -F 1 "GND" H 4300 4630 30 0001 C CNN - 1 4300 4700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 508240AD -P 6850 4400 -F 0 "#PWR04" H 6850 4400 30 0001 C CNN -F 1 "GND" H 6850 4330 30 0001 C CNN - 1 6850 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50824073 -P 6850 3900 -F 0 "R3" V 6930 3900 50 0000 C CNN -F 1 "10000" V 6850 3900 50 0000 C CNN - 1 6850 3900 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50824062 -P 4650 3500 -F 0 "R1" V 4730 3500 50 0000 C CNN -F 1 "1000" V 4650 3500 50 0000 C CNN - 1 4650 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 50824045 -P 5800 4050 -F 0 "R2" V 5880 4050 50 0000 C CNN -F 1 "2000" V 5800 4050 50 0000 C CNN - 1 5800 4050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.cir b/OSCAD/Examples/slewRateExample/slewRateExample.cir deleted file mode 100644 index 67bfed1..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.cir +++ /dev/null @@ -1,14 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 03:24:15 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 2 0 PULSE -U1 2 3 VPLOT8_1 -X1 4 0 3 UA741 -R3 3 0 10000 -R1 4 2 1000 -R2 3 4 2000 - -.end diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.cir.ckt b/OSCAD/Examples/slewRateExample/slewRateExample.cir.ckt deleted file mode 100644 index 99770a5..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 03:24:15 pm ist -.include ua741.sub - -v1 2 0 pulse(0 5 0 0 0 0.5e-4 1e-4) -* Plotting option vplot8_1 -x1 4 0 3 ua741 -r3 3 0 10000 -r1 4 2 1000 -r2 3 4 2000 - -.tran 1e-09 1e-06 0e-00 -.plot v(2) v(3) -.end diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.cir.out b/OSCAD/Examples/slewRateExample/slewRateExample.cir.out deleted file mode 100644 index c771986..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 03:24:15 pm ist -.include ua741.sub - -v1 2 0 pulse(0 5 0 0 0 0.5e-4 1e-4) -* Plotting option vplot8_1 -x1 4 0 3 ua741 -r3 3 0 10000 -r1 4 2 1000 -r2 3 4 2000 - -.tran 1e-09 1e-06 0e-00 - -* Control Statements -.control -run -plot v(2) v(3) -.endc -.end diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.cmp b/OSCAD/Examples/slewRateExample/slewRateExample.cmp deleted file mode 100644 index c3e04af..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.cmp +++ /dev/null @@ -1,38 +0,0 @@ -Cmp-Mod V01 Created by CvPCB (2011-05-25)-stable date = Saturday 20 October 2012 11:59:17 AM IST - -BeginCmp -TimeStamp = /50824062; -Reference = R1; -ValeurCmp = 1000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824045; -Reference = R2; -ValeurCmp = 2000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824073; -Reference = R3; -ValeurCmp = 10000; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /50824091; -Reference = v1; -ValeurCmp = SINE; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /50823E96; -Reference = X1; -ValeurCmp = LM741; -IdModule = DIP-8__300; -EndCmp - -EndListe diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.net b/OSCAD/Examples/slewRateExample/slewRateExample.net deleted file mode 100644 index 938591e..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.net +++ /dev/null @@ -1,70 +0,0 @@ -# EESchema Netlist Version 1.1 created Saturday 20 October 2012 12:03:26 PM IST -( - ( /50824595 $noname X1 UA741 {Lib=UA741} - ( 2 N-000004 ) - ( 3 GND ) - ( 6 N-000001 ) - ) - ( /50824091 R1 v1 SINE {Lib=SINE} - ( 1 N-000002 ) - ( 2 GND ) - ) - ( /50824073 $noname R3 10000 {Lib=R} - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /50824062 $noname R1 1000 {Lib=R} - ( 1 N-000004 ) - ( 2 N-000002 ) - ) - ( /50824045 $noname R2 2000 {Lib=R} - ( 1 N-000001 ) - ( 2 N-000004 ) - ) -) -* -{ Allowed footprints by component: -$component X1 - DIP-8__300 -$endlist -$component v1 - 1_pin -$endlist -$component R3 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* -$endlist -$component R2 - R? - SM0603 - SM0805 - R?-* -$endlist -$endfootprintlist -} -{ Pin List by Nets -Net 1 "" "" - R2 1 - X1 6 - R3 1 -Net 2 "" "" - R1 2 - v1 1 -Net 3 "GND" "GND" - X1 3 - v1 2 - R3 2 -Net 4 "" "" - X1 2 - R1 1 - R2 2 -} -#End diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.pro b/OSCAD/Examples/slewRateExample/slewRateExample.pro deleted file mode 100644 index 4d957be..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Saturday 20 October 2012 07:46:26 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.proj b/OSCAD/Examples/slewRateExample/slewRateExample.proj deleted file mode 100644 index c78c533..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile InvertingAmplifier.sch diff --git a/OSCAD/Examples/slewRateExample/slewRateExample.sch b/OSCAD/Examples/slewRateExample/slewRateExample.sch deleted file mode 100644 index 4508864..0000000 --- a/OSCAD/Examples/slewRateExample/slewRateExample.sch +++ /dev/null @@ -1,193 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 03:24:18 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:slewRateExample-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "17 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PULSE v1 -U 1 1 50CEEB0C -P 4300 4100 -F 0 "v1" H 4100 4200 60 0000 C CNN -F 1 "PULSE" H 4100 4050 60 0000 C CNN -F 2 "R1" H 4000 4100 60 0000 C CNN - 1 4300 4100 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6850 3100 6850 3650 -Connection ~ 6850 3400 -Connection ~ 4300 4650 -Wire Wire Line - 4300 4650 4600 4650 -Wire Wire Line - 4600 4650 4600 4400 -Wire Wire Line - 6850 3400 6300 3400 -Wire Wire Line - 4300 4550 4300 4700 -Wire Wire Line - 4900 3500 5300 3500 -Wire Wire Line - 4300 3650 4300 3500 -Wire Wire Line - 4300 3500 4400 3500 -Wire Wire Line - 5300 3300 4300 3300 -Wire Wire Line - 4300 3300 4300 3400 -Wire Wire Line - 5150 3500 5150 4050 -Wire Wire Line - 5150 4050 5550 4050 -Connection ~ 5150 3500 -Wire Wire Line - 6850 4150 6850 4400 -Wire Wire Line - 6050 4050 6550 4050 -Wire Wire Line - 6550 4050 6550 3400 -Connection ~ 6550 3400 -Wire Wire Line - 3400 3100 3400 3550 -Wire Wire Line - 3400 3550 4300 3550 -Connection ~ 4300 3550 -$Comp -L VPLOT8_1 U1 -U 2 1 50CEB089 -P 6850 2800 -F 0 "U1" H 6700 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 7000 2900 50 0000 C CNN - 2 6850 2800 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 50CEB075 -P 3400 2800 -F 0 "U1" H 3250 2900 50 0000 C CNN -F 1 "VPLOT8_1" H 3550 2900 50 0000 C CNN - 1 3400 2800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 508245D2 -P 4600 4400 -F 0 "#FLG01" H 4600 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4600 4630 30 0000 C CNN - 1 4600 4400 - 1 0 0 -1 -$EndComp -$Comp -L UA741 X1 -U 1 1 50824595 -P 5800 3400 -F 0 "X1" H 5950 3550 60 0000 C CNN -F 1 "UA741" H 5950 3650 60 0000 C CNN - 1 5800 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 508240CB -P 4300 3400 -F 0 "#PWR02" H 4300 3400 30 0001 C CNN -F 1 "GND" H 4300 3330 30 0001 C CNN - 1 4300 3400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 508240B7 -P 4300 4700 -F 0 "#PWR03" H 4300 4700 30 0001 C CNN -F 1 "GND" H 4300 4630 30 0001 C CNN - 1 4300 4700 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 508240AD -P 6850 4400 -F 0 "#PWR04" H 6850 4400 30 0001 C CNN -F 1 "GND" H 6850 4330 30 0001 C CNN - 1 6850 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R3 -U 1 1 50824073 -P 6850 3900 -F 0 "R3" V 6930 3900 50 0000 C CNN -F 1 "10000" V 6850 3900 50 0000 C CNN - 1 6850 3900 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50824062 -P 4650 3500 -F 0 "R1" V 4730 3500 50 0000 C CNN -F 1 "1000" V 4650 3500 50 0000 C CNN - 1 4650 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 50824045 -P 5800 4050 -F 0 "R2" V 5880 4050 50 0000 C CNN -F 1 "2000" V 5800 4050 50 0000 C CNN - 1 5800 4050 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/slewRateExample/ua741-cache.bak b/OSCAD/Examples/slewRateExample/ua741-cache.bak deleted file mode 100644 index 1ac0925..0000000 --- a/OSCAD/Examples/slewRateExample/ua741-cache.bak +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 19 November 2012 12:14:01 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 I -X ~ 2 250 0 100 L 30 30 2 1 I -X ~ 3 250 0 100 L 30 30 3 1 I -X ~ 4 250 0 100 L 30 30 4 1 I -X ~ 5 250 0 100 L 30 30 5 1 I -X ~ 6 250 0 100 L 30 30 6 1 I -X ~ 7 250 0 100 L 30 30 7 1 I -X ~ 8 250 0 100 L 30 30 8 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/slewRateExample/ua741-cache.lib b/OSCAD/Examples/slewRateExample/ua741-cache.lib deleted file mode 100644 index e2ece32..0000000 --- a/OSCAD/Examples/slewRateExample/ua741-cache.lib +++ /dev/null @@ -1,100 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 17 December 2012 11:17:01 AM IST -#encoding utf-8 -# -# C -# -DEF C C 0 10 N Y 1 F N -F0 "C" 50 100 50 H V L CNN -F1 "C" 50 -100 50 H V L CNN -$FPLIST - SM* - C? - C1-1 -$ENDFPLIST -DRAW -P 2 0 1 10 -100 -30 100 -30 N -P 2 0 1 10 -100 30 100 30 N -X ~ 1 0 200 170 D 40 40 1 1 P -X ~ 2 0 -200 170 U 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 0 -50 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# VCVS -# -DEF VCVS E 0 40 Y Y 1 F N -F0 "E" -200 100 50 H V C CNN -F1 "VCVS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/slewRateExample/ua741.bak b/OSCAD/Examples/slewRateExample/ua741.bak deleted file mode 100644 index 5237bd8..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.bak +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 19 November 2012 12:14:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG1 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG1" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR1" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/slewRateExample/ua741.cir b/OSCAD/Examples/slewRateExample/ua741.cir deleted file mode 100644 index de79742..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/OSCAD/Examples/slewRateExample/ua741.cir.ckt b/OSCAD/Examples/slewRateExample/ua741.cir.ckt deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/slewRateExample/ua741.cir.out b/OSCAD/Examples/slewRateExample/ua741.cir.out deleted file mode 100644 index 3661a9a..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.cir.out +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 diff --git a/OSCAD/Examples/slewRateExample/ua741.pro b/OSCAD/Examples/slewRateExample/ua741.pro deleted file mode 100644 index a87f185..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.pro +++ /dev/null @@ -1,71 +0,0 @@ -update=Sunday 18 November 2012 03:20:54 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice diff --git a/OSCAD/Examples/slewRateExample/ua741.sch b/OSCAD/Examples/slewRateExample/ua741.sch deleted file mode 100644 index 6be9280..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.sch +++ /dev/null @@ -1,208 +0,0 @@ -EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "20 oct 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U1 -U 3 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 3 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 1 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 1 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 2 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/slewRateExample/ua741.sub b/OSCAD/Examples/slewRateExample/ua741.sub deleted file mode 100644 index 1edba9f..0000000 --- a/OSCAD/Examples/slewRateExample/ua741.sub +++ /dev/null @@ -1,11 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 - -.ends ua741
\ No newline at end of file |