1 files changed, 0 insertions, 374 deletions
diff --git a/OSCAD/Examples/bridgeRectifier/$savepcb.brd b/OSCAD/Examples/bridgeRectifier/$savepcb.brd
deleted file mode 100644
index 309f60a..0000000
--- a/OSCAD/Examples/bridgeRectifier/$savepcb.brd
+++ /dev/null
@@ -1,374 +0,0 @@
-PCBNEW-BOARD Version 1 date Wednesday 21 November 2012 12:10:28 AM IST
-
-# Created by Pcbnew(2011-05-25)-stable
-
-$GENERAL
-encoding utf-8
-LayerCount 2
-Ly 1FFF8001
-EnabledLayers 1FFF8001
-Links 8
-NoConn 0
-Di 39125 25379 48489 31041
-Ndraw 0
-Ntrack 17
-Nzone 0
-BoardThickness 630
-Nmodule 6
-Nnets 5
-$EndGENERAL
-
-$SHEETDESCR
-Sheet A4 11700 8267
-Title ""
-Date "20 nov 2012"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndSHEETDESCR
-
-$SETUP
-InternalUnit 0.000100 INCH
-Layers 2
-Layer[0] Back signal
-Layer[15] Front signal
-TrackWidth 80
-TrackClearence 100
-ZoneClearence 200
-TrackMinWidth 80
-DrawSegmWidth 150
-EdgeSegmWidth 150
-ViaSize 350
-ViaDrill 250
-ViaMinSize 350
-ViaMinDrill 200
-MicroViaSize 200
-MicroViaDrill 50
-MicroViasAllowed 0
-MicroViaMinSize 200
-MicroViaMinDrill 50
-TextPcbWidth 120
-TextPcbSize 600 800
-EdgeModWidth 150
-TextModSize 600 600
-TextModWidth 120
-PadSize 600 600
-PadDrill 320
-Pad2MaskClearance 100
-AuxiliaryAxisOrg 38500 31500
-PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory ""))
-$EndSETUP
-
-$EQUIPOT
-Na 0 ""
-St ~
-$EndEQUIPOT
-$EQUIPOT
-Na 1 "GND"
-St ~
-$EndEQUIPOT
-$EQUIPOT
-Na 2 "N-000002"
-St ~
-$EndEQUIPOT
-$EQUIPOT
-Na 3 "N-000003"
-St ~
-$EndEQUIPOT
-$EQUIPOT
-Na 4 "N-000004"
-St ~
-$EndEQUIPOT
-$NCLASS
-Name "Default"
-Desc "This is the default net class."
-Clearance 100
-TrackWidth 80
-ViaDia 350
-ViaDrill 250
-uViaDia 200
-uViaDrill 50
-AddNet ""
-AddNet "GND"
-AddNet "N-000002"
-AddNet "N-000003"
-AddNet "N-000004"
-$EndNCLASS
-$MODULE R3
-Po 46500 30000 1800 15 00200000 506D2FD9 ~~
-Li R3
-Cd Resitance 3 pas
-Kw R
-Sc 506D2FD9
-AR /506BDD54
-Op 0 A 0
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-T1 0 0 550 500 1800 80 N I 21 N "1"
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-DS 1300 0 1300 -400 120 21
-DS 1300 -400 -1300 -400 120 21
-DS -1300 -400 -1300 400 120 21
-DS -1300 400 1300 400 120 21
-DS 1300 400 1300 0 120 21
-DS -1300 -200 -1100 -400 120 21
-$PAD
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-Dr 320 0 0
-At STD N 00E0FFFF
-Ne 4 "N-000004"
-Po -1500 0
-$EndPAD
-$PAD
-Sh "2" C 550 550 0 0 1800
-Dr 320 0 0
-At STD N 00E0FFFF
-Ne 1 "GND"
-Po 1500 0
-$EndPAD
-$SHAPE3D
-Na "discret/resistor.wrl"
-Sc 0.300000 0.300000 0.300000
-Of 0.000000 0.000000 0.000000
-Ro 0.000000 0.000000 0.000000
-$EndSHAPE3D
-$EndMODULE  R3
-$MODULE R1
-Po 41500 30000 1800 15 00200000 506D2FDA ~~
-Li R1
-Cd Resistance verticale
-Kw R
-Sc 506D2FDA
-AR /506BDD71
-Op A A 0
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-T1 -450 1000 550 500 1800 80 N I 21 N "SINE"
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-DC -500 0 -250 500 150 21
-$PAD
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-Po -500 0
-$EndPAD
-$PAD
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-At STD N 00E0FFFF
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-Na "discret/verti_resistor.wrl"
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-$EndSHAPE3D
-$EndMODULE  R1
-$MODULE D3
-Po 46500 28000 0 15 00200000 506D2FDB ~~
-Li D3
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-DS 900 400 900 -400 120 21
-$PAD
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-At STD N 00E0FFFF
-Ne 4 "N-000004"
-Po 1500 0
-$EndPAD
-$PAD
-Sh "1" C 550 550 0 0 0
-Dr 320 0 0
-At STD N 00E0FFFF
-Ne 3 "N-000003"
-Po -1500 0
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-$PAD
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-$PAD
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-$PAD
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-Ne 3 "N-000003"
-Po 1500 0
-$EndPAD
-$PAD
-Sh "1" C 550 550 0 0 0
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-Po -1500 0
-$EndPAD
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-Na "discret/diode.wrl"
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-$EndSHAPE3D
-$EndMODULE  D3
-$MODULE D3
-Po 41000 26000 0 15 00200000 506D31A5 F~
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-Sc 506D31A5
-AR /506BDD2F
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-$PAD
-Sh "2" R 550 550 0 0 0
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-Ne 2 "N-000002"
-Po 1500 0
-$EndPAD
-$PAD
-Sh "1" C 550 550 0 0 0
-Dr 320 0 0
-At STD N 00E0FFFF
-Ne 1 "GND"
-Po -1500 0
-$EndPAD
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-Na "discret/diode.wrl"
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-$EndTRACK
-$ZONE
-$EndZONE
-$EndBOARD