diff options
Diffstat (limited to 'OSCAD/Examples/sedra_smith/chapter_3')
140 files changed, 0 insertions, 9926 deletions
diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/analysis deleted file mode 100644 index 73c8f09..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 4e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.bak deleted file mode 100644 index 1d8b498..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 04:09:27 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.lib deleted file mode 100644 index f2704f3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4-cache.lib +++ /dev/null @@ -1,131 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 11:42:22 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.bak b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.bak deleted file mode 100644 index ca5b9de..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.bak +++ /dev/null @@ -1,167 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 04:02:35 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example3.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5900 2550 5900 1050 -Wire Wire Line - 4400 4300 4400 3050 -Wire Wire Line - 5000 3800 5000 3250 -Wire Wire Line - 5000 2050 5000 1550 -Connection ~ 5000 5450 -Wire Wire Line - 4400 5450 5900 5450 -Wire Wire Line - 5900 1050 5000 1050 -Wire Wire Line - 4400 3050 4700 3050 -Wire Wire Line - 4400 5450 4400 5200 -Wire Wire Line - 5000 4950 5000 5750 -Connection ~ 5000 5600 -Connection ~ 5000 3450 -Wire Wire Line - 5000 2550 5000 2850 -Wire Wire Line - 5000 4300 5000 4450 -Wire Wire Line - 5900 5450 5900 3450 -$Comp -L IPLOT U2 -U 1 1 516BD643 -P 5000 4050 -F 0 "U2" H 4850 4150 50 0000 C CNN -F 1 "IPLOT" H 5150 4150 50 0000 C CNN - 1 5000 4050 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516BD5F9 -P 5000 2300 -F 0 "U1" H 4850 2400 50 0000 C CNN -F 1 "IPLOT" H 5150 2400 50 0000 C CNN - 1 5000 2300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5166BF83 -P 5000 5600 -F 0 "#FLG01" H 5000 5695 30 0001 C CNN -F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN - 1 5000 5600 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166BF64 -P 5000 5750 -F 0 "#PWR02" H 5000 5750 30 0001 C CNN -F 1 "GND" H 5000 5680 30 0001 C CNN - 1 5000 5750 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166BEE6 -P 4400 4750 -F 0 "v1" H 4200 4850 60 0000 C CNN -F 1 "4" H 4200 4700 60 0000 C CNN -F 2 "R1" H 4100 4750 60 0000 C CNN - 1 4400 4750 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5166BED7 -P 5900 3000 -F 0 "v2" H 5700 3100 60 0000 C CNN -F 1 "10V" H 5700 2950 60 0000 C CNN -F 2 "R1" H 5600 3000 60 0000 C CNN - 1 5900 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166BE96 -P 5000 4700 -F 0 "R2" V 5080 4700 50 0000 C CNN -F 1 "3300" V 5000 4700 50 0000 C CNN - 1 5000 4700 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166BE8E -P 5000 1300 -F 0 "R1" V 5080 1300 50 0000 C CNN -F 1 "4700" V 5000 1300 50 0000 C CNN - 1 5000 1300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166BE53 -P 4900 3050 -F 0 "Q1" H 4900 2900 50 0000 R CNN -F 1 "NPN" H 4900 3200 50 0000 R CNN - 1 4900 3050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir deleted file mode 100644 index 87e5f07..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 04:09:24 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 6 7 VPLOT8_1 -U2 7 3 IPLOT -U1 5 6 IPLOT -v1 2 0 4 -v2 4 0 10V -R2 3 0 3300 -R1 4 5 4700 -Q1 7 2 6 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.ckt deleted file mode 100644 index 21ea9e6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.ckt +++ /dev/null @@ -1,16 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 04:09:24 pm ist - -* Plotting option vplot8_1 -V_u2 7 3 0 -V_u1 5 6 0 -v1 2 0 4 -v2 4 0 10v -r2 3 0 3300 -r1 4 5 4700 -q1 6 2 7 npn - -.dc v1 0e-00 4e-00 5e-03 -.plot v(6) v(7) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.out deleted file mode 100644 index b00fc82..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.cir.out +++ /dev/null @@ -1,21 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 04:09:24 pm ist - -* Plotting option vplot8_1 -V_u2 7 3 0 -V_u1 5 6 0 -v1 2 0 4 -v2 4 0 10v -r2 3 0 3300 -r1 4 5 4700 -q1 6 2 7 npn - -.dc v1 0e-00 4e-00 5e-03 - -* Control Statements -.control -run -plot v(6) v(7) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.pro b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.pro deleted file mode 100644 index a38bf27..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 15 April 2013 04:08:24 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.proj b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.proj deleted file mode 100644 index 9978f31..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example3.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.sch b/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.sch deleted file mode 100644 index 4138df7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example3.4/example3.4.sch +++ /dev/null @@ -1,186 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 04:09:27 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example3.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5000 2650 -$Comp -L VPLOT8_1 U3 -U 1 1 516BD8B9 -P 5300 2650 -F 0 "U3" H 5150 2750 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 2750 50 0000 C CNN - 1 5300 2650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516BD8AC -P 5300 3450 -F 0 "U3" H 5150 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 3550 50 0000 C CNN - 2 5300 3450 - 0 1 1 0 -$EndComp -Wire Wire Line - 5900 2550 5900 1050 -Wire Wire Line - 4400 4300 4400 3050 -Wire Wire Line - 5000 3800 5000 3250 -Wire Wire Line - 5000 2050 5000 1550 -Connection ~ 5000 5450 -Wire Wire Line - 4400 5450 5900 5450 -Wire Wire Line - 5900 1050 5000 1050 -Wire Wire Line - 4400 3050 4700 3050 -Wire Wire Line - 4400 5450 4400 5200 -Wire Wire Line - 5000 4950 5000 5750 -Connection ~ 5000 5600 -Connection ~ 5000 3450 -Wire Wire Line - 5000 2550 5000 2850 -Wire Wire Line - 5000 4300 5000 4450 -Wire Wire Line - 5900 5450 5900 3450 -$Comp -L IPLOT U2 -U 1 1 516BD643 -P 5000 4050 -F 0 "U2" H 4850 4150 50 0000 C CNN -F 1 "IPLOT" H 5150 4150 50 0000 C CNN - 1 5000 4050 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516BD5F9 -P 5000 2300 -F 0 "U1" H 4850 2400 50 0000 C CNN -F 1 "IPLOT" H 5150 2400 50 0000 C CNN - 1 5000 2300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5166BF83 -P 5000 5600 -F 0 "#FLG01" H 5000 5695 30 0001 C CNN -F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN - 1 5000 5600 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166BF64 -P 5000 5750 -F 0 "#PWR02" H 5000 5750 30 0001 C CNN -F 1 "GND" H 5000 5680 30 0001 C CNN - 1 5000 5750 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166BEE6 -P 4400 4750 -F 0 "v1" H 4200 4850 60 0000 C CNN -F 1 "4" H 4200 4700 60 0000 C CNN -F 2 "R1" H 4100 4750 60 0000 C CNN - 1 4400 4750 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5166BED7 -P 5900 3000 -F 0 "v2" H 5700 3100 60 0000 C CNN -F 1 "10V" H 5700 2950 60 0000 C CNN -F 2 "R1" H 5600 3000 60 0000 C CNN - 1 5900 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166BE96 -P 5000 4700 -F 0 "R2" V 5080 4700 50 0000 C CNN -F 1 "3300" V 5000 4700 50 0000 C CNN - 1 5000 4700 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166BE8E -P 5000 1300 -F 0 "R1" V 5080 1300 50 0000 C CNN -F 1 "4700" V 5000 1300 50 0000 C CNN - 1 5000 1300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166BE53 -P 4900 3050 -F 0 "Q1" H 4900 2900 50 0000 R CNN -F 1 "NPN" H 4900 3200 50 0000 R CNN - 1 4900 3050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/analysis deleted file mode 100644 index 395e205..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v2 0e-00 15e-00 15e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.bak deleted file mode 100644 index 3c23bc8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.bak +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 06:57:20 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.lib deleted file mode 100644 index b1e32d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Wednesday 15 May 2013 06:59:23 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.bak deleted file mode 100644 index 9b63b41..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.bak +++ /dev/null @@ -1,154 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 06:57:20 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5750 5350 5750 5950 -Connection ~ 4300 4400 -Connection ~ 5750 4100 -Wire Wire Line - 4300 4500 4300 4400 -Wire Wire Line - 4300 4400 5450 4400 -Connection ~ 4750 4400 -Wire Wire Line - 4750 4600 4750 4050 -Wire Wire Line - 4750 3150 4750 2750 -Wire Wire Line - 4750 2750 5750 2750 -Wire Wire Line - 5750 4600 5750 4850 -Wire Wire Line - 4750 5500 4750 5950 -Wire Wire Line - 4750 5950 5750 5950 -Wire Wire Line - 5750 4200 5750 3250 -$Comp -L DC v1 -U 1 1 517A27AF -P 4750 3600 -F 0 "v1" H 4550 3700 60 0000 C CNN -F 1 "DC" H 4550 3550 60 0000 C CNN -F 2 "R1" H 4450 3600 60 0000 C CNN - 1 4750 3600 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 517A278C -P 4750 5050 -F 0 "v2" H 4550 5150 60 0000 C CNN -F 1 "DC" H 4550 5000 60 0000 C CNN -F 2 "R1" H 4450 5050 60 0000 C CNN - 1 4750 5050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5178C864 -P 6050 4100 -F 0 "U1" H 5900 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 6200 4200 50 0000 C CNN - 1 6050 4100 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 5178C812 -P 5650 4400 -F 0 "Q1" H 5650 4250 50 0000 R CNN -F 1 "NPN" H 5650 4550 50 0000 R CNN - 1 5650 4400 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516BDAF0 -P 4300 4400 -F 0 "#FLG01" H 4300 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4300 4630 30 0000 C CNN - 1 4300 4400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516BDAE0 -P 4300 4500 -F 0 "#PWR02" H 4300 4500 30 0001 C CNN -F 1 "GND" H 4300 4430 30 0001 C CNN - 1 4300 4500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516BD9B5 -P 5750 3000 -F 0 "R1" V 5830 3000 50 0000 C CNN -F 1 "5k" V 5750 3000 50 0000 C CNN - 1 5750 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516BD9A9 -P 5750 5100 -F 0 "R2" V 5850 5100 50 0000 C CNN -F 1 "7.07k" V 5750 5100 50 0000 C CNN - 1 5750 5100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir deleted file mode 100644 index bdacb65..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Wednesday 15 May 2013 06:59:18 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 4 3 IPLOT -v1 1 0 DC -v2 0 5 DC -U1 3 VPLOT8_1 -Q1 2 0 3 NPN -R1 1 4 5k -R2 2 5 7.07k - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt deleted file mode 100644 index 055c4d2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 06:59:18 pm ist -.include npn.lib - -V_u2 4 3 0 -v1 1 0 dc 15 -v2 0 5 dc 15 -* Plotting option vplot8_1 -q1 3 0 2 npn -r1 1 4 5k -r2 2 5 7.07k - -.dc v2 0e-00 15e-00 15e-00 -.plot i(V_u2) -.plot v(3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out deleted file mode 100644 index 17c61c2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: wednesday 15 may 2013 06:59:18 pm ist -.include npn.lib - -V_u2 4 3 0 -v1 1 0 dc 15 -v2 0 5 dc 15 -* Plotting option vplot8_1 -q1 3 0 2 npn -r1 1 4 5k -r2 2 5 7.07k - -.dc v2 0e-00 15e-00 15e-00 - -* Control Statements -.control -run -plot i(V_u2) -plot v(3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro deleted file mode 100644 index 5bf994d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 04:46:53 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj deleted file mode 100644 index 3a2ba21..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.1.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch deleted file mode 100644 index 7873ea6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/example_3.1.sch +++ /dev/null @@ -1,165 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 15 May 2013 06:59:23 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5750 4200 5750 3850 -Wire Wire Line - 5750 5350 5750 5950 -Connection ~ 4300 4400 -Connection ~ 5750 4100 -Wire Wire Line - 4300 4500 4300 4400 -Wire Wire Line - 4300 4400 5450 4400 -Connection ~ 4750 4400 -Wire Wire Line - 4750 4600 4750 4050 -Wire Wire Line - 4750 3150 4750 2750 -Wire Wire Line - 4750 2750 5750 2750 -Wire Wire Line - 5750 4600 5750 4850 -Wire Wire Line - 4750 5500 4750 5950 -Wire Wire Line - 4750 5950 5750 5950 -Wire Wire Line - 5750 3250 5750 3350 -$Comp -L IPLOT U2 -U 1 1 51938D87 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "IPLOT" H 5900 3700 50 0000 C CNN - 1 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 517A27AF -P 4750 3600 -F 0 "v1" H 4550 3700 60 0000 C CNN -F 1 "DC" H 4550 3550 60 0000 C CNN -F 2 "R1" H 4450 3600 60 0000 C CNN - 1 4750 3600 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 517A278C -P 4750 5050 -F 0 "v2" H 4550 5150 60 0000 C CNN -F 1 "DC" H 4550 5000 60 0000 C CNN -F 2 "R1" H 4450 5050 60 0000 C CNN - 1 4750 5050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5178C864 -P 6050 4100 -F 0 "U1" H 5900 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 6200 4200 50 0000 C CNN - 1 6050 4100 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 5178C812 -P 5650 4400 -F 0 "Q1" H 5650 4250 50 0000 R CNN -F 1 "NPN" H 5650 4550 50 0000 R CNN - 1 5650 4400 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG1 -U 1 1 516BDAF0 -P 4300 4400 -F 0 "#FLG1" H 4300 4670 30 0001 C CNN -F 1 "PWR_FLAG" H 4300 4630 30 0000 C CNN - 1 4300 4400 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR1 -U 1 1 516BDAE0 -P 4300 4500 -F 0 "#PWR1" H 4300 4500 30 0001 C CNN -F 1 "GND" H 4300 4430 30 0001 C CNN - 1 4300 4500 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516BD9B5 -P 5750 3000 -F 0 "R1" V 5830 3000 50 0000 C CNN -F 1 "5k" V 5750 3000 50 0000 C CNN - 1 5750 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516BD9A9 -P 5750 5100 -F 0 "R2" V 5850 5100 50 0000 C CNN -F 1 "7.07k" V 5750 5100 50 0000 C CNN - 1 5750 5100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/npn.lib deleted file mode 100644 index 1ff6b05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.1/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 -+ Is=6.734f Eg=1.11 ) diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/analysis deleted file mode 100644 index bd0d4e6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 15e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib deleted file mode 100644 index a66f15e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 10:01:35 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir deleted file mode 100644 index 6cc7243..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 10:01:31 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 1 3 7 VPLOT8_1 -R2 1 0 50000 -R1 5 1 100000 -R4 4 0 3000 -U4 7 4 IPLOT -v1 5 0 15V -U3 6 3 IPLOT -R3 5 6 5000 -Q1 7 1 3 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt deleted file mode 100644 index 6b82c7f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:01:31 pm ist - -* Plotting option vplot8_1 -r2 1 0 50000 -r1 5 1 100000 -r4 4 0 3000 -V_u4 7 4 0 -v1 5 0 15v -V_u3 6 3 0 -r3 5 6 5000 -q1 3 1 7 npn - -.dc v1 0e-00 15e-00 5e-03 -.plot v(1) v(3) v(7) -.plot i(V_u4) -.plot i(V_u3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out deleted file mode 100644 index 0e51a81..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:01:31 pm ist - -* Plotting option vplot8_1 -r2 1 0 50000 -r1 5 1 100000 -r4 4 0 3000 -V_u4 7 4 0 -v1 5 0 15v -V_u3 6 3 0 -r3 5 6 5000 -q1 3 1 7 npn - -.dc v1 0e-00 15e-00 5e-03 - -* Control Statements -.control -run -plot v(1) v(3) v(7) -plot i(V_u4) -plot i(V_u3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro deleted file mode 100644 index 78f9f3c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 09:51:55 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj deleted file mode 100644 index 6fef01d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.10.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch deleted file mode 100644 index 54adb65..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.10/example_3.10.sch +++ /dev/null @@ -1,209 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 10:01:35 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5050 3350 4200 3350 -Wire Wire Line - 6850 2850 6850 1300 -Wire Wire Line - 6850 1300 4200 1300 -Wire Wire Line - 4200 1300 4200 2200 -Connection ~ 4200 3350 -Wire Wire Line - 4200 2700 4200 3800 -Wire Wire Line - 6850 3750 6850 5150 -Wire Wire Line - 5350 3550 5350 3750 -Wire Wire Line - 5350 2050 5350 2250 -Wire Wire Line - 5350 1550 5350 1300 -Wire Wire Line - 5350 2750 5350 3150 -Wire Wire Line - 5350 4250 5350 4400 -Wire Wire Line - 4200 4300 4200 5150 -Wire Wire Line - 4200 5150 6850 5150 -Connection ~ 5350 5150 -Connection ~ 5350 1300 -Wire Wire Line - 5350 5650 5350 4900 -Connection ~ 5350 5500 -Connection ~ 5350 3650 -Connection ~ 5350 2900 -Connection ~ 5000 3350 -$Comp -L VPLOT8_1 U2 -U 3 1 516C2B0C -P 5650 3650 -F 0 "U2" H 5500 3750 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3750 50 0000 C CNN - 3 5650 3650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C2B05 -P 5650 2900 -F 0 "U2" H 5500 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3000 50 0000 C CNN - 2 5650 2900 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C2AFE -P 5000 3050 -F 0 "U2" H 4850 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5150 3150 50 0000 C CNN - 1 5000 3050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C2AB7 -P 5350 5500 -F 0 "#FLG01" H 5350 5770 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 5730 30 0000 C CNN - 1 5350 5500 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C2AAB -P 5350 5650 -F 0 "#PWR02" H 5350 5650 30 0001 C CNN -F 1 "GND" H 5350 5580 30 0001 C CNN - 1 5350 5650 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516C2A3E -P 4200 4050 -F 0 "R2" V 4280 4050 50 0000 C CNN -F 1 "50000" V 4200 4050 50 0000 C CNN - 1 4200 4050 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C2A13 -P 4200 2450 -F 0 "R1" V 4280 2450 50 0000 C CNN -F 1 "100000" V 4200 2450 50 0000 C CNN - 1 4200 2450 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 516C29D9 -P 5350 4650 -F 0 "R4" V 5430 4650 50 0000 C CNN -F 1 "3000" V 5350 4650 50 0000 C CNN - 1 5350 4650 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C29CD -P 5350 4000 -F 0 "U4" H 5200 4100 50 0000 C CNN -F 1 "IPLOT" H 5500 4100 50 0000 C CNN - 1 5350 4000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C296E -P 6850 3300 -F 0 "v1" H 6650 3400 60 0000 C CNN -F 1 "15V" H 6650 3250 60 0000 C CNN -F 2 "R1" H 6550 3300 60 0000 C CNN - 1 6850 3300 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C2958 -P 5350 2500 -F 0 "U3" H 5200 2600 50 0000 C CNN -F 1 "IPLOT" H 5500 2600 50 0000 C CNN - 1 5350 2500 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C293A -P 5350 1800 -F 0 "R3" V 5430 1800 50 0000 C CNN -F 1 "5000" V 5350 1800 50 0000 C CNN - 1 5350 1800 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C2934 -P 5250 3350 -F 0 "Q1" H 5250 3200 50 0000 R CNN -F 1 "NPN" H 5250 3500 50 0000 R CNN - 1 5250 3350 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/analysis deleted file mode 100644 index bd0d4e6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 15e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib deleted file mode 100644 index c412639..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11-cache.lib +++ /dev/null @@ -1,127 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 10:18:23 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir deleted file mode 100644 index 72eb140..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir +++ /dev/null @@ -1,23 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 10:18:19 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U4 11 VPLOT8_1 -R1 7 11 100000 -U3 1 4 6 5 VPLOT8_1 -R5 7 3 2000 -U5 3 6 IPLOT -R6 2 0 2700 -U6 5 2 IPLOT -R4 10 0 3000 -U2 4 10 IPLOT -R3 7 9 5000 -U1 9 1 IPLOT -v1 7 0 DC -R2 11 0 50000 -Q2 6 1 5 PNP -Q1 4 11 1 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.ckt deleted file mode 100644 index 5e6583e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.ckt +++ /dev/null @@ -1,26 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:18:19 pm ist - -* Plotting option vplot8_1 -r1 7 11 100000 -* Plotting option vplot8_1 -r5 7 3 2000 -V_u5 3 6 0 -r6 2 0 2700 -V_u6 5 2 0 -r4 10 0 3000 -V_u2 4 10 0 -r3 7 9 5000 -V_u1 9 1 0 -v1 7 0 dc 15 -r2 11 0 50000 -q2 5 1 6 pnp -q1 1 11 4 npn - -.dc v1 0e-00 15e-00 5e-03 -.plot v(11) -.plot v(1) v(4) v(6) v(5) -.plot i(V_u5) -.plot i(V_u6) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.out deleted file mode 100644 index 1a2f17d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.cir.out +++ /dev/null @@ -1,31 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 10:18:19 pm ist - -* Plotting option vplot8_1 -r1 7 11 100000 -* Plotting option vplot8_1 -r5 7 3 2000 -V_u5 3 6 0 -r6 2 0 2700 -V_u6 5 2 0 -r4 10 0 3000 -V_u2 4 10 0 -r3 7 9 5000 -V_u1 9 1 0 -v1 7 0 dc 15 -r2 11 0 50000 -q2 5 1 6 pnp -q1 1 11 4 npn - -.dc v1 0e-00 15e-00 5e-03 - -* Control Statements -.control -run -plot v(11) -plot v(1) v(4) v(6) v(5) -plot i(V_u5) -plot i(V_u6) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.pro deleted file mode 100644 index 9c11e90..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 10:04:33 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.proj deleted file mode 100644 index 1bbfadb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.11.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.sch deleted file mode 100644 index 766b40d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.11/example_3.11.sch +++ /dev/null @@ -1,295 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 10:18:23 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5150 3800 -$Comp -L VPLOT8_1 U4 -U 1 1 516C2F31 -P 5150 4100 -F 0 "U4" H 5000 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5300 4200 50 0000 C CNN - 1 5150 4100 - -1 0 0 1 -$EndComp -Wire Wire Line - 7350 3200 6700 3200 -Connection ~ 4600 1600 -Wire Wire Line - 3350 3150 3350 1600 -Wire Wire Line - 3350 1600 7650 1600 -Wire Wire Line - 4600 5600 4600 4950 -Connection ~ 5750 1600 -Wire Wire Line - 4600 1600 4600 2100 -Wire Wire Line - 5450 3800 4600 3800 -Connection ~ 5750 3400 -Wire Wire Line - 6700 3200 6700 3400 -Wire Wire Line - 6700 3400 5750 3400 -Wire Wire Line - 7650 2100 7650 2250 -Wire Wire Line - 7650 3400 7650 3700 -Wire Wire Line - 5750 4900 5750 5100 -Wire Wire Line - 5750 2750 5750 2600 -Wire Wire Line - 5750 3600 5750 3250 -Wire Wire Line - 5750 4000 5750 4400 -Wire Wire Line - 7650 4200 7650 4350 -Wire Wire Line - 7650 4850 7650 5600 -Connection ~ 7650 5600 -Wire Wire Line - 7650 3000 7650 2750 -Wire Wire Line - 5750 1600 5750 2100 -Wire Wire Line - 4600 4450 4600 2600 -Connection ~ 4600 3800 -Wire Wire Line - 6450 5600 6450 5900 -Connection ~ 6450 5600 -Wire Wire Line - 3350 4050 3350 5600 -Wire Wire Line - 3350 5600 7650 5600 -Connection ~ 4600 5600 -Connection ~ 6450 5750 -Connection ~ 5750 3500 -Connection ~ 5750 4250 -Connection ~ 7650 2900 -Connection ~ 7650 3550 -Connection ~ 5750 5600 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C2ECC -P 6450 5750 -F 0 "#FLG01" H 6450 6020 30 0001 C CNN -F 1 "PWR_FLAG" H 6450 5980 30 0000 C CNN - 1 6450 5750 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C2EBF -P 6450 5900 -F 0 "#PWR02" H 6450 5900 30 0001 C CNN -F 1 "GND" H 6450 5830 30 0001 C CNN - 1 6450 5900 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C2DFD -P 4600 2350 -F 0 "R1" V 4680 2350 50 0000 C CNN -F 1 "100000" V 4600 2350 50 0000 C CNN - 1 4600 2350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 3 1 516C2DD6 -P 7950 2900 -F 0 "U3" H 7800 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 8100 3000 50 0000 C CNN - 3 7950 2900 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 4 1 516C2DD0 -P 7950 3550 -F 0 "U3" H 7800 3650 50 0000 C CNN -F 1 "VPLOT8_1" H 8100 3650 50 0000 C CNN - 4 7950 3550 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516C2DCC -P 6050 4250 -F 0 "U3" H 5900 4350 50 0000 C CNN -F 1 "VPLOT8_1" H 6200 4350 50 0000 C CNN - 2 6050 4250 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C2DC4 -P 6050 3500 -F 0 "U3" H 5900 3600 50 0000 C CNN -F 1 "VPLOT8_1" H 6200 3600 50 0000 C CNN - 1 6050 3500 - 0 1 1 0 -$EndComp -$Comp -L R R5 -U 1 1 516C2D81 -P 7650 1850 -F 0 "R5" V 7730 1850 50 0000 C CNN -F 1 "2000" V 7650 1850 50 0000 C CNN - 1 7650 1850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U5 -U 1 1 516C2D75 -P 7650 2500 -F 0 "U5" H 7500 2600 50 0000 C CNN -F 1 "IPLOT" H 7800 2600 50 0000 C CNN - 1 7650 2500 - 0 1 1 0 -$EndComp -$Comp -L R R6 -U 1 1 516C2D45 -P 7650 4600 -F 0 "R6" V 7730 4600 50 0000 C CNN -F 1 "2700" V 7650 4600 50 0000 C CNN - 1 7650 4600 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U6 -U 1 1 516C2D2F -P 7650 3950 -F 0 "U6" H 7500 4050 50 0000 C CNN -F 1 "IPLOT" H 7800 4050 50 0000 C CNN - 1 7650 3950 - 0 1 1 0 -$EndComp -$Comp -L R R4 -U 1 1 516C2CD2 -P 5750 5350 -F 0 "R4" V 5830 5350 50 0000 C CNN -F 1 "3000" V 5750 5350 50 0000 C CNN - 1 5750 5350 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C2CC9 -P 5750 4650 -F 0 "U2" H 5600 4750 50 0000 C CNN -F 1 "IPLOT" H 5900 4750 50 0000 C CNN - 1 5750 4650 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C2CA0 -P 5750 2350 -F 0 "R3" V 5830 2350 50 0000 C CNN -F 1 "5000" V 5750 2350 50 0000 C CNN - 1 5750 2350 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C2C8D -P 5750 3000 -F 0 "U1" H 5600 3100 50 0000 C CNN -F 1 "IPLOT" H 5900 3100 50 0000 C CNN - 1 5750 3000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C2C6F -P 3350 3600 -F 0 "v1" H 3150 3700 60 0000 C CNN -F 1 "DC" H 3150 3550 60 0000 C CNN -F 2 "R1" H 3050 3600 60 0000 C CNN - 1 3350 3600 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516C2C49 -P 4600 4700 -F 0 "R2" V 4680 4700 50 0000 C CNN -F 1 "50000" V 4600 4700 50 0000 C CNN - 1 4600 4700 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q2 -U 1 1 516C2C3A -P 7550 3200 -F 0 "Q2" H 7550 3050 60 0000 R CNN -F 1 "PNP" H 7550 3350 60 0000 R CNN - 1 7550 3200 - 1 0 0 1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C2C30 -P 5650 3800 -F 0 "Q1" H 5650 3650 50 0000 R CNN -F 1 "NPN" H 5650 3950 50 0000 R CNN - 1 5650 3800 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/analysis deleted file mode 100644 index aa8d005..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v3 0e-00 5e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.bak deleted file mode 100644 index e34974d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 11:09:27 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.lib deleted file mode 100644 index b975094..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:31:57 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.bak deleted file mode 100644 index 99334cc..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.bak +++ /dev/null @@ -1,207 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:09:27 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.12-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4900 3850 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE3EB -P 4900 3850 -F 0 "#FLG01" H 4900 3945 30 0001 C CNN -F 1 "PWR_FLAG" H 4900 4030 30 0000 C CNN - 1 4900 3850 - 1 0 0 -1 -$EndComp -Wire Wire Line - 3850 4950 3850 3850 -Wire Wire Line - 6650 4100 6650 5950 -Wire Wire Line - 5350 3400 5350 3450 -Wire Wire Line - 3850 5850 3850 5950 -Wire Wire Line - 3850 5950 6650 5950 -Connection ~ 5050 3850 -Wire Wire Line - 4700 3850 5050 3850 -Wire Wire Line - 5700 4100 5350 4100 -Connection ~ 5350 4100 -Connection ~ 6500 4100 -Wire Wire Line - 6500 2550 5350 2550 -Wire Wire Line - 5350 2550 5350 3000 -Wire Wire Line - 5350 4900 5350 4600 -Wire Wire Line - 5350 5300 5350 5850 -Wire Wire Line - 5350 5850 6500 5850 -Wire Wire Line - 6750 4100 6200 4100 -Connection ~ 6650 4100 -Wire Wire Line - 3850 3850 4200 3850 -Wire Wire Line - 5050 5100 5050 3200 -Wire Wire Line - 5350 4100 5350 3950 -Wire Wire Line - 6500 4950 6500 3450 -$Comp -L IPLOT U1 -U 1 1 516C3068 -P 5350 3700 -F 0 "U1" H 5200 3800 50 0000 C CNN -F 1 "IPLOT" H 5500 3800 50 0000 C CNN - 1 5350 3700 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C304B -P 5350 4350 -F 0 "U2" H 5200 4450 50 0000 C CNN -F 1 "IPLOT" H 5500 4450 50 0000 C CNN - 1 5350 4350 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 5166EE0B -P 3850 5400 -F 0 "v3" H 3650 5500 60 0000 C CNN -F 1 "5V" H 3650 5350 60 0000 C CNN -F 2 "R1" H 3550 5400 60 0000 C CNN - 1 3850 5400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166ED91 -P 4450 3850 -F 0 "R2" V 4530 3850 50 0000 C CNN -F 1 "10000" V 4450 3850 50 0000 C CNN - 1 4450 3850 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 5166ED50 -P 6650 4100 -F 0 "#FLG02" H 6650 4195 30 0001 C CNN -F 1 "PWR_FLAG" H 6650 4280 30 0000 C CNN - 1 6650 4100 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166ED33 -P 6750 4100 -F 0 "#PWR03" H 6750 4100 30 0001 C CNN -F 1 "GND" H 6750 4030 30 0001 C CNN - 1 6750 4100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166ED03 -P 5950 4100 -F 0 "R1" V 6030 4100 50 0000 C CNN -F 1 "1000" V 5950 4100 50 0000 C CNN - 1 5950 4100 - 0 -1 -1 0 -$EndComp -$Comp -L DC v2 -U 1 1 5166ECC4 -P 6500 5400 -F 0 "v2" H 6300 5500 60 0000 C CNN -F 1 "5V" H 6300 5350 60 0000 C CNN -F 2 "R1" H 6200 5400 60 0000 C CNN - 1 6500 5400 - -1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166EC91 -P 6500 3000 -F 0 "v1" H 6300 3100 60 0000 C CNN -F 1 "5V" H 6300 2950 60 0000 C CNN -F 2 "R1" H 6200 3000 60 0000 C CNN - 1 6500 3000 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q2 -U 1 1 5166EC64 -P 5250 5100 -F 0 "Q2" H 5250 4950 60 0000 R CNN -F 1 "PNP" H 5250 5250 60 0000 R CNN - 1 5250 5100 - 1 0 0 1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166EC56 -P 5250 3200 -F 0 "Q1" H 5250 3050 50 0000 R CNN -F 1 "NPN" H 5250 3350 50 0000 R CNN - 1 5250 3200 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir deleted file mode 100644 index 1961478..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir +++ /dev/null @@ -1,18 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:31:53 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 5 1 IPLOT -U1 3 8 IPLOT -U2 1 7 IPLOT -v3 4 0 5V -R2 4 2 10000 -R1 5 0 1000 -v2 0 6 5V -v1 3 0 5V -Q2 7 2 6 PNP -Q1 1 2 8 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt deleted file mode 100644 index 2283488..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:31:53 pm ist - -V_u3 5 1 0 -V_u1 3 8 0 -V_u2 1 7 0 -v3 4 0 5v -r2 4 2 10000 -r1 5 0 1000 -v2 0 6 5v -v1 3 0 5v -q2 6 2 7 pnp -q1 8 2 1 npn - -.dc v3 0e-00 5e-00 1e-00 -.plot i(V_u3) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out deleted file mode 100644 index 61a3934..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:31:53 pm ist - -V_u3 5 1 0 -V_u1 3 8 0 -V_u2 1 7 0 -v3 4 0 5v -r2 4 2 10000 -r1 5 0 1000 -v2 0 6 5v -v1 3 0 5v -q2 6 2 7 pnp -q1 8 2 1 npn - -.dc v3 0e-00 5e-00 1e-00 - -* Control Statements -.control -run -plot i(V_u3) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro deleted file mode 100644 index d4fedff..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 15 April 2013 10:21:09 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj deleted file mode 100644 index cf8b515..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.12.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch deleted file mode 100644 index a133513..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.12/example_3.12.sch +++ /dev/null @@ -1,222 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 01:31:57 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.12-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5350 4000 -Connection ~ 6300 4100 -Wire Wire Line - 6300 4350 6300 4100 -Wire Wire Line - 5350 3400 5350 4100 -Wire Wire Line - 4950 2500 4950 2550 -Wire Wire Line - 4950 2550 6500 2550 -Wire Wire Line - 6500 4950 6500 3450 -Wire Wire Line - 5050 5100 5050 3200 -Wire Wire Line - 4200 3850 3850 3850 -Connection ~ 6650 4100 -Wire Wire Line - 6750 4100 6200 4100 -Wire Wire Line - 6500 5850 5350 5850 -Wire Wire Line - 5350 5850 5350 5300 -Wire Wire Line - 5350 4900 5350 4600 -Connection ~ 6500 4100 -Connection ~ 5350 4100 -Wire Wire Line - 4700 3850 5050 3850 -Connection ~ 5050 3850 -Wire Wire Line - 3850 5950 6650 5950 -Wire Wire Line - 3850 5950 3850 5850 -Wire Wire Line - 6650 5950 6650 4100 -Wire Wire Line - 3850 3850 3850 4950 -Connection ~ 4900 3850 -Wire Wire Line - 4950 3000 5350 3000 -Wire Wire Line - 5850 4000 5850 4350 -Wire Wire Line - 5850 4350 5800 4350 -$Comp -L IPLOT U3 -U 1 1 51909DB6 -P 5600 4000 -F 0 "U3" H 5450 4100 50 0000 C CNN -F 1 "IPLOT" H 5750 4100 50 0000 C CNN - 1 5600 4000 - -1 0 0 1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE3EB -P 4900 3850 -F 0 "#FLG01" H 4900 3945 30 0001 C CNN -F 1 "PWR_FLAG" H 4900 4030 30 0000 C CNN - 1 4900 3850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C3068 -P 4950 2750 -F 0 "U1" H 4800 2850 50 0000 C CNN -F 1 "IPLOT" H 5100 2850 50 0000 C CNN - 1 4950 2750 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C304B -P 5350 4350 -F 0 "U2" H 5200 4450 50 0000 C CNN -F 1 "IPLOT" H 5500 4450 50 0000 C CNN - 1 5350 4350 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 5166EE0B -P 3850 5400 -F 0 "v3" H 3650 5500 60 0000 C CNN -F 1 "5V" H 3650 5350 60 0000 C CNN -F 2 "R1" H 3550 5400 60 0000 C CNN - 1 3850 5400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166ED91 -P 4450 3850 -F 0 "R2" V 4530 3850 50 0000 C CNN -F 1 "10000" V 4450 3850 50 0000 C CNN - 1 4450 3850 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 5166ED50 -P 6650 4100 -F 0 "#FLG02" H 6650 4195 30 0001 C CNN -F 1 "PWR_FLAG" H 6650 4280 30 0000 C CNN - 1 6650 4100 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166ED33 -P 6750 4100 -F 0 "#PWR03" H 6750 4100 30 0001 C CNN -F 1 "GND" H 6750 4030 30 0001 C CNN - 1 6750 4100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166ED03 -P 6050 4350 -F 0 "R1" V 6130 4350 50 0000 C CNN -F 1 "1000" V 6050 4350 50 0000 C CNN - 1 6050 4350 - 0 -1 -1 0 -$EndComp -$Comp -L DC v2 -U 1 1 5166ECC4 -P 6500 5400 -F 0 "v2" H 6300 5500 60 0000 C CNN -F 1 "5V" H 6300 5350 60 0000 C CNN -F 2 "R1" H 6200 5400 60 0000 C CNN - 1 6500 5400 - -1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166EC91 -P 6500 3000 -F 0 "v1" H 6300 3100 60 0000 C CNN -F 1 "5V" H 6300 2950 60 0000 C CNN -F 2 "R1" H 6200 3000 60 0000 C CNN - 1 6500 3000 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q2 -U 1 1 5166EC64 -P 5250 5100 -F 0 "Q2" H 5250 4950 60 0000 R CNN -F 1 "PNP" H 5250 5250 60 0000 R CNN - 1 5250 5100 - 1 0 0 1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166EC56 -P 5250 3200 -F 0 "Q1" H 5250 3050 50 0000 R CNN -F 1 "NPN" H 5250 3350 50 0000 R CNN - 1 5250 3200 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/analysis deleted file mode 100644 index 11459c7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 12e-00 12e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13-cache.lib deleted file mode 100644 index efa56af..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 11:31:21 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak deleted file mode 100644 index db1ff38..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.bak +++ /dev/null @@ -1,210 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:16:49 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.10-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5050 3350 4200 3350 -Wire Wire Line - 6850 2850 6850 1300 -Wire Wire Line - 6850 1300 4200 1300 -Wire Wire Line - 4200 1300 4200 2200 -Connection ~ 4200 3350 -Wire Wire Line - 4200 2700 4200 3800 -Wire Wire Line - 6850 3750 6850 5150 -Wire Wire Line - 5350 3550 5350 3750 -Wire Wire Line - 5350 2050 5350 2250 -Wire Wire Line - 5350 1550 5350 1300 -Wire Wire Line - 5350 2750 5350 3150 -Wire Wire Line - 5350 4250 5350 4400 -Wire Wire Line - 4200 4300 4200 5150 -Wire Wire Line - 4200 5150 6850 5150 -Connection ~ 5350 5150 -Connection ~ 5350 1300 -Wire Wire Line - 5350 5650 5350 4900 -Connection ~ 5350 5500 -Connection ~ 5350 3650 -Connection ~ 5350 2900 -Connection ~ 5000 3350 -$Comp -L VPLOT8_1 U2 -U 3 1 516C2B0C -P 5650 3650 -F 0 "U2" H 5500 3750 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3750 50 0000 C CNN - 3 5650 3650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C2B05 -P 5650 2900 -F 0 "U2" H 5500 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3000 50 0000 C CNN - 2 5650 2900 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C2AFE -P 5000 3050 -F 0 "U2" H 4850 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5150 3150 50 0000 C CNN - 1 5000 3050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C2AB7 -P 5350 5500 -F 0 "#FLG01" H 5350 5770 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 5730 30 0000 C CNN - 1 5350 5500 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C2AAB -P 5350 5650 -F 0 "#PWR02" H 5350 5650 30 0001 C CNN -F 1 "GND" H 5350 5580 30 0001 C CNN - 1 5350 5650 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516C2A3E -P 4200 4050 -F 0 "R2" V 4280 4050 50 0000 C CNN -F 1 "50000" V 4200 4050 50 0000 C CNN - 1 4200 4050 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C2A13 -P 4200 2450 -F 0 "R1" V 4280 2450 50 0000 C CNN -F 1 "100000" V 4200 2450 50 0000 C CNN - 1 4200 2450 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 516C29D9 -P 5350 4650 -F 0 "R4" V 5430 4650 50 0000 C CNN -F 1 "3000" V 5350 4650 50 0000 C CNN - 1 5350 4650 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C29CD -P 5350 4000 -F 0 "U4" H 5200 4100 50 0000 C CNN -F 1 "IPLOT" H 5500 4100 50 0000 C CNN - 1 5350 4000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C296E -P 6850 3300 -F 0 "v1" H 6650 3400 60 0000 C CNN -F 1 "15V" H 6650 3250 60 0000 C CNN -F 2 "R1" H 6550 3300 60 0000 C CNN - 1 6850 3300 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C2958 -P 5350 2500 -F 0 "U3" H 5200 2600 50 0000 C CNN -F 1 "IPLOT" H 5500 2600 50 0000 C CNN - 1 5350 2500 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C293A -P 5350 1800 -F 0 "R3" V 5430 1800 50 0000 C CNN -F 1 "5000" V 5350 1800 50 0000 C CNN - 1 5350 1800 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C2934 -P 5250 3350 -F 0 "Q1" H 5250 3200 50 0000 R CNN -F 1 "NPN" H 5250 3500 50 0000 R CNN - 1 5250 3350 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir deleted file mode 100644 index 2015439..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 11:31:17 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -R1 5 7 80000 -U2 7 2 1 VPLOT8_1 -R2 7 0 40000 -R4 4 0 3300 -U4 1 4 IPLOT -v1 5 0 12V -U3 6 2 IPLOT -R3 5 6 4000 -Q1 1 7 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt deleted file mode 100644 index cc4fac4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 11:31:17 am ist - -r1 5 7 80000 -* Plotting option vplot8_1 -r2 7 0 40000 -r4 4 0 3300 -V_u4 1 4 0 -v1 5 0 12v -V_u3 6 2 0 -r3 5 6 4000 -q1 2 7 1 npn - -.dc v1 0e-00 12e-00 12e-03 -.plot v(7) v(2) v(1) -.plot i(V_u4) -.plot i(V_u3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.out deleted file mode 100644 index d5ce68a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 11:31:17 am ist - -r1 5 7 80000 -* Plotting option vplot8_1 -r2 7 0 40000 -r4 4 0 3300 -V_u4 1 4 0 -v1 5 0 12v -V_u3 6 2 0 -r3 5 6 4000 -q1 2 7 1 npn - -.dc v1 0e-00 12e-00 12e-03 - -* Control Statements -.control -run -plot v(7) v(2) v(1) -plot i(V_u4) -plot i(V_u3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.pro deleted file mode 100644 index 9ed7c71..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 11:12:52 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.proj deleted file mode 100644 index a04af44..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.13.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.sch deleted file mode 100644 index d0ef771..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.13/example_3.13.sch +++ /dev/null @@ -1,209 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:31:21 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L R R1 -U 1 1 516CE8DE -P 4200 2450 -F 0 "R1" V 4280 2450 50 0000 C CNN -F 1 "80000" V 4200 2450 50 0000 C CNN - 1 4200 2450 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5050 3350 4200 3350 -Wire Wire Line - 6850 2850 6850 1300 -Wire Wire Line - 6850 1300 4200 1300 -Wire Wire Line - 4200 1300 4200 2200 -Connection ~ 4200 3350 -Wire Wire Line - 4200 2700 4200 3800 -Wire Wire Line - 6850 3750 6850 5150 -Wire Wire Line - 5350 3550 5350 3750 -Wire Wire Line - 5350 2050 5350 2250 -Wire Wire Line - 5350 1550 5350 1300 -Wire Wire Line - 5350 2750 5350 3150 -Wire Wire Line - 5350 4250 5350 4400 -Wire Wire Line - 4200 4300 4200 5150 -Wire Wire Line - 4200 5150 6850 5150 -Connection ~ 5350 5150 -Connection ~ 5350 1300 -Wire Wire Line - 5350 5650 5350 4900 -Connection ~ 5350 5500 -Connection ~ 5350 3650 -Connection ~ 5350 2900 -Connection ~ 5000 3350 -$Comp -L VPLOT8_1 U2 -U 3 1 516C2B0C -P 5650 3650 -F 0 "U2" H 5500 3750 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3750 50 0000 C CNN - 3 5650 3650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C2B05 -P 5650 2900 -F 0 "U2" H 5500 3000 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3000 50 0000 C CNN - 2 5650 2900 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C2AFE -P 5000 3050 -F 0 "U2" H 4850 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5150 3150 50 0000 C CNN - 1 5000 3050 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C2AB7 -P 5350 5500 -F 0 "#FLG01" H 5350 5770 30 0001 C CNN -F 1 "PWR_FLAG" H 5350 5730 30 0000 C CNN - 1 5350 5500 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C2AAB -P 5350 5650 -F 0 "#PWR02" H 5350 5650 30 0001 C CNN -F 1 "GND" H 5350 5580 30 0001 C CNN - 1 5350 5650 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 516C2A3E -P 4200 4050 -F 0 "R2" V 4280 4050 50 0000 C CNN -F 1 "40000" V 4200 4050 50 0000 C CNN - 1 4200 4050 - 1 0 0 -1 -$EndComp -$Comp -L R R4 -U 1 1 516C29D9 -P 5350 4650 -F 0 "R4" V 5430 4650 50 0000 C CNN -F 1 "3300" V 5350 4650 50 0000 C CNN - 1 5350 4650 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C29CD -P 5350 4000 -F 0 "U4" H 5200 4100 50 0000 C CNN -F 1 "IPLOT" H 5500 4100 50 0000 C CNN - 1 5350 4000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C296E -P 6850 3300 -F 0 "v1" H 6650 3400 60 0000 C CNN -F 1 "12V" H 6650 3250 60 0000 C CNN -F 2 "R1" H 6550 3300 60 0000 C CNN - 1 6850 3300 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C2958 -P 5350 2500 -F 0 "U3" H 5200 2600 50 0000 C CNN -F 1 "IPLOT" H 5500 2600 50 0000 C CNN - 1 5350 2500 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C293A -P 5350 1800 -F 0 "R3" V 5430 1800 50 0000 C CNN -F 1 "4000" V 5350 1800 50 0000 C CNN - 1 5350 1800 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C2934 -P 5250 3350 -F 0 "Q1" H 5250 3200 50 0000 R CNN -F 1 "NPN" H 5250 3500 50 0000 R CNN - 1 5250 3350 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/analysis deleted file mode 100644 index 6295799..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 5e-00 100e-00 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14-cache.lib deleted file mode 100644 index 4090ea9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14-cache.lib +++ /dev/null @@ -1,131 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:35:55 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak deleted file mode 100644 index 850e6be..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.bak +++ /dev/null @@ -1,227 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:42:22 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example3.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5000 5750 5000 4300 -Connection ~ 4550 3050 -Connection ~ 4650 3050 -Wire Wire Line - 4300 3050 4700 3050 -Wire Wire Line - 3800 3050 3700 3050 -Connection ~ 5000 2650 -Wire Wire Line - 5900 2550 5900 1050 -Wire Wire Line - 5000 3800 5000 3250 -Wire Wire Line - 5000 2050 5000 1550 -Connection ~ 5000 5450 -Wire Wire Line - 5900 1050 5000 1050 -Wire Wire Line - 2900 3050 3200 3050 -Wire Wire Line - 2900 5200 2900 5450 -Connection ~ 5000 5600 -Connection ~ 5000 3450 -Wire Wire Line - 5000 2550 5000 2850 -Wire Wire Line - 5900 3450 5900 5450 -Wire Wire Line - 2900 3950 2900 4300 -Wire Wire Line - 5900 5450 2900 5450 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CEB5B -P 4550 3050 -F 0 "#FLG01" H 4550 3145 30 0001 C CNN -F 1 "PWR_FLAG" H 4550 3230 30 0000 C CNN - 1 4550 3050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U5 -U 1 1 516CEB46 -P 4650 3350 -F 0 "U5" H 4500 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 4800 3450 50 0000 C CNN - 1 4650 3350 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CEB0E -P 4050 3050 -F 0 "U4" H 3900 3150 50 0000 C CNN -F 1 "IPLOT" H 4200 3150 50 0000 C CNN - 1 4050 3050 - -1 0 0 1 -$EndComp -$Comp -L R R2 -U 1 1 516CEAFA -P 3450 3050 -F 0 "R2" V 3530 3050 50 0000 C CNN -F 1 "100000" V 3450 3050 50 0000 C CNN - 1 3450 3050 - 0 1 1 0 -$EndComp -$Comp -L PULSE v3 -U 1 1 516CEAC5 -P 2900 3500 -F 0 "v3" H 2700 3600 60 0000 C CNN -F 1 "PULSE" H 2700 3450 60 0000 C CNN -F 2 "R1" H 2600 3500 60 0000 C CNN - 1 2900 3500 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516BD8B9 -P 5300 2650 -F 0 "U3" H 5150 2750 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 2750 50 0000 C CNN - 1 5300 2650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516BD8AC -P 5300 3450 -F 0 "U3" H 5150 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 3550 50 0000 C CNN - 2 5300 3450 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516BD643 -P 5000 4050 -F 0 "U2" H 4850 4150 50 0000 C CNN -F 1 "IPLOT" H 5150 4150 50 0000 C CNN - 1 5000 4050 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516BD5F9 -P 5000 2300 -F 0 "U1" H 4850 2400 50 0000 C CNN -F 1 "IPLOT" H 5150 2400 50 0000 C CNN - 1 5000 2300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 5166BF83 -P 5000 5600 -F 0 "#FLG02" H 5000 5695 30 0001 C CNN -F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN - 1 5000 5600 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166BF64 -P 5000 5750 -F 0 "#PWR03" H 5000 5750 30 0001 C CNN -F 1 "GND" H 5000 5680 30 0001 C CNN - 1 5000 5750 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166BEE6 -P 2900 4750 -F 0 "v1" H 2700 4850 60 0000 C CNN -F 1 "3V" H 2700 4700 60 0000 C CNN -F 2 "R1" H 2600 4750 60 0000 C CNN - 1 2900 4750 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5166BED7 -P 5900 3000 -F 0 "v2" H 5700 3100 60 0000 C CNN -F 1 "10V" H 5700 2950 60 0000 C CNN -F 2 "R1" H 5600 3000 60 0000 C CNN - 1 5900 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166BE8E -P 5000 1300 -F 0 "R1" V 5080 1300 50 0000 C CNN -F 1 "3000" V 5000 1300 50 0000 C CNN - 1 5000 1300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166BE53 -P 4900 3050 -F 0 "Q1" H 4900 2900 50 0000 R CNN -F 1 "NPN" H 4900 3200 50 0000 R CNN - 1 4900 3050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir deleted file mode 100644 index e9d15ad..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir +++ /dev/null @@ -1,20 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:35:51 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U6 8 VPLOT8_1 -U5 9 VPLOT8_1 -U4 9 1 IPLOT -R2 1 8 100000 -v3 8 4 PULSE -U3 2 3 VPLOT8_1 -U2 3 0 IPLOT -U1 7 2 IPLOT -v1 4 0 3V -v2 6 0 10V -R1 6 7 3000 -Q1 3 9 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt deleted file mode 100644 index b1e99c7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.ckt +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:35:51 pm ist - -* Plotting option vplot8_1 -* Plotting option vplot8_1 -V_u4 9 1 0 -r2 1 8 100000 -v3 8 4 pulse(0 1 0 0 0 2 ) -* Plotting option vplot8_1 -V_u2 3 0 0 -V_u1 7 2 0 -v1 4 0 3v -v2 6 0 10v -r1 6 7 3000 -q1 2 9 3 npn - -.tran 5e-00 100e-00 0e-00 -.plot v(8) -.plot v(9) -.plot i(V_u4) -.plot v(2) v(3) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out deleted file mode 100644 index be85aa9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.cir.out +++ /dev/null @@ -1,28 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:35:51 pm ist - -* Plotting option vplot8_1 -* Plotting option vplot8_1 -V_u4 9 1 0 -r2 1 8 100000 -v3 8 4 pulse(0 1 0 0 0 2 ) -* Plotting option vplot8_1 -V_u2 3 0 0 -V_u1 7 2 0 -v1 4 0 3v -v2 6 0 10v -r1 6 7 3000 -q1 2 9 3 npn - -.tran 5e-00 100e-00 0e-00 - -* Control Statements -.control -run -plot v(8) -plot v(9) -plot i(V_u4) -plot v(2) v(3) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro deleted file mode 100644 index b5f9bd7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 11:34:19 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj deleted file mode 100644 index 2c95037..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.14.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch deleted file mode 100644 index 4f4f51a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.14/example_3.14.sch +++ /dev/null @@ -1,236 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 01:35:55 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 3050 3050 -$Comp -L VPLOT8_1 U6 -U 1 1 51909ECA -P 3050 3350 -F 0 "U6" H 2900 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 3200 3450 50 0000 C CNN - 1 3050 3350 - -1 0 0 1 -$EndComp -Wire Wire Line - 5000 5750 5000 4300 -Connection ~ 4550 3050 -Connection ~ 4650 3050 -Wire Wire Line - 4300 3050 4700 3050 -Wire Wire Line - 3800 3050 3700 3050 -Connection ~ 5000 2650 -Wire Wire Line - 5900 2550 5900 1050 -Wire Wire Line - 5000 3800 5000 3250 -Wire Wire Line - 5000 2050 5000 1550 -Connection ~ 5000 5450 -Wire Wire Line - 5900 1050 5000 1050 -Wire Wire Line - 2900 3050 3200 3050 -Wire Wire Line - 2900 5200 2900 5450 -Connection ~ 5000 5600 -Connection ~ 5000 3450 -Wire Wire Line - 5000 2550 5000 2850 -Wire Wire Line - 5900 3450 5900 5450 -Wire Wire Line - 2900 3950 2900 4300 -Wire Wire Line - 5900 5450 2900 5450 -$Comp -L PWR_FLAG #FLG1 -U 1 1 516CEB5B -P 4550 3050 -F 0 "#FLG1" H 4550 3145 30 0001 C CNN -F 1 "PWR_FLAG" H 4550 3230 30 0000 C CNN - 1 4550 3050 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U5 -U 1 1 516CEB46 -P 4650 3350 -F 0 "U5" H 4500 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 4800 3450 50 0000 C CNN - 1 4650 3350 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CEB0E -P 4050 3050 -F 0 "U4" H 3900 3150 50 0000 C CNN -F 1 "IPLOT" H 4200 3150 50 0000 C CNN - 1 4050 3050 - -1 0 0 1 -$EndComp -$Comp -L R R2 -U 1 1 516CEAFA -P 3450 3050 -F 0 "R2" V 3530 3050 50 0000 C CNN -F 1 "100000" V 3450 3050 50 0000 C CNN - 1 3450 3050 - 0 1 1 0 -$EndComp -$Comp -L PULSE v3 -U 1 1 516CEAC5 -P 2900 3500 -F 0 "v3" H 2700 3600 60 0000 C CNN -F 1 "PULSE" H 2700 3450 60 0000 C CNN -F 2 "R1" H 2600 3500 60 0000 C CNN - 1 2900 3500 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516BD8B9 -P 5300 2650 -F 0 "U3" H 5150 2750 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 2750 50 0000 C CNN - 1 5300 2650 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516BD8AC -P 5300 3450 -F 0 "U3" H 5150 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5450 3550 50 0000 C CNN - 2 5300 3450 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516BD643 -P 5000 4050 -F 0 "U2" H 4850 4150 50 0000 C CNN -F 1 "IPLOT" H 5150 4150 50 0000 C CNN - 1 5000 4050 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516BD5F9 -P 5000 2300 -F 0 "U1" H 4850 2400 50 0000 C CNN -F 1 "IPLOT" H 5150 2400 50 0000 C CNN - 1 5000 2300 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG2 -U 1 1 5166BF83 -P 5000 5600 -F 0 "#FLG2" H 5000 5695 30 0001 C CNN -F 1 "PWR_FLAG" H 5000 5780 30 0000 C CNN - 1 5000 5600 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR1 -U 1 1 5166BF64 -P 5000 5750 -F 0 "#PWR1" H 5000 5750 30 0001 C CNN -F 1 "GND" H 5000 5680 30 0001 C CNN - 1 5000 5750 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166BEE6 -P 2900 4750 -F 0 "v1" H 2700 4850 60 0000 C CNN -F 1 "3V" H 2700 4700 60 0000 C CNN -F 2 "R1" H 2600 4750 60 0000 C CNN - 1 2900 4750 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5166BED7 -P 5900 3000 -F 0 "v2" H 5700 3100 60 0000 C CNN -F 1 "10V" H 5700 2950 60 0000 C CNN -F 2 "R1" H 5600 3000 60 0000 C CNN - 1 5900 3000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166BE8E -P 5000 1300 -F 0 "R1" V 5080 1300 50 0000 C CNN -F 1 "3000" V 5000 1300 50 0000 C CNN - 1 5000 1300 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166BE53 -P 4900 3050 -F 0 "Q1" H 4900 2900 50 0000 R CNN -F 1 "NPN" H 4900 3200 50 0000 R CNN - 1 4900 3050 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/analysis deleted file mode 100644 index 05351e0..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 1e-00 10e-00 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib deleted file mode 100644 index e8eb963..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16-cache.lib +++ /dev/null @@ -1,131 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:27:16 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak deleted file mode 100644 index 8773c0d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.bak +++ /dev/null @@ -1,221 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:24:14 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5450 4850 5450 5350 -Connection ~ 4300 5050 -Wire Wire Line - 4300 5050 4300 3300 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Wire Wire Line - 3500 3550 3500 3050 -Wire Wire Line - 3500 3050 5450 3050 -Wire Wire Line - 5450 4200 5450 4350 -$Comp -L R R1 -U 1 1 516CF523 -P 5450 4600 -F 0 "R1" V 5530 4600 50 0000 C CNN -F 1 "5000" V 5450 4600 50 0000 C CNN - 1 5450 4600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "10000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir deleted file mode 100644 index e62088b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 12:27:13 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 7 0 PULSE -R1 1 0 5000 -U2 2 7 6 VPLOT8_1 -U1 2 0 IPLOT -R2 4 5 10000 -U3 5 7 IPLOT -v2 4 0 10V -U4 6 1 IPLOT -Q1 6 2 7 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt deleted file mode 100644 index 3741239..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 12:27:13 pm ist - -v1 7 0 pulse(0 5 0 0 0 1 2) -r1 1 0 5000 -* Plotting option vplot8_1 -V_u1 2 0 0 -r2 4 5 10000 -V_u3 5 7 0 -v2 4 0 10v -V_u4 6 1 0 -q1 7 2 6 npn - -.tran 1e-00 10e-00 0e-00 -.plot v(2) v(7) v(6) -.plot i(V_u1) -.plot i(V_u3) -.plot i(V_u4) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out deleted file mode 100644 index 86e4303..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 12:27:13 pm ist - -v1 7 0 pulse(0 5 0 0 0 1 2) -r1 1 0 5000 -* Plotting option vplot8_1 -V_u1 2 0 0 -r2 4 5 10000 -V_u3 5 7 0 -v2 4 0 10v -V_u4 6 1 0 -q1 7 2 6 npn - -.tran 1e-00 10e-00 0e-00 - -* Control Statements -.control -run -plot v(2) v(7) v(6) -plot i(V_u1) -plot i(V_u3) -plot i(V_u4) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.pro deleted file mode 100644 index ebd9c0e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 12:26:32 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.proj deleted file mode 100644 index 5af6371..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.16.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.sch deleted file mode 100644 index 95e37c9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.16/example_3.16.sch +++ /dev/null @@ -1,220 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:27:16 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PULSE v1 -U 1 1 516CF62D -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "PULSE" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5450 4850 5450 5350 -Connection ~ 4300 5050 -Wire Wire Line - 4300 5050 4300 3300 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Wire Wire Line - 3500 3550 3500 3050 -Wire Wire Line - 3500 3050 5450 3050 -Wire Wire Line - 5450 4200 5450 4350 -$Comp -L R R1 -U 1 1 516CF523 -P 5450 4600 -F 0 "R1" V 5530 4600 50 0000 C CNN -F 1 "5000" V 5450 4600 50 0000 C CNN - 1 5450 4600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "10000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/analysis deleted file mode 100644 index 31f2ad8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 2e-00 2e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak deleted file mode 100644 index 646744a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 26 April 2013 04:00:58 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# Idc -# -DEF Idc i 0 40 Y Y 1 F N -F0 "i" -200 100 60 H V C CNN -F1 "Idc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib deleted file mode 100644 index b92ac3a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 26 April 2013 04:23:31 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# Idc -# -DEF Idc i 0 40 Y Y 1 F N -F0 "i" -200 100 60 H V C CNN -F1 "Idc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak deleted file mode 100644 index 65ec82c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak +++ /dev/null @@ -1,188 +0,0 @@ -EESchema Schematic File Version 2 date Friday 26 April 2013 04:00:58 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.20-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "26 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6350 3300 6350 2800 -Wire Wire Line - 6350 2800 5950 2800 -Wire Wire Line - 4750 4200 4950 4200 -Wire Wire Line - 5450 4200 5650 4200 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 4200 5950 4050 -Connection ~ 5950 5350 -Connection ~ 5950 5450 -Connection ~ 5950 3450 -Connection ~ 5950 4100 -Wire Wire Line - 6350 4200 6350 5350 -Wire Wire Line - 5650 4200 5650 3850 -Connection ~ 5650 3850 -Connection ~ 5650 3950 -Wire Wire Line - 5950 5600 5950 4700 -Wire Wire Line - 6350 5350 5450 5350 -Wire Wire Line - 5450 5350 5450 5100 -Wire Wire Line - 5450 5100 4750 5100 -$Comp -L IDC i1 -U 1 1 517A17EC -P 4750 4650 -F 0 "i1" H 4550 4750 60 0000 C CNN -F 1 "IDC" H 4550 4600 60 0000 C CNN -F 2 "R1" H 4450 4650 60 0000 C CNN - 1 4750 4650 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 517A1753 -P 5950 5350 -F 0 "#FLG01" H 5950 5620 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 5580 30 0000 C CNN - 1 5950 5350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517A174B -P 5650 3950 -F 0 "#FLG02" H 5650 4220 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN - 1 5650 3950 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 517A172B -P 5950 4450 -F 0 "U4" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 517A1709 -P 5200 4200 -F 0 "U2" H 5050 4300 50 0000 C CNN -F 1 "IPLOT" H 5350 4300 50 0000 C CNN - 1 5200 4200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 517A16C8 -P 5950 3050 -F 0 "U3" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166C87D -P 5950 5600 -F 0 "#PWR03" H 5950 5600 30 0001 C CNN -F 1 "GND" H 5950 5530 30 0001 C CNN - 1 5950 5600 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "2" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir deleted file mode 100644 index 419bc05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 26 April 2013 03:55:55 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -i1 5 0 IDC -U4 0 1 IPLOT -U2 3 5 IPLOT -U3 4 6 IPLOT -U1 6 1 VPLOT8_1 -v1 4 0 2 -Q1 1 3 6 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt deleted file mode 100644 index a91b990..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 26 april 2013 03:55:55 pm ist -.include npn.lib - -i1 5 0 idc -V_u4 0 1 0 -V_u2 3 5 0 -V_u3 4 6 0 -* Plotting option vplot8_1 -v1 4 0 2 -q1 6 3 1 npn - -.dc v1 0e-00 2e-00 2e-03 -.plot i(V_u4) -.plot i(V_u2) -.plot i(V_u3) -.plot v(6) v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out deleted file mode 100644 index b2caa59..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 26 april 2013 03:55:55 pm ist -.include npn.lib - -i1 5 0 idc -V_u4 0 1 0 -V_u2 3 5 0 -V_u3 4 6 0 -* Plotting option vplot8_1 -v1 4 0 2 -q1 6 3 1 npn - -.dc v1 0e-00 2e-00 2e-03 - -* Control Statements -.control -run -plot i(V_u4) -plot i(V_u2) -plot i(V_u3) -plot v(6) v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro deleted file mode 100644 index d4ac2ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 12:53:24 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj deleted file mode 100644 index 231747a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.20.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch deleted file mode 100644 index a694eb1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch +++ /dev/null @@ -1,183 +0,0 @@ -EESchema Schematic File Version 2 date Friday 26 April 2013 04:23:31 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.20-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "26 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6350 4200 6350 5100 -Wire Wire Line - 6350 3300 6350 2800 -Wire Wire Line - 6350 2800 5950 2800 -Wire Wire Line - 4750 4200 4950 4200 -Wire Wire Line - 5450 4200 5650 4200 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 4200 5950 4050 -Connection ~ 5950 5100 -Connection ~ 5950 3450 -Connection ~ 5950 4100 -Wire Wire Line - 5650 4200 5650 3850 -Connection ~ 5650 3850 -Connection ~ 5650 3950 -Wire Wire Line - 6350 5100 4750 5100 -Wire Wire Line - 5950 5200 5950 4700 -$Comp -L IDC i1 -U 1 1 517A17EC -P 4750 4650 -F 0 "i1" H 4550 4750 60 0000 C CNN -F 1 "IDC" H 4550 4600 60 0000 C CNN -F 2 "R1" H 4450 4650 60 0000 C CNN - 1 4750 4650 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 517A1753 -P 5950 5100 -F 0 "#FLG01" H 5950 5370 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 5330 30 0000 C CNN - 1 5950 5100 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517A174B -P 5650 3950 -F 0 "#FLG02" H 5650 4220 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN - 1 5650 3950 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 517A172B -P 5950 4450 -F 0 "U4" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 517A1709 -P 5200 4200 -F 0 "U2" H 5050 4300 50 0000 C CNN -F 1 "IPLOT" H 5350 4300 50 0000 C CNN - 1 5200 4200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 517A16C8 -P 5950 3050 -F 0 "U3" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166C87D -P 5950 5200 -F 0 "#PWR03" H 5950 5200 30 0001 C CNN -F 1 "GND" H 5950 5130 30 0001 C CNN - 1 5950 5200 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "2" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib deleted file mode 100644 index 1ff6b05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 -+ Is=6.734f Eg=1.11 ) diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis deleted file mode 100644 index 10c280a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib deleted file mode 100644 index a8411e8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model bjt NPN( Vtf=1.7 Cjc=7.306p Nc=2 Tr=46.91n Ne=1.307 -+ Cje=22.01p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=411.1p Xti=3 Ikr=0 Bf=50 Fc=.5 -+ Ise=14.34f Br=6.092 Ikf=.2847 Mje=.377 Mjc=.3416 -+ Vaf=74.03 Vjc=.2 Vje=.75 Xtf=3 Itf=.6 -+ Is=14.34f Eg=1.11 )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak deleted file mode 100644 index dad7e0c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak +++ /dev/null @@ -1,218 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:57:15 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir deleted file mode 100644 index 2e072a8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 12:03:45 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -Q1 7 1 5 PNP -v1 7 0 PULSE -R1 6 0 5000 -U2 1 7 5 VPLOT8_1 -U1 1 0 IPLOT -R2 3 4 10000 -U3 4 7 IPLOT -v2 3 0 10V -U4 5 6 IPLOT - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch deleted file mode 100644 index e0eb696..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch +++ /dev/null @@ -1,235 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:03:50 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CF0A9 -P 4000 3050 -F 0 "#FLG01" H 4000 3320 30 0001 C CNN -F 1 "PWR_FLAG" H 4000 3280 30 0000 C CNN - 1 4000 3050 - 1 0 0 -1 -$EndComp -Wire Wire Line - 3500 4200 3500 5050 -Connection ~ 4300 5050 -Wire Wire Line - 4300 5050 4300 3300 -Connection ~ 3500 3300 -Wire Wire Line - 3500 3550 3500 3050 -Wire Wire Line - 5450 4200 5450 4350 -Connection ~ 4000 3050 -Wire Wire Line - 3500 5050 6650 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Wire Wire Line - 5450 5350 5450 4850 -Wire Wire Line - 5150 3300 4800 3300 -Wire Wire Line - 3500 3050 5450 3050 -Wire Wire Line - 5450 3050 5450 3000 -Connection ~ 5450 3000 -$Comp -L PNP Q1 -U 1 1 516CEFD3 -P 5350 3300 -F 0 "Q1" H 5350 3150 60 0000 R CNN -F 1 "PNP" H 5350 3450 60 0000 R CNN - 1 5350 3300 - 1 0 0 1 -$EndComp -$Comp -L PULSE v1 -U 1 1 516CEF97 -P 3500 3750 -F 0 "v1" H 3300 3850 60 0000 C CNN -F 1 "PULSE" H 3300 3700 60 0000 C CNN -F 2 "R1" H 3200 3750 60 0000 C CNN - 1 3500 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CEF60 -P 5450 4600 -F 0 "R1" V 5530 4600 50 0000 C CNN -F 1 "5000" V 5450 4600 50 0000 C CNN - 1 5450 4600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG02" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG03" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR04" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "10000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak deleted file mode 100644 index f265808..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:24:14 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib deleted file mode 100644 index 8652c69..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 25 April 2013 02:05:06 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak deleted file mode 100644 index 246ba5c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak +++ /dev/null @@ -1,217 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:04:07 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir deleted file mode 100644 index 97a0042..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 25 April 2013 02:05:01 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 7 2 5 VPLOT8_1 -U1 7 1 IPLOT -v1 1 0 5V -R1 1 1 2200 -R2 3 4 1k -U3 4 2 IPLOT -v2 3 0 10V -U4 5 0 IPLOT -Q1 5 7 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt deleted file mode 100644 index 51d6e2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 02:05:01 pm ist -.include npn.lib - -* Plotting option vplot8_1 -V_u1 7 1 0 -v1 1 0 5v -r1 1 1 2200 -r2 3 4 1k -V_u3 4 2 0 -v2 3 0 10v -V_u4 5 0 0 -q1 2 7 5 npn - -.dc v1 0e-00 5e-00 5e-00 -.plot v(7) v(2) v(5) -.plot i(V_u1) -.plot i(V_u3) -.plot i(V_u4) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out deleted file mode 100644 index 30154d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out +++ /dev/null @@ -1,24 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 02:05:01 pm ist -.include npn.lib - -* Plotting option vplot8_1 -V_u1 7 1 0 -v1 1 0 5v -r1 1 1 2200 -r2 3 4 1k -V_u3 4 2 0 -v2 3 0 10v -V_u4 5 0 0 -q1 2 7 5 npn - -.dc v1 0e-00 5e-00 5e-00 - -* Control Statements -.control -run -plot v(7) v(2) v(5) -plot i(V_u1) -plot i(V_u3) -plot i(V_u4) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro deleted file mode 100644 index f37394e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 10:53:01 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj deleted file mode 100644 index 00153d6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.3.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch deleted file mode 100644 index 0bfa3f7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch +++ /dev/null @@ -1,218 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 25 April 2013 02:05:06 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "25 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1k" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib deleted file mode 100644 index 5aecc2e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf= Cjc= Nc= Tr= Ne= -+ Cje= Vjc= Xtb= Rb= Rc= -+ Tf= Xti= Ikr= Bf=50 Fc= -+ Ikf= Br= Mje= Mjc= Vaf= -+ Isc= Ise= Xtf= Vje= Is= -+ Itf= Eg= )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/analysis deleted file mode 100644 index 35318bb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak deleted file mode 100644 index ea673cb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 10:43:17 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.lib deleted file mode 100644 index ee59c22..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6-cache.lib +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:52:43 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# VCCS -# -DEF VCCS G 0 40 Y Y 1 F N -F0 "G" -200 100 50 H V C CNN -F1 "VCCS" -200 -50 50 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -S -100 100 100 -100 0 1 0 N -X + 1 -300 50 200 R 35 35 1 1 P -X - 2 300 50 200 L 35 35 1 1 P -X +c 3 -50 -200 100 U 35 35 1 1 P -X -c 4 50 -200 100 U 35 35 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak deleted file mode 100644 index 6e5ac9b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.bak +++ /dev/null @@ -1,172 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 07:53:26 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.6-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5650 3850 5650 5350 -Wire Wire Line - 5950 4700 5950 4850 -Wire Wire Line - 5950 2800 5950 2650 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 2150 6350 2150 -Wire Wire Line - 5950 4200 5950 4050 -Wire Wire Line - 5650 5350 6350 5350 -Connection ~ 5950 5350 -Wire Wire Line - 5950 5350 5950 5600 -Connection ~ 5950 5450 -Connection ~ 5950 3450 -Connection ~ 5950 4100 -Wire Wire Line - 6350 2150 6350 3300 -Wire Wire Line - 6350 5350 6350 4200 -$Comp -L IPLOT U3 -U 1 1 516C0D28 -P 5950 4450 -F 0 "U3" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0CED -P 5950 3050 -F 0 "U2" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5166C8C4 -P 5950 5450 -F 0 "#FLG01" H 5950 5545 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 5630 30 0000 C CNN - 1 5950 5450 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166C87D -P 5950 5600 -F 0 "#PWR02" H 5950 5600 30 0001 C CNN -F 1 "GND" H 5950 5530 30 0001 C CNN - 1 5950 5600 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166C822 -P 5950 2400 -F 0 "R1" V 6030 2400 50 0000 C CNN -F 1 "4700" V 5950 2400 50 0000 C CNN - 1 5950 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166C7EC -P 5950 5100 -F 0 "R2" V 6030 5100 50 0000 C CNN -F 1 "3300" V 5950 5100 50 0000 C CNN - 1 5950 5100 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "10V" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir deleted file mode 100644 index c9bc6a1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 10:43:13 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U4 0 7 IPLOT -U3 4 1 IPLOT -U2 2 3 IPLOT -U1 2 1 VPLOT8_1 -R1 5 3 4700 -R2 4 0 3300 -v1 5 0 10V -Q1 1 7 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt deleted file mode 100644 index f76426b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 10:43:13 am ist -.include npn.lib - -V_u4 0 7 0 -V_u3 4 1 0 -V_u2 2 3 0 -* Plotting option vplot8_1 -r1 5 3 4700 -r2 4 0 3300 -v1 5 0 10v -q1 2 7 1 npn - -.dc v1 0e-00 10e-00 5e-03 -.plot i(V_u4) -.plot i(V_u3) -.plot i(V_u2) -.plot v(2) v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out deleted file mode 100644 index c87b0a7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 16 april 2013 10:43:13 am ist -.include npn.lib - -V_u4 0 7 0 -V_u3 4 1 0 -V_u2 2 3 0 -* Plotting option vplot8_1 -r1 5 3 4700 -r2 4 0 3300 -v1 5 0 10v -q1 2 7 1 npn - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot i(V_u4) -plot i(V_u3) -plot i(V_u2) -plot v(2) v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro deleted file mode 100644 index 36d0202..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Tuesday 16 April 2013 12:39:39 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj deleted file mode 100644 index 3ace945..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.6.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch deleted file mode 100644 index d3d6988..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/example_3.6.sch +++ /dev/null @@ -1,195 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 10:43:17 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.6-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5650 3950 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CDDBE -P 5650 3950 -F 0 "#FLG01" H 5650 4220 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN - 1 5650 3950 - 0 -1 -1 0 -$EndComp -Connection ~ 5650 3850 -Connection ~ 5700 5350 -Wire Wire Line - 5650 4700 5650 5350 -Wire Wire Line - 5650 3850 5650 4200 -Wire Wire Line - 6350 4200 6350 5350 -Wire Wire Line - 6350 3300 6350 2150 -Connection ~ 5950 4100 -Connection ~ 5950 3450 -Connection ~ 5950 5450 -Wire Wire Line - 5950 5350 5950 5600 -Connection ~ 5950 5350 -Wire Wire Line - 6350 5350 5650 5350 -Wire Wire Line - 5950 4200 5950 4050 -Wire Wire Line - 6350 2150 5950 2150 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 2800 5950 2650 -Wire Wire Line - 5950 4700 5950 4850 -$Comp -L IPLOT U4 -U 1 1 516CDCFB -P 5650 4450 -F 0 "U4" H 5500 4550 50 0000 C CNN -F 1 "IPLOT" H 5800 4550 50 0000 C CNN - 1 5650 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C0D28 -P 5950 4450 -F 0 "U3" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0CED -P 5950 3050 -F 0 "U2" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 5166C8C4 -P 5700 5350 -F 0 "#FLG02" H 5700 5445 30 0001 C CNN -F 1 "PWR_FLAG" H 5700 5530 30 0000 C CNN - 1 5700 5350 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166C87D -P 5950 5600 -F 0 "#PWR03" H 5950 5600 30 0001 C CNN -F 1 "GND" H 5950 5530 30 0001 C CNN - 1 5950 5600 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166C822 -P 5950 2400 -F 0 "R1" V 6030 2400 50 0000 C CNN -F 1 "4700" V 5950 2400 50 0000 C CNN - 1 5950 2400 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 5166C7EC -P 5950 5100 -F 0 "R2" V 6030 5100 50 0000 C CNN -F 1 "3300" V 5950 5100 50 0000 C CNN - 1 5950 5100 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "10V" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/npn.lib deleted file mode 100644 index f84808e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.6/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=1.7 Cjc=7.306p Nc=2 Tr=46.91n Ne=1.307 -+ Cje=22.01p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=411.1p Xti=3 Ikr=0 Bf=400 Fc=.5 -+ Ise=14.34f Br=6.092 Ikf=.2847 Mje=.377 Mjc=.3416 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=3 Itf=.6 -+ Is=14.34f Eg=1.11 )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/analysis deleted file mode 100644 index 35318bb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak deleted file mode 100644 index 1c7c96a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:09:14 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib deleted file mode 100644 index 0acf0b6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:10:59 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak deleted file mode 100644 index ca1bf82..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak +++ /dev/null @@ -1,172 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 08:09:14 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5050 4700 -Connection ~ 5050 3500 -Connection ~ 4500 5050 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C10CC -P 4500 5050 -F 0 "#FLG01" H 4500 5320 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 5280 30 0000 C CNN - 1 4500 5050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C10B9 -P 4450 5350 -F 0 "#PWR02" H 4450 5350 30 0001 C CNN -F 1 "GND" H 4450 5280 30 0001 C CNN - 1 4450 5350 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4450 5350 4500 5350 -Wire Wire Line - 4500 5350 4500 3750 -Wire Wire Line - 4500 3750 4750 3750 -Wire Wire Line - 5050 4550 5050 4850 -Wire Wire Line - 5050 5350 5650 5350 -Wire Wire Line - 5050 3450 5050 3550 -Wire Wire Line - 5050 2850 5050 2950 -Wire Wire Line - 5050 3950 5050 4050 -Wire Wire Line - 5050 2350 5650 2350 -Wire Wire Line - 5650 2350 5650 3200 -Wire Wire Line - 5650 5350 5650 4100 -$Comp -L VPLOT8_1 U3 -U 2 1 516C107A -P 5350 4700 -F 0 "U3" H 5200 4800 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 4800 50 0000 C CNN - 2 5350 4700 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C103D -P 5650 3650 -F 0 "v1" H 5450 3750 60 0000 C CNN -F 1 "DC" H 5450 3600 60 0000 C CNN -F 2 "R1" H 5350 3650 60 0000 C CNN - 1 5650 3650 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C1001 -P 5350 3500 -F 0 "U3" H 5200 3600 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 3600 50 0000 C CNN - 1 5350 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C0FB5 -P 5050 5100 -F 0 "R2" V 5130 5100 50 0000 C CNN -F 1 "R" V 5050 5100 50 0000 C CNN - 1 5050 5100 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0FAB -P 5050 4300 -F 0 "U2" H 4900 4400 50 0000 C CNN -F 1 "IPLOT" H 5200 4400 50 0000 C CNN - 1 5050 4300 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C0F0F -P 5050 3200 -F 0 "U1" H 4900 3300 50 0000 C CNN -F 1 "IPLOT" H 5200 3300 50 0000 C CNN - 1 5050 3200 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516C0F01 -P 5050 2600 -F 0 "R1" V 5130 2600 50 0000 C CNN -F 1 "R" V 5050 2600 50 0000 C CNN - 1 5050 2600 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C0EEC -P 4950 3750 -F 0 "Q1" H 4950 3600 60 0000 R CNN -F 1 "PNP" H 4950 3900 60 0000 R CNN - 1 4950 3750 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir deleted file mode 100644 index 7d111e3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 08:10:56 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 4 6 VPLOT8_1 -v1 3 5 10 -R2 6 3 2000 -U2 6 2 IPLOT -U1 4 1 IPLOT -R1 5 1 1000 -Q1 2 0 4 PNP - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt deleted file mode 100644 index d569e7a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:10:56 pm ist - -* Plotting option vplot8_1 -v1 3 5 10 -r2 6 3 2000 -V_u2 6 2 0 -V_u1 4 1 0 -r1 5 1 1000 -q1 4 0 2 pnp - -.dc v1 0e-00 10e-00 5e-03 -.plot v(4) v(6) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out deleted file mode 100644 index 946ba9b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:10:56 pm ist - -* Plotting option vplot8_1 -v1 3 5 10 -r2 6 3 2000 -V_u2 6 2 0 -V_u1 4 1 0 -r1 5 1 1000 -q1 4 0 2 pnp - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot v(4) v(6) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro deleted file mode 100644 index 7b4f272..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 07:58:37 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj deleted file mode 100644 index b07d448..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.7.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch deleted file mode 100644 index c9780ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch +++ /dev/null @@ -1,173 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 08:10:59 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.7-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5050 4700 -Connection ~ 5050 3500 -Connection ~ 4500 5050 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C10CC -P 4500 5050 -F 0 "#FLG01" H 4500 5320 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 5280 30 0000 C CNN - 1 4500 5050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C10B9 -P 4450 5350 -F 0 "#PWR02" H 4450 5350 30 0001 C CNN -F 1 "GND" H 4450 5280 30 0001 C CNN - 1 4450 5350 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4450 5350 4500 5350 -Wire Wire Line - 4500 5350 4500 3750 -Wire Wire Line - 4500 3750 4750 3750 -Wire Wire Line - 5050 4550 5050 4850 -Wire Wire Line - 5050 5350 5650 5350 -Wire Wire Line - 5050 3450 5050 3550 -Wire Wire Line - 5050 2850 5050 2950 -Wire Wire Line - 5050 3950 5050 4050 -Wire Wire Line - 5050 2350 5650 2350 -Wire Wire Line - 5650 2350 5650 3200 -Wire Wire Line - 5650 5350 5650 4100 -$Comp -L VPLOT8_1 U3 -U 2 1 516C107A -P 5350 4700 -F 0 "U3" H 5200 4800 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 4800 50 0000 C CNN - 2 5350 4700 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C103D -P 5650 3650 -F 0 "v1" H 5450 3750 60 0000 C CNN -F 1 "10" H 5450 3600 60 0000 C CNN -F 2 "R1" H 5350 3650 60 0000 C CNN - 1 5650 3650 - 1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C1001 -P 5350 3500 -F 0 "U3" H 5200 3600 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 3600 50 0000 C CNN - 1 5350 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C0FB5 -P 5050 5100 -F 0 "R2" V 5130 5100 50 0000 C CNN -F 1 "2000" V 5050 5100 50 0000 C CNN - 1 5050 5100 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0FAB -P 5050 4300 -F 0 "U2" H 4900 4400 50 0000 C CNN -F 1 "IPLOT" H 5200 4400 50 0000 C CNN - 1 5050 4300 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C0F0F -P 5050 3200 -F 0 "U1" H 4900 3300 50 0000 C CNN -F 1 "IPLOT" H 5200 3300 50 0000 C CNN - 1 5050 3200 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516C0F01 -P 5050 2600 -F 0 "R1" V 5130 2600 50 0000 C CNN -F 1 "1000" V 5050 2600 50 0000 C CNN - 1 5050 2600 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C0EEC -P 4950 3750 -F 0 "Q1" H 4950 3600 60 0000 R CNN -F 1 "PNP" H 4950 3900 60 0000 R CNN - 1 4950 3750 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/analysis deleted file mode 100644 index 7946c35..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib deleted file mode 100644 index c582dbc..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:58:27 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir deleted file mode 100644 index 073dc21..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir +++ /dev/null @@ -1,16 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 08:58:23 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 3 0 5V -v2 2 0 10V -R1 6 3 100 -U3 1 4 VPLOT8_1 -U2 0 4 IPLOT -U1 1 5 IPLOT -R2 2 5 2000 -Q1 4 6 1 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt deleted file mode 100644 index bf04d00..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.ckt +++ /dev/null @@ -1,16 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:58:23 pm ist - -v1 3 0 5v -v2 2 0 10v -r1 6 3 100 -* Plotting option vplot8_1 -V_u2 0 4 0 -V_u1 1 5 0 -r2 2 5 2000 -q1 1 6 4 npn - -.dc v1 0e-00 5e-00 5e-03 -.plot v(1) v(4) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out deleted file mode 100644 index 4fa87ff..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.cir.out +++ /dev/null @@ -1,21 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:58:23 pm ist - -v1 3 0 5v -v2 2 0 10v -r1 6 3 100 -* Plotting option vplot8_1 -V_u2 0 4 0 -V_u1 1 5 0 -r2 2 5 2000 -q1 1 6 4 npn - -.dc v1 0e-00 5e-00 5e-03 - -* Control Statements -.control -run -plot v(1) v(4) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.pro deleted file mode 100644 index 829ea15..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 08:14:03 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.proj deleted file mode 100644 index 2797ff1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.8.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.sch deleted file mode 100644 index f8c5751..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.8/example_3.8.sch +++ /dev/null @@ -1,181 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 08:58:27 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5500 4450 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C1C70 -P 5500 4450 -F 0 "#FLG01" H 5500 4720 30 0001 C CNN -F 1 "PWR_FLAG" H 5500 4680 30 0000 C CNN - 1 5500 4450 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C1C57 -P 5500 4500 -F 0 "#PWR02" H 5500 4500 30 0001 C CNN -F 1 "GND" H 5500 4430 30 0001 C CNN - 1 5500 4500 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5500 4500 5500 4000 -Connection ~ 5500 4350 -Wire Wire Line - 4600 4350 6400 4350 -Wire Wire Line - 6400 2150 6400 1800 -Wire Wire Line - 6400 1800 5500 1800 -Connection ~ 5500 3450 -Connection ~ 5500 2950 -Wire Wire Line - 5500 2300 5500 2400 -Wire Wire Line - 5500 3000 5500 2900 -Wire Wire Line - 5500 3400 5500 3500 -Wire Wire Line - 5200 3200 5100 3200 -Wire Wire Line - 4600 4350 4600 4100 -Wire Wire Line - 6400 4350 6400 3050 -$Comp -L DC v1 -U 1 1 516C1BAA -P 4600 3650 -F 0 "v1" H 4400 3750 60 0000 C CNN -F 1 "5V" H 4400 3600 60 0000 C CNN -F 2 "R1" H 4300 3650 60 0000 C CNN - 1 4600 3650 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 516C1B93 -P 6400 2600 -F 0 "v2" H 6200 2700 60 0000 C CNN -F 1 "10V" H 6200 2550 60 0000 C CNN -F 2 "R1" H 6100 2600 60 0000 C CNN - 1 6400 2600 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C130D -P 4850 3200 -F 0 "R1" V 4930 3200 50 0000 C CNN -F 1 "100" V 4850 3200 50 0000 C CNN - 1 4850 3200 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 2 1 516C12F0 -P 5800 3450 -F 0 "U3" H 5650 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5950 3550 50 0000 C CNN - 2 5800 3450 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C12D2 -P 5500 3750 -F 0 "U2" H 5350 3850 50 0000 C CNN -F 1 "IPLOT" H 5650 3850 50 0000 C CNN - 1 5500 3750 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C128C -P 5800 2950 -F 0 "U3" H 5650 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 5950 3050 50 0000 C CNN - 1 5800 2950 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C1282 -P 5500 2650 -F 0 "U1" H 5350 2750 50 0000 C CNN -F 1 "IPLOT" H 5650 2750 50 0000 C CNN - 1 5500 2650 - 0 -1 -1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C125F -P 5500 2050 -F 0 "R2" V 5580 2050 50 0000 C CNN -F 1 "2000" V 5500 2050 50 0000 C CNN - 1 5500 2050 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 516C1252 -P 5400 3200 -F 0 "Q1" H 5400 3050 50 0000 R CNN -F 1 "NPN" H 5400 3350 50 0000 R CNN - 1 5400 3200 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/analysis deleted file mode 100644 index 7946c35..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak deleted file mode 100644 index ab4ac6a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 09:47:58 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.lib deleted file mode 100644 index 19bc1ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 01:19:52 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.bak deleted file mode 100644 index 9b2890f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.bak +++ /dev/null @@ -1,200 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 09:47:58 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 4800 3600 4150 3600 -Wire Wire Line - 6500 2900 6500 2050 -Wire Wire Line - 6500 2050 5100 2050 -Wire Wire Line - 5100 5100 5100 5250 -Wire Wire Line - 5100 3800 5100 3950 -Wire Wire Line - 5100 3250 5100 3400 -Wire Wire Line - 5100 2650 5100 2750 -Wire Wire Line - 5100 4450 5100 4600 -Wire Wire Line - 5100 2050 5100 2150 -Connection ~ 5100 3350 -Connection ~ 5100 3900 -Wire Wire Line - 3650 3600 3650 5100 -Connection ~ 5100 2050 -Connection ~ 5100 2050 -Connection ~ 5100 2050 -Wire Wire Line - 6500 3800 6500 5250 -Wire Wire Line - 6500 5250 5100 5250 -Connection ~ 4750 3600 -Connection ~ 3650 3600 -Connection ~ 4150 3600 -Connection ~ 3950 3600 -Connection ~ 4800 3600 -Connection ~ 3650 4850 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C1E89 -P 3650 4850 -F 0 "#FLG01" H 3650 5120 30 0001 C CNN -F 1 "PWR_FLAG" H 3650 5080 30 0000 C CNN - 1 3650 4850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C1EFD -P 4750 3300 -F 0 "U2" H 4600 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 4900 3400 50 0000 C CNN - 1 4750 3300 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C1E7B -P 3650 5100 -F 0 "#PWR02" H 3650 5100 30 0001 C CNN -F 1 "GND" H 3650 5030 30 0001 C CNN - 1 3650 5100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C1E56 -P 3900 3600 -F 0 "R1" V 3980 3600 50 0000 C CNN -F 1 "10000" V 3900 3600 50 0000 C CNN - 1 3900 3600 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516C1E37 -P 5400 3900 -F 0 "U2" H 5250 4000 50 0000 C CNN -F 1 "VPLOT8_1" H 5550 4000 50 0000 C CNN - 3 5400 3900 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C1E04 -P 5100 4850 -F 0 "R3" V 5180 4850 50 0000 C CNN -F 1 "10000" V 5100 4850 50 0000 C CNN - 1 5100 4850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C1DF8 -P 5100 4200 -F 0 "U4" H 4950 4300 50 0000 C CNN -F 1 "IPLOT" H 5250 4300 50 0000 C CNN - 1 5100 4200 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C1DCB -P 5400 3350 -F 0 "U2" H 5250 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 5550 3450 50 0000 C CNN - 2 5400 3350 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C1DBD -P 6500 3350 -F 0 "v1" H 6300 3450 60 0000 C CNN -F 1 "5" H 6300 3300 60 0000 C CNN -F 2 "R1" H 6200 3350 60 0000 C CNN - 1 6500 3350 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C1DAD -P 5100 3000 -F 0 "U3" H 4950 3100 50 0000 C CNN -F 1 "IPLOT" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C1D7F -P 5100 2400 -F 0 "R2" V 5180 2400 50 0000 C CNN -F 1 "1000" V 5100 2400 50 0000 C CNN - 1 5100 2400 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C1D57 -P 5000 3600 -F 0 "Q1" H 5000 3450 60 0000 R CNN -F 1 "PNP" H 5000 3750 60 0000 R CNN - 1 5000 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir deleted file mode 100644 index 484dfb8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 01:19:49 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v2 0 4 5 -U2 2 6 3 VPLOT8_1 -R1 2 0 10000 -R3 5 4 10000 -U4 3 5 IPLOT -v1 7 0 5 -U3 8 6 IPLOT -R2 7 8 1000 -Q1 3 2 6 PNP - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt deleted file mode 100644 index 3c4d3e8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:19:49 pm ist - -v2 0 4 5 -* Plotting option vplot8_1 -r1 2 0 10000 -r3 5 4 10000 -V_u4 3 5 0 -v1 7 0 5 -V_u3 8 6 0 -r2 7 8 1000 -q1 6 2 3 pnp - -.dc v1 0e-00 5e-00 5e-03 -.plot v(2) v(6) v(3) -.plot i(V_u4) -.plot i(V_u3) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out deleted file mode 100644 index 00c3815..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 01:19:49 pm ist - -v2 0 4 5 -* Plotting option vplot8_1 -r1 2 0 10000 -r3 5 4 10000 -V_u4 3 5 0 -v1 7 0 5 -V_u3 8 6 0 -r2 7 8 1000 -q1 6 2 3 pnp - -.dc v1 0e-00 5e-00 5e-03 - -* Control Statements -.control -run -plot v(2) v(6) v(3) -plot i(V_u4) -plot i(V_u3) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro deleted file mode 100644 index 50bea06..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 09:01:17 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj deleted file mode 100644 index cf438f1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.9.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch deleted file mode 100644 index da988b4..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.9/example_3.9.sch +++ /dev/null @@ -1,221 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 01:19:52 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.9-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L GND #PWR01 -U 1 1 51909AF0 -P 6700 3550 -F 0 "#PWR01" H 6700 3550 30 0001 C CNN -F 1 "GND" H 6700 3480 30 0001 C CNN - 1 6700 3550 - 1 0 0 -1 -$EndComp -Connection ~ 6500 3550 -Wire Wire Line - 6500 3550 6700 3550 -Wire Wire Line - 4800 3600 4150 3600 -Wire Wire Line - 6500 2050 5100 2050 -Wire Wire Line - 5100 5100 5100 5250 -Wire Wire Line - 5100 3800 5100 3950 -Wire Wire Line - 5100 3250 5100 3400 -Wire Wire Line - 5100 2650 5100 2750 -Wire Wire Line - 5100 4450 5100 4600 -Wire Wire Line - 5100 2050 5100 2150 -Connection ~ 5100 3350 -Connection ~ 5100 3900 -Wire Wire Line - 3650 3600 3650 5100 -Connection ~ 5100 2050 -Connection ~ 5100 2050 -Connection ~ 5100 2050 -Wire Wire Line - 5100 5250 6500 5250 -Connection ~ 4750 3600 -Connection ~ 3650 3600 -Connection ~ 4150 3600 -Connection ~ 3950 3600 -Connection ~ 4800 3600 -Connection ~ 3650 4850 -Wire Wire Line - 6500 2950 6500 4350 -$Comp -L DC v2 -U 1 1 51909ACB -P 6500 4800 -F 0 "v2" H 6300 4900 60 0000 C CNN -F 1 "5" H 6300 4750 60 0000 C CNN -F 2 "R1" H 6200 4800 60 0000 C CNN - 1 6500 4800 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516C1E89 -P 3650 4850 -F 0 "#FLG02" H 3650 5120 30 0001 C CNN -F 1 "PWR_FLAG" H 3650 5080 30 0000 C CNN - 1 3650 4850 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516C1EFD -P 4750 3300 -F 0 "U2" H 4600 3400 50 0000 C CNN -F 1 "VPLOT8_1" H 4900 3400 50 0000 C CNN - 1 4750 3300 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516C1E7B -P 3650 5100 -F 0 "#PWR03" H 3650 5100 30 0001 C CNN -F 1 "GND" H 3650 5030 30 0001 C CNN - 1 3650 5100 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516C1E56 -P 3900 3600 -F 0 "R1" V 3980 3600 50 0000 C CNN -F 1 "10000" V 3900 3600 50 0000 C CNN - 1 3900 3600 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516C1E37 -P 5400 3900 -F 0 "U2" H 5250 4000 50 0000 C CNN -F 1 "VPLOT8_1" H 5550 4000 50 0000 C CNN - 3 5400 3900 - 0 1 1 0 -$EndComp -$Comp -L R R3 -U 1 1 516C1E04 -P 5100 4850 -F 0 "R3" V 5180 4850 50 0000 C CNN -F 1 "10000" V 5100 4850 50 0000 C CNN - 1 5100 4850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516C1DF8 -P 5100 4200 -F 0 "U4" H 4950 4300 50 0000 C CNN -F 1 "IPLOT" H 5250 4300 50 0000 C CNN - 1 5100 4200 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516C1DCB -P 5400 3350 -F 0 "U2" H 5250 3450 50 0000 C CNN -F 1 "VPLOT8_1" H 5550 3450 50 0000 C CNN - 2 5400 3350 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C1DBD -P 6500 2500 -F 0 "v1" H 6300 2600 60 0000 C CNN -F 1 "5" H 6300 2450 60 0000 C CNN -F 2 "R1" H 6200 2500 60 0000 C CNN - 1 6500 2500 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516C1DAD -P 5100 3000 -F 0 "U3" H 4950 3100 50 0000 C CNN -F 1 "IPLOT" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C1D7F -P 5100 2400 -F 0 "R2" V 5180 2400 50 0000 C CNN -F 1 "1000" V 5100 2400 50 0000 C CNN - 1 5100 2400 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C1D57 -P 5000 3600 -F 0 "Q1" H 5000 3450 60 0000 R CNN -F 1 "PNP" H 5000 3750 60 0000 R CNN - 1 5000 3600 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/npn.lib deleted file mode 100644 index caa3cb7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 -+ Is=6.734 Eg=1.11 )
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