diff options
Diffstat (limited to 'OSCAD/Examples/sedra_smith/chapter_2')
55 files changed, 0 insertions, 3339 deletions
diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/1n4007.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/1n4007.lib deleted file mode 100644 index 89d421d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/1n4007.lib +++ /dev/null @@ -1,2 +0,0 @@ -.model 1n4007 D( IS=7.02767e-09 RS=0.0341512 N=1.80803 EG=1.05743 XTI=5 BV=1000 IBV=5e-08 CJO=1E-11 -+VJ=0.7 M=0.5 FC=0.5 TT=1E-07 KF=0 AF=1 ) diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/analysis deleted file mode 100644 index 09ae223..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-03 1e-01 0e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.bak deleted file mode 100644 index a47b560..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.bak +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 11:21:47 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.lib deleted file mode 100644 index 6d1cabe..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1-cache.lib +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 11:52:16 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak deleted file mode 100644 index 3314c60..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.bak +++ /dev/null @@ -1,133 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 14 May 2013 11:21:47 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:example_2.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "14 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5750 5050 -Wire Wire Line - 5550 3150 5650 3150 -Wire Wire Line - 5050 4550 5050 5050 -Wire Wire Line - 6500 4900 6500 5050 -Wire Wire Line - 6050 3150 6500 3150 -Wire Wire Line - 5750 5050 5750 5800 -Connection ~ 5750 5550 -Connection ~ 6500 3150 -Wire Wire Line - 6500 3150 6500 3350 -Wire Wire Line - 6500 3850 6500 4000 -Wire Wire Line - 5050 3150 5050 3650 -Wire Wire Line - 6500 5050 5050 5050 -$Comp -L DC v2 -U 1 1 516BA020 -P 6500 4450 -F 0 "v2" H 6300 4550 60 0000 C CNN -F 1 "DC" H 6300 4400 60 0000 C CNN -F 2 "R1" H 6200 4450 60 0000 C CNN - 1 6500 4450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5167CC3A -P 5750 5550 -F 0 "#FLG01" H 5750 5645 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 5730 30 0000 C CNN - 1 5750 5550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5167CC15 -P 5750 5800 -F 0 "#PWR02" H 5750 5800 30 0001 C CNN -F 1 "GND" H 5750 5730 30 0001 C CNN - 1 5750 5800 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 5166A34A -P 6500 3600 -F 0 "U1" H 6350 3700 50 0000 C CNN -F 1 "IPLOT" H 6650 3700 50 0000 C CNN - 1 6500 3600 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166A210 -P 5850 3150 -F 0 "D1" H 5850 3250 40 0000 C CNN -F 1 "DIODE" H 5850 3050 40 0000 C CNN - 1 5850 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166A1EB -P 5300 3150 -F 0 "R1" V 5380 3150 50 0000 C CNN -F 1 "100" V 5300 3150 50 0000 C CNN - 1 5300 3150 - 0 -1 -1 0 -$EndComp -$Comp -L SINE v1 -U 1 1 5166A1AC -P 5050 4100 -F 0 "v1" H 4850 4200 60 0000 C CNN -F 1 "SINE" H 4850 4050 60 0000 C CNN -F 2 "R1" H 4750 4100 60 0000 C CNN - 1 5050 4100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd deleted file mode 100644 index bf4bd89..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.brd +++ /dev/null @@ -1,172 +0,0 @@ -PCBNEW-BOARD Version 1 date Friday 12 April 2013 02:43:29 PM IST - -# Created by Pcbnew(2012-apr-16-27)-stable - -$GENERAL -encoding utf-8 -LayerCount 2 -Ly 1FFF8001 -EnabledLayers 1FFF8001 -Links 0 -NoConn 0 -Di 40424 25540 76751 39450 -Ndraw 0 -Ntrack 0 -Nzone 0 -BoardThickness 630 -Nmodule 2 -Nnets 4 -$EndGENERAL - -$SHEETDESCR -Sheet A4 11700 8267 -Title "" -Date "12 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndSHEETDESCR - -$SETUP -InternalUnit 0.000100 INCH -Layers 2 -Layer[0] Back signal -Layer[15] Front signal -TrackWidth 80 -TrackClearence 100 -ZoneClearence 200 -TrackMinWidth 80 -DrawSegmWidth 150 -EdgeSegmWidth 150 -ViaSize 350 -ViaDrill 250 -ViaMinSize 350 -ViaMinDrill 200 -MicroViaSize 200 -MicroViaDrill 50 -MicroViasAllowed 0 -MicroViaMinSize 200 -MicroViaMinDrill 50 -TextPcbWidth 120 -TextPcbSize 600 800 -EdgeModWidth 150 -TextModSize 600 600 -TextModWidth 120 -PadSize 600 600 -PadDrill 320 -Pad2MaskClearance 100 -AuxiliaryAxisOrg 0 0 -PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory "")) -$EndSETUP - -$EQUIPOT -Na 0 "" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 1 "GND" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 2 "N-000018" -St ~ -$EndEQUIPOT -$EQUIPOT -Na 3 "N-000019" -St ~ -$EndEQUIPOT -$NCLASS -Name "Default" -Desc "This is the default net class." -Clearance 100 -TrackWidth 80 -ViaDia 350 -ViaDrill 250 -uViaDia 200 -uViaDrill 50 -AddNet "" -AddNet "GND" -AddNet "N-000018" -AddNet "N-000019" -$EndNCLASS -$MODULE 1pin -Po 41500 38000 0 15 00200000 5167CFD9 ~~ -Li 1pin -Cd module 1 pin (ou trou mecanique de percage) -Kw DEV -Sc 5167CFD9 -AR 1pin -Op 0 0 0 -T0 0 -1200 400 400 0 100 N V 21 N "1PIN" -T1 0 1100 400 400 0 100 N I 21 N "P***" -DC 0 0 0 -900 150 21 -$PAD -Sh "1" C 1600 1600 0 0 0 -Dr 1200 0 0 -At STD N 00E0FFFF -Ne 0 "" -Po 0 0 -$EndPAD -$EndMODULE 1pin -$MODULE 3PIN_6mm -Po 68000 29000 0 15 00200000 5167CFEC ~~ -Li 3PIN_6mm -Cd module 2 pin (trou 6 mm) -Kw DEV -Sc 5167CFEC -AR -Op 0 0 0 -T0 4000 -3000 600 600 0 120 N V 21 N "K1" -T1 -3000 -3000 600 600 0 120 N V 21 N "CONN_3" -DS -8500 -2500 8500 -2500 150 21 -DS 8500 -2500 8500 2500 150 21 -DS 8500 2500 -8500 2500 150 21 -DS -8500 2500 -8500 -2500 150 21 -$PAD -Sh "1" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 2 "N-000018" -Po -5900 0 -$EndPAD -$PAD -Sh "3" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 3 "N-000019" -Po 5900 0 -$EndPAD -$PAD -Sh "2" C 4000 4000 0 0 0 -Dr 2400 0 0 -At STD N 00E0FFFF -Ne 1 "GND" -Po 0 0 -$EndPAD -$SHAPE3D -Na "device/douille_4mm(black).wrl" -Sc 1.800000 1.800000 1.800000 -Of 0.000000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$SHAPE3D -Na "device/douille_4mm(red).wrl" -Sc 1.800000 1.800000 1.800000 -Of -0.590000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$SHAPE3D -Na "device/douille_4mm(green).wrl" -Sc 1.800000 1.800000 1.800000 -Of 0.590000 0.000000 0.000000 -Ro 0.000000 0.000000 0.000000 -$EndSHAPE3D -$EndMODULE 3PIN_6mm -$TRACK -$EndTRACK -$ZONE -$EndZONE -$EndBOARD diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir deleted file mode 100644 index 16861f7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 12:08:03 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v2 1 0 DC -U1 3 1 IPLOT -D1 5 3 DIODE -R1 2 5 100 -v1 2 0 SINE - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt deleted file mode 100644 index 6d02b34..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.ckt +++ /dev/null @@ -1,11 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 12:08:03 pm ist - -v2 1 0 dc 12 -V_u1 3 1 0 -d1 5 3 diode -r1 2 5 100 -v1 2 0 sine(0 24 50 0 0) - -.tran 10e-03 1e-01 0e-00 -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out deleted file mode 100644 index 52cc067..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cir.out +++ /dev/null @@ -1,16 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 12:08:03 pm ist - -v2 1 0 dc 12 -V_u1 3 1 0 -d1 5 3 diode -r1 2 5 100 -v1 2 0 sine(0 24 50 0 0) - -.tran 10e-03 1e-01 0e-00 - -* Control Statements -.control -run -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp deleted file mode 100644 index 779ff51..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.cmp +++ /dev/null @@ -1,38 +0,0 @@ -Cmp-Mod V01 Created by CvPcb (2012-apr-16-27)-stable date = Friday 12 April 2013 02:41:23 PM IST - -BeginCmp -TimeStamp = /5166A210; -Reference = D1; -ValeurCmp = DIODE; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5166A1EB; -Reference = R1; -ValeurCmp = 100; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5166A34A; -Reference = U1; -ValeurCmp = IPLOT; -IdModule = ; -EndCmp - -BeginCmp -TimeStamp = /5166A1AC; -Reference = v1; -ValeurCmp = SINE; -IdModule = R1; -EndCmp - -BeginCmp -TimeStamp = /5166A26E; -Reference = v2; -ValeurCmp = 12V; -IdModule = R1; -EndCmp - -EndListe diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net deleted file mode 100644 index eeea8db..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.net +++ /dev/null @@ -1,44 +0,0 @@ -# EESchema Netlist Version 1.1 created Friday 12 April 2013 02:41:23 PM IST -( - ( /5166A210 $noname$ D1 DIODE - ( 1 N-000002 ) - ( 2 N-000004 ) - ) - ( /5166A1EB $noname$ R1 100 - ( 1 N-000001 ) - ( 2 N-000002 ) - ) - ( /5166A34A $noname$ U1 IPLOT - ( 1 N-000004 ) - ( 2 N-000003 ) - ) - ( /5166A1AC R1 v1 SINE - ( 1 N-000001 ) - ( 2 GND ) - ) - ( /5166A26E R1 v2 12V - ( 1 N-000003 ) - ( 2 GND ) - ) -) -* -{ Allowed footprints by component: -$component D1 - D? - S* -$endlist -$component R1 - R? - SM0603 - SM0805 - R?-* - SM1206 -$endlist -$component v1 - 1_pin -$endlist -$component v2 - 1_pin -$endlist -$endfootprintlist -} diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro deleted file mode 100644 index f5826c2..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Thursday 11 April 2013 05:12:20 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj deleted file mode 100644 index 3cb5076..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.1.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch deleted file mode 100644 index dfa5e1d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.1/example_2.1.sch +++ /dev/null @@ -1,133 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 14 May 2013 11:52:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:example_2.1-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "14 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5750 5050 -Wire Wire Line - 5550 3150 5650 3150 -Wire Wire Line - 5050 4550 5050 5050 -Wire Wire Line - 6500 4900 6500 5050 -Wire Wire Line - 6050 3150 6500 3150 -Wire Wire Line - 5750 5050 5750 5800 -Connection ~ 5750 5550 -Connection ~ 6500 3150 -Wire Wire Line - 6500 3150 6500 3350 -Wire Wire Line - 6500 3850 6500 4000 -Wire Wire Line - 5050 3150 5050 3650 -Wire Wire Line - 6500 5050 5050 5050 -$Comp -L DC v2 -U 1 1 516BA020 -P 6500 4450 -F 0 "v2" H 6300 4550 60 0000 C CNN -F 1 "DC" H 6300 4400 60 0000 C CNN -F 2 "R1" H 6200 4450 60 0000 C CNN - 1 6500 4450 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5167CC3A -P 5750 5550 -F 0 "#FLG01" H 5750 5645 30 0001 C CNN -F 1 "PWR_FLAG" H 5750 5730 30 0000 C CNN - 1 5750 5550 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5167CC15 -P 5750 5800 -F 0 "#PWR02" H 5750 5800 30 0001 C CNN -F 1 "GND" H 5750 5730 30 0001 C CNN - 1 5750 5800 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 5166A34A -P 6500 3600 -F 0 "U1" H 6350 3700 50 0000 C CNN -F 1 "IPLOT" H 6650 3700 50 0000 C CNN - 1 6500 3600 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166A210 -P 5850 3150 -F 0 "D1" H 5850 3250 40 0000 C CNN -F 1 "DIODE" H 5850 3050 40 0000 C CNN - 1 5850 3150 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5166A1EB -P 5300 3150 -F 0 "R1" V 5380 3150 50 0000 C CNN -F 1 "100" V 5300 3150 50 0000 C CNN - 1 5300 3150 - 0 -1 -1 0 -$EndComp -$Comp -L SINE v1 -U 1 1 5166A1AC -P 5050 4100 -F 0 "v1" H 4850 4200 60 0000 C CNN -F 1 "SINE" H 4850 4050 60 0000 C CNN -F 2 "R1" H 4750 4100 60 0000 C CNN - 1 5050 4100 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/analysis deleted file mode 100644 index 403e10c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v2 0e-00 10e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.bak deleted file mode 100644 index fc013c5..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.bak +++ /dev/null @@ -1,90 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Sunday 14 April 2013 04:43:15 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 95 30 H I C CNN -F1 "PWR_FLAG" 0 180 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* - SM1206 -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.lib deleted file mode 100644 index aea3592..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2-cache.lib +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 12:54:28 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.bak deleted file mode 100644 index 6ce76aa..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.bak +++ /dev/null @@ -1,162 +0,0 @@ -EESchema Schematic File Version 2 date Sunday 14 April 2013 04:43:15 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.2-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "14 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PWR_FLAG #FLG01 -U 1 1 516A8F23 -P 4150 6650 -F 0 "#FLG01" H 4150 6745 30 0001 C CNN -F 1 "PWR_FLAG" H 4150 6830 30 0000 C CNN - 1 4150 6650 - 0 1 1 0 -$EndComp -Connection ~ 4150 6650 -Connection ~ 6350 4000 -Wire Wire Line - 6350 3350 6350 3150 -Connection ~ 4150 5200 -Wire Wire Line - 6350 5200 4150 5200 -Wire Wire Line - 4800 3150 4150 3150 -Wire Wire Line - 4150 5350 4150 4650 -Wire Wire Line - 6350 3150 5700 3150 -Wire Wire Line - 6350 4650 6350 4800 -Wire Wire Line - 4150 5750 4150 6000 -Wire Wire Line - 6350 3850 6350 4150 -Wire Wire Line - 4150 3150 4150 4150 -Wire Wire Line - 4150 6850 4150 6500 -$Comp -L GND #PWR02 -U 1 1 5167DAB9 -P 4150 6850 -F 0 "#PWR02" H 4150 6850 30 0001 C CNN -F 1 "GND" H 4150 6780 30 0001 C CNN - 1 4150 6850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 5167DA8B -P 4150 6250 -F 0 "U1" H 4000 6350 50 0000 C CNN -F 1 "IPLOT" H 4300 6350 50 0000 C CNN - 1 4150 6250 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 5167D9D2 -P 6350 3600 -F 0 "U2" H 6200 3700 50 0000 C CNN -F 1 "IPLOT" H 6500 3700 50 0000 C CNN - 1 6350 3600 - 0 1 1 0 -$EndComp -$Comp -L DIODE D2 -U 1 1 5167D956 -P 6350 5000 -F 0 "D2" H 6350 5100 40 0000 C CNN -F 1 "DIODE" H 6350 4900 40 0000 C CNN - 1 6350 5000 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 5167D912 -P 5250 3150 -F 0 "v1" H 5050 3250 60 0000 C CNN -F 1 "10V" H 5050 3100 60 0000 C CNN -F 2 "R1" H 4950 3150 60 0000 C CNN - 1 5250 3150 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5167D8E5 -P 6350 4400 -F 0 "R2" V 6430 4400 50 0000 C CNN -F 1 "10k" V 6350 4400 50 0000 C CNN - 1 6350 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5167D8B8 -P 4150 4400 -F 0 "R1" V 4230 4400 50 0000 C CNN -F 1 "5k" V 4150 4400 50 0000 C CNN - 1 4150 4400 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D1 -U 1 1 5167D869 -P 4150 5550 -F 0 "D1" H 4150 5650 40 0000 C CNN -F 1 "DIODE" H 4150 5450 40 0000 C CNN - 1 4150 5550 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir deleted file mode 100644 index a8ccf76..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 12:54:07 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 6 VPLOT8_1 -v2 1 0 10V -v1 0 4 10V -U1 5 0 IPLOT -U2 1 7 IPLOT -D2 6 3 DIODE -R2 7 6 5k -R1 4 3 10k -D1 5 3 DIODE - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.ckt deleted file mode 100644 index ec3f080..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:54:07 pm ist - -* Plotting option vplot8_1 -v2 1 0 10v -v1 0 4 10v -V_u1 5 0 0 -V_u2 1 7 0 -d2 6 3 diode -r2 7 6 5k -r1 4 3 10k -d1 5 3 diode - -.dc v2 0e-00 10e-00 1e-00 -.plot v(6) -.plot i(V_u1) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.out deleted file mode 100644 index b89d0e8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:54:07 pm ist - -* Plotting option vplot8_1 -v2 1 0 10v -v1 0 4 10v -V_u1 5 0 0 -V_u2 1 7 0 -d2 6 3 diode -r2 7 6 5k -r1 4 3 10k -d1 5 3 diode - -.dc v2 0e-00 10e-00 1e-00 - -* Control Statements -.control -run -plot v(6) -plot i(V_u1) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.pro deleted file mode 100644 index 49fe832..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 13 May 2013 12:52:59 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.proj deleted file mode 100644 index 049873b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.2.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.sch deleted file mode 100644 index de929d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.2/example_2.2.sch +++ /dev/null @@ -1,195 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 12:54:28 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.2-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 6650 4750 -$Comp -L VPLOT8_1 U3 -U 1 1 519094DB -P 6650 4450 -F 0 "U3" H 6500 4550 50 0000 C CNN -F 1 "VPLOT8_1" H 6800 4550 50 0000 C CNN - 1 6650 4450 - 1 0 0 -1 -$EndComp -Connection ~ 6350 4750 -Wire Wire Line - 6350 4750 6650 4750 -Wire Wire Line - 5050 3150 5450 3150 -Wire Wire Line - 4150 6850 4150 6500 -Wire Wire Line - 4150 3150 4150 4150 -Wire Wire Line - 6350 3850 6350 4150 -Wire Wire Line - 4150 5750 4150 6000 -Wire Wire Line - 6350 4650 6350 4800 -Wire Wire Line - 4150 5350 4150 4650 -Wire Wire Line - 6350 5200 4150 5200 -Connection ~ 4150 5200 -Wire Wire Line - 6350 3350 6350 3150 -Connection ~ 6350 4000 -Connection ~ 4150 6650 -Wire Wire Line - 5250 3150 5250 3300 -Connection ~ 5250 3150 -$Comp -L GND #PWR01 -U 1 1 51909464 -P 5250 3300 -F 0 "#PWR01" H 5250 3300 30 0001 C CNN -F 1 "GND" H 5250 3230 30 0001 C CNN - 1 5250 3300 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 51909454 -P 5900 3150 -F 0 "v2" H 5700 3250 60 0000 C CNN -F 1 "10V" H 5700 3100 60 0000 C CNN -F 2 "R1" H 5600 3150 60 0000 C CNN - 1 5900 3150 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 5167D912 -P 4600 3150 -F 0 "v1" H 4400 3250 60 0000 C CNN -F 1 "10V" H 4400 3100 60 0000 C CNN -F 2 "R1" H 4300 3150 60 0000 C CNN - 1 4600 3150 - 0 1 1 0 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516A8F23 -P 4150 6650 -F 0 "#FLG02" H 4150 6745 30 0001 C CNN -F 1 "PWR_FLAG" H 4150 6830 30 0000 C CNN - 1 4150 6650 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5167DAB9 -P 4150 6850 -F 0 "#PWR03" H 4150 6850 30 0001 C CNN -F 1 "GND" H 4150 6780 30 0001 C CNN - 1 4150 6850 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 5167DA8B -P 4150 6250 -F 0 "U1" H 4000 6350 50 0000 C CNN -F 1 "IPLOT" H 4300 6350 50 0000 C CNN - 1 4150 6250 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 5167D9D2 -P 6350 3600 -F 0 "U2" H 6200 3700 50 0000 C CNN -F 1 "IPLOT" H 6500 3700 50 0000 C CNN - 1 6350 3600 - 0 1 1 0 -$EndComp -$Comp -L DIODE D2 -U 1 1 5167D956 -P 6350 5000 -F 0 "D2" H 6350 5100 40 0000 C CNN -F 1 "DIODE" H 6350 4900 40 0000 C CNN - 1 6350 5000 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 5167D8E5 -P 6350 4400 -F 0 "R2" V 6430 4400 50 0000 C CNN -F 1 "5k" V 6350 4400 50 0000 C CNN - 1 6350 4400 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 5167D8B8 -P 4150 4400 -F 0 "R1" V 4230 4400 50 0000 C CNN -F 1 "10k" V 4150 4400 50 0000 C CNN - 1 4150 4400 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D1 -U 1 1 5167D869 -P 4150 5550 -F 0 "D1" H 4150 5650 40 0000 C CNN -F 1 "DIODE" H 4150 5450 40 0000 C CNN - 1 4150 5550 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/analysis deleted file mode 100644 index f481193..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 50e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/diode.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/diode.lib deleted file mode 100644 index f4b7c8a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/diode.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model diode D( Vj=.65 Nbvl=14.976 Cjo=175p Rs=.20 Isr=1.859n -+ Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u -+ Bv=8.1 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m -+ Is=880.5E-18 Xti=3 Ibvl=1.9556m )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak deleted file mode 100644 index f7ad596..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.bak +++ /dev/null @@ -1,105 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 12 April 2013 03:08:39 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* - SM1206 -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8 -# -DEF vplot8 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -300 0 200 R 40 40 1 1 O -X - 9 300 0 200 L 40 40 1 1 O -X + 2 -300 0 200 R 40 40 2 1 O -X - 10 300 0 200 L 40 40 2 1 O -X + 3 -300 0 200 R 40 40 3 1 O -X - 11 300 0 200 L 40 40 3 1 O -X + 4 -300 0 200 R 40 40 4 1 O -X - 12 300 0 200 L 40 40 4 1 O -X + 5 -300 0 200 R 40 40 5 1 O -X - 13 300 0 200 L 40 40 5 1 O -X + 6 -300 0 200 R 40 40 6 1 O -X - 14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.lib deleted file mode 100644 index 1321f82..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4-cache.lib +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 13 May 2013 12:59:04 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.bak deleted file mode 100644 index 132334d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.bak +++ /dev/null @@ -1,133 +0,0 @@ -EESchema Schematic File Version 2 date Friday 12 April 2013 03:08:39 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "12 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 5700 3600 5500 3600 -Wire Wire Line - 6100 3650 6100 4100 -Connection ~ 5500 4100 -Wire Wire Line - 6100 4100 4200 4100 -Wire Wire Line - 4650 2850 4200 2850 -Wire Wire Line - 4200 2850 4200 3200 -Wire Wire Line - 5700 3200 5700 2850 -Wire Wire Line - 5150 2850 6100 2850 -Connection ~ 5700 2850 -Wire Wire Line - 6100 2850 6100 3050 -Wire Wire Line - 5200 4100 5200 4650 -Connection ~ 5200 4100 -$Comp -L IPLOT U2 -U 1 1 5167D5E8 -P 5500 3850 -F 0 "U2" H 5350 3950 50 0000 C CNN -F 1 "IPLOT" H 5650 3950 50 0000 C CNN - 1 5500 3850 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR01 -U 1 1 5166ABF9 -P 5200 4650 -F 0 "#PWR01" H 5200 4650 30 0001 C CNN -F 1 "GND" H 5200 4580 30 0001 C CNN - 1 5200 4650 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8 U1 -U 1 1 5166A97D -P 6100 3350 -F 0 "U1" H 5950 3450 50 0000 C CNN -F 1 "VPLOT8" H 6250 3450 50 0000 C CNN - 1 6100 3350 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166A924 -P 5700 3400 -F 0 "D1" H 5700 3500 40 0000 C CNN -F 1 "DIODE" H 5700 3300 40 0000 C CNN - 1 5700 3400 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 5166A8EF -P 4900 2850 -F 0 "R1" V 4980 2850 50 0000 C CNN -F 1 "1000" V 4900 2850 50 0000 C CNN - 1 4900 2850 - 0 -1 -1 0 -$EndComp -$Comp -L DC v1 -U 1 1 5166A8CD -P 4200 3650 -F 0 "v1" H 4000 3750 60 0000 C CNN -F 1 "5V" H 4000 3600 60 0000 C CNN -F 2 "R1" H 3900 3650 60 0000 C CNN - 1 4200 3650 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir deleted file mode 100644 index 3731a3e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 12:59:00 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 2 VPLOT8_1 -U2 3 0 IPLOT -D1 2 3 DIODE -R1 1 2 1000 -v1 1 0 5V - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt deleted file mode 100644 index 43a6aa9..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.ckt +++ /dev/null @@ -1,13 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:59:00 pm ist -.include diode.lib - -* Plotting option vplot8_1 -V_u2 3 0 0 -d1 2 3 diode -r1 1 2 1000 -v1 1 0 5v - -.dc v1 0e-00 5e-00 50e-03 -.plot v(2) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out deleted file mode 100644 index 3ce4892..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 12:59:00 pm ist -.include diode.lib - -* Plotting option vplot8_1 -V_u2 3 0 0 -d1 2 3 diode -r1 1 2 1000 -v1 1 0 5v - -.dc v1 0e-00 5e-00 50e-03 - -* Control Statements -.control -run -plot v(2) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro deleted file mode 100644 index 9718ce6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 13 May 2013 12:58:14 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj deleted file mode 100644 index eb6337b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.4.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch deleted file mode 100644 index 7aac593..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.4/example_2.4.sch +++ /dev/null @@ -1,139 +0,0 @@ -EESchema Schematic File Version 2 date Monday 13 May 2013 12:59:04 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.4-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "13 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PWR_FLAG #FLG01 -U 1 1 51909635 -P 5200 4200 -F 0 "#FLG01" H 5200 4470 30 0001 C CNN -F 1 "PWR_FLAG" H 5200 4430 30 0000 C CNN - 1 5200 4200 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5190961B -P 5700 2550 -F 0 "U1" H 5550 2650 50 0000 C CNN -F 1 "VPLOT8_1" H 5850 2650 50 0000 C CNN - 1 5700 2550 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5150 2850 5700 2850 -Wire Wire Line - 5700 3600 5700 3700 -Connection ~ 5200 4200 -Wire Wire Line - 5200 4200 5200 4750 -Connection ~ 5700 2850 -Wire Wire Line - 5700 2850 5700 3200 -Wire Wire Line - 4200 3200 4200 2850 -Wire Wire Line - 4200 2850 4650 2850 -Wire Wire Line - 4200 4100 4200 4200 -Wire Wire Line - 4200 4200 5700 4200 -$Comp -L IPLOT U2 -U 1 1 5167D5E8 -P 5700 3950 -F 0 "U2" H 5550 4050 50 0000 C CNN -F 1 "IPLOT" H 5850 4050 50 0000 C CNN - 1 5700 3950 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166ABF9 -P 5200 4750 -F 0 "#PWR02" H 5200 4750 30 0001 C CNN -F 1 "GND" H 5200 4680 30 0001 C CNN - 1 5200 4750 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166A924 -P 5700 3400 -F 0 "D1" H 5700 3500 40 0000 C CNN -F 1 "DIODE" H 5700 3300 40 0000 C CNN - 1 5700 3400 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 5166A8EF -P 4900 2850 -F 0 "R1" V 4980 2850 50 0000 C CNN -F 1 "1000" V 4900 2850 50 0000 C CNN - 1 4900 2850 - 0 -1 -1 0 -$EndComp -$Comp -L DC v1 -U 1 1 5166A8CD -P 4200 3650 -F 0 "v1" H 4000 3750 60 0000 C CNN -F 1 "5V" H 4000 3600 60 0000 C CNN -F 2 "R1" H 3900 3650 60 0000 C CNN - 1 4200 3650 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/analysis b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/analysis deleted file mode 100644 index 0a70a74..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 1e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/diode.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/diode.lib deleted file mode 100644 index d5c42a7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/diode.lib +++ /dev/null @@ -1,4 +0,0 @@ -.model diode D( Is=880.5E-18 Nbvl=14.976 Cjo=175p Rs=20 Isr=1.859n -+ Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u -+ Bv=8.1 Fc=.5 Ikf=0 Xti=3 Nr=2 -+ Vj=.65 Ibv=20.245m Ibvl=1.9556m )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak deleted file mode 100644 index 4dd86fe..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.bak +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 14 May 2013 02:41:15 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.lib b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.lib deleted file mode 100644 index 9adc092..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5-cache.lib +++ /dev/null @@ -1,108 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 21 May 2013 11:07:18 AM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# DIODE -# -DEF DIODE D 0 40 N N 1 F N -F0 "D" 0 100 40 H V C CNN -F1 "DIODE" 0 -100 40 H V C CNN -$FPLIST - D? - S* -$ENDFPLIST -DRAW -P 2 0 1 6 50 50 50 -50 N -P 3 0 1 0 -50 50 50 0 -50 -50 F -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.bak deleted file mode 100644 index 21d43d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.bak +++ /dev/null @@ -1,164 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 14 May 2013 02:41:15 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.5-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "14 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L DC v1 -U 1 1 5191FF90 -P 5000 3850 -F 0 "v1" H 4800 3950 60 0000 C CNN -F 1 "DC" H 4800 3800 60 0000 C CNN -F 2 "R1" H 4700 3850 60 0000 C CNN - 1 5000 3850 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 5190978A -P 6250 5300 -F 0 "#FLG01" H 6250 5570 30 0001 C CNN -F 1 "PWR_FLAG" H 6250 5530 30 0000 C CNN - 1 6250 5300 - 1 0 0 -1 -$EndComp -Connection ~ 6600 2100 -$Comp -L VPLOT8_1 U1 -U 1 1 51909775 -P 6600 1800 -F 0 "U1" H 6450 1900 50 0000 C CNN -F 1 "VPLOT8_1" H 6750 1900 50 0000 C CNN - 1 6600 1800 - 1 0 0 -1 -$EndComp -Wire Wire Line - 6250 5300 5000 5300 -Wire Wire Line - 6250 3300 6250 3350 -Wire Wire Line - 6250 4850 6250 5500 -Wire Wire Line - 6250 2350 6250 2100 -Connection ~ 6250 5300 -Connection ~ 6250 2100 -Wire Wire Line - 5250 2100 5000 2100 -Wire Wire Line - 5750 2100 6600 2100 -Connection ~ 6250 5300 -Wire Wire Line - 6250 2750 6250 2800 -Wire Wire Line - 5000 2100 5000 3400 -Wire Wire Line - 6250 4250 6250 4350 -Wire Wire Line - 5000 5300 5000 4300 -$Comp -L IPLOT U2 -U 1 1 519096FE -P 6250 4600 -F 0 "U2" H 6100 4700 50 0000 C CNN -F 1 "IPLOT" H 6400 4700 50 0000 C CNN - 1 6250 4600 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 519096A6 -P 6250 3050 -F 0 "R2" V 6330 3050 50 0000 C CNN -F 1 "20m" V 6250 3050 50 0000 C CNN - 1 6250 3050 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 5190969F -P 6250 3800 -F 0 "v2" H 6050 3900 60 0000 C CNN -F 1 "65m" H 6050 3750 60 0000 C CNN -F 2 "R1" H 5950 3800 60 0000 C CNN - 1 6250 3800 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516A928C -P 5500 2100 -F 0 "R1" V 5580 2100 50 0000 C CNN -F 1 "1000" V 5500 2100 50 0000 C CNN - 1 5500 2100 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5166AFB9 -P 6250 5500 -F 0 "#PWR02" H 6250 5500 30 0001 C CNN -F 1 "GND" H 6250 5430 30 0001 C CNN - 1 6250 5500 - 1 0 0 -1 -$EndComp -$Comp -L DIODE D1 -U 1 1 5166AF28 -P 6250 2550 -F 0 "D1" H 6250 2650 40 0000 C CNN -F 1 "DIODE" H 6250 2450 40 0000 C CNN - 1 6250 2550 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir deleted file mode 100644 index ab9de69..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 14 May 2013 02:41:09 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -v1 1 0 DC -U1 5 VPLOT8_1 -U2 4 0 IPLOT -R2 3 2 20m -v2 2 4 65m -R1 1 5 1000 -D1 5 3 DIODE - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt deleted file mode 100644 index eb19daf..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 14 may 2013 02:41:09 pm ist -.include diode.lib - -v1 1 0 dc 5 -* Plotting option vplot8_1 -V_u2 4 0 0 -r2 3 2 20m -v2 2 4 65m -r1 1 5 1000 -d1 5 3 diode - -.dc v1 0e-00 5e-00 1e-00 -.plot v(5) -.plot i(V_u2) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out deleted file mode 100644 index a3bbe2c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: tuesday 14 may 2013 02:41:09 pm ist -.include diode.lib - -v1 1 0 dc 5 -* Plotting option vplot8_1 -V_u2 4 0 0 -r2 3 2 20m -v2 2 4 65m -r1 1 5 1000 -d1 5 3 diode - -.dc v1 0e-00 5e-00 1e-00 - -* Control Statements -.control -run -plot v(5) -plot i(V_u2) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro deleted file mode 100644 index 8e9a0fd..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.pro +++ /dev/null @@ -1,84 +0,0 @@ -update=Monday 13 May 2013 01:04:04 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/ambikeshwar/OSCAD/library/analogSpice -LibName32=/home/ambikeshwar/OSCAD/library/analogXSpice -LibName33=/home/ambikeshwar/OSCAD/library/convergenceAidSpice -LibName34=/home/ambikeshwar/OSCAD/library/converterSpice -LibName35=/home/ambikeshwar/OSCAD/library/digitalSpice -LibName36=/home/ambikeshwar/OSCAD/library/digitalXSpice -LibName37=/home/ambikeshwar/OSCAD/library/linearSpice -LibName38=/home/ambikeshwar/OSCAD/library/measurementSpice -LibName39=/home/ambikeshwar/OSCAD/library/portSpice -LibName40=/home/ambikeshwar/OSCAD/library/sourcesSpice -LibName41=/home/holy/OSCAD/library/analogSpice -LibName42=/home/holy/OSCAD/library/analogXSpice -LibName43=/home/holy/OSCAD/library/convergenceAidSpice -LibName44=/home/holy/OSCAD/library/converterSpice -LibName45=/home/holy/OSCAD/library/digitalSpice -LibName46=/home/holy/OSCAD/library/digitalXSpice -LibName47=/home/holy/OSCAD/library/linearSpice -LibName48=/home/holy/OSCAD/library/measurementSpice -LibName49=/home/holy/OSCAD/library/portSpice -LibName50=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj deleted file mode 100644 index 1148c23..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.5.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch deleted file mode 100644 index ff9da18..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.5/example_2.5.sch +++ /dev/null @@ -1,168 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 21 May 2013 11:07:18 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_2.5-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "21 may 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 6650 2050 0 90 Italic 18 -Vd -Text Notes 6450 3850 0 90 Italic 18 -Id -$Comp -L DC v1 -U 1 1 5191FF90 -P 5000 3850 -F 0 "v1" H 4800 3950 60 0000 C CNN -F 1 "DC" H 4800 3800 60 0000 C CNN -F 2 "R1" H 4700 3850 60 0000 C CNN - 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14 300 0 200 L 40 40 6 1 O -X + 7 -300 0 200 R 40 40 7 1 O -X - 15 300 0 200 L 40 40 7 1 O -X + 8 -300 0 200 R 40 40 8 1 O -X - 16 300 0 200 L 40 40 8 1 O -ENDDRAW -ENDDEF -# -# ZENER -# -DEF ZENER D 0 40 N N 1 F N -F0 "D" 0 100 50 H V C CNN -F1 "ZENER" 0 -100 40 H V C CNN -$FPLIST - D? - SO* - SM* -$ENDFPLIST -DRAW -P 5 0 1 0 50 0 -50 50 -50 -50 50 0 50 0 F -P 5 0 1 8 70 50 50 30 50 -30 30 -50 30 -50 N -X A 1 -200 0 150 R 40 40 1 1 P -X K 2 200 0 150 L 40 40 1 1 P -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.bak b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.bak deleted file mode 100644 index 298b82a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.bak +++ /dev/null @@ -1,132 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 03:23:37 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 7200 2400 -Connection ~ 7200 1800 -Wire Wire Line - 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-.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.ckt deleted file mode 100644 index cd705cf..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.ckt +++ /dev/null @@ -1,10 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 03:25:12 pm ist - -v1 3 0 dc 10 -r2 1 0 2000 -r1 3 1 500 -d1 0 1 zener - -.dc v1 0e-00 10e-00 5e-03 -.plot -v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.out b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.out deleted file mode 100644 index 2cdd76d..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.cir.out +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 03:25:12 pm ist - -v1 3 0 dc 10 -r2 1 0 2000 -r1 3 1 500 -d1 0 1 zener - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot -v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj deleted file mode 100644 index e0d6a2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_2.8.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch b/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch deleted file mode 100644 index ddb3704..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_2/example_2.8/example_2.8.sch +++ /dev/null @@ -1,123 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 03:25:17 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:example_2.8-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 7200 2400 -Connection ~ 7200 1800 -Wire Wire Line - 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