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-rw-r--r--OSCAD/Examples/simpleTTL/analysis1
-rw-r--r--OSCAD/Examples/simpleTTL/simpleTTL-cache.bak148
-rw-r--r--OSCAD/Examples/simpleTTL/simpleTTL-cache.lib148
-rw-r--r--OSCAD/Examples/simpleTTL/simpleTTL.bak166
-rw-r--r--OSCAD/Examples/simpleTTL/simpleTTL.cir13
-rw-r--r--OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt18
-rw-r--r--OSCAD/Examples/simpleTTL/simpleTTL.cir.out23
-rw-r--r--OSCAD/Examples/simpleTTL/simpleTTL.pro73
-rw-r--r--OSCAD/Examples/simpleTTL/simpleTTL.proj1
-rw-r--r--OSCAD/Examples/simpleTTL/simpleTTL.sch157
10 files changed, 0 insertions, 748 deletions
diff --git a/OSCAD/Examples/simpleTTL/analysis b/OSCAD/Examples/simpleTTL/analysis
deleted file mode 100644
index bf5e632..0000000
--- a/OSCAD/Examples/simpleTTL/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 10e-09 1e-06 0e-00
diff --git a/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak b/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak
deleted file mode 100644
index 4bb51e9..0000000
--- a/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak
+++ /dev/null
@@ -1,148 +0,0 @@
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-#
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-DEF dc v 0 40 Y Y 1 F N
-F0 "v" -200 100 60 H V C CNN
-F1 "dc" -200 -50 60 H V C CNN
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-$FPLIST
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-#
-# pulse
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-DEF pulse v 0 40 Y Y 1 F N
-F0 "v" -200 100 60 H V C CNN
-F1 "pulse" -200 -50 60 H V C CNN
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-A -25 -450 501 928 871 0 1 0 N -50 50 0 50
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-DEF PWR_FLAG #FLG 0 0 N N 1 F P
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-DEF vplot8_1 U 0 40 Y Y 8 F N
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-F1 "vplot8_1" 150 100 50 H V C CNN
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-C 0 0 100 0 0 0 N
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-X + 2 0 -300 200 U 40 40 2 1 I
-X + 3 0 -300 200 U 40 40 3 1 I
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-X + 7 0 -300 200 U 40 40 7 1 I
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diff --git a/OSCAD/Examples/simpleTTL/simpleTTL-cache.lib b/OSCAD/Examples/simpleTTL/simpleTTL-cache.lib
deleted file mode 100644
index bd572f0..0000000
--- a/OSCAD/Examples/simpleTTL/simpleTTL-cache.lib
+++ /dev/null
@@ -1,148 +0,0 @@
-EESchema-LIBRARY Version 2.3 Date: Tuesday 02 April 2013 03:01:00 PM IST
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-#
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-DEF dc v 0 40 Y Y 1 F N
-F0 "v" -200 100 60 H V C CNN
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-$FPLIST
- 1_pin
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-C 0 0 150 0 1 0 N
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-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
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-P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
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-#
-# pulse
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-DEF pulse v 0 40 Y Y 1 F N
-F0 "v" -200 100 60 H V C CNN
-F1 "pulse" -200 -50 60 H V C CNN
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-X - 2 0 -450 300 U 50 50 1 1 P
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-#
-# PWR_FLAG
-#
-DEF PWR_FLAG #FLG 0 0 N N 1 F P
-F0 "#FLG" 0 270 30 H I C CNN
-F1 "PWR_FLAG" 0 230 30 H V C CNN
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-X pwr 1 0 0 0 U 20 20 0 0 w
-P 3 0 1 0 0 0 0 100 0 100 N
-P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N
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-ENDDEF
-#
-# R
-#
-DEF R R 0 0 N Y 1 F N
-F0 "R" 80 0 50 V V C CNN
-F1 "R" 0 0 50 V V C CNN
-$FPLIST
- R?
- SM0603
- SM0805
- R?-*
-$ENDFPLIST
-DRAW
-S -40 150 40 -150 0 1 12 N
-X ~ 1 0 250 100 D 60 60 1 1 P
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-ENDDEF
-#
-# vplot8_1
-#
-DEF vplot8_1 U 0 40 Y Y 8 F N
-F0 "U" -150 100 50 H V C CNN
-F1 "vplot8_1" 150 100 50 H V C CNN
-DRAW
-C 0 0 100 0 0 0 N
-X + 1 0 -300 200 U 40 40 1 1 I
-X + 2 0 -300 200 U 40 40 2 1 I
-X + 3 0 -300 200 U 40 40 3 1 I
-X + 4 0 -300 200 U 40 40 4 1 I
-X + 5 0 -300 200 U 40 40 5 1 I
-X + 6 0 -300 200 U 40 40 6 1 I
-X + 7 0 -300 200 U 40 40 7 1 I
-X + 8 0 -300 200 U 40 40 8 1 I
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.bak b/OSCAD/Examples/simpleTTL/simpleTTL.bak
deleted file mode 100644
index 2bf0b11..0000000
--- a/OSCAD/Examples/simpleTTL/simpleTTL.bak
+++ /dev/null
@@ -1,166 +0,0 @@
-EESchema Schematic File Version 2 date Thursday 20 December 2012 12:04:47 AM IST
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:special
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:analogSpice
-LIBS:converterSpice
-LIBS:digitalSpice
-LIBS:linearSpice
-LIBS:measurementSpice
-LIBS:portSpice
-LIBS:sourcesSpice
-LIBS:digitalXSpice
-LIBS:analogXSpice
-LIBS:simpleTTL-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11700 8267
-encoding utf-8
-Sheet 1 1
-Title ""
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-Connection ~ 2950 4600
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-Wire Wire Line
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-Wire Wire Line
- 3450 3350 3450 3250
-Connection ~ 3450 3350
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- 5550 3450 5350 3450
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-$Comp
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- 2 5550 3000
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-$EndComp
-$Comp
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-$Comp
-L GND #PWR03
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- 1 2950 4800
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diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir b/OSCAD/Examples/simpleTTL/simpleTTL.cir
deleted file mode 100644
index b4463d3..0000000
--- a/OSCAD/Examples/simpleTTL/simpleTTL.cir
+++ /dev/null
@@ -1,13 +0,0 @@
-* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 02 April 2013 03:00:52 PM IST
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
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-*Sheet Name:/
-XU2 1 5 VPLOT8_1
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-v1 1 0 PULSE
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diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt b/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt
deleted file mode 100644
index 7bbb5a4..0000000
--- a/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt
+++ /dev/null
@@ -1,18 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: thursday 20 december 2012 12:05:00 am ist
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-* Plotting option vplot8_1
-r1 5 0 1000
-v1 1 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6)
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-* 7400
-a1 [1] [1_in] u1adc
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-a3 [1_in 4_in] 5_out u1
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-.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)
-
-.tran 10e-09 1e-06 0e-00
-.plot v(1) v(5)
-.end
diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir.out b/OSCAD/Examples/simpleTTL/simpleTTL.cir.out
deleted file mode 100644
index 666b204..0000000
--- a/OSCAD/Examples/simpleTTL/simpleTTL.cir.out
+++ /dev/null
@@ -1,23 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: thursday 20 december 2012 12:05:00 am ist
-
-* Plotting option vplot8_1
-r1 5 0 1000
-v1 1 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6)
-v2 4 0 5
-* 7400
-a1 [1] [1_in] u1adc
-a2 [4] [4_in] u1adc
-a3 [1_in 4_in] 5_out u1
-a4 [5_out] [5] u1dac
-.model u1 d_nand
-.model u1adc adc_bridge(in_low=0.8 in_high=2.0)
-.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9)
-
-.tran 10e-09 1e-06 0e-00
-
-* Control Statements
-.control
-run
-plot v(1) v(5)
-.endc
-.end
diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.pro b/OSCAD/Examples/simpleTTL/simpleTTL.pro
deleted file mode 100644
index b16deac..0000000
--- a/OSCAD/Examples/simpleTTL/simpleTTL.pro
+++ /dev/null
@@ -1,73 +0,0 @@
-update=Tuesday 18 December 2012 10:13:38 PM IST
-last_client=eeschema
-[eeschema]
-version=1
-LibDir=/home/yogesh/OSCAD/library
-NetFmt=1
-HPGLSpd=20
-HPGLDm=15
-HPGLNum=1
-offX_A4=0
-offY_A4=0
-offX_A3=0
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-offX_A1=0
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-offX_E=0
-offY_E=0
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
-LibName13=microcontrollers
-LibName14=dsp
-LibName15=microchip
-LibName16=analog_switches
-LibName17=motorola
-LibName18=texas
-LibName19=intel
-LibName20=audio
-LibName21=interface
-LibName22=digital-audio
-LibName23=philips
-LibName24=display
-LibName25=cypress
-LibName26=siliconi
-LibName27=opto
-LibName28=atmel
-LibName29=contrib
-LibName30=valves
-LibName31=analogSpice
-LibName32=converterSpice
-LibName33=digitalSpice
-LibName34=linearSpice
-LibName35=measurementSpice
-LibName36=portSpice
-LibName37=sourcesSpice
-LibName38=digitalXSpice
-LibName39=analogXSpice
diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.proj b/OSCAD/Examples/simpleTTL/simpleTTL.proj
deleted file mode 100644
index 72370e2..0000000
--- a/OSCAD/Examples/simpleTTL/simpleTTL.proj
+++ /dev/null
@@ -1 +0,0 @@
-schematicFile simpleTTL.sch
diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.sch b/OSCAD/Examples/simpleTTL/simpleTTL.sch
deleted file mode 100644
index cb6e4f2..0000000
--- a/OSCAD/Examples/simpleTTL/simpleTTL.sch
+++ /dev/null
@@ -1,157 +0,0 @@
-EESchema Schematic File Version 2 date Tuesday 02 April 2013 03:01:00 PM IST
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:special
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
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-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
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