diff options
Diffstat (limited to 'OSCAD/Examples/simpleTTL')
-rw-r--r-- | OSCAD/Examples/simpleTTL/analysis | 1 | ||||
-rw-r--r-- | OSCAD/Examples/simpleTTL/simpleTTL-cache.bak | 148 | ||||
-rw-r--r-- | OSCAD/Examples/simpleTTL/simpleTTL-cache.lib | 148 | ||||
-rw-r--r-- | OSCAD/Examples/simpleTTL/simpleTTL.bak | 166 | ||||
-rw-r--r-- | OSCAD/Examples/simpleTTL/simpleTTL.cir | 13 | ||||
-rw-r--r-- | OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt | 18 | ||||
-rw-r--r-- | OSCAD/Examples/simpleTTL/simpleTTL.cir.out | 23 | ||||
-rw-r--r-- | OSCAD/Examples/simpleTTL/simpleTTL.pro | 73 | ||||
-rw-r--r-- | OSCAD/Examples/simpleTTL/simpleTTL.proj | 1 | ||||
-rw-r--r-- | OSCAD/Examples/simpleTTL/simpleTTL.sch | 157 |
10 files changed, 0 insertions, 748 deletions
diff --git a/OSCAD/Examples/simpleTTL/analysis b/OSCAD/Examples/simpleTTL/analysis deleted file mode 100644 index bf5e632..0000000 --- a/OSCAD/Examples/simpleTTL/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 10e-09 1e-06 0e-00 diff --git a/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak b/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak deleted file mode 100644 index 4bb51e9..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL-cache.bak +++ /dev/null @@ -1,148 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 20 December 2012 12:04:47 AM IST -#encoding utf-8 -# -# 74LS00 -# -DEF 74LS00 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS00" 0 -100 60 H V C CNN -ALIAS 74LS37 7400 74HCT00 74HC00 -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O I -X ~ 8 600 0 300 L 60 60 3 1 O I -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O I -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O -X ~ 8 600 0 300 L 60 60 3 2 O -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/simpleTTL/simpleTTL-cache.lib b/OSCAD/Examples/simpleTTL/simpleTTL-cache.lib deleted file mode 100644 index bd572f0..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL-cache.lib +++ /dev/null @@ -1,148 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 02 April 2013 03:01:00 PM IST -#encoding utf-8 -# -# 74LS00 -# -DEF 74LS00 U 0 30 Y Y 4 F N -F0 "U" 0 50 60 H V C CNN -F1 "74LS00" 0 -100 60 H V C CNN -ALIAS 74LS37 7400 74HCT00 74HC00 -$FPLIST - 14DIP300* - SO14* -$ENDFPLIST -DRAW -X GND 7 -200 -200 0 U 40 40 0 0 W N -X VCC 14 -200 200 0 D 40 40 0 0 W N -A 100 0 200 -899 899 0 1 0 N 100 -200 100 200 -P 4 0 1 0 100 200 -300 200 -300 -200 100 -200 N -X ~ 1 -600 100 300 R 60 60 1 1 I -X ~ 2 -600 -100 300 R 60 60 1 1 I -X ~ 3 600 0 300 L 60 60 1 1 O I -X ~ 4 -600 100 300 R 60 60 2 1 I -X ~ 5 -600 -100 300 R 60 60 2 1 I -X ~ 6 600 0 300 L 60 60 2 1 O I -X ~ 8 600 0 300 L 60 60 3 1 O I -X ~ 9 -600 100 300 R 60 60 3 1 I -X ~ 10 -600 -100 300 R 60 60 3 1 I -X ~ 11 600 0 300 L 60 60 4 1 O I -X ~ 12 -600 100 300 R 60 60 4 1 I -X ~ 13 -600 -100 300 R 60 60 4 1 I -A -465 0 259 504 -504 0 2 0 N -300 200 -300 -200 -A -11 143 343 -881 -246 0 2 0 N 0 -200 300 0 -A -10 -141 340 244 883 0 2 0 N 300 0 0 200 -P 2 0 2 0 -300 -200 0 -200 N -P 2 0 2 0 -300 200 0 200 N -X ~ 1 -600 100 370 R 60 60 1 2 I I -X ~ 2 -600 -100 370 R 60 60 1 2 I I -X ~ 3 600 0 300 L 60 60 1 2 O -X ~ 4 -600 100 370 R 60 60 2 2 I I -X ~ 5 -600 -100 370 R 60 60 2 2 I I -X ~ 6 600 0 300 L 60 60 2 2 O -X ~ 8 600 0 300 L 60 60 3 2 O -X ~ 9 -600 100 370 R 60 60 3 2 I I -X ~ 10 -600 -100 370 R 60 60 3 2 I I -X ~ 11 600 0 300 L 60 60 4 2 O -X ~ 12 -600 100 370 R 60 60 4 2 I I -X ~ 13 -600 -100 370 R 60 60 4 2 I I -ENDDRAW -ENDDEF -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.bak b/OSCAD/Examples/simpleTTL/simpleTTL.bak deleted file mode 100644 index 2bf0b11..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.bak +++ /dev/null @@ -1,166 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 20 December 2012 12:04:47 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:digitalXSpice -LIBS:analogXSpice -LIBS:simpleTTL-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5550 3450 -Wire Wire Line - 5550 3300 5550 3600 -Wire Wire Line - 2950 4600 5550 4600 -Connection ~ 4500 4600 -Wire Wire Line - 4500 4300 4500 4600 -Wire Wire Line - 3700 4600 3700 4450 -Connection ~ 2950 4600 -Wire Wire Line - 2950 3350 4150 3350 -Wire Wire Line - 2950 4250 2950 4800 -Wire Wire Line - 3700 3550 4150 3550 -Connection ~ 3700 4600 -Wire Wire Line - 4550 2900 4550 3250 -Wire Wire Line - 3450 3350 3450 3250 -Connection ~ 3450 3350 -Wire Wire Line - 5550 3450 5350 3450 -Wire Wire Line - 5550 4600 5550 4100 -$Comp -L VPLOT8_1 U2 -U 2 1 50CEBA04 -P 5550 3000 -F 0 "U2" H 5400 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5700 3100 50 0000 C CNN - 2 5550 3000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 50CEBA01 -P 3450 2950 -F 0 "U2" H 3300 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 3600 3050 50 0000 C CNN - 1 3450 2950 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50862FAD -P 4550 2900 -F 0 "#FLG01" H 4550 3170 30 0001 C CNN -F 1 "PWR_FLAG" H 4550 3130 30 0000 C CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50862FA6 -P 4500 4300 -F 0 "#FLG02" H 4500 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 4530 30 0000 C CNN - 1 4500 4300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50862F73 -P 5550 3850 -F 0 "R1" V 5630 3850 50 0000 C CNN -F 1 "1000" V 5550 3850 50 0000 C CNN - 1 5550 3850 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 50862F55 -P 2950 3800 -F 0 "v1" H 2750 3900 60 0000 C CNN -F 1 "PULSE" H 2750 3750 60 0000 C CNN -F 2 "R1" H 2650 3800 60 0000 C CNN - 1 2950 3800 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 50862CF3 -P 2950 4800 -F 0 "#PWR03" H 2950 4800 30 0001 C CNN -F 1 "GND" H 2950 4730 30 0001 C CNN - 1 2950 4800 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 50862BA3 -P 3700 4000 -F 0 "v2" H 3500 4100 60 0000 C CNN -F 1 "5" H 3500 3950 60 0000 C CNN -F 2 "R1" H 3400 4000 60 0000 C CNN - 1 3700 4000 - 1 0 0 -1 -$EndComp -$Comp -L 7400 U1 -U 3 1 50862B5B -P 4750 3450 -F 0 "U1" H 4750 3500 60 0000 C CNN -F 1 "7400" H 4750 3350 60 0000 C CNN - 3 4750 3450 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir b/OSCAD/Examples/simpleTTL/simpleTTL.cir deleted file mode 100644 index b4463d3..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.cir +++ /dev/null @@ -1,13 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 02 April 2013 03:00:52 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -XU2 1 5 VPLOT8_1 -R1 5 0 1000 -v1 1 0 PULSE -v2 4 0 5 -XU1 0 5 1 4 3 7400 - -.end diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt b/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt deleted file mode 100644 index 7bbb5a4..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.cir.ckt +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 20 december 2012 12:05:00 am ist - -* Plotting option vplot8_1 -r1 5 0 1000 -v1 1 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) -v2 4 0 5 -* 7400 -a1 [1] [1_in] u1adc -a2 [4] [4_in] u1adc -a3 [1_in 4_in] 5_out u1 -a4 [5_out] [5] u1dac -.model u1 d_nand -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 -.plot v(1) v(5) -.end diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.cir.out b/OSCAD/Examples/simpleTTL/simpleTTL.cir.out deleted file mode 100644 index 666b204..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.cir.out +++ /dev/null @@ -1,23 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 20 december 2012 12:05:00 am ist - -* Plotting option vplot8_1 -r1 5 0 1000 -v1 1 0 pulse(0 5 0 0 0 0.25e-6 0.5e-6) -v2 4 0 5 -* 7400 -a1 [1] [1_in] u1adc -a2 [4] [4_in] u1adc -a3 [1_in 4_in] 5_out u1 -a4 [5_out] [5] u1dac -.model u1 d_nand -.model u1adc adc_bridge(in_low=0.8 in_high=2.0) -.model u1dac dac_bridge(out_low=0.25 out_high=5.0 out_undef=1.8 t_rise=0.5e-9 t_fall=0.5e-9) - -.tran 10e-09 1e-06 0e-00 - -* Control Statements -.control -run -plot v(1) v(5) -.endc -.end diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.pro b/OSCAD/Examples/simpleTTL/simpleTTL.pro deleted file mode 100644 index b16deac..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.pro +++ /dev/null @@ -1,73 +0,0 @@ -update=Tuesday 18 December 2012 10:13:38 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/OSCAD/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=digitalXSpice -LibName39=analogXSpice diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.proj b/OSCAD/Examples/simpleTTL/simpleTTL.proj deleted file mode 100644 index 72370e2..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile simpleTTL.sch diff --git a/OSCAD/Examples/simpleTTL/simpleTTL.sch b/OSCAD/Examples/simpleTTL/simpleTTL.sch deleted file mode 100644 index cb6e4f2..0000000 --- a/OSCAD/Examples/simpleTTL/simpleTTL.sch +++ /dev/null @@ -1,157 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 02 April 2013 03:01:00 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:simpleTTL-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "2 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5550 3450 -Wire Wire Line - 5550 3300 5550 3600 -Wire Wire Line - 2950 4600 5550 4600 -Connection ~ 4500 4600 -Wire Wire Line - 4500 4300 4500 4600 -Wire Wire Line - 3700 4600 3700 4450 -Connection ~ 2950 4600 -Wire Wire Line - 2950 3350 4150 3350 -Wire Wire Line - 2950 4250 2950 4800 -Wire Wire Line - 3700 3550 4150 3550 -Connection ~ 3700 4600 -Wire Wire Line - 4550 2900 4550 3250 -Wire Wire Line - 3450 3350 3450 3250 -Connection ~ 3450 3350 -Wire Wire Line - 5550 3450 5350 3450 -Wire Wire Line - 5550 4600 5550 4100 -$Comp -L VPLOT8_1 U2 -U 2 1 50CEBA04 -P 5550 3000 -F 0 "U2" H 5400 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5700 3100 50 0000 C CNN - 2 5550 3000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 50CEBA01 -P 3450 2950 -F 0 "U2" H 3300 3050 50 0000 C CNN -F 1 "VPLOT8_1" H 3600 3050 50 0000 C CNN - 1 3450 2950 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 50862FAD -P 4550 2900 -F 0 "#FLG01" H 4550 3170 30 0001 C CNN -F 1 "PWR_FLAG" H 4550 3130 30 0000 C CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 50862FA6 -P 4500 4300 -F 0 "#FLG02" H 4500 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 4530 30 0000 C CNN - 1 4500 4300 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 50862F73 -P 5550 3850 -F 0 "R1" V 5630 3850 50 0000 C CNN -F 1 "1000" V 5550 3850 50 0000 C CNN - 1 5550 3850 - 1 0 0 -1 -$EndComp -$Comp -L PULSE v1 -U 1 1 50862F55 -P 2950 3800 -F 0 "v1" H 2750 3900 60 0000 C CNN -F 1 "PULSE" H 2750 3750 60 0000 C CNN -F 2 "R1" H 2650 3800 60 0000 C CNN - 1 2950 3800 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 50862CF3 -P 2950 4800 -F 0 "#PWR03" H 2950 4800 30 0001 C CNN -F 1 "GND" H 2950 4730 30 0001 C CNN - 1 2950 4800 - 1 0 0 -1 -$EndComp -$Comp -L DC v2 -U 1 1 50862BA3 -P 3700 4000 -F 0 "v2" H 3500 4100 60 0000 C CNN -F 1 "5" H 3500 3950 60 0000 C CNN -F 2 "R1" H 3400 4000 60 0000 C CNN - 1 3700 4000 - 1 0 0 -1 -$EndComp -$Comp -L 7400 U1 -U 3 1 50862B5B -P 4750 3450 -F 0 "U1" H 4750 3500 60 0000 C CNN -F 1 "7400" H 4750 3350 60 0000 C CNN - 3 4750 3450 - 1 0 0 -1 -$EndComp -$EndSCHEMATC |