diff options
Diffstat (limited to 'OSCAD/Examples/sedra_smith/chapter_3/example_3.7')
10 files changed, 0 insertions, 689 deletions
diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/analysis deleted file mode 100644 index 35318bb..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 10e-00 5e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak deleted file mode 100644 index 1c7c96a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:09:14 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib deleted file mode 100644 index 0acf0b6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Monday 15 April 2013 08:10:59 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# PNP -# -DEF PNP Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 60 H V R CNN -F1 "PNP" 0 150 60 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 F -P 3 0 1 0 25 -25 0 0 0 0 N -P 3 0 1 0 100 -100 65 -65 65 -65 N -P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak deleted file mode 100644 index ca1bf82..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.bak +++ /dev/null @@ -1,172 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 08:09:14 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5050 4700 -Connection ~ 5050 3500 -Connection ~ 4500 5050 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C10CC -P 4500 5050 -F 0 "#FLG01" H 4500 5320 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 5280 30 0000 C CNN - 1 4500 5050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C10B9 -P 4450 5350 -F 0 "#PWR02" H 4450 5350 30 0001 C CNN -F 1 "GND" H 4450 5280 30 0001 C CNN - 1 4450 5350 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4450 5350 4500 5350 -Wire Wire Line - 4500 5350 4500 3750 -Wire Wire Line - 4500 3750 4750 3750 -Wire Wire Line - 5050 4550 5050 4850 -Wire Wire Line - 5050 5350 5650 5350 -Wire Wire Line - 5050 3450 5050 3550 -Wire Wire Line - 5050 2850 5050 2950 -Wire Wire Line - 5050 3950 5050 4050 -Wire Wire Line - 5050 2350 5650 2350 -Wire Wire Line - 5650 2350 5650 3200 -Wire Wire Line - 5650 5350 5650 4100 -$Comp -L VPLOT8_1 U3 -U 2 1 516C107A -P 5350 4700 -F 0 "U3" H 5200 4800 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 4800 50 0000 C CNN - 2 5350 4700 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C103D -P 5650 3650 -F 0 "v1" H 5450 3750 60 0000 C CNN -F 1 "DC" H 5450 3600 60 0000 C CNN -F 2 "R1" H 5350 3650 60 0000 C CNN - 1 5650 3650 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C1001 -P 5350 3500 -F 0 "U3" H 5200 3600 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 3600 50 0000 C CNN - 1 5350 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C0FB5 -P 5050 5100 -F 0 "R2" V 5130 5100 50 0000 C CNN -F 1 "R" V 5050 5100 50 0000 C CNN - 1 5050 5100 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0FAB -P 5050 4300 -F 0 "U2" H 4900 4400 50 0000 C CNN -F 1 "IPLOT" H 5200 4400 50 0000 C CNN - 1 5050 4300 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C0F0F -P 5050 3200 -F 0 "U1" H 4900 3300 50 0000 C CNN -F 1 "IPLOT" H 5200 3300 50 0000 C CNN - 1 5050 3200 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516C0F01 -P 5050 2600 -F 0 "R1" V 5130 2600 50 0000 C CNN -F 1 "R" V 5050 2600 50 0000 C CNN - 1 5050 2600 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C0EEC -P 4950 3750 -F 0 "Q1" H 4950 3600 60 0000 R CNN -F 1 "PNP" H 4950 3900 60 0000 R CNN - 1 4950 3750 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir deleted file mode 100644 index 7d111e3..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 15 April 2013 08:10:56 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U3 4 6 VPLOT8_1 -v1 3 5 10 -R2 6 3 2000 -U2 6 2 IPLOT -U1 4 1 IPLOT -R1 5 1 1000 -Q1 2 0 4 PNP - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt deleted file mode 100644 index d569e7a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.ckt +++ /dev/null @@ -1,15 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:10:56 pm ist - -* Plotting option vplot8_1 -v1 3 5 10 -r2 6 3 2000 -V_u2 6 2 0 -V_u1 4 1 0 -r1 5 1 1000 -q1 4 0 2 pnp - -.dc v1 0e-00 10e-00 5e-03 -.plot v(4) v(6) -.plot i(V_u2) -.plot i(V_u1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out deleted file mode 100644 index 946ba9b..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 15 april 2013 08:10:56 pm ist - -* Plotting option vplot8_1 -v1 3 5 10 -r2 6 3 2000 -V_u2 6 2 0 -V_u1 4 1 0 -r1 5 1 1000 -q1 4 0 2 pnp - -.dc v1 0e-00 10e-00 5e-03 - -* Control Statements -.control -run -plot v(4) v(6) -plot i(V_u2) -plot i(V_u1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro deleted file mode 100644 index 7b4f272..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Monday 15 April 2013 07:58:37 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj deleted file mode 100644 index b07d448..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.7.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch deleted file mode 100644 index c9780ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.7/example_3.7.sch +++ /dev/null @@ -1,173 +0,0 @@ -EESchema Schematic File Version 2 date Monday 15 April 2013 08:10:59 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.7-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "15 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 5050 4700 -Connection ~ 5050 3500 -Connection ~ 4500 5050 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516C10CC -P 4500 5050 -F 0 "#FLG01" H 4500 5320 30 0001 C CNN -F 1 "PWR_FLAG" H 4500 5280 30 0000 C CNN - 1 4500 5050 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR02 -U 1 1 516C10B9 -P 4450 5350 -F 0 "#PWR02" H 4450 5350 30 0001 C CNN -F 1 "GND" H 4450 5280 30 0001 C CNN - 1 4450 5350 - 1 0 0 -1 -$EndComp -Wire Wire Line - 4450 5350 4500 5350 -Wire Wire Line - 4500 5350 4500 3750 -Wire Wire Line - 4500 3750 4750 3750 -Wire Wire Line - 5050 4550 5050 4850 -Wire Wire Line - 5050 5350 5650 5350 -Wire Wire Line - 5050 3450 5050 3550 -Wire Wire Line - 5050 2850 5050 2950 -Wire Wire Line - 5050 3950 5050 4050 -Wire Wire Line - 5050 2350 5650 2350 -Wire Wire Line - 5650 2350 5650 3200 -Wire Wire Line - 5650 5350 5650 4100 -$Comp -L VPLOT8_1 U3 -U 2 1 516C107A -P 5350 4700 -F 0 "U3" H 5200 4800 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 4800 50 0000 C CNN - 2 5350 4700 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 516C103D -P 5650 3650 -F 0 "v1" H 5450 3750 60 0000 C CNN -F 1 "10" H 5450 3600 60 0000 C CNN -F 2 "R1" H 5350 3650 60 0000 C CNN - 1 5650 3650 - 1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U3 -U 1 1 516C1001 -P 5350 3500 -F 0 "U3" H 5200 3600 50 0000 C CNN -F 1 "VPLOT8_1" H 5500 3600 50 0000 C CNN - 1 5350 3500 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516C0FB5 -P 5050 5100 -F 0 "R2" V 5130 5100 50 0000 C CNN -F 1 "2000" V 5050 5100 50 0000 C CNN - 1 5050 5100 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U2 -U 1 1 516C0FAB -P 5050 4300 -F 0 "U2" H 4900 4400 50 0000 C CNN -F 1 "IPLOT" H 5200 4400 50 0000 C CNN - 1 5050 4300 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516C0F0F -P 5050 3200 -F 0 "U1" H 4900 3300 50 0000 C CNN -F 1 "IPLOT" H 5200 3300 50 0000 C CNN - 1 5050 3200 - 0 -1 -1 0 -$EndComp -$Comp -L R R1 -U 1 1 516C0F01 -P 5050 2600 -F 0 "R1" V 5130 2600 50 0000 C CNN -F 1 "1000" V 5050 2600 50 0000 C CNN - 1 5050 2600 - 1 0 0 -1 -$EndComp -$Comp -L PNP Q1 -U 1 1 516C0EEC -P 4950 3750 -F 0 "Q1" H 4950 3600 60 0000 R CNN -F 1 "PNP" H 4950 3900 60 0000 R CNN - 1 4950 3750 - 1 0 0 -1 -$EndComp -$EndSCHEMATC |