initial commit

118 files changed, 33146 insertions, 0 deletions

diff --git a/OSCAD/LPCSim/LPCSim/ACAnalysis.sci b/OSCAD/LPCSim/LPCSim/ACAnalysis.sci
new file mode 100644
index 0000000..79d9796
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ACAnalysis.sci
@@ -0,0 +1,79 @@
+// ACAnalysis.sci is a scilab file to perform AC Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+function [A,B,x]=ACAnalysis(A,B,f)
+// Modify Sweep Source Value and update matrices
+  [C,d]=buildMatricesAC(A,B,f);
+
+// Find node potetial and current through devices whose device characteristic can not be expressed in terms of voltage
+  x=findNodePotential(C,d); 
+
+// Find branch voltage from node potential
+  voltage=findBranchVoltage(x);
+
+// Find branch current from branch voltage using device characteristic
+  current=findBranchCurrent(x,voltage);
+endfunction
+
+function [C,d]=buildMatricesAC(A,B,f); 
+  global g;
+  pi=3.14;
+  _C=1;
+  Edges=edge_number(g);
+  Nodes=node_number(g);
+  [rows cols]=size(A);
+  A2 = zeros(rows,cols);
+  b2 = zeros(cols,1);
+  for edge_cnt = 1:Edges,
+    if(g.edges.data.type(edge_cnt)=='C')
+      source=g.edges.tail(edge_cnt)-1;
+      sink=g.edges.head(edge_cnt)-1;
+      if(~(source==0)) 
+        A2(source,source) = A2(source,source)+2*pi*f*cValue(_C);
+      end
+      if(~(sink==0)) 
+        A2(sink,sink) = A2(sink,sink)+2*pi*f*cValue(_C);
+      end
+      if(~(sink==0) & ~(source==0))
+        A2(source,sink) = A2(source,sink)-2*pi*f*cValue(_C);
+        A2(sink,source) = A2(sink,source)-2*pi*f*cValue(_C);
+      end
+      _C=_C+1;  
+    end
+  end
+  C=[A -A2;A2 A];
+  d=[B;b2];
+endfunction
+
+function buildDCOutput(x,s,itr)
+  global vPrintList; 
+  global iPrintList; 
+  global sweepArray;
+  global vPrintArray; 
+  global iPrintArray;
+  sweepArray(itr)=s;
+// Store voltage output for printing  
+  if(~(vPrintList(1)==0))
+    fill_vPrintArray(x,itr);
+    vPrintArray(itr,1)=s;
+  end
+
+// Store voltage output for plotting  
+  if(~(vPlotList(1)==0))
+    fill_vPlotArray(x,itr);
+  end
+
+// Store current output for printing  
+  if(~(iPrintList(1)==0))
+    fill_iPrintArray(x,itr);
+    iPrintArray(itr,1)=s;
+  end
+
+// Store current output for plotting  
+  if(~(iPlotList(1)==0))
+    fill_iPlotArray(x,itr);
+  end
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/DCAnalysis.sci b/OSCAD/LPCSim/LPCSim/DCAnalysis.sci
new file mode 100644
index 0000000..7a2c691
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/DCAnalysis.sci
@@ -0,0 +1,58 @@
+// DCAnalysis.sci is a scilab file to perform DC Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+function [A,B,x]=DCAnalysis(A,B,_X,s)
+// Modify Sweep Source Value and update matrices
+  [A,B]=modifySourceValue(A,B,s);  
+// Perform Operating Point Analysis on static circuit
+  [A,B,x]=OPAnalysis(A,B);
+endfunction
+
+function [A,B]=modifySourceValue(A,B,s); 
+  global g;
+  global wave;
+  waveIndex=1;  
+  _T=1;
+  Edges=edge_number(g);
+  Nodes=node_number(g);
+  for edge_cnt = 1:Edges,
+    if(g.edges.data.type(edge_cnt)=='V')
+      tempWave=wave(waveIndex);
+      if(tempWave(1)=='dc')
+        waveIndex=waveIndex+1;   
+      elseif(tempWave(1)=='sweep')
+        waveIndex=waveIndex+1;  
+        g.edges.data.value(edge_cnt)=s;
+        B(Nodes-1+_T) = g.edges.data.value(edge_cnt);
+      elseif(tempWave(1)=='sine')
+        waveIndex=waveIndex+1;
+      end  
+      _T=_T+1; 	  
+      clear tempWave;
+      elseif(g.edges.data.type(edge_cnt)=='I')
+      tempWave=wave(waveIndex);
+      if(tempWave(1)=='dc')
+        waveIndex=waveIndex+1;   
+      elseif(tempWave(1)=='sine')
+        waveIndex=waveIndex+1;  
+      elseif(tempWave(1)=='sweep')
+        waveIndex=waveIndex+1;
+        oldCurrent=g.edges.data.value(edge_cnt);
+        g.edges.data.value(edge_cnt)=s;
+        source=g.edges.tail(edge_cnt)-1;
+        sink=g.edges.head(edge_cnt)-1;
+        if(~(source==0)) 
+   	  B(source) = B(source)-(g.edges.data.value(edge_cnt)-oldCurrent);
+        end
+        if(~(sink==0)) 
+   	  B(sink) =B(sink) + (g.edges.data.value(edge_cnt)-oldCurrent);
+        end
+      end   	  
+      clear tempWave;
+    end
+  end
+endfunction
+
diff --git a/OSCAD/LPCSim/LPCSim/Main.sci b/OSCAD/LPCSim/LPCSim/Main.sci
new file mode 100644
index 0000000..867bdec
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/Main.sci
@@ -0,0 +1,293 @@
+// Main.sci is a main scilab file of a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012
+warning('off');
+clear
+global('LPCSim_HOME')
+OSCAD_HOME="/home/hardik/OSCAD"
+LPCSim_HOME=OSCAD_HOME+'/LPCSim/LPCSim/'
+//%format('e',10);
+MaxNRitr=100;
+symbolic=%F;
+displayMatrix=%F;
+
+// Open the circuit file
+try
+  fid = mopen(LPCSim_HOME+"option", 'r');
+  if (fid == -1)
+    error("cannot open file for reading");
+  end
+  tempStr=mgetl(fid,1);
+  tempStr=stripblanks(tempStr);
+  [option] = sscanf(tempStr, "%d");
+catch
+  disp("Can not open option. Running default mode");
+  option=1
+end
+
+if (option == 1)
+ symbolic=%T
+elseif (option == 2)
+ symbolic=%T
+ displayMatrix=%T
+end
+
+// Metanet Graph library
+  // exec('metanet-0.4/loader.sce',-1);
+
+// Supporting function library
+exec(LPCSim_HOME+'support/atof.sci',-1);
+exec(LPCSim_HOME+'support/findIndex.sci',-1);
+
+exec(LPCSim_HOME+'lib/mos.sci',-1);
+exec(LPCSim_HOME+'readfile.sci',-1);
+exec(LPCSim_HOME+'buildMatrices.sci',-1);
+exec(LPCSim_HOME+'buildMatricesSymbolic.sci',-1);
+exec(LPCSim_HOME+'OpAnalysis.sci',-1);
+exec(LPCSim_HOME+'NR.sci',-1);
+exec(LPCSim_HOME+'genrateCallingLibF.sci',-1);
+exec(LPCSim_HOME+'printSolution.sci',-1);
+exec(LPCSim_HOME+'tranAnalysis.sci',-1);
+exec(LPCSim_HOME+'DCAnalysis.sci',-1);
+exec(LPCSim_HOME+'ACAnalysis.sci',-1);
+//getf('LUT/ids.sce');
+fileName = 'ckt/nodalExample.ckt';
+fileName = 'ckt/ModifiednodalExample.ckt';
+fileName = 'ckt/linear.ckt';
+fileName = 'ckt/ForwardBiasedDiode.ckt';
+fileName = 'ckt/bridge.ckt';
+//fileName='ckt/Vsweep.ckt';
+//fileName='ckt/myCompSweep.ckt';
+//fileName='ckt/rc1.ckt';
+//fileName='ckt/rc_ac.ckt'
+fileName='ckt/HWRectifierFilter.ckt';
+//fileName = readc_();
+args=sciargs();
+fileName= args(5);
+
+global('g');
+global('model')
+global('wave')
+global('cValue','cInitial')
+global('vPrintList','vPlotList')
+global('iPrintList','iPlotList')
+global('initialVoltage')
+global('displayNLFlag');
+global('NLFlag');
+global('dynamicFlag');
+global('currentAnalysis')
+global('nodeMap')
+displayNLFlag=%T;
+dynamicFlag=%F;
+NLFlag=%F;
+currentAnalysis=0;
+
+// Get circuit analysis option from circuit file 
+[transParameter,sweep,Analysis,_Nodes]=getAnalysisOption(fileName);
+
+// Read circuit form file and convert it into graph
+_T=convertCircuitIntoGraph(fileName,_Nodes); 
+
+// Build Modified Nodal Matrix for linear devices
+[A,B]=buildMatrices(_T);
+
+if symbolic then
+  mprintf("-----------------------------------------------------------\n");
+  mprintf("Simulation of %s: \n",fileName);
+  [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T);
+  if displayMatrix then
+    mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n");
+    mprintf("Where A, D and C represent matrices corresponding to linear,\n  nonlinear and time dependent electrical elements respectively.\n");
+    mprintf("  b represents the vector corresponding to sources.\n"); 
+    mprintf("-----------------------------------------------------------\n");
+    if dynamicFlag then
+      disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+    elseif NLFlag then
+      disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+    else
+      disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A=");
+    end
+    mprintf("The number of equations are %d\n",_Nodes+_T-1);
+    mprintf("Unknowns:\n");
+    mprintf("  Node potentials: %d Current Variables: %d\n",_Nodes-1,_T);
+    mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n");
+    pause;
+  end
+end
+
+// Perform Operating Point Analysis on static circuit
+if symbolic then
+  mprintf("-----------------------------------------------------------\n");
+  mprintf("Operating Point (DC) Analysis: \n");
+  mprintf("All capacitors are open circuited and inductors are short circuited \n");
+  [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T);
+  if displayMatrix then
+    mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n");
+    mprintf("Where A and D represent matrices corresponding to linear,\n  and nonlinear electrical elements respectively.\n");
+    mprintf("  b represents the vector corresponding to sources.\n"); 
+    mprintf("-----------------------------------------------------------\n");
+    if NLFlag then
+      disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+    else
+      disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A=");
+    end
+    mprintf("The number of equations are %d\n",_Nodes+_T-1);
+    mprintf("Unknowns:\n");
+    mprintf("  Node potentials: %d Current Variables: %d\n",_Nodes-1,_T);
+    mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n");
+    pause;
+  end
+end
+[A,B,x]=OPAnalysis(A,B);
+if displayMatrix then
+  mprintf("-----------------------------------------------------------\n");
+  mprintf("Operating Point (DC) Analysis: \n");
+  mprintf("All capacitors are open circuited and inductors are short circuited \n");
+  mprintf("The system of equations Ax=b (Numerically):\n");
+  mprintf("-----------------------------------------------------------\n");
+  format('e',10);
+  disp(B,"B=",A,"A=");
+  pause;
+end
+
+if displayMatrix then
+  mprintf("-----------------------------------------------------\n");
+  mprintf("The solution of the circuit x:\n");
+  mprintf("-----------------------------------------------------\n");
+  format('e',10);
+  disp(x,"x=");
+  pause;
+end
+
+// Find branch voltage from node potential
+voltage=findBranchVoltage(x);
+
+// Find branch current from branch voltage using device characteristic
+current=findBranchCurrent(x,voltage);
+
+// Print the Operating Point Solution
+fileName=fileName+".sol";
+Wmode="w"; 
+printOPSolution(fileName,voltage,current,Wmode);
+mprintf("-----------------------------------------------------\n");
+mprintf("The complete solution (Operating Point) of the circuit\n\t is written in %s\n",fileName);
+mprintf("-----------------------------------------------------\n");
+
+if(Analysis==1)      // Transient Analysis  
+  currentAnalysis=1;
+  mprintf("-----------------------------------------------------\n");
+  mprintf("Transient Analysis: \n");
+  mprintf("-----------------------------------------------------\n");
+  global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray');
+
+  if symbolic then
+    [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T);
+    if displayMatrix then
+      mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n");
+      mprintf("Where A, D and C represent matrices corresponding to linear,\n  nonlinear and time dependent electrical elements respectively.\n");
+      mprintf("  b represents the vector corresponding to sources.\n"); 
+      mprintf("-----------------------------------------------------------\n");
+      if dynamicFlag then
+        disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+      elseif NLFlag then
+        disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+      else
+        disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A=");
+      end
+      mprintf("The number of equations are %d\n",_Nodes+_T-1);
+      mprintf("Unknowns:\n");
+      mprintf("  Node potentials: %d Current Variables: %d\n",_Nodes-1,_T);
+      mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n");
+      pause;
+    end
+  end
+  
+  // Perform Transient Analysis on static circuit
+  if symbolic then
+    mprintf("-----------------------------------------------------------\n");
+    mprintf("A static circuit at time t: \n");
+    [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T);
+    if displayMatrix then
+      mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n");
+      mprintf("Where A and D represent matrices corresponding to linear,\n  and nonlinear electrical elements respectively.\n");
+      mprintf("  b represents the vector corresponding to sources.\n"); 
+      mprintf("-----------------------------------------------------------\n");
+      if NLFlag then
+        disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+      else
+        disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A=");
+      end
+      mprintf("The number of equations are %d\n",_Nodes+_T-1);
+      mprintf("Unknowns:\n");
+      mprintf("  Node potentials: %d Current Variables: %d\n",_Nodes-1,_T);
+      mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n");
+      pause;
+    end
+  end
+
+  t_start=transParameter(1);
+  t_end=transParameter(2);
+  t_step=transParameter(3);
+  UIC=transParameter(4);
+  t_itr=(t_end-t_start)/t_step+2;
+  initArrays(t_itr);
+  sweepArray = zeros(t_itr,1);
+  i=1;
+ // Find Initial condition at t=0
+  [x]=setIntialCondition(A,B,x,_T,UIC);
+ // Store Output Variable for plotting/printing 
+  buildOutput(x,0,i);
+  i=i+1;
+  for t=t_start:t_step:t_end
+    if(i==2) t=t+t_step/100; end;
+    [A,B,x]=transientAnalysis(A,B,x,t,i);
+    i=i+1;
+  end
+  xaxis='time(sec)';
+  printSolution(sweepArray,xaxis,'lin');
+end
+
+if(Analysis==2)    // DC Analysis
+  global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray');
+  s_start=sweep(1);
+  s_end=sweep(2);
+  s_step=sweep(3);
+  s_itr=(s_end-s_start)/s_step+1;
+  initArrays(s_itr);
+  sweepArray = zeros(s_itr,1);
+  i=1;
+  for s=s_start:s_step:s_end
+     [A,B,x]=DCAnalysis(A,B,s);
+     buildOutput(x,s,i);
+     i=i+1;
+  end
+  xaxis='Voltage(V)';
+  printSolution(sweepArray,xaxis,'lin');
+end
+
+if(Analysis==3)    // AC Analysis
+  global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray');
+  f_start=sweep(1);
+  f_end=sweep(2);
+  f_itr=sweep(3)+1;
+  axisType=sweep(4);
+  f_step=(f_end-f_start)/(f_itr-1);
+  initArrays(f_itr);
+  sweepArray = zeros(f_itr,1);
+  i=1;
+  buildOutput(x,0,i);
+  i=i+1;
+  for f=f_start:f_step:f_end
+     [A,B,x]=ACAnalysis(A,B,f);
+     buildDCOutput(x,f,i);
+     i=i+1;
+  end
+  xaxis='frequency(Hz)';
+  printSolution(sweepArray,xaxis,axisType);
+end
+clearglobal();
+//quit
+///////////////////////////////////////////////////////////////////////////////   
diff --git a/OSCAD/LPCSim/LPCSim/MainInstall.sci b/OSCAD/LPCSim/LPCSim/MainInstall.sci
new file mode 100644
index 0000000..9c7415e
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/MainInstall.sci
@@ -0,0 +1,293 @@
+// Main.sci is a main scilab file of a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012
+warning('off');
+clear
+global('LPCSim_HOME')
+OSCAD_HOME=set_PATH_to_OSCAD
+LPCSim_HOME=OSCAD_HOME+'/LPCSim/LPCSim/'
+//%format('e',10);
+MaxNRitr=100;
+symbolic=%F;
+displayMatrix=%F;
+
+// Open the circuit file
+try
+  fid = mopen(LPCSim_HOME+"option", 'r');
+  if (fid == -1)
+    error("cannot open file for reading");
+  end
+  tempStr=mgetl(fid,1);
+  tempStr=stripblanks(tempStr);
+  [option] = sscanf(tempStr, "%d");
+catch
+  disp("Can not open option. Running default mode");
+  option=1
+end
+
+if (option == 1)
+ symbolic=%T
+elseif (option == 2)
+ symbolic=%T
+ displayMatrix=%T
+end
+
+// Metanet Graph library
+  // exec('metanet-0.4/loader.sce',-1);
+
+// Supporting function library
+exec(LPCSim_HOME+'support/atof.sci',-1);
+exec(LPCSim_HOME+'support/findIndex.sci',-1);
+
+exec(LPCSim_HOME+'lib/mos.sci',-1);
+exec(LPCSim_HOME+'readfile.sci',-1);
+exec(LPCSim_HOME+'buildMatrices.sci',-1);
+exec(LPCSim_HOME+'buildMatricesSymbolic.sci',-1);
+exec(LPCSim_HOME+'OpAnalysis.sci',-1);
+exec(LPCSim_HOME+'NR.sci',-1);
+exec(LPCSim_HOME+'genrateCallingLibF.sci',-1);
+exec(LPCSim_HOME+'printSolution.sci',-1);
+exec(LPCSim_HOME+'tranAnalysis.sci',-1);
+exec(LPCSim_HOME+'DCAnalysis.sci',-1);
+exec(LPCSim_HOME+'ACAnalysis.sci',-1);
+//getf('LUT/ids.sce');
+fileName = 'ckt/nodalExample.ckt';
+fileName = 'ckt/ModifiednodalExample.ckt';
+fileName = 'ckt/linear.ckt';
+fileName = 'ckt/ForwardBiasedDiode.ckt';
+fileName = 'ckt/bridge.ckt';
+//fileName='ckt/Vsweep.ckt';
+//fileName='ckt/myCompSweep.ckt';
+//fileName='ckt/rc1.ckt';
+//fileName='ckt/rc_ac.ckt'
+fileName='ckt/HWRectifierFilter.ckt';
+//fileName = readc_();
+args=sciargs();
+fileName= args(5);
+
+global('g');
+global('model')
+global('wave')
+global('cValue','cInitial')
+global('vPrintList','vPlotList')
+global('iPrintList','iPlotList')
+global('initialVoltage')
+global('displayNLFlag');
+global('NLFlag');
+global('dynamicFlag');
+global('currentAnalysis')
+global('nodeMap')
+displayNLFlag=%T;
+dynamicFlag=%F;
+NLFlag=%F;
+currentAnalysis=0;
+
+// Get circuit analysis option from circuit file 
+[transParameter,sweep,Analysis,_Nodes]=getAnalysisOption(fileName);
+
+// Read circuit form file and convert it into graph
+_T=convertCircuitIntoGraph(fileName,_Nodes); 
+
+// Build Modified Nodal Matrix for linear devices
+[A,B]=buildMatrices(_T);
+
+if symbolic then
+  mprintf("-----------------------------------------------------------\n");
+  mprintf("Simulation of %s: \n",fileName);
+  [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T);
+  if displayMatrix then
+    mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n");
+    mprintf("Where A, D and C represent matrices corresponding to linear,\n  nonlinear and time dependent electrical elements respectively.\n");
+    mprintf("  b represents the vector corresponding to sources.\n"); 
+    mprintf("-----------------------------------------------------------\n");
+    if dynamicFlag then
+      disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+    elseif NLFlag then
+      disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+    else
+      disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A=");
+    end
+    mprintf("The number of equations are %d\n",_Nodes+_T-1);
+    mprintf("Unknowns:\n");
+    mprintf("  Node potentials: %d Current Variables: %d\n",_Nodes-1,_T);
+    mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n");
+    pause;
+  end
+end
+
+// Perform Operating Point Analysis on static circuit
+if symbolic then
+  mprintf("-----------------------------------------------------------\n");
+  mprintf("Operating Point (DC) Analysis: \n");
+  mprintf("All capacitors are open circuited and inductors are short circuited \n");
+  [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T);
+  if displayMatrix then
+    mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n");
+    mprintf("Where A and D represent matrices corresponding to linear,\n  and nonlinear electrical elements respectively.\n");
+    mprintf("  b represents the vector corresponding to sources.\n"); 
+    mprintf("-----------------------------------------------------------\n");
+    if NLFlag then
+      disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+    else
+      disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A=");
+    end
+    mprintf("The number of equations are %d\n",_Nodes+_T-1);
+    mprintf("Unknowns:\n");
+    mprintf("  Node potentials: %d Current Variables: %d\n",_Nodes-1,_T);
+    mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n");
+    pause;
+  end
+end
+[A,B,x]=OPAnalysis(A,B);
+if displayMatrix then
+  mprintf("-----------------------------------------------------------\n");
+  mprintf("Operating Point (DC) Analysis: \n");
+  mprintf("All capacitors are open circuited and inductors are short circuited \n");
+  mprintf("The system of equations Ax=b (Numerically):\n");
+  mprintf("-----------------------------------------------------------\n");
+  format('e',10);
+  disp(B,"B=",A,"A=");
+  pause;
+end
+
+if displayMatrix then
+  mprintf("-----------------------------------------------------\n");
+  mprintf("The solution of the circuit x:\n");
+  mprintf("-----------------------------------------------------\n");
+  format('e',10);
+  disp(x,"x=");
+  pause;
+end
+
+// Find branch voltage from node potential
+voltage=findBranchVoltage(x);
+
+// Find branch current from branch voltage using device characteristic
+current=findBranchCurrent(x,voltage);
+
+// Print the Operating Point Solution
+fileName=fileName+".sol";
+Wmode="w"; 
+printOPSolution(fileName,voltage,current,Wmode);
+mprintf("-----------------------------------------------------\n");
+mprintf("The complete solution (Operating Point) of the circuit\n\t is written in %s\n",fileName);
+mprintf("-----------------------------------------------------\n");
+
+if(Analysis==1)      // Transient Analysis  
+  currentAnalysis=1;
+  mprintf("-----------------------------------------------------\n");
+  mprintf("Transient Analysis: \n");
+  mprintf("-----------------------------------------------------\n");
+  global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray');
+
+  if symbolic then
+    [Asymb,Bsymb,Dsymb,Csymb,xsymb,fxsymb]=buildMatricesSymbolic(_T);
+    if displayMatrix then
+      mprintf("The system of equations Ax+D_f(w)+C(dx/dt)=b (Symbolically):\n");
+      mprintf("Where A, D and C represent matrices corresponding to linear,\n  nonlinear and time dependent electrical elements respectively.\n");
+      mprintf("  b represents the vector corresponding to sources.\n"); 
+      mprintf("-----------------------------------------------------------\n");
+      if dynamicFlag then
+        disp(fxsymb,"w=",xsymb,"x=",Csymb,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+      elseif NLFlag then
+        disp(fxsymb,"w=",xsymb,"x=",0,"C=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+      else
+        disp(fxsymb,"w=",xsymb,"x=",0,"C=",0,"D_f=",Bsymb,"B=",Asymb,"A=");
+      end
+      mprintf("The number of equations are %d\n",_Nodes+_T-1);
+      mprintf("Unknowns:\n");
+      mprintf("  Node potentials: %d Current Variables: %d\n",_Nodes-1,_T);
+      mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n");
+      pause;
+    end
+  end
+  
+  // Perform Transient Analysis on static circuit
+  if symbolic then
+    mprintf("-----------------------------------------------------------\n");
+    mprintf("A static circuit at time t: \n");
+    [Asymb,Bsymb,Dsymb,xsymb,fxsymb]=buildMatricesSymbStatic(_T);
+    if displayMatrix then
+      mprintf("The system of equations Ax+D_f(w))=b (Symbolically):\n");
+      mprintf("Where A and D represent matrices corresponding to linear,\n  and nonlinear electrical elements respectively.\n");
+      mprintf("  b represents the vector corresponding to sources.\n"); 
+      mprintf("-----------------------------------------------------------\n");
+      if NLFlag then
+        disp(fxsymb,"w=",xsymb,"x=",Dsymb,"D_f=",Bsymb,"B=",Asymb,"A=");
+      else
+        disp(fxsymb,"w=",xsymb,"x=",0,"D_f=",Bsymb,"B=",Asymb,"A=");
+      end
+      mprintf("The number of equations are %d\n",_Nodes+_T-1);
+      mprintf("Unknowns:\n");
+      mprintf("  Node potentials: %d Current Variables: %d\n",_Nodes-1,_T);
+      mprintf("Note that the matrix contains r entries (corresponding to resistors) whose values are equal to 1/r\n");
+      pause;
+    end
+  end
+
+  t_start=transParameter(1);
+  t_end=transParameter(2);
+  t_step=transParameter(3);
+  UIC=transParameter(4);
+  t_itr=(t_end-t_start)/t_step+2;
+  initArrays(t_itr);
+  sweepArray = zeros(t_itr,1);
+  i=1;
+ // Find Initial condition at t=0
+  [x]=setIntialCondition(A,B,x,_T,UIC);
+ // Store Output Variable for plotting/printing 
+  buildOutput(x,0,i);
+  i=i+1;
+  for t=t_start:t_step:t_end
+    if(i==2) t=t+t_step/100; end;
+    [A,B,x]=transientAnalysis(A,B,x,t,i);
+    i=i+1;
+  end
+  xaxis='time(sec)';
+  printSolution(sweepArray,xaxis,'lin');
+end
+
+if(Analysis==2)    // DC Analysis
+  global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray');
+  s_start=sweep(1);
+  s_end=sweep(2);
+  s_step=sweep(3);
+  s_itr=(s_end-s_start)/s_step+1;
+  initArrays(s_itr);
+  sweepArray = zeros(s_itr,1);
+  i=1;
+  for s=s_start:s_step:s_end
+     [A,B,x]=DCAnalysis(A,B,s);
+     buildOutput(x,s,i);
+     i=i+1;
+  end
+  xaxis='Voltage(V)';
+  printSolution(sweepArray,xaxis,'lin');
+end
+
+if(Analysis==3)    // AC Analysis
+  global('sweepArray','vPrintArray','vPlotArray','iPrintArray','iPlotArray');
+  f_start=sweep(1);
+  f_end=sweep(2);
+  f_itr=sweep(3)+1;
+  axisType=sweep(4);
+  f_step=(f_end-f_start)/(f_itr-1);
+  initArrays(f_itr);
+  sweepArray = zeros(f_itr,1);
+  i=1;
+  buildOutput(x,0,i);
+  i=i+1;
+  for f=f_start:f_step:f_end
+     [A,B,x]=ACAnalysis(A,B,f);
+     buildDCOutput(x,f,i);
+     i=i+1;
+  end
+  xaxis='frequency(Hz)';
+  printSolution(sweepArray,xaxis,axisType);
+end
+clearglobal();
+//quit
+///////////////////////////////////////////////////////////////////////////////   
diff --git a/OSCAD/LPCSim/LPCSim/NR.sci b/OSCAD/LPCSim/LPCSim/NR.sci
new file mode 100644
index 0000000..6e0baa2
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/NR.sci
@@ -0,0 +1,233 @@
+// NR.sci is a scilab file to perform linearization of nonlinear element using Newton-Raphson method. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012
+
+
+function flag=checkForDeviceChar(voltage,current)
+  global g;
+  global model;
+  Edges=edge_number(g);
+  flag=%t;
+  X=1;
+  for edge_cnt = 1:Edges,
+    if(g.edges.data.type(edge_cnt)=='D')
+       tempModel=model(X);
+       Is=tempModel(2); Vt=tempModel(3);
+       currentByDiodeChar=Is*(exp(voltage(edge_cnt)/Vt)-1);
+       diodeCurrent=current(edge_cnt)+current(edge_cnt+1);
+       if(abs(currentByDiodeChar)<1d-9)
+          err=(diodeCurrent-currentByDiodeChar);
+       else
+          err=(diodeCurrent-currentByDiodeChar)*100/currentByDiodeChar;
+       end
+       if(abs(err)>0.001)
+         flag=%f; break;
+       end
+       X=X+1;
+       clear tempModel;
+    elseif(g.edges.data.type(edge_cnt)=='X')
+       tempModel=model(X);
+       generateCallingLibF(tempModel(1));
+       exec('getlib.sci',-1);
+       currentByFunc=func(voltage(edge_cnt),model(X));
+       currentByAnalysis=current(edge_cnt)+current(edge_cnt+1);
+       if(abs(currentByFunc)<1d-9)
+         err=(currentByAnalysis-currentByFunc);
+       else
+         err=(currentByAnalysis-currentByFunc)*100/currentByFunc;
+       end
+       if(abs(err)>0.001)
+         flag=%f; break;
+       end
+       X=X+1;
+       clear tempModel;
+    elseif(g.edges.data.type(edge_cnt)=='M')
+       Vgs=voltage(edge_cnt+2);
+       Vds=voltage(edge_cnt);
+       tempModel=model(X);
+       [Vt,beta1]=getMosPara(tempModel);
+       if(tempModel(1)=='P')
+          if(Vgs>Vt)  //Cut-OFF region
+            currentByFunc=0;
+          elseif((Vgs<=Vt) & (Vds<(Vgs-Vt))) // Saturation region
+            currentByFunc=-beta1/2*(Vgs-Vt)*(Vgs-Vt);
+          else                              // Linear region
+            currentByFunc=-beta1*((Vgs-Vt)*Vds-Vds*Vds/2);
+          end
+       else
+          if(Vgs<Vt)  //Cut-OFF region
+            currentByFunc=0;
+          elseif((Vgs>=Vt) & (Vds>(Vgs-Vt))) // Saturation region
+            currentByFunc=beta1/2*(Vgs-Vt)*(Vgs-Vt);
+          else                              // Linear region
+            currentByFunc=beta1*((Vgs-Vt)*Vds-Vds*Vds/2);
+          end
+       end
+       currentByAnalysis=current(edge_cnt)+current(edge_cnt+1);
+       if(abs(currentByFunc)<1d-9)
+         err=(currentByAnalysis-currentByFunc);
+       else
+         err=(currentByAnalysis-currentByFunc)*100/currentByFunc;
+       end
+       if(abs(err)>0.0001)
+         flag=%f; break;
+       end
+       X=X+1;
+       clear tempModel;
+    end
+  end
+endfunction
+
+function [A,B]=NR(A,B,voltage,current,NRitr)
+  global g;
+  global model;
+  X=1;
+  Edges=edge_number(g);
+  for edge_cnt = 1:Edges,
+   if(g.edges.data.type(edge_cnt)=='D')
+     tempModel=model(X);
+     Is=tempModel(2); Vt=tempModel(3);  Vtlimit=80*Vt;  // Diode Parameter
+     tempVoltage=voltage(edge_cnt);
+     tempCurrent=current(edge_cnt)+current(edge_cnt+1);
+// Voltage Limiting
+     if(~(tempVoltage==0))
+        while(tempVoltage > Vtlimit)
+          tempVoltage = log(tempVoltage);
+        end
+        while(tempVoltage < -Vtlimit)
+          tempVoltage = -log(-tempVoltage);
+        end
+     end
+// In forword bisaed use diode current to find voltage 
+     if(tempVoltage>=0 & tempCurrent>=0)
+       tempVoltage = Vt*log(tempCurrent/Is+1);
+     end  
+// Update diode conductance and current source
+     Gnew=Is/Vt*exp(tempVoltage/Vt);
+     Gupdate=Gnew-g.edges.data.value(edge_cnt)
+     g.edges.data.value(edge_cnt)=Gnew;
+     Inew=Is*(exp(tempVoltage/Vt)-1)-Gnew*tempVoltage;
+     Iupdate=Inew-g.edges.data.value(edge_cnt+1); 
+     g.edges.data.value(edge_cnt+1)=Inew;
+// Update matrix A and rhs vector
+     source=g.edges.tail(edge_cnt)-1;
+     sink=g.edges.head(edge_cnt)-1;
+     if(~(source==0)) 
+       A(source,source) = A(source,source) + Gupdate;
+       B(source) = B(source)-Iupdate;
+     end
+     if(~(sink==0)) 
+       A(sink,sink) = A(sink,sink) + Gupdate;
+       B(sink) =B(sink) + Iupdate;
+     end
+     if(~(sink==0) & ~(source==0))
+       A(source,sink) = A(source,sink) - Gupdate;
+       A(sink,source) = A(sink,source) - Gupdate;
+     end
+     X=X+1;
+     clear tempModel;
+   elseif(g.edges.data.type(edge_cnt)=='X')
+     tempVoltage=voltage(edge_cnt);
+     tempCurrent=current(edge_cnt)+current(edge_cnt+1);
+     tempModel=model(X);
+     generateCallingLibF(tempModel(1));
+     exec('getlib.sci',-1);
+// Update conductance and current source of nonlinear device
+     Gnew=jacobian(tempVoltage,model(X));
+     Gupdate=Gnew-g.edges.data.value(edge_cnt)
+     g.edges.data.value(edge_cnt)=Gnew;
+     Inew=func(tempVoltage,model(X))-Gnew*tempVoltage;
+     Iupdate=Inew-g.edges.data.value(edge_cnt+1); 
+     g.edges.data.value(edge_cnt+1)=Inew;
+// Update matrix A and rhs vector
+     source=g.edges.tail(edge_cnt)-1;
+     sink=g.edges.head(edge_cnt)-1;
+     if(~(source==0)) 
+       A(source,source) = A(source,source) + Gupdate;
+       B(source) = B(source)-Iupdate;
+     end
+     if(~(sink==0)) 
+       A(sink,sink) = A(sink,sink) + Gupdate;
+       B(sink) =B(sink) + Iupdate;
+     end
+     if(~(sink==0) & ~(source==0))
+       A(source,sink) = A(source,sink) - Gupdate;
+       A(sink,source) = A(sink,source) - Gupdate;
+     end
+     X=X+1;  
+     clear tempModel;
+   elseif(g.edges.data.type(edge_cnt)=='M')
+     Vgs=voltage(edge_cnt+2);
+     Vds=voltage(edge_cnt);
+     tempModel=model(X);
+     [Vt,beta1]=getMosPara(tempModel);
+     Vtlimit=abs(80*Vt);
+// MOS Voltage Limiting
+     if(~(Vgs==0))
+        while(Vgs > Vtlimit)
+          Vgs = log(Vgs)
+        end
+        while(Vgs < -Vtlimit)
+          Vgs = -log(-Vgs)
+        end
+     end
+     if(~(Vds==0))
+        while(Vds > Vtlimit)
+          Vds = log(Vds);
+        end
+        while(Vds < -Vtlimit)
+          Vds = -log(-Vds);
+        end
+     end
+// Update conductance and current source of MOSFET 
+     if(tempModel(1)=='P')
+        if(Vgs>Vt)  //Cut-OFF region
+           Gnew=1e-12;
+           Inew=0;
+        elseif((Vgs<=Vt) & (Vds<(Vgs-Vt))) // Saturation region
+           Gnew=1e-12;
+           Inew=-beta1/2*(Vgs-Vt)*(Vgs-Vt);
+        else                              // Linear region
+           Gnew=abs(beta1*((-Vgs+Vt)+Vds));
+           Inew=-beta1/2*Vds*Vds;
+        end
+     else
+        if(Vgs<Vt)  //Cut-OFF region
+           Gnew=1e-12;
+           Inew=0;
+        elseif((Vgs>=Vt) & (Vds>(Vgs-Vt))) // Saturation region
+           Gnew=1e-12;
+           Inew=beta1/2*(Vgs-Vt)*(Vgs-Vt);
+        else                              // Linear region
+           Gnew=abs(beta1*((Vgs-Vt)-Vds));
+           Inew=beta1/2*Vds*Vds;
+        end
+     end
+     Gupdate=Gnew-g.edges.data.value(edge_cnt)
+     g.edges.data.value(edge_cnt)=Gnew;
+     Iupdate=Inew-g.edges.data.value(edge_cnt+1); 
+     g.edges.data.value(edge_cnt+1)=Inew;
+// Update matrix A and rhs vector
+     source=g.edges.tail(edge_cnt)-1;
+     sink=g.edges.head(edge_cnt)-1;
+     if(~(source==0)) 
+       A(source,source) = A(source,source) + Gupdate;
+       B(source) = B(source)-Iupdate;
+     end
+     if(~(sink==0)) 
+       A(sink,sink) = A(sink,sink) + Gupdate;
+       B(sink) =B(sink) + Iupdate;
+     end
+     if(~(sink==0) & ~(source==0))
+       A(source,sink) = A(source,sink) - Gupdate;
+       A(sink,source) = A(sink,source) - Gupdate;
+     end
+     X=X+1;  
+     clear tempModel;
+   end
+  end
+endfunction 
+
diff --git a/OSCAD/LPCSim/LPCSim/OpAnalysis.sci b/OSCAD/LPCSim/LPCSim/OpAnalysis.sci
new file mode 100644
index 0000000..57e2d98
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/OpAnalysis.sci
@@ -0,0 +1,138 @@
+// OpAnalysis.sci is a scilab file to perform Operating point Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012
+
+function [A,B,x]=OPAnalysis(A,B)
+  global displayNLFlag;
+  global g;
+  global model;
+  global LPCSim_HOME;
+// Find node potetial and current through devices whose device characteristic can not be expressed in terms of voltage
+  x=findNodePotential(A,B);
+
+// Find branch voltage from node potential
+  voltage=findBranchVoltage(x);
+
+// Find branch current from branch voltage using device characteristic
+  current=findBranchCurrent(x,voltage);
+
+  if(NLFlag) then
+    if symbolic then
+      if displayNLFlag then
+        mprintf("-----------------------------------------------------------\n");
+        mprintf("Application of Newton-Raphson method: \n");
+        disp('Nonliner models:');
+        Edges=edge_number(g);
+        X=1;
+        for edge_cnt = 1:Edges,
+          if(g.edges.data.type(edge_cnt)=='D')
+            tempModel=model(X);
+            Is=tempModel(2); Vt=tempModel(3);
+            X=X+1;
+            devName=strsplit(g.edges.data.devName(edge_cnt),1);
+            devSubscript=devName(2);
+            mprintf("See linearized model for diode D%s in diode_D%s.eps\n",devSubscript,devSubscript); 
+            unix_g('cp '+LPCSim_HOME+'/diode_Dref.pstex .');
+            unix_g('cp '+LPCSim_HOME+'/diode_Dref.pstex_t .');
+            unix_g('cp '+LPCSim_HOME+'/latfont* .');
+            unix_g(LPCSim_HOME+'/nonlinearDevice.sh ' + devSubscript);
+            displayNLFlag=%F;
+          end
+        end
+        [Asymb,Bsymb,Csymb,xsymb]=buildMatricesSymbLin(_T);
+        if displayMatrix then
+          mprintf("The system of equations Ax=b (Symbolically):\n");
+          mprintf("Where Ax=b represents equations after linearization of nonlinear elements.\n");
+          mprintf("-----------------------------------------------------------\n");
+          disp(xsymb,"x=",Bsymb,"B=",Asymb,"A=");
+          pause;
+        end
+      end
+    end
+      
+    for i=1:MaxNRitr
+// Check device characteristic of non-linear devices
+      flag=checkForDeviceChar(voltage,current);
+      if(flag) break; end
+// Call Newton Raphson method to update the value of linearized model of nonlinear devices
+      [A,B]=NR(A,B,voltage,current,i-1);
+      if displayMatrix then
+        mprintf("-----------------------------------------------------------\n");
+        mprintf("Operating Point (DC) Analysis: \n");
+        mprintf("NR Iteration: %d \n",i);
+        mprintf("The system of equations Ax=b (Numerically):\n");
+        mprintf("-----------------------------------------------------------\n");
+        format('e',10);
+        disp(B,"B=",A,"A=");
+      end
+
+      x=findNodePotential(A,B);
+      if displayMatrix then
+        mprintf("-----------------------------------------------------\n");
+        mprintf("The solution of the circuit x:\n");
+        mprintf("-----------------------------------------------------\n");
+        format('e',10);
+        disp(x,"x=");
+        pause;
+      end
+      voltage=findBranchVoltage(x);
+      current=findBranchCurrent(x,voltage);
+    end
+  end
+endfunction
+
+function x=findNodePotential(A,B)
+// START: Solving Ax=B for Node potential x
+  A_sparse=sparse(A);   
+  x=lusolve(A_sparse,B);
+  clear A_sparse;
+// END: Solving Ax=B for x
+endfunction
+
+function voltage=findBranchVoltage(x)
+// Find voltages of complete network 
+  global g;
+  Edges=edge_number(g);
+  voltage=zeros(Edges,1)
+  for edge_cnt = 1:Edges,
+     if(g.edges.head(edge_cnt)==1)
+  	voltage(edge_cnt)=x(g.edges.tail(edge_cnt)-1);
+     elseif(g.edges.tail(edge_cnt)==1)
+  	voltage(edge_cnt)=-x(g.edges.head(edge_cnt)-1);
+     else 
+  	voltage(edge_cnt)=x(g.edges.tail(edge_cnt)-1)-x(g.edges.head(edge_cnt)-1);
+     end     
+  end
+endfunction
+
+function current=findBranchCurrent(x,voltage)
+  global g;
+  T=1;
+  Nodes=node_number(g);
+  Edges=edge_number(g);
+  current=zeros(Edges,1)
+  for edge_cnt = 1:Edges,
+     if(g.edges.data.type(edge_cnt)=='R'|g.edges.data.type(edge_cnt)=='D'|g.edges.data.type(edge_cnt)=='X'|g.edges.data.type(edge_cnt)=='M')
+  	current(edge_cnt)=g.edges.data.value(edge_cnt)*voltage(edge_cnt);
+     elseif(g.edges.data.type(edge_cnt)=='V')
+  	current(edge_cnt)=x(Nodes-1+T);
+  	T=T+1;
+     elseif(g.edges.data.type(edge_cnt)=='E')
+  	current(edge_cnt)=x(Nodes-1+T);
+  	T=T+1;
+     elseif(g.edges.data.type(edge_cnt)=='F')
+  	current(edge_cnt)=x(Nodes-1+T);
+  	T=T+1;
+     elseif(g.edges.data.type(edge_cnt)=='H')
+  	current(edge_cnt)=x(Nodes-1+T);
+  	T=T+1;
+     elseif(g.edges.data.type(edge_cnt)=='G')
+  	current(edge_cnt)=voltage(edge_cnt+1)*g.edges.data.value(edge_cnt);
+     else      
+  	current(edge_cnt)=g.edges.data.value(edge_cnt);
+     end
+  end
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/buildMatrices.sci b/OSCAD/LPCSim/LPCSim/buildMatrices.sci
new file mode 100644
index 0000000..6323b17
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/buildMatrices.sci
@@ -0,0 +1,415 @@
+// buildMatrices.sci is a scilab file to construct a system matrix representing the circuit equations. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+function [A,B]=buildMatrices(_T)
+   ///////////////////////////////////////////////////////////////////////////////
+   // Create Matrice A and  vector B corresponding to circuit equation
+   global g;
+   Nodes=node_number(g);
+   A = zeros(Nodes-1+_T,Nodes-1+_T);
+   B = zeros(Nodes-1+_T,1);
+   
+   _T=1;
+   for edge_cnt = 1:edge_number(g),
+      source=g.edges.tail(edge_cnt)-1;
+      sink=g.edges.head(edge_cnt)-1;
+      value=g.edges.data.value(edge_cnt);
+      select (g.edges.data.type(edge_cnt))
+      case 'R' then   // Resistor
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+
+      case 'I' then  // Current source
+       if(~(source==0)) 
+         B(source) = B(source)-value;
+       end
+       if(~(sink==0)) 
+         B(sink) =B(sink) + value;
+       end
+       
+      case 'V' then // Voltage source
+       if(~(source==0))
+         A(Nodes-1+_T,source) = 1;
+         A(source,Nodes-1+_T) = 1;
+       end
+       if(~(sink==0))
+         A(Nodes-1+_T,sink) = -1;
+         A(sink,Nodes-1+_T) = -1;
+       end  
+       B(Nodes-1+_T) = value;
+       _T=_T+1; 
+       
+      case 'C' then // Capacitor
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+       
+      case 'D' then // Diode
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+       
+      case 'G' then // Voltage controlled current source
+       if(~(source==0)) 
+         if(~(g.edges.tail(edge_cnt+1)-1==0))
+           A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) + value;
+         end
+         if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) - value;
+         end
+       end
+       if(~(sink==0)) 
+         if(~(g.edges.tail(edge_cnt+1)==1))
+            A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) - value;
+         end
+         if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) + value;
+         end
+       end
+       
+      case 'E' then  // Voltage controlled voltage source
+       if(~(source==0))
+         A(source,Nodes-1+_T) = 1;
+         A(Nodes-1+_T,source) = 1;
+        if(~(g.edges.tail(edge_cnt+1)-1==0))
+          A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = value;
+        end
+        if(~(g.edges.head(edge_cnt+1)==1))
+          A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = - value;
+        end
+       end
+       if(~(sink==0))
+          A(sink,Nodes-1+_T) = -1;
+          A(Nodes-1+_T,sink) = -1;
+          if(~(g.edges.tail(edge_cnt+1)-1==0))
+            A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = -value;
+          end
+          if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = value;
+          end
+       end  
+       _T=_T+1;
+        
+      case 'F' then  // Current controlled current source
+        A(Nodes-1+_T,Nodes-1+_T) = 1;
+        A(Nodes-1+_T,Nodes-1+_T-1) = -value;
+        if(~(source==0))
+          A(source,Nodes-1+_T) = 1;
+        end
+        if(~(sink==0))
+          A(sink,Nodes-1+_T) = -1;
+        end  
+        _T=_T+1;
+         
+      case 'H' then // Current controlled voltage source
+        A(Nodes-1+_T,Nodes-1+_T-1) = -value;
+        if(~(source==0))
+          A(source,Nodes-1+_T) = 1;
+          A(Nodes-1+_T,source) = 1;
+        end
+        if(~(sink==0))
+          A(sink,Nodes-1+_T) = -1;
+          A(Nodes-1+_T,sink) = -1;
+        end  
+        _T=_T+1;
+        
+      case 'M' then  // MOSFET
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+       
+      case 'X' then   // User defined component
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+  
+     else
+        exit(0);
+      end
+   end
+endfunction
+
+function [A,B]=buildMatrices2(g,x)
+   ///////////////////////////////////////////////////////////////////////////////
+   // Create Matrices A and B 
+   Nodes=node_number(g);
+   _T=0;
+   for edge_cnt = 1:edge_number(g),
+     if(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='C')
+       _T=_T+1;
+     end
+   end
+   A = zeros(Nodes+_T-1,Nodes+_T-1);
+   B = zeros(Nodes+_T-1,1);
+   
+   _T=1;
+   for edge_cnt = 1:edge_number(g),
+      source=g.edges.tail(edge_cnt)-1;
+      sink=g.edges.head(edge_cnt)-1;
+      value=g.edges.data.value(edge_cnt);
+      select (g.edges.data.type(edge_cnt))
+      case 'R' then // Resistor
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+       
+      case 'M' then // MOSFET
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+       
+      case 'C' then  // Capacitor
+       if(~(source==0))
+         A(Nodes-1+_T,source) = 1;
+         A(source,Nodes-1+_T) = 1;
+       end
+       if(~(sink==0))
+         A(Nodes-1+_T,sink) = -1;
+         A(sink,Nodes-1+_T) = -1;
+       end  
+       if(~(source==0))
+         B(Nodes-1+_T) = B(Nodes-1+_T)+x(source);
+       end
+       if(~(sink==0))
+         B(Nodes-1+_T) = B(Nodes-1+_T)-x(sink);
+       end
+       _T=_T+1;
+        
+      case 'D' then // Diode
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+       
+      case 'G' then // Voltage controlled current source
+       if(~(source==0)) 
+         if(~(g.edges.tail(edge_cnt+1)-1==0))
+           A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) + value;
+         end
+         if(~(g.edges.head(edge_cnt+1)-1==0))
+           A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) - value;
+         end
+       end
+       if(~(sink==0)) 
+         if(~(g.edges.tail(edge_cnt+1)==1))
+           A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) - value;
+         end
+         if(~(g.edges.head(edge_cnt+1)-1==0))
+           A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) + value;
+         end
+       end
+       
+      case 'I' then // Current source
+       if(~(source==0)) 
+         B(source) = B(source)-value;
+       end
+       if(~(sink==0)) 
+         B(sink) =B(sink) + value;
+       end
+       
+      case 'V' then // Voltage Source
+       if(~(source==0))
+         A(Nodes-1+_T,source) = 1;
+         A(source,Nodes-1+_T) = 1;
+       end
+       if(~(sink==0))
+         A(Nodes-1+_T,sink) = -1;
+         A(sink,Nodes-1+_T) = -1;
+       end  
+         B(Nodes-1+_T) = value;
+         _T=_T+1; 
+     
+      case 'E' then
+       if(~(source==0))
+   	 A(source,Nodes-1+_T) = 1;
+   	 A(Nodes-1+_T,source) = -1;
+   	 if(~(g.edges.tail(edge_cnt+1)-1==0))
+   	   A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = value;
+   	 end
+   	 if(~(g.edges.head(edge_cnt+1)==1))
+   	   A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = - value;
+   	 end
+       end
+       if(~(sink==0))
+   	 A(sink,Nodes-1+_T) = -1;
+   	 A(Nodes-1+_T,sink) = 1;
+   	 if(~(g.edges.tail(edge_cnt+1)-1==0))
+   	   A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = -value;
+   	 end
+   	 if(~(g.edges.head(edge_cnt+1)-1==0))
+   	   A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = value;
+   	 end
+       end  
+       _T=_T+1; 
+      case 'F' then
+       A(Nodes-1+_T,Nodes-1+_T) = 1;
+       A(Nodes-1+_T,Nodes-1+_T-1) = -value;
+       if(~(source==0))
+   	 A(source,Nodes-1+_T) = 1;
+       end
+       if(~(sink==0))
+   	 A(sink,Nodes-1+_T) = -1;
+       end  
+       _T=_T+1; 
+      case 'H' then
+       A(Nodes-1+_T,Nodes-1+_T-1) = -value;
+       if(~(source==0))
+   	 A(source,Nodes-1+_T) = 1;
+   	 A(Nodes-1+_T,source) = 1;
+       end
+       if(~(sink==0))
+   	 A(sink,Nodes-1+_T) = -1;
+   	 A(Nodes-1+_T,sink) = -1;
+       end  
+       _T=_T+1; 
+      else
+       exit(0);
+      end
+   end
+endfunction
+
+function [A,B]=buildMatrices3(g)
+   ///////////////////////////////////////////////////////////////////////////////
+   // Create Matrices A and B 
+   Nodes=node_number(g);
+   _T=0;
+   for edge_cnt = 1:edge_number(g),
+     if(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H')
+       _T=_T+1;
+     end
+   end
+   A = zeros(Nodes+_T-1,Nodes+_T-1);
+   B = zeros(Nodes+_T-1,1);
+   
+   _T=1;
+   for edge_cnt = 1:edge_number(g),
+      source=g.edges.tail(edge_cnt)-1;
+      sink=g.edges.head(edge_cnt)-1;
+      value=g.edges.data.value(edge_cnt);
+      select (g.edges.data.type(edge_cnt))
+      case 'R' then
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+      case 'I' then
+       if(~(source==0)) 
+   	 B(source) = B(source)-value;
+       end
+       if(~(sink==0)) 
+   	 B(sink) =B(sink) + value;
+       end
+      case 'V' then
+       if(~(source==0))
+   	 A(Nodes-1+_T,source) = 1;
+   	 A(source,Nodes-1+_T) = 1;
+       end
+       if(~(sink==0))
+   	 A(Nodes-1+_T,sink) = -1;
+   	 A(sink,Nodes-1+_T) = -1;
+       end  
+       B(Nodes-1+_T) = value;
+       _T=_T+1; 
+      case 'E' then
+       if(~(source==0))
+   	 A(source,Nodes-1+_T) = 1;
+   	 A(Nodes-1+_T,source) = -1;
+   	 if(~(g.edges.tail(edge_cnt+1)-1==0))
+   	   A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = value;
+   	 end
+   	 if(~(g.edges.head(edge_cnt+1)==1))
+   	   A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = - value;
+   	 end
+       end
+       if(~(sink==0))
+   	 A(sink,Nodes-1+_T) = -1;
+   	 A(Nodes-1+_T,sink) = 1;
+   	 if(~(g.edges.tail(edge_cnt+1)-1==0))
+   	   A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = -value;
+   	 end
+   	 if(~(g.edges.head(edge_cnt+1)-1==0))
+   	   A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = value;
+   	 end
+       end  
+       _T=_T+1; 
+      case 'H' then
+       A(Nodes-1+_T,Nodes-1+_T-1) = -value;
+       if(~(source==0))
+   	 A(source,Nodes-1+_T) = 1;
+   	 A(Nodes-1+_T,source) = 1;
+       end
+       if(~(sink==0))
+   	 A(sink,Nodes-1+_T) = -1;
+   	 A(Nodes-1+_T,sink) = -1;
+       end  
+       _T=_T+1; 
+      else
+       exit(0);
+      end
+   end
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/buildMatricesSymbolic.sci b/OSCAD/LPCSim/LPCSim/buildMatricesSymbolic.sci
new file mode 100644
index 0000000..66faf87
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/buildMatricesSymbolic.sci
@@ -0,0 +1,802 @@
+// buildMatricesSymbolic.sci is a scilab file to build equations of the circuit symbolically. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012
+warning('off');
+function [A,B,D,C,x,fx]=buildMatricesSymbolic(_T)
+// Create Matrice A,  D, C and  vector b corresponding to circuit equation
+   global g;
+   global('model')
+   Nodes=node_number(g);
+   Edges=edge_number(g);
+   A = emptystr(Nodes-1+_T,Nodes-1+_T);
+   D = emptystr(Nodes-1+_T,length(model));
+   C = emptystr(Nodes-1+_T,Nodes-1+_T);
+   B = emptystr(Nodes-1+_T,1);
+   x = emptystr(Nodes-1+_T,1);
+   fx = emptystr(length(model),1);
+   
+   _T=1;
+   X=1;
+   controlledSourceFlag=%F
+   for i=1:Nodes-1,
+     x(i,1)="v_"+ msprintf("%d",i)
+   end
+   for edge_cnt = 1:edge_number(g),
+      if(controlledSourceFlag)
+        controlledSourceFlag=%F
+        continue
+      end
+      source=g.edges.tail(edge_cnt)-1;
+      sink=g.edges.head(edge_cnt)-1;
+      value=g.edges.data.devName(edge_cnt);
+      select (g.edges.data.type(edge_cnt))
+      case 'R' then   // Resistor
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + "+"+ value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) +"+"+ value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) +"-"+ value;
+         A(sink,source) = A(sink,source) +"-"+ value;
+       end
+
+      case 'I' then  // Current source
+        if(sscanf(value, "%c")=='I')
+          if(~(source==0)) 
+            B(source) = B(source)+"-"+value;
+          end
+          if(~(sink==0)) 
+            B(sink) =B(sink) +"+"+ value;
+          end
+        end
+
+      case 'V' then // Voltage source
+       if(~(source==0))
+         A(Nodes-1+_T,source) = "1";
+         A(source,Nodes-1+_T) = "1";
+       end
+       if(~(sink==0))
+         A(Nodes-1+_T,sink) = "-1";
+         A(sink,Nodes-1+_T) = "-1";
+       end  
+       B(Nodes-1+_T) = value;
+       x(Nodes-1+_T)="i_"+ value;
+       _T=_T+1; 
+       
+      case 'C' then // Capacitor
+        if(~(source==0)) 
+          C(source,source) = C(source,source) +"+"+ value;
+        end
+        if(~(sink==0)) 
+          C(sink,sink) = C(sink,sink) +" + "+ value;
+        end
+        if(~(sink==0) & ~(source==0))
+          C(source,sink) = C(source,sink) +"-"+value;
+          C(sink,source) = C(sink,source) +"-"+value;
+        end
+       
+      case 'D' then // Diode
+       if(~(source==0)) 
+         D(source,X) = value+"_f";
+       end
+       if(~(sink==0)) 
+         D(sink,X) = "-"+ value+"_f";
+       end
+       if(source==0) 
+         fx(X)="(v_"+string(sink)+")";
+       elseif(sink==0)
+         fx(X)="(v_"+string(source)+")";
+       else
+         fx(X)="(v_"+string(source)+",v_"+string(sink)+")";
+       end
+       X=X+1;
+       
+      case 'G' then // Voltage controlled current source
+       if(~(source==0)) 
+         if(~(g.edges.tail(edge_cnt+1)-1==0))
+           A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) +"+"+ convstr(value,'l');
+         end
+         if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) +"-"+ convstr(value,'l');
+         end
+       end
+       if(~(sink==0)) 
+         if(~(g.edges.tail(edge_cnt+1)==1))
+            A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) +"-"+ convstr(value,'l');
+         end
+         if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) +"+"+ convstr(value,'l');
+         end
+       end
+       controlledSourceFlag=%T
+       
+      case 'E' then  // Voltage controlled voltage source
+       if(~(source==0))
+         A(source,Nodes-1+_T) = "1";
+         A(Nodes-1+_T,source) = "1";
+        if(~(g.edges.tail(edge_cnt+1)-1==0))
+          A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = convstr(value,'l');
+        end
+        if(~(g.edges.head(edge_cnt+1)==1))
+          A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = "-"+convstr(value,'l');
+        end
+       end
+       if(~(sink==0))
+          A(sink,Nodes-1+_T) = "-1";
+          A(Nodes-1+_T,sink) = "-1";
+          if(~(g.edges.tail(edge_cnt+1)-1==0))
+            A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = "-"+convstr(value,'l');
+          end
+          if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = convstr(value,'l');
+          end
+       end  
+       x(Nodes-1+_T)="i_"+ value;
+       _T=_T+1;
+       controlledSourceFlag=%T
+        
+      case 'F' then  // Current controlled current source
+        A(Nodes-1+_T,Nodes-1+_T) = 1;
+        A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l');
+        if(~(source==0))
+          A(source,Nodes-1+_T) = 1;
+        end
+        if(~(sink==0))
+          A(sink,Nodes-1+_T) = -1;
+        end  
+        x(Nodes-1+_T)="i_"+ value;
+        _T=_T+1;
+         
+      case 'H' then // Current controlled voltage source
+        A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l');
+        if(~(source==0))
+          A(source,Nodes-1+_T) = "1";
+          A(Nodes-1+_T,source) = "1";
+        end
+        if(~(sink==0))
+          A(sink,Nodes-1+_T) = "-1";
+          A(Nodes-1+_T,sink) = "-1";
+        end  
+        x(Nodes-1+_T)="i_"+ value;
+        _T=_T+1;
+        
+      case 'M' then  // MOSFET
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+       
+      case 'X' then   // User defined component
+       if(~(source==0)) 
+         A(source,source) = A(source,source) +" + "+ value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) +" + "+ value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) +" - "+value;
+         A(sink,source) = A(sink,source) +" - "+value;
+       end
+  
+     else
+        exit(0);
+      end
+   end
+   _T=_T-1;   
+
+   firstValue=%T
+   mprintf("-----------------------------------------------------------\n");
+   mprintf("System of Equations representing the electrical circuit:\n");
+   mprintf("-----------------------------------------------------------\n");
+// Fill zero entries
+   for i=1:Nodes-1+_T,
+     mprintf("\n     ");
+     for j=1:Nodes-1+_T,
+       if(length(A(i,j))==0)
+         A(i,j)="0";
+       elseif(sscanf(A(i,j), "%c")=='+')
+         tempstr=strsplit(A(i,j),1);
+         A(i,j)=tempstr(2);
+         if firstValue then
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf("%s",x(j));
+           else
+             mprintf("(%s)%s",A(i,j),x(j));
+           end
+           firstValue=%F;
+         else
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf(" + %s",x(j));
+           else
+             mprintf(" + (%s)%s",A(i,j),x(j));
+           end
+         end
+       else
+         if firstValue then
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf("%s",x(j));
+           else
+             mprintf("(%s)%s",A(i,j),x(j));
+           end
+           firstValue=%F;
+         else
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf(" + %s",x(j));
+           else
+             mprintf(" + (%s)%s",A(i,j),x(j));
+           end
+         end
+       end
+       if(length(C(i,j))==0)
+         C(i,j)="0";
+       elseif(sscanf(C(i,j), "%c")=='+')
+         tempstr=strsplit(C(i,j),1);
+         C(i,j)=tempstr(2);
+         if firstValue then
+           mprintf("(%s)d%s/dt",C(i,j),x(j));
+           firstValue=%F;
+         else
+           mprintf(" + (%s)d%s/dt",C(i,j),x(j));
+         end
+       else
+         if firstValue then
+           mprintf("(%s)d%s/dt",C(i,j),x(j));
+           firstValue=%F;
+         else
+           mprintf(" + (%s)d%s/dt",C(i,j),x(j));
+         end
+       end
+     end
+     for j=1:length(model),
+       if(length(D(i,j))==0)
+         D(i,j)="0";
+       elseif(firstValue)
+         mprintf("%s%s",D(i,j),fx(j));
+         firstValue=%F;
+       else
+          mprintf(" + %s%s",D(i,j),fx(j));
+       end
+     end
+     if(length(B(i,1))==0)
+       B(i,1)="0";
+     elseif(sscanf(B(i,1), "%c")=='+')
+       tempstr=strsplit(B(i,1),1);
+       B(i,1)=tempstr(2);
+     end
+     mprintf(" = %s\n",B(i,1));
+     firstValue=%T
+   end
+   global('NLFlag');
+   if NLFlag then
+     mprintf("-----------------------------------------------------------\n");
+     mprintf(" Dn_f(v_a,v_b)=Is_n(1-e^((v_a-v_b)/vt_n))\n where Is_n=reverse saturation current and vt_n=threshold voltage of diode n\n")
+   end
+   mprintf("-----------------------------------------------------------\n");
+endfunction
+
+function [A,B,D,x,fx]=buildMatricesSymbStatic(_T)
+global('currentAnalysis');
+// Create Matrice A,  D, C and  vector b corresponding to circuit equation
+   global g;
+   global('model')
+   Nodes=node_number(g);
+   Edges=edge_number(g);
+   A = emptystr(Nodes-1+_T,Nodes-1+_T);
+   D = emptystr(Nodes-1+_T,length(model));
+   B = emptystr(Nodes-1+_T,1);
+   x = emptystr(Nodes-1+_T,1);
+   fx = emptystr(length(model),1);
+   
+   _T=1;
+   X=1;
+   controlledSourceFlag=%F
+   for i=1:Nodes-1,
+     x(i,1)="v_"+ msprintf("%d",i)
+   end
+   for edge_cnt = 1:edge_number(g),
+      if(controlledSourceFlag)
+        controlledSourceFlag=%F
+        continue
+      end
+      source=g.edges.tail(edge_cnt)-1;
+      sink=g.edges.head(edge_cnt)-1;
+      value=g.edges.data.devName(edge_cnt);
+      select (g.edges.data.type(edge_cnt))
+      case 'R' then   // Resistor
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + "+"+ value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) +"+"+ value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) +"-"+ value;
+         A(sink,source) = A(sink,source) +"-"+ value;
+       end
+
+      case 'I' then  // Current source
+        if(sscanf(value, "%c")=='I')
+          if(~(source==0)) 
+            B(source) = B(source)+"-"+value;
+          end
+          if(~(sink==0)) 
+            B(sink) =B(sink) +"+"+ value;
+          end
+        elseif((sscanf(value, "%c")=='C') & currentAnalysis)
+          if(~(source==0)) 
+            B(source) = B(source)+"-i_"+value;
+          end
+          if(~(sink==0)) 
+            B(sink) =B(sink) +"+i_"+ value;
+          end
+        end
+       
+      case 'V' then // Voltage source
+       if(~(source==0))
+         A(Nodes-1+_T,source) = "1";
+         A(source,Nodes-1+_T) = "1";
+       end
+       if(~(sink==0))
+         A(Nodes-1+_T,sink) = "-1";
+         A(sink,Nodes-1+_T) = "-1";
+       end  
+       B(Nodes-1+_T) = value;
+       x(Nodes-1+_T)="i_"+ value;
+       _T=_T+1; 
+       
+      case 'C' then // Capacitor
+        if currentAnalysis then 
+          if(~(source==0)) 
+            A(source,source) = A(source,source) +"+R_"+ value;
+          end
+          if(~(sink==0)) 
+            A(sink,sink) = A(sink,sink) +"+R_"+ value;
+          end
+          if(~(sink==0) & ~(source==0))
+            A(source,sink) = A(source,sink) +"-R_"+value;
+            A(sink,source) = A(sink,source) +"-R_"+value;
+          end
+        end
+       
+      case 'D' then // Diode
+       if(~(source==0)) 
+         D(source,X) = value+"_f";
+       end
+       if(~(sink==0)) 
+         D(sink,X) = "-"+ value+"_f";
+       end
+       if(source==0) 
+         fx(X)="(v_"+string(sink)+")";
+       elseif(sink==0)
+         fx(X)="(v_"+string(source)+")";
+       else
+         fx(X)="(v_"+string(source)+",v_"+string(sink)+")";
+       end
+       X=X+1;
+       
+      case 'G' then // Voltage controlled current source
+       if(~(source==0)) 
+         if(~(g.edges.tail(edge_cnt+1)-1==0))
+           A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) +"+"+ convstr(value,'l');
+         end
+         if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) +"-"+ convstr(value,'l');
+         end
+       end
+       if(~(sink==0)) 
+         if(~(g.edges.tail(edge_cnt+1)==1))
+            A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) +"-"+ convstr(value,'l');
+         end
+         if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) +"+"+ convstr(value,'l');
+         end
+       end
+       controlledSourceFlag=%T
+       
+      case 'E' then  // Voltage controlled voltage source
+       if(~(source==0))
+         A(source,Nodes-1+_T) = "1";
+         A(Nodes-1+_T,source) = "1";
+        if(~(g.edges.tail(edge_cnt+1)-1==0))
+          A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = convstr(value,'l');
+        end
+        if(~(g.edges.head(edge_cnt+1)==1))
+          A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = "-"+convstr(value,'l');
+        end
+       end
+       if(~(sink==0))
+          A(sink,Nodes-1+_T) = "-1";
+          A(Nodes-1+_T,sink) = "-1";
+          if(~(g.edges.tail(edge_cnt+1)-1==0))
+            A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = "-"+convstr(value,'l');
+          end
+          if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = convstr(value,'l');
+          end
+       end  
+       x(Nodes-1+_T)="i_"+ value;
+       _T=_T+1;
+       controlledSourceFlag=%T
+        
+      case 'F' then  // Current controlled current source
+        A(Nodes-1+_T,Nodes-1+_T) = 1;
+        A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l');
+        if(~(source==0))
+          A(source,Nodes-1+_T) = 1;
+        end
+        if(~(sink==0))
+          A(sink,Nodes-1+_T) = -1;
+        end  
+        x(Nodes-1+_T)="i_"+ value;
+        _T=_T+1;
+         
+      case 'H' then // Current controlled voltage source
+        A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l');
+        if(~(source==0))
+          A(source,Nodes-1+_T) = "1";
+          A(Nodes-1+_T,source) = "1";
+        end
+        if(~(sink==0))
+          A(sink,Nodes-1+_T) = "-1";
+          A(Nodes-1+_T,sink) = "-1";
+        end  
+        x(Nodes-1+_T)="i_"+ value;
+        _T=_T+1;
+        
+      case 'M' then  // MOSFET
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+       
+      case 'X' then   // User defined component
+       if(~(source==0)) 
+         A(source,source) = A(source,source) +" + "+ value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) +" + "+ value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) +" - "+value;
+         A(sink,source) = A(sink,source) +" - "+value;
+       end
+  
+     else
+        exit(0);
+      end
+   end
+   _T=_T-1;   
+
+   firstValue=%T
+   mprintf("-----------------------------------------------------------\n");
+   mprintf("System of Equations representing the electrical circuit:\n");
+   mprintf("-----------------------------------------------------------\n");
+// Fill zero entries
+   for i=1:Nodes-1+_T,
+     mprintf("\n     ");
+     for j=1:Nodes-1+_T,
+       if(length(A(i,j))==0)
+         A(i,j)="0";
+       elseif(sscanf(A(i,j), "%c")=='+')
+         tempstr=strsplit(A(i,j),1);
+         A(i,j)=tempstr(2);
+         if firstValue then
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf("%s",x(j));
+           else
+             mprintf("(%s)%s",A(i,j),x(j));
+           end
+           firstValue=%F;
+         else
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf(" + %s",x(j));
+           else
+             mprintf(" + (%s)%s",A(i,j),x(j));
+           end
+         end
+       else
+         if firstValue then
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf("%s",x(j));
+           else
+             mprintf("(%s)%s",A(i,j),x(j));
+           end
+           firstValue=%F;
+         else
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf(" + %s",x(j));
+           else
+             mprintf(" + (%s)%s",A(i,j),x(j));
+           end
+         end
+       end
+     end
+     for j=1:length(model),
+       if(length(D(i,j))==0)
+         D(i,j)="0";
+       elseif(firstValue)
+         mprintf("%s%s",D(i,j),fx(j));
+         firstValue=%F;
+       else
+          mprintf(" + %s%s",D(i,j),fx(j));
+       end
+     end
+     if(length(B(i,1))==0)
+       B(i,1)="0";
+     elseif(sscanf(B(i,1), "%c")=='+')
+       tempstr=strsplit(B(i,1),1);
+       B(i,1)=tempstr(2);
+     end
+     mprintf(" = %s\n",B(i,1));
+     firstValue=%T
+   end
+   if NLFlag then
+     mprintf("-----------------------------------------------------------\n");
+     mprintf(" Dn_f(v_a,v_b)=Is_n(1-e^((v_a-v_b)/vt_n))\n where Is_n=reverse saturation current and vt_n=threshold voltage of diode n\n")
+   end
+   mprintf("-----------------------------------------------------------\n");
+endfunction
+
+function [A,B,C,x]=buildMatricesSymbLin(_T)
+// Create Matrice A,  D, C and  vector b corresponding to circuit equation
+   global g;
+   global('currentAnalysis');
+   Nodes=node_number(g);
+   A = emptystr(Nodes-1+_T,Nodes-1+_T);
+   C = emptystr(Nodes-1+_T,Nodes-1+_T);
+   B = emptystr(Nodes-1+_T,1);
+   x = emptystr(Nodes-1+_T,1);
+   
+   _T=1;
+   controlledSourceFlag=%F
+   for i=1:Nodes-1,
+     x(i,1)="v_"+ msprintf("%d",i)
+   end
+   for edge_cnt = 1:edge_number(g),
+      if(controlledSourceFlag)
+        controlledSourceFlag=%F
+        continue
+      end
+      source=g.edges.tail(edge_cnt)-1;
+      sink=g.edges.head(edge_cnt)-1;
+      value=g.edges.data.devName(edge_cnt);
+      select (g.edges.data.type(edge_cnt))
+      case 'R' then   // Resistor
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + "+"+ value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) +"+"+ value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) +"-"+ value;
+         A(sink,source) = A(sink,source) +"-"+ value;
+       end
+
+      case 'I' then  // Current source
+        if(sscanf(value, "%c")=='I')
+          if(~(source==0)) 
+            B(source) = B(source)+"-"+value;
+          end
+          if(~(sink==0)) 
+            B(sink) =B(sink) +"+"+ value;
+          end
+        elseif(~(sscanf(value, "%c")=='C') | currentAnalysis)
+          if(~(source==0)) 
+            B(source) = B(source)+"-i_"+value;
+          end
+          if(~(sink==0)) 
+            B(sink) =B(sink) +"+i_"+ value;
+          end
+        end
+       
+      case 'V' then // Voltage source
+       if(~(source==0))
+         A(Nodes-1+_T,source) = "1";
+         A(source,Nodes-1+_T) = "1";
+       end
+       if(~(sink==0))
+         A(Nodes-1+_T,sink) = "-1";
+         A(sink,Nodes-1+_T) = "-1";
+       end  
+       B(Nodes-1+_T) = value;
+       x(Nodes-1+_T)="i_"+ value;
+       _T=_T+1; 
+       
+      case 'C' then // Capacitor
+        if currentAnalysis then
+          if(~(source==0)) 
+            C(source,source) = C(source,source) +"+"+ value;
+          end
+          if(~(sink==0)) 
+            C(sink,sink) = C(sink,sink) +" + "+ value;
+          end
+          if(~(sink==0) & ~(source==0))
+            C(source,sink) = C(source,sink) +"-"+value;
+            C(sink,source) = C(sink,source) +"-"+value;
+          end
+        end
+       
+      case 'D' then // Diode
+       if(~(source==0)) 
+         A(source,source) = A(source,source) +"+R_"+ value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) +"+R_"+ value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) +"-R_"+ value;
+         A(sink,source) = A(sink,source) +"-R_"+ value;
+       end
+       
+      case 'G' then // Voltage controlled current source
+       if(~(source==0)) 
+         if(~(g.edges.tail(edge_cnt+1)-1==0))
+           A(source,g.edges.tail(edge_cnt+1)-1) = A(source,g.edges.tail(edge_cnt+1)-1) +"+"+ convstr(value,'l');
+         end
+         if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(source,g.edges.head(edge_cnt+1)-1) = A(source,g.edges.head(edge_cnt+1)-1) +"-"+ convstr(value,'l');
+         end
+       end
+       if(~(sink==0)) 
+         if(~(g.edges.tail(edge_cnt+1)==1))
+            A(sink,g.edges.tail(edge_cnt+1)-1) = A(sink,g.edges.tail(edge_cnt+1)-1) +"-"+ convstr(value,'l');
+         end
+         if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(sink,g.edges.head(edge_cnt+1)-1) = A(sink,g.edges.head(edge_cnt+1)-1) +"+"+ convstr(value,'l');
+         end
+       end
+       controlledSourceFlag=%T
+       
+      case 'E' then  // Voltage controlled voltage source
+       if(~(source==0))
+         A(source,Nodes-1+_T) = "1";
+         A(Nodes-1+_T,source) = "1";
+        if(~(g.edges.tail(edge_cnt+1)-1==0))
+          A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = convstr(value,'l');
+        end
+        if(~(g.edges.head(edge_cnt+1)==1))
+          A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = "-"+convstr(value,'l');
+        end
+       end
+       if(~(sink==0))
+          A(sink,Nodes-1+_T) = "-1";
+          A(Nodes-1+_T,sink) = "-1";
+          if(~(g.edges.tail(edge_cnt+1)-1==0))
+            A(Nodes-1+_T,g.edges.tail(edge_cnt+1)-1) = "-"+convstr(value,'l');
+          end
+          if(~(g.edges.head(edge_cnt+1)-1==0))
+            A(Nodes-1+_T,g.edges.head(edge_cnt+1)-1) = convstr(value,'l');
+          end
+       end  
+       x(Nodes-1+_T)="i_"+ value;
+       _T=_T+1;
+       controlledSourceFlag=%T
+        
+      case 'F' then  // Current controlled current source
+        A(Nodes-1+_T,Nodes-1+_T) = 1;
+        A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l');
+        if(~(source==0))
+          A(source,Nodes-1+_T) = 1;
+        end
+        if(~(sink==0))
+          A(sink,Nodes-1+_T) = -1;
+        end  
+        x(Nodes-1+_T)="i_"+ value;
+        _T=_T+1;
+         
+      case 'H' then // Current controlled voltage source
+        A(Nodes-1+_T,Nodes-1+_T-1) = "-"+convstr(value,'l');
+        if(~(source==0))
+          A(source,Nodes-1+_T) = 1;
+          A(Nodes-1+_T,source) = 1;
+        end
+        if(~(sink==0))
+          A(sink,Nodes-1+_T) = -1;
+          A(Nodes-1+_T,sink) = -1;
+        end  
+        x(Nodes-1+_T)="i"+ value;
+        _T=_T+1;
+        
+      case 'M' then  // MOSFET
+       if(~(source==0)) 
+         A(source,source) = A(source,source) + value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) + value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) - value;
+         A(sink,source) = A(sink,source) - value;
+       end
+       
+      case 'X' then   // User defined component
+       if(~(source==0)) 
+         A(source,source) = A(source,source) +" + "+ value;
+       end
+       if(~(sink==0)) 
+         A(sink,sink) = A(sink,sink) +" + "+ value;
+       end
+       if(~(sink==0) & ~(source==0))
+         A(source,sink) = A(source,sink) +" - "+value;
+         A(sink,source) = A(sink,source) +" - "+value;
+       end
+  
+     else
+        exit(0);
+      end
+   end
+   _T=_T-1;   
+
+   firstValue=%T
+   mprintf("-----------------------------------------------------------\n");
+   mprintf("System of Equations representing the electrical circuit:\n");
+   mprintf("-----------------------------------------------------------\n");
+// Fill zero entries
+   for i=1:Nodes-1+_T,
+     mprintf("\n     ");
+     for j=1:Nodes-1+_T,
+       if(length(A(i,j))==0)
+         A(i,j)="0";
+       elseif(sscanf(A(i,j), "%c")=='+')
+         tempstr=strsplit(A(i,j),1);
+         A(i,j)=tempstr(2);
+         if firstValue then
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf("%s",x(j));
+           else
+             mprintf("(%s)%s",A(i,j),x(j));
+           end
+           firstValue=%F;
+         else
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf(" + %s",x(j));
+           else
+             mprintf(" + (%s)%s",A(i,j),x(j));
+           end
+         end
+       else
+         if firstValue then
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf("%s",x(j));
+           else
+             mprintf("(%s)%s",A(i,j),x(j));
+           end
+           firstValue=%F;
+         else
+           if ~(strcmp(A(i,j),'1')) then 
+             mprintf(" + %s",x(j));
+           else
+             mprintf(" + (%s)%s",A(i,j),x(j));
+           end
+         end
+       end
+     end
+     if(length(B(i,1))==0)
+       B(i,1)="0";
+     elseif(sscanf(B(i,1), "%c")=='+')
+       tempstr=strsplit(B(i,1),1);
+       B(i,1)=tempstr(2);
+     end
+     mprintf(" = %s\n",B(i,1));
+     firstValue=%T
+   end
+   mprintf("-----------------------------------------------------------\n");
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/ckt/ForwardBiasedDiode.ckt b/OSCAD/LPCSim/LPCSim/ckt/ForwardBiasedDiode.ckt
new file mode 100644
index 0000000..4501665
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/ForwardBiasedDiode.ckt
@@ -0,0 +1,6 @@
+* Diode in forward biased
+V1 1 0 dc 1
+D1 1 2 mymodel (1e-8 0.026) 
+R1 2 0 100
+.op
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/HWRectifier.ckt b/OSCAD/LPCSim/LPCSim/ckt/HWRectifier.ckt
new file mode 100644
index 0000000..cba98ec
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/HWRectifier.ckt
@@ -0,0 +1,6 @@
+V1 1 0 sine (5 50)
+D2 1 2 mymodel (1e-8 0.026)
+R3 2 0 1
+.tran 0 100 0.5
+.plot v(1) v(2) 
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/HWRectifierFilter.ckt b/OSCAD/LPCSim/LPCSim/ckt/HWRectifierFilter.ckt
new file mode 100644
index 0000000..8df0e6b
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/HWRectifierFilter.ckt
@@ -0,0 +1,8 @@
+* Half-Wave Rectifier
+V1 1 0 sine (5 50)
+D1 1 2 mymodel (1e-8 0.026)
+R1 2 0 10000
+C1 2 0 10e-3
+.tran 0 100 0.5
+.plot v(1) v(2) 
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/NMOS.ckt b/OSCAD/LPCSim/LPCSim/ckt/NMOS.ckt
new file mode 100644
index 0000000..c9e1c78
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/NMOS.ckt
@@ -0,0 +1,7 @@
+V1 2 0 dc 2.5
+M1 1 0 2 N (20e-6 0.18e-6 1 1e-3 1e-1)
+V2 3 0 sweep 0
+V3 3 1 dc 0
+.dc 0 5 0.1
+.plot i(V3)
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/RC.ckt b/OSCAD/LPCSim/LPCSim/ckt/RC.ckt
new file mode 100644
index 0000000..e3ec032
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/RC.ckt
@@ -0,0 +1,6 @@
+V1 1 0 dc 5
+R1 1 2 1e3
+C1 2 0 0.1e-6
+.tran 0 5e-3 0.5e-3
+.plot v(2)
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/RingOsc.ckt b/OSCAD/LPCSim/LPCSim/ckt/RingOsc.ckt
new file mode 100644
index 0000000..f30dcf2
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/RingOsc.ckt
@@ -0,0 +1,66 @@
+V1 1 0 dc 1.8
+M1 3 1 2 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M2 3 0 2 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M3 4 1 3 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M4 4 0 3 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M5 5 1 4 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M6 5 0 4 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M7 6 1 5 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M8 6 0 5 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M9 7 1 6 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M10 7 0 6 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M11 8 1 7 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M12 8 0 7 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M13 9 1 8 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M14 9 0 8 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M15 10 1 9 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M16 10 0 9 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M17 11 1 10 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M18 11 0 10 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M19 12 1 11 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M20 12 0 11 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M21 13 1 12 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M22 13 0 12 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M23 14 1 13 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M24 14 0 13 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M25 15 1 14 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M26 15 0 14 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M27 16 1 15 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M28 16 0 15 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M29 17 1 16 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M30 17 0 16 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M31 18 1 17 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M32 18 0 17 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M33 19 1 18 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M34 19 0 18 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M35 20 1 19 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M36 20 0 19 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M37 21 1 20 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M38 21 0 20 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M39 22 1 21 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M40 22 0 21 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M41 23 1 22 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M42 23 0 22 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M43 24 1 23 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M44 24 0 23 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M45 25 1 24 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M46 25 0 24 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M47 26 1 25 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M48 26 0 25 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M49 27 1 26 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M50 27 0 26 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M51 28 1 27 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M52 28 0 27 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M53 29 1 28 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M54 29 0 28 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M55 30 1 29 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M56 30 0 29 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M57 31 1 30 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M58 31 0 30 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M59 32 1 31 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M60 32 0 31 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+M61 2 1 32 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+M62 2 0 32 N (20e-6 0.18e-6 0.4 1e-3 1e-1)
+.tran 0 20e-9 1e-9
+.plot v(2)
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/Vsweep.ckt b/OSCAD/LPCSim/LPCSim/ckt/Vsweep.ckt
new file mode 100644
index 0000000..7fd7e27
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/Vsweep.ckt
@@ -0,0 +1,6 @@
+V1 1 0 sweep 0
+R1 1 2 1
+R2 2 0 1
+.dc 0 5 0.1
+.plot v(1) v(2) 
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/bridge.ckt b/OSCAD/LPCSim/LPCSim/ckt/bridge.ckt
new file mode 100644
index 0000000..3c6f4eb
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/bridge.ckt
@@ -0,0 +1,10 @@
+* Bridge Rectifier
+V1 1 2 sine (5 50)
+D1 1 3 mymodel (1e-8 0.026) 
+D2 2 3 mymodel (1e-8 0.026)
+D3 0 1 mymodel (1e-8 0.026)
+D4 0 2 mymodel (1e-8 0.026)
+R1 3 0 1
+.tran 0.0005 0.04 0
+.plot v(1)-v(2) v(3)
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/bridgeFilter.ckt b/OSCAD/LPCSim/LPCSim/ckt/bridgeFilter.ckt
new file mode 100644
index 0000000..a153700
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/bridgeFilter.ckt
@@ -0,0 +1,10 @@
+V1 1 2 sine (5 50)
+D1 1 3 mymodel (1e-8 0.026) 
+D2 2 3 mymodel (1e-8 0.026)
+D3 0 1 mymodel (1e-8 0.026)
+D4 0 2 mymodel (1e-8 0.026)
+R1 3 0 10000
+C1 3 0 1e-2
+.tran 0 100 0.5
+.plot v(1)-v(2) v(3) 
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/cmos.ckt b/OSCAD/LPCSim/LPCSim/ckt/cmos.ckt
new file mode 100644
index 0000000..c04311c
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/cmos.ckt
@@ -0,0 +1,7 @@
+V1 1 0 dc 1.8
+M1 3 1 2 P (20e-6 0.18e-6 -0.4 8.56e-3)
+M2 3 0 2 N (10e-6 0.18e-6 0.4 8.56e-3)
+V2 2 0 sweep 0 
+.dc 0 1.8 0.05
+.plot v(3)
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/inverter.ckt b/OSCAD/LPCSim/LPCSim/ckt/inverter.ckt
new file mode 100644
index 0000000..c04311c
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/inverter.ckt
@@ -0,0 +1,7 @@
+V1 1 0 dc 1.8
+M1 3 1 2 P (20e-6 0.18e-6 -0.4 8.56e-3)
+M2 3 0 2 N (10e-6 0.18e-6 0.4 8.56e-3)
+V2 2 0 sweep 0 
+.dc 0 1.8 0.05
+.plot v(3)
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/linear1.ckt b/OSCAD/LPCSim/LPCSim/ckt/linear1.ckt
new file mode 100644
index 0000000..2f4a3ee
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/linear1.ckt
@@ -0,0 +1,13 @@
+* linear circuit

+V1 1 0 dc 1

+R1 1 2 1

+R2 2 0 1

+E1 2 3 4 5 0.5

+I1 0 3 dc 1

+R3 4 0 1

+R4 3 4 1

+G1 3 5 0 4 0.5

+R5 5 4 0.5

+R6 5 0 1

+.op

+.end

diff --git a/OSCAD/LPCSim/LPCSim/ckt/linear2.ckt b/OSCAD/LPCSim/LPCSim/ckt/linear2.ckt
new file mode 100644
index 0000000..19c7c48
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/linear2.ckt
@@ -0,0 +1,10 @@
+* Example of current controlled voltage source
+I1 0 1 dc 1
+R1 1 0 0.2
+R2 1 2 0.1
+R3 4 0 0.2
+R4 2 3 0.1
+V1 2 4 dc 0
+H1 3 0 V1 2
+.op
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/modifiedNodalExample.ckt b/OSCAD/LPCSim/LPCSim/ckt/modifiedNodalExample.ckt
new file mode 100644
index 0000000..d3b09bf
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/modifiedNodalExample.ckt
@@ -0,0 +1,9 @@
+* Example to explain modified nodal analyis

+V1 1 0 dc 5

+R1 1 2 1

+R2 2 0 1

+R3 2 3 1

+R4 1 3 1

+V2 3 0 dc 10

+.op

+.end

diff --git a/OSCAD/LPCSim/LPCSim/ckt/mosfet.sci b/OSCAD/LPCSim/LPCSim/ckt/mosfet.sci
new file mode 100644
index 0000000..319a9ec
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/mosfet.sci
@@ -0,0 +1,6 @@
+M1 2 0 3 N (20e-6 0.18e-6 1 1e-3 1e-2)
+V1 3 0 dc 2.5
+V2 1 0 dc 5
+R2 1 3 1
+.op
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/myComp.ckt b/OSCAD/LPCSim/LPCSim/ckt/myComp.ckt
new file mode 100644
index 0000000..7709b3c
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/myComp.ckt
@@ -0,0 +1,5 @@
+V1 1 0 dc 5
+X2 1 2 myR (2)
+R3 2 0 1
+.op 
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/myCompSweep.ckt b/OSCAD/LPCSim/LPCSim/ckt/myCompSweep.ckt
new file mode 100644
index 0000000..d72be10
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/myCompSweep.ckt
@@ -0,0 +1,6 @@
+V1 1 0 sweep 0
+R1 1 2 1
+X2 2 0 myR (1)
+.dc 0 5 0.1
+.plot v(1) v(2) 
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/nodalExample.ckt b/OSCAD/LPCSim/LPCSim/ckt/nodalExample.ckt
new file mode 100644
index 0000000..828ad04
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/nodalExample.ckt
@@ -0,0 +1,10 @@
+*Nodal Analysis Example

+I1 0 1 dc 1

+R1 1 0 1

+R2 1 2 1

+R3 2 0 1

+R4 2 3a 2

+R5 3a 0 1

+I2 0 3a dc 1

+.op

+.end

diff --git a/OSCAD/LPCSim/LPCSim/ckt/pmos.ckt b/OSCAD/LPCSim/LPCSim/ckt/pmos.ckt
new file mode 100644
index 0000000..635a0d0
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/pmos.ckt
@@ -0,0 +1,7 @@
+V1 2 0 dc 0
+M1 1 0 2 P (20e-6 0.18e-6 -0.4 1e-3 1e-1)
+V2 3 0 sweep 0
+V3 3 1 dc 0
+.dc 0 1.8 0.1
+.plot i(V3)
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/rc1.ckt b/OSCAD/LPCSim/LPCSim/ckt/rc1.ckt
new file mode 100644
index 0000000..3793f46
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/rc1.ckt
@@ -0,0 +1,8 @@
+V1 1 0 dc 5
+R1 1 2 1000
+R2 2 3 1000
+C1 3 0 0.1e-6 ic=3 
+.tran 0 0.5e-3 0.01e-3 UIC 
+.ic v(2)=1
+.print v(3)
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/rc_ac.ckt b/OSCAD/LPCSim/LPCSim/ckt/rc_ac.ckt
new file mode 100644
index 0000000..1a7403b
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/rc_ac.ckt
@@ -0,0 +1,6 @@
+V1 1 0 ac 5
+R1 1 2 100
+C1 2 0 1e-6 
+.ac lin 10 1 10000 
+.plot v(2)
+.end
diff --git a/OSCAD/LPCSim/LPCSim/ckt/rc_ac.spice b/OSCAD/LPCSim/LPCSim/ckt/rc_ac.spice
new file mode 100644
index 0000000..d09f0f8
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/rc_ac.spice
@@ -0,0 +1,12 @@
+* AC Analysis

+V1 1 0 ac 1

+R1 1 2 100

+C1 2 0 1e-6

+.ac lin 10 100 10000

+

+.control

+run

+plot v(2)

+.endc

+.end

+

diff --git a/OSCAD/LPCSim/LPCSim/ckt/test.ckt b/OSCAD/LPCSim/LPCSim/ckt/test.ckt
new file mode 100644
index 0000000..d72be10
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/ckt/test.ckt
@@ -0,0 +1,6 @@
+V1 1 0 sweep 0
+R1 1 2 1
+X2 2 0 myR (1)
+.dc 0 5 0.1
+.plot v(1) v(2) 
+.end
diff --git a/OSCAD/LPCSim/LPCSim/diode_Dref.fig b/OSCAD/LPCSim/LPCSim/diode_Dref.fig
new file mode 100644
index 0000000..507de5c
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/diode_Dref.fig
@@ -0,0 +1,59 @@
+#FIG 3.2  Produced by xfig version 3.2.5
+Landscape
+Center
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+2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2
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+	 4200 1500 4200 1650
+2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2
+	 4200 1950 4200 2100
+-6
+# Resistor
+6 3375 1425 3525 2100
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+	 3450 1425 3450 1570 3375 1594 3525 1642 3375 1690 3525 1738
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+-6
+# Diode
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+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+	 2100 1350 2100 1200
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+	 2100 1200 2100 1125
+2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 2
+	 2100 2400 2100 2475
+4 0 0 50 -1 0 12 0.0000 6 210 1440 2250 1500 $D_{dnumber}$\001
+4 0 0 50 -1 0 12 0.0000 6 210 1890 3075 1800 $R_{D_{dnumber}}$\001
+4 0 0 50 -1 0 12 0.0000 6 210 1830 4350 1725 $I_{D_{dnumber}}$\001
diff --git a/OSCAD/LPCSim/LPCSim/diode_Dref.pstex b/OSCAD/LPCSim/LPCSim/diode_Dref.pstex
new file mode 100644
index 0000000..2a9db44
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/diode_Dref.pstex
@@ -0,0 +1,187 @@
+%!PS-Adobe-2.0 EPSF-2.0
+%%Title: diode_ref.fig
+%%Creator: fig2dev Version 3.2 Patchlevel 5
+%%CreationDate: Tue Aug 28 14:11:31 2012
+%%For: yogesh@iml21.ee.iitb.ac.in (yogesh Save)
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diff --git a/OSCAD/LPCSim/LPCSim/diode_Dref.pstex_t b/OSCAD/LPCSim/LPCSim/diode_Dref.pstex_t
new file mode 100644
index 0000000..65c5d99
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/diode_Dref.pstex_t
@@ -0,0 +1,19 @@
+\begin{picture}(0,0)%
+\includegraphics{diode_Dref.pstex}%
+\end{picture}%
+\setlength{\unitlength}{3947sp}%
+%
+\begingroup\makeatletter\ifx\SetFigFont\undefined%
+\gdef\SetFigFont#1#2#3#4#5{%
+  \reset@font\fontsize{#1}{#2pt}%
+  \fontfamily{#3}\fontseries{#4}\fontshape{#5}%
+  \selectfont}%
+\fi\endgroup%
+\begin{picture}(2435,1374)(1939,-1648)
+\put(2251,-661){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$D_{dnumber}$}%
+}}}}
+\put(3076,-961){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$R_{D_{dnumber}}$}%
+}}}}
+\put(4351,-886){\makebox(0,0)[lb]{\smash{{\SetFigFont{12}{14.4}{\rmdefault}{\mddefault}{\updefault}{\color[rgb]{0,0,0}$I_{D_{dnumber}}$}%
+}}}}
+\end{picture}%
diff --git a/OSCAD/LPCSim/LPCSim/discretization.sci b/OSCAD/LPCSim/LPCSim/discretization.sci
new file mode 100644
index 0000000..f020b3b
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/discretization.sci
@@ -0,0 +1,104 @@
+// discretization.sci is a scilab file to discretize time dependent components. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  

+// Copyright (C) 2012 Yogesh Dilip Save

+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.

+

+

+function [A,B]=discretization(A,B,x,t,i)

+  global LPCSim_HOME;

+  exec(LPCSim_HOME+'lib/waveform.sci',-1);

+  global g;

+  global wave;

+  global timeArray;

+  global cValue;

+  waveIndex=1;  

+  _T=1;

+  _C=1;

+  Edges=edge_number(g);

+  Nodes=node_number(g);

+  if(i>1) h=t-sweepArray(i-1); end

+

+  for edge_cnt = 1:Edges,

+// Compute time dependent voltage source value at time t 

+    if(g.edges.data.type(edge_cnt)=='V')

+      tempWave=wave(waveIndex);

+      if(tempWave(1)=='DC')

+        waveIndex=waveIndex+1;   

+      elseif(tempWave(1)=='SWEEP')

+        waveIndex=waveIndex+1;  

+      elseif(tempWave(1)=='SINE'|tempWave(1)=='PULSE')

+        waveIndex=waveIndex+1;

+        if(tempWave(1)=='SINE')

+          g.edges.data.value(edge_cnt)=sine(tempWave,t);

+        else

+          g.edges.data.value(edge_cnt)=pulse(tempWave,t);

+        end

+// Update rhs vector

+        B(Nodes-1+_T) = g.edges.data.value(edge_cnt);

+      end  

+      _T=_T+1; 	  

+      clear tempWave;

+// Compute time dependent current source value at time t 

+    elseif(g.edges.data.type(edge_cnt)=='I'&~(g.edges.data.type(edge_cnt-1)=='X')&~(g.edges.data.type(edge_cnt-1)=='D')&~(g.edges.data.type(edge_cnt-1)=='C'))

+      tempWave=wave(waveIndex);

+      if(tempWave(1)=='DC')

+        waveIndex=waveIndex+1;   

+      elseif(tempWave(1)=='SWEEP')

+        waveIndex=waveIndex+1;  

+      elseif(tempWave(1)=='SINE'|tempWave(1)=='PULSE')

+        waveIndex=waveIndex+1;

+        oldCurrent=g.edges.data.value(edge_cnt);

+        if(tempWave(1)=='SINE')

+          g.edges.data.value(edge_cnt)=sine(tempWave,t);

+        else

+          g.edges.data.value(edge_cnt)=pulse(tempWave,t);

+        end

+// Update rhs vector

+        B(Nodes-1+_T) = g.edges.data.value(edge_cnt);

+        source=g.edges.tail(edge_cnt)-1;

+        sink=g.edges.head(edge_cnt)-1;

+        if(~(source==0)) 

+   	  B(source) = B(source)-(g.edges.data.value(edge_cnt)-oldCurrent);

+        end

+        if(~(sink==0)) 

+   	  B(sink) =B(sink) + (g.edges.data.value(edge_cnt)-oldCurrent);

+        end

+      end   	  

+      clear tempWave;

+// Update conductance and current source of dynamic device

+    elseif(g.edges.data.type(edge_cnt)=='C')

+      if(i>1)

+        if(g.edges.head(edge_cnt)==1)

+           tempVoltage=x(g.edges.tail(edge_cnt)-1);

+        elseif(g.edges.tail(edge_cnt)==1)

+           tempVoltage=-x(g.edges.head(edge_cnt)-1);

+        else 

+           tempVoltage=x(g.edges.tail(edge_cnt)-1)-x(g.edges.head(edge_cnt)-1);

+        end     

+        Gnew=cValue(_C)/h;

+        Gupdate=Gnew-g.edges.data.value(edge_cnt)

+        g.edges.data.value(edge_cnt)=Gnew;

+        Inew=cValue(_C)/h*tempVoltage;

+        Iupdate=Inew-g.edges.data.value(edge_cnt+1); 

+        g.edges.data.value(edge_cnt+1)=Inew;

+// Update matrix A and rhs vector

+        source=g.edges.tail(edge_cnt)-1;

+        sink=g.edges.head(edge_cnt)-1;

+        if(~(source==0)) 

+          A(source,source) = A(source,source) + Gupdate;

+            B(source) = B(source)+Iupdate;

+        end

+        if(~(sink==0)) 

+          A(sink,sink) = A(sink,sink) + Gupdate;

+            B(sink) =B(sink) - Iupdate;

+        end

+        if(~(sink==0) & ~(source==0))

+          A(source,sink) = A(source,sink) - Gupdate;

+          A(sink,source) = A(sink,source) - Gupdate;

+        end

+        _C=_C+1;  

+      end

+    end

+  end

+endfunction

diff --git a/OSCAD/LPCSim/LPCSim/genrateCallingLibF.sci b/OSCAD/LPCSim/LPCSim/genrateCallingLibF.sci
new file mode 100644
index 0000000..8a2188b
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/genrateCallingLibF.sci
@@ -0,0 +1,24 @@
+// genrateCallingLibF.sci is a scilab file to create library function for a new components. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+
+function generateCallingLibF(f_name)
+fid = mopen('getlib.sci', 'w');
+if (fid == -1)
+  error("cannot open file for reading");
+end
+libName=f_name+".sci"; 
+mfprintf(fid,'function I=func(voltage,parameter)\n');
+mfprintf(fid,"\texec("'%s"',-1);\n",libName);
+mfprintf(fid,'\tI=%s_func(voltage,parameter);\n',f_name);
+mfprintf(fid,'endfunction\n\n');
+
+mfprintf(fid,'function Gj=jacobian(voltage,parameter)\n');
+mfprintf(fid,"\texec("'%s"',-1);\n",libName);
+mfprintf(fid,'\tGj=%s_Jacobian(voltage,parameter);\n',f_name);
+mfprintf(fid,'endfunction');
+mclose(fid)
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/getlib.sci b/OSCAD/LPCSim/LPCSim/getlib.sci
new file mode 100644
index 0000000..ac01e7c
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/getlib.sci
@@ -0,0 +1,14 @@
+// MNA based Circuit Simulator
+// Yogesh Dilip Save
+// Research Scholor
+// IIT Bombay, Mumbai-400076
+
+function I=func(voltage,parameter)
+	exec('myr.sci',-1);
+	I=myr_func(voltage,parameter);
+endfunction
+
+function Gj=jacobian(voltage,parameter)
+	exec('myr.sci',-1);
+	Gj=myr_Jacobian(voltage,parameter);
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/latfont b/OSCAD/LPCSim/LPCSim/latfont
new file mode 100644
index 0000000..90e1eb3
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/latfont
@@ -0,0 +1,8 @@
+echo {\\input{$*.pstex_t}} >& dummy_font.tex
+cat latfont1.tex dummy_font.tex latfont2.tex >& dummy_fig.tex
+latex dummy_fig.tex
+dvips -E -o dummy_fig.eps dummy_fig.dvi
+mv dummy_fig.eps $*.eps
+rm dummy_fig.*
+rm -rf dummy_font.tex
+evince $1.eps &
diff --git a/OSCAD/LPCSim/LPCSim/latfont1.tex b/OSCAD/LPCSim/LPCSim/latfont1.tex
new file mode 100644
index 0000000..e6301a4
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/latfont1.tex
@@ -0,0 +1,20 @@
+\documentclass[12pt]{book}
+\textwidth 6.5in
+\textheight 9.0in
+\topmargin 0.0in
+\oddsidemargin 0.2in
+\evensidemargin 0.2in
+\textfloatsep 0.6cm
+\abovecaptionskip 0.1cm
+\usepackage[dvips]{graphicx}
+\usepackage{makeidx}
+\usepackage{epsfig}
+\usepackage{color}
+\setlength{\textwidth}{50cm}
+\setlength{\textheight}{50cm}
+\begin{document}
+\pagestyle{empty}
+
+\begin{center}
+%\resizebox{!}{5cm}{\input{cap_trns.pstex_t}}
+
diff --git a/OSCAD/LPCSim/LPCSim/latfont2.tex b/OSCAD/LPCSim/LPCSim/latfont2.tex
new file mode 100644
index 0000000..3f4cd92
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/latfont2.tex
@@ -0,0 +1,2 @@
+\end{center}
+\end{document}
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LPCSim/lib/mos.sci b/OSCAD/LPCSim/LPCSim/lib/mos.sci
new file mode 100644
index 0000000..38067e5
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/lib/mos.sci
@@ -0,0 +1,18 @@
+// mos.sci is a scilab file to read MOSFET parameters. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+function [Vt,beta1]=getMosPara(parameter)
+  W=parameter(2);
+  L=parameter(3);
+  Vt=parameter(4);
+  Cox=parameter(5);
+  if(parameter(1)=='P')
+    u=0.4;
+  else
+    u=0.8;
+  end
+  beta1=W/L*Cox*u;
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/lib/waveform.sci b/OSCAD/LPCSim/LPCSim/lib/waveform.sci
new file mode 100644
index 0000000..e882ec5
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/lib/waveform.sci
@@ -0,0 +1,43 @@
+// waveform.sci is a scilab file to read source parameters. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+function value=sine(param,t)
+   pi=3.14;
+   value=param(3)*sin(2*pi*param(4)*t);
+endfunction
+
+function value=pulse(param,t)
+   v1=param(2);  // Initial value
+   v2=param(3);  // Pulsed value
+   td=param(4);  // Delay time
+   tr=param(5);  // Rise time
+   tf=param(6);  // Fall time
+   pw=param(7);  // Pulse width
+   per=param(8); // Pulse period
+   while(t>per)
+     t=t-per;
+   end
+   if(v1>v2)
+     tr_back=tr;
+     tr=tf;
+     tf=tr_back;
+   end
+   if(t<td)
+     value=v1;
+   elseif(t<td+tr)
+     va=v1;   ta=td;   
+     vb=v2;   tb=td+tr;
+     value=(vb-va)/(tb-ta)*(t-ta)+va;
+   elseif(t<td+tr+pw)
+     value=v2;      
+   elseif(t<td+tr+pw+tf)
+     va=v2;   ta=td+tr+pw;   
+     vb=v1;   tb=td+tr+pw+tf;
+     value=(vb-va)/(tb-ta)*(t-ta)+va;
+   else 
+     value=v1;
+   end
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/myr.sci b/OSCAD/LPCSim/LPCSim/myr.sci
new file mode 100644
index 0000000..30263a7
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/myr.sci
@@ -0,0 +1,15 @@
+// MNA based Circuit Simulator
+// Yogesh Dilip Save
+// Research Scholor
+// IIT Bombay, Mumbai-400076
+
+function I=myr_func(voltage,parameter)
+    R=parameter(2);
+	I=1/R*(voltage^3);
+endfunction
+
+function Gj=myr_Jacobian(voltage,parameter)
+    R=parameter(2);
+	Gj=3/R*(voltage^2);
+endfunction
+
diff --git a/OSCAD/LPCSim/LPCSim/nonlinearDevice.sh b/OSCAD/LPCSim/LPCSim/nonlinearDevice.sh
new file mode 100644
index 0000000..9c62500
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/nonlinearDevice.sh
@@ -0,0 +1,12 @@
+#!/bin/bash
+# nonlinearDevice.sh is a bash script to create linearized model figures. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+# Copyright (C) 2012 Yogesh Dilip Save
+# This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+# This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+# You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+cp diode_Dref.pstex diode_D$1.pstex
+cp diode_Dref.pstex_t diode_D$1.pstex_t
+sed -i 's/ref/'${1}'/g;s/dnumber/'${1}'/g' diode_D$1.pstex_t 
+#sed -i 's/dnumber/'${1}'/g' diode_$1.pstex_t
+./latfont diode_D$1 
diff --git a/OSCAD/LPCSim/LPCSim/option b/OSCAD/LPCSim/LPCSim/option
new file mode 100644
index 0000000..56a6051
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/option
@@ -0,0 +1 @@
+1
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LPCSim/printSolution.sci b/OSCAD/LPCSim/LPCSim/printSolution.sci
new file mode 100644
index 0000000..cfdbac1
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/printSolution.sci
@@ -0,0 +1,182 @@
+// printSolution.sci is a scilab file to display solution of the circuit. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012
+
+
+function printOPSolution(fileName,voltage,current,Wmode)
+  global g;
+  global nodeMap;
+  fid = mopen(fileName, Wmode);
+  if(fid == -1)
+     error("cannot open file for writing");
+  end
+  mfprintf(fid,'Name\t Source\t Sink\t       Voltage\t       Current\n');
+  mfprintf(fid,'----------------------------------------------------------\n');
+    
+  Edges=edge_number(g);
+  edge_cnt=1;
+  while(edge_cnt<=Edges)
+    if(g.edges.data.type(edge_cnt)=='D'|g.edges.data.type(edge_cnt)=='X')
+      mfprintf(fid,'%c\t %s\t %s\t %15.10f %15.10f\n',g.edges.data.type(edge_cnt),nodeMap(g.edges.tail(edge_cnt)),nodeMap(g.edges.head(edge_cnt)),voltage(edge_cnt),current(edge_cnt)+current(edge_cnt+1));
+      edge_cnt=edge_cnt+2;
+    elseif(g.edges.data.type(edge_cnt)=='M')
+      mfprintf(fid,'%c\t %s\t %s\t %15.10f %15.10f\n',g.edges.data.type(edge_cnt),nodeMap(g.edges.tail(edge_cnt)),nodeMap(g.edges.head(edge_cnt)),voltage(edge_cnt),current(edge_cnt)+current(edge_cnt+1));
+      edge_cnt=edge_cnt+7;
+    else
+      mfprintf(fid,'%c\t %s\t %s\t %15.10f %15.10f\n',g.edges.data.type(edge_cnt),nodeMap(g.edges.tail(edge_cnt)),nodeMap(g.edges.head(edge_cnt)),voltage(edge_cnt),current(edge_cnt));
+      edge_cnt=edge_cnt+1;
+    end
+  end
+  mclose(fid);
+endfunction
+
+function initArrays(t_itr)
+  global vPrintArray; global vPlotArray;
+  global iPrintArray; global iPlotArray;
+  vPrintArray = zeros(t_itr,length(vPrintList)+1);
+  vPlotArray = zeros(t_itr,length(vPlotList));
+  iPrintArray = zeros(t_itr,length(iPrintList)+1);
+  iPlotArray = zeros(t_itr,length(iPlotList));
+endfunction
+
+function buildOutput(x,s,itr)
+  global vPrintList; 
+  global iPrintList; 
+  global sweepArray;
+  global vPrintArray; 
+  global iPrintArray;
+  sweepArray(itr)=s;
+// Store voltage output for printing  
+  if(~(vPrintList(1)==0))
+    fill_vPrintArray(x,itr);
+    vPrintArray(itr,1)=s;
+  end
+
+// Store voltage output for plotting  
+  if(~(vPlotList(1)==0))
+    fill_vPlotArray(x,itr);
+  end
+
+// Store current output for printing  
+  if(~(iPrintList(1)==0))
+    fill_iPrintArray(x,itr);
+    iPrintArray(itr,1)=s;
+  end
+
+// Store current output for plotting  
+  if(~(iPlotList(1)==0))
+    fill_iPlotArray(x,itr);
+  end
+endfunction
+
+function fill_vPrintArray(x,i)
+  global vPrintList;
+  global vPrintArray;
+  for j=1:1:length(vPrintList);
+     if(length(vPrintList(j))==1)
+       if(vPrintList(j)<0)
+        vPrintArray(i,j+1)=-x((-vPrintList(j))-1);
+       else		
+        vPrintArray(i,j+1)=x(vPrintList(j)-1);
+       end
+     elseif(length(vPrintList(j))==2)
+	mylist=vPrintList(j);
+	vPrintArray(i,j+1)=x(mylist(1)-1)-x(mylist(2)-1);
+     end 
+  end
+endfunction
+
+function fill_vPlotArray(x,i)
+  global vPlotList;
+  global vPlotArray;
+  for j=1:1:length(vPlotList);
+    if(length(vPlotList(j))==1)
+      if(vPlotList(j)<0)
+        vPlotArray(i,j)=-x((-vPlotList(j))-1);
+      else			
+        vPlotArray(i,j)=x(vPlotList(j)-1);
+      end
+    elseif(length(vPlotList(j))==2)
+      mylist=vPlotList(j);
+      vPlotArray(i,j)=x(mylist(1)-1)-x(mylist(2)-1);
+    end
+  end
+  clear mylist;
+endfunction
+
+function fill_iPrintArray(x,i)
+  global iPrintList;
+  global iPrintArray;
+  global g;
+  Nodes=node_number(g);
+  for j=1:1:length(iPrintList);
+    if(vPrintList(j)<0)
+       iPrintArray(i,j+1)=-x(-iPrintList(j)+Nodes-1);
+    else			
+       iPrintArray(i,j+1)=x(iPrintList(j)+Nodes-1);
+    end
+  end
+endfunction
+
+function fill_iPlotArray(x,i)
+  global iPlotList;
+  global iPlotArray;
+  global g;
+  Nodes=node_number(g);
+  for j=1:1:length(iPlotList);
+    if(iPlotList(j)<0)
+       iPlotArray(i,j)=-x(-iPlotList(j)+Nodes-1);
+    else			
+       iPlotArray(i,j)=x(iPlotList(j)+Nodes-1);
+    end
+  end
+endfunction
+
+function printSolution(xArray,xaxis,axisType);
+  global vPrintList; global vPlotList;
+  global iPrintList; global iPlotList;
+  global vPrintArray; global vPlotArray 
+  global iPrintArray; global iPlotArray;
+  if(~(vPlotList(1)==0))
+    plot(xArray,vPlotArray);
+    for(i=1:size(vPlotArray,2))
+        temp=vPlotList(i);
+        for(j=1:size(temp,2))
+            if(j==1)
+                a(i)="v("+string(temp(j))+")";
+            else
+                a(i)=a(i)+"-v("+string(temp(j))+")";
+            end
+        end
+    end
+    legend(a);  
+    xlabel(xaxis);
+    ylabel('voltage(V)');
+  end
+  if(~(vPrintList(1)==0))
+    disp(vPrintArray);
+  end
+  if(~(iPlotList(1)==0))
+    plot(xArray,iPlotArray);
+    for(i=1:size(iPlotArray,2))
+        temp=iPlotList(i);
+        disp(temp);
+        for(j=1:size(temp,2))
+            if(j==1)
+                a(i)="i("+string(temp(j))+")";
+            else
+                a(i)=a(i)+"-i("+string(temp(j))+")";
+            end
+        end
+    end
+    legend(a);  
+    xlabel(xaxis);
+    ylabel('current(A)');
+  end
+  if(~(iPrintList(1)==0))
+    disp(iPrintArray);
+  end
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/readfile.sci b/OSCAD/LPCSim/LPCSim/readfile.sci
new file mode 100644
index 0000000..2bf52aa
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/readfile.sci
@@ -0,0 +1,541 @@
+// readfile.sci is a scilab file to read a netlist of the circuit. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+// It is modified by Yogesh Dilip Save for OSCAD Software on October 2012
+
+warning('off');
+
+function Index=findIndexStrList(value,searchList)
+  for i=1:1:length(searchList)
+    if(~strcmp(searchList(i),value))
+       Index=i;
+       return;
+    end 		    	
+  end
+  Index=-1;
+endfunction
+
+// Get circuit analysis option from circuit file
+function [transParameter,sweep,Analysis,Nodes]=getAnalysisOption(filename)
+global vPrintList;
+global vPlotList;
+global iPrintList;
+global iPlotList;
+global initialVoltage;
+global dynamicFlag;
+global nodeMap;
+
+transParameter=list(0.0,0.0,0.0,0);
+sweep=list(0.0,0.0,0.0);
+vPrintList=list(0);
+vPlotList=list(0);
+iPrintList=list(0);
+iPlotList=list(0);
+nodeMap=list("0");
+vPrintIndex=1;
+vPlotIndex=1;
+iPrintIndex=1;
+iPlotIndex=1;
+icIndex=1;
+Analysis=0;
+
+//try
+// Open the circuit file
+fid = mopen(filename, 'r');
+if (fid == -1)
+  error("cannot open file for reading");
+end
+Nodes=2;
+
+while (1)
+   tempStr=mgetl(fid,1);
+   tempStr=stripblanks(tempStr);
+   if (length(tempStr)==0)
+     continue;
+   end
+   if (part(tempStr,1)=='*')
+     continue;
+   end
+   tempStr=convstr(tempStr,'u');
+   [dev] = sscanf(tempStr, "%s");
+   if (dev=='.END')
+     break;
+   elseif (dev=='.INCLUDE')
+     continue;
+   elseif (dev=='.OP')   // Operation Point Analysis
+     Analysis=0;
+   elseif (dev=='.TRAN')  // Transient Analysis
+     Analysis=1; UIC=0;
+     [UICstr] = msscanf(tempStr, "%*s %*f %*f %*f %s");
+     if(UICstr=='UIC') UIC=1; end
+     [stepSize,stopTime,startTime] = sscanf(tempStr, "%*s %f %f %f");
+     transParameter=list(startTime,stopTime,stepSize,UIC);
+   elseif (dev=='.DC')  // DC Analysis
+     Analysis=2;
+     [start,stop,step] = sscanf(tempStr, "%*s %f %f %f");
+     sweep=list(start,stop,step);
+   elseif (dev=='.AC')  // AC Analysis
+     Analysis=3;
+     [axisType,NP,start,stop] = sscanf(tempStr, "%*s %s %d %f %f");
+     sweep=list(start,stop,NP,axisType);
+   elseif (dev=='.IC')  // intial condition
+     if(icIndex==1)
+       initialVoltage=list(0);
+     end
+     token = strtok(tempStr," ");
+     while( token <> '' )
+       token = strtok(" ");
+       if(length(token)) 
+        [NodeNumber,potential]=sscanf(token,"V(%d)=%f");
+        initialVoltage(icIndex)=[NodeNumber,potential];
+        icIndex=icIndex+1; 
+       end
+     end
+// Get Output variable for printing
+   elseif (dev=='.PRINT') 
+     token = strtok(tempStr," ");
+     while( token <> '' )
+       token = strtok(" ");
+       if(length(token))
+         if(msscanf(token,"%c")=='V')
+           if(length(strchr(token,'-')))
+             if(length(strchr(token,'-'))==length(token))
+               printNode=sscanf(token,"-V(%d)"); 
+               vPrintList(vPrintIndex)=-findIndexStrList(string(printNode),nodeMap);
+             else
+               [printNode,printNode1]=sscanf(token,"V(%d)-V(%d)");
+               vPrintList(vPrintIndex)=[findIndexStrList(string(printNode),nodeMap),findIndexStrList(string(printNode1),nodeMap)];
+             end
+           else                
+             printNode=sscanf(token,"V(%d)"); 
+             vPrintList(vPrintIndex)=findIndexStrList(string(printNode),nodeMap);
+           end
+           vPrintIndex=vPrintIndex+1;
+         elseif(msscanf(token,"%c")=='I')
+           if(length(strchr(token,'-')))
+             printNode=msscanf(token,"-I(%*c%d)"); 
+             iPrintList(iPrintIndex)=-printNode;
+           else                
+             printNode=msscanf(token,"I(%*c%d)"); 
+             iPrintList(iPrintIndex)=printNode;
+           end
+           iPrintIndex=iPrintIndex+1;
+         end
+       end
+     end
+// Get Output variable for plotting
+   elseif (dev=='.PLOT')
+     token = strtok(tempStr," ");
+     while( token <> '' )
+       token = strtok(" ");
+       if(length(token))
+         if(msscanf(token,"%c")=='V')
+           if(length(strchr(token,'-')))
+             if(length(strchr(token,'-'))==length(token))
+               printNode=sscanf(token,"-V(%d)"); 
+               vPlotList(vPlotIndex)=-findIndexStrList(string(printNode),nodeMap);
+             else
+               [printNode,printNode1]=sscanf(token,"V(%d)-V(%d)");
+               vPlotList(vPlotIndex)=[findIndexStrList(string(printNode),nodeMap),findIndexStrList(string(printNode1),nodeMap)];
+             end
+           else                
+             printNode=sscanf(token,"V(%d)"); 
+             vPlotList(vPlotIndex)=findIndexStrList(string(printNode),nodeMap);
+           end
+           vPlotIndex=vPlotIndex+1;
+         elseif(msscanf(token,"%c")=='I')
+           if(length(strchr(token,'-')))
+             printNode=msscanf(token,"-I(%*c%d)"); 
+             iPlotList(iPlotIndex)=-printNode;
+           else                
+             printNode=msscanf(token,"I(%*c%d)"); 
+             iPlotList(iPlotIndex)=printNode;
+           end
+           iPlotIndex=iPlotIndex+1;
+         end
+       end
+     end
+// Find number of nodes in the circuit
+   else
+     devtype=sscanf(tempStr, "%c");
+     if(devtype=='M')
+       [source,sink,gate] = sscanf(tempStr, "%*s %s %s %s");
+       Index=findIndexStrList(gate,nodeMap);
+       if(Index==-1) 
+         nodeMap(Nodes)=gate;
+         Nodes=Nodes+1;
+       end
+     else
+        [source,sink] = sscanf(tempStr, "%*s %s %s");
+     end
+     Index=findIndexStrList(source,nodeMap);
+     if(Index==-1) 
+       nodeMap(Nodes)=source;
+       Nodes=Nodes+1;
+     end
+     Index=findIndexStrList(sink,nodeMap);
+     if(Index==-1) 
+       nodeMap(Nodes)=sink;
+       Nodes=Nodes+1
+     end
+   end
+  end
+err=mclose(fid)
+
+Nodes=Nodes-1;
+//catch
+//   disp("Error in circuit file. Error code:110. Exiting.......");
+//   abort;
+//end
+endfunction
+
+function T=convertCircuitIntoGraph(filename,Nodes)
+global g;
+global model;
+global wave;
+global iPrintList;
+global iPlotList;
+global cValue;
+global cInitial;
+global NLFlag;
+global dynamicFlag;
+global nodeMap;
+
+model=list(0);
+wave=list(0);
+Edges=0;
+T=0;
+X=0;
+
+//try
+// Open the circuit file
+fid=mopen(filename,'r');
+firstEdge=%t
+X=1;
+C=1;
+waveIndex=1;
+
+// Scan each line of the circuit file
+while (1)
+   tempStr=mgetl(fid,1);
+   tempStr=stripblanks(tempStr);
+   if (length(tempStr)==0)
+     continue;
+   end
+   if (part(tempStr,1)=='*')
+     continue;
+   end
+   tempStr=convstr(tempStr,'u')
+   [dev] = sscanf(tempStr, "%s");
+   if (dev=='.END')
+     break;
+   elseif (dev=='.OP'|dev=='.TRAN'|dev=='.DC'|dev=='.IC'|dev=='.PLOT'|dev=='.PRINT'|dev=='.AC'|dev=='.INCLUDE')
+     continue;
+   else
+      [sourceS, sinkS] = sscanf(tempStr, "%*s %s %s");
+      source=findIndexStrList(sourceS,nodeMap);
+      sink=findIndexStrList(sinkS,nodeMap);
+      Edges=Edges+1;
+      if(firstEdge) // initializing graph with first edge
+        g = make_graph('my_graph',1,Nodes,source,sink);
+        g = add_edge_data(g,'type');
+        g = add_edge_data(g,'value');
+        g = add_edge_data(g,'devName');
+        firstEdge=%f; 
+      else
+        g=add_edge(source,sink,g);
+      end
+      [device_type] = sscanf(dev, "%c");
+      g.edges.data.devName(Edges) = dev;
+      select (device_type)
+        case 'R' then    // Resistance
+          g.edges.data.type(Edges) = device_type;
+          [value] = sscanf(tempStr, "%*s %*s %*s %f"); 
+          g.edges.data.value(Edges) = 1/value;
+        
+        case 'I' then    // Current Source
+          tempWave=list(0);
+          g.edges.data.type(Edges) = device_type;
+          wavtype = sscanf(tempStr, "%*s %*s %*s %s");
+          [wave(waveIndex),g.edges.data.value(Edges)] = getSourceParam(tempStr,wavtype);
+          waveIndex=waveIndex+1;
+          
+        case 'V' then   // Voltage Source
+          tempWave=list(0);
+          g.edges.data.type(Edges) = device_type;
+          Index=msscanf(tempStr, "%*c%d"); 
+          wavtype1 = sscanf(tempStr, "%*s %*s %*s %s");
+          wavtype2=strsplit(wavtype1,'(');
+          wavtype=wavtype2(1);
+          [wave(waveIndex),g.edges.data.value(Edges)] = getSourceParam(tempStr,wavtype);
+          waveIndex=waveIndex+1;
+          T=T+1;
+       // For printing and plotting current variables    
+          if(~(iPlotList(1)==0))
+            Index=findIndex(Index,iPlotList);
+            if(~(Index==0)) 
+              iPlotList(Index)=T;
+            end 
+          end
+          if(~(iPrintList(1)==0))
+            Index=findIndex(Index,iPrintList);
+            if(~(Index==0)) 
+              iPrintList(Index)=T;
+            end 
+          end
+        
+        case 'G' then   // Voltage Controlled Current Source
+          g.edges.data.type(Edges) = device_type;
+          [sourceCS sinkCS value] = sscanf(tempStr, "%*s %*s %*s %s %s %f");
+          sourceC=findIndexStrList(sourceCS,nodeMap);
+          sinkC=findIndexStrList(sinkCS,nodeMap);
+          g.edges.data.value(Edges) = value;
+          Edges=Edges+1;
+       // Add Current Source for voltage sensing
+          g=add_edge(sourceC,sinkC,g); 
+          g.edges.data.type(Edges) = 'I';
+          g.edges.data.value(Edges) = 0;
+          tempWave=list(0);
+          tempWave(1)='dc';
+          wave(waveIndex)=tempWave;            
+          waveIndex=waveIndex+1;
+          clear tempWave;
+          
+        case 'E' then   // Voltage Controlled Voltage Source
+          g.edges.data.type(Edges) = device_type;
+          [sourceCS sinkCS value] = sscanf(tempStr, "%*s %*s %*s %s %s %f");
+          sourceC=findIndexStrList(sourceCS,nodeMap);
+          sinkC=findIndexStrList(sinkCS,nodeMap);
+          g.edges.data.value(Edges) = value;
+          Edges=Edges+1;
+       // Add Current Source for voltage sensing
+          g=add_edge(sourceC,sinkC,g);
+          g.edges.data.type(Edges) = 'I';
+          g.edges.data.value(Edges) = 0;
+          T=T+1;
+          tempWave=list(0);
+          tempWave(1)='dc';
+          wave(waveIndex)=tempWave;            
+          waveIndex=waveIndex+1;
+          clear tempWave;
+
+        case 'F' then   // Current Controlled Current Source
+          g.edges.data.type(Edges) = device_type;
+          [value] = sscanf(tempStr, "%*s %*s %*s %*s %f");
+          g.edges.data.value(Edges) = value;
+          Edges=Edges+1;
+          T=T+1;
+
+        case 'H' then  // Current Controlled Voltage Source
+          g.edges.data.type(Edges) = device_type;
+          [value] = sscanf(tempStr, "%*s %*s %*s %*s %f");
+          g.edges.data.value(Edges) = value;
+          Edges=Edges+1;
+          T=T+1;
+          
+        case 'D' then  // Diode
+          NLFlag=%T;
+          tempModel=list(0);
+          g.edges.data.type(Edges) = 'D';
+          tempModel(1) = sscanf(tempStr, "%*s %*s %*s %s");
+          token = strtok(tempStr,"(");
+          i=2;
+          while( token <> '' )
+            token = strtok(" )");
+            if(length(token))
+               tempModel(i)=atof(token);
+               i=i+1; 
+            end
+          end
+          if(length(tempModel)==1)
+            tempModel(2)=1e-14;
+            tempModel(3)=0.026;
+          end
+          Is=tempModel(2);
+          Vt=tempModel(3);
+          model(X)=tempModel;            
+          g.edges.data.value(Edges) = Is/Vt;
+          Edges=Edges+1;
+       // Add Current Source parallel with resistance(linearization)
+          g=add_edge(source,sink,g);
+          g.edges.data.type(Edges) = 'I';
+          g.edges.data.value(Edges) = 0;
+          tempWave=list(0);
+          tempWave(1)='dc';
+          wave(waveIndex)=tempWave;            
+          waveIndex=waveIndex+1;
+          clear tempWave;
+          X=X+1;
+          clear tempModel;
+
+        case 'M' then  // MOSFET 
+          tempModel=list(0);
+          g.edges.data.type(Edges) = device_type;
+          g.edges.data.value(Edges) = 1e-12;
+          Edges=Edges+1;
+          [gateNodeS,tempModel(1)] = sscanf(tempStr, "%*s %*s %*s %s %s");
+          gateNode=findIndexStrList(gateNode,nodeMap);
+          token = strtok(tempStr,"(");
+          i=2;
+          while( token <> '' )
+            token = strtok(" )");
+            if(length(token))
+              tempModel(i)=atof(token);
+              i=i+1; 
+            end
+          end
+          model(X)=tempModel;            
+     
+     // Add current source drain to source
+          g=add_edge(source,sink,g);
+          g.edges.data.type(Edges) = 'I';
+          g.edges.data.value(Edges) = 0;
+          tempWave=list(0);
+          tempWave(1)='dc';
+          wave(waveIndex)=tempWave;            
+          waveIndex=waveIndex+1;
+          clear tempWave;
+          Edges=Edges+1;
+       
+       // Add current source gate to source   
+          g=add_edge(gateNode,sink,g);
+          g.edges.data.type(Edges) = 'I';
+          g.edges.data.value(Edges) = 0;
+          tempWave=list(0);
+          tempWave(1)='dc';
+          wave(waveIndex)=tempWave;            
+          waveIndex=waveIndex+1;
+          clear tempWave;
+          X=X+1;
+          Edges=Edges+1;
+        
+       // Add capactior gate to drain  
+          g=add_edge(gateNode,source,g);
+          g.edges.data.type(Edges) = 'C';
+          cValue(C)=0.5*tempModel(4)*tempModel(2)*tempModel(3);
+          g.edges.data.value(Edges) = 1e-12;
+          Edges=Edges+1;
+          
+          g=add_edge(source,gateNode+1,g);
+          g.edges.data.type(Edges) = 'I';
+          g.edges.data.value(Edges) = 0;
+          tempWave=list(0);
+          tempWave(1)='dc';
+          wave(waveIndex)=tempWave;            
+          waveIndex=waveIndex+1;
+          clear tempWave;
+          C=C+1;
+          Edges=Edges+1;
+        
+        // Add capacitor gate to source
+          g=add_edge(gateNode,sink,g);
+          g.edges.data.type(Edges) = 'C';
+          cValue(C)=0.5*tempModel(4)*tempModel(2)*tempModel(3);
+          g.edges.data.value(Edges) = 1e-12;
+          Edges=Edges+1;
+     
+          g=add_edge(sink,gateNode,g);
+          g.edges.data.type(Edges) = 'I';
+          g.edges.data.value(Edges) = 0;
+          tempWave=list(0);
+          tempWave(1)='dc';
+          wave(waveIndex)=tempWave;            
+          waveIndex=waveIndex+1;
+          clear tempWave;
+          C=C+1;
+          clear tempModel;
+          
+        case 'C' then  // Capacitor 
+          dynamicFlag=%T;
+          g.edges.data.type(Edges) = 'C';
+          [value] = sscanf(tempStr, "%*s %*s %*s %f");
+          token=strtok(tempStr,"=");
+          token = strtok(" ");
+          if(token <> '')
+            cInitial(C)=atof(token);  
+          else
+            cInitial(C)=0.0;  
+          end
+          cValue(C)=value;
+          g.edges.data.value(Edges) = 0.0;
+          Edges=Edges+1;
+          g=add_edge(sink,source,g);
+          g.edges.data.type(Edges) = 'I';
+          g.edges.data.value(Edges) = 0;
+          tempWave=list(0);
+          tempWave(1)='dc';
+          wave(waveIndex)=tempWave;            
+          waveIndex=waveIndex+1;
+          clear tempWave;
+          C=C+1;
+
+        case 'X' then  // UserDefined Component
+          tempModel=list(0);
+          g.edges.data.type(Edges) = 'X';
+          tempModel(1) = sscanf(tempStr, "%*s %*s %*s %s");
+          i=2;
+          token = strtok(tempStr,"(");
+          while( token <> '' )
+            token = strtok(" )");
+            if(length(token))
+              tempModel(i)=atof(token);
+              i=i+1; 
+            end
+          end
+          model(X)=tempModel;            
+          generateCallingLibF(tempModel(1));
+          exec('getlib.sci',-1); 
+          value=jacobian(0.0,model(X));
+          if(value>1d-6)      
+            g.edges.data.value(Edges) = value;
+          else
+            g.edges.data.value(Edges) = 1d-6;
+          end
+          Edges=Edges+1;
+          g=add_edge(source,sink,g);
+          g.edges.data.type(Edges) = 'I';
+          g.edges.data.value(Edges) = 0;
+          tempWave=list(0);
+          tempWave(1)='dc';
+          wave(waveIndex)=tempWave;            
+          waveIndex=waveIndex+1;
+          clear tempWave;
+          X=X+1;
+          clear tempModel;
+        else
+          printf("Incorrect input file\n");
+          exit(0);
+        end
+   end
+end //while
+mclose(fid);
+//catch
+//   disp("Error in circuit file. Error code: 120 Exiting.......");
+//   abort;
+//end
+endfunction
+          
+function [tempWave,value]=getSourceParam(tempStr,wavtype)
+  tempWave=list(0);
+  tempWave(1)=wavtype;
+  if(wavtype=='DC') 
+    value = sscanf(tempStr, "%*s %*s %*s %*s %f");
+  elseif(wavtype=='SWEEP') 
+    value = sscanf(tempStr, "%*s %*s %*s %*s %f");
+  elseif(wavtype=='AC') 
+    value = sscanf(tempStr, "%*s %*s %*s %*s %f");
+  else
+    token = strtok(tempStr,"(");
+    i=2;
+    while( token <> '' )
+      token = strtok(" )");
+      if(length(token))
+         tempWave(i)=atof(token);
+         i=i+1; 
+      end
+    end            
+    value = 0;
+  end
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/support/atof.sci b/OSCAD/LPCSim/LPCSim/support/atof.sci
new file mode 100644
index 0000000..2933af1
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/support/atof.sci
@@ -0,0 +1,7 @@
+function value=atof(tempStr)
+     value=sscanf(tempStr,"%e");
+endfunction
+
+function value=atoi(tempStr)
+     value=sscanf(tempStr,"%d");
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/support/findIndex.sci b/OSCAD/LPCSim/LPCSim/support/findIndex.sci
new file mode 100644
index 0000000..90293cc
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/support/findIndex.sci
@@ -0,0 +1,9 @@
+function Index=findIndex(Index,searchList)
+  for i=1:1:length(searchList)
+    if(searchList(i)==Index)
+       Index=i;  
+       return;
+    end 		    	
+  end
+  Index=0;
+endfunction
diff --git a/OSCAD/LPCSim/LPCSim/tranAnalysis.sci b/OSCAD/LPCSim/LPCSim/tranAnalysis.sci
new file mode 100644
index 0000000..5f35a0c
--- /dev/null
+++ b/OSCAD/LPCSim/LPCSim/tranAnalysis.sci
@@ -0,0 +1,383 @@
+// tranAnalysis.sci is a scilab file to perform Transient Analysis. It is developed for a scilab based circuit simulator. It is written by Yogesh Dilip Save (yogessave@gmail.com).  
+// Copyright (C) 2012 Yogesh Dilip Save
+// This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
+// This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
+// You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+
+function [A,B,x]=transientAnalysis(A,B,x,t,i)
+  global LPCSim_HOME;
+  exec(LPCSim_HOME+'discretization.sci',-1);
+  MaxNRitr=50;
+  if(i-2)
+// Discretize time dependent component and update matrices
+  	[A,B]=discretization(A,B,x,t,i);
+
+// Perform Operating Point Analysis on static circuit
+  	[A,B,x]=OPAnalysis(A,B);
+
+// Store Output Variable for plotting/printing 
+        buildOutput(x,t,i);
+   else
+// Perform Operating Point Analysis on static circuit at t=0+
+  // Build Modified Nodal Matrix for linear devices
+        [C,d]=buildMatrices2(g,x);
+
+  // Perform Operating Point Analysis on static circuit
+  	[C,d,x]=OPAnalysis(C,d);
+
+  // Store Output Variable for plotting/printing 
+        buildOutput(x,t,i);
+   end
+endfunction 
+
+function [x]=setIntialCondition(K,y,x,_T,UIC)
+// Compute fictitious node potential at t=0 
+  global g;
+  _C=1;
+  first_edge=%t;
+  Nodes=node_number(g);
+  nodeCovered=zeros(Nodes,1);
+  xnew=zeros(Nodes,1);
+  Edges=1;
+
+// Build a tree of Voltage sources
+  for edge_cnt = 1:edge_number(g),
+    if(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H')
+      source=g.edges.tail(edge_cnt);
+      sink=g.edges.head(edge_cnt);
+      if(first_edge)
+      	g1 = make_graph('mygraph1',1,Nodes,source,sink);
+        g1 = add_edge_data(g1,'voltage');
+        g1 = add_edge_data(g1,'number');
+        if(g.edges.data.type(edge_cnt)=='V')
+          g1.edges.data.voltage(Edges) = g.edges.data.value(edge_cnt);
+        else
+          g1.edges.data.voltage(Edges) = x(source)-x(sink);
+        end
+        g1.edges.data.number(Edges) = edge_cnt;
+        Edges=Edges+1; 
+        first_edge=%f;
+      else 
+        g1=add_edge(source,sink,g1);
+        if(g.edges.data.type(edge_cnt)=='V')
+          g1.edges.data.voltage(Edges) = g.edges.data.value(edge_cnt);
+        else
+          g1.edges.data.voltage(Edges) = x(source)-x(sink);
+        end
+        g1.edges.data.number(Edges) = edge_cnt;
+        Edges=Edges+1; 
+      end
+      if(~nodeCovered(source))
+         nodeCovered(source)=1;
+      end
+      if(~nodeCovered(sink))
+         nodeCovered(sink)=1;
+      end
+    end
+  end
+  
+  chargeBalanceRequired=%f; 
+// If UIC is set then use device intial condition (with highest priority)
+  if(UIC==1)
+ // Extend the tree by adding voltage source corresponding to capacitor with initial condition
+    global cInitial;
+    for edge_cnt = 1:edge_number(g),
+      if(g.edges.data.type(edge_cnt)=='C')
+        source=g.edges.tail(edge_cnt);
+        sink=g.edges.head(edge_cnt);
+        if(~nodeCovered(source))
+           if(~nodeCovered(sink))
+              nodeCovered(sink)=1;
+           end
+           nodeCovered(source)=1;
+           g1=add_edge(source,sink,g1);
+           g1.edges.data.voltage(Edges)=cInitial(_C);
+        elseif(~nodeCovered(sink))
+           nodeCovered(sink)=1;
+           g1=add_edge(source,sink,g1);
+           g1.edges.data.voltage(Edges)=cInitial(_C);
+        else
+    	 [nc,ncomp]=connex(g1);
+           if(ncomp(source)~=ncomp(sink))
+             g1=add_edge(source,sink,g1);
+             g1.edges.data.voltage(Edges)=cInitial(_C);
+           else
+             g1=add_edge(source,sink,g1);
+             g1.edges.data.voltage(Edges)=cInitial(_C);
+             if(~chargeBalanceRequired)
+               cap=list(Edges);
+               chargeBalanceRequired=%t;
+             else
+               cap($+1)=Edges; 
+             end
+           end
+        end
+        g1.edges.data.number(Edges) = edge_cnt;
+        Edges=Edges+1;
+        _C=_C+1;
+      end
+    end 
+  end 
+
+  if(~chargeBalanceRequired)
+  // Insert voltage sources corresponding to intial condition
+    global initialVoltage;
+    for j=1:1:length(initialVoltage);
+      templist=initialVoltage(j);
+      source=templist(1)+1;
+      sink=1;
+      if(~nodeCovered(source))
+        nodeCovered(source)=1;
+        g1=add_edge(source,sink,g1);
+        g1.edges.data.voltage(Edges)=templist(2);
+        g1.edges.data.number(Edges) = Edges;
+        Edges=Edges+1;
+      end 
+    end
+  
+  // Extend the tree to complete graph  
+    if(UIC==1)
+       for edge_cnt = 1:edge_number(g),
+         if(edge_number(g1)==Nodes-1) break; end;
+         if(~(g.edges.data.type(edge_cnt)=='C'|g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='I'))
+  	   source=g.edges.tail(edge_cnt);
+  	   sink=g.edges.head(edge_cnt);
+  	   if(~nodeCovered(source))
+  	      if(~nodeCovered(sink))
+  	         nodeCovered(sink)=1;
+  	      end
+  	      nodeCovered(source)=1;
+  	      g1=add_edge(source,sink,g1);
+  	      g1.edges.data.voltage(Edges)=0.0;
+              g1.edges.data.number(Edges) = Edges;
+  	      Edges=Edges+1;
+  	   elseif(~nodeCovered(sink))
+  	      nodeCovered(sink)=1;
+  	      g1=add_edge(source,sink,g1);
+  	      g1.edges.data.voltage(Edges)=0.0;
+              g1.edges.data.number(Edges) = Edges;
+  	      Edges=Edges+1;
+  	   else
+  	      [nc,ncomp]=connex(g1);
+  	      if(nc==1) break; end;
+  	      if(ncomp(source)~=ncomp(sink))
+  	        g1=add_edge(source,sink,g1);
+  	        g1.edges.data.voltage(Edges)=0.0;
+                g1.edges.data.number(Edges) = Edges;
+  	        Edges=Edges+1;
+  	      end
+  	   end
+         end
+       end
+    else 
+      for edge_cnt = 1:edge_number(g),
+        if(~(g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='I'))
+          source=g.edges.tail(edge_cnt);
+          sink=g.edges.head(edge_cnt);
+          if(~nodeCovered(source))
+             if(~nodeCovered(sink))
+                nodeCovered(sink)=1;
+             end
+             nodeCovered(source)=1;
+             g1=add_edge(source,sink,g1);
+             g1.edges.data.voltage(Edges)=0.0;
+             g1.edges.data.number(Edges) = Edges;
+             Edges=Edges+1;
+          elseif(~nodeCovered(sink))
+             nodeCovered(sink)=1;
+             g1=add_edge(source,sink,g1);
+             g1.edges.data.voltage(Edges)=0.0;
+             g1.edges.data.number(Edges) = Edges;
+             Edges=Edges+1;
+          else
+             [nc,ncomp]=connex(g1);
+             if(nc==1) break; end;
+             if(ncomp(source)~=ncomp(sink))
+               g1=add_edge(source,sink,g1);
+               g1.edges.data.voltage(Edges)=0.0;
+               g1.edges.data.number(Edges) = Edges;
+               Edges=Edges+1;
+             end
+          end
+        end
+      end
+    end
+ // Find the node potentials from tree branch voltages at t=0  
+    g1.directed=0;
+    listOfNodes=list(1);
+    nodeCovered(1)=0;
+    for i=1:Nodes
+      predecessor=listOfNodes(i);
+      neNodes=neighbors(predecessor,g1);
+      [k1 k2]=size(neNodes);
+      for j=1:k2
+        sucessor=neNodes(j);
+        if(nodeCovered(sucessor))
+  	listOfNodes=lstcat(listOfNodes,sucessor);
+  	nodeCovered(sucessor)=0;
+  	e=nodes_2_path([predecessor sucessor],g1);
+  	if(g.edges.tail(e)==predecessor)
+  	  xnew(sucessor)=xnew(predecessor)-g1.edges.data.voltage(e); 
+  	else
+  	  xnew(sucessor)=xnew(predecessor)+g1.edges.data.voltage(e); 
+  	end
+        end
+      end
+    end
+    x(1:Nodes-1,1)=xnew(2:Nodes,1);
+
+ // Charge Balance scheme using equivalent electrical representation 
+  else
+   // Find the components which require charge balancing
+    [nc,ncomp]=connex(g1);
+    for j=1:1:length(cap),
+      if(j==1)
+        CBcomp=list(ncomp(g.edges.tail(g1.edges.data.number(cap(j)))));
+      else
+        tempBlock=ncomp(g.edges.tail(g1.edges.data.number(cap(j))));
+        blockFound=%f
+        for j=1:1:length(CBcomp),
+           if(CBcomp(j)==tempBlock)
+              blockFound=%t;
+           end
+        end
+        if(~blockFound)
+          CBcomp($+1)=ncomp(g.edges.tail(g1.edges.data.number(cap(j))));
+        end
+      end
+    end
+
+   // Find edge voltages of the components by operating point analysis 
+    for j=1:1:length(CBcomp),
+      disp(length(CBcomp));
+      firstEdge=%t;
+      Edges=1;
+      k=1;
+      _C=0;
+      for i=1:Nodes
+        if(ncomp(i)==CBcomp(j))
+          nodeMap(k)=i;
+          nodeReverseMap(i)=k;
+          k=k+1;
+        end
+      end 
+      for edge_cnt = 1:edge_number(g1),
+        edge_cnt1=g1.edges.data.number(edge_cnt);
+        source=g.edges.tail(edge_cnt1);
+        sink=g.edges.head(edge_cnt1);
+        if(g.edges.data.type(edge_cnt1)=='C')
+          _C=_C+1;
+        end
+        if(~(ncomp(source)==CBcomp(j)))
+           continue; 
+        end  
+        source=nodeReverseMap(source);
+        sink=nodeReverseMap(sink);
+        if(firstEdge) // initializing graph with first edge
+           g2 = make_graph('mygraph2',1,k-1,source,sink);
+           g2 = add_edge_data(g2,'type');
+           g2 = add_edge_data(g2,'value');
+           g2 = add_edge_data(g2,'number');
+           firstEdge=%f; 
+        else
+           g2=add_edge(source,sink,g2);
+        end
+        if(g.edges.data.type(edge_cnt1)=='V')
+          g2.edges.data.type(Edges) = 'V';
+          g2.edges.data.value(Edges) = g.edges.data.value(edge_cnt1);
+          g2.edges.data.number(Edges) = edge_cnt;
+          Edges=Edges+1;
+      // Replace capacitor with conductance parallel with conductance
+        else
+          g2.edges.data.type(Edges) = 'R'
+          g2.edges.data.value(Edges) = g.edges.data.value(edge_cnt1);
+          g2.edges.data.number(Edges) = edge_cnt;
+          Edges=Edges+1;
+          g2=add_edge(source,sink,g2);
+          g2.edges.data.type(Edges) = 'I'
+          g2.edges.data.value(Edges) =-g.edges.data.value(edge_cnt1)*cInitial(_C);
+          g2.edges.data.number(Edges) = edge_cnt;
+          Edges=Edges+1;
+        end 
+      end
+     // Build Modified Nodal Matrix for linear devices
+      [C,d]=buildMatrices3(g2);
+ 
+     // Find node potetial 
+      xnew=findNodePotential(C,d);
+     
+     // Find branch voltages from node potential
+      Edges=edge_number(g2);
+      for edge_cnt = 1:Edges,
+        if(g2.edges.head(edge_cnt)==1)
+          g1.edges.data.voltage(g2.edges.data.number(edge_cnt))=xnew(g2.edges.tail(edge_cnt)-1);
+        elseif(g.edges.tail(edge_cnt)==1)
+          g1.edges.data.voltage(g2.edges.data.number(edge_cnt))=-xnew(g2.edges.head(edge_cnt)-1);
+        else 
+          g1.edges.data.voltage(g2.edges.data.number(edge_cnt))=xnew(g2.edges.tail(edge_cnt)-1)-xnew(g2.edges.head(edge_cnt)-1);
+        end     
+      end
+      clear g2;
+      clear xnew;
+    end  
+  // Extend it to form tree of complete graph 
+    Nodes=node_number(g);
+    for edge_cnt = 1:edge_number(g),
+      if(edge_number(g1)==Nodes-1) break; end;
+      if(~(g.edges.data.type(edge_cnt)=='C'|g.edges.data.type(edge_cnt)=='V'|g.edges.data.type(edge_cnt)=='E'|g.edges.data.type(edge_cnt)=='H'|g.edges.data.type(edge_cnt)=='I'))
+        source=g.edges.tail(edge_cnt);
+        sink=g.edges.head(edge_cnt);
+        if(~nodeCovered(source))
+           if(~nodeCovered(sink))
+              nodeCovered(sink)=1;
+           end
+           nodeCovered(source)=1;
+           g1=add_edge(source,sink,g1);
+           g1.edges.data.voltage(Edges)=0.0;
+           g1.edges.data.number(Edges) = Edges;
+           Edges=Edges+1;
+        elseif(~nodeCovered(sink))
+           nodeCovered(sink)=1;
+           g1=add_edge(source,sink,g1);
+           g1.edges.data.voltage(Edges)=0.0;
+           g1.edges.data.number(Edges) = Edges;
+           Edges=Edges+1;
+        else
+           [nc,ncomp]=connex(g1);
+           if(nc==1) break; end;
+           if(ncomp(source)~=ncomp(sink))
+             g1=add_edge(source,sink,g1);
+             g1.edges.data.voltage(Edges)=0.0;
+             g1.edges.data.number(Edges) = Edges;
+             Edges=Edges+1;
+           end
+        end
+      end
+    end
+    
+    xnew=zeros(Nodes,1);
+    g1.directed=0;
+    listOfNodes=list(1);
+    nodeCovered(1)=0;
+    for i=1:Nodes
+      predecessor=listOfNodes(i);
+      neNodes=neighbors(predecessor,g1);
+      [k1 k2]=size(neNodes);
+      for j=1:k2
+        sucessor=neNodes(j);
+        if(nodeCovered(sucessor))
+          listOfNodes=lstcat(listOfNodes,sucessor);
+          nodeCovered(sucessor)=0;
+          e=nodes_2_path([predecessor sucessor],g1);
+          if(g.edges.tail(e)==predecessor)
+            xnew(sucessor)=xnew(predecessor)-g1.edges.data.voltage(e); 
+          else
+            xnew(sucessor)=xnew(predecessor)+g1.edges.data.voltage(e); 
+          end
+        end
+      end
+    end
+    x(1:Nodes-1,1)=xnew(2:Nodes,1);
+  end
+endfunction
diff --git a/OSCAD/LPCSim/LUT/ids.cpp b/OSCAD/LPCSim/LUT/ids.cpp
new file mode 100644
index 0000000..cc6f489
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/ids.cpp
@@ -0,0 +1,394 @@
+/****************************************************************************
+	This routine assumes the existance of file named "vbs_files.txt" 
+	and	the files decribed in the that file in current directory.
+	File vbs_files.txt contains vbs values and corresponding Id-Vds_Vgs file names
+	e.g. one entry may be 0.2 vbs_0.2.txt
+*****************************************************************************/
+
+/******************* Header *********************************/
+#include <iostream>
+#include <iomanip>
+#include <fstream>
+#include <math.h>
+#include <cstdlib>
+#include <string.h>
+
+
+struct CoeffStruct{
+	double x;
+	double y;
+	double z;
+};
+
+class NaturalCubicSpline1D{
+public:
+	double ValueAtX(double x);
+	void initialize(int n,double* xData,double* yData);
+	NaturalCubicSpline1D(int NO_OF_POINTS,double* xData,double* yData);		//Read from array
+	NaturalCubicSpline1D();												//User input
+	~NaturalCubicSpline1D();
+
+private:
+	void DetermineCoeff();
+	int  NO_OF_POINTS;  
+	CoeffStruct* coeffsArray;
+};
+
+class  yCSpair{
+public:
+	double y;
+	NaturalCubicSpline1D xCubicSpline;
+	yCSpair();
+	~yCSpair();
+};
+
+class CubicCubic{
+public:
+	double evaluate(double x,double y);
+	void Initialize(char* Id_Vd_Vg);
+	const CubicCubic & operator=(const CubicCubic &rhs);
+	CubicCubic(char* Id_Vd_Vg);
+	CubicCubic(char* yfileName,char* xzfileName);
+	CubicCubic(int no_yPoints, double yArray[],int *pxArray,double** xArray,double** zArray);
+	CubicCubic();
+	~CubicCubic();
+private:
+	int noYPoints;
+	yCSpair *CubicSplines1D;
+};
+
+class IdVbs{
+public:
+	double Evaluate(double vds,double vgs,double vbs);
+	void Initialize(double vbs);
+	IdVbs();
+	~IdVbs();
+private:
+	double vbs_l,vbs_h;   //vbs lies in interval [vbs_l,vbs_h]
+	CubicCubic cc_l;
+	CubicCubic cc_h;
+}; 
+/******************* Header *********************************/
+
+
+/********************* SciLab Callable Routine *******************************/
+//extern "C" _declspec(dllexport) 
+extern "C"
+void ids_c( double *vds,
+            double *vgs,
+            double *vbs,
+            double *ids){
+	IdVbs id;
+	*ids=id.Evaluate(*vds,*vgs,*vbs);
+}
+
+
+/****************************************************/
+using namespace std;
+
+double NaturalCubicSpline1D::ValueAtX(double x){
+	/*     x < Start Point first polynomial to be used
+		   x > End   Point last  polynomial to be used
+	*/
+	
+	// Find the segment where x lies
+	int i=0;							// i is used outside loop
+	for(i=0;i<NO_OF_POINTS-2;++i){		// upto NO_OF_POINTS-3
+		if( x<=coeffsArray[i+1].x) {    // serially increment so valid
+			break;
+		}
+	}
+	//Evaluate the function
+	double value=0,Bi=0,hi=1;
+	hi = coeffsArray[i+1].x - coeffsArray[i].x;
+	Bi = -hi*(coeffsArray[i+1].z + 2*coeffsArray[i].z)/6 + (coeffsArray[i+1].y - coeffsArray[i].y)/hi;  
+	double xti=(x - coeffsArray[i].x);
+	value = coeffsArray[i].y + xti*(Bi + xti*(coeffsArray[i].z/2 + xti*(coeffsArray[i+1].z - coeffsArray[i].z)/(6*hi)));
+	return value;
+}
+
+void NaturalCubicSpline1D::DetermineCoeff(){
+	double* u;
+	u=new double[NO_OF_POINTS];
+	double* v;
+	v=new double[NO_OF_POINTS];
+
+	u[0]=v[0]=0;   // not to be used
+	double h1,h0,b1,b0;
+
+	h0=coeffsArray[1].x - coeffsArray[0].x;
+	h1=coeffsArray[2].x - coeffsArray[1].x;
+
+	b0=(1/h0)*(coeffsArray[1].y - coeffsArray[0].y);
+	b1=(1/h1)*(coeffsArray[2].y - coeffsArray[1].y);
+
+	u[1]=2*( h0 + h1 );
+	v[1]=6*( b1 - b0 );
+	
+	for(int i=2;i<NO_OF_POINTS;++i){
+		h0=h1;
+		b0=b1;
+		h1=coeffsArray[i+1].x - coeffsArray[i].x;
+		b1=(1/h1)*(coeffsArray[i+1].y - coeffsArray[i].y);
+		u[i]=2*(h1+h0) - h0*h0/u[i-1];
+		v[i]=6*(b1-b0) - h0*v[i-1]/u[i-1];
+	}
+
+	coeffsArray[0].z = coeffsArray[NO_OF_POINTS-1].z=0;  //Z(n-1) = Z(0) = 0 
+	for(int i=NO_OF_POINTS-2;i>0;--i){
+		h1=coeffsArray[i+1].x - coeffsArray[i].x;
+		coeffsArray[i].z = (v[i] - h1*coeffsArray[i+1].z ) / u[i];
+	}
+}
+
+void NaturalCubicSpline1D::initialize(int n,double* xData,double* yData){
+	NO_OF_POINTS=n;
+	coeffsArray=new CoeffStruct[NO_OF_POINTS];
+	for(int i=0;i<NO_OF_POINTS;i++){
+		coeffsArray[i].x=xData[i];
+		coeffsArray[i].y=yData[i];
+	}
+	DetermineCoeff();
+}
+
+NaturalCubicSpline1D::NaturalCubicSpline1D(int n,double* xData,double* yData){
+	NO_OF_POINTS=n;
+	coeffsArray=new CoeffStruct[NO_OF_POINTS];
+	for(int i=0;i<NO_OF_POINTS;i++){
+		coeffsArray[i].x=xData[i];
+		coeffsArray[i].y=yData[i];
+	}
+	DetermineCoeff();
+}
+
+
+NaturalCubicSpline1D::NaturalCubicSpline1D(){
+}
+
+NaturalCubicSpline1D::~NaturalCubicSpline1D(){
+	delete [] coeffsArray;
+	coeffsArray=0;
+	
+}
+
+
+
+double CubicCubic::evaluate(double x,double y){
+	double* yData=0;
+	double* zData=0;
+	yData=new double[noYPoints];		//actually y data for fixed x
+	zData=new double[noYPoints];		//actually z data for fixed x
+	for(int i=0;i<noYPoints;++i){
+		yData[i]=CubicSplines1D[i].y;
+		zData[i]=CubicSplines1D[i].xCubicSpline.ValueAtX(x);
+	}
+	NaturalCubicSpline1D  yzCubicSpline(noYPoints,yData,zData);  //y,z pair for fixed x=x
+	return yzCubicSpline.ValueAtX(y);
+}
+
+void CubicCubic::Initialize(char* Id_Vd_Vg){
+	ifstream idvdvg_file;
+	int n_diffVgs,n_diffVds;
+	idvdvg_file.open(Id_Vd_Vg);
+	if(!idvdvg_file.is_open()){cout<<"Failed to open file named: "<<Id_Vd_Vg<<endl; exit(1);}
+	
+	idvdvg_file>>n_diffVgs;
+	idvdvg_file>>n_diffVds;
+	
+	noYPoints=n_diffVgs;
+	CubicSplines1D= new yCSpair[noYPoints];
+	
+	double* vds_array;
+	double* ids_array;
+	vds_array=new double[n_diffVds];
+	ids_array=new double[n_diffVds];
+	
+	int index;
+	double vds;
+	double ids;
+	double vgs;
+
+	for(int i=0;i<n_diffVgs;++i){
+		for(int j=0;j<n_diffVds;++j){
+			if(idvdvg_file.eof()) {cout<<"End if file earlier than expected File Named: "<<Id_Vd_Vg<<endl; exit(1);}		
+			idvdvg_file>>index;
+			idvdvg_file>>vds;
+			idvdvg_file>>ids;
+			idvdvg_file>>vgs;
+			CubicSplines1D[i].y=vgs; //repeat avoid
+			vds_array[j]=vds;
+			ids_array[j]=ids;
+		}
+		CubicSplines1D[i].xCubicSpline.initialize(n_diffVds,vds_array,ids_array);
+	}
+}
+const CubicCubic & CubicCubic::operator=(const CubicCubic &rhs){
+ if (this != &rhs) {  // make sure not same object
+		
+	 for(int i=0;i<noYPoints;++i){			 //free the old memory
+		CubicSplines1D[i].~yCSpair();
+	 }
+		
+		noYPoints=rhs.noYPoints;			// assign new values
+		CubicSplines1D=rhs.CubicSplines1D;  // pointer assigned      
+    }
+    return *this;    // Return ref for multiple assignment
+}
+
+CubicCubic::CubicCubic(char* Id_Vd_Vg){
+	ifstream idvdvg_file;
+	int n_diffVgs,n_diffVds;
+	idvdvg_file.open(Id_Vd_Vg);
+	if(!idvdvg_file.is_open()){cout<<"Failed to open file named: "<<Id_Vd_Vg<<endl; exit(1);}
+	
+	idvdvg_file>>n_diffVgs;
+	idvdvg_file>>n_diffVds;
+	
+	noYPoints=n_diffVgs;
+	CubicSplines1D= new yCSpair[noYPoints];
+	
+	double* vds_array;
+	double* ids_array;
+	vds_array=new double[n_diffVds];
+	ids_array=new double[n_diffVds];
+		
+	int index;
+	double vds;
+	double ids;
+	double vgs;
+
+	for(int i=0;i<n_diffVgs;++i){
+		for(int j=0;j<n_diffVds;++j){
+			if(idvdvg_file.eof()) {cout<<"End if file earlier than expected File Named: "<<Id_Vd_Vg<<endl; exit(1);}		
+			idvdvg_file>>index;
+			idvdvg_file>>vds;
+			idvdvg_file>>ids;
+			idvdvg_file>>vgs;
+			CubicSplines1D[i].y=vgs;
+			vds_array[j]=vds;
+			ids_array[j]=ids;
+		}
+		CubicSplines1D[i].xCubicSpline.initialize(n_diffVds,vds_array,ids_array);
+	}
+}
+
+
+CubicCubic::CubicCubic(int no_yPoints, double yArray[],int *pxArray,double* xArray[],double* zArray[]){
+	noYPoints=no_yPoints;
+	CubicSplines1D= new yCSpair[noYPoints];
+	for(int i=0;i<noYPoints;++i){
+		CubicSplines1D[i].y=yArray[i];
+		CubicSplines1D[i].xCubicSpline.initialize(pxArray[i],xArray[i],zArray[i]);
+	}
+}
+
+CubicCubic::CubicCubic(char* yfileName,char* xzfileName){
+	ifstream yf,xzf;
+	yf.open(yfileName);
+	xzf.open(xzfileName);
+	int n=1;
+	xzf>>n;
+	double* vds_array;
+	double* ids_array;
+	vds_array=new double[n];
+	ids_array=new double[n];
+
+	if(!yf.is_open() || !xzf.is_open()){cout<<"Failed to open file "<<yfileName<<endl; exit(3);}
+	else{
+		yf>>noYPoints;
+		CubicSplines1D= new yCSpair[noYPoints];	
+		for(int i=0;i<noYPoints;++i){
+			yf>>CubicSplines1D[i].y;
+			for(int j=0;j<n;++j){
+				xzf>>vds_array[j];
+				xzf>>ids_array[j];
+			}
+			
+			CubicSplines1D[i].xCubicSpline.initialize(n,vds_array,ids_array);
+		}
+	}
+}
+
+CubicCubic::CubicCubic(){
+}
+
+CubicCubic::~CubicCubic(){
+	delete [] CubicSplines1D;
+	CubicSplines1D=0;
+}
+
+yCSpair::yCSpair(){
+}
+
+yCSpair::~yCSpair(){
+}
+
+double IdVbs::Evaluate(double vds,double vgs,double vbs){
+	if(vbs_l<=vbs && vbs<vbs_h) {
+	}
+	else{
+		Initialize(vbs);
+	}
+	double y1,y2,value;
+	y1=cc_l.evaluate(vds,vgs);
+	y2=cc_h.evaluate(vds,vgs);
+	value=y1+(vbs-vbs_l)*(y2-y1)/(vbs_h-vbs_l);
+	return value;
+}
+
+
+void IdVbs::Initialize(double vbs){
+	double vbs_lp,vbs_hp;
+	char filename_l[40];
+	char filename_h[40];
+	
+	ifstream vbsf;
+	vbsf.open("vbs_files.txt");  //Fixed name this file must exsit
+	if(!vbsf.is_open()) {
+		cout<<"Failed to open vbs_files.txt \nIts a compulsory file to be there in current directory"<<endl; exit(3);
+	}
+	
+	vbsf>>vbs_lp;
+	vbsf>>filename_l;
+
+	bool found=false;
+
+	while(!found || !vbsf.eof()){
+		vbsf>>vbs_hp;
+		vbsf>>filename_h;
+	
+		if(vbs>=vbs_lp && vbs<vbs_hp){
+			found=true;
+			break;
+		}
+		vbs_lp=vbs_hp;
+		strcpy(filename_l,filename_h);
+	}
+	
+	if(!found){ cout<<"Vgs out of range, This routine does not do Extrapolation"<<endl; exit(1);}
+	
+	if( fabs(vbs_l-vbs_hp)<1e-7 ){		// vgs hag gone just one step lower so
+		cc_h=cc_l;						// use old value why compute again
+		cc_l.Initialize(filename_l);	
+	}
+	else if( fabs(vbs_lp-vbs_h)<1e-7 ){	// vgs hag gone just one step higher so
+		cc_l=cc_h;						// use old value why compute again
+		cc_h.Initialize(filename_h);
+	}
+	else{
+		cc_l.Initialize(filename_l);  
+		cc_h.Initialize(filename_h);
+	}
+	
+	vbs_l=vbs_lp;
+	vbs_h=vbs_hp;
+}
+
+IdVbs::IdVbs(){
+	vbs_l=213.0;   //some value not to occur actually
+	vbs_h=-213.0;
+}
+
+IdVbs::~IdVbs(){
+};
+/********************** End ******************************/
diff --git a/OSCAD/LPCSim/LUT/ids.o b/OSCAD/LPCSim/LUT/ids.o
new file mode 100644
index 0000000..a296c7e
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/ids.o
diff --git a/OSCAD/LPCSim/LUT/ids.sce b/OSCAD/LPCSim/LUT/ids.sce
new file mode 100644
index 0000000..ab50b51
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/ids.sce
@@ -0,0 +1,8 @@
+// Wrapper function for calling C language routine ids_c from SciLab
+function Id = ids(Vds, Vgs, Vbs)
+l=link("/NFS1/yogesh/project/MNA/LUT/libids.so", "ids_c", "c")
+Id=0.0;
+sizeId=size(Id);
+Id=fort("ids_c",Vds, 1,"d",Vgs, 2, "d", Vbs, 3, "d", Id, 4, "d", "out",sizeId, 4, "d");
+ulink(l);
+endfunction
diff --git a/OSCAD/LPCSim/LUT/libids.so b/OSCAD/LPCSim/LUT/libids.so
new file mode 100644
index 0000000..8b50b46
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/libids.so
diff --git a/OSCAD/LPCSim/LUT/script.sh b/OSCAD/LPCSim/LUT/script.sh
new file mode 100644
index 0000000..4397309
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/script.sh
@@ -0,0 +1,5 @@
+g++ -c -m32 -fPIC ids.cpp -o ids.o
+g++ -m32 -shared -o libids.so  ids.o
+scilab32 -f ids.sce
+
+
diff --git a/OSCAD/LPCSim/LUT/spice_vbs_0p0.txt b/OSCAD/LPCSim/LUT/spice_vbs_0p0.txt
new file mode 100644
index 0000000..fe05c27
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/spice_vbs_0p0.txt
@@ -0,0 +1,362 @@
+19	19


+0	0.000000e+00	-2.925008e-29	0.000000e+00	


+1	1.000000e-01	1.761407e-12	0.000000e+00	


+2	2.000000e-01	2.039684e-12	0.000000e+00	


+3	3.000000e-01	2.297044e-12	0.000000e+00	


+4	4.000000e-01	2.551813e-12	0.000000e+00	


+5	5.000000e-01	2.806505e-12	0.000000e+00	


+6	6.000000e-01	3.061967e-12	0.000000e+00	


+7	7.000000e-01	3.318457e-12	0.000000e+00	


+8	8.000000e-01	3.576209e-12	0.000000e+00	


+9	9.000000e-01	3.835376e-12	0.000000e+00	


+10	1.000000e-00	4.095946e-12	0.000000e+00	


+11	1.100000e+00	4.358069e-12	0.000000e+00	


+12	1.200000e+00	4.621831e-12	0.000000e+00	


+13	1.300000e+00	4.887230e-12	0.000000e+00	


+14	1.400000e+00	5.154349e-12	0.000000e+00	


+15	1.500000e+00	5.423217e-12	0.000000e+00	


+16	1.600000e+00	5.693945e-12	0.000000e+00	


+17	1.700000e+00	5.966505e-12	0.000000e+00	


+18	1.800000e+00	6.241008e-12	0.000000e+00	


+19	0.000000e+00	-4.577866e-28	1.000000e-01	


+20	1.000000e-01	2.302531e-11	1.000000e-01	


+21	2.000000e-01	2.436765e-11	1.000000e-01	


+22	3.000000e-01	2.540408e-11	1.000000e-01	


+23	4.000000e-01	2.640237e-11	1.000000e-01	


+24	5.000000e-01	2.739965e-11	1.000000e-01	


+25	6.000000e-01	2.840736e-11	1.000000e-01	


+26	7.000000e-01	2.943051e-11	1.000000e-01	


+27	8.000000e-01	3.047183e-11	1.000000e-01	


+28	9.000000e-01	3.153311e-11	1.000000e-01	


+29	1.000000e-00	3.261563e-11	1.000000e-01	


+30	1.100000e+00	3.372039e-11	1.000000e-01	


+31	1.200000e+00	3.484843e-11	1.000000e-01	


+32	1.300000e+00	3.600048e-11	1.000000e-01	


+33	1.400000e+00	3.717734e-11	1.000000e-01	


+34	1.500000e+00	3.837980e-11	1.000000e-01	


+35	1.600000e+00	3.960854e-11	1.000000e-01	


+36	1.700000e+00	4.086442e-11	1.000000e-01	


+37	1.800000e+00	4.214801e-11	1.000000e-01	


+38	0.000000e+00	-1.074560e-25	2.000000e-01	


+39	1.000000e-01	3.267654e-10	2.000000e-01	


+40	2.000000e-01	3.432114e-10	2.000000e-01	


+41	3.000000e-01	3.552679e-10	2.000000e-01	


+42	4.000000e-01	3.667705e-10	2.000000e-01	


+43	5.000000e-01	3.782503e-10	2.000000e-01	


+44	6.000000e-01	3.898707e-10	2.000000e-01	


+45	7.000000e-01	4.017029e-10	2.000000e-01	


+46	8.000000e-01	4.137859e-10	2.000000e-01	


+47	9.000000e-01	4.261446e-10	2.000000e-01	


+48	1.000000e-00	4.387971e-10	2.000000e-01	


+49	1.100000e+00	4.517580e-10	2.000000e-01	


+50	1.200000e+00	4.650398e-10	2.000000e-01	


+51	1.300000e+00	4.786538e-10	2.000000e-01	


+52	1.400000e+00	4.926108e-10	2.000000e-01	


+53	1.500000e+00	5.069210e-10	2.000000e-01	


+54	1.600000e+00	5.215944e-10	2.000000e-01


+55	1.700000e+00	5.366411e-10	2.000000e-01	


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+359	1.700000e+00	1.444832e-04	1.800000e+00	


+360	1.800000e+00	1.448191e-04	1.800000e+00
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LUT/spice_vbs_0p2.txt b/OSCAD/LPCSim/LUT/spice_vbs_0p2.txt
new file mode 100644
index 0000000..d21dcfa
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/spice_vbs_0p2.txt
@@ -0,0 +1,362 @@
+19	19


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+360	1.800000e+00	1.358030e-04	1.800000e+00
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LUT/spice_vbs_0p4.txt b/OSCAD/LPCSim/LUT/spice_vbs_0p4.txt
new file mode 100644
index 0000000..179ec2b
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/spice_vbs_0p4.txt
@@ -0,0 +1,362 @@
+19	19


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+359	1.700000e+00	1.271734e-04	1.800000e+00	


+360	1.800000e+00	1.274846e-04	1.800000e+00
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LUT/spice_vbs_0p6.txt b/OSCAD/LPCSim/LUT/spice_vbs_0p6.txt
new file mode 100644
index 0000000..52de41d
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/spice_vbs_0p6.txt
@@ -0,0 +1,362 @@
+19	19


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+359	1.700000e+00	1.194809e-04	1.800000e+00	


+360	1.800000e+00	1.197806e-04	1.800000e+00
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LUT/spice_vbs_0p8.txt b/OSCAD/LPCSim/LUT/spice_vbs_0p8.txt
new file mode 100644
index 0000000..fa5ed02
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/spice_vbs_0p8.txt
@@ -0,0 +1,362 @@
+19	19


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+5	5.000000e-01	2.601988e-12	0.000000e+00	


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+7	7.000000e-01	3.002112e-12	0.000000e+00	


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+9	9.000000e-01	3.402278e-12	0.000000e+00	


+10	1.000000e-00	3.602341e-12	0.000000e+00	


+11	1.100000e+00	3.802403e-12	0.000000e+00	


+12	1.200000e+00	4.002493e-12	0.000000e+00	


+13	1.300000e+00	4.202555e-12	0.000000e+00	


+14	1.400000e+00	4.402673e-12	0.000000e+00	


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+16	1.600000e+00	4.802797e-12	0.000000e+00	


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+20	1.000000e-01	1.823201e-12	1.000000e-01	


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+359	1.700000e+00	1.123271e-04	1.800000e+00	


+360	1.800000e+00	1.126160e-04	1.800000e+00
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LUT/spice_vbs_1p0.txt b/OSCAD/LPCSim/LUT/spice_vbs_1p0.txt
new file mode 100644
index 0000000..557f762
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/spice_vbs_1p0.txt
@@ -0,0 +1,362 @@
+19	19


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+359	1.700000e+00	1.056488e-04	1.800000e+00	


+360	1.800000e+00	1.059274e-04	1.800000e+00	
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LUT/spice_vbs_1p2.txt b/OSCAD/LPCSim/LUT/spice_vbs_1p2.txt
new file mode 100644
index 0000000..591c0b5
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/spice_vbs_1p2.txt
@@ -0,0 +1,362 @@
+19	19


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+359	1.700000e+00	9.939313e-05	1.800000e+00	


+360	1.800000e+00	9.966187e-05	1.800000e+00
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LUT/spice_vbs_1p4.txt b/OSCAD/LPCSim/LUT/spice_vbs_1p4.txt
new file mode 100644
index 0000000..83a4c75
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/spice_vbs_1p4.txt
@@ -0,0 +1,362 @@
+19	19


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+359	1.700000e+00	9.351591e-05	1.800000e+00	


+360	1.800000e+00	9.377536e-05	1.800000e+00
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LUT/spice_vbs_1p6.txt b/OSCAD/LPCSim/LUT/spice_vbs_1p6.txt
new file mode 100644
index 0000000..da4d962
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/spice_vbs_1p6.txt
@@ -0,0 +1,362 @@
+19	19


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+360	1.800000e+00	8.823081e-05	1.800000e+00
\ No newline at end of file
diff --git a/OSCAD/LPCSim/LUT/spice_vbs_1p8.txt b/OSCAD/LPCSim/LUT/spice_vbs_1p8.txt
new file mode 100644
index 0000000..a81c81a
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/spice_vbs_1p8.txt
@@ -0,0 +1,362 @@
+19	19


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diff --git a/OSCAD/LPCSim/LUT/vbs_files.txt b/OSCAD/LPCSim/LUT/vbs_files.txt
new file mode 100644
index 0000000..554206d
--- /dev/null
+++ b/OSCAD/LPCSim/LUT/vbs_files.txt
@@ -0,0 +1,10 @@
+0.0    spice_vbs_0p0.txt


+0.2    spice_vbs_0p2.txt


+0.4    spice_vbs_0p4.txt


+0.6    spice_vbs_0p6.txt


+0.8    spice_vbs_0p8.txt


+1.0    spice_vbs_1p0.txt


+1.2    spice_vbs_1p2.txt


+1.4    spice_vbs_1p4.txt


+1.6    spice_vbs_1p6.txt


+1.8    spice_vbs_1p8.txt


diff --git a/OSCAD/LPCSim/backup/LPCSim_1.0_030912.tgz b/OSCAD/LPCSim/backup/LPCSim_1.0_030912.tgz
new file mode 100644
index 0000000..2ee2b6e
--- /dev/null
+++ b/OSCAD/LPCSim/backup/LPCSim_1.0_030912.tgz
diff --git a/OSCAD/LPCSim/backup/LPCSim_1.0_300812.tgz b/OSCAD/LPCSim/backup/LPCSim_1.0_300812.tgz
new file mode 100644
index 0000000..3ec66e5
--- /dev/null
+++ b/OSCAD/LPCSim/backup/LPCSim_1.0_300812.tgz
diff --git a/OSCAD/LPCSim/backup/Readme b/OSCAD/LPCSim/backup/Readme
new file mode 100644
index 0000000..0b1fe1e
--- /dev/null
+++ b/OSCAD/LPCSim/backup/Readme
@@ -0,0 +1,9 @@
+LPCSim_1.0_300812.tgz
+In this version, Operating point analysis with symbolic equations (matrix) is implemented for linear elements.
+
+LPCSim_1.0_030912.tgz
+Following features are added:
+Equation form.
+the system matrix values in NR iterations.  
+
+
diff --git a/OSCAD/LPCSim/report/diode_D1.eps b/OSCAD/LPCSim/report/diode_D1.eps
new file mode 100644
index 0000000..ec0e19b
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+%!PS-AdobeFont-1.0: CMMI8 003.002
+%%Title: CMMI8
+%Version: 003.002
+%%CreationDate: Mon Jul 13 16:17:00 2009
+%%Creator: David M. Jones
+%Copyright: Copyright (c) 1997, 2009 American Mathematical Society
+%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI8.
+% This Font Software is licensed under the SIL Open Font License, Version 1.1.
+% This license is in the accompanying file OFL.txt, and is also
+% available with a FAQ at: http://scripts.sil.org/OFL.
+%%EndComments
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+%%EndFont 
+%%BeginFont: CMR8
+%!PS-AdobeFont-1.0: CMR8 003.002
+%%Title: CMR8
+%Version: 003.002
+%%CreationDate: Mon Jul 13 16:17:00 2009
+%%Creator: David M. Jones
+%Copyright: Copyright (c) 1997, 2009 American Mathematical Society
+%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR8.
+% This Font Software is licensed under the SIL Open Font License, Version 1.1.
+% This license is in the accompanying file OFL.txt, and is also
+% available with a FAQ at: http://scripts.sil.org/OFL.
+%%EndComments
+FontDirectory/CMR8 known{/CMR8 findfont dup/UniqueID known{dup
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+{save true}{false}ifelse}{false}ifelse
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+/FontType 1 def
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+/FontName /CMR8 def
+/FontBBox {-36 -250 1070 750 }readonly def
+/UniqueID 5000791 def
+/PaintType 0 def
+/FontInfo 9 dict dup begin
+/version (003.002) readonly def
+/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR8.) readonly def
+/FullName (CMR8) readonly def
+/FamilyName (Computer Modern) readonly def
+/Weight (Medium) readonly def
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+/UnderlinePosition -100 def
+/UnderlineThickness 50 def
+end readonly def
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+0 1 255 {1 index exch /.notdef put} for
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+readonly def
+currentdict end
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+%%Title: CMMI12
+%Version: 003.002
+%%CreationDate: Mon Jul 13 16:17:00 2009
+%%Creator: David M. Jones
+%Copyright: Copyright (c) 1997, 2009 American Mathematical Society
+%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI12.
+% This Font Software is licensed under the SIL Open Font License, Version 1.1.
+% This license is in the accompanying file OFL.txt, and is also
+% available with a FAQ at: http://scripts.sil.org/OFL.
+%%EndComments
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+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
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+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
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+	 2400 2100 2400 2325
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+Inches
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+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+11 dict begin
+/FontInfo 7 dict dup begin
+/version (1.0) readonly def
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+readonly def
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+%%BeginFont: CMR6
+%!PS-AdobeFont-1.1: CMR6 1.0
+%%CreationDate: 1991 Aug 20 16:39:02
+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+11 dict begin
+/FontInfo 7 dict dup begin
+/version (1.0) readonly def
+/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+/FullName (CMR6) readonly def
+/FamilyName (Computer Modern) readonly def
+/Weight (Medium) readonly def
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+/FontMatrix [0.001 0 0 0.001 0 0] readonly def
+/Encoding 256 array
+0 1 255 {1 index exch /.notdef put} for
+dup 49 /one put
+readonly def
+/FontBBox{-20 -250 1193 750}readonly def
+currentdict end
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+%%EndFont 
+%%BeginFont: CMMI8
+%!PS-AdobeFont-1.1: CMMI8 1.100
+%%CreationDate: 1996 Jul 23 07:53:54
+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+11 dict begin
+/FontInfo 7 dict dup begin
+/version (1.100) readonly def
+/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+/FullName (CMMI8) readonly def
+/FamilyName (Computer Modern) readonly def
+/Weight (Medium) readonly def
+/ItalicAngle -14.04 def
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+end readonly def
+/FontName /CMMI8 def
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+/FontMatrix [0.001 0 0 0.001 0 0] readonly def
+/Encoding 256 array
+0 1 255 {1 index exch /.notdef put} for
+dup 67 /C put
+dup 84 /T put
+readonly def
+/FontBBox{-24 -250 1110 750}readonly def
+currentdict end
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+%%EndFont 
+%%BeginFont: CMR8
+%!PS-AdobeFont-1.1: CMR8 1.0
+%%CreationDate: 1991 Aug 20 16:39:40
+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+11 dict begin
+/FontInfo 7 dict dup begin
+/version (1.0) readonly def
+/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+/FullName (CMR8) readonly def
+/FamilyName (Computer Modern) readonly def
+/Weight (Medium) readonly def
+/ItalicAngle 0 def
+/isFixedPitch false def
+end readonly def
+/FontName /CMR8 def
+/PaintType 0 def
+/FontType 1 def
+/FontMatrix [0.001 0 0 0.001 0 0] readonly def
+/Encoding 256 array
+0 1 255 {1 index exch /.notdef put} for
+dup 49 /one put
+readonly def
+/FontBBox{-36 -250 1070 750}readonly def
+currentdict end
+currentfile eexec
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+cleartomark
+%%EndFont 
+%%BeginFont: CMMI12
+%!PS-AdobeFont-1.1: CMMI12 1.100
+%%CreationDate: 1996 Jul 27 08:57:55
+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+11 dict begin
+/FontInfo 7 dict dup begin
+/version (1.100) readonly def
+/Notice (Copyright (C) 1997 American Mathematical Society. All Rights Reserved) readonly def
+/FullName (CMMI12) readonly def
+/FamilyName (Computer Modern) readonly def
+/Weight (Medium) readonly def
+/ItalicAngle -14.04 def
+/isFixedPitch false def
+end readonly def
+/FontName /CMMI12 def
+/PaintType 0 def
+/FontType 1 def
+/FontMatrix [0.001 0 0 0.001 0 0] readonly def
+/Encoding 256 array
+0 1 255 {1 index exch /.notdef put} for
+dup 84 /T put
+dup 105 /i put
+dup 118 /v put
+readonly def
+/FontBBox{-30 -250 1026 750}readonly def
+currentdict end
+currentfile eexec
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+%%CreationDate: 1991 Aug 20 16:39:40
+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+11 dict begin
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+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
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diff --git a/OSCAD/LPCSim/report/figures/bridgeFilter.fig b/OSCAD/LPCSim/report/figures/bridgeFilter.fig
new file mode 100644
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diff --git a/OSCAD/LPCSim/report/figures/latfont b/OSCAD/LPCSim/report/figures/latfont
new file mode 100644
index 0000000..4aa1c5a
--- /dev/null
+++ b/OSCAD/LPCSim/report/figures/latfont
@@ -0,0 +1,8 @@
+echo {\\input{$*.pstex_t}} >& dummy_font.tex
+cat latfont1.tex dummy_font.tex latfont2.tex >& dummy_fig.tex
+latex dummy_fig.tex
+dvips -E -o dummy_fig.eps dummy_fig.dvi
+mv dummy_fig.eps $*.eps
+rm dummy_fig.*
+rm rf dummy_font.tex
+evince $1.eps &
diff --git a/OSCAD/LPCSim/report/figures/latfont1.tex b/OSCAD/LPCSim/report/figures/latfont1.tex
new file mode 100644
index 0000000..e6301a4
--- /dev/null
+++ b/OSCAD/LPCSim/report/figures/latfont1.tex
@@ -0,0 +1,20 @@
+\documentclass[12pt]{book}
+\textwidth 6.5in
+\textheight 9.0in
+\topmargin 0.0in
+\oddsidemargin 0.2in
+\evensidemargin 0.2in
+\textfloatsep 0.6cm
+\abovecaptionskip 0.1cm
+\usepackage[dvips]{graphicx}
+\usepackage{makeidx}
+\usepackage{epsfig}
+\usepackage{color}
+\setlength{\textwidth}{50cm}
+\setlength{\textheight}{50cm}
+\begin{document}
+\pagestyle{empty}
+
+\begin{center}
+%\resizebox{!}{5cm}{\input{cap_trns.pstex_t}}
+
diff --git a/OSCAD/LPCSim/report/figures/latfont2.tex b/OSCAD/LPCSim/report/figures/latfont2.tex
new file mode 100644
index 0000000..3f4cd92
--- /dev/null
+++ b/OSCAD/LPCSim/report/figures/latfont2.tex
@@ -0,0 +1,2 @@
+\end{center}
+\end{document}
\ No newline at end of file
diff --git a/OSCAD/LPCSim/report/figures/linearckt.eps b/OSCAD/LPCSim/report/figures/linearckt.eps
new file mode 100644
index 0000000..fd213ef
--- /dev/null
+++ b/OSCAD/LPCSim/report/figures/linearckt.eps
@@ -0,0 +1,1034 @@
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+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
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+%%CreationDate: 1991 Aug 20 16:39:40
+% Copyright (C) 1997 American Mathematical Society. All Rights Reserved.
+11 dict begin
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+%%EndFont 
+%%BeginFont: CMMI8
+%!PS-AdobeFont-1.0: CMMI8 003.002
+%%Title: CMMI8
+%Version: 003.002
+%%CreationDate: Mon Jul 13 16:17:00 2009
+%%Creator: David M. Jones
+%Copyright: Copyright (c) 1997, 2009 American Mathematical Society
+%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI8.
+% This Font Software is licensed under the SIL Open Font License, Version 1.1.
+% This license is in the accompanying file OFL.txt, and is also
+% available with a FAQ at: http://scripts.sil.org/OFL.
+%%EndComments
+FontDirectory/CMMI8 known{/CMMI8 findfont dup/UniqueID known{dup
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+{save true}{false}ifelse}{false}ifelse
+11 dict begin
+/FontType 1 def
+/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def
+/FontName /CMMI8 def
+/FontBBox {-24 -250 1110 750 }readonly def
+/UniqueID 5087383 def
+/PaintType 0 def
+/FontInfo 10 dict dup begin
+/version (003.002) readonly def
+/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMMI8.) readonly def
+/FullName (CMMI8) readonly def
+/FamilyName (Computer Modern) readonly def
+/Weight (Medium) readonly def
+/ItalicAngle -14.04 def
+/isFixedPitch false def
+/UnderlinePosition -100 def
+/UnderlineThickness 50 def
+/ascent 750 def
+end readonly def
+/Encoding 256 array
+0 1 255 {1 index exch /.notdef put} for
+dup 82 /R put
+readonly def
+currentdict end
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+%%EndFont 
+%%BeginFont: CMR12
+%!PS-AdobeFont-1.0: CMR12 003.002
+%%Title: CMR12
+%Version: 003.002
+%%CreationDate: Mon Jul 13 16:17:00 2009
+%%Creator: David M. Jones
+%Copyright: Copyright (c) 1997, 2009 American Mathematical Society
+%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR12.
+% This Font Software is licensed under the SIL Open Font License, Version 1.1.
+% This license is in the accompanying file OFL.txt, and is also
+% available with a FAQ at: http://scripts.sil.org/OFL.
+%%EndComments
+FontDirectory/CMR12 known{/CMR12 findfont dup/UniqueID known{dup
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+{save true}{false}ifelse}{false}ifelse
+11 dict begin
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+/FontMatrix [0.001 0 0 0.001 0 0 ]readonly def
+/FontName /CMR12 def
+/FontBBox {-34 -251 988 750 }readonly def
+/UniqueID 5000794 def
+/PaintType 0 def
+/FontInfo 9 dict dup begin
+/version (003.002) readonly def
+/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR12.) readonly def
+/FullName (CMR12) readonly def
+/FamilyName (Computer Modern) readonly def
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+/UnderlinePosition -100 def
+/UnderlineThickness 50 def
+end readonly def
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+%%EndFont 
+%%BeginFont: CMR8
+%!PS-AdobeFont-1.0: CMR8 003.002
+%%Title: CMR8
+%Version: 003.002
+%%CreationDate: Mon Jul 13 16:17:00 2009
+%%Creator: David M. Jones
+%Copyright: Copyright (c) 1997, 2009 American Mathematical Society
+%Copyright: (<http://www.ams.org>), with Reserved Font Name CMR8.
+% This Font Software is licensed under the SIL Open Font License, Version 1.1.
+% This license is in the accompanying file OFL.txt, and is also
+% available with a FAQ at: http://scripts.sil.org/OFL.
+%%EndComments
+FontDirectory/CMR8 known{/CMR8 findfont dup/UniqueID known{dup
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+{save true}{false}ifelse}{false}ifelse
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+/FontName /CMR8 def
+/FontBBox {-36 -250 1070 750 }readonly def
+/UniqueID 5000791 def
+/PaintType 0 def
+/FontInfo 9 dict dup begin
+/version (003.002) readonly def
+/Notice (Copyright \050c\051 1997, 2009 American Mathematical Society \050<http://www.ams.org>\051, with Reserved Font Name CMR8.) readonly def
+/FullName (CMR8) readonly def
+/FamilyName (Computer Modern) readonly def
+/Weight (Medium) readonly def
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+/UnderlinePosition -100 def
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+end readonly def
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+%%Title: CMMI12
+%Version: 003.002
+%%CreationDate: Mon Jul 13 16:17:00 2009
+%%Creator: David M. Jones
+%Copyright: Copyright (c) 1997, 2009 American Mathematical Society
+%Copyright: (<http://www.ams.org>), with Reserved Font Name CMMI12.
+% This Font Software is licensed under the SIL Open Font License, Version 1.1.
+% This license is in the accompanying file OFL.txt, and is also
+% available with a FAQ at: http://scripts.sil.org/OFL.
+%%EndComments
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diff --git a/OSCAD/LPCSim/report/presentation/Makefile b/OSCAD/LPCSim/report/presentation/Makefile
new file mode 100644
index 0000000..a53f5a3
--- /dev/null
+++ b/OSCAD/LPCSim/report/presentation/Makefile
@@ -0,0 +1,39 @@
+LATEX=latex
+BIBTEX=bibtex
+PDFLATEX=pdflatex
+RM=rm
+CP=cp
+MAKEINDEX=makeindex
+DVITOPS=dvips
+DVIPDF=dvipdf
+PSTOPDF=ps2pdf
+
+DEPENDENCIES= *.tex Makefile
+MAINFILE=SMCSim
+
+all: $(MAINFILE).pdf
+
+$(MAINFILE).dvi: $(DEPENDENCIES) 
+	$(LATEX) $(MAINFILE)
+#	$(BIBTEX) $(MAINFILE)
+#	$(LATEX) $(MAINFILE)
+#	$(LATEX) $(MAINFILE)
+#	$(CP) $(MAINFILE).idx $(MAINFILE).ind
+#	$(MAKEINDEX) $(MAINFILE).idx
+#	$(LATEX) $(MAINFILE).tex
+
+#-Ppdf option 
+#Type fonts are scalable and looks good on pdf file
+#default is bitmaps which are suitable for printer only not scalable
+
+#$(MAINFILE).ps: $(MAINFILE).dvi
+#	$(DVITOPS) -Ppdf -G0 $(MAINFILE).dvi -o $(MAINFILE).ps
+#$(MAINFILE).pdf: $(MAINFILE).ps
+#	$(PSTOPDF) -sPAPERSIZE=a4 -dMaxSubsetPct=100 -dCompatibilityLevel=1.4 -dSubsetFonts=true -dEmbedAllFonts=true $(MAINFILE).ps
+$(MAINFILE).pdf: $(MAINFILE).dvi
+	$(DVIPDF) $(MAINFILE).dvi
+
+clean:
+	$(RM) -f $(MAINFILE).pdf $(MAINFILE).ps $(MAINFILE).dvi
+cleanall:
+	$(RM) -f $(MAINFILE).pdf $(MAINFILE).ps $(MAINFILE).dvi *.aux *.log *.ind *.ilg *.idx *.toc
diff --git a/OSCAD/LPCSim/report/presentation/SMCSim.tex b/OSCAD/LPCSim/report/presentation/SMCSim.tex
new file mode 100644
index 0000000..03c1dc1
--- /dev/null
+++ b/OSCAD/LPCSim/report/presentation/SMCSim.tex
@@ -0,0 +1,732 @@
+%$Header: /cvsroot/latex-beamer/latex-beamer/solutions/generic-talks/generic-ornate-15min-45min.en.tex,v 1.4 2004/10/07 20:53:08 tantau Exp $
+\documentclass{beamer}
+\mode<presentation>
+{
+  \usecolortheme{seahorse}
+  \usefonttheme{professionalfonts}
+  \useinnertheme{rounded}
+  \useoutertheme{shadow}
+%  \useoutertheme{smoothbars}
+}
+%\setbeamertemplate{background canvas}[vertical shading][bottom=white!10,top=blue!5]
+\usepackage{verbatim} 
+\usepackage[english]{babel}
+\usepackage[latin1]{inputenc}
+\usepackage{pgf,pgfarrows,pgfnodes,pgfautomata,pgfheaps,pgfshade}
+\usepackage{amsmath,amsfonts,amsthm,amssymb}
+\usepackage{times}
+\usepackage[T1]{fontenc}
+\usepackage{graphics}
+\usepackage{graphicx}
+%\usepackage{psfig}
+\usepackage{algorithmic}
+
+\title
+{Scilab based Mini Circuit Simulator for Academic Purpose}
+
+\author[]
+{Yogesh Dilip Save}
+\institute
+{
+  Indian Institute of Technology, Bombay
+}
+%\pgfdeclareimage[height=0.7cm]{university-logo}{iitblogo.eps}
+%\logo{\pgfuseimage{university-logo}}
+
+
+\date[seminar] % (optional)
+{\today}
+
+
+\begin{document}
+%***************************************************************************************
+\begin{frame}
+  \titlepage
+\end{frame}
+%***************************************************************************************
+\begin{frame}
+  \frametitle{Presentation Outline}
+  \tableofcontents
+\end{frame}
+%***************************************************************************************
+
+\section{Introduction}
+\begin{frame}
+ \frametitle{Motivation}
+\begin{block}{Objective}
+To assist students in improving their knowledge in field of circuit simulation.
+\end{block}
+\begin{block}{Problem with commercial simulators}
+\begin{itemize}
+\item Generally software codes are not available.
+\item Software codes are written in higher level language (C Programming and Fortran....).
+\item Complex due to implementation of many features and complex modeling.
+\end{itemize}
+\end{block}
+\end{frame}
+
+\begin{frame}
+ \frametitle{Motivation}
+\begin{block}{Objective}
+To assist students in improving their knowledge in field of circuit simulation.
+\end{block}
+\begin{block}{Mini simulator}
+\begin{itemize}
+\item used Scilab for coding.
+\item integrated least number of component.  
+\item different versions for add-on features. 
+\end{itemize} 
+\end{block}
+\end{frame}
+
+\begin{frame}
+ \frametitle{Plan}
+\begin{block}{Display Symbolic Equations}
+\end{block}
+\begin{block}{Display Numerical Values}
+\end{block}
+\begin{block}{Complete Report Generation}
+\end{block}
+\begin{block}{GUI for circuit drawing}
+\end{block}
+\begin{block}{GUI for simulator option}
+\end{block}
+\begin{block}{Spoken Tutorial}
+\end{block}
+%\begin{block}
+%\begin{itemize}
+%\item Display Numerical Values  
+%\item Complete Report Generation
+%\item Graphical User Interface
+%\item Spoken Tutorial 
+%\end{itemize} 
+%\end{block}
+\end{frame}
+
+\begin{frame}
+ \frametitle{Core of circuit simulator}
+\begin{itemize}
+\item Operating Point Analysis plays an important role in a circuit simulation. 
+\item DC Analysis is equivalent to performing OP Analysis at each voltages/currents. 
+\item Transient Analysis is equivalent to performing OP Analysis at each time step.  
+\item AC Analysis computes the small-signal behavior of a circuit about an operating point 
+\item Thus implementation of Operating Point Analysis affects overall performance of the circuit simulator.
+\end{itemize} 
+\end{frame}
+
+\section{Operating Point Analysis}
+\begin{frame}
+\begin{block}{Operating Point (OP) Analysis}
+\begin{itemize}
+\item OP Analysis is the central part of a circuit simulator.
+\item The equations that describe the electrical system are nonlinear and algebraic and their solution gives operating point.
+\item Systems of nonlinear equations are solved by iteratively formulating and solving systems of linear algebraic equations. 
+\item The overall efficiency of a circuit simulator is dependent upon the performance of the linear DC analyzer.
+%\item Thus, our work is towards improving the performance of linear DC Analyzers and handling convergence issues related to large size nonlinear circuits.
+\end{itemize}
+\end{block}
+\end{frame}
+
+\begin{frame}
+\begin{block}{Circuit with linear elements}
+\end{block}
+\end{frame}
+
+\begin{frame}
+\begin{block}{\small Nodal Analysis}
+\begin{itemize}
+\begin{small}
+\item Applicable when the network has only current sources and conductances type devices i.e., $i=g(v)$.
+\item Let, $\mathbf{A}_r$ be the reduced incidence matrix of $\cal{G}$ which is a representative matrix of $V_v(\cal{G})$. \\
+\end{small}
+\begin{tiny}
+The KCL constraints are
+$$\mathbf{A_ri}=\mathbf{0}$$
+$$\left[\begin{array}{cc}
+  \mathbf{A}_{rG} & \mathbf{A}_{rJ}
+\end{array}\right]
+\left[\begin{array}{c}
+  \mathbf{i}_{G} \\
+  \mathbf{i}_{J}
+\end{array}\right]
+=\mathbf{0}$$
+$$\mathbf{A}_{rG}\mathbf{i}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}$$
+
+$$\mathbf{A}_{rG}\mathbf{G}\mathbf{v}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}\ \ \ \ \ \ \ \ (As, \mathbf{i}_{G}=\mathbf{G}\mathbf{v}_{G})$$
+
+The KVE constraints are
+$$\left[\begin{array}{c}
+  \mathbf{v}_{G} \\
+  \mathbf{v}_{J}
+\end{array}\right]
+=
+\left[\begin{array}{c}
+  \mathbf{A}_{rG}^T \\
+  \mathbf{A}_{rJ}^T
+\end{array}\right]
+\mathbf{v}_n$$
+
+\begin{equation}
+\mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T}\mathbf{v}_{n}=-\mathbf{A}_{rJ}\mathbf{i}_{J}
+\label{nodal_equation}
+\end{equation}
+\end{tiny}
+\end{itemize}
+\end{block}
+\end{frame}
+
+\begin{frame}[fragile]
+\begin{block}{Matrix Formulation}
+\begin{itemize}
+\item The diagonal entries of the matrix are the sum of conductances incident on the corresponding nodes.
+\item The off diagonal entries $(i,j)^{th}$ of the matrix is the negative of conductances between node $i$ and $j$.
+\item The $\mathbf{A}_{rJ}\mathbf{i}_{J}$ is the sum of current sources leaving the nodes.
+\end{itemize}
+\end{block}
+\begin{block}{Example}
+\end{block}
+\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.35]{../figures/nodal_figure.eps}
+\end{figure}
+\end{minipage}
+\begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page
+\begin{tiny}
+$$\left[
+\begin{array}{ccc}
+\widehat{R}_{1}+\widehat{R}_{2} & -\widehat{R}_{2} & 0\\
+-\widehat{R}_{2} & \widehat{R}_{2}+\widehat{R}_{3}+\widehat{R}_{4} & -\widehat{R}_{4}\\
+0 & -\widehat{R}_{4} & \widehat{R}_{4}+\widehat{R}_{5}
+\end{array}
+\right] \left[
+\begin{array}{c}
+v_{1}\\
+v_{2}\\
+v_{3}
+\end{array}
+\right]= \left[
+\begin{array}{c}
+I_{1}\\
+0\\
+I_{2}
+\end{array}
+\right]$$
+\end{tiny}
+\end{minipage}
+\tiny $$\mbox{Note that } \widehat{R}=1/R$$
+\tiny \href{run:../../LPCSim_1.0/ckt/nodalExample.ckt}{\color{red} Click here to see the example}
+\end{frame}
+
+
+\begin{frame}
+\begin{block}{Modified Nodal Analysis}
+\begin{small}
+\begin{itemize}
+\item applicable to all kinds of networks.
+\item Let $\mathbf{A}_{r}$ be the reduced incidence matrix of ${\cal{G}}$
+By Tellegan's theorem,
+\begin{tiny}
+$$\mathbf{A_ri}=\mathbf{0}$$
+$$\left[\begin{array}{ccc}
+  \mathbf{A}_{rG} & \mathbf{A}_{rT} & \mathbf{A}_{rJ}
+\end{array}\right]
+\left[\begin{array}{c}
+  \mathbf{i}_{G} \\
+  \mathbf{i}_{T} \\
+  \mathbf{i}_{J}
+\end{array}\right]
+=\mathbf{0}$$
+
+$$\left[\begin{array}{cc}
+  \mathbf{A}_{rG}\mathbf{G} & \mathbf{A}_{rT}
+\end{array}\right]
+\left[\begin{array}{c}
+  \mathbf{v}_{G} \\
+  \mathbf{i}_{T}
+\end{array}\right]
+=-\mathbf{A}_{rJ}\mathbf{i}_{J}$$
+
+\begin{equation}
+\label{mna_eq1}
+\left[\begin{array}{cc}
+  \mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T} & \mathbf{A}_{rT}
+\end{array}\right]
+\left[\begin{array}{c}
+  \mathbf{v}_{n} \\
+  \mathbf{i}_{T}
+\end{array}\right]
+=-\mathbf{A}_{rJ}\mathbf{i}_{J}
+\end{equation}
+
+Device characteristics of the branches in $T$ be
+$$\left[\begin{array}{cc}
+  \mathbf{M} & \mathbf{N}
+\end{array}\right]
+\left[\begin{array}{c}
+  \mathbf{i}_{T} \\
+  \mathbf{v}_{T}
+\end{array}\right]
+=\mathbf{S}_{T}$$
+
+\begin{equation}
+\label{mna_eq2}
+\left[\begin{array}{cc}
+  \mathbf{NA}_{rT}^{T} & \mathbf{M}
+\end{array}\right]
+\left[\begin{array}{c}
+  \mathbf{v}_{n} \\
+  \mathbf{i}_{T}
+\end{array}\right]
+=\mathbf{S}_{T}
+\end{equation}
+\end{tiny}
+\end{itemize}
+\end{small}
+\end{block}
+\end{frame}
+
+\begin{frame}
+\begin{block}{Example}
+\begin{figure}[!ht]
+\begin{center}
+\includegraphics[scale=0.35]{../figures/modified_figure.eps}
+\caption{ Example for MNA } \label{modifiedfig}
+\end{center}
+\end{figure}
+\begin{tiny}
+$$\left[
+\begin{array}{cccccc}
+\widehat{R}_{1}+\widehat{R}_{4} & -\widehat{R}_{1} & -\widehat{R}_{4} & 1 & 0 \\
+-\widehat{R}_{1} & \widehat{R}_{1}+\widehat{R}_{2}+\widehat{R}_{3} & -\widehat{R}_{3} & 0 & 0 \\
+-\widehat{R}_{4} & -\widehat{R}_{3} & \widehat{R}_{3}+\widehat{R}_{4} & 0 & 1  \\
+1 & 0 & 0 & 0 & 0 \\
+0 & 0 & 1 & 0 & 0
+\end{array}
+\right] \left[
+\begin{array}{c}
+v_{1}\\
+v_{2}\\
+v_{3}\\
+i_{V_1}\\
+i_{V_2}\\
+\end{array}
+\right]= \left[
+\begin{array}{c}
+0\\
+0\\
+0\\
+V_{1}\\
+V_{2}
+\end{array}
+\right]$$
+\end{tiny}
+\tiny $$\mbox{Note that } \widehat{R}=1/R$$
+\tiny \href{run:../../LPCSim_1.0/ckt/modifiedNodalExample.ckt}{\color{red} Click here to see the example}
+\end{block}
+\end{frame}
+
+\begin{frame}
+\frametitle{Controlled Sources}
+\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page
+  \begin{figure}[!ht]
+      \centering
+      \includegraphics[scale=0.6]{../figures/VCCS.eps}
+      \caption{\scriptsize Voltage Controlled Current Source (VCCS)}
+      \label{vccs}
+  \end{figure}
+\end{minipage}
+%\hspace{0.5cm} % To get a little bit of space between the figures
+\begin{minipage}[!b]{0.47\linewidth}
+  \begin{figure}[!ht]
+     \centering
+      \includegraphics[scale=0.6]{../figures/VCVS.eps}
+      \caption{\scriptsize Voltage Controlled Voltage Source (VCVS) }
+      \label{vcvs}
+  \end{figure}
+    \end{minipage}
+\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page
+  \begin{figure}[!ht]
+      \centering
+      \includegraphics[scale=0.6]{../figures/CCCS.eps}
+      \caption{\scriptsize Current Controlled Current Source (CCCS)}
+      \label{cccs}
+  \end{figure}
+\end{minipage}
+%\hspace{0.5cm} % To get a little bit of space between the figures
+\begin{minipage}[!b]{0.47\linewidth}
+  \begin{figure}[!ht]
+     \centering
+      \includegraphics[scale=0.6]{../figures/CCVS.eps}
+      \caption{\scriptsize Current Controlled Voltage Source (CCVS) }
+      \label{ccvs}
+  \end{figure}
+    \end{minipage}
+\begin{scriptsize}
+\begin{itemize}
+\item In voltage controlled devices, we have added a $0A$ current source as controlling branch
+%without disturbing the incidence relationship of existing edges (i.e., the addition is 'soldering type') and its voltage is used for calculating the value of the devices.
+\item In current controlled devices, we have added a $0V$ voltage source as controlling branch
+%by splitting a node (i.e., plier type entry) and the current through it is used for calculating the value of the devices.
+\end{itemize}
+\end{scriptsize}
+\end{frame}
+
+\begin{frame}
+\begin{block}{Example with controlled sources}
+\begin{figure}[!ht]
+\begin{center}
+\includegraphics[scale=0.6]{../figures/linearckt.eps}
+\caption{ \scriptsize Example with controlled source (MNA)} \label{modifiedfig}
+\end{center}
+\end{figure}
+\begin{tiny}
+$$\left[
+\begin{array}{ccccccc}
+\widehat{R}_{1} & -\widehat{R}_{1} & 0 & 0 & 0 & 1 & 0 \\
+-\widehat{R}_{1} & \widehat{R}_{1}+\widehat{R}_{2} & 0 & 0 & 0 & 0 &1\\
+0 & 0& \widehat{R}_{4} & -\widehat{R}_{4}-g_1 & 0 & 0 & -1  \\
+0 & 0& -\widehat{R}_{4} & \widehat{R}_{3}+ \widehat{R}_{4}+\widehat{R}_{5} &-\widehat{R}_{5}  & 0 & 0  \\
+0 & 0& 0 &g_1-\widehat{R}_{5} & \widehat{R}_{5}+\widehat{R}_{6} & 0 & 0   \\
+1 & 0 & 0 & 0 & 0 &0 &0\\
+0 & 1 & -1 &-e1 &e1 &0 & 0
+\end{array}
+\right] \left[
+\begin{array}{c}
+v_{1}\\
+v_{2}\\
+v_{3}\\
+v_{4}\\
+v_{5}\\
+i_{V_1}\\
+i_{E_1}\\
+\end{array}
+\right]= \left[
+\begin{array}{c}
+0\\
+0\\
+I_1\\
+0\\
+0\\
+V_{1}\\
+0
+\end{array}
+\right]$$
+\end{tiny}
+\tiny $$\mbox{Note that } \widehat{R}=1/R$$
+\tiny \href{run:../../LPCSim_1.0/ckt/linear1.ckt}{\color{red} Click here to see the example}
+\end{block}
+\end{frame}
+
+\begin{frame}
+\begin{block}{Example with controlled sources-2}
+\begin{figure}[!ht]
+\begin{center}
+\includegraphics[scale=0.6]{../figures/linearckt2.eps}
+\caption{ \scriptsize Example2 with controlled source (MNA)} \label{modifiedfig}
+\end{center}
+\end{figure}
+\begin{tiny}
+$$\left[
+\begin{array}{cccccc}
+\widehat{R}_{1}+\widehat{R}_{2} & -\widehat{R}_{2} & 0 & 0 & 0 &0\\
+-\widehat{R}_{2} &\widehat{R}_{2}+\widehat{R}_{4} &0& -\widehat{R}_{4} & 1 & 0  \\
+0 & -\widehat{R}_{4} & 0 & \widehat{R}_{4} & 0  & 1  \\
+0 & 1& -1 &0 & 0 & 0   \\
+0 & 0 & 0 & 1 & -h_1 &0 
+\end{array}
+\right] \left[
+\begin{array}{c}
+v_{1}\\
+v_{2}\\
+v_{3}\\
+v_{4}\\
+i_{V_1}\\
+i_{H_1}\\
+\end{array}
+\right]= \left[
+\begin{array}{c}
+I_1\\
+0\\
+0\\
+0\\
+V_{1}\\
+0
+\end{array}
+\right]$$
+\end{tiny}
+\tiny $$\mbox{Note that } \widehat{R}=1/R$$
+\tiny \href{run:../../LPCSim_1.0/ckt/linear2.ckt}{\color{red} Click here to see the example}
+\end{block}
+\end{frame}
+
+\begin{frame}
+\frametitle{Circuit with nonlinear elements}
+Simulation of circuit with nonlinear element is done in two steps:
+\begin{itemize}
+\item Formulating the nonlinear equilibrium equations using topological constraints (i.e., KCE, KVE).
+\item Solving these equations using appropriate numerical technique.
+\end{itemize} 
+Newton-Raphson method -- Numerical technique to solve nonlinear equations
+\begin{itemize}
+\item fast convergence rate
+\item needs good initial guess
+\item does not guaranteed to converge
+\item slower when multiple solution
+\end{itemize}
+\end{frame}
+
+\begin{frame}
+\frametitle{Linearization of Nonlinear Elements}
+\begin{minipage}[!b]{0.5\linewidth}
+Diode characteristics,
+$$I_D=I_S(e^{qV/kT}-1)$$
+$$I_D=I_D|_{V=V_0} + (V-V_0)\frac{I_D}{V}|_{V=V_0}$$
+$$I_D=I_{D0}+(V-V_0)G_{D0}$$
+\begin{figure}[h]
+\begin{center}
+\includegraphics[scale=0.4]{../figures/diodeI.eps}
+\begin{small}Modeling of Diode\end{small}
+\label{diodeI}
+\end{center}
+\end{figure}
+\end{minipage}
+\begin{minipage}[!b]{0.4\linewidth}
+\begin{figure}[h]
+\begin{center}
+\includegraphics[scale=0.3]{../figures/diodechar1.eps}
+\begin{small}Linearized approximation of diode model\end{small}
+\begin{tiny}$$I_{DN0}=I_{D0}-V_0G_{D0}$$\end{tiny}
+\end{center}
+\end{figure}
+\end{minipage}
+\end{frame}
+
+
+\begin{frame}
+{\bf Procedure:}{Operating Point Analysis}
+\small
+\begin{algorithmic}[1]
+\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage.
+\STATE Find branch voltage and node potential.
+\STATE Find branch current from branch voltage using device characteristics.
+\IF{Non-linear component}
+\STATE {\bf NR:} Check  device characteristics of non-linear devices.
+\IF {Device characteristics is not satisfied}
+\STATE Call Newton Raphson procedure
+\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage.
+\STATE Find branch current from branch voltage using device characteristics.
+\STATE Go to {\bf NR}
+\ENDIF
+\STATE Check for KCL
+\ENDIF
+\end{algorithmic}
+\normalsize
+\end{frame}
+
+\begin{frame}
+\frametitle{Full Wave Bridge Rectifier}
+\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.5]{../figures/bridge.eps}
+\end{figure}
+\end{minipage}
+\hspace{0.5cm} % To get a little bit of space between the figures
+\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.3]{../figures/bridgeOutput.eps}
+\end{figure}
+\end{minipage}
+\end{frame}
+
+\section{DC Analysis}
+\begin{frame}
+\frametitle{DC Analysis}
+{\bf Procedure:}{DC Analysis}
+\small
+\begin{algorithmic}[1]
+\STATE Modify the value of the sweep source and update Modified Nodal matrix.
+\STATE Do Operating Point Analysis.
+\end{algorithmic}
+\normalsize
+\end{frame}
+
+\begin{frame}
+\frametitle{Voltage Sweep}
+\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.8]{../figures/V_Sweep.eps}
+\caption{Example of DC Analysis (Vsweep.ckt)}
+\end{figure}
+\end{minipage}
+\hspace{0.5cm} % To get a little bit of space between the figures
+\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.3]{../figures/V_SweepOutput.eps}
+\end{figure}
+\end{minipage}
+\end{frame}
+
+\begin{frame}
+\frametitle{User defined Components}
+Consider, a non-linear resistance,
+$$I=\frac{1}{R}V^3$$
+
+\begin{itemize}
+\item Create  a file \$CompName.sci
+\item Define
+\begin{itemize}
+\item Function in the $i=g(v)$ form
+\item Jacobian of the function
+\end{itemize}
+\end{itemize}
+
+%{\bf Syntax:-}
+%\newline
+%function I=\$CompName\_func(voltage,parameter)
+%\$par\_2=parameter(2)
+%\$par\_3=parameter(3)
+\end{frame}
+
+\begin{frame}
+\frametitle{Non-linear Resistance}
+\begin{minipage}[!b]{0.43\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.7]{../figures/myR.eps}
+\end{figure}
+\begin{tiny}
+function I=myR\_func(voltage,parameter)
+\begin{center}
+        R=parameter(2); \newline
+        I=1/R*(voltage\^3);
+\end{center}
+endfunction \newline
+
+
+function Gj=myR\_Jacobian(voltage,parameter) 
+\begin{center}
+        R=parameter(2); \newline
+        Gj=3/R*(voltage\^2);
+\end{center}
+endfunction
+\end{tiny}
+\end{minipage}
+\hspace{0.5cm} % To get a little bit of space between the figures
+\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.3]{../figures/myROutput.eps}
+\end{figure}
+\end{minipage}
+\end{frame}
+
+\section{Transient Analysis}
+\begin{frame}
+  \begin{block}{What is Transient Analysis?}
+     \begin{itemize}
+       \item Computes the response of a circuit as function of time.
+       \item Time is discretized and the solution is computed piecewise.
+     \end{itemize}
+   \end{block}
+  \begin{block}{Important factors}
+    \begin{itemize}
+      \item Proper time Stepping.
+      \item Integration methods.
+    \end{itemize}
+  \end{block}
+\end{frame}
+
+\begin{frame}
+\frametitle{Discreatization}
+Consider, a capacitor
+\begin{tiny}
+$$I_C(t_n)=C\frac{\partial{V}_C(t_n)}{\partial{t}}$$
+Using Backward Euler's method,
+$$I_C(t_n)=C\frac{V(t_n)-V(t_{n-1})}{t_n-t_{n-1}}$$
+$$I_C(t_n)=\frac{C}{h}V(t_n)-\frac{C}{h}V(t_{n-1})$$
+$$I_C(t_n)=G_C^{(k)}V(t_n)-I_C^{(k)}$$
+\end{tiny}
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.8]{../figures/Ceq.eps}
+\end{figure}
+\end{frame}
+
+\begin{frame}
+\frametitle{RC Circuit}
+\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.8]{../figures/RC.eps}
+\end{figure}
+\end{minipage}
+\hspace{0.5cm} % To get a little bit of space between the figures
+\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.3]{../figures/RCOutput.eps}
+\end{figure}
+\end{minipage}
+\end{frame}
+
+\begin{frame}
+\frametitle{Full Wave Bridge Rectifier with Filter}
+\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.4]{../figures/bridgeFilter.eps}
+\end{figure}
+\end{minipage}
+\hspace{0.5cm} % To get a little bit of space between the figures
+\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.3]{../figures/bridgeFilterOutput.eps}
+\end{figure}
+\end{minipage}
+\end{frame}
+
+\begin{frame}
+\frametitle{PseudoCode}
+{\bf Procedure:}{Transient Analysis}
+\small
+\begin{algorithmic}[1]
+\STATE Discretize time dependent Component and Update Modified Nodal matrix.
+\STATE Do Operating Point Analysis.
+\end{algorithmic}
+\normalsize
+
+{\bf Procedure:}{Discretization}
+\small
+\begin{algorithmic}[1]
+\STATE Compute time dependent source value at time t.
+\STATE Compute the values of static model of dynamic component at time t.
+\STATE Update Modified Nodal matrix.
+\end{algorithmic}
+\normalsize
+\end{frame}
+
+%\begin{frame}
+%\frametitle{CMOS Inverter}
+%\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+%\begin{figure}[h]
+%\centering
+%\includegraphics[scale=0.4]{../figures/inverter.eps}
+%\end{figure}
+%\end{minipage}
+%\hspace{0.5cm} % To get a little bit of space between the figures
+%\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+%\begin{figure}[h]
+%\centering
+%\includegraphics[scale=0.3]{../figures/inverterOutput.eps}
+%\end{figure}
+%\end{minipage}
+%\end{frame}
+
+\end{document}
+
diff --git a/OSCAD/LPCSim/report/presentation/SMCSim_SFD.tex b/OSCAD/LPCSim/report/presentation/SMCSim_SFD.tex
new file mode 100644
index 0000000..f2cd6dd
--- /dev/null
+++ b/OSCAD/LPCSim/report/presentation/SMCSim_SFD.tex
@@ -0,0 +1,737 @@
+%$Header: /cvsroot/latex-beamer/latex-beamer/solutions/generic-talks/generic-ornate-15min-45min.en.tex,v 1.4 2004/10/07 20:53:08 tantau Exp $
+\documentclass{beamer}
+\mode<presentation>
+{
+  \usecolortheme{seahorse}
+  \usefonttheme{professionalfonts}
+  \useinnertheme{rounded}
+  \useoutertheme{shadow}
+%  \useoutertheme{smoothbars}
+}
+%\setbeamertemplate{background canvas}[vertical shading][bottom=white!10,top=blue!5]
+\usepackage{verbatim} 
+\usepackage[english]{babel}
+\usepackage[latin1]{inputenc}
+\usepackage{pgf,pgfarrows,pgfnodes,pgfautomata,pgfheaps,pgfshade}
+\usepackage{amsmath,amsfonts,amsthm,amssymb}
+\usepackage{times}
+\usepackage[T1]{fontenc}
+\usepackage{graphics}
+\usepackage{graphicx}
+%\usepackage{psfig}
+\usepackage{algorithmic}
+
+\title
+{Scilab based Mini Circuit Simulator}
+
+\author[]
+{Yogesh Dilip Save}
+\institute
+{
+  Department of Electrical Engineering\\
+  Indian Institute of Technology, Bombay
+}
+%\pgfdeclareimage[height=0.7cm]{university-logo}{iitblogo.eps}
+%\logo{\pgfuseimage{university-logo}}
+
+
+\date[seminar] % (optional)
+{Sept., 2011 / \small{Software Freedom Day}}
+
+
+\begin{document}
+%***************************************************************************************
+\begin{frame}
+  \titlepage
+\end{frame}
+%***************************************************************************************
+%\begin{frame}
+%  \frametitle{Presentation Outline}
+%  \setcounter{tocdepth}{1}
+%  \tableofcontents
+%\end{frame}
+%***************************************************************************************
+
+\section{Introduction}
+\begin{frame}
+ \frametitle{Motivation}
+\begin{block}{Objective}
+To assist students in improving their knowledge in field of circuit simulation.
+\end{block}
+\begin{block}{Problem with commercial simulators}
+\begin{itemize}
+\item Generally software codes are not available.
+\item Software codes are written in higher level language (C Programming and Fortran....).
+\item Complex due to implementation of many features and complex modelling.
+\end{itemize}
+\end{block}
+\end{frame}
+
+\begin{frame}
+ \frametitle{Motivation}
+\begin{block}{Objective}
+To assist students in improving their knowledge in field of circuit simulation.
+\end{block}
+\begin{block}{Mini simulator}
+\begin{itemize}
+\item used Scilab for coding.
+\item integrated least number of component.  
+\item different versions for add-on features. 
+\end{itemize} 
+\end{block}
+\end{frame}
+
+\section{Features}
+\begin{frame}
+ \frametitle{Features}
+\begin{itemize}
+  \item {\color{red} Various Analysis options.}
+    \begin{itemize}
+      \item Operating Point Analysis
+      \item DC Analysis 
+      \item Transient Analysis  
+      \item AC Analysis 
+    \end{itemize}
+  \item Facility to define a new component.
+  \item Provides circuit equations for debugging as well as learning circuit simulator.
+  \item Easy to integrate and test a new method such as convergence technique, integration method etc. 
+\end{itemize} 
+\end{frame}
+
+\begin{frame}
+\frametitle{Full Wave Bridge Rectifier with Filter}
+\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page
+  \begin{small}  {\bf Circuit Diagram and Netlist} \end{small}
+\vspace{-0.5cm}
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.47]{../figures/bridgeFilter.eps}
+\end{figure}
+\vspace{-0.5cm}
+\begin{tiny}
+* Full Wave Bridge Rectifier 
+\newline
+\vspace{-0.1cm}
+V1 1 2 sine (5 50) 
+\newline
+\vspace{-0.1cm}
+D1 1 3 mymodel (1e-8 0.026) 
+\newline
+\vspace{-0.1cm}
+D2 2 3 mymodel (1e-8 0.026) 
+\newline
+\vspace{-0.1cm}
+D3 0 1 mymodel (1e-8 0.026) 
+\newline
+\vspace{-0.1cm}
+D4 0 2 mymodel (1e-8 0.026) 
+\newline
+\vspace{-0.1cm}
+R1 3 0 10000 
+\newline
+\vspace{-0.1cm}
+C1 3 0 1e-2 
+\newline
+\vspace{-0.1cm}
+.tran 0 100 0.5 
+\newline
+\vspace{-0.1cm}
+.plot v(1)-v(2) v(3) 
+\newline
+\vspace{-0.1cm}
+.end 
+\end{tiny}
+\end{minipage}
+\hspace{0.1cm} % To get a little bit of space between the figures
+\begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.3]{../figures/bridgeFilterOutput.eps}
+\caption{Input-Output Waveform} 
+\end{figure}
+\end{minipage}
+\end{frame}
+
+\begin{frame}
+ \frametitle{Features}
+\begin{itemize}
+  \item Various Analysis options.
+    \begin{itemize}
+      \item Operating Point Analysis
+      \item DC Analysis 
+      \item Transient Analysis  
+      \item AC Analysis 
+    \end{itemize}
+  \item {\color{red} Facility to define a new component.}
+  \item Provides circuit equations for debugging as well as learning circuit simulator.
+  \item Easy to integrate and test a new method such as convergence technique, integration method etc. 
+\end{itemize} 
+\end{frame}
+
+\begin{frame}
+\frametitle{User defined Components}
+Consider, a non-linear resistance,
+$$I=\frac{1}{R}V^3$$
+
+\begin{itemize}
+\item Create  a file \$CompName.sci
+\item Define
+\begin{itemize}
+\item Function in the $i=g(v)$ form
+\item Jacobian of the function
+\end{itemize}
+\end{itemize}
+
+%{\bf Syntax:-}
+%\newline
+%function I=\$CompName\_func(voltage,parameter)
+%\$par\_2=parameter(2)
+%\$par\_3=parameter(3)
+\end{frame}
+
+\begin{frame}
+\frametitle{Non-linear Resistance}
+\begin{minipage}[!b]{0.43\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.7]{../figures/myR.eps}
+\end{figure}
+\begin{tiny}
+function I=myR\_func(voltage,param)\newline
+\hspace*{1cm}R=param(2); \newline
+\hspace*{1cm}I=1/R*(voltage$^3$);\newline
+endfunction 
+
+function Gj=myR\_Jacobian(voltage,param)\newline 
+\hspace*{1cm}R=param(2); \newline
+\hspace*{1cm}Gj=3/R*(voltage$^2$);\newline
+endfunction
+\end{tiny}
+\end{minipage}
+\hspace{0.5cm} % To get a little bit of space between the figures
+\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.3]{../figures/myROutput.eps}
+\end{figure}
+\end{minipage}
+\end{frame}
+
+\begin{frame}
+ \frametitle{Features}
+\begin{itemize}
+  \item Various Analysis options.
+    \begin{itemize}
+      \item Operating Point Analysis
+      \item DC Analysis 
+      \item Transient Analysis  
+      \item AC Analysis 
+    \end{itemize}
+  \item Facility to define a new component.
+  \item {\color{red} Provides circuit equations for debugging as well as learning circuit simulator.}
+  \item Easy to integrate and test a new method such as convergence technique, integration method etc. 
+\end{itemize} 
+\end{frame}
+
+\begin{frame}
+\begin{block}{Example}
+%\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+\begin{figure}[!ht]
+\begin{center}
+\includegraphics[scale=0.35]{../figures/modified_figure.eps}
+\caption{ Example for MNA } \label{modifiedfig}
+\end{center}
+\end{figure}
+%\end{minipage}
+%\begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page
+\begin{tiny}
+$$\left[
+\begin{array}{cccccc}
+G_{1}+G_{4} & -G_{1} & -G_{4} & 1 & 0 \\
+-G_{1} & G_{1}+G_{2}+G_{3} & -G_{3} & 0 & 0 \\
+-G_{4} & -G_{3} & G_{3}+G_{4} & 0 & 1  \\
+1 & 0 & 0 & 0 & 0 \\
+0 & 0 & 1 & 0 & 0
+\end{array}
+\right] \left[
+\begin{array}{c}
+v_{1}\\
+v_{2}\\
+v_{3}\\
+i_{V_1}\\
+i_{V_2}\\
+\end{array}
+\right]= \left[
+\begin{array}{c}
+0\\
+0\\
+0\\
+V_{1}\\
+V_{2}
+\end{array}
+\right]$$
+\end{tiny}
+%\end{minipage}
+\end{block}
+\end{frame}
+
+\begin{frame}
+ \frametitle{Features}
+\begin{itemize}
+  \item Various Analysis options.
+    \begin{itemize}
+      \item Operating Point Analysis
+      \item DC Analysis 
+      \item Transient Analysis  
+      \item AC Analysis 
+    \end{itemize}
+  \item Facility to define a new component.
+  \item Provides circuit equations for debugging as well as learning circuit simulator.
+  \item {\color{red} Easy to integrate and test a new method such as convergence technique, integration method etc.} 
+\end{itemize} 
+\end{frame}
+
+\begin{frame}
+	\begin{center}
+	{\Huge	Thank You}
+\end{center}
+%	\smiley
+\end{frame}
+% 
+% \section{Operating Point Analysis}
+% \begin{frame}
+% \begin{block}{Operating Point (OP) Analysis}
+% \begin{itemize}
+% \item OP Analysis is the central part of a circuit simulator.
+% \item The equations that describe the electrical system are nonlinear and algebraic and their solution gives operating point.
+% \item Systems of nonlinear equations are solved by iteratively formulating and solving systems of linear algebraic equations. 
+% \item The overall efficiency of a circuit simulator is dependent upon the performance of the linear DC analyzer.
+% %\item Thus, our work is towards improving the performance of linear DC Analyzers and handling convergence issues related to large size nonlinear circuits.
+% \end{itemize}
+% \end{block}
+% \end{frame}
+% 
+% \begin{frame}
+% \begin{block}{\small Nodal Analysis}
+% \begin{itemize}
+% \begin{small}
+% \item Applicable when the network has only current sources and conductances type devices i.e., $i=g(v)$.
+% \item Let, $\mathbf{A}_r$ be the reduced incidence matrix of $\cal{G}$ which is a representative matrix of $V_v(\cal{G})$. \\
+% \end{small}
+% \begin{tiny}
+% The KCL constraints are
+% $$\mathbf{A_ri}=\mathbf{0}$$
+% $$\left[\begin{array}{cc}
+%   \mathbf{A}_{rG} & \mathbf{A}_{rJ}
+% \end{array}\right]
+% \left[\begin{array}{c}
+%   \mathbf{i}_{G} \\
+%   \mathbf{i}_{J}
+% \end{array}\right]
+% =\mathbf{0}$$
+% $$\mathbf{A}_{rG}\mathbf{i}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}$$
+% 
+% $$\mathbf{A}_{rG}\mathbf{G}\mathbf{v}_{G}=-\mathbf{A}_{rJ}\mathbf{i}_{J}\ \ \ \ \ \ \ \ (As, \mathbf{i}_{G}=\mathbf{G}\mathbf{v}_{G})$$
+% 
+% The KVE constraints are
+% $$\left[\begin{array}{c}
+%   \mathbf{v}_{G} \\
+%   \mathbf{v}_{J}
+% \end{array}\right]
+% =
+% \left[\begin{array}{c}
+%   \mathbf{A}_{rG}^T \\
+%   \mathbf{A}_{rJ}^T
+% \end{array}\right]
+% \mathbf{v}_n$$
+% 
+% \begin{equation}
+% \mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T}\mathbf{v}_{n}=-\mathbf{A}_{rJ}\mathbf{i}_{J}
+% \label{nodal_equation}
+% \end{equation}
+% \end{tiny}
+% \end{itemize}
+% \end{block}
+% \end{frame}
+% 
+% \begin{frame}
+% \begin{block}{Matrix Formulation}
+% \begin{itemize}
+% \item The diagonal entries of the matrix are the sum of conductances incident on the corresponding nodes.
+% \item The off diagonal entries $(i,j)^{th}$ of the matrix is the negative of conductances between node $i$ and $j$.
+% \item The $\mathbf{A}_{rJ}\mathbf{i}_{J}$ is the sum of current sources leaving the nodes.
+% \end{itemize}
+% \end{block}
+% \begin{block}{Example}
+% \end{block}
+% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+% \begin{figure}[h]
+% \centering
+% \includegraphics[scale=0.35]{../figures/nodal_figure.eps}
+% \end{figure}
+% \end{minipage}
+% \begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page
+% \begin{tiny}
+% $$\left[
+% \begin{array}{ccc}
+% G_{1}+G_{2} & -G_{2} & 0\\
+% -G_{2} & G_{2}+G_{3}+G_{4} & -G_{4}\\
+% 0 & -G_{4} & G_{4}+G_{5}
+% \end{array}
+% \right] \left[
+% \begin{array}{c}
+% v_{1}\\
+% v_{2}\\
+% v_{3}
+% \end{array}
+% \right]= \left[
+% \begin{array}{c}
+% I_{1}\\
+% 0\\
+% I_{2}
+% \end{array}
+% \right]$$
+% \end{tiny}
+% \end{minipage}
+% \end{frame}
+% 
+% 
+% \begin{frame}
+% \begin{block}{Modified Nodal Analysis}
+% \begin{small}
+% \begin{itemize}
+% \item applicable to all kinds of networks.
+% \item Let $\mathbf{A}_{r}$ be the reduced incidence matrix of ${\cal{G}}$
+% By Tellegan's theorem,
+% \begin{tiny}
+% $$\mathbf{A_ri}=\mathbf{0}$$
+% $$\left[\begin{array}{ccc}
+%   \mathbf{A}_{rG} & \mathbf{A}_{rT} & \mathbf{A}_{rJ}
+% \end{array}\right]
+% \left[\begin{array}{c}
+%   \mathbf{i}_{G} \\
+%   \mathbf{i}_{T} \\
+%   \mathbf{i}_{J}
+% \end{array}\right]
+% =\mathbf{0}$$
+% 
+% $$\left[\begin{array}{cc}
+%   \mathbf{A}_{rG}\mathbf{G} & \mathbf{A}_{rT}
+% \end{array}\right]
+% \left[\begin{array}{c}
+%   \mathbf{v}_{G} \\
+%   \mathbf{i}_{T}
+% \end{array}\right]
+% =-\mathbf{A}_{rJ}\mathbf{i}_{J}$$
+% 
+% \begin{equation}
+% \label{mna_eq1}
+% \left[\begin{array}{cc}
+%   \mathbf{A}_{rG}\mathbf{G}\mathbf{A}_{rG}^{T} & \mathbf{A}_{rT}
+% \end{array}\right]
+% \left[\begin{array}{c}
+%   \mathbf{v}_{n} \\
+%   \mathbf{i}_{T}
+% \end{array}\right]
+% =-\mathbf{A}_{rJ}\mathbf{i}_{J}
+% \end{equation}
+% 
+% Device characteristics of the branches in $T$ be
+% $$\left[\begin{array}{cc}
+%   \mathbf{M} & \mathbf{N}
+% \end{array}\right]
+% \left[\begin{array}{c}
+%   \mathbf{i}_{T} \\
+%   \mathbf{v}_{T}
+% \end{array}\right]
+% =\mathbf{S}_{T}$$
+% 
+% \begin{equation}
+% \label{mna_eq2}
+% \left[\begin{array}{cc}
+%   \mathbf{NA}_{rT}^{T} & \mathbf{M}
+% \end{array}\right]
+% \left[\begin{array}{c}
+%   \mathbf{v}_{n} \\
+%   \mathbf{i}_{T}
+% \end{array}\right]
+% =\mathbf{S}_{T}
+% \end{equation}
+% \end{tiny}
+% \end{itemize}
+% \end{small}
+% \end{block}
+% \end{frame}
+% 
+% \begin{frame}
+% \begin{block}{Example}
+% %\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+% \begin{figure}[!ht]
+% \begin{center}
+% \includegraphics[scale=0.35]{../figures/modified_figure.eps}
+% \caption{ Example for MNA } \label{modifiedfig}
+% \end{center}
+% \end{figure}
+% %\end{minipage}
+% %\begin{minipage}[!b]{0.55\linewidth} % A minipage that covers half the page
+% \begin{tiny}
+% $$\left[
+% \begin{array}{cccccc}
+% G_{1}+G_{4} & -G_{1} & -G_{4} & 1 & 0 \\
+% -G_{1} & G_{1}+G_{2}+G_{3} & -G_{3} & 0 & 0 \\
+% -G_{4} & -G_{3} & G_{3}+G_{4} & 0 & 1  \\
+% 1 & 0 & 0 & 0 & 0 \\
+% 0 & 0 & 1 & 0 & 0
+% \end{array}
+% \right] \left[
+% \begin{array}{c}
+% v_{1}\\
+% v_{2}\\
+% v_{3}\\
+% i_{V_1}\\
+% i_{V_2}\\
+% \end{array}
+% \right]= \left[
+% \begin{array}{c}
+% 0\\
+% 0\\
+% 0\\
+% V_{1}\\
+% V_{2}
+% \end{array}
+% \right]$$
+% \end{tiny}
+% %\end{minipage}
+% \end{block}
+% \end{frame}
+% 
+% \begin{frame}
+% \frametitle{Controlled Sources}
+% \begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page
+%   \begin{figure}[!ht]
+%       \centering
+%       \includegraphics[scale=0.6]{../figures/VCCS.eps}
+%       \caption{Voltage Controlled Current Source (VCCS)}
+%       \label{vccs}
+%   \end{figure}
+% \end{minipage}
+% %\hspace{0.5cm} % To get a little bit of space between the figures
+% \begin{minipage}[!b]{0.47\linewidth}
+%   \begin{figure}[!ht]
+%      \centering
+%       \includegraphics[scale=0.6]{../figures/VCVS.eps}
+%       \caption{Voltage Controlled Voltage Source (VCVS) }
+%       \label{vcvs}
+%   \end{figure}
+%     \end{minipage}
+% \begin{minipage}[!b]{0.47\linewidth} % A minipage that covers half the page
+%   \begin{figure}[!ht]
+%       \centering
+%       \includegraphics[scale=0.6]{../figures/CCCS.eps}
+%       \caption{Current Controlled Current Source (CCCS)}
+%       \label{cccs}
+%   \end{figure}
+% \end{minipage}
+% %\hspace{0.5cm} % To get a little bit of space between the figures
+% \begin{minipage}[!b]{0.47\linewidth}
+%   \begin{figure}[!ht]
+%      \centering
+%       \includegraphics[scale=0.6]{../figures/CCVS.eps}
+%       \caption{Current Controlled Voltage Source (CCVS) }
+%       \label{ccvs}
+%   \end{figure}
+%     \end{minipage}
+% \begin{small}
+% \begin{itemize}
+% \item In voltage controlled devices, we have added a $0A$ current source as controlling branch
+% %without disturbing the incidence relationship of existing edges (i.e., the addition is 'soldering type') and its voltage is used for calculating the value of the devices.
+% \item In current controlled devices, we have added a $0V$ voltage source as controlling branch
+% %by splitting a node (i.e., plier type entry) and the current through it is used for calculating the value of the devices.
+% \end{itemize}
+% \end{small}
+% \end{frame}
+% 
+% \begin{frame}
+% \frametitle{Linearization of Nonlinear Elements}
+% \begin{minipage}[!b]{0.5\linewidth}
+% Diode characteristics,
+% $$I_D=I_S(e^{qV/kT}-1)$$
+% $$I_D=I_D|_{V=V_0} + (V-V_0)\frac{I_D}{V}|_{V=V_0}$$
+% $$I_D=I_{D0}+(V-V_0)G_{D0}$$
+% \begin{figure}[h]
+% \begin{center}
+% \includegraphics[scale=0.4]{../figures/diodeI.eps}
+% \begin{small}Modeling of Diode\end{small}
+% \label{diodeI}
+% \end{center}
+% \end{figure}
+% \end{minipage}
+% \begin{minipage}[!b]{0.4\linewidth}
+% \begin{figure}[h]
+% \begin{center}
+% \includegraphics[scale=0.3]{../figures/diodechar1.eps}
+% \begin{small}Linearized approximation of diode model\end{small}
+% \begin{tiny}$$I_{DN0}=I_{D0}-V_0G_{D0}$$\end{tiny}
+% \end{center}
+% \end{figure}
+% \end{minipage}
+% \end{frame}
+% 
+% 
+% \begin{frame}
+% {\bf Procedure:}{Operating Point Analysis}
+% \small
+% \begin{algorithmic}[1]
+% \STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage.
+% \STATE Find branch voltage and node potentail.
+% \STATE Find branch current from branch voltage using device characteristics.
+% \IF{Non-linear component}
+% \STATE {\bf NR:} Check  device characteristics of non-linear devices.
+% \IF {Device characteristics is not satisfied}
+% \STATE Call Newton Raphson procedure
+% \STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage.
+% \STATE Find branch current from branch voltage using device characteristics.
+% \STATE Go to {\bf NR}
+% \ENDIF
+% \STATE Check for KCL
+% \ENDIF
+% \end{algorithmic}
+% \normalsize
+% \end{frame}
+% 
+% \begin{frame}
+% \frametitle{Full Wave Bridge Rectifier}
+% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+% \begin{figure}[h]
+% \centering
+% \includegraphics[scale=0.5]{../figures/bridge.eps}
+% \end{figure}
+% \end{minipage}
+% \hspace{0.5cm} % To get a little bit of space between the figures
+% \begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+% \begin{figure}[h]
+% \centering
+% \includegraphics[scale=0.3]{../figures/bridgeOutput.eps}
+% \end{figure}
+% \end{minipage}
+% \end{frame}
+% 
+% \section{DC Analysis}
+% \begin{frame}
+% \frametitle{DC Analysis}
+% {\bf Procedure:}{DC Analysis}
+% \small
+% \begin{algorithmic}[1]
+% \STATE Modify the value of the sweep source and update Modified Nodal matrix.
+% \STATE Do Operating Point Analysis.
+% \end{algorithmic}
+% \normalsize
+% \end{frame}
+% 
+% \begin{frame}
+% \frametitle{Voltage Sweep}
+% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+% \begin{figure}[h]
+% \centering
+% \includegraphics[scale=0.8]{../figures/V_Sweep.eps}
+% \caption{Example of DC Analysis (Vsweep.ckt)}
+% \end{figure}
+% \end{minipage}
+% \hspace{0.5cm} % To get a little bit of space between the figures
+% \begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+% \begin{figure}[h]
+% \centering
+% \includegraphics[scale=0.3]{../figures/V_SweepOutput.eps}
+% \end{figure}
+% \end{minipage}
+% \end{frame}
+% 
+% \section{Transient Analysis}
+% \begin{frame}
+%   \begin{block}{What is Transient Analysis?}
+%      \begin{itemize}
+%        \item Computes the response of a circuit as function of time.
+%        \item Time is discretized and the solution is computed piecewise.
+%      \end{itemize}
+%    \end{block}
+%   \begin{block}{Important factors}
+%     \begin{itemize}
+%       \item Proper time Stepping.
+%       \item Integration methods.
+%     \end{itemize}
+%   \end{block}
+% \end{frame}
+% 
+% \begin{frame}
+% \frametitle{Discreatization}
+% Consider, a capacitor
+% \begin{tiny}
+% $$I_C(t_n)=C\frac{\partial{V}_C(t_n)}{\partial{t}}$$
+% Using Backward Euler's method,
+% $$I_C(t_n)=C\frac{V(t_n)-V(t_{n-1})}{t_n-t_{n-1}}$$
+% $$I_C(t_n)=\frac{C}{h}V(t_n)-\frac{C}{h}V(t_{n-1})$$
+% $$I_C(t_n)=G_C^{(k)}V(t_n)-I_C^{(k)}$$
+% \end{tiny}
+% \begin{figure}[h]
+% \centering
+% \includegraphics[scale=0.8]{../figures/Ceq.eps}
+% \end{figure}
+% \end{frame}
+% 
+% \begin{frame}
+% \frametitle{RC Circuit}
+% \begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+% \begin{figure}[h]
+% \centering
+% \includegraphics[scale=0.8]{../figures/RC.eps}
+% \end{figure}
+% \end{minipage}
+% \hspace{0.5cm} % To get a little bit of space between the figures
+% \begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+% \begin{figure}[h]
+% \centering
+% \includegraphics[scale=0.3]{../figures/RCOutput.eps}
+% \end{figure}
+% \end{minipage}
+% \end{frame}
+% 
+% 
+% \begin{frame}
+% \frametitle{PseudoCode}
+% {\bf Procedure:}{Transient Analysis}
+% \small
+% \begin{algorithmic}[1]
+% \STATE Discretize time dependent Component and Update Modified Nodal matrix.
+% \STATE Do Operating Point Analysis.
+% \end{algorithmic}
+% \normalsize
+% 
+% {\bf Procedure:}{Discretization}
+% \small
+% \begin{algorithmic}[1]
+% \STATE Compute time dependent source value at time t.
+% \STATE Compute the values of static model of dynamic component at time t.
+% \STATE Update Modified Nodal matrix.
+% \end{algorithmic}
+% \normalsize
+% \end{frame}
+% 
+% %\begin{frame}
+% %\frametitle{CMOS Inverter}
+% %\begin{minipage}[!b]{0.4\linewidth} % A minipage that covers half the page
+% %\begin{figure}[h]
+% %\centering
+% %\includegraphics[scale=0.4]{../figures/inverter.eps}
+% %\end{figure}
+% %\end{minipage}
+% %\hspace{0.5cm} % To get a little bit of space between the figures
+% %\begin{minipage}[!b]{0.5\linewidth} % A minipage that covers half the page
+% %\begin{figure}[h]
+% %\centering
+% %\includegraphics[scale=0.3]{../figures/inverterOutput.eps}
+% %\end{figure}
+% %\end{minipage}
+% %\end{frame}
+% 
+\end{document}
+
diff --git a/OSCAD/LPCSim/report/presentation/runlatex b/OSCAD/LPCSim/report/presentation/runlatex
new file mode 100644
index 0000000..1e21dcf
--- /dev/null
+++ b/OSCAD/LPCSim/report/presentation/runlatex
@@ -0,0 +1,3 @@
+#!/bin/bash
+latex $1.tex
+dvipdf $1.dvi
diff --git a/OSCAD/LPCSim/report/report.tex b/OSCAD/LPCSim/report/report.tex
new file mode 100644
index 0000000..0a090c1
--- /dev/null
+++ b/OSCAD/LPCSim/report/report.tex
@@ -0,0 +1,208 @@
+\documentclass[a4paper,10pt]{report}
+\pagestyle{plain}
+\usepackage{graphicx}
+\usepackage{caption}
+\usepackage{algorithmic}
+% Title Page
+\title{MiniSim}
+\author{Yogesh Dilip Save}
+
+\begin{document}
+\maketitle
+\chapter*{Introduction}
+MiniSim is a circuit simulator to assist students in improving their knowledge in field of circuit simulation. The purpose of this project is not only to improve the understanding of student toward building simulator but also add some features which are not available in commercial simulator.
+
+\section*{Features}
+Analysis Options
+\begin{enumerate}
+\item Operating Point Analysis
+\item DC Analysis
+\item Transient Analysis 
+\end{enumerate}
+Devices Suported
+\begin{enumerate}
+\item All linear components (Resistances, Independent voltage and current sources, controlled sources).
+\item Non-linear components (Diode)
+\item User Defined Non-linear component
+\item Time Dependent Component (Capacitor)
+\item MOSFET
+\end{enumerate}
+
+\chapter*{User Defined Components}
+How to define a new component?
+\par
+Consider, a non-linear resistance,
+$$I=\frac{1}{R}V^2$$
+
+It is two step processs:
+\begin{enumerate}
+\item Create  a file \$CompName.sci
+\item Define 
+\begin{enumerate}
+\item Function in the $i=g(v)$ form
+\item Jacobian of the function 
+\end{enumerate}
+\end{enumerate}
+
+{\bf Syntax:-}
+\newline 
+function I=\$CompName\_func(voltage,parameter)
+\$par\_2=parameter(2)
+\$par\_3=parameter(3)
+
+\chapter*{Algorithms}
+{\bf Circuit Simulator} (Main Program)
+\small
+\begin{algorithmic}[1]
+\STATE Get Analysis Options.
+\STATE Read Circuit from file and convert it into graph.
+\STATE Linearize non-linear components.
+\STATE Build Modified Nodal Matrix.
+\STATE Do Operating Point Analysis.
+\STATE Print Operating Point Solution.
+\IF {DC Analysis}
+\FOR{Sweep Voltage = Intial : Final}
+\STATE Do DC Analysis.
+\STATE Store output variables.
+\ENDFOR
+\STATE Print/Plot output.
+\ENDIF
+\IF {Transient Analysis}
+\FOR{time = Intial : Final}
+\STATE Do Transient Analysis.
+\STATE Store output variables.
+\ENDFOR
+\STATE Print/Plot output.
+\ENDIF
+\end{algorithmic}
+\normalsize
+
+{\bf Procedure:}{Get Analysis Options}
+\small
+\begin{algorithmic}[1]
+\IF{Operating Point Analysis}
+\STATE Analysis=Operating Point Analysis
+\ENDIF
+\IF{Transient Analysis}
+\STATE Analysis=Transient Analysis
+\STATE Get Start time, Stop time and Step size 
+\ENDIF
+\IF{DC Analysis}
+\STATE Analysis=DC Analysis
+\STATE Get Start voltage, Stop voltage and Step size 
+\ENDIF
+\STATE Get output variables for printing and plotting.
+\STATE Find number of nodes in the circuit.
+\end{algorithmic}
+
+{\bf Procedure:}{Build Modified Nodal Matrix (Stamp table approach)}
+\small
+\begin{algorithmic}[1]
+\STATE $Size(A,b) \gets N-1+T$
+\FORALL {Edges}
+\IF {Conductance}
+\STATE A(Source,Source)+=conductance value
+\STATE A(Source,Sink)-=conductance value
+\STATE A(Sink,Source)-=conductance value
+\ENDIF
+\IF {Current Source}
+\STATE b(Source)+= value
+\STATE b(Sink)-= value
+\ENDIF
+\IF {Voltage Source}
+\STATE A(Source,i*)=1; A(Sink,i*)=-1
+\STATE A(i*,Source)=1; A(i*,Sink)=-1
+\STATE b(i*)= value
+\ENDIF
+\IF {Voltage Controlled Current Source}
+\STATE A(Source,CSource)+= value; A(Source,CSink)-= value
+\STATE A(Sink,CSource)-= value; A(Sink,CSink)+= value
+\ENDIF
+\IF {Voltage controlled Voltage Source}
+\STATE A(Source,i*)=1; A(Sink,i*)=-1
+\STATE A(i*,Source)=1; A(i*,Sink)=-1
+\STATE A(i*,CSource)=-value; A(i*,CSink)=value
+\ENDIF
+\IF {Current controlled Current Source}
+\STATE A(Source,i*)=1; A(Sink,i*)=-1
+\STATE A(i*,i*)=1; A(i*,j*)=-value
+\ENDIF
+\IF {Current controlled Voltage Source}
+\STATE A(Source,i*)=1; A(Sink,i*)=-1
+\STATE A(i*,Source)=1; A(i*,Sink)=-1
+\STATE A(i*,i*)=-value
+\ENDIF
+\ENDFOR
+\end{algorithmic}
+$N$=Number of Nodes.\newline
+$T$=Number of devices whose device characteristic can not be expressed in terms of voltage.
+\normalsize
+\newline
+
+{\bf Procedure:}{Operating Point Analysis}
+\small
+\begin{algorithmic}[1]
+\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage.
+\STATE Find branch voltage and node potentail.
+\STATE Find branch current from branch voltage using device characteristics.
+\IF{Non-linear component}
+\STATE {\bf NR:} Check  device characteristics of non-linear devices.
+\IF {Device characteristics is not satisfied}
+\STATE Call Newton Raphson procedure
+\STATE Find Node Potential and Current through devices whose device characteristic can not be expressed in terms of voltage.
+\STATE Find branch current from branch voltage using device characteristics.
+\STATE Go to {\bf NR}
+\ENDIF
+\STATE Check for KCL
+\ENDIF 
+\end{algorithmic}
+\normalsize
+
+{\bf Procedure}{Check for Device characteristics of Non-linear elements}
+\small
+\begin{algorithmic}[1]
+\FORALL {Non-linear devices}
+\STATE Compute actual current/voltage by its device characteristics.
+\STATE Compare actual current/voltage with that of by anlysis.
+\ENDFOR
+\end{algorithmic}
+\normalsize
+
+{\bf Procedure:}{Newton Raphson}
+\small
+\begin{algorithmic}[1]
+\STATE Update the value of the linearized model of non-linear elements.
+\STATE Update Modified Nodal matrix.
+\end{algorithmic}
+\normalsize
+
+{\bf Procedure:}{Transient Analysis}
+\small
+\begin{algorithmic}[1]
+\STATE Discretize time dependent Component and Update Modified Nodal matrix.
+\STATE Do Operating Point Analysis.
+\end{algorithmic}
+\normalsize
+
+{\bf Procedure:}{Discretization}
+\small
+\begin{algorithmic}[1]
+\STATE Compute time dependent source value at time t.
+\STATE Compute the values of static model of dynamic component at time t.
+\STATE Update Modified Nodal matrix. 
+\end{algorithmic}
+\normalsize
+
+{\bf Procedure:}{DC Analysis}
+\small
+\begin{algorithmic}[1]
+\STATE Modify the value of the sweep source and update Modified Nodal matrix.
+\STATE Do Operating Point Analysis.
+\end{algorithmic}
+\normalsize
+
+\chapter*{Examples}
+In this chapter, some basic circuits and simulation results with minsim are presented. 
+\section*{RC Circuit}
+ 
+\end{document}          
diff --git a/OSCAD/LPCSim/report/simulationReport.aux b/OSCAD/LPCSim/report/simulationReport.aux
new file mode 100644
index 0000000..c17061a
--- /dev/null
+++ b/OSCAD/LPCSim/report/simulationReport.aux
@@ -0,0 +1,3 @@
+\relax 
+\@writefile{lof}{\contentsline {figure}{\numberline {1}{\ignorespaces linearization of diode $D_1$\relax }}{2}}
+\@writefile{lof}{\contentsline {figure}{\numberline {2}{\ignorespaces plot\relax }}{3}}
diff --git a/OSCAD/LPCSim/report/simulationReport.dvi b/OSCAD/LPCSim/report/simulationReport.dvi
new file mode 100644
index 0000000..c4ac162
--- /dev/null
+++ b/OSCAD/LPCSim/report/simulationReport.dvi
diff --git a/OSCAD/LPCSim/report/simulationReport.tex b/OSCAD/LPCSim/report/simulationReport.tex
new file mode 100644
index 0000000..2e06242
--- /dev/null
+++ b/OSCAD/LPCSim/report/simulationReport.tex
@@ -0,0 +1,173 @@
+\documentclass[a4paper,10pt]{report}
+\pagestyle{plain}
+\usepackage{graphicx}
+\usepackage{caption}
+\usepackage{algorithmic}
+% Title Page
+\title{Half-Wave Rectifier}
+\author{Generated by SMCSim}
+
+\begin{document}
+\maketitle
+\hrule\vspace{5mm}
+\begin{center} {\bf Simulation of ckt/HWRectifierFilter.ckt} \end{center}
+\hrule\vspace{5mm}
+
+{\bf Circuit Diagram:} \\
+\vspace{2mm}
+\hrule\vspace{5mm}
+
+{\bf NetList:} \\
+{\it * Half-Wave Rectifier} \\
+V1 1 0 sine (5 50) \\
+D1 1 2 mymodel (1e-8 0.026) \\
+R1 2 0 10000 \\
+C1 2 0 10e-3 \\
+.tran 0 100 0.5 \\
+.plot v(1) v(2) \\
+.end 
+\vspace{2mm}
+\hrule\vspace{5mm}
+
+{\bf System of Equations representing the electrical circuit:}
+\vspace{2mm}
+\begin{equation}
+     i_{V_1} + D_{1f}(v_1,v_2) = 0 
+\end{equation}
+\begin{equation}
+     (R_1)v_2 + (C_1)\frac{dv_2}{dt} + -D_{1f}(v_1,v_2) = 0 
+\end{equation}
+\begin{equation}
+     v_1 = V_1
+\end{equation}
+\vspace{2mm}
+$$ D_{nf}(v_a,v_b)=Is_n(1-e^{(v_a-v_b)/vt_n})$$
+ where $Is_n$=reverse saturation current and $vt_n$=threshold voltage of diode $n$\\
+\hrule\vspace{5mm}
+
+{\bf Matrix form:}\\
+The system of equations $\mathbf{A}\mathbf{x}+\mathbf{D}_f(\mathbf{\widehat{x}})+\mathbf{C}(d\mathbf{x}/dt)=b$ (Symbolically)\\
+Where $\mathbf{A}$, $\mathbf{D}_f$ and $\mathbf{C}$ represent matrices corresponding to linear,
+  nonlinear and time dependent electrical elements respectively.
+  $\mathbf{b}$ represents the vector corresponding to sources.
+
+\begin{equation}
+\mathbf{A}=  
+\left[ 
+\begin{array}{ccc} 
+0 &0  &1  \\ 
+0 &\widehat{R}_1 &0  \\ 
+1 &0  &0  
+\end{array}
+\right]
+\end{equation} 
+\begin{equation}
+\mathbf{b}=  
+\left[ 
+\begin{array}{c} 
+0  \\ 
+0   \\ 
+V_1  
+\end{array}
+\right]
+\end{equation} 
+\begin{equation}
+\mathbf{D}_f=  
+\left[ 
+\begin{array}{c} 
+D_{1f}  \\ 
+-D_{1f}   \\ 
+0  
+\end{array}
+\right]
+\end{equation} 
+\begin{equation}
+\mathbf{C}=  
+\left[ 
+\begin{array}{ccc} 
+0 &0  &0  \\ 
+0 &C_1 &0  \\ 
+0 &0  &0  
+\end{array}
+\right]
+\end{equation} 
+\begin{equation}
+\mathbf{x}=  
+\left[ 
+\begin{array}{c} 
+v_1   \\ 
+v_2    \\ 
+i_{V_1}  
+\end{array}
+\right]
+\end{equation} 
+\begin{equation}
+\mathbf{\widehat{x}}=  
+\left[ 
+\begin{array}{c} 
+(v_1,v_2)     
+\end{array}
+\right]
+\end{equation} 
+Note that the matrix contains $\widehat{R}$ entries (corresponding to resistors) whose values are equal to 1/$R$\\
+\hrule\vspace{2mm}
+The number of equations are $3$ \\
+Unknowns: \\
+  Node potentials: $2$ Current Variables: $1$ \\
+\hrule\vspace{5mm}
+
+{\bf Operating Point (DC) Analysis: } \\
+{\it All capacitors are open circuited and inductors are short circuited.} 
+\vspace{2mm}
+
+{\bf System of Equations representing the electrical circuit:}
+\begin{equation}
+     i_{V_1} + D_{1f}(v_1,v_2) = 0 
+\end{equation}
+\begin{equation}
+     (R_1)v_2 + -D_{1f}(v_1,v_2) = 0 
+\end{equation}
+\begin{equation}
+     v_1 = V_1
+\end{equation}
+\vspace{2mm}
+$$ D_{nf}(v_a,v_b)=Is_n(1-e^{(v_a-v_b)/vt_n})$$
+ where $Is_n$=reverse saturation current and $vt_n$=threshold voltage of diode $n$\\
+\hrule\vspace{5mm}
+
+{\bf Application of Newton-Raphson method: }\\
+\vspace{2mm}
+{\it Nonliner models: }\\   
+See linearized model for diode $D_1$ in diode\_D1.eps
+\begin{figure}[h]
+\centering
+\includegraphics{diode_D1.eps}
+\caption{linearization of diode $D_1$}
+\end{figure}
+\vspace{2mm}
+
+{\bf System of Equations representing the electrical circuit:}\\
+\begin{equation}
+     (R_{D_1})v_1 + (-R_{D_1})v_2 + i_{V_1} = -i_{D_1} 
+\end{equation}
+\begin{equation}
+    (R_{D_1})v_1 + (R_{D_1}+R_1)v_2 = i_{D_1} 
+\end{equation}
+\begin{equation}
+     v_1 = V_1
+\end{equation}
+\hrule\vspace{5mm}
+
+{\bf Transient Analysis:} \\
+\hrule\vspace{5mm}
+
+{\bf Results:} \\
+\begin{figure}[h]
+\centering
+\includegraphics[scale=0.5]{output.eps}
+\caption{plot}
+\end{figure}
+
+
+\end{document}
+