index
:
FreeEDA/.git
master
Tool for circuit design, simulation, analysis and PCB design (previously known as Oscad)
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
OSCAD
/
LPCSim
/
LUT
/
script.sh
blob: 4397309845a4652088153abdd2265e9072a44928 (
plain
)
1
2
3
4
5
g++ -c -m32 -fPIC ids.cpp -o ids.o g++ -m32 -shared -o libids.so ids.o scilab32 -f ids.sce