diff options
Diffstat (limited to 'library/SubcircuitLibrary/esim_ic_files/sn54als133')
22 files changed, 2345 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/133-cache.lib b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133-cache.lib new file mode 100644 index 00000000..aae6f27a --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133-cache.lib @@ -0,0 +1,110 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# 3_nor +# +DEF 3_nor x 0 40 Y Y 1 F N +F0 "x" 0 0 60 H V C CNN +F1 "3_nor" 0 650 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S 300 500 -200 100 0 1 0 N +X a 1 -400 400 200 R 50 50 1 1 I +X b 2 -400 300 200 R 50 50 1 1 I +X c 3 -400 200 200 R 50 50 1 1 I +X out 4 500 300 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" 0 -100 60 H V C CNN +F1 "d_inverter" 0 150 60 H V C CNN +F2 "" 50 -50 60 H V C CNN +F3 "" 50 -50 60 H V C CNN +DRAW +P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N +X ~ 1 -300 0 200 R 50 50 1 1 I +X ~ 2 300 0 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_nand +# +DEF d_nand U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_nand" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 +A 150 49 100 6 900 0 1 0 N 250 50 150 150 +P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N +X IN1 1 -450 100 200 R 50 50 1 1 I +X IN2 2 -450 0 200 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_nor +# +DEF d_nor U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_nor" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50 +A -25 -124 325 574 323 0 1 0 N 150 150 250 50 +A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50 +P 2 0 1 0 -250 -50 150 -50 N +P 2 0 1 0 -250 150 150 150 N +X IN1 1 -450 100 215 R 50 50 1 1 I +X IN2 2 -450 0 215 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.cir b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.cir new file mode 100644 index 00000000..8cdda3c7 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.cir @@ -0,0 +1,33 @@ +* C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\133\133.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/29/25 16:10:21 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U2 Net-_U1-Pad1_ Net-_U2-Pad2_ d_inverter +U3 Net-_U1-Pad2_ Net-_U3-Pad2_ d_inverter +U4 Net-_U1-Pad3_ Net-_U4-Pad2_ d_inverter +U5 Net-_U1-Pad4_ Net-_U5-Pad2_ d_inverter +U6 Net-_U1-Pad5_ Net-_U6-Pad2_ d_inverter +U7 Net-_U1-Pad6_ Net-_U7-Pad2_ d_inverter +U8 Net-_U1-Pad7_ Net-_U8-Pad2_ d_inverter +U9 Net-_U1-Pad8_ Net-_U9-Pad2_ d_inverter +U10 Net-_U1-Pad9_ Net-_U10-Pad2_ d_inverter +U11 Net-_U1-Pad10_ Net-_U11-Pad2_ d_inverter +U12 Net-_U1-Pad11_ Net-_U12-Pad2_ d_inverter +U13 Net-_U1-Pad12_ Net-_U13-Pad2_ d_inverter +U14 Net-_U1-Pad13_ Net-_U14-Pad2_ d_inverter +x1 Net-_U2-Pad2_ Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U17-Pad1_ 3_nor +x2 Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U7-Pad2_ Net-_U17-Pad2_ 3_nor +x3 Net-_U8-Pad2_ Net-_U9-Pad2_ Net-_U10-Pad2_ Net-_U16-Pad1_ 3_nor +x4 Net-_U11-Pad2_ Net-_U12-Pad2_ Net-_U13-Pad2_ Net-_U16-Pad2_ 3_nor +U15 Net-_U14-Pad2_ Net-_U15-Pad2_ d_inverter +U17 Net-_U17-Pad1_ Net-_U17-Pad2_ Net-_U17-Pad3_ d_nand +U16 Net-_U16-Pad1_ Net-_U16-Pad2_ Net-_U16-Pad3_ d_nand +U18 Net-_U16-Pad3_ Net-_U15-Pad2_ Net-_U18-Pad3_ d_nand +U19 Net-_U17-Pad3_ Net-_U18-Pad3_ Net-_U1-Pad14_ d_nor +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ PORT + +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.cir.out b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.cir.out new file mode 100644 index 00000000..268bc674 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.cir.out @@ -0,0 +1,89 @@ +* c:\users\shanthipriya\desktop\madeeasy\fossee\esim\library\subcircuitlibrary\133\133.cir + +.include 3_nor.sub +* u2 net-_u1-pad1_ net-_u2-pad2_ d_inverter +* u3 net-_u1-pad2_ net-_u3-pad2_ d_inverter +* u4 net-_u1-pad3_ net-_u4-pad2_ d_inverter +* u5 net-_u1-pad4_ net-_u5-pad2_ d_inverter +* u6 net-_u1-pad5_ net-_u6-pad2_ d_inverter +* u7 net-_u1-pad6_ net-_u7-pad2_ d_inverter +* u8 net-_u1-pad7_ net-_u8-pad2_ d_inverter +* u9 net-_u1-pad8_ net-_u9-pad2_ d_inverter +* u10 net-_u1-pad9_ net-_u10-pad2_ d_inverter +* u11 net-_u1-pad10_ net-_u11-pad2_ d_inverter +* u12 net-_u1-pad11_ net-_u12-pad2_ d_inverter +* u13 net-_u1-pad12_ net-_u13-pad2_ d_inverter +* u14 net-_u1-pad13_ net-_u14-pad2_ d_inverter +x1 net-_u2-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u17-pad1_ 3_nor +x2 net-_u5-pad2_ net-_u6-pad2_ net-_u7-pad2_ net-_u17-pad2_ 3_nor +x3 net-_u8-pad2_ net-_u9-pad2_ net-_u10-pad2_ net-_u16-pad1_ 3_nor +x4 net-_u11-pad2_ net-_u12-pad2_ net-_u13-pad2_ net-_u16-pad2_ 3_nor +* u15 net-_u14-pad2_ net-_u15-pad2_ d_inverter +* u17 net-_u17-pad1_ net-_u17-pad2_ net-_u17-pad3_ d_nand +* u16 net-_u16-pad1_ net-_u16-pad2_ net-_u16-pad3_ d_nand +* u18 net-_u16-pad3_ net-_u15-pad2_ net-_u18-pad3_ d_nand +* u19 net-_u17-pad3_ net-_u18-pad3_ net-_u1-pad14_ d_nor +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ port +a1 net-_u1-pad1_ net-_u2-pad2_ u2 +a2 net-_u1-pad2_ net-_u3-pad2_ u3 +a3 net-_u1-pad3_ net-_u4-pad2_ u4 +a4 net-_u1-pad4_ net-_u5-pad2_ u5 +a5 net-_u1-pad5_ net-_u6-pad2_ u6 +a6 net-_u1-pad6_ net-_u7-pad2_ u7 +a7 net-_u1-pad7_ net-_u8-pad2_ u8 +a8 net-_u1-pad8_ net-_u9-pad2_ u9 +a9 net-_u1-pad9_ net-_u10-pad2_ u10 +a10 net-_u1-pad10_ net-_u11-pad2_ u11 +a11 net-_u1-pad11_ net-_u12-pad2_ u12 +a12 net-_u1-pad12_ net-_u13-pad2_ u13 +a13 net-_u1-pad13_ net-_u14-pad2_ u14 +a14 net-_u14-pad2_ net-_u15-pad2_ u15 +a15 [net-_u17-pad1_ net-_u17-pad2_ ] net-_u17-pad3_ u17 +a16 [net-_u16-pad1_ net-_u16-pad2_ ] net-_u16-pad3_ u16 +a17 [net-_u16-pad3_ net-_u15-pad2_ ] net-_u18-pad3_ u18 +a18 [net-_u17-pad3_ net-_u18-pad3_ ] net-_u1-pad14_ u19 +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u11 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u12 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u13 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u14 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u15 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u17 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u16 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u18 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u19 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.pro b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.sch b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.sch new file mode 100644 index 00000000..c5edf351 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.sch @@ -0,0 +1,543 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +LIBS:133-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L d_inverter U2 +U 1 1 68383A91 +P 2750 1550 +F 0 "U2" H 2750 1450 60 0000 C CNN +F 1 "d_inverter" H 2750 1700 60 0000 C CNN +F 2 "" H 2800 1500 60 0000 C CNN +F 3 "" H 2800 1500 60 0000 C CNN + 1 2750 1550 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U3 +U 1 1 68383AAE +P 2750 1950 +F 0 "U3" H 2750 1850 60 0000 C CNN +F 1 "d_inverter" H 2750 2100 60 0000 C CNN +F 2 "" H 2800 1900 60 0000 C CNN +F 3 "" H 2800 1900 60 0000 C CNN + 1 2750 1950 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U4 +U 1 1 68383B0D +P 2750 2300 +F 0 "U4" H 2750 2200 60 0000 C CNN +F 1 "d_inverter" H 2750 2450 60 0000 C CNN +F 2 "" H 2800 2250 60 0000 C CNN +F 3 "" H 2800 2250 60 0000 C CNN + 1 2750 2300 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U5 +U 1 1 68383B13 +P 2750 2700 +F 0 "U5" H 2750 2600 60 0000 C CNN +F 1 "d_inverter" H 2750 2850 60 0000 C CNN +F 2 "" H 2800 2650 60 0000 C CNN +F 3 "" H 2800 2650 60 0000 C CNN + 1 2750 2700 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U6 +U 1 1 68383B95 +P 2750 3050 +F 0 "U6" H 2750 2950 60 0000 C CNN +F 1 "d_inverter" H 2750 3200 60 0000 C CNN +F 2 "" H 2800 3000 60 0000 C CNN +F 3 "" H 2800 3000 60 0000 C CNN + 1 2750 3050 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U7 +U 1 1 68383B9B +P 2750 3450 +F 0 "U7" H 2750 3350 60 0000 C CNN +F 1 "d_inverter" H 2750 3600 60 0000 C CNN +F 2 "" H 2800 3400 60 0000 C CNN +F 3 "" H 2800 3400 60 0000 C CNN + 1 2750 3450 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U8 +U 1 1 68383BA1 +P 2750 3800 +F 0 "U8" H 2750 3700 60 0000 C CNN +F 1 "d_inverter" H 2750 3950 60 0000 C CNN +F 2 "" H 2800 3750 60 0000 C CNN +F 3 "" H 2800 3750 60 0000 C CNN + 1 2750 3800 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U9 +U 1 1 68383BA7 +P 2750 4200 +F 0 "U9" H 2750 4100 60 0000 C CNN +F 1 "d_inverter" H 2750 4350 60 0000 C CNN +F 2 "" H 2800 4150 60 0000 C CNN +F 3 "" H 2800 4150 60 0000 C CNN + 1 2750 4200 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U10 +U 1 1 68383C6C +P 2750 4500 +F 0 "U10" H 2750 4400 60 0000 C CNN +F 1 "d_inverter" H 2750 4650 60 0000 C CNN +F 2 "" H 2800 4450 60 0000 C CNN +F 3 "" H 2800 4450 60 0000 C CNN + 1 2750 4500 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U11 +U 1 1 68383C72 +P 2750 4850 +F 0 "U11" H 2750 4750 60 0000 C CNN +F 1 "d_inverter" H 2750 5000 60 0000 C CNN +F 2 "" H 2800 4800 60 0000 C CNN +F 3 "" H 2800 4800 60 0000 C CNN + 1 2750 4850 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U12 +U 1 1 68383C78 +P 2750 5250 +F 0 "U12" H 2750 5150 60 0000 C CNN +F 1 "d_inverter" H 2750 5400 60 0000 C CNN +F 2 "" H 2800 5200 60 0000 C CNN +F 3 "" H 2800 5200 60 0000 C CNN + 1 2750 5250 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U13 +U 1 1 68383C7E +P 2750 5600 +F 0 "U13" H 2750 5500 60 0000 C CNN +F 1 "d_inverter" H 2750 5750 60 0000 C CNN +F 2 "" H 2800 5550 60 0000 C CNN +F 3 "" H 2800 5550 60 0000 C CNN + 1 2750 5600 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U14 +U 1 1 68383C84 +P 2750 6000 +F 0 "U14" H 2750 5900 60 0000 C CNN +F 1 "d_inverter" H 2750 6150 60 0000 C CNN +F 2 "" H 2800 5950 60 0000 C CNN +F 3 "" H 2800 5950 60 0000 C CNN + 1 2750 6000 + 1 0 0 -1 +$EndComp +$Comp +L 3_nor x1 +U 1 1 68383C99 +P 4200 2200 +F 0 "x1" H 4200 2200 60 0000 C CNN +F 1 "3_nor" H 4200 2850 60 0000 C CNN +F 2 "" H 4200 2200 60 0001 C CNN +F 3 "" H 4200 2200 60 0001 C CNN + 1 4200 2200 + 1 0 0 -1 +$EndComp +$Comp +L 3_nor x2 +U 1 1 68383CF4 +P 4200 3250 +F 0 "x2" H 4200 3250 60 0000 C CNN +F 1 "3_nor" H 4200 3900 60 0000 C CNN +F 2 "" H 4200 3250 60 0001 C CNN +F 3 "" H 4200 3250 60 0001 C CNN + 1 4200 3250 + 1 0 0 -1 +$EndComp +$Comp +L 3_nor x3 +U 1 1 68383DFC +P 4200 4150 +F 0 "x3" H 4200 4150 60 0000 C CNN +F 1 "3_nor" H 4200 4800 60 0000 C CNN +F 2 "" H 4200 4150 60 0001 C CNN +F 3 "" H 4200 4150 60 0001 C CNN + 1 4200 4150 + 1 0 0 -1 +$EndComp +$Comp +L 3_nor x4 +U 1 1 68383E02 +P 4200 5200 +F 0 "x4" H 4200 5200 60 0000 C CNN +F 1 "3_nor" H 4200 5850 60 0000 C CNN +F 2 "" H 4200 5200 60 0001 C CNN +F 3 "" H 4200 5200 60 0001 C CNN + 1 4200 5200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3050 1550 3800 1550 +Wire Wire Line + 3800 1550 3800 1800 +Wire Wire Line + 3050 1950 3800 1950 +Wire Wire Line + 3800 1950 3800 1900 +Wire Wire Line + 3800 2000 3050 2000 +Wire Wire Line + 3050 2000 3050 2300 +Wire Wire Line + 3800 2850 3050 2850 +Wire Wire Line + 3050 2850 3050 2700 +Wire Wire Line + 3800 2950 3050 2950 +Wire Wire Line + 3050 2950 3050 3050 +Wire Wire Line + 3800 3050 3800 3450 +Wire Wire Line + 3800 3450 3050 3450 +Wire Wire Line + 3800 3750 3050 3750 +Wire Wire Line + 3050 3750 3050 3800 +Wire Wire Line + 3800 3850 3200 3850 +Wire Wire Line + 3200 3850 3200 4200 +Wire Wire Line + 3200 4200 3050 4200 +Wire Wire Line + 3800 3950 3800 4500 +Wire Wire Line + 3800 4500 3050 4500 +Wire Wire Line + 3800 4800 3050 4800 +Wire Wire Line + 3050 4800 3050 4850 +Wire Wire Line + 3800 4900 3550 4900 +Wire Wire Line + 3550 4900 3550 5250 +Wire Wire Line + 3550 5250 3050 5250 +Wire Wire Line + 3750 5000 3750 5600 +Wire Wire Line + 3750 5600 3050 5600 +Wire Wire Line + 3750 5000 3800 5000 +$Comp +L d_inverter U15 +U 1 1 68384012 +P 3950 6000 +F 0 "U15" H 3950 5900 60 0000 C CNN +F 1 "d_inverter" H 3950 6150 60 0000 C CNN +F 2 "" H 4000 5950 60 0000 C CNN +F 3 "" H 4000 5950 60 0000 C CNN + 1 3950 6000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3650 6000 3050 6000 +$Comp +L d_nand U17 +U 1 1 683840BF +P 6000 2450 +F 0 "U17" H 6000 2450 60 0000 C CNN +F 1 "d_nand" H 6050 2550 60 0000 C CNN +F 2 "" H 6000 2450 60 0000 C CNN +F 3 "" H 6000 2450 60 0000 C CNN + 1 6000 2450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4700 1900 5550 1900 +Wire Wire Line + 5550 1900 5550 2350 +Wire Wire Line + 5550 2450 5550 2950 +Wire Wire Line + 5550 2950 4700 2950 +$Comp +L d_nand U16 +U 1 1 68384194 +P 5950 4350 +F 0 "U16" H 5950 4350 60 0000 C CNN +F 1 "d_nand" H 6000 4450 60 0000 C CNN +F 2 "" H 5950 4350 60 0000 C CNN +F 3 "" H 5950 4350 60 0000 C CNN + 1 5950 4350 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4700 3850 5500 3850 +Wire Wire Line + 5500 3850 5500 4250 +Wire Wire Line + 5500 4900 5500 4350 +Wire Wire Line + 4700 4900 5500 4900 +$Comp +L d_nand U18 +U 1 1 683842C4 +P 7250 5200 +F 0 "U18" H 7250 5200 60 0000 C CNN +F 1 "d_nand" H 7300 5300 60 0000 C CNN +F 2 "" H 7250 5200 60 0000 C CNN +F 3 "" H 7250 5200 60 0000 C CNN + 1 7250 5200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4250 6000 6800 6000 +Wire Wire Line + 6800 6000 6800 5200 +Wire Wire Line + 6400 4300 6800 4300 +Wire Wire Line + 6800 4300 6800 5100 +$Comp +L d_nor U19 +U 1 1 683843A5 +P 8200 3400 +F 0 "U19" H 8200 3400 60 0000 C CNN +F 1 "d_nor" H 8250 3500 60 0000 C CNN +F 2 "" H 8200 3400 60 0000 C CNN +F 3 "" H 8200 3400 60 0000 C CNN + 1 8200 3400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6450 2400 7750 2400 +Wire Wire Line + 7750 2400 7750 3300 +Wire Wire Line + 7750 3400 7750 5150 +Wire Wire Line + 7750 5150 7700 5150 +Wire Wire Line + 8850 3350 8650 3350 +$Comp +L PORT U1 +U 1 1 6838464D +P 2200 1550 +F 0 "U1" H 2250 1650 30 0000 C CNN +F 1 "PORT" H 2200 1550 30 0000 C CNN +F 2 "" H 2200 1550 60 0000 C CNN +F 3 "" H 2200 1550 60 0000 C CNN + 1 2200 1550 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 683846C4 +P 2200 1950 +F 0 "U1" H 2250 2050 30 0000 C CNN +F 1 "PORT" H 2200 1950 30 0000 C CNN +F 2 "" H 2200 1950 60 0000 C CNN +F 3 "" H 2200 1950 60 0000 C CNN + 2 2200 1950 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 6838471B +P 2200 2300 +F 0 "U1" H 2250 2400 30 0000 C CNN +F 1 "PORT" H 2200 2300 30 0000 C CNN +F 2 "" H 2200 2300 60 0000 C CNN +F 3 "" H 2200 2300 60 0000 C CNN + 3 2200 2300 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 4 1 68384770 +P 2200 2700 +F 0 "U1" H 2250 2800 30 0000 C CNN +F 1 "PORT" H 2200 2700 30 0000 C CNN +F 2 "" H 2200 2700 60 0000 C CNN +F 3 "" H 2200 2700 60 0000 C CNN + 4 2200 2700 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 683847CB +P 2200 3050 +F 0 "U1" H 2250 3150 30 0000 C CNN +F 1 "PORT" H 2200 3050 30 0000 C CNN +F 2 "" H 2200 3050 60 0000 C CNN +F 3 "" H 2200 3050 60 0000 C CNN + 5 2200 3050 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 6 1 6838482C +P 2200 3450 +F 0 "U1" H 2250 3550 30 0000 C CNN +F 1 "PORT" H 2200 3450 30 0000 C CNN +F 2 "" H 2200 3450 60 0000 C CNN +F 3 "" H 2200 3450 60 0000 C CNN + 6 2200 3450 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 7 1 68384893 +P 2200 3800 +F 0 "U1" H 2250 3900 30 0000 C CNN +F 1 "PORT" H 2200 3800 30 0000 C CNN +F 2 "" H 2200 3800 60 0000 C CNN +F 3 "" H 2200 3800 60 0000 C CNN + 7 2200 3800 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 8 1 683848F2 +P 2200 4200 +F 0 "U1" H 2250 4300 30 0000 C CNN +F 1 "PORT" H 2200 4200 30 0000 C CNN +F 2 "" H 2200 4200 60 0000 C CNN +F 3 "" H 2200 4200 60 0000 C CNN + 8 2200 4200 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 9 1 68384955 +P 2200 4500 +F 0 "U1" H 2250 4600 30 0000 C CNN +F 1 "PORT" H 2200 4500 30 0000 C CNN +F 2 "" H 2200 4500 60 0000 C CNN +F 3 "" H 2200 4500 60 0000 C CNN + 9 2200 4500 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 10 1 683849B6 +P 2200 4850 +F 0 "U1" H 2250 4950 30 0000 C CNN +F 1 "PORT" H 2200 4850 30 0000 C CNN +F 2 "" H 2200 4850 60 0000 C CNN +F 3 "" H 2200 4850 60 0000 C CNN + 10 2200 4850 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 11 1 68384A21 +P 2200 5250 +F 0 "U1" H 2250 5350 30 0000 C CNN +F 1 "PORT" H 2200 5250 30 0000 C CNN +F 2 "" H 2200 5250 60 0000 C CNN +F 3 "" H 2200 5250 60 0000 C CNN + 11 2200 5250 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 12 1 68384A8A +P 2200 5600 +F 0 "U1" H 2250 5700 30 0000 C CNN +F 1 "PORT" H 2200 5600 30 0000 C CNN +F 2 "" H 2200 5600 60 0000 C CNN +F 3 "" H 2200 5600 60 0000 C CNN + 12 2200 5600 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 13 1 68384AFD +P 2200 6000 +F 0 "U1" H 2250 6100 30 0000 C CNN +F 1 "PORT" H 2200 6000 30 0000 C CNN +F 2 "" H 2200 6000 60 0000 C CNN +F 3 "" H 2200 6000 60 0000 C CNN + 13 2200 6000 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 14 1 68384B6A +P 9100 3350 +F 0 "U1" H 9150 3450 30 0000 C CNN +F 1 "PORT" H 9100 3350 30 0000 C CNN +F 2 "" H 9100 3350 60 0000 C CNN +F 3 "" H 9100 3350 60 0000 C CNN + 14 9100 3350 + -1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.sub b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.sub new file mode 100644 index 00000000..03f01494 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133.sub @@ -0,0 +1,83 @@ +* Subcircuit 133 +.subckt 133 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ +* c:\users\shanthipriya\desktop\madeeasy\fossee\esim\library\subcircuitlibrary\133\133.cir +.include 3_nor.sub +* u2 net-_u1-pad1_ net-_u2-pad2_ d_inverter +* u3 net-_u1-pad2_ net-_u3-pad2_ d_inverter +* u4 net-_u1-pad3_ net-_u4-pad2_ d_inverter +* u5 net-_u1-pad4_ net-_u5-pad2_ d_inverter +* u6 net-_u1-pad5_ net-_u6-pad2_ d_inverter +* u7 net-_u1-pad6_ net-_u7-pad2_ d_inverter +* u8 net-_u1-pad7_ net-_u8-pad2_ d_inverter +* u9 net-_u1-pad8_ net-_u9-pad2_ d_inverter +* u10 net-_u1-pad9_ net-_u10-pad2_ d_inverter +* u11 net-_u1-pad10_ net-_u11-pad2_ d_inverter +* u12 net-_u1-pad11_ net-_u12-pad2_ d_inverter +* u13 net-_u1-pad12_ net-_u13-pad2_ d_inverter +* u14 net-_u1-pad13_ net-_u14-pad2_ d_inverter +x1 net-_u2-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u17-pad1_ 3_nor +x2 net-_u5-pad2_ net-_u6-pad2_ net-_u7-pad2_ net-_u17-pad2_ 3_nor +x3 net-_u8-pad2_ net-_u9-pad2_ net-_u10-pad2_ net-_u16-pad1_ 3_nor +x4 net-_u11-pad2_ net-_u12-pad2_ net-_u13-pad2_ net-_u16-pad2_ 3_nor +* u15 net-_u14-pad2_ net-_u15-pad2_ d_inverter +* u17 net-_u17-pad1_ net-_u17-pad2_ net-_u17-pad3_ d_nand +* u16 net-_u16-pad1_ net-_u16-pad2_ net-_u16-pad3_ d_nand +* u18 net-_u16-pad3_ net-_u15-pad2_ net-_u18-pad3_ d_nand +* u19 net-_u17-pad3_ net-_u18-pad3_ net-_u1-pad14_ d_nor +a1 net-_u1-pad1_ net-_u2-pad2_ u2 +a2 net-_u1-pad2_ net-_u3-pad2_ u3 +a3 net-_u1-pad3_ net-_u4-pad2_ u4 +a4 net-_u1-pad4_ net-_u5-pad2_ u5 +a5 net-_u1-pad5_ net-_u6-pad2_ u6 +a6 net-_u1-pad6_ net-_u7-pad2_ u7 +a7 net-_u1-pad7_ net-_u8-pad2_ u8 +a8 net-_u1-pad8_ net-_u9-pad2_ u9 +a9 net-_u1-pad9_ net-_u10-pad2_ u10 +a10 net-_u1-pad10_ net-_u11-pad2_ u11 +a11 net-_u1-pad11_ net-_u12-pad2_ u12 +a12 net-_u1-pad12_ net-_u13-pad2_ u13 +a13 net-_u1-pad13_ net-_u14-pad2_ u14 +a14 net-_u14-pad2_ net-_u15-pad2_ u15 +a15 [net-_u17-pad1_ net-_u17-pad2_ ] net-_u17-pad3_ u17 +a16 [net-_u16-pad1_ net-_u16-pad2_ ] net-_u16-pad3_ u16 +a17 [net-_u16-pad3_ net-_u15-pad2_ ] net-_u18-pad3_ u18 +a18 [net-_u17-pad3_ net-_u18-pad3_ ] net-_u1-pad14_ u19 +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u11 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u12 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u13 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u14 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u15 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u17 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u16 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u18 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u19 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Control Statements + +.ends 133
\ No newline at end of file diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/133_Previous_Values.xml b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133_Previous_Values.xml new file mode 100644 index 00000000..43acd9ff --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/133_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model><u2 name="type">d_nand<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u2><u3 name="type">d_nand<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u3><u4 name="type">d_nand<field7 name="Enter Rise Delay (default=1.0e-9)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter Input Load (default=1.0e-12)" /></u4><u5 name="type">d_nand<field10 name="Enter Rise Delay (default=1.0e-9)" /><field11 name="Enter Fall Delay (default=1.0e-9)" /><field12 name="Enter Input Load (default=1.0e-12)" /></u5><u6 name="type">d_nand<field13 name="Enter Rise Delay (default=1.0e-9)" /><field14 name="Enter Fall Delay (default=1.0e-9)" /><field15 name="Enter Input Load (default=1.0e-12)" /></u6><u7 name="type">d_nand<field16 name="Enter Rise Delay (default=1.0e-9)" /><field17 name="Enter Fall Delay (default=1.0e-9)" /><field18 name="Enter Input Load (default=1.0e-12)" /></u7><u8 name="type">d_nand<field19 name="Enter Rise Delay (default=1.0e-9)" /><field20 name="Enter Fall Delay (default=1.0e-9)" /><field21 name="Enter Input Load (default=1.0e-12)" /></u8><u9 name="type">d_nand<field22 name="Enter Rise Delay (default=1.0e-9)" /><field23 name="Enter Fall Delay (default=1.0e-9)" /><field24 name="Enter Input Load (default=1.0e-12)" /></u9><u10 name="type">d_nand<field25 name="Enter Rise Delay (default=1.0e-9)" /><field26 name="Enter Fall Delay (default=1.0e-9)" /><field27 name="Enter Input Load (default=1.0e-12)" /></u10><u11 name="type">d_nand<field28 name="Enter Rise Delay (default=1.0e-9)" /><field29 name="Enter Fall Delay (default=1.0e-9)" /><field30 name="Enter Input Load (default=1.0e-12)" /></u11><u12 name="type">d_nand<field31 name="Enter Rise Delay (default=1.0e-9)" /><field32 name="Enter Fall Delay (default=1.0e-9)" /><field33 name="Enter Input Load (default=1.0e-12)" /></u12><u13 name="type">d_nand<field34 name="Enter Rise Delay (default=1.0e-9)" /><field35 name="Enter Fall Delay (default=1.0e-9)" /><field36 name="Enter Input Load (default=1.0e-12)" /></u13><u14 name="type">d_nand<field37 name="Enter Rise Delay (default=1.0e-9)" /><field38 name="Enter Fall Delay (default=1.0e-9)" /><field39 name="Enter Input Load (default=1.0e-12)" /></u14><u2 name="type">d_inverter<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u2><u3 name="type">d_inverter<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u3><u4 name="type">d_inverter<field7 name="Enter Rise Delay (default=1.0e-9)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter Input Load (default=1.0e-12)" /></u4><u5 name="type">d_inverter<field10 name="Enter Rise Delay (default=1.0e-9)" /><field11 name="Enter Fall Delay (default=1.0e-9)" /><field12 name="Enter Input Load (default=1.0e-12)" /></u5><u6 name="type">d_inverter<field13 name="Enter Rise Delay (default=1.0e-9)" /><field14 name="Enter Fall Delay (default=1.0e-9)" /><field15 name="Enter Input Load (default=1.0e-12)" /></u6><u7 name="type">d_inverter<field16 name="Enter Rise Delay (default=1.0e-9)" /><field17 name="Enter Fall Delay (default=1.0e-9)" /><field18 name="Enter Input Load (default=1.0e-12)" /></u7><u8 name="type">d_inverter<field19 name="Enter Rise Delay (default=1.0e-9)" /><field20 name="Enter Fall Delay (default=1.0e-9)" /><field21 name="Enter Input Load (default=1.0e-12)" /></u8><u9 name="type">d_inverter<field22 name="Enter Rise Delay (default=1.0e-9)" /><field23 name="Enter Fall Delay (default=1.0e-9)" /><field24 name="Enter Input Load (default=1.0e-12)" /></u9><u10 name="type">d_inverter<field25 name="Enter Rise Delay (default=1.0e-9)" /><field26 name="Enter Fall Delay (default=1.0e-9)" /><field27 name="Enter Input Load (default=1.0e-12)" /></u10><u11 name="type">d_inverter<field28 name="Enter Rise Delay (default=1.0e-9)" /><field29 name="Enter Fall Delay (default=1.0e-9)" /><field30 name="Enter Input Load (default=1.0e-12)" /></u11><u12 name="type">d_inverter<field31 name="Enter Rise Delay (default=1.0e-9)" /><field32 name="Enter Fall Delay (default=1.0e-9)" /><field33 name="Enter Input Load (default=1.0e-12)" /></u12><u13 name="type">d_inverter<field34 name="Enter Rise Delay (default=1.0e-9)" /><field35 name="Enter Fall Delay (default=1.0e-9)" /><field36 name="Enter Input Load (default=1.0e-12)" /></u13><u14 name="type">d_inverter<field37 name="Enter Rise Delay (default=1.0e-9)" /><field38 name="Enter Fall Delay (default=1.0e-9)" /><field39 name="Enter Input Load (default=1.0e-12)" /></u14><u15 name="type">d_inverter<field40 name="Enter Rise Delay (default=1.0e-9)" /><field41 name="Enter Fall Delay (default=1.0e-9)" /><field42 name="Enter Input Load (default=1.0e-12)" /></u15><u17 name="type">d_nand<field43 name="Enter Rise Delay (default=1.0e-9)" /><field44 name="Enter Fall Delay (default=1.0e-9)" /><field45 name="Enter Input Load (default=1.0e-12)" /></u17><u16 name="type">d_nand<field46 name="Enter Rise Delay (default=1.0e-9)" /><field47 name="Enter Fall Delay (default=1.0e-9)" /><field48 name="Enter Input Load (default=1.0e-12)" /></u16><u18 name="type">d_nand<field49 name="Enter Rise Delay (default=1.0e-9)" /><field50 name="Enter Fall Delay (default=1.0e-9)" /><field51 name="Enter Input Load (default=1.0e-12)" /></u18><u19 name="type">d_nor<field52 name="Enter Rise Delay (default=1.0e-9)" /><field53 name="Enter Fall Delay (default=1.0e-9)" /><field54 name="Enter Input Load (default=1.0e-12)" /></u19><u20 name="type">d_inverter<field55 name="Enter Rise Delay (default=1.0e-9)" /><field56 name="Enter Fall Delay (default=1.0e-9)" /><field57 name="Enter Input Load (default=1.0e-12)" /></u20></model><devicemodel /><subcircuit><x1><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\3_nor</field></x1><x2><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\3_nor</field></x2><x3><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\3_nor</field></x3><x4><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\3_nor</field></x4></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor-cache.lib b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor-cache.lib new file mode 100644 index 00000000..40b8ccac --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor-cache.lib @@ -0,0 +1,63 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# d_nor +# +DEF d_nor U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_nor" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50 +A -25 -124 325 574 323 0 1 0 N 150 150 250 50 +A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50 +P 2 0 1 0 -250 -50 150 -50 N +P 2 0 1 0 -250 150 150 150 N +X IN1 1 -450 100 215 R 50 50 1 1 I +X IN2 2 -450 0 215 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.cir b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.cir new file mode 100644 index 00000000..a5ff5883 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.cir @@ -0,0 +1,13 @@ +* C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\3_nor\3_nor.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 04/02/25 10:13:28 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U2 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_nor +U3 Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_nor +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT + +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.cir.out b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.cir.out new file mode 100644 index 00000000..e99531ee --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.cir.out @@ -0,0 +1,20 @@ +* c:\users\shanthipriya\desktop\madeeasy\fossee\esim\library\subcircuitlibrary\3_nor\3_nor.cir + +* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_nor +* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_nor +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port +a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 +a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3 +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u2 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u3 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.pro b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.sch b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.sch new file mode 100644 index 00000000..de763f58 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.sch @@ -0,0 +1,128 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L d_nor U2 +U 1 1 67ECC038 +P 5250 3400 +F 0 "U2" H 5250 3400 60 0000 C CNN +F 1 "d_nor" H 5300 3500 60 0000 C CNN +F 2 "" H 5250 3400 60 0000 C CNN +F 3 "" H 5250 3400 60 0000 C CNN + 1 5250 3400 + 1 0 0 -1 +$EndComp +$Comp +L d_nor U3 +U 1 1 67ECC07F +P 6150 3450 +F 0 "U3" H 6150 3450 60 0000 C CNN +F 1 "d_nor" H 6200 3550 60 0000 C CNN +F 2 "" H 6150 3450 60 0000 C CNN +F 3 "" H 6150 3450 60 0000 C CNN + 1 6150 3450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5700 3450 5550 3450 +Wire Wire Line + 5550 3450 5550 3500 +Wire Wire Line + 5550 3500 4800 3500 +$Comp +L PORT U1 +U 1 1 67ECC0BA +P 4550 3300 +F 0 "U1" H 4600 3400 30 0000 C CNN +F 1 "PORT" H 4550 3300 30 0000 C CNN +F 2 "" H 4550 3300 60 0000 C CNN +F 3 "" H 4550 3300 60 0000 C CNN + 1 4550 3300 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 67ECC0FF +P 4550 3400 +F 0 "U1" H 4600 3500 30 0000 C CNN +F 1 "PORT" H 4550 3400 30 0000 C CNN +F 2 "" H 4550 3400 60 0000 C CNN +F 3 "" H 4550 3400 60 0000 C CNN + 2 4550 3400 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 67ECC12C +P 4550 3500 +F 0 "U1" H 4600 3600 30 0000 C CNN +F 1 "PORT" H 4550 3500 30 0000 C CNN +F 2 "" H 4550 3500 60 0000 C CNN +F 3 "" H 4550 3500 60 0000 C CNN + 3 4550 3500 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 4 1 67ECC14F +P 6850 3400 +F 0 "U1" H 6900 3500 30 0000 C CNN +F 1 "PORT" H 6850 3400 30 0000 C CNN +F 2 "" H 6850 3400 60 0000 C CNN +F 3 "" H 6850 3400 60 0000 C CNN + 4 6850 3400 + -1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.sub b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.sub new file mode 100644 index 00000000..3d3a66d3 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor.sub @@ -0,0 +1,14 @@ +* Subcircuit 3_nor +.subckt 3_nor net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ +* c:\users\shanthipriya\desktop\madeeasy\fossee\esim\library\subcircuitlibrary\3_nor\3_nor.cir +* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_nor +* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_nor +a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 +a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3 +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u2 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u3 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Control Statements + +.ends 3_nor
\ No newline at end of file diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor_Previous_Values.xml b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor_Previous_Values.xml new file mode 100644 index 00000000..61fd0102 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/3_nor_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis><source /><model><u2 name="type">d_nor<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u2><u3 name="type">d_nor<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u3></model><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/analysis b/library/SubcircuitLibrary/esim_ic_files/sn54als133/analysis new file mode 100644 index 00000000..cd8a1c8d --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/analysis @@ -0,0 +1 @@ +.tran 1e-09 50e-06 0e-00
\ No newline at end of file diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133-cache.lib b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133-cache.lib new file mode 100644 index 00000000..f3686e38 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133-cache.lib @@ -0,0 +1,143 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# 133 +# +DEF 133 X 0 40 Y Y 1 F N +F0 "X" -100 -800 60 H V C CNN +F1 "133" -150 600 60 H V C CNN +F2 "" -150 600 60 H I C CNN +F3 "" -150 600 60 H I C CNN +DRAW +S 100 550 -350 -750 0 1 0 N +X A1 1 -550 500 200 R 50 50 1 1 I +X A2 2 -550 400 200 R 50 50 1 1 I +X A3 3 -550 300 200 R 50 50 1 1 I +X A4 4 -550 200 200 R 50 50 1 1 I +X A5 5 -550 100 200 R 50 50 1 1 I +X A6 6 -550 0 200 R 50 50 1 1 I +X A7 7 -550 -100 200 R 50 50 1 1 I +X A8 8 -550 -200 200 R 50 50 1 1 I +X A9 9 -550 -300 200 R 50 50 1 1 I +X A10 10 -550 -400 200 R 50 50 1 1 I +X A11 11 -550 -500 200 R 50 50 1 1 I +X A12 12 -550 -600 200 R 50 50 1 1 I +X A13 13 -550 -700 200 R 50 50 1 1 I +X OUT 14 300 -100 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# adc_bridge_5 +# +DEF adc_bridge_5 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "adc_bridge_5" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -400 200 350 -400 0 1 0 N +X IN1 1 -600 50 200 R 50 50 1 1 I +X IN2 2 -600 -50 200 R 50 50 1 1 I +X IN3 3 -600 -150 200 R 50 50 1 1 I +X IN4 4 -600 -250 200 R 50 50 1 1 I +X IN5 5 -600 -350 200 R 50 50 1 1 I +X OUT1 6 550 50 200 L 50 50 1 1 O +X OUT2 7 550 -50 200 L 50 50 1 1 O +X OUT3 8 550 -150 200 L 50 50 1 1 O +X OUT4 9 550 -250 200 L 50 50 1 1 O +X OUT5 10 550 -350 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# adc_bridge_8 +# +DEF adc_bridge_8 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "adc_bridge_8" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -400 200 350 -700 0 1 0 N +X IN1 1 -600 50 200 R 50 50 1 1 I +X IN2 2 -600 -50 200 R 50 50 1 1 I +X IN3 3 -600 -150 200 R 50 50 1 1 I +X IN4 4 -600 -250 200 R 50 50 1 1 I +X IN5 5 -600 -350 200 R 50 50 1 1 I +X IN6 6 -600 -450 200 R 50 50 1 1 I +X IN7 7 -600 -550 200 R 50 50 1 1 I +X IN8 8 -600 -650 200 R 50 50 1 1 I +X OUT1 9 550 50 200 L 50 50 1 1 O +X OUT2 10 550 -50 200 L 50 50 1 1 O +X OUT3 11 550 -150 200 L 50 50 1 1 O +X OUT4 12 550 -250 200 L 50 50 1 1 O +X OUT5 13 550 -350 200 L 50 50 1 1 O +X OUT6 14 550 -450 200 L 50 50 1 1 O +X OUT7 15 550 -550 200 L 50 50 1 1 O +X OUT8 16 550 -650 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# dac_bridge_1 +# +DEF dac_bridge_1 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "dac_bridge_1" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -400 200 350 -50 0 1 0 N +X IN1 1 -600 50 200 R 50 50 1 1 I +X OUT1 2 550 50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# plot_v1 +# +DEF plot_v1 U 0 40 Y Y 1 F N +F0 "U" 0 500 60 H V C CNN +F1 "plot_v1" 200 350 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 0 500 100 0 1 0 N +X ~ ~ 0 200 200 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.cir b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.cir new file mode 100644 index 00000000..4fd11a16 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.cir @@ -0,0 +1,41 @@ +* C:\Users\Shanthipriya\eSim-Workspace\13_nand_ic5\13_nand_ic5.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/29/25 16:11:34 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U9 A1 A2 A3 A4 A5 A6 A7 A8 Net-_U9-Pad9_ Net-_U9-Pad10_ Net-_U9-Pad11_ Net-_U9-Pad12_ Net-_U9-Pad13_ Net-_U9-Pad14_ Net-_U9-Pad15_ Net-_U9-Pad16_ adc_bridge_8 +U13 Net-_U13-Pad1_ OUT dac_bridge_1 +v1 A1 GND pulse +v2 A2 GND pulse +v3 A3 GND pulse +v4 A4 GND pulse +v5 A5 GND pulse +v6 A6 GND pulse +v7 A7 GND pulse +v8 A8 GND pulse +U17 OUT plot_v1 +U1 A1 plot_v1 +U2 A2 plot_v1 +U3 A3 plot_v1 +U4 A4 plot_v1 +U5 A5 plot_v1 +U6 A6 plot_v1 +U7 A7 plot_v1 +U8 A8 plot_v1 +U10 A9 A10 A11 A12 A13 Net-_U10-Pad6_ Net-_U10-Pad7_ Net-_U10-Pad8_ Net-_U10-Pad9_ Net-_U10-Pad10_ adc_bridge_5 +v9 A9 GND pulse +v10 A10 GND pulse +v11 A11 GND pulse +v12 A12 GND pulse +v13 A13 GND pulse +U11 A13 plot_v1 +U12 A12 plot_v1 +U14 A11 plot_v1 +U15 A10 plot_v1 +U16 A9 plot_v1 +X1 Net-_U9-Pad9_ Net-_U9-Pad10_ Net-_U9-Pad11_ Net-_U9-Pad12_ Net-_U9-Pad13_ Net-_U9-Pad14_ Net-_U9-Pad15_ Net-_U9-Pad16_ Net-_U10-Pad6_ Net-_U10-Pad7_ Net-_U10-Pad8_ Net-_U10-Pad9_ Net-_U10-Pad10_ Net-_U13-Pad1_ 133 + +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.cir.out b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.cir.out new file mode 100644 index 00000000..22f9594a --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.cir.out @@ -0,0 +1,53 @@ +* c:\users\shanthipriya\esim-workspace\13_nand_ic5\13_nand_ic5.cir + +.include 133.sub +* u9 a1 a2 a3 a4 a5 a6 a7 a8 net-_u9-pad9_ net-_u9-pad10_ net-_u9-pad11_ net-_u9-pad12_ net-_u9-pad13_ net-_u9-pad14_ net-_u9-pad15_ net-_u9-pad16_ adc_bridge_8 +* u13 net-_u13-pad1_ out dac_bridge_1 +v1 a1 gnd pulse(0 5 0 1n 1n 1u 2u) +v2 a2 gnd pulse(0 5 0 1n 1n 2u 4u) +v3 a3 gnd pulse(0 5 0 1n 1n 4u 8u) +v4 a4 gnd pulse(0 5 0 1n 1n 8u 16u) +v5 a5 gnd pulse(0 5 0 1n 1n 16u 32u) +v6 a6 gnd pulse(0 5 0 1n 1n 32u 64u) +v7 a7 gnd pulse(0 5 0 1n 1n 64u 128u) +v8 a8 gnd pulse(0 5 0 1n 1n 128u 256u) +* u17 out plot_v1 +* u1 a1 plot_v1 +* u2 a2 plot_v1 +* u3 a3 plot_v1 +* u4 a4 plot_v1 +* u5 a5 plot_v1 +* u6 a6 plot_v1 +* u7 a7 plot_v1 +* u8 a8 plot_v1 +* u10 a9 a10 a11 a12 a13 net-_u10-pad6_ net-_u10-pad7_ net-_u10-pad8_ net-_u10-pad9_ net-_u10-pad10_ adc_bridge_5 +v9 a9 gnd pulse(0 5 0 1n 1n 256u 512u) +v10 a10 gnd pulse(0 5 0 1n 1n 512u 1024u) +v11 a11 gnd pulse(0 5 0 1n 1n 1024u 2048u) +v12 a12 gnd pulse(0 5 0 1n 1n 2048u 4096u) +v13 a13 gnd pulse(0 5 0 1n 1n 4096u 16192u) +* u11 a13 plot_v1 +* u12 a12 plot_v1 +* u14 a11 plot_v1 +* u15 a10 plot_v1 +* u16 a9 plot_v1 +x1 net-_u9-pad9_ net-_u9-pad10_ net-_u9-pad11_ net-_u9-pad12_ net-_u9-pad13_ net-_u9-pad14_ net-_u9-pad15_ net-_u9-pad16_ net-_u10-pad6_ net-_u10-pad7_ net-_u10-pad8_ net-_u10-pad9_ net-_u10-pad10_ net-_u13-pad1_ 133 +a1 [a1 a2 a3 a4 a5 a6 a7 a8 ] [net-_u9-pad9_ net-_u9-pad10_ net-_u9-pad11_ net-_u9-pad12_ net-_u9-pad13_ net-_u9-pad14_ net-_u9-pad15_ net-_u9-pad16_ ] u9 +a2 [net-_u13-pad1_ ] [out ] u13 +a3 [a9 a10 a11 a12 a13 ] [net-_u10-pad6_ net-_u10-pad7_ net-_u10-pad8_ net-_u10-pad9_ net-_u10-pad10_ ] u10 +* Schematic Name: adc_bridge_8, NgSpice Name: adc_bridge +.model u9 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) +* Schematic Name: dac_bridge_1, NgSpice Name: dac_bridge +.model u13 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) +* Schematic Name: adc_bridge_5, NgSpice Name: adc_bridge +.model u10 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) +.tran 1e-09 50e-06 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +plot v(out)+6 v(a1)+12v(a2)+18v(a3)+24 v(a4)+30 v(a5)+36 v(a6)+42 v(a7)+48 v(a8)+54 v(a13)+60 v(a12)+66 v(a11)+72 v(a10)+78 v(a9) +.endc +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.pro b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.proj b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.proj new file mode 100644 index 00000000..05f0892c --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.proj @@ -0,0 +1 @@ +schematicFile 13_nand_ic5.sch diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.sch b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.sch new file mode 100644 index 00000000..0467bf1e --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133.sch @@ -0,0 +1,788 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +LIBS:13_nand_ic5-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L adc_bridge_8 U9 +U 1 1 6838141D +P 4800 1650 +F 0 "U9" H 4800 1650 60 0000 C CNN +F 1 "adc_bridge_8" H 4800 1800 60 0000 C CNN +F 2 "" H 4800 1650 60 0000 C CNN +F 3 "" H 4800 1650 60 0000 C CNN + 1 4800 1650 + 1 0 0 -1 +$EndComp +$Comp +L dac_bridge_1 U13 +U 1 1 6838141E +P 6800 2250 +F 0 "U13" H 6800 2250 60 0000 C CNN +F 1 "dac_bridge_1" H 6800 2400 60 0000 C CNN +F 2 "" H 6800 2250 60 0000 C CNN +F 3 "" H 6800 2250 60 0000 C CNN + 1 6800 2250 + 1 0 0 -1 +$EndComp +$Comp +L pulse v1 +U 1 1 6838141F +P 800 4300 +F 0 "v1" H 600 4400 60 0000 C CNN +F 1 "pulse" H 600 4250 60 0000 C CNN +F 2 "R1" H 500 4300 60 0000 C CNN +F 3 "" H 800 4300 60 0000 C CNN + 1 800 4300 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 68381420 +P 800 5100 +F 0 "#PWR01" H 800 4850 50 0001 C CNN +F 1 "GND" H 800 4950 50 0000 C CNN +F 2 "" H 800 5100 50 0001 C CNN +F 3 "" H 800 5100 50 0001 C CNN + 1 800 5100 + 1 0 0 -1 +$EndComp +$Comp +L pulse v2 +U 1 1 68381421 +P 1200 4550 +F 0 "v2" H 1000 4650 60 0000 C CNN +F 1 "pulse" H 1000 4500 60 0000 C CNN +F 2 "R1" H 900 4550 60 0000 C CNN +F 3 "" H 1200 4550 60 0000 C CNN + 1 1200 4550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 68381422 +P 1200 5350 +F 0 "#PWR02" H 1200 5100 50 0001 C CNN +F 1 "GND" H 1200 5200 50 0000 C CNN +F 2 "" H 1200 5350 50 0001 C CNN +F 3 "" H 1200 5350 50 0001 C CNN + 1 1200 5350 + 1 0 0 -1 +$EndComp +$Comp +L pulse v3 +U 1 1 68381423 +P 1700 4300 +F 0 "v3" H 1500 4400 60 0000 C CNN +F 1 "pulse" H 1500 4250 60 0000 C CNN +F 2 "R1" H 1400 4300 60 0000 C CNN +F 3 "" H 1700 4300 60 0000 C CNN + 1 1700 4300 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 68381424 +P 1700 5100 +F 0 "#PWR03" H 1700 4850 50 0001 C CNN +F 1 "GND" H 1700 4950 50 0000 C CNN +F 2 "" H 1700 5100 50 0001 C CNN +F 3 "" H 1700 5100 50 0001 C CNN + 1 1700 5100 + 1 0 0 -1 +$EndComp +$Comp +L pulse v4 +U 1 1 68381425 +P 2100 4550 +F 0 "v4" H 1900 4650 60 0000 C CNN +F 1 "pulse" H 1900 4500 60 0000 C CNN +F 2 "R1" H 1800 4550 60 0000 C CNN +F 3 "" H 2100 4550 60 0000 C CNN + 1 2100 4550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 68381426 +P 2100 5350 +F 0 "#PWR04" H 2100 5100 50 0001 C CNN +F 1 "GND" H 2100 5200 50 0000 C CNN +F 2 "" H 2100 5350 50 0001 C CNN +F 3 "" H 2100 5350 50 0001 C CNN + 1 2100 5350 + 1 0 0 -1 +$EndComp +$Comp +L pulse v5 +U 1 1 68381427 +P 2500 4200 +F 0 "v5" H 2300 4300 60 0000 C CNN +F 1 "pulse" H 2300 4150 60 0000 C CNN +F 2 "R1" H 2200 4200 60 0000 C CNN +F 3 "" H 2500 4200 60 0000 C CNN + 1 2500 4200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR05 +U 1 1 68381428 +P 2500 5000 +F 0 "#PWR05" H 2500 4750 50 0001 C CNN +F 1 "GND" H 2500 4850 50 0000 C CNN +F 2 "" H 2500 5000 50 0001 C CNN +F 3 "" H 2500 5000 50 0001 C CNN + 1 2500 5000 + 1 0 0 -1 +$EndComp +$Comp +L pulse v6 +U 1 1 68381429 +P 2900 4450 +F 0 "v6" H 2700 4550 60 0000 C CNN +F 1 "pulse" H 2700 4400 60 0000 C CNN +F 2 "R1" H 2600 4450 60 0000 C CNN +F 3 "" H 2900 4450 60 0000 C CNN + 1 2900 4450 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR06 +U 1 1 6838142A +P 2900 5250 +F 0 "#PWR06" H 2900 5000 50 0001 C CNN +F 1 "GND" H 2900 5100 50 0000 C CNN +F 2 "" H 2900 5250 50 0001 C CNN +F 3 "" H 2900 5250 50 0001 C CNN + 1 2900 5250 + 1 0 0 -1 +$EndComp +$Comp +L pulse v7 +U 1 1 6838142B +P 3400 4200 +F 0 "v7" H 3200 4300 60 0000 C CNN +F 1 "pulse" H 3200 4150 60 0000 C CNN +F 2 "R1" H 3100 4200 60 0000 C CNN +F 3 "" H 3400 4200 60 0000 C CNN + 1 3400 4200 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR07 +U 1 1 6838142C +P 3400 5000 +F 0 "#PWR07" H 3400 4750 50 0001 C CNN +F 1 "GND" H 3400 4850 50 0000 C CNN +F 2 "" H 3400 5000 50 0001 C CNN +F 3 "" H 3400 5000 50 0001 C CNN + 1 3400 5000 + 1 0 0 -1 +$EndComp +$Comp +L pulse v8 +U 1 1 6838142D +P 3800 4450 +F 0 "v8" H 3600 4550 60 0000 C CNN +F 1 "pulse" H 3600 4400 60 0000 C CNN +F 2 "R1" H 3500 4450 60 0000 C CNN +F 3 "" H 3800 4450 60 0000 C CNN + 1 3800 4450 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR08 +U 1 1 6838142E +P 3800 5250 +F 0 "#PWR08" H 3800 5000 50 0001 C CNN +F 1 "GND" H 3800 5100 50 0000 C CNN +F 2 "" H 3800 5250 50 0001 C CNN +F 3 "" H 3800 5250 50 0001 C CNN + 1 3800 5250 + 1 0 0 -1 +$EndComp +Text GLabel 600 1350 0 60 Input ~ 0 +A1 +Text GLabel 1050 1350 0 60 Input ~ 0 +A2 +Text GLabel 1500 1400 0 60 Input ~ 0 +A3 +Text GLabel 1900 1400 0 60 Input ~ 0 +A4 +Text GLabel 2300 1400 0 60 Input ~ 0 +A5 +Text GLabel 2800 1400 0 60 Input ~ 0 +A6 +Text GLabel 3200 1450 0 60 Input ~ 0 +A7 +Text GLabel 3550 1450 0 60 Input ~ 0 +A8 +$Comp +L plot_v1 U17 +U 1 1 6838142F +P 8450 2300 +F 0 "U17" H 8450 2800 60 0000 C CNN +F 1 "plot_v1" H 8650 2650 60 0000 C CNN +F 2 "" H 8450 2300 60 0000 C CNN +F 3 "" H 8450 2300 60 0000 C CNN + 1 8450 2300 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U1 +U 1 1 68381430 +P 800 1200 +F 0 "U1" H 800 1700 60 0000 C CNN +F 1 "plot_v1" H 1000 1550 60 0000 C CNN +F 2 "" H 800 1200 60 0000 C CNN +F 3 "" H 800 1200 60 0000 C CNN + 1 800 1200 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U2 +U 1 1 68381431 +P 1250 1200 +F 0 "U2" H 1250 1700 60 0000 C CNN +F 1 "plot_v1" H 1450 1550 60 0000 C CNN +F 2 "" H 1250 1200 60 0000 C CNN +F 3 "" H 1250 1200 60 0000 C CNN + 1 1250 1200 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U3 +U 1 1 68381432 +P 1700 1250 +F 0 "U3" H 1700 1750 60 0000 C CNN +F 1 "plot_v1" H 1900 1600 60 0000 C CNN +F 2 "" H 1700 1250 60 0000 C CNN +F 3 "" H 1700 1250 60 0000 C CNN + 1 1700 1250 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U4 +U 1 1 68381433 +P 2100 1250 +F 0 "U4" H 2100 1750 60 0000 C CNN +F 1 "plot_v1" H 2300 1600 60 0000 C CNN +F 2 "" H 2100 1250 60 0000 C CNN +F 3 "" H 2100 1250 60 0000 C CNN + 1 2100 1250 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U5 +U 1 1 68381434 +P 2550 1250 +F 0 "U5" H 2550 1750 60 0000 C CNN +F 1 "plot_v1" H 2750 1600 60 0000 C CNN +F 2 "" H 2550 1250 60 0000 C CNN +F 3 "" H 2550 1250 60 0000 C CNN + 1 2550 1250 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U6 +U 1 1 68381435 +P 3000 1300 +F 0 "U6" H 3000 1800 60 0000 C CNN +F 1 "plot_v1" H 3200 1650 60 0000 C CNN +F 2 "" H 3000 1300 60 0000 C CNN +F 3 "" H 3000 1300 60 0000 C CNN + 1 3000 1300 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U7 +U 1 1 68381436 +P 3350 1250 +F 0 "U7" H 3350 1750 60 0000 C CNN +F 1 "plot_v1" H 3550 1600 60 0000 C CNN +F 2 "" H 3350 1250 60 0000 C CNN +F 3 "" H 3350 1250 60 0000 C CNN + 1 3350 1250 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U8 +U 1 1 68381437 +P 3800 1300 +F 0 "U8" H 3800 1800 60 0000 C CNN +F 1 "plot_v1" H 4000 1650 60 0000 C CNN +F 2 "" H 3800 1300 60 0000 C CNN +F 3 "" H 3800 1300 60 0000 C CNN + 1 3800 1300 + 1 0 0 -1 +$EndComp +Text GLabel 7600 1850 0 60 Input ~ 0 +OUT +$Comp +L adc_bridge_5 U10 +U 1 1 68381D7E +P 5000 3350 +F 0 "U10" H 5000 3350 60 0000 C CNN +F 1 "adc_bridge_5" H 5000 3500 60 0000 C CNN +F 2 "" H 5000 3350 60 0000 C CNN +F 3 "" H 5000 3350 60 0000 C CNN + 1 5000 3350 + 0 -1 -1 0 +$EndComp +$Comp +L pulse v9 +U 1 1 68381FF4 +P 4550 6350 +F 0 "v9" H 4350 6450 60 0000 C CNN +F 1 "pulse" H 4350 6300 60 0000 C CNN +F 2 "R1" H 4250 6350 60 0000 C CNN +F 3 "" H 4550 6350 60 0000 C CNN + 1 4550 6350 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR09 +U 1 1 68381FFA +P 4550 7150 +F 0 "#PWR09" H 4550 6900 50 0001 C CNN +F 1 "GND" H 4550 7000 50 0000 C CNN +F 2 "" H 4550 7150 50 0001 C CNN +F 3 "" H 4550 7150 50 0001 C CNN + 1 4550 7150 + 1 0 0 -1 +$EndComp +$Comp +L pulse v10 +U 1 1 68382001 +P 4950 6000 +F 0 "v10" H 4750 6100 60 0000 C CNN +F 1 "pulse" H 4750 5950 60 0000 C CNN +F 2 "R1" H 4650 6000 60 0000 C CNN +F 3 "" H 4950 6000 60 0000 C CNN + 1 4950 6000 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR010 +U 1 1 68382007 +P 4950 6800 +F 0 "#PWR010" H 4950 6550 50 0001 C CNN +F 1 "GND" H 4950 6650 50 0000 C CNN +F 2 "" H 4950 6800 50 0001 C CNN +F 3 "" H 4950 6800 50 0001 C CNN + 1 4950 6800 + 1 0 0 -1 +$EndComp +$Comp +L pulse v11 +U 1 1 6838200E +P 5350 6250 +F 0 "v11" H 5150 6350 60 0000 C CNN +F 1 "pulse" H 5150 6200 60 0000 C CNN +F 2 "R1" H 5050 6250 60 0000 C CNN +F 3 "" H 5350 6250 60 0000 C CNN + 1 5350 6250 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR011 +U 1 1 68382014 +P 5350 7050 +F 0 "#PWR011" H 5350 6800 50 0001 C CNN +F 1 "GND" H 5350 6900 50 0000 C CNN +F 2 "" H 5350 7050 50 0001 C CNN +F 3 "" H 5350 7050 50 0001 C CNN + 1 5350 7050 + 1 0 0 -1 +$EndComp +$Comp +L pulse v12 +U 1 1 6838201B +P 5850 6000 +F 0 "v12" H 5650 6100 60 0000 C CNN +F 1 "pulse" H 5650 5950 60 0000 C CNN +F 2 "R1" H 5550 6000 60 0000 C CNN +F 3 "" H 5850 6000 60 0000 C CNN + 1 5850 6000 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR012 +U 1 1 68382021 +P 5850 6800 +F 0 "#PWR012" H 5850 6550 50 0001 C CNN +F 1 "GND" H 5850 6650 50 0000 C CNN +F 2 "" H 5850 6800 50 0001 C CNN +F 3 "" H 5850 6800 50 0001 C CNN + 1 5850 6800 + 1 0 0 -1 +$EndComp +$Comp +L pulse v13 +U 1 1 68382028 +P 6250 6250 +F 0 "v13" H 6050 6350 60 0000 C CNN +F 1 "pulse" H 6050 6200 60 0000 C CNN +F 2 "R1" H 5950 6250 60 0000 C CNN +F 3 "" H 6250 6250 60 0000 C CNN + 1 6250 6250 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR013 +U 1 1 6838202E +P 6250 7050 +F 0 "#PWR013" H 6250 6800 50 0001 C CNN +F 1 "GND" H 6250 6900 50 0000 C CNN +F 2 "" H 6250 7050 50 0001 C CNN +F 3 "" H 6250 7050 50 0001 C CNN + 1 6250 7050 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U11 +U 1 1 68382374 +P 5950 4400 +F 0 "U11" H 5950 4900 60 0000 C CNN +F 1 "plot_v1" H 6150 4750 60 0000 C CNN +F 2 "" H 5950 4400 60 0000 C CNN +F 3 "" H 5950 4400 60 0000 C CNN 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+ 6150 3450 6150 4300 +Connection ~ 6150 4300 +Wire Wire Line + 6400 4600 6400 5100 +Wire Wire Line + 6400 5100 8650 5100 +Wire Wire Line + 8650 5100 8650 3200 +Wire Wire Line + 8650 3200 6650 3200 +Wire Wire Line + 6650 3200 6650 4350 +Connection ~ 6650 4350 +Wire Wire Line + 5950 4600 6000 4600 +Wire Wire Line + 6000 4600 6000 4400 +Connection ~ 6000 4400 +Wire Wire Line + 5600 4600 5650 4600 +Wire Wire Line + 5650 4600 5650 4450 +Connection ~ 5650 4450 +$Comp +L 133 X1 +U 1 1 68383B3E +P 5900 2100 +F 0 "X1" H 5800 1300 60 0000 C CNN +F 1 "133" H 5750 2700 60 0000 C CNN +F 2 "" H 5750 2700 60 0001 C CNN +F 3 "" H 5750 2700 60 0001 C CNN + 1 5900 2100 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133_Previous_Values.xml b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133_Previous_Values.xml new file mode 100644 index 00000000..c7585cea --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als133/sn54als133_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source><v1 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">1u</field5><field5 name="Period">2u</field5></v1><v2 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">2u</field5><field5 name="Period">4u</field5></v2><v3 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">4u</field5><field5 name="Period">8u</field5></v3><v4 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">8u</field5><field5 name="Period">16u</field5></v4><v5 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">16u</field5><field5 name="Period">32u</field5></v5><v6 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">32u</field5><field5 name="Period">64u</field5></v6><v7 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">64u</field5><field5 name="Period">128u</field5></v7><v8 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">128u</field5><field5 name="Period">256u</field5></v8><v9 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">256u</field5><field5 name="Period">512u</field5></v9><v10 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">512u</field5><field5 name="Period">1024u</field5></v10><v11 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">1024u</field5><field5 name="Period">2048u</field5></v11><v12 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">2048u</field5><field5 name="Period">4096u</field5></v12><v13 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1n</field4><field5 name="Fall Time">1n</field5><field5 name="Pulse width">4096u</field5><field5 name="Period">16192u</field5></v13></source><model><u9 name="type">adc_bridge<field1 name="Enter value for in_low (default=1.0)" /><field2 name="Enter value for in_high (default=2.0)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /><field4 name="Enter Fall Delay (default=1.0e-9)" /></u9><u13 name="type">dac_bridge<field5 name="Enter value for out_low (default=0.0)" /><field6 name="Enter value for out_high (default=5.0)" /><field7 name="Enter value for out_undef (default=0.5)" /><field8 name="Enter value for input load (default=1.0e-12)" /><field9 name="Enter the Rise Time (default=1.0e-9)" /><field10 name="Enter the Fall Time (default=1.0e-9)" /></u13><u10 name="type">adc_bridge<field11 name="Enter value for in_low (default=1.0)" /><field12 name="Enter value for in_high (default=2.0)" /><field13 name="Enter Rise Delay (default=1.0e-9)" /><field14 name="Enter Fall Delay (default=1.0e-9)" /></u10></model><devicemodel /><subcircuit><x1><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\133</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">1</field2><field3 name="Stop Time">50</field3><field4 name="Start Combo">sec</field4><field5 name="Step Combo">ns</field5><field6 name="Stop Combo">us</field6></tran></analysis></KicadtoNgspice>
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