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author | Sumanto Kar | 2024-11-21 23:44:10 +0530 |
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committer | Sumanto Kar | 2024-11-21 23:44:10 +0530 |
commit | 74387947b07c30cccb36bb125a363e605de07440 (patch) | |
tree | 99e3a56d578de1a72ad0a9161ee8d87015fd1f1a | |
parent | f1f298f2b6a5e39d038f34d6f926298b9b0b37fe (diff) | |
download | eSim-74387947b07c30cccb36bb125a363e605de07440.tar.gz eSim-74387947b07c30cccb36bb125a363e605de07440.tar.bz2 eSim-74387947b07c30cccb36bb125a363e605de07440.zip |
SN5442A is a BCD-to-decimal decoder/driver
8 files changed, 2298 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC-cache.lib b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC-cache.lib new file mode 100644 index 00000000..aa224b4d --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC-cache.lib @@ -0,0 +1,139 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# adc_bridge_4 +# +DEF adc_bridge_4 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "adc_bridge_4" 0 300 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -350 350 350 -200 0 1 0 N +X IN1 1 -550 200 200 R 50 50 1 1 I +X IN2 2 -550 100 200 R 50 50 1 1 I +X IN3 3 -550 0 200 R 50 50 1 1 I +X IN4 4 -550 -100 200 R 50 50 1 1 I +X OUT1 5 550 200 200 L 50 50 1 1 O +X OUT2 6 550 100 200 L 50 50 1 1 O +X OUT3 7 550 0 200 L 50 50 1 1 O +X OUT4 8 550 -100 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" 0 -100 60 H V C CNN +F1 "d_inverter" 0 150 60 H V C CNN +F2 "" 50 -50 60 H V C CNN +F3 "" 50 -50 60 H V C CNN +DRAW +P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N +X ~ 1 -300 0 200 R 50 50 1 1 I +X ~ 2 300 0 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_nand +# +DEF d_nand U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_nand" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 +A 150 49 100 6 900 0 1 0 N 250 50 150 150 +P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N +X IN1 1 -450 100 200 R 50 50 1 1 I +X IN2 2 -450 0 200 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# dac_bridge_2 +# +DEF dac_bridge_2 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "dac_bridge_2" 50 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -250 200 350 -100 0 1 0 N +X IN1 1 -450 50 200 R 50 50 1 1 I +X IN2 2 -450 -50 200 R 50 50 1 1 I +X OUT1 3 550 50 200 L 50 50 1 1 O +X OUT4 4 550 -50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# dac_bridge_8 +# +DEF dac_bridge_8 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "dac_bridge_8" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -400 200 350 -700 0 1 0 N +X IN1 1 -600 50 200 R 50 50 1 1 I +X IN2 2 -600 -50 200 R 50 50 1 1 I +X IN3 3 -600 -150 200 R 50 50 1 1 I +X IN4 4 -600 -250 200 R 50 50 1 1 I +X IN5 5 -600 -350 200 R 50 50 1 1 I +X IN6 6 -600 -450 200 R 50 50 1 1 I +X IN7 7 -600 -550 200 R 50 50 1 1 I +X IN8 8 -600 -650 200 R 50 50 1 1 I +X OUT1 9 550 50 200 L 50 50 1 1 O +X OUT2 10 550 -50 200 L 50 50 1 1 O +X OUT3 11 550 -150 200 L 50 50 1 1 O +X OUT4 12 550 -250 200 L 50 50 1 1 O +X OUT5 13 550 -350 200 L 50 50 1 1 O +X OUT6 14 550 -450 200 L 50 50 1 1 O +X OUT7 15 550 -550 200 L 50 50 1 1 O +X OUT8 16 550 -650 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir new file mode 100644 index 00000000..1d25f385 --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir @@ -0,0 +1,72 @@ +* D:\FOSSEE\eSim\library\SubcircuitLibrary\SN5442A_IC\SN5442A_IC.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 06/30/24 18:49:44 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U11 Net-_U11-Pad1_ Net-_U11-Pad2_ Net-_U11-Pad3_ d_nand +U12 Net-_U10-Pad1_ Net-_U12-Pad2_ Net-_U12-Pad3_ d_nand +U31 Net-_U11-Pad3_ Net-_U11-Pad3_ Net-_U31-Pad3_ d_nand +U32 Net-_U12-Pad3_ Net-_U12-Pad3_ Net-_U32-Pad3_ d_nand +U51 Net-_U31-Pad3_ Net-_U32-Pad3_ Net-_U51-Pad3_ d_nand +U13 Net-_U13-Pad1_ Net-_U11-Pad2_ Net-_U13-Pad3_ d_nand +U14 Net-_U10-Pad1_ Net-_U12-Pad2_ Net-_U14-Pad3_ d_nand +U33 Net-_U13-Pad3_ Net-_U13-Pad3_ Net-_U33-Pad3_ d_nand +U34 Net-_U14-Pad3_ Net-_U14-Pad3_ Net-_U34-Pad3_ d_nand +U52 Net-_U33-Pad3_ Net-_U34-Pad3_ Net-_U52-Pad3_ d_nand +U15 Net-_U11-Pad1_ Net-_U15-Pad2_ Net-_U15-Pad3_ d_nand +U16 Net-_U10-Pad1_ Net-_U12-Pad2_ Net-_U16-Pad3_ d_nand +U35 Net-_U15-Pad3_ Net-_U15-Pad3_ Net-_U35-Pad3_ d_nand +U36 Net-_U16-Pad3_ Net-_U16-Pad3_ Net-_U36-Pad3_ d_nand +U53 Net-_U35-Pad3_ Net-_U36-Pad3_ Net-_U53-Pad3_ d_nand +U17 Net-_U13-Pad1_ Net-_U15-Pad2_ Net-_U17-Pad3_ d_nand +U18 Net-_U10-Pad1_ Net-_U12-Pad2_ Net-_U18-Pad3_ d_nand +U37 Net-_U17-Pad3_ Net-_U17-Pad3_ Net-_U37-Pad3_ d_nand +U38 Net-_U18-Pad3_ Net-_U18-Pad3_ Net-_U38-Pad3_ d_nand +U54 Net-_U37-Pad3_ Net-_U38-Pad3_ Net-_U54-Pad3_ d_nand +U19 Net-_U11-Pad1_ Net-_U11-Pad2_ Net-_U19-Pad3_ d_nand +U20 Net-_U10-Pad2_ Net-_U12-Pad2_ Net-_U20-Pad3_ d_nand +U39 Net-_U19-Pad3_ Net-_U19-Pad3_ Net-_U39-Pad3_ d_nand +U40 Net-_U20-Pad3_ Net-_U20-Pad3_ Net-_U40-Pad3_ d_nand +U55 Net-_U39-Pad3_ Net-_U40-Pad3_ Net-_U55-Pad3_ d_nand +U21 Net-_U13-Pad1_ Net-_U11-Pad2_ Net-_U21-Pad3_ d_nand +U22 Net-_U10-Pad2_ Net-_U12-Pad2_ Net-_U22-Pad3_ d_nand +U41 Net-_U21-Pad3_ Net-_U21-Pad3_ Net-_U41-Pad3_ d_nand +U42 Net-_U22-Pad3_ Net-_U22-Pad3_ Net-_U42-Pad3_ d_nand +U56 Net-_U41-Pad3_ Net-_U42-Pad3_ Net-_U56-Pad3_ d_nand +U23 Net-_U11-Pad1_ Net-_U15-Pad2_ Net-_U23-Pad3_ d_nand +U24 Net-_U10-Pad2_ Net-_U12-Pad2_ Net-_U24-Pad3_ d_nand +U43 Net-_U23-Pad3_ Net-_U23-Pad3_ Net-_U43-Pad3_ d_nand +U44 Net-_U24-Pad3_ Net-_U24-Pad3_ Net-_U44-Pad3_ d_nand +U57 Net-_U43-Pad3_ Net-_U44-Pad3_ Net-_U57-Pad3_ d_nand +U25 Net-_U13-Pad1_ Net-_U15-Pad2_ Net-_U25-Pad3_ d_nand +U26 Net-_U10-Pad2_ Net-_U12-Pad2_ Net-_U26-Pad3_ d_nand +U45 Net-_U25-Pad3_ Net-_U25-Pad3_ Net-_U45-Pad3_ d_nand +U46 Net-_U26-Pad3_ Net-_U26-Pad3_ Net-_U46-Pad3_ d_nand +U58 Net-_U45-Pad3_ Net-_U46-Pad3_ Net-_U58-Pad3_ d_nand +U27 Net-_U11-Pad1_ Net-_U11-Pad2_ Net-_U27-Pad3_ d_nand +U28 Net-_U10-Pad1_ Net-_U28-Pad2_ Net-_U28-Pad3_ d_nand +U47 Net-_U27-Pad3_ Net-_U27-Pad3_ Net-_U47-Pad3_ d_nand +U48 Net-_U28-Pad3_ Net-_U28-Pad3_ Net-_U48-Pad3_ d_nand +U59 Net-_U47-Pad3_ Net-_U48-Pad3_ Net-_U59-Pad3_ d_nand +U29 Net-_U13-Pad1_ Net-_U11-Pad2_ Net-_U29-Pad3_ d_nand +U30 Net-_U10-Pad1_ Net-_U28-Pad2_ Net-_U30-Pad3_ d_nand +U49 Net-_U29-Pad3_ Net-_U29-Pad3_ Net-_U49-Pad3_ d_nand +U50 Net-_U30-Pad3_ Net-_U30-Pad3_ Net-_U50-Pad3_ d_nand +U60 Net-_U49-Pad3_ Net-_U50-Pad3_ Net-_U60-Pad3_ d_nand +U4 Net-_U2-Pad5_ Net-_U11-Pad1_ d_inverter +U9 Net-_U11-Pad1_ Net-_U13-Pad1_ d_inverter +U3 Net-_U2-Pad6_ Net-_U11-Pad2_ d_inverter +U7 Net-_U11-Pad2_ Net-_U15-Pad2_ d_inverter +U6 Net-_U2-Pad7_ Net-_U10-Pad1_ d_inverter +U10 Net-_U10-Pad1_ Net-_U10-Pad2_ d_inverter +U5 Net-_U2-Pad8_ Net-_U12-Pad2_ d_inverter +U8 Net-_U12-Pad2_ Net-_U28-Pad2_ d_inverter +U62 Net-_U51-Pad3_ Net-_U52-Pad3_ Net-_U53-Pad3_ Net-_U54-Pad3_ Net-_U55-Pad3_ Net-_U56-Pad3_ Net-_U57-Pad3_ Net-_U58-Pad3_ Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ dac_bridge_8 +U61 Net-_U59-Pad3_ Net-_U60-Pad3_ Net-_U1-Pad9_ Net-_U1-Pad10_ dac_bridge_2 +U2 Net-_U1-Pad14_ Net-_U1-Pad13_ Net-_U1-Pad12_ Net-_U1-Pad11_ Net-_U2-Pad5_ Net-_U2-Pad6_ Net-_U2-Pad7_ Net-_U2-Pad8_ adc_bridge_4 +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ PORT + +.end diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir.out b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir.out new file mode 100644 index 00000000..014d39a6 --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir.out @@ -0,0 +1,256 @@ +* d:\fossee\esim\library\subcircuitlibrary\sn5442a_ic\sn5442a_ic.cir + +* u11 net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_nand +* u12 net-_u10-pad1_ net-_u12-pad2_ net-_u12-pad3_ d_nand +* u31 net-_u11-pad3_ net-_u11-pad3_ net-_u31-pad3_ d_nand +* u32 net-_u12-pad3_ net-_u12-pad3_ net-_u32-pad3_ d_nand +* u51 net-_u31-pad3_ net-_u32-pad3_ net-_u51-pad3_ d_nand +* u13 net-_u13-pad1_ net-_u11-pad2_ net-_u13-pad3_ d_nand +* u14 net-_u10-pad1_ net-_u12-pad2_ net-_u14-pad3_ d_nand +* u33 net-_u13-pad3_ net-_u13-pad3_ net-_u33-pad3_ d_nand +* u34 net-_u14-pad3_ net-_u14-pad3_ net-_u34-pad3_ d_nand +* u52 net-_u33-pad3_ net-_u34-pad3_ net-_u52-pad3_ d_nand +* u15 net-_u11-pad1_ net-_u15-pad2_ net-_u15-pad3_ d_nand +* u16 net-_u10-pad1_ net-_u12-pad2_ net-_u16-pad3_ d_nand +* u35 net-_u15-pad3_ net-_u15-pad3_ net-_u35-pad3_ d_nand +* u36 net-_u16-pad3_ net-_u16-pad3_ net-_u36-pad3_ d_nand +* u53 net-_u35-pad3_ net-_u36-pad3_ net-_u53-pad3_ d_nand +* u17 net-_u13-pad1_ net-_u15-pad2_ net-_u17-pad3_ d_nand +* u18 net-_u10-pad1_ net-_u12-pad2_ net-_u18-pad3_ d_nand +* u37 net-_u17-pad3_ net-_u17-pad3_ net-_u37-pad3_ d_nand +* u38 net-_u18-pad3_ net-_u18-pad3_ net-_u38-pad3_ d_nand +* u54 net-_u37-pad3_ net-_u38-pad3_ net-_u54-pad3_ d_nand +* u19 net-_u11-pad1_ net-_u11-pad2_ net-_u19-pad3_ d_nand +* u20 net-_u10-pad2_ net-_u12-pad2_ net-_u20-pad3_ d_nand +* u39 net-_u19-pad3_ net-_u19-pad3_ net-_u39-pad3_ d_nand +* u40 net-_u20-pad3_ net-_u20-pad3_ net-_u40-pad3_ d_nand +* u55 net-_u39-pad3_ net-_u40-pad3_ net-_u55-pad3_ d_nand +* u21 net-_u13-pad1_ net-_u11-pad2_ net-_u21-pad3_ d_nand +* u22 net-_u10-pad2_ net-_u12-pad2_ net-_u22-pad3_ d_nand +* u41 net-_u21-pad3_ net-_u21-pad3_ net-_u41-pad3_ d_nand +* u42 net-_u22-pad3_ net-_u22-pad3_ net-_u42-pad3_ d_nand +* u56 net-_u41-pad3_ net-_u42-pad3_ net-_u56-pad3_ d_nand +* u23 net-_u11-pad1_ net-_u15-pad2_ net-_u23-pad3_ d_nand +* u24 net-_u10-pad2_ net-_u12-pad2_ net-_u24-pad3_ d_nand +* u43 net-_u23-pad3_ net-_u23-pad3_ net-_u43-pad3_ d_nand +* u44 net-_u24-pad3_ net-_u24-pad3_ net-_u44-pad3_ d_nand +* u57 net-_u43-pad3_ net-_u44-pad3_ net-_u57-pad3_ d_nand +* u25 net-_u13-pad1_ net-_u15-pad2_ net-_u25-pad3_ d_nand +* u26 net-_u10-pad2_ net-_u12-pad2_ net-_u26-pad3_ d_nand +* u45 net-_u25-pad3_ net-_u25-pad3_ net-_u45-pad3_ d_nand +* u46 net-_u26-pad3_ net-_u26-pad3_ net-_u46-pad3_ d_nand +* u58 net-_u45-pad3_ net-_u46-pad3_ net-_u58-pad3_ d_nand +* u27 net-_u11-pad1_ net-_u11-pad2_ net-_u27-pad3_ d_nand +* u28 net-_u10-pad1_ net-_u28-pad2_ net-_u28-pad3_ d_nand +* u47 net-_u27-pad3_ net-_u27-pad3_ net-_u47-pad3_ d_nand +* u48 net-_u28-pad3_ net-_u28-pad3_ net-_u48-pad3_ d_nand +* u59 net-_u47-pad3_ net-_u48-pad3_ net-_u59-pad3_ d_nand +* u29 net-_u13-pad1_ net-_u11-pad2_ net-_u29-pad3_ d_nand +* u30 net-_u10-pad1_ net-_u28-pad2_ net-_u30-pad3_ d_nand +* u49 net-_u29-pad3_ net-_u29-pad3_ net-_u49-pad3_ d_nand +* u50 net-_u30-pad3_ net-_u30-pad3_ net-_u50-pad3_ d_nand +* u60 net-_u49-pad3_ net-_u50-pad3_ net-_u60-pad3_ d_nand +* u4 net-_u2-pad5_ net-_u11-pad1_ d_inverter +* u9 net-_u11-pad1_ net-_u13-pad1_ d_inverter +* u3 net-_u2-pad6_ net-_u11-pad2_ d_inverter +* u7 net-_u11-pad2_ net-_u15-pad2_ d_inverter +* u6 net-_u2-pad7_ net-_u10-pad1_ d_inverter +* u10 net-_u10-pad1_ net-_u10-pad2_ d_inverter +* u5 net-_u2-pad8_ net-_u12-pad2_ d_inverter +* u8 net-_u12-pad2_ net-_u28-pad2_ d_inverter +* u62 net-_u51-pad3_ net-_u52-pad3_ net-_u53-pad3_ net-_u54-pad3_ net-_u55-pad3_ net-_u56-pad3_ net-_u57-pad3_ net-_u58-pad3_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ dac_bridge_8 +* u61 net-_u59-pad3_ net-_u60-pad3_ net-_u1-pad9_ net-_u1-pad10_ dac_bridge_2 +* u2 net-_u1-pad14_ net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ net-_u2-pad8_ adc_bridge_4 +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ port +a1 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11 +a2 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u12-pad3_ u12 +a3 [net-_u11-pad3_ net-_u11-pad3_ ] net-_u31-pad3_ u31 +a4 [net-_u12-pad3_ net-_u12-pad3_ ] net-_u32-pad3_ u32 +a5 [net-_u31-pad3_ net-_u32-pad3_ ] net-_u51-pad3_ u51 +a6 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u13-pad3_ u13 +a7 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u14-pad3_ u14 +a8 [net-_u13-pad3_ net-_u13-pad3_ ] net-_u33-pad3_ u33 +a9 [net-_u14-pad3_ net-_u14-pad3_ ] net-_u34-pad3_ u34 +a10 [net-_u33-pad3_ net-_u34-pad3_ ] net-_u52-pad3_ u52 +a11 [net-_u11-pad1_ net-_u15-pad2_ ] net-_u15-pad3_ u15 +a12 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u16-pad3_ u16 +a13 [net-_u15-pad3_ net-_u15-pad3_ ] net-_u35-pad3_ u35 +a14 [net-_u16-pad3_ net-_u16-pad3_ ] net-_u36-pad3_ u36 +a15 [net-_u35-pad3_ net-_u36-pad3_ ] net-_u53-pad3_ u53 +a16 [net-_u13-pad1_ net-_u15-pad2_ ] net-_u17-pad3_ u17 +a17 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u18-pad3_ u18 +a18 [net-_u17-pad3_ net-_u17-pad3_ ] net-_u37-pad3_ u37 +a19 [net-_u18-pad3_ net-_u18-pad3_ ] net-_u38-pad3_ u38 +a20 [net-_u37-pad3_ net-_u38-pad3_ ] net-_u54-pad3_ u54 +a21 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u19-pad3_ u19 +a22 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u20-pad3_ u20 +a23 [net-_u19-pad3_ net-_u19-pad3_ ] net-_u39-pad3_ u39 +a24 [net-_u20-pad3_ net-_u20-pad3_ ] net-_u40-pad3_ u40 +a25 [net-_u39-pad3_ net-_u40-pad3_ ] net-_u55-pad3_ u55 +a26 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u21-pad3_ u21 +a27 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u22-pad3_ u22 +a28 [net-_u21-pad3_ net-_u21-pad3_ ] net-_u41-pad3_ u41 +a29 [net-_u22-pad3_ net-_u22-pad3_ ] net-_u42-pad3_ u42 +a30 [net-_u41-pad3_ net-_u42-pad3_ ] net-_u56-pad3_ u56 +a31 [net-_u11-pad1_ net-_u15-pad2_ ] net-_u23-pad3_ u23 +a32 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u24-pad3_ u24 +a33 [net-_u23-pad3_ net-_u23-pad3_ ] net-_u43-pad3_ u43 +a34 [net-_u24-pad3_ net-_u24-pad3_ ] net-_u44-pad3_ u44 +a35 [net-_u43-pad3_ net-_u44-pad3_ ] net-_u57-pad3_ u57 +a36 [net-_u13-pad1_ net-_u15-pad2_ ] net-_u25-pad3_ u25 +a37 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u26-pad3_ u26 +a38 [net-_u25-pad3_ net-_u25-pad3_ ] net-_u45-pad3_ u45 +a39 [net-_u26-pad3_ net-_u26-pad3_ ] net-_u46-pad3_ u46 +a40 [net-_u45-pad3_ net-_u46-pad3_ ] net-_u58-pad3_ u58 +a41 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u27-pad3_ u27 +a42 [net-_u10-pad1_ net-_u28-pad2_ ] net-_u28-pad3_ u28 +a43 [net-_u27-pad3_ net-_u27-pad3_ ] net-_u47-pad3_ u47 +a44 [net-_u28-pad3_ net-_u28-pad3_ ] net-_u48-pad3_ u48 +a45 [net-_u47-pad3_ net-_u48-pad3_ ] net-_u59-pad3_ u59 +a46 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u29-pad3_ u29 +a47 [net-_u10-pad1_ net-_u28-pad2_ ] net-_u30-pad3_ u30 +a48 [net-_u29-pad3_ net-_u29-pad3_ ] net-_u49-pad3_ u49 +a49 [net-_u30-pad3_ net-_u30-pad3_ ] net-_u50-pad3_ u50 +a50 [net-_u49-pad3_ net-_u50-pad3_ ] net-_u60-pad3_ u60 +a51 net-_u2-pad5_ net-_u11-pad1_ u4 +a52 net-_u11-pad1_ net-_u13-pad1_ u9 +a53 net-_u2-pad6_ net-_u11-pad2_ u3 +a54 net-_u11-pad2_ net-_u15-pad2_ u7 +a55 net-_u2-pad7_ net-_u10-pad1_ u6 +a56 net-_u10-pad1_ net-_u10-pad2_ u10 +a57 net-_u2-pad8_ net-_u12-pad2_ u5 +a58 net-_u12-pad2_ net-_u28-pad2_ u8 +a59 [net-_u51-pad3_ net-_u52-pad3_ net-_u53-pad3_ net-_u54-pad3_ net-_u55-pad3_ net-_u56-pad3_ net-_u57-pad3_ net-_u58-pad3_ ] [net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ ] u62 +a60 [net-_u59-pad3_ net-_u60-pad3_ ] [net-_u1-pad9_ net-_u1-pad10_ ] u61 +a61 [net-_u1-pad14_ net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ ] [net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ net-_u2-pad8_ ] u2 +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u11 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u12 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u31 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u32 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u51 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u13 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u14 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u33 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u34 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u52 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u15 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u16 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u35 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u36 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u53 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u17 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u18 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u37 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u38 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u54 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u19 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u20 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u39 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u40 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u55 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u21 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u22 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u41 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u42 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u56 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u23 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u24 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u43 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u44 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u57 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u25 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u26 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u45 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u46 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u58 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u27 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u28 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u47 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u48 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u59 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u29 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u30 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u49 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u50 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u60 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: dac_bridge_8, NgSpice Name: dac_bridge +.model u62 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) +* Schematic Name: dac_bridge_2, NgSpice Name: dac_bridge +.model u61 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) +* Schematic Name: adc_bridge_4, NgSpice Name: adc_bridge +.model u2 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.pro b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sch b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sch new file mode 100644 index 00000000..d1cc4d39 --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sch @@ -0,0 +1,1506 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +LIBS:SN5442A-cache +EELAYER 25 0 +EELAYER END +$Descr User 23622 27559 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L d_nand U11 +U 1 1 66815193 +P 13050 4450 +F 0 "U11" H 13050 4450 60 0000 C CNN +F 1 "d_nand" H 13100 4550 60 0000 C CNN +F 2 "" H 13050 4450 60 0000 C CNN +F 3 "" H 13050 4450 60 0000 C CNN + 1 13050 4450 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U12 +U 1 1 66815194 +P 13050 5000 +F 0 "U12" H 13050 5000 60 0000 C CNN +F 1 "d_nand" H 13100 5100 60 0000 C CNN +F 2 "" H 13050 5000 60 0000 C CNN +F 3 "" H 13050 5000 60 0000 C CNN + 1 13050 5000 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U31 +U 1 1 66815195 +P 14200 4450 +F 0 "U31" H 14200 4450 60 0000 C CNN +F 1 "d_nand" H 14250 4550 60 0000 C CNN +F 2 "" H 14200 4450 60 0000 C CNN +F 3 "" H 14200 4450 60 0000 C CNN + 1 14200 4450 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U32 +U 1 1 66815196 +P 14200 5000 +F 0 "U32" H 14200 5000 60 0000 C CNN +F 1 "d_nand" H 14250 5100 60 0000 C CNN +F 2 "" H 14200 5000 60 0000 C CNN +F 3 "" H 14200 5000 60 0000 C CNN + 1 14200 5000 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U51 +U 1 1 66815197 +P 15250 4650 +F 0 "U51" H 15250 4650 60 0000 C CNN +F 1 "d_nand" H 15300 4750 60 0000 C CNN +F 2 "" H 15250 4650 60 0000 C CNN +F 3 "" H 15250 4650 60 0000 C CNN + 1 15250 4650 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U13 +U 1 1 66815198 +P 13050 6050 +F 0 "U13" H 13050 6050 60 0000 C CNN +F 1 "d_nand" H 13100 6150 60 0000 C CNN +F 2 "" H 13050 6050 60 0000 C CNN +F 3 "" H 13050 6050 60 0000 C CNN + 1 13050 6050 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U14 +U 1 1 66815199 +P 13050 6600 +F 0 "U14" H 13050 6600 60 0000 C CNN +F 1 "d_nand" H 13100 6700 60 0000 C CNN +F 2 "" H 13050 6600 60 0000 C CNN +F 3 "" H 13050 6600 60 0000 C CNN + 1 13050 6600 + 1 0 0 -1 +$EndComp +$Comp +L d_nand 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6150 10150 6350 10150 +Wire Wire Line + 6350 10150 6350 10100 +Wire Wire Line + 6350 10100 6450 10100 +Wire Wire Line + 6450 10200 6350 10200 +Wire Wire Line + 6350 10200 6350 10350 +Wire Wire Line + 6350 10350 6150 10350 +Wire Wire Line + 6150 10550 6400 10550 +Wire Wire Line + 6400 10550 6400 10300 +Wire Wire Line + 6400 10300 6450 10300 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sub b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sub new file mode 100644 index 00000000..98a5525d --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sub @@ -0,0 +1,250 @@ +* Subcircuit SN5442A_IC +.subckt SN5442A_IC net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ +* d:\fossee\esim\library\subcircuitlibrary\sn5442a_ic\sn5442a_ic.cir +* u11 net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_nand +* u12 net-_u10-pad1_ net-_u12-pad2_ net-_u12-pad3_ d_nand +* u31 net-_u11-pad3_ net-_u11-pad3_ net-_u31-pad3_ d_nand +* u32 net-_u12-pad3_ net-_u12-pad3_ net-_u32-pad3_ d_nand +* u51 net-_u31-pad3_ net-_u32-pad3_ net-_u51-pad3_ d_nand +* u13 net-_u13-pad1_ net-_u11-pad2_ net-_u13-pad3_ d_nand +* u14 net-_u10-pad1_ net-_u12-pad2_ net-_u14-pad3_ d_nand +* u33 net-_u13-pad3_ net-_u13-pad3_ net-_u33-pad3_ d_nand +* u34 net-_u14-pad3_ net-_u14-pad3_ net-_u34-pad3_ d_nand +* u52 net-_u33-pad3_ net-_u34-pad3_ net-_u52-pad3_ d_nand +* u15 net-_u11-pad1_ net-_u15-pad2_ net-_u15-pad3_ d_nand +* u16 net-_u10-pad1_ net-_u12-pad2_ net-_u16-pad3_ d_nand +* u35 net-_u15-pad3_ net-_u15-pad3_ net-_u35-pad3_ d_nand +* u36 net-_u16-pad3_ net-_u16-pad3_ net-_u36-pad3_ d_nand +* u53 net-_u35-pad3_ net-_u36-pad3_ net-_u53-pad3_ d_nand +* u17 net-_u13-pad1_ net-_u15-pad2_ net-_u17-pad3_ d_nand +* u18 net-_u10-pad1_ net-_u12-pad2_ net-_u18-pad3_ d_nand +* u37 net-_u17-pad3_ net-_u17-pad3_ net-_u37-pad3_ d_nand +* u38 net-_u18-pad3_ net-_u18-pad3_ net-_u38-pad3_ d_nand +* u54 net-_u37-pad3_ net-_u38-pad3_ net-_u54-pad3_ d_nand +* u19 net-_u11-pad1_ net-_u11-pad2_ net-_u19-pad3_ d_nand +* u20 net-_u10-pad2_ net-_u12-pad2_ net-_u20-pad3_ d_nand +* u39 net-_u19-pad3_ net-_u19-pad3_ net-_u39-pad3_ d_nand +* u40 net-_u20-pad3_ net-_u20-pad3_ net-_u40-pad3_ d_nand +* u55 net-_u39-pad3_ net-_u40-pad3_ net-_u55-pad3_ d_nand +* u21 net-_u13-pad1_ net-_u11-pad2_ net-_u21-pad3_ d_nand +* u22 net-_u10-pad2_ net-_u12-pad2_ net-_u22-pad3_ d_nand +* u41 net-_u21-pad3_ net-_u21-pad3_ net-_u41-pad3_ d_nand +* u42 net-_u22-pad3_ net-_u22-pad3_ net-_u42-pad3_ d_nand +* u56 net-_u41-pad3_ net-_u42-pad3_ net-_u56-pad3_ d_nand +* u23 net-_u11-pad1_ net-_u15-pad2_ net-_u23-pad3_ d_nand +* u24 net-_u10-pad2_ net-_u12-pad2_ net-_u24-pad3_ d_nand +* u43 net-_u23-pad3_ net-_u23-pad3_ net-_u43-pad3_ d_nand +* u44 net-_u24-pad3_ net-_u24-pad3_ net-_u44-pad3_ d_nand +* u57 net-_u43-pad3_ net-_u44-pad3_ net-_u57-pad3_ d_nand +* u25 net-_u13-pad1_ net-_u15-pad2_ net-_u25-pad3_ d_nand +* u26 net-_u10-pad2_ net-_u12-pad2_ net-_u26-pad3_ d_nand +* u45 net-_u25-pad3_ net-_u25-pad3_ net-_u45-pad3_ d_nand +* u46 net-_u26-pad3_ net-_u26-pad3_ net-_u46-pad3_ d_nand +* u58 net-_u45-pad3_ net-_u46-pad3_ net-_u58-pad3_ d_nand +* u27 net-_u11-pad1_ net-_u11-pad2_ net-_u27-pad3_ d_nand +* u28 net-_u10-pad1_ net-_u28-pad2_ net-_u28-pad3_ d_nand +* u47 net-_u27-pad3_ net-_u27-pad3_ net-_u47-pad3_ d_nand +* u48 net-_u28-pad3_ net-_u28-pad3_ net-_u48-pad3_ d_nand +* u59 net-_u47-pad3_ net-_u48-pad3_ net-_u59-pad3_ d_nand +* u29 net-_u13-pad1_ net-_u11-pad2_ net-_u29-pad3_ d_nand +* u30 net-_u10-pad1_ net-_u28-pad2_ net-_u30-pad3_ d_nand +* u49 net-_u29-pad3_ net-_u29-pad3_ net-_u49-pad3_ d_nand +* u50 net-_u30-pad3_ net-_u30-pad3_ net-_u50-pad3_ d_nand +* u60 net-_u49-pad3_ net-_u50-pad3_ net-_u60-pad3_ d_nand +* u4 net-_u2-pad5_ net-_u11-pad1_ d_inverter +* u9 net-_u11-pad1_ net-_u13-pad1_ d_inverter +* u3 net-_u2-pad6_ net-_u11-pad2_ d_inverter +* u7 net-_u11-pad2_ net-_u15-pad2_ d_inverter +* u6 net-_u2-pad7_ net-_u10-pad1_ d_inverter +* u10 net-_u10-pad1_ net-_u10-pad2_ d_inverter +* u5 net-_u2-pad8_ net-_u12-pad2_ d_inverter +* u8 net-_u12-pad2_ net-_u28-pad2_ d_inverter +* u62 net-_u51-pad3_ net-_u52-pad3_ net-_u53-pad3_ net-_u54-pad3_ net-_u55-pad3_ net-_u56-pad3_ net-_u57-pad3_ net-_u58-pad3_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ dac_bridge_8 +* u61 net-_u59-pad3_ net-_u60-pad3_ net-_u1-pad9_ net-_u1-pad10_ dac_bridge_2 +* u2 net-_u1-pad14_ net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ net-_u2-pad8_ adc_bridge_4 +a1 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11 +a2 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u12-pad3_ u12 +a3 [net-_u11-pad3_ net-_u11-pad3_ ] net-_u31-pad3_ u31 +a4 [net-_u12-pad3_ net-_u12-pad3_ ] net-_u32-pad3_ u32 +a5 [net-_u31-pad3_ net-_u32-pad3_ ] net-_u51-pad3_ u51 +a6 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u13-pad3_ u13 +a7 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u14-pad3_ u14 +a8 [net-_u13-pad3_ net-_u13-pad3_ ] net-_u33-pad3_ u33 +a9 [net-_u14-pad3_ net-_u14-pad3_ ] net-_u34-pad3_ u34 +a10 [net-_u33-pad3_ net-_u34-pad3_ ] net-_u52-pad3_ u52 +a11 [net-_u11-pad1_ net-_u15-pad2_ ] net-_u15-pad3_ u15 +a12 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u16-pad3_ u16 +a13 [net-_u15-pad3_ net-_u15-pad3_ ] net-_u35-pad3_ u35 +a14 [net-_u16-pad3_ net-_u16-pad3_ ] net-_u36-pad3_ u36 +a15 [net-_u35-pad3_ net-_u36-pad3_ ] net-_u53-pad3_ u53 +a16 [net-_u13-pad1_ net-_u15-pad2_ ] net-_u17-pad3_ u17 +a17 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u18-pad3_ u18 +a18 [net-_u17-pad3_ net-_u17-pad3_ ] net-_u37-pad3_ u37 +a19 [net-_u18-pad3_ net-_u18-pad3_ ] net-_u38-pad3_ u38 +a20 [net-_u37-pad3_ net-_u38-pad3_ ] net-_u54-pad3_ u54 +a21 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u19-pad3_ u19 +a22 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u20-pad3_ u20 +a23 [net-_u19-pad3_ net-_u19-pad3_ ] net-_u39-pad3_ u39 +a24 [net-_u20-pad3_ net-_u20-pad3_ ] net-_u40-pad3_ u40 +a25 [net-_u39-pad3_ net-_u40-pad3_ ] net-_u55-pad3_ u55 +a26 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u21-pad3_ u21 +a27 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u22-pad3_ u22 +a28 [net-_u21-pad3_ net-_u21-pad3_ ] net-_u41-pad3_ u41 +a29 [net-_u22-pad3_ net-_u22-pad3_ ] net-_u42-pad3_ u42 +a30 [net-_u41-pad3_ net-_u42-pad3_ ] net-_u56-pad3_ u56 +a31 [net-_u11-pad1_ net-_u15-pad2_ ] net-_u23-pad3_ u23 +a32 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u24-pad3_ u24 +a33 [net-_u23-pad3_ net-_u23-pad3_ ] net-_u43-pad3_ u43 +a34 [net-_u24-pad3_ net-_u24-pad3_ ] net-_u44-pad3_ u44 +a35 [net-_u43-pad3_ net-_u44-pad3_ ] net-_u57-pad3_ u57 +a36 [net-_u13-pad1_ net-_u15-pad2_ ] net-_u25-pad3_ u25 +a37 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u26-pad3_ u26 +a38 [net-_u25-pad3_ net-_u25-pad3_ ] net-_u45-pad3_ u45 +a39 [net-_u26-pad3_ net-_u26-pad3_ ] net-_u46-pad3_ u46 +a40 [net-_u45-pad3_ net-_u46-pad3_ ] net-_u58-pad3_ u58 +a41 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u27-pad3_ u27 +a42 [net-_u10-pad1_ net-_u28-pad2_ ] net-_u28-pad3_ u28 +a43 [net-_u27-pad3_ net-_u27-pad3_ ] net-_u47-pad3_ u47 +a44 [net-_u28-pad3_ net-_u28-pad3_ ] net-_u48-pad3_ u48 +a45 [net-_u47-pad3_ net-_u48-pad3_ ] net-_u59-pad3_ u59 +a46 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u29-pad3_ u29 +a47 [net-_u10-pad1_ net-_u28-pad2_ ] net-_u30-pad3_ u30 +a48 [net-_u29-pad3_ net-_u29-pad3_ ] net-_u49-pad3_ u49 +a49 [net-_u30-pad3_ net-_u30-pad3_ ] net-_u50-pad3_ u50 +a50 [net-_u49-pad3_ net-_u50-pad3_ ] net-_u60-pad3_ u60 +a51 net-_u2-pad5_ net-_u11-pad1_ u4 +a52 net-_u11-pad1_ net-_u13-pad1_ u9 +a53 net-_u2-pad6_ net-_u11-pad2_ u3 +a54 net-_u11-pad2_ net-_u15-pad2_ u7 +a55 net-_u2-pad7_ net-_u10-pad1_ u6 +a56 net-_u10-pad1_ net-_u10-pad2_ u10 +a57 net-_u2-pad8_ net-_u12-pad2_ u5 +a58 net-_u12-pad2_ net-_u28-pad2_ u8 +a59 [net-_u51-pad3_ net-_u52-pad3_ net-_u53-pad3_ net-_u54-pad3_ net-_u55-pad3_ net-_u56-pad3_ net-_u57-pad3_ net-_u58-pad3_ ] [net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ ] u62 +a60 [net-_u59-pad3_ net-_u60-pad3_ ] [net-_u1-pad9_ net-_u1-pad10_ ] u61 +a61 [net-_u1-pad14_ net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ ] [net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ net-_u2-pad8_ ] u2 +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u11 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u12 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u31 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u32 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u51 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u13 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u14 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u33 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u34 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u52 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u15 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u16 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u35 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u36 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u53 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u17 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u18 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u37 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u38 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u54 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u19 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u20 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u39 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u40 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u55 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u21 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u22 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u41 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u42 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u56 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u23 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u24 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u43 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u44 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u57 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u25 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u26 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u45 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u46 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u58 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u27 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u28 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u47 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u48 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u59 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u29 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u30 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u49 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u50 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u60 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: dac_bridge_8, NgSpice Name: dac_bridge +.model u62 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) +* Schematic Name: dac_bridge_2, NgSpice Name: dac_bridge +.model u61 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) +* Schematic Name: adc_bridge_4, NgSpice Name: adc_bridge +.model u2 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) +* Control Statements + +.ends SN5442A_IC
\ No newline at end of file diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC_Previous_Values.xml b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC_Previous_Values.xml new file mode 100644 index 00000000..8c4697fb --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis><source /><model><u11 name="type">d_nand<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u11><u12 name="type">d_nand<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u12><u31 name="type">d_nand<field7 name="Enter Rise Delay (default=1.0e-9)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter Input Load (default=1.0e-12)" /></u31><u32 name="type">d_nand<field10 name="Enter Rise Delay (default=1.0e-9)" /><field11 name="Enter Fall Delay (default=1.0e-9)" /><field12 name="Enter Input Load (default=1.0e-12)" /></u32><u51 name="type">d_nand<field13 name="Enter Rise Delay (default=1.0e-9)" /><field14 name="Enter Fall Delay (default=1.0e-9)" /><field15 name="Enter Input Load (default=1.0e-12)" /></u51><u13 name="type">d_nand<field16 name="Enter Rise Delay (default=1.0e-9)" /><field17 name="Enter Fall Delay (default=1.0e-9)" /><field18 name="Enter Input Load (default=1.0e-12)" /></u13><u14 name="type">d_nand<field19 name="Enter Rise Delay (default=1.0e-9)" /><field20 name="Enter Fall Delay (default=1.0e-9)" /><field21 name="Enter Input Load (default=1.0e-12)" /></u14><u33 name="type">d_nand<field22 name="Enter Rise Delay (default=1.0e-9)" /><field23 name="Enter Fall Delay (default=1.0e-9)" /><field24 name="Enter Input Load (default=1.0e-12)" /></u33><u34 name="type">d_nand<field25 name="Enter Rise Delay (default=1.0e-9)" /><field26 name="Enter Fall Delay (default=1.0e-9)" /><field27 name="Enter Input Load (default=1.0e-12)" /></u34><u52 name="type">d_nand<field28 name="Enter Rise Delay (default=1.0e-9)" /><field29 name="Enter Fall Delay (default=1.0e-9)" /><field30 name="Enter Input Load (default=1.0e-12)" /></u52><u15 name="type">d_nand<field31 name="Enter Rise Delay (default=1.0e-9)" /><field32 name="Enter Fall Delay (default=1.0e-9)" /><field33 name="Enter Input Load (default=1.0e-12)" /></u15><u16 name="type">d_nand<field34 name="Enter Rise Delay (default=1.0e-9)" /><field35 name="Enter Fall Delay (default=1.0e-9)" /><field36 name="Enter Input Load (default=1.0e-12)" /></u16><u35 name="type">d_nand<field37 name="Enter Rise Delay (default=1.0e-9)" /><field38 name="Enter Fall Delay (default=1.0e-9)" /><field39 name="Enter Input Load (default=1.0e-12)" /></u35><u36 name="type">d_nand<field40 name="Enter Rise Delay (default=1.0e-9)" /><field41 name="Enter Fall Delay (default=1.0e-9)" /><field42 name="Enter Input Load (default=1.0e-12)" /></u36><u53 name="type">d_nand<field43 name="Enter Rise Delay (default=1.0e-9)" /><field44 name="Enter Fall Delay (default=1.0e-9)" /><field45 name="Enter Input Load (default=1.0e-12)" /></u53><u17 name="type">d_nand<field46 name="Enter Rise Delay (default=1.0e-9)" /><field47 name="Enter Fall Delay (default=1.0e-9)" /><field48 name="Enter Input Load (default=1.0e-12)" /></u17><u18 name="type">d_nand<field49 name="Enter Rise Delay (default=1.0e-9)" /><field50 name="Enter Fall Delay (default=1.0e-9)" /><field51 name="Enter Input Load (default=1.0e-12)" /></u18><u37 name="type">d_nand<field52 name="Enter Rise Delay (default=1.0e-9)" /><field53 name="Enter Fall Delay (default=1.0e-9)" /><field54 name="Enter Input Load (default=1.0e-12)" /></u37><u38 name="type">d_nand<field55 name="Enter Rise Delay (default=1.0e-9)" /><field56 name="Enter Fall Delay (default=1.0e-9)" /><field57 name="Enter Input Load (default=1.0e-12)" /></u38><u54 name="type">d_nand<field58 name="Enter Rise Delay (default=1.0e-9)" /><field59 name="Enter Fall Delay (default=1.0e-9)" /><field60 name="Enter Input Load (default=1.0e-12)" /></u54><u19 name="type">d_nand<field61 name="Enter Rise Delay (default=1.0e-9)" /><field62 name="Enter Fall Delay (default=1.0e-9)" /><field63 name="Enter Input Load (default=1.0e-12)" /></u19><u20 name="type">d_nand<field64 name="Enter Rise Delay (default=1.0e-9)" /><field65 name="Enter Fall Delay (default=1.0e-9)" /><field66 name="Enter Input Load (default=1.0e-12)" /></u20><u39 name="type">d_nand<field67 name="Enter Rise Delay (default=1.0e-9)" /><field68 name="Enter Fall Delay (default=1.0e-9)" /><field69 name="Enter Input Load (default=1.0e-12)" /></u39><u40 name="type">d_nand<field70 name="Enter Rise Delay (default=1.0e-9)" /><field71 name="Enter Fall Delay (default=1.0e-9)" /><field72 name="Enter Input Load (default=1.0e-12)" /></u40><u55 name="type">d_nand<field73 name="Enter Rise Delay (default=1.0e-9)" /><field74 name="Enter Fall Delay (default=1.0e-9)" /><field75 name="Enter Input Load (default=1.0e-12)" /></u55><u21 name="type">d_nand<field76 name="Enter Rise Delay (default=1.0e-9)" /><field77 name="Enter Fall Delay (default=1.0e-9)" /><field78 name="Enter Input Load (default=1.0e-12)" /></u21><u22 name="type">d_nand<field79 name="Enter Rise Delay (default=1.0e-9)" /><field80 name="Enter Fall Delay (default=1.0e-9)" /><field81 name="Enter Input Load (default=1.0e-12)" /></u22><u41 name="type">d_nand<field82 name="Enter Rise Delay (default=1.0e-9)" /><field83 name="Enter Fall Delay (default=1.0e-9)" /><field84 name="Enter Input Load (default=1.0e-12)" /></u41><u42 name="type">d_nand<field85 name="Enter Rise Delay (default=1.0e-9)" /><field86 name="Enter Fall Delay (default=1.0e-9)" /><field87 name="Enter Input Load (default=1.0e-12)" /></u42><u56 name="type">d_nand<field88 name="Enter Rise Delay (default=1.0e-9)" /><field89 name="Enter Fall Delay (default=1.0e-9)" /><field90 name="Enter Input Load (default=1.0e-12)" /></u56><u23 name="type">d_nand<field91 name="Enter Rise Delay (default=1.0e-9)" /><field92 name="Enter Fall Delay (default=1.0e-9)" /><field93 name="Enter Input Load (default=1.0e-12)" /></u23><u24 name="type">d_nand<field94 name="Enter Rise Delay (default=1.0e-9)" /><field95 name="Enter Fall Delay (default=1.0e-9)" /><field96 name="Enter Input Load (default=1.0e-12)" /></u24><u43 name="type">d_nand<field97 name="Enter Rise Delay (default=1.0e-9)" /><field98 name="Enter Fall Delay (default=1.0e-9)" /><field99 name="Enter Input Load (default=1.0e-12)" /></u43><u44 name="type">d_nand<field100 name="Enter Rise Delay (default=1.0e-9)" /><field101 name="Enter Fall Delay (default=1.0e-9)" /><field102 name="Enter Input Load (default=1.0e-12)" /></u44><u57 name="type">d_nand<field103 name="Enter Rise Delay (default=1.0e-9)" /><field104 name="Enter Fall Delay (default=1.0e-9)" /><field105 name="Enter Input Load (default=1.0e-12)" /></u57><u25 name="type">d_nand<field106 name="Enter Rise Delay (default=1.0e-9)" /><field107 name="Enter Fall Delay (default=1.0e-9)" /><field108 name="Enter Input Load (default=1.0e-12)" /></u25><u26 name="type">d_nand<field109 name="Enter Rise Delay (default=1.0e-9)" /><field110 name="Enter Fall Delay (default=1.0e-9)" /><field111 name="Enter Input Load (default=1.0e-12)" /></u26><u45 name="type">d_nand<field112 name="Enter Rise Delay (default=1.0e-9)" /><field113 name="Enter Fall Delay (default=1.0e-9)" /><field114 name="Enter Input Load (default=1.0e-12)" /></u45><u46 name="type">d_nand<field115 name="Enter Rise Delay (default=1.0e-9)" /><field116 name="Enter Fall Delay (default=1.0e-9)" /><field117 name="Enter Input Load (default=1.0e-12)" /></u46><u58 name="type">d_nand<field118 name="Enter Rise Delay (default=1.0e-9)" /><field119 name="Enter Fall Delay (default=1.0e-9)" /><field120 name="Enter Input Load (default=1.0e-12)" /></u58><u27 name="type">d_nand<field121 name="Enter Rise Delay (default=1.0e-9)" /><field122 name="Enter Fall Delay (default=1.0e-9)" /><field123 name="Enter Input Load (default=1.0e-12)" /></u27><u28 name="type">d_nand<field124 name="Enter Rise Delay (default=1.0e-9)" /><field125 name="Enter Fall Delay (default=1.0e-9)" /><field126 name="Enter Input Load (default=1.0e-12)" /></u28><u47 name="type">d_nand<field127 name="Enter Rise Delay (default=1.0e-9)" /><field128 name="Enter Fall Delay (default=1.0e-9)" /><field129 name="Enter Input Load (default=1.0e-12)" /></u47><u48 name="type">d_nand<field130 name="Enter Rise Delay (default=1.0e-9)" /><field131 name="Enter Fall Delay (default=1.0e-9)" /><field132 name="Enter Input Load (default=1.0e-12)" /></u48><u59 name="type">d_nand<field133 name="Enter Rise Delay (default=1.0e-9)" /><field134 name="Enter Fall Delay (default=1.0e-9)" /><field135 name="Enter Input Load (default=1.0e-12)" /></u59><u29 name="type">d_nand<field136 name="Enter Rise Delay (default=1.0e-9)" /><field137 name="Enter Fall Delay (default=1.0e-9)" /><field138 name="Enter Input Load (default=1.0e-12)" /></u29><u30 name="type">d_nand<field139 name="Enter Rise Delay (default=1.0e-9)" /><field140 name="Enter Fall Delay (default=1.0e-9)" /><field141 name="Enter Input Load (default=1.0e-12)" /></u30><u49 name="type">d_nand<field142 name="Enter Rise Delay (default=1.0e-9)" /><field143 name="Enter Fall Delay (default=1.0e-9)" /><field144 name="Enter Input Load (default=1.0e-12)" /></u49><u50 name="type">d_nand<field145 name="Enter Rise Delay (default=1.0e-9)" /><field146 name="Enter Fall Delay (default=1.0e-9)" /><field147 name="Enter Input Load (default=1.0e-12)" /></u50><u60 name="type">d_nand<field148 name="Enter Rise Delay (default=1.0e-9)" /><field149 name="Enter Fall Delay (default=1.0e-9)" /><field150 name="Enter Input Load (default=1.0e-12)" /></u60><u4 name="type">d_inverter<field151 name="Enter Rise Delay (default=1.0e-9)" /><field152 name="Enter Fall Delay (default=1.0e-9)" /><field153 name="Enter Input Load (default=1.0e-12)" /></u4><u9 name="type">d_inverter<field154 name="Enter Rise Delay (default=1.0e-9)" /><field155 name="Enter Fall Delay (default=1.0e-9)" /><field156 name="Enter Input Load (default=1.0e-12)" /></u9><u3 name="type">d_inverter<field157 name="Enter Rise Delay (default=1.0e-9)" /><field158 name="Enter Fall Delay (default=1.0e-9)" /><field159 name="Enter Input Load (default=1.0e-12)" /></u3><u7 name="type">d_inverter<field160 name="Enter Rise Delay (default=1.0e-9)" /><field161 name="Enter Fall Delay (default=1.0e-9)" /><field162 name="Enter Input Load (default=1.0e-12)" /></u7><u6 name="type">d_inverter<field163 name="Enter Rise Delay (default=1.0e-9)" /><field164 name="Enter Fall Delay (default=1.0e-9)" /><field165 name="Enter Input Load (default=1.0e-12)" /></u6><u10 name="type">d_inverter<field166 name="Enter Rise Delay (default=1.0e-9)" /><field167 name="Enter Fall Delay (default=1.0e-9)" /><field168 name="Enter Input Load (default=1.0e-12)" /></u10><u5 name="type">d_inverter<field169 name="Enter Rise Delay (default=1.0e-9)" /><field170 name="Enter Fall Delay (default=1.0e-9)" /><field171 name="Enter Input Load (default=1.0e-12)" /></u5><u8 name="type">d_inverter<field172 name="Enter Rise Delay (default=1.0e-9)" /><field173 name="Enter Fall Delay (default=1.0e-9)" /><field174 name="Enter Input Load (default=1.0e-12)" /></u8><u62 name="type">dac_bridge<field175 name="Enter value for out_low (default=0.0)" /><field176 name="Enter value for out_high (default=5.0)" /><field177 name="Enter value for out_undef (default=0.5)" /><field178 name="Enter value for input load (default=1.0e-12)" /><field179 name="Enter the Rise Time (default=1.0e-9)" /><field180 name="Enter the Fall Time (default=1.0e-9)" /></u62><u61 name="type">dac_bridge<field181 name="Enter value for out_low (default=0.0)" /><field182 name="Enter value for out_high (default=5.0)" /><field183 name="Enter value for out_undef (default=0.5)" /><field184 name="Enter value for input load (default=1.0e-12)" /><field185 name="Enter the Rise Time (default=1.0e-9)" /><field186 name="Enter the Fall Time (default=1.0e-9)" /></u61><u2 name="type">adc_bridge<field187 name="Enter value for in_low (default=1.0)" /><field188 name="Enter value for in_high (default=2.0)" /><field189 name="Enter Rise Delay (default=1.0e-9)" /><field190 name="Enter Fall Delay (default=1.0e-9)" /></u2></model><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/SN5442A_sub/analysis b/library/SubcircuitLibrary/SN5442A_sub/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file |