From 74387947b07c30cccb36bb125a363e605de07440 Mon Sep 17 00:00:00 2001 From: Sumanto Kar Date: Thu, 21 Nov 2024 23:44:10 +0530 Subject: SN5442A is a BCD-to-decimal decoder/driver --- .../SN5442A_sub/SN5442A_IC-cache.lib | 139 ++ .../SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir | 72 + .../SN5442A_sub/SN5442A_IC.cir.out | 256 ++++ .../SubcircuitLibrary/SN5442A_sub/SN5442A_IC.pro | 73 + .../SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sch | 1506 ++++++++++++++++++++ .../SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sub | 250 ++++ .../SN5442A_sub/SN5442A_IC_Previous_Values.xml | 1 + library/SubcircuitLibrary/SN5442A_sub/analysis | 1 + 8 files changed, 2298 insertions(+) create mode 100644 library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC-cache.lib create mode 100644 library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir create mode 100644 library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir.out create mode 100644 library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.pro create mode 100644 library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sch create mode 100644 library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sub create mode 100644 library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC_Previous_Values.xml create mode 100644 library/SubcircuitLibrary/SN5442A_sub/analysis diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC-cache.lib b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC-cache.lib new file mode 100644 index 00000000..aa224b4d --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC-cache.lib @@ -0,0 +1,139 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# adc_bridge_4 +# +DEF adc_bridge_4 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "adc_bridge_4" 0 300 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -350 350 350 -200 0 1 0 N +X IN1 1 -550 200 200 R 50 50 1 1 I +X IN2 2 -550 100 200 R 50 50 1 1 I +X IN3 3 -550 0 200 R 50 50 1 1 I +X IN4 4 -550 -100 200 R 50 50 1 1 I +X OUT1 5 550 200 200 L 50 50 1 1 O +X OUT2 6 550 100 200 L 50 50 1 1 O +X OUT3 7 550 0 200 L 50 50 1 1 O +X OUT4 8 550 -100 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" 0 -100 60 H V C CNN +F1 "d_inverter" 0 150 60 H V C CNN +F2 "" 50 -50 60 H V C CNN +F3 "" 50 -50 60 H V C CNN +DRAW +P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N +X ~ 1 -300 0 200 R 50 50 1 1 I +X ~ 2 300 0 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_nand +# +DEF d_nand U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_nand" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 +A 150 49 100 6 900 0 1 0 N 250 50 150 150 +P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N +X IN1 1 -450 100 200 R 50 50 1 1 I +X IN2 2 -450 0 200 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# dac_bridge_2 +# +DEF dac_bridge_2 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "dac_bridge_2" 50 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -250 200 350 -100 0 1 0 N +X IN1 1 -450 50 200 R 50 50 1 1 I +X IN2 2 -450 -50 200 R 50 50 1 1 I +X OUT1 3 550 50 200 L 50 50 1 1 O +X OUT4 4 550 -50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# dac_bridge_8 +# +DEF dac_bridge_8 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "dac_bridge_8" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -400 200 350 -700 0 1 0 N +X IN1 1 -600 50 200 R 50 50 1 1 I +X IN2 2 -600 -50 200 R 50 50 1 1 I +X IN3 3 -600 -150 200 R 50 50 1 1 I +X IN4 4 -600 -250 200 R 50 50 1 1 I +X IN5 5 -600 -350 200 R 50 50 1 1 I +X IN6 6 -600 -450 200 R 50 50 1 1 I +X IN7 7 -600 -550 200 R 50 50 1 1 I +X IN8 8 -600 -650 200 R 50 50 1 1 I +X OUT1 9 550 50 200 L 50 50 1 1 O +X OUT2 10 550 -50 200 L 50 50 1 1 O +X OUT3 11 550 -150 200 L 50 50 1 1 O +X OUT4 12 550 -250 200 L 50 50 1 1 O +X OUT5 13 550 -350 200 L 50 50 1 1 O +X OUT6 14 550 -450 200 L 50 50 1 1 O +X OUT7 15 550 -550 200 L 50 50 1 1 O +X OUT8 16 550 -650 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir new file mode 100644 index 00000000..1d25f385 --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir @@ -0,0 +1,72 @@ +* D:\FOSSEE\eSim\library\SubcircuitLibrary\SN5442A_IC\SN5442A_IC.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 06/30/24 18:49:44 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U11 Net-_U11-Pad1_ Net-_U11-Pad2_ Net-_U11-Pad3_ d_nand +U12 Net-_U10-Pad1_ Net-_U12-Pad2_ Net-_U12-Pad3_ d_nand +U31 Net-_U11-Pad3_ Net-_U11-Pad3_ Net-_U31-Pad3_ d_nand +U32 Net-_U12-Pad3_ Net-_U12-Pad3_ Net-_U32-Pad3_ d_nand +U51 Net-_U31-Pad3_ Net-_U32-Pad3_ Net-_U51-Pad3_ d_nand +U13 Net-_U13-Pad1_ Net-_U11-Pad2_ Net-_U13-Pad3_ d_nand +U14 Net-_U10-Pad1_ Net-_U12-Pad2_ Net-_U14-Pad3_ d_nand +U33 Net-_U13-Pad3_ Net-_U13-Pad3_ Net-_U33-Pad3_ d_nand +U34 Net-_U14-Pad3_ Net-_U14-Pad3_ Net-_U34-Pad3_ d_nand +U52 Net-_U33-Pad3_ Net-_U34-Pad3_ Net-_U52-Pad3_ d_nand +U15 Net-_U11-Pad1_ Net-_U15-Pad2_ Net-_U15-Pad3_ d_nand +U16 Net-_U10-Pad1_ Net-_U12-Pad2_ Net-_U16-Pad3_ d_nand +U35 Net-_U15-Pad3_ Net-_U15-Pad3_ Net-_U35-Pad3_ d_nand +U36 Net-_U16-Pad3_ Net-_U16-Pad3_ Net-_U36-Pad3_ d_nand +U53 Net-_U35-Pad3_ Net-_U36-Pad3_ Net-_U53-Pad3_ d_nand +U17 Net-_U13-Pad1_ Net-_U15-Pad2_ Net-_U17-Pad3_ d_nand +U18 Net-_U10-Pad1_ Net-_U12-Pad2_ Net-_U18-Pad3_ d_nand +U37 Net-_U17-Pad3_ Net-_U17-Pad3_ Net-_U37-Pad3_ d_nand +U38 Net-_U18-Pad3_ Net-_U18-Pad3_ Net-_U38-Pad3_ d_nand +U54 Net-_U37-Pad3_ Net-_U38-Pad3_ Net-_U54-Pad3_ d_nand +U19 Net-_U11-Pad1_ Net-_U11-Pad2_ Net-_U19-Pad3_ d_nand +U20 Net-_U10-Pad2_ Net-_U12-Pad2_ Net-_U20-Pad3_ d_nand +U39 Net-_U19-Pad3_ Net-_U19-Pad3_ Net-_U39-Pad3_ d_nand +U40 Net-_U20-Pad3_ Net-_U20-Pad3_ Net-_U40-Pad3_ d_nand +U55 Net-_U39-Pad3_ Net-_U40-Pad3_ Net-_U55-Pad3_ d_nand +U21 Net-_U13-Pad1_ Net-_U11-Pad2_ Net-_U21-Pad3_ d_nand +U22 Net-_U10-Pad2_ Net-_U12-Pad2_ Net-_U22-Pad3_ d_nand +U41 Net-_U21-Pad3_ Net-_U21-Pad3_ Net-_U41-Pad3_ d_nand +U42 Net-_U22-Pad3_ Net-_U22-Pad3_ Net-_U42-Pad3_ d_nand +U56 Net-_U41-Pad3_ Net-_U42-Pad3_ Net-_U56-Pad3_ d_nand +U23 Net-_U11-Pad1_ Net-_U15-Pad2_ Net-_U23-Pad3_ d_nand +U24 Net-_U10-Pad2_ Net-_U12-Pad2_ Net-_U24-Pad3_ d_nand +U43 Net-_U23-Pad3_ Net-_U23-Pad3_ Net-_U43-Pad3_ d_nand +U44 Net-_U24-Pad3_ Net-_U24-Pad3_ Net-_U44-Pad3_ d_nand +U57 Net-_U43-Pad3_ Net-_U44-Pad3_ Net-_U57-Pad3_ d_nand +U25 Net-_U13-Pad1_ Net-_U15-Pad2_ Net-_U25-Pad3_ d_nand +U26 Net-_U10-Pad2_ Net-_U12-Pad2_ Net-_U26-Pad3_ d_nand +U45 Net-_U25-Pad3_ Net-_U25-Pad3_ Net-_U45-Pad3_ d_nand +U46 Net-_U26-Pad3_ Net-_U26-Pad3_ Net-_U46-Pad3_ d_nand +U58 Net-_U45-Pad3_ Net-_U46-Pad3_ Net-_U58-Pad3_ d_nand +U27 Net-_U11-Pad1_ Net-_U11-Pad2_ Net-_U27-Pad3_ d_nand +U28 Net-_U10-Pad1_ Net-_U28-Pad2_ Net-_U28-Pad3_ d_nand +U47 Net-_U27-Pad3_ Net-_U27-Pad3_ Net-_U47-Pad3_ d_nand +U48 Net-_U28-Pad3_ Net-_U28-Pad3_ Net-_U48-Pad3_ d_nand +U59 Net-_U47-Pad3_ Net-_U48-Pad3_ Net-_U59-Pad3_ d_nand +U29 Net-_U13-Pad1_ Net-_U11-Pad2_ Net-_U29-Pad3_ d_nand +U30 Net-_U10-Pad1_ Net-_U28-Pad2_ Net-_U30-Pad3_ d_nand +U49 Net-_U29-Pad3_ Net-_U29-Pad3_ Net-_U49-Pad3_ d_nand +U50 Net-_U30-Pad3_ Net-_U30-Pad3_ Net-_U50-Pad3_ d_nand +U60 Net-_U49-Pad3_ Net-_U50-Pad3_ Net-_U60-Pad3_ d_nand +U4 Net-_U2-Pad5_ Net-_U11-Pad1_ d_inverter +U9 Net-_U11-Pad1_ Net-_U13-Pad1_ d_inverter +U3 Net-_U2-Pad6_ Net-_U11-Pad2_ d_inverter +U7 Net-_U11-Pad2_ Net-_U15-Pad2_ d_inverter +U6 Net-_U2-Pad7_ Net-_U10-Pad1_ d_inverter +U10 Net-_U10-Pad1_ Net-_U10-Pad2_ d_inverter +U5 Net-_U2-Pad8_ Net-_U12-Pad2_ d_inverter +U8 Net-_U12-Pad2_ Net-_U28-Pad2_ d_inverter +U62 Net-_U51-Pad3_ Net-_U52-Pad3_ Net-_U53-Pad3_ Net-_U54-Pad3_ Net-_U55-Pad3_ Net-_U56-Pad3_ Net-_U57-Pad3_ Net-_U58-Pad3_ Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ dac_bridge_8 +U61 Net-_U59-Pad3_ Net-_U60-Pad3_ Net-_U1-Pad9_ Net-_U1-Pad10_ dac_bridge_2 +U2 Net-_U1-Pad14_ Net-_U1-Pad13_ Net-_U1-Pad12_ Net-_U1-Pad11_ Net-_U2-Pad5_ Net-_U2-Pad6_ Net-_U2-Pad7_ Net-_U2-Pad8_ adc_bridge_4 +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ PORT + +.end diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir.out b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir.out new file mode 100644 index 00000000..014d39a6 --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.cir.out @@ -0,0 +1,256 @@ +* d:\fossee\esim\library\subcircuitlibrary\sn5442a_ic\sn5442a_ic.cir + +* u11 net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_nand +* u12 net-_u10-pad1_ net-_u12-pad2_ net-_u12-pad3_ d_nand +* u31 net-_u11-pad3_ net-_u11-pad3_ net-_u31-pad3_ d_nand +* u32 net-_u12-pad3_ net-_u12-pad3_ net-_u32-pad3_ d_nand +* u51 net-_u31-pad3_ net-_u32-pad3_ net-_u51-pad3_ d_nand +* u13 net-_u13-pad1_ net-_u11-pad2_ net-_u13-pad3_ d_nand +* u14 net-_u10-pad1_ net-_u12-pad2_ net-_u14-pad3_ d_nand +* u33 net-_u13-pad3_ net-_u13-pad3_ net-_u33-pad3_ d_nand +* u34 net-_u14-pad3_ net-_u14-pad3_ net-_u34-pad3_ d_nand +* u52 net-_u33-pad3_ net-_u34-pad3_ net-_u52-pad3_ d_nand +* u15 net-_u11-pad1_ net-_u15-pad2_ net-_u15-pad3_ d_nand +* u16 net-_u10-pad1_ net-_u12-pad2_ net-_u16-pad3_ d_nand +* u35 net-_u15-pad3_ net-_u15-pad3_ net-_u35-pad3_ d_nand +* u36 net-_u16-pad3_ net-_u16-pad3_ net-_u36-pad3_ d_nand +* u53 net-_u35-pad3_ net-_u36-pad3_ net-_u53-pad3_ d_nand +* u17 net-_u13-pad1_ net-_u15-pad2_ net-_u17-pad3_ d_nand +* u18 net-_u10-pad1_ net-_u12-pad2_ net-_u18-pad3_ d_nand +* u37 net-_u17-pad3_ net-_u17-pad3_ net-_u37-pad3_ d_nand +* u38 net-_u18-pad3_ net-_u18-pad3_ net-_u38-pad3_ d_nand +* u54 net-_u37-pad3_ net-_u38-pad3_ net-_u54-pad3_ d_nand +* u19 net-_u11-pad1_ net-_u11-pad2_ net-_u19-pad3_ d_nand +* u20 net-_u10-pad2_ net-_u12-pad2_ net-_u20-pad3_ d_nand +* u39 net-_u19-pad3_ net-_u19-pad3_ net-_u39-pad3_ d_nand +* u40 net-_u20-pad3_ net-_u20-pad3_ net-_u40-pad3_ d_nand +* u55 net-_u39-pad3_ net-_u40-pad3_ net-_u55-pad3_ d_nand +* u21 net-_u13-pad1_ net-_u11-pad2_ net-_u21-pad3_ d_nand +* u22 net-_u10-pad2_ net-_u12-pad2_ net-_u22-pad3_ d_nand +* u41 net-_u21-pad3_ net-_u21-pad3_ net-_u41-pad3_ d_nand +* u42 net-_u22-pad3_ net-_u22-pad3_ net-_u42-pad3_ d_nand +* u56 net-_u41-pad3_ net-_u42-pad3_ net-_u56-pad3_ d_nand +* u23 net-_u11-pad1_ net-_u15-pad2_ net-_u23-pad3_ d_nand +* u24 net-_u10-pad2_ net-_u12-pad2_ net-_u24-pad3_ d_nand +* u43 net-_u23-pad3_ net-_u23-pad3_ net-_u43-pad3_ d_nand +* u44 net-_u24-pad3_ net-_u24-pad3_ net-_u44-pad3_ d_nand +* u57 net-_u43-pad3_ net-_u44-pad3_ net-_u57-pad3_ d_nand +* u25 net-_u13-pad1_ net-_u15-pad2_ net-_u25-pad3_ d_nand +* u26 net-_u10-pad2_ net-_u12-pad2_ net-_u26-pad3_ d_nand +* u45 net-_u25-pad3_ net-_u25-pad3_ net-_u45-pad3_ d_nand +* u46 net-_u26-pad3_ net-_u26-pad3_ net-_u46-pad3_ d_nand +* u58 net-_u45-pad3_ net-_u46-pad3_ net-_u58-pad3_ d_nand +* u27 net-_u11-pad1_ net-_u11-pad2_ net-_u27-pad3_ d_nand +* u28 net-_u10-pad1_ net-_u28-pad2_ net-_u28-pad3_ d_nand +* u47 net-_u27-pad3_ net-_u27-pad3_ net-_u47-pad3_ d_nand +* u48 net-_u28-pad3_ net-_u28-pad3_ net-_u48-pad3_ d_nand +* u59 net-_u47-pad3_ net-_u48-pad3_ net-_u59-pad3_ d_nand +* u29 net-_u13-pad1_ net-_u11-pad2_ net-_u29-pad3_ d_nand +* u30 net-_u10-pad1_ net-_u28-pad2_ net-_u30-pad3_ d_nand +* u49 net-_u29-pad3_ net-_u29-pad3_ net-_u49-pad3_ d_nand +* u50 net-_u30-pad3_ net-_u30-pad3_ net-_u50-pad3_ d_nand +* u60 net-_u49-pad3_ net-_u50-pad3_ net-_u60-pad3_ d_nand +* u4 net-_u2-pad5_ net-_u11-pad1_ d_inverter +* u9 net-_u11-pad1_ net-_u13-pad1_ d_inverter +* u3 net-_u2-pad6_ net-_u11-pad2_ d_inverter +* u7 net-_u11-pad2_ net-_u15-pad2_ d_inverter +* u6 net-_u2-pad7_ net-_u10-pad1_ d_inverter +* u10 net-_u10-pad1_ net-_u10-pad2_ d_inverter +* u5 net-_u2-pad8_ net-_u12-pad2_ d_inverter +* u8 net-_u12-pad2_ net-_u28-pad2_ d_inverter +* u62 net-_u51-pad3_ net-_u52-pad3_ net-_u53-pad3_ net-_u54-pad3_ net-_u55-pad3_ net-_u56-pad3_ net-_u57-pad3_ net-_u58-pad3_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ dac_bridge_8 +* u61 net-_u59-pad3_ net-_u60-pad3_ net-_u1-pad9_ net-_u1-pad10_ dac_bridge_2 +* u2 net-_u1-pad14_ net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ net-_u2-pad8_ adc_bridge_4 +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ port +a1 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11 +a2 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u12-pad3_ u12 +a3 [net-_u11-pad3_ net-_u11-pad3_ ] net-_u31-pad3_ u31 +a4 [net-_u12-pad3_ net-_u12-pad3_ ] net-_u32-pad3_ u32 +a5 [net-_u31-pad3_ net-_u32-pad3_ ] net-_u51-pad3_ u51 +a6 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u13-pad3_ u13 +a7 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u14-pad3_ u14 +a8 [net-_u13-pad3_ net-_u13-pad3_ ] net-_u33-pad3_ u33 +a9 [net-_u14-pad3_ net-_u14-pad3_ ] net-_u34-pad3_ u34 +a10 [net-_u33-pad3_ net-_u34-pad3_ ] net-_u52-pad3_ u52 +a11 [net-_u11-pad1_ net-_u15-pad2_ ] net-_u15-pad3_ u15 +a12 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u16-pad3_ u16 +a13 [net-_u15-pad3_ net-_u15-pad3_ ] net-_u35-pad3_ u35 +a14 [net-_u16-pad3_ net-_u16-pad3_ ] net-_u36-pad3_ u36 +a15 [net-_u35-pad3_ net-_u36-pad3_ ] net-_u53-pad3_ u53 +a16 [net-_u13-pad1_ net-_u15-pad2_ ] net-_u17-pad3_ u17 +a17 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u18-pad3_ u18 +a18 [net-_u17-pad3_ net-_u17-pad3_ ] net-_u37-pad3_ u37 +a19 [net-_u18-pad3_ net-_u18-pad3_ ] net-_u38-pad3_ u38 +a20 [net-_u37-pad3_ net-_u38-pad3_ ] net-_u54-pad3_ u54 +a21 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u19-pad3_ u19 +a22 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u20-pad3_ u20 +a23 [net-_u19-pad3_ net-_u19-pad3_ ] net-_u39-pad3_ u39 +a24 [net-_u20-pad3_ net-_u20-pad3_ ] net-_u40-pad3_ u40 +a25 [net-_u39-pad3_ net-_u40-pad3_ ] net-_u55-pad3_ u55 +a26 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u21-pad3_ u21 +a27 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u22-pad3_ u22 +a28 [net-_u21-pad3_ net-_u21-pad3_ ] net-_u41-pad3_ u41 +a29 [net-_u22-pad3_ net-_u22-pad3_ ] net-_u42-pad3_ u42 +a30 [net-_u41-pad3_ net-_u42-pad3_ ] net-_u56-pad3_ u56 +a31 [net-_u11-pad1_ net-_u15-pad2_ ] net-_u23-pad3_ u23 +a32 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u24-pad3_ u24 +a33 [net-_u23-pad3_ net-_u23-pad3_ ] net-_u43-pad3_ u43 +a34 [net-_u24-pad3_ net-_u24-pad3_ ] net-_u44-pad3_ u44 +a35 [net-_u43-pad3_ net-_u44-pad3_ ] net-_u57-pad3_ u57 +a36 [net-_u13-pad1_ net-_u15-pad2_ ] net-_u25-pad3_ u25 +a37 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u26-pad3_ u26 +a38 [net-_u25-pad3_ net-_u25-pad3_ ] net-_u45-pad3_ u45 +a39 [net-_u26-pad3_ net-_u26-pad3_ ] net-_u46-pad3_ u46 +a40 [net-_u45-pad3_ net-_u46-pad3_ ] net-_u58-pad3_ u58 +a41 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u27-pad3_ u27 +a42 [net-_u10-pad1_ net-_u28-pad2_ ] net-_u28-pad3_ u28 +a43 [net-_u27-pad3_ net-_u27-pad3_ ] net-_u47-pad3_ u47 +a44 [net-_u28-pad3_ net-_u28-pad3_ ] net-_u48-pad3_ u48 +a45 [net-_u47-pad3_ net-_u48-pad3_ ] net-_u59-pad3_ u59 +a46 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u29-pad3_ u29 +a47 [net-_u10-pad1_ net-_u28-pad2_ ] net-_u30-pad3_ u30 +a48 [net-_u29-pad3_ net-_u29-pad3_ ] net-_u49-pad3_ u49 +a49 [net-_u30-pad3_ net-_u30-pad3_ ] net-_u50-pad3_ u50 +a50 [net-_u49-pad3_ net-_u50-pad3_ ] net-_u60-pad3_ u60 +a51 net-_u2-pad5_ net-_u11-pad1_ u4 +a52 net-_u11-pad1_ net-_u13-pad1_ u9 +a53 net-_u2-pad6_ net-_u11-pad2_ u3 +a54 net-_u11-pad2_ net-_u15-pad2_ u7 +a55 net-_u2-pad7_ net-_u10-pad1_ u6 +a56 net-_u10-pad1_ net-_u10-pad2_ u10 +a57 net-_u2-pad8_ net-_u12-pad2_ u5 +a58 net-_u12-pad2_ net-_u28-pad2_ u8 +a59 [net-_u51-pad3_ net-_u52-pad3_ net-_u53-pad3_ net-_u54-pad3_ net-_u55-pad3_ net-_u56-pad3_ net-_u57-pad3_ net-_u58-pad3_ ] [net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ ] u62 +a60 [net-_u59-pad3_ net-_u60-pad3_ ] [net-_u1-pad9_ net-_u1-pad10_ ] u61 +a61 [net-_u1-pad14_ net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ ] [net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ net-_u2-pad8_ ] u2 +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u11 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u12 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u31 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u32 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u51 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u13 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u14 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u33 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u34 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u52 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u15 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u16 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u35 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u36 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u53 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u17 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u18 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u37 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u38 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u54 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u19 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u20 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u39 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u40 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u55 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u21 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u22 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u41 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u42 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u56 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u23 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u24 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u43 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u44 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u57 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u25 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u26 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u45 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u46 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u58 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u27 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u28 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u47 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u48 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u59 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u29 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u30 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u49 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u50 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u60 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: dac_bridge_8, NgSpice Name: dac_bridge +.model u62 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) +* Schematic Name: dac_bridge_2, NgSpice Name: dac_bridge +.model u61 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) +* Schematic Name: adc_bridge_4, NgSpice Name: adc_bridge +.model u2 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.pro b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sch b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sch new file mode 100644 index 00000000..d1cc4d39 --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sch @@ -0,0 +1,1506 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +LIBS:SN5442A-cache +EELAYER 25 0 +EELAYER END +$Descr User 23622 27559 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L d_nand U11 +U 1 1 66815193 +P 13050 4450 +F 0 "U11" H 13050 4450 60 0000 C CNN +F 1 "d_nand" H 13100 4550 60 0000 C CNN +F 2 "" H 13050 4450 60 0000 C CNN +F 3 "" H 13050 4450 60 0000 C CNN + 1 13050 4450 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U12 +U 1 1 66815194 +P 13050 5000 +F 0 "U12" H 13050 5000 60 0000 C CNN +F 1 "d_nand" H 13100 5100 60 0000 C CNN +F 2 "" H 13050 5000 60 0000 C CNN +F 3 "" H 13050 5000 60 0000 C CNN + 1 13050 5000 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U31 +U 1 1 66815195 +P 14200 4450 +F 0 "U31" H 14200 4450 60 0000 C CNN +F 1 "d_nand" H 14250 4550 60 0000 C CNN +F 2 "" H 14200 4450 60 0000 C CNN +F 3 "" H 14200 4450 60 0000 C CNN + 1 14200 4450 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U32 +U 1 1 66815196 +P 14200 5000 +F 0 "U32" H 14200 5000 60 0000 C CNN +F 1 "d_nand" H 14250 5100 60 0000 C CNN +F 2 "" H 14200 5000 60 0000 C CNN +F 3 "" H 14200 5000 60 0000 C CNN + 1 14200 5000 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U51 +U 1 1 66815197 +P 15250 4650 +F 0 "U51" H 15250 4650 60 0000 C CNN +F 1 "d_nand" H 15300 4750 60 0000 C CNN +F 2 "" H 15250 4650 60 0000 C CNN +F 3 "" H 15250 4650 60 0000 C CNN + 1 15250 4650 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U13 +U 1 1 66815198 +P 13050 6050 +F 0 "U13" H 13050 6050 60 0000 C CNN +F 1 "d_nand" H 13100 6150 60 0000 C CNN +F 2 "" H 13050 6050 60 0000 C CNN +F 3 "" H 13050 6050 60 0000 C CNN + 1 13050 6050 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U14 +U 1 1 66815199 +P 13050 6600 +F 0 "U14" H 13050 6600 60 0000 C CNN +F 1 "d_nand" H 13100 6700 60 0000 C CNN +F 2 "" H 13050 6600 60 0000 C CNN +F 3 "" H 13050 6600 60 0000 C CNN + 1 13050 6600 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U33 +U 1 1 6681519A +P 14200 6050 +F 0 "U33" H 14200 6050 60 0000 C CNN +F 1 "d_nand" H 14250 6150 60 0000 C CNN +F 2 "" H 14200 6050 60 0000 C CNN +F 3 "" H 14200 6050 60 0000 C CNN + 1 14200 6050 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U34 +U 1 1 6681519B +P 14200 6600 +F 0 "U34" H 14200 6600 60 0000 C CNN +F 1 "d_nand" H 14250 6700 60 0000 C CNN +F 2 "" H 14200 6600 60 0000 C CNN +F 3 "" H 14200 6600 60 0000 C CNN + 1 14200 6600 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U52 +U 1 1 6681519C +P 15250 6250 +F 0 "U52" H 15250 6250 60 0000 C CNN +F 1 "d_nand" H 15300 6350 60 0000 C CNN +F 2 "" H 15250 6250 60 0000 C CNN +F 3 "" H 15250 6250 60 0000 C CNN + 1 15250 6250 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U15 +U 1 1 6681519D +P 13050 7750 +F 0 "U15" H 13050 7750 60 0000 C CNN +F 1 "d_nand" H 13100 7850 60 0000 C CNN +F 2 "" H 13050 7750 60 0000 C CNN +F 3 "" H 13050 7750 60 0000 C CNN + 1 13050 7750 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U16 +U 1 1 6681519E +P 13050 8300 +F 0 "U16" H 13050 8300 60 0000 C CNN +F 1 "d_nand" H 13100 8400 60 0000 C CNN +F 2 "" H 13050 8300 60 0000 C CNN +F 3 "" H 13050 8300 60 0000 C CNN + 1 13050 8300 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U35 +U 1 1 6681519F +P 14200 7750 +F 0 "U35" H 14200 7750 60 0000 C CNN +F 1 "d_nand" H 14250 7850 60 0000 C CNN +F 2 "" H 14200 7750 60 0000 C CNN +F 3 "" H 14200 7750 60 0000 C CNN + 1 14200 7750 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U36 +U 1 1 668151A0 +P 14200 8300 +F 0 "U36" H 14200 8300 60 0000 C CNN +F 1 "d_nand" H 14250 8400 60 0000 C CNN +F 2 "" H 14200 8300 60 0000 C CNN +F 3 "" H 14200 8300 60 0000 C CNN + 1 14200 8300 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U53 +U 1 1 668151A1 +P 15250 7950 +F 0 "U53" H 15250 7950 60 0000 C CNN +F 1 "d_nand" H 15300 8050 60 0000 C CNN +F 2 "" H 15250 7950 60 0000 C CNN +F 3 "" H 15250 7950 60 0000 C CNN + 1 15250 7950 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U17 +U 1 1 668151A2 +P 13050 9250 +F 0 "U17" H 13050 9250 60 0000 C CNN +F 1 "d_nand" H 13100 9350 60 0000 C CNN +F 2 "" H 13050 9250 60 0000 C CNN +F 3 "" H 13050 9250 60 0000 C CNN + 1 13050 9250 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U18 +U 1 1 668151A3 +P 13050 9800 +F 0 "U18" H 13050 9800 60 0000 C CNN +F 1 "d_nand" H 13100 9900 60 0000 C CNN +F 2 "" H 13050 9800 60 0000 C CNN +F 3 "" H 13050 9800 60 0000 C CNN + 1 13050 9800 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U37 +U 1 1 668151A4 +P 14200 9250 +F 0 "U37" H 14200 9250 60 0000 C CNN +F 1 "d_nand" H 14250 9350 60 0000 C CNN +F 2 "" H 14200 9250 60 0000 C CNN +F 3 "" H 14200 9250 60 0000 C CNN + 1 14200 9250 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U38 +U 1 1 668151A5 +P 14200 9800 +F 0 "U38" H 14200 9800 60 0000 C CNN +F 1 "d_nand" H 14250 9900 60 0000 C CNN +F 2 "" H 14200 9800 60 0000 C CNN +F 3 "" H 14200 9800 60 0000 C CNN + 1 14200 9800 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U54 +U 1 1 668151A6 +P 15250 9450 +F 0 "U54" H 15250 9450 60 0000 C CNN +F 1 "d_nand" H 15300 9550 60 0000 C CNN +F 2 "" H 15250 9450 60 0000 C CNN +F 3 "" H 15250 9450 60 0000 C CNN + 1 15250 9450 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U19 +U 1 1 668151A7 +P 13050 10850 +F 0 "U19" H 13050 10850 60 0000 C CNN +F 1 "d_nand" H 13100 10950 60 0000 C CNN +F 2 "" H 13050 10850 60 0000 C CNN +F 3 "" H 13050 10850 60 0000 C CNN + 1 13050 10850 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U20 +U 1 1 668151A8 +P 13050 11400 +F 0 "U20" H 13050 11400 60 0000 C CNN +F 1 "d_nand" H 13100 11500 60 0000 C CNN +F 2 "" H 13050 11400 60 0000 C CNN +F 3 "" H 13050 11400 60 0000 C CNN + 1 13050 11400 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U39 +U 1 1 668151A9 +P 14200 10850 +F 0 "U39" H 14200 10850 60 0000 C CNN +F 1 "d_nand" H 14250 10950 60 0000 C CNN +F 2 "" H 14200 10850 60 0000 C CNN +F 3 "" H 14200 10850 60 0000 C CNN + 1 14200 10850 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U40 +U 1 1 668151AA +P 14200 11400 +F 0 "U40" H 14200 11400 60 0000 C CNN +F 1 "d_nand" H 14250 11500 60 0000 C CNN +F 2 "" H 14200 11400 60 0000 C CNN +F 3 "" H 14200 11400 60 0000 C CNN + 1 14200 11400 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U55 +U 1 1 668151AB +P 15250 11050 +F 0 "U55" H 15250 11050 60 0000 C CNN +F 1 "d_nand" H 15300 11150 60 0000 C CNN +F 2 "" H 15250 11050 60 0000 C CNN +F 3 "" H 15250 11050 60 0000 C CNN + 1 15250 11050 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U21 +U 1 1 668151AC +P 13050 12150 +F 0 "U21" H 13050 12150 60 0000 C CNN +F 1 "d_nand" H 13100 12250 60 0000 C CNN +F 2 "" H 13050 12150 60 0000 C CNN +F 3 "" H 13050 12150 60 0000 C CNN + 1 13050 12150 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U22 +U 1 1 668151AD +P 13050 12700 +F 0 "U22" H 13050 12700 60 0000 C CNN +F 1 "d_nand" H 13100 12800 60 0000 C CNN +F 2 "" H 13050 12700 60 0000 C CNN +F 3 "" H 13050 12700 60 0000 C CNN + 1 13050 12700 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U41 +U 1 1 668151AE +P 14200 12150 +F 0 "U41" H 14200 12150 60 0000 C CNN +F 1 "d_nand" H 14250 12250 60 0000 C CNN +F 2 "" H 14200 12150 60 0000 C CNN +F 3 "" H 14200 12150 60 0000 C CNN + 1 14200 12150 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U42 +U 1 1 668151AF +P 14200 12700 +F 0 "U42" H 14200 12700 60 0000 C CNN +F 1 "d_nand" H 14250 12800 60 0000 C CNN +F 2 "" H 14200 12700 60 0000 C CNN +F 3 "" H 14200 12700 60 0000 C CNN + 1 14200 12700 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U56 +U 1 1 668151B0 +P 15250 12350 +F 0 "U56" H 15250 12350 60 0000 C CNN +F 1 "d_nand" H 15300 12450 60 0000 C CNN +F 2 "" H 15250 12350 60 0000 C CNN +F 3 "" H 15250 12350 60 0000 C CNN + 1 15250 12350 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U23 +U 1 1 668151B1 +P 13050 13400 +F 0 "U23" H 13050 13400 60 0000 C CNN +F 1 "d_nand" H 13100 13500 60 0000 C CNN +F 2 "" H 13050 13400 60 0000 C CNN +F 3 "" H 13050 13400 60 0000 C CNN + 1 13050 13400 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U24 +U 1 1 668151B2 +P 13050 13950 +F 0 "U24" H 13050 13950 60 0000 C CNN +F 1 "d_nand" H 13100 14050 60 0000 C CNN +F 2 "" H 13050 13950 60 0000 C CNN +F 3 "" H 13050 13950 60 0000 C CNN + 1 13050 13950 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U43 +U 1 1 668151B3 +P 14200 13400 +F 0 "U43" H 14200 13400 60 0000 C CNN +F 1 "d_nand" H 14250 13500 60 0000 C CNN +F 2 "" H 14200 13400 60 0000 C CNN +F 3 "" H 14200 13400 60 0000 C CNN + 1 14200 13400 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U44 +U 1 1 668151B4 +P 14200 13950 +F 0 "U44" H 14200 13950 60 0000 C CNN +F 1 "d_nand" H 14250 14050 60 0000 C CNN +F 2 "" H 14200 13950 60 0000 C CNN +F 3 "" H 14200 13950 60 0000 C CNN + 1 14200 13950 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U57 +U 1 1 668151B5 +P 15250 13600 +F 0 "U57" H 15250 13600 60 0000 C CNN +F 1 "d_nand" H 15300 13700 60 0000 C CNN +F 2 "" H 15250 13600 60 0000 C CNN +F 3 "" H 15250 13600 60 0000 C CNN + 1 15250 13600 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U25 +U 1 1 668151B6 +P 13050 14850 +F 0 "U25" H 13050 14850 60 0000 C CNN +F 1 "d_nand" H 13100 14950 60 0000 C CNN +F 2 "" H 13050 14850 60 0000 C CNN +F 3 "" H 13050 14850 60 0000 C CNN + 1 13050 14850 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U26 +U 1 1 668151B7 +P 13050 15400 +F 0 "U26" H 13050 15400 60 0000 C CNN +F 1 "d_nand" H 13100 15500 60 0000 C CNN +F 2 "" H 13050 15400 60 0000 C CNN +F 3 "" H 13050 15400 60 0000 C CNN + 1 13050 15400 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U45 +U 1 1 668151B8 +P 14200 14850 +F 0 "U45" H 14200 14850 60 0000 C CNN +F 1 "d_nand" H 14250 14950 60 0000 C CNN +F 2 "" H 14200 14850 60 0000 C CNN +F 3 "" H 14200 14850 60 0000 C CNN + 1 14200 14850 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U46 +U 1 1 668151B9 +P 14200 15400 +F 0 "U46" H 14200 15400 60 0000 C CNN +F 1 "d_nand" H 14250 15500 60 0000 C CNN +F 2 "" H 14200 15400 60 0000 C CNN +F 3 "" H 14200 15400 60 0000 C CNN + 1 14200 15400 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U58 +U 1 1 668151BA +P 15250 15050 +F 0 "U58" H 15250 15050 60 0000 C CNN +F 1 "d_nand" H 15300 15150 60 0000 C CNN +F 2 "" H 15250 15050 60 0000 C CNN +F 3 "" H 15250 15050 60 0000 C CNN + 1 15250 15050 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U27 +U 1 1 668151BB +P 13050 16250 +F 0 "U27" H 13050 16250 60 0000 C CNN +F 1 "d_nand" H 13100 16350 60 0000 C CNN +F 2 "" H 13050 16250 60 0000 C CNN +F 3 "" H 13050 16250 60 0000 C CNN + 1 13050 16250 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U28 +U 1 1 668151BC +P 13050 16800 +F 0 "U28" H 13050 16800 60 0000 C CNN +F 1 "d_nand" H 13100 16900 60 0000 C CNN +F 2 "" H 13050 16800 60 0000 C CNN +F 3 "" H 13050 16800 60 0000 C CNN + 1 13050 16800 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U47 +U 1 1 668151BD +P 14200 16250 +F 0 "U47" H 14200 16250 60 0000 C CNN +F 1 "d_nand" H 14250 16350 60 0000 C CNN +F 2 "" H 14200 16250 60 0000 C CNN +F 3 "" H 14200 16250 60 0000 C CNN + 1 14200 16250 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U48 +U 1 1 668151BE +P 14200 16800 +F 0 "U48" H 14200 16800 60 0000 C CNN +F 1 "d_nand" H 14250 16900 60 0000 C CNN +F 2 "" H 14200 16800 60 0000 C CNN +F 3 "" H 14200 16800 60 0000 C CNN + 1 14200 16800 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U59 +U 1 1 668151BF +P 15250 16450 +F 0 "U59" H 15250 16450 60 0000 C CNN +F 1 "d_nand" H 15300 16550 60 0000 C CNN +F 2 "" H 15250 16450 60 0000 C CNN +F 3 "" H 15250 16450 60 0000 C CNN + 1 15250 16450 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U29 +U 1 1 668151C0 +P 13050 17800 +F 0 "U29" H 13050 17800 60 0000 C CNN +F 1 "d_nand" H 13100 17900 60 0000 C CNN +F 2 "" H 13050 17800 60 0000 C CNN +F 3 "" H 13050 17800 60 0000 C CNN + 1 13050 17800 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U30 +U 1 1 668151C1 +P 13050 18350 +F 0 "U30" H 13050 18350 60 0000 C CNN +F 1 "d_nand" H 13100 18450 60 0000 C CNN +F 2 "" H 13050 18350 60 0000 C CNN +F 3 "" H 13050 18350 60 0000 C CNN + 1 13050 18350 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U49 +U 1 1 668151C2 +P 14200 17800 +F 0 "U49" H 14200 17800 60 0000 C CNN +F 1 "d_nand" H 14250 17900 60 0000 C CNN +F 2 "" H 14200 17800 60 0000 C CNN +F 3 "" H 14200 17800 60 0000 C CNN + 1 14200 17800 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U50 +U 1 1 668151C3 +P 14200 18350 +F 0 "U50" H 14200 18350 60 0000 C CNN +F 1 "d_nand" H 14250 18450 60 0000 C CNN +F 2 "" H 14200 18350 60 0000 C CNN +F 3 "" H 14200 18350 60 0000 C CNN + 1 14200 18350 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U60 +U 1 1 668151C4 +P 15250 18000 +F 0 "U60" H 15250 18000 60 0000 C CNN +F 1 "d_nand" H 15300 18100 60 0000 C CNN +F 2 "" H 15250 18000 60 0000 C CNN +F 3 "" H 15250 18000 60 0000 C CNN + 1 15250 18000 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U4 +U 1 1 668151C5 +P 9250 4650 +F 0 "U4" H 9250 4550 60 0000 C CNN +F 1 "d_inverter" H 9250 4800 60 0000 C CNN +F 2 "" H 9300 4600 60 0000 C CNN +F 3 "" H 9300 4600 60 0000 C CNN + 1 9250 4650 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U9 +U 1 1 668151C6 +P 10200 6350 +F 0 "U9" H 10200 6250 60 0000 C CNN +F 1 "d_inverter" H 10200 6500 60 0000 C CNN +F 2 "" H 10250 6300 60 0000 C CNN +F 3 "" H 10250 6300 60 0000 C CNN + 1 10200 6350 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U3 +U 1 1 668151C7 +P 9100 8700 +F 0 "U3" H 9100 8600 60 0000 C CNN +F 1 "d_inverter" H 9100 8850 60 0000 C CNN +F 2 "" H 9150 8650 60 0000 C CNN +F 3 "" H 9150 8650 60 0000 C CNN + 1 9100 8700 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U7 +U 1 1 668151C8 +P 9900 9200 +F 0 "U7" H 9900 9100 60 0000 C CNN +F 1 "d_inverter" H 9900 9350 60 0000 C CNN +F 2 "" H 9950 9150 60 0000 C CNN +F 3 "" H 9950 9150 60 0000 C CNN + 1 9900 9200 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U6 +U 1 1 668151C9 +P 9450 10450 +F 0 "U6" H 9450 10350 60 0000 C CNN +F 1 "d_inverter" H 9450 10600 60 0000 C CNN +F 2 "" H 9500 10400 60 0000 C CNN +F 3 "" H 9500 10400 60 0000 C CNN + 1 9450 10450 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U10 +U 1 1 668151CA +P 10400 11850 +F 0 "U10" H 10400 11750 60 0000 C CNN +F 1 "d_inverter" H 10400 12000 60 0000 C CNN +F 2 "" H 10450 11800 60 0000 C CNN +F 3 "" H 10450 11800 60 0000 C CNN + 1 10400 11850 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U5 +U 1 1 668151CB +P 9250 15400 +F 0 "U5" H 9250 15300 60 0000 C CNN +F 1 "d_inverter" H 9250 15550 60 0000 C CNN +F 2 "" H 9300 15350 60 0000 C CNN +F 3 "" H 9300 15350 60 0000 C CNN + 1 9250 15400 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U8 +U 1 1 668151CC +P 10000 16800 +F 0 "U8" H 10000 16700 60 0000 C CNN +F 1 "d_inverter" H 10000 16950 60 0000 C CNN +F 2 "" H 10050 16750 60 0000 C CNN +F 3 "" H 10050 16750 60 0000 C CNN + 1 10000 16800 + 1 0 0 -1 +$EndComp +$Comp +L dac_bridge_8 U62 +U 1 1 668151CD +P 17750 9400 +F 0 "U62" H 17750 9400 60 0000 C CNN +F 1 "dac_bridge_8" H 17750 9550 60 0000 C CNN +F 2 "" H 17750 9400 60 0000 C CNN +F 3 "" H 17750 9400 60 0000 C CNN + 1 17750 9400 + 1 0 0 -1 +$EndComp +$Comp +L dac_bridge_2 U61 +U 1 1 668151CE +P 17250 17150 +F 0 "U61" H 17250 17150 60 0000 C CNN +F 1 "dac_bridge_2" H 17300 17300 60 0000 C CNN +F 2 "" H 17250 17150 60 0000 C CNN +F 3 "" H 17250 17150 60 0000 C CNN + 1 17250 17150 + 1 0 0 -1 +$EndComp +$Comp +L adc_bridge_4 U2 +U 1 1 668151D9 +P 7000 10200 +F 0 "U2" H 7000 10200 60 0000 C CNN +F 1 "adc_bridge_4" H 7000 10500 60 0000 C CNN +F 2 "" H 7000 10200 60 0000 C CNN +F 3 "" H 7000 10200 60 0000 C CNN + 1 7000 10200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 13750 4350 13700 4350 +Wire Wire Line + 13700 4350 13700 4450 +Wire Wire Line + 13700 4450 13750 4450 +Wire Wire Line + 13500 4400 13700 4400 +Connection ~ 13700 4400 +Wire Wire Line + 13750 4900 13700 4900 +Wire Wire Line + 13700 4900 13700 5000 +Wire Wire Line + 13700 5000 13750 5000 +Wire Wire Line + 13500 4950 13700 4950 +Connection ~ 13700 4950 +Wire Wire Line + 14650 4400 14750 4400 +Wire Wire Line + 14750 4400 14750 4550 +Wire Wire Line + 14750 4550 14800 4550 +Wire Wire Line + 14800 4650 14750 4650 +Wire Wire Line + 14750 4650 14750 4950 +Wire Wire Line + 14750 4950 14650 4950 +Wire Wire Line + 13700 5950 13700 6050 +Wire Wire Line + 13700 6050 13750 6050 +Wire Wire Line + 13500 6000 13700 6000 +Connection ~ 13700 6000 +Wire Wire Line + 13750 6500 13700 6500 +Wire Wire Line + 13700 6500 13700 6600 +Wire Wire Line + 13700 6600 13750 6600 +Wire Wire Line + 13500 6550 13700 6550 +Connection ~ 13700 6550 +Wire Wire Line + 14650 6000 14750 6000 +Wire Wire Line + 14750 6000 14750 6150 +Wire Wire Line + 14750 6150 14800 6150 +Wire Wire Line + 14800 6250 14750 6250 +Wire Wire Line + 14750 6250 14750 6550 +Wire Wire Line + 14750 6550 14650 6550 +Wire Wire Line + 13700 5950 13750 5950 +Wire Wire Line + 13700 7650 13700 7750 +Wire Wire Line + 13700 7750 13750 7750 +Wire Wire Line + 13500 7700 13700 7700 +Connection ~ 13700 7700 +Wire Wire Line + 13750 8200 13700 8200 +Wire Wire Line + 13700 8200 13700 8300 +Wire Wire Line + 13700 8300 13750 8300 +Wire Wire Line + 13500 8250 13700 8250 +Connection ~ 13700 8250 +Wire Wire Line + 14650 7700 14750 7700 +Wire Wire Line + 14750 7700 14750 7850 +Wire Wire Line + 14750 7850 14800 7850 +Wire Wire Line + 14800 7950 14750 7950 +Wire Wire Line + 14750 7950 14750 8250 +Wire Wire Line + 14750 8250 14650 8250 +Wire Wire Line + 13700 7650 13750 7650 +Wire Wire Line + 13700 9150 13700 9250 +Wire Wire Line + 13700 9250 13750 9250 +Wire Wire Line + 13500 9200 13700 9200 +Connection ~ 13700 9200 +Wire Wire Line + 13750 9700 13700 9700 +Wire Wire Line + 13700 9700 13700 9800 +Wire Wire Line + 13700 9800 13750 9800 +Wire Wire Line + 13500 9750 13700 9750 +Connection ~ 13700 9750 +Wire Wire Line + 14650 9200 14750 9200 +Wire Wire Line + 14750 9200 14750 9350 +Wire Wire Line + 14750 9350 14800 9350 +Wire Wire Line + 14800 9450 14750 9450 +Wire Wire Line + 14750 9450 14750 9750 +Wire Wire Line + 14750 9750 14650 9750 +Wire Wire Line + 13700 9150 13750 9150 +Wire Wire Line + 13700 10750 13700 10850 +Wire Wire Line + 13700 10850 13750 10850 +Wire Wire Line + 13500 10800 13700 10800 +Connection ~ 13700 10800 +Wire Wire Line + 13750 11300 13700 11300 +Wire Wire Line + 13700 11300 13700 11400 +Wire Wire Line + 13700 11400 13750 11400 +Wire Wire Line + 13500 11350 13700 11350 +Connection ~ 13700 11350 +Wire Wire Line + 14650 10800 14750 10800 +Wire Wire Line + 14750 10800 14750 10950 +Wire Wire Line + 14750 10950 14800 10950 +Wire Wire Line + 14800 11050 14750 11050 +Wire Wire Line + 14750 11050 14750 11350 +Wire Wire Line + 14750 11350 14650 11350 +Wire Wire Line + 13700 10750 13750 10750 +Wire Wire Line + 13750 12050 13700 12050 +Wire Wire Line + 13700 12050 13700 12150 +Wire Wire Line + 13700 12150 13750 12150 +Wire Wire Line + 13500 12100 13700 12100 +Connection ~ 13700 12100 +Wire Wire Line + 13750 12600 13700 12600 +Wire Wire Line + 13700 12600 13700 12700 +Wire Wire Line + 13700 12700 13750 12700 +Wire Wire Line + 13500 12650 13700 12650 +Connection ~ 13700 12650 +Wire Wire Line + 14650 12100 14750 12100 +Wire Wire Line + 14750 12100 14750 12250 +Wire Wire Line + 14750 12250 14800 12250 +Wire Wire Line + 14800 12350 14750 12350 +Wire Wire Line + 14750 12350 14750 12650 +Wire Wire Line + 14750 12650 14650 12650 +Wire Wire Line + 13700 13300 13700 13400 +Wire Wire Line + 13700 13400 13750 13400 +Wire Wire Line + 13500 13350 13700 13350 +Connection ~ 13700 13350 +Wire Wire Line + 13750 13850 13700 13850 +Wire Wire Line + 13700 13850 13700 13950 +Wire Wire Line + 13700 13950 13750 13950 +Wire Wire Line + 13500 13900 13700 13900 +Connection ~ 13700 13900 +Wire Wire Line + 14650 13350 14750 13350 +Wire Wire Line + 14750 13350 14750 13500 +Wire Wire Line + 14750 13500 14800 13500 +Wire Wire Line + 14800 13600 14750 13600 +Wire Wire Line + 14750 13600 14750 13900 +Wire Wire Line + 14750 13900 14650 13900 +Wire Wire Line + 13700 13300 13750 13300 +Wire Wire Line + 13700 14750 13700 14850 +Wire Wire Line + 13700 14850 13750 14850 +Wire Wire Line + 13500 14800 13700 14800 +Connection ~ 13700 14800 +Wire Wire Line + 13750 15300 13700 15300 +Wire Wire Line + 13700 15300 13700 15400 +Wire Wire Line + 13700 15400 13750 15400 +Wire Wire Line + 13500 15350 13700 15350 +Connection ~ 13700 15350 +Wire Wire Line + 14650 14800 14750 14800 +Wire Wire Line + 14750 14800 14750 14950 +Wire Wire Line + 14750 14950 14800 14950 +Wire Wire Line + 14800 15050 14750 15050 +Wire Wire Line + 14750 15050 14750 15350 +Wire Wire Line + 14750 15350 14650 15350 +Wire Wire Line + 13700 14750 13750 14750 +Wire Wire Line + 13700 16150 13700 16250 +Wire Wire Line + 13700 16250 13750 16250 +Wire Wire Line + 13500 16200 13700 16200 +Connection ~ 13700 16200 +Wire Wire Line + 13750 16700 13700 16700 +Wire Wire Line + 13700 16700 13700 16800 +Wire Wire Line + 13700 16800 13750 16800 +Wire Wire Line + 13500 16750 13700 16750 +Connection ~ 13700 16750 +Wire Wire Line + 14650 16200 14750 16200 +Wire Wire Line + 14750 16200 14750 16350 +Wire Wire Line + 14750 16350 14800 16350 +Wire Wire Line + 14800 16450 14750 16450 +Wire Wire Line + 14750 16450 14750 16750 +Wire Wire Line + 14750 16750 14650 16750 +Wire Wire Line + 13700 16150 13750 16150 +Wire Wire Line + 13700 17700 13700 17800 +Wire Wire Line + 13700 17800 13750 17800 +Wire Wire Line + 13500 17750 13700 17750 +Connection ~ 13700 17750 +Wire Wire Line + 13750 18250 13700 18250 +Wire Wire Line + 13700 18250 13700 18350 +Wire Wire Line + 13700 18350 13750 18350 +Wire Wire Line + 13500 18300 13700 18300 +Connection ~ 13700 18300 +Wire Wire Line + 14650 17750 14750 17750 +Wire Wire Line + 14750 17750 14750 17900 +Wire Wire Line + 14750 17900 14800 17900 +Wire Wire Line + 14800 18000 14750 18000 +Wire Wire Line + 14750 18000 14750 18300 +Wire Wire Line + 14750 18300 14650 18300 +Wire Wire Line + 13700 17700 13750 17700 +Wire Wire Line + 9550 4650 11000 4650 +Wire Wire Line + 9650 4650 9650 6350 +Wire Wire Line + 9400 8700 11250 8700 +Wire Wire Line + 9500 8700 9500 9200 +Wire Wire Line + 9500 9200 9600 9200 +Wire Wire Line + 9750 10450 11900 10450 +Wire Wire Line + 9850 10450 9850 11850 +Wire Wire Line + 9550 15400 12600 15400 +Wire Wire Line + 9650 15400 9650 16800 +Wire Wire Line + 12600 4350 11000 4350 +Wire Wire Line + 11000 4350 11000 16150 +Wire Wire Line + 11000 16150 12600 16150 +Connection ~ 11000 4650 +Connection ~ 9650 4650 +Wire Wire Line + 12600 5950 10800 5950 +Wire Wire Line + 10800 5950 10800 17700 +Wire Wire Line + 10800 17700 12600 17700 +Wire Wire Line + 9650 6350 9900 6350 +Wire Wire Line + 10500 6350 10800 6350 +Connection ~ 10800 6350 +Wire Wire Line + 12600 4450 11250 4450 +Wire Wire Line + 11250 4450 11250 17800 +Wire Wire Line + 11250 17800 12600 17800 +Connection ~ 11250 8700 +Connection ~ 9500 8700 +Wire Wire Line + 12600 7750 11550 7750 +Wire Wire Line + 11550 7750 11550 14850 +Wire Wire Line + 11550 14850 12600 14850 +Wire Wire Line + 10200 9200 11550 9200 +Connection ~ 11550 9200 +Wire Wire Line + 12600 4900 11900 4900 +Wire Wire Line + 11900 4900 11900 18250 +Wire Wire Line + 11900 18250 12600 18250 +Connection ~ 11900 10450 +Connection ~ 9850 10450 +Wire Wire Line + 12600 11300 12100 11300 +Wire Wire Line + 12100 11300 12100 15300 +Wire Wire Line + 12100 15300 12600 15300 +Wire Wire Line + 9850 11850 10100 11850 +Wire Wire Line + 10700 11850 12100 11850 +Connection ~ 12100 11850 +Wire Wire Line + 12300 15400 12300 5000 +Wire Wire Line + 12300 5000 12600 5000 +Connection ~ 12300 15400 +Connection ~ 9650 15400 +Wire Wire Line + 9650 16800 9700 16800 +Wire Wire Line + 10300 16800 12600 16800 +Wire Wire Line + 12600 18350 12300 18350 +Wire Wire Line + 12300 18350 12300 16800 +Connection ~ 12300 16800 +Wire Wire Line + 12600 6050 11250 6050 +Connection ~ 11250 6050 +Wire Wire Line + 12600 6500 11900 6500 +Connection ~ 11900 6500 +Wire Wire Line + 12600 6600 12300 6600 +Connection ~ 12300 6600 +Wire Wire Line + 12600 7650 11000 7650 +Connection ~ 11000 7650 +Wire Wire Line + 12600 8200 11900 8200 +Connection ~ 11900 8200 +Wire Wire Line + 12600 8300 12300 8300 +Connection ~ 12300 8300 +Wire Wire Line + 12600 9150 10800 9150 +Connection ~ 10800 9150 +Wire Wire Line + 12600 9250 11550 9250 +Connection ~ 11550 9250 +Wire Wire Line + 12600 9700 11900 9700 +Connection ~ 11900 9700 +Wire Wire Line + 12600 9800 12300 9800 +Connection ~ 12300 9800 +Wire Wire Line + 12600 10750 11000 10750 +Connection ~ 11000 10750 +Wire Wire Line + 12600 10850 11250 10850 +Connection ~ 11250 10850 +Wire Wire Line + 12600 11400 12300 11400 +Connection ~ 12300 11400 +Wire Wire Line + 12600 12050 10800 12050 +Connection ~ 10800 12050 +Wire Wire Line + 12600 12150 11250 12150 +Connection ~ 11250 12150 +Wire Wire Line + 12600 12600 12100 12600 +Connection ~ 12100 12600 +Wire Wire Line + 12600 12700 12300 12700 +Connection ~ 12300 12700 +Wire Wire Line + 12600 13300 11000 13300 +Connection ~ 11000 13300 +Wire Wire Line + 12600 13400 11550 13400 +Connection ~ 11550 13400 +Wire Wire Line + 12600 13850 12100 13850 +Connection ~ 12100 13850 +Wire Wire Line + 12600 13950 12300 13950 +Connection ~ 12300 13950 +Wire Wire Line + 12600 14750 10800 14750 +Connection ~ 10800 14750 +Wire Wire Line + 12600 16250 11250 16250 +Connection ~ 11250 16250 +Wire Wire Line + 12600 16700 11900 16700 +Connection ~ 11900 16700 +Wire Wire Line + 15700 4600 17050 4600 +Wire Wire Line + 17050 4600 17050 9350 +Wire Wire Line + 17050 9350 17150 9350 +Wire Wire Line + 17150 9450 16750 9450 +Wire Wire Line + 16750 9450 16750 6200 +Wire Wire Line + 16750 6200 15700 6200 +Wire Wire Line + 15700 7900 16500 7900 +Wire Wire Line + 16500 7900 16500 9550 +Wire Wire Line + 16500 9550 17150 9550 +Wire Wire Line + 17150 9650 16350 9650 +Wire Wire Line + 16350 9650 16350 9400 +Wire Wire Line + 16350 9400 15700 9400 +Wire Wire Line + 17150 9750 16300 9750 +Wire Wire Line + 16300 9750 16300 11000 +Wire Wire Line + 16300 11000 15700 11000 +Wire Wire Line + 15700 12300 16650 12300 +Wire Wire Line + 16650 12300 16650 9850 +Wire Wire Line + 16650 9850 17150 9850 +Wire Wire Line + 17150 9950 16800 9950 +Wire Wire Line + 16800 9950 16800 13550 +Wire Wire Line + 16800 13550 15700 13550 +Wire Wire Line + 17150 10050 17000 10050 +Wire Wire Line + 17000 10050 17000 15000 +Wire Wire Line + 17000 15000 15700 15000 +Wire Wire Line + 15700 16400 16400 16400 +Wire Wire Line + 16400 16400 16400 17100 +Wire Wire Line + 16400 17100 16800 17100 +Wire Wire Line + 16800 17200 16350 17200 +Wire Wire Line + 16350 17200 16350 17950 +Wire Wire Line + 16350 17950 15700 17950 +Wire Wire Line + 7550 10000 7700 10000 +Wire Wire Line + 7700 10000 7700 4650 +Wire Wire Line + 7700 4650 8950 4650 +Wire Wire Line + 8800 8700 8000 8700 +Wire Wire Line + 8000 8700 8000 10100 +Wire Wire Line + 8000 10100 7550 10100 +Wire Wire Line + 7550 10200 8950 10200 +Wire Wire Line + 8950 10200 8950 10450 +Wire Wire Line + 8950 10450 9150 10450 +Wire Wire Line + 7550 10300 8000 10300 +Wire Wire Line + 8000 10300 8000 15400 +Wire Wire Line + 8000 15400 8950 15400 +$Comp +L PORT U1 +U 1 1 668162F1 +P 19200 9050 +F 0 "U1" H 19250 9150 30 0000 C CNN +F 1 "PORT" H 19200 9050 30 0000 C CNN +F 2 "" H 19200 9050 60 0000 C CNN +F 3 "" H 19200 9050 60 0000 C CNN + 1 19200 9050 + -1 0 0 1 +$EndComp +Wire Wire Line + 18950 9050 18750 9050 +Wire Wire Line + 18750 9050 18750 9350 +Wire Wire Line + 18750 9350 18300 9350 +$Comp +L PORT U1 +U 2 1 668167B9 +P 19300 9250 +F 0 "U1" H 19350 9350 30 0000 C CNN +F 1 "PORT" H 19300 9250 30 0000 C CNN +F 2 "" H 19300 9250 60 0000 C CNN +F 3 "" H 19300 9250 60 0000 C CNN + 2 19300 9250 + -1 0 0 1 +$EndComp +Wire Wire Line + 19050 9250 18850 9250 +Wire Wire Line + 18850 9250 18850 9450 +Wire Wire Line + 18850 9450 18300 9450 +$Comp +L PORT U1 +U 3 1 66816C29 +P 19400 9450 +F 0 "U1" H 19450 9550 30 0000 C CNN +F 1 "PORT" H 19400 9450 30 0000 C CNN +F 2 "" H 19400 9450 60 0000 C CNN +F 3 "" H 19400 9450 60 0000 C CNN + 3 19400 9450 + -1 0 0 1 +$EndComp +Wire Wire Line + 19150 9450 18950 9450 +Wire Wire Line + 18950 9450 18950 9550 +Wire Wire Line + 18950 9550 18300 9550 +$Comp +L PORT U1 +U 4 1 66816E91 +P 19450 9650 +F 0 "U1" H 19500 9750 30 0000 C CNN +F 1 "PORT" H 19450 9650 30 0000 C CNN +F 2 "" H 19450 9650 60 0000 C CNN +F 3 "" H 19450 9650 60 0000 C CNN + 4 19450 9650 + -1 0 0 1 +$EndComp +Wire Wire Line + 19200 9650 18300 9650 +$Comp +L PORT U1 +U 5 1 66817110 +P 19500 9850 +F 0 "U1" H 19550 9950 30 0000 C CNN +F 1 "PORT" H 19500 9850 30 0000 C CNN +F 2 "" H 19500 9850 60 0000 C CNN +F 3 "" H 19500 9850 60 0000 C CNN + 5 19500 9850 + -1 0 0 1 +$EndComp +Wire Wire Line + 19250 9850 19100 9850 +Wire Wire Line + 19100 9850 19100 9750 +Wire Wire Line + 19100 9750 18300 9750 +$Comp +L PORT U1 +U 6 1 66817388 +P 19600 10050 +F 0 "U1" H 19650 10150 30 0000 C CNN +F 1 "PORT" H 19600 10050 30 0000 C CNN +F 2 "" H 19600 10050 60 0000 C CNN +F 3 "" H 19600 10050 60 0000 C CNN + 6 19600 10050 + -1 0 0 1 +$EndComp +Wire Wire Line + 19350 10050 18950 10050 +Wire Wire Line + 18950 10050 18950 9850 +Wire Wire Line + 18950 9850 18300 9850 +$Comp +L PORT U1 +U 7 1 66817606 +P 19650 10250 +F 0 "U1" H 19700 10350 30 0000 C CNN +F 1 "PORT" H 19650 10250 30 0000 C CNN +F 2 "" H 19650 10250 60 0000 C CNN +F 3 "" H 19650 10250 60 0000 C CNN + 7 19650 10250 + -1 0 0 1 +$EndComp +Wire Wire Line + 19400 10250 18800 10250 +Wire Wire Line + 18800 10250 18800 9950 +Wire Wire Line + 18800 9950 18300 9950 +$Comp +L PORT U1 +U 8 1 66817F42 +P 19650 10500 +F 0 "U1" H 19700 10600 30 0000 C CNN +F 1 "PORT" H 19650 10500 30 0000 C CNN +F 2 "" H 19650 10500 60 0000 C CNN +F 3 "" H 19650 10500 60 0000 C CNN + 8 19650 10500 + -1 0 0 1 +$EndComp +Wire Wire Line + 19400 10500 18600 10500 +Wire Wire Line + 18600 10500 18600 10050 +Wire Wire Line + 18600 10050 18300 10050 +$Comp +L PORT U1 +U 9 1 668190C9 +P 18400 16950 +F 0 "U1" H 18450 17050 30 0000 C CNN +F 1 "PORT" H 18400 16950 30 0000 C CNN +F 2 "" H 18400 16950 60 0000 C CNN +F 3 "" H 18400 16950 60 0000 C CNN + 9 18400 16950 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 10 1 6681932C +P 18400 17300 +F 0 "U1" H 18450 17400 30 0000 C CNN +F 1 "PORT" H 18400 17300 30 0000 C CNN +F 2 "" H 18400 17300 60 0000 C CNN +F 3 "" H 18400 17300 60 0000 C CNN + 10 18400 17300 + -1 0 0 1 +$EndComp +Wire Wire Line + 18150 16950 18000 16950 +Wire Wire Line + 18000 16950 18000 17100 +Wire Wire Line + 18000 17100 17800 17100 +Wire Wire Line + 17800 17200 18000 17200 +Wire Wire Line + 18000 17200 18000 17300 +Wire Wire Line + 18000 17300 18150 17300 +$Comp +L PORT U1 +U 11 1 6681AADD +P 5900 10550 +F 0 "U1" H 5950 10650 30 0000 C CNN +F 1 "PORT" H 5900 10550 30 0000 C CNN +F 2 "" H 5900 10550 60 0000 C CNN +F 3 "" H 5900 10550 60 0000 C CNN + 11 5900 10550 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 12 1 6681AC90 +P 5900 10350 +F 0 "U1" H 5950 10450 30 0000 C CNN +F 1 "PORT" H 5900 10350 30 0000 C CNN +F 2 "" H 5900 10350 60 0000 C CNN +F 3 "" H 5900 10350 60 0000 C CNN + 12 5900 10350 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 13 1 6681AD61 +P 5900 10150 +F 0 "U1" H 5950 10250 30 0000 C CNN +F 1 "PORT" H 5900 10150 30 0000 C CNN +F 2 "" H 5900 10150 60 0000 C CNN +F 3 "" H 5900 10150 60 0000 C CNN + 13 5900 10150 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 14 1 6681AE2E +P 5900 9950 +F 0 "U1" H 5950 10050 30 0000 C CNN +F 1 "PORT" H 5900 9950 30 0000 C CNN +F 2 "" H 5900 9950 60 0000 C CNN +F 3 "" H 5900 9950 60 0000 C CNN + 14 5900 9950 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6150 9950 6350 9950 +Wire Wire Line + 6350 9950 6350 10000 +Wire Wire Line + 6350 10000 6450 10000 +Wire Wire Line + 6150 10150 6350 10150 +Wire Wire Line + 6350 10150 6350 10100 +Wire Wire Line + 6350 10100 6450 10100 +Wire Wire Line + 6450 10200 6350 10200 +Wire Wire Line + 6350 10200 6350 10350 +Wire Wire Line + 6350 10350 6150 10350 +Wire Wire Line + 6150 10550 6400 10550 +Wire Wire Line + 6400 10550 6400 10300 +Wire Wire Line + 6400 10300 6450 10300 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sub b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sub new file mode 100644 index 00000000..98a5525d --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC.sub @@ -0,0 +1,250 @@ +* Subcircuit SN5442A_IC +.subckt SN5442A_IC net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ +* d:\fossee\esim\library\subcircuitlibrary\sn5442a_ic\sn5442a_ic.cir +* u11 net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_nand +* u12 net-_u10-pad1_ net-_u12-pad2_ net-_u12-pad3_ d_nand +* u31 net-_u11-pad3_ net-_u11-pad3_ net-_u31-pad3_ d_nand +* u32 net-_u12-pad3_ net-_u12-pad3_ net-_u32-pad3_ d_nand +* u51 net-_u31-pad3_ net-_u32-pad3_ net-_u51-pad3_ d_nand +* u13 net-_u13-pad1_ net-_u11-pad2_ net-_u13-pad3_ d_nand +* u14 net-_u10-pad1_ net-_u12-pad2_ net-_u14-pad3_ d_nand +* u33 net-_u13-pad3_ net-_u13-pad3_ net-_u33-pad3_ d_nand +* u34 net-_u14-pad3_ net-_u14-pad3_ net-_u34-pad3_ d_nand +* u52 net-_u33-pad3_ net-_u34-pad3_ net-_u52-pad3_ d_nand +* u15 net-_u11-pad1_ net-_u15-pad2_ net-_u15-pad3_ d_nand +* u16 net-_u10-pad1_ net-_u12-pad2_ net-_u16-pad3_ d_nand +* u35 net-_u15-pad3_ net-_u15-pad3_ net-_u35-pad3_ d_nand +* u36 net-_u16-pad3_ net-_u16-pad3_ net-_u36-pad3_ d_nand +* u53 net-_u35-pad3_ net-_u36-pad3_ net-_u53-pad3_ d_nand +* u17 net-_u13-pad1_ net-_u15-pad2_ net-_u17-pad3_ d_nand +* u18 net-_u10-pad1_ net-_u12-pad2_ net-_u18-pad3_ d_nand +* u37 net-_u17-pad3_ net-_u17-pad3_ net-_u37-pad3_ d_nand +* u38 net-_u18-pad3_ net-_u18-pad3_ net-_u38-pad3_ d_nand +* u54 net-_u37-pad3_ net-_u38-pad3_ net-_u54-pad3_ d_nand +* u19 net-_u11-pad1_ net-_u11-pad2_ net-_u19-pad3_ d_nand +* u20 net-_u10-pad2_ net-_u12-pad2_ net-_u20-pad3_ d_nand +* u39 net-_u19-pad3_ net-_u19-pad3_ net-_u39-pad3_ d_nand +* u40 net-_u20-pad3_ net-_u20-pad3_ net-_u40-pad3_ d_nand +* u55 net-_u39-pad3_ net-_u40-pad3_ net-_u55-pad3_ d_nand +* u21 net-_u13-pad1_ net-_u11-pad2_ net-_u21-pad3_ d_nand +* u22 net-_u10-pad2_ net-_u12-pad2_ net-_u22-pad3_ d_nand +* u41 net-_u21-pad3_ net-_u21-pad3_ net-_u41-pad3_ d_nand +* u42 net-_u22-pad3_ net-_u22-pad3_ net-_u42-pad3_ d_nand +* u56 net-_u41-pad3_ net-_u42-pad3_ net-_u56-pad3_ d_nand +* u23 net-_u11-pad1_ net-_u15-pad2_ net-_u23-pad3_ d_nand +* u24 net-_u10-pad2_ net-_u12-pad2_ net-_u24-pad3_ d_nand +* u43 net-_u23-pad3_ net-_u23-pad3_ net-_u43-pad3_ d_nand +* u44 net-_u24-pad3_ net-_u24-pad3_ net-_u44-pad3_ d_nand +* u57 net-_u43-pad3_ net-_u44-pad3_ net-_u57-pad3_ d_nand +* u25 net-_u13-pad1_ net-_u15-pad2_ net-_u25-pad3_ d_nand +* u26 net-_u10-pad2_ net-_u12-pad2_ net-_u26-pad3_ d_nand +* u45 net-_u25-pad3_ net-_u25-pad3_ net-_u45-pad3_ d_nand +* u46 net-_u26-pad3_ net-_u26-pad3_ net-_u46-pad3_ d_nand +* u58 net-_u45-pad3_ net-_u46-pad3_ net-_u58-pad3_ d_nand +* u27 net-_u11-pad1_ net-_u11-pad2_ net-_u27-pad3_ d_nand +* u28 net-_u10-pad1_ net-_u28-pad2_ net-_u28-pad3_ d_nand +* u47 net-_u27-pad3_ net-_u27-pad3_ net-_u47-pad3_ d_nand +* u48 net-_u28-pad3_ net-_u28-pad3_ net-_u48-pad3_ d_nand +* u59 net-_u47-pad3_ net-_u48-pad3_ net-_u59-pad3_ d_nand +* u29 net-_u13-pad1_ net-_u11-pad2_ net-_u29-pad3_ d_nand +* u30 net-_u10-pad1_ net-_u28-pad2_ net-_u30-pad3_ d_nand +* u49 net-_u29-pad3_ net-_u29-pad3_ net-_u49-pad3_ d_nand +* u50 net-_u30-pad3_ net-_u30-pad3_ net-_u50-pad3_ d_nand +* u60 net-_u49-pad3_ net-_u50-pad3_ net-_u60-pad3_ d_nand +* u4 net-_u2-pad5_ net-_u11-pad1_ d_inverter +* u9 net-_u11-pad1_ net-_u13-pad1_ d_inverter +* u3 net-_u2-pad6_ net-_u11-pad2_ d_inverter +* u7 net-_u11-pad2_ net-_u15-pad2_ d_inverter +* u6 net-_u2-pad7_ net-_u10-pad1_ d_inverter +* u10 net-_u10-pad1_ net-_u10-pad2_ d_inverter +* u5 net-_u2-pad8_ net-_u12-pad2_ d_inverter +* u8 net-_u12-pad2_ net-_u28-pad2_ d_inverter +* u62 net-_u51-pad3_ net-_u52-pad3_ net-_u53-pad3_ net-_u54-pad3_ net-_u55-pad3_ net-_u56-pad3_ net-_u57-pad3_ net-_u58-pad3_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ dac_bridge_8 +* u61 net-_u59-pad3_ net-_u60-pad3_ net-_u1-pad9_ net-_u1-pad10_ dac_bridge_2 +* u2 net-_u1-pad14_ net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ net-_u2-pad8_ adc_bridge_4 +a1 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11 +a2 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u12-pad3_ u12 +a3 [net-_u11-pad3_ net-_u11-pad3_ ] net-_u31-pad3_ u31 +a4 [net-_u12-pad3_ net-_u12-pad3_ ] net-_u32-pad3_ u32 +a5 [net-_u31-pad3_ net-_u32-pad3_ ] net-_u51-pad3_ u51 +a6 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u13-pad3_ u13 +a7 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u14-pad3_ u14 +a8 [net-_u13-pad3_ net-_u13-pad3_ ] net-_u33-pad3_ u33 +a9 [net-_u14-pad3_ net-_u14-pad3_ ] net-_u34-pad3_ u34 +a10 [net-_u33-pad3_ net-_u34-pad3_ ] net-_u52-pad3_ u52 +a11 [net-_u11-pad1_ net-_u15-pad2_ ] net-_u15-pad3_ u15 +a12 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u16-pad3_ u16 +a13 [net-_u15-pad3_ net-_u15-pad3_ ] net-_u35-pad3_ u35 +a14 [net-_u16-pad3_ net-_u16-pad3_ ] net-_u36-pad3_ u36 +a15 [net-_u35-pad3_ net-_u36-pad3_ ] net-_u53-pad3_ u53 +a16 [net-_u13-pad1_ net-_u15-pad2_ ] net-_u17-pad3_ u17 +a17 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u18-pad3_ u18 +a18 [net-_u17-pad3_ net-_u17-pad3_ ] net-_u37-pad3_ u37 +a19 [net-_u18-pad3_ net-_u18-pad3_ ] net-_u38-pad3_ u38 +a20 [net-_u37-pad3_ net-_u38-pad3_ ] net-_u54-pad3_ u54 +a21 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u19-pad3_ u19 +a22 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u20-pad3_ u20 +a23 [net-_u19-pad3_ net-_u19-pad3_ ] net-_u39-pad3_ u39 +a24 [net-_u20-pad3_ net-_u20-pad3_ ] net-_u40-pad3_ u40 +a25 [net-_u39-pad3_ net-_u40-pad3_ ] net-_u55-pad3_ u55 +a26 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u21-pad3_ u21 +a27 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u22-pad3_ u22 +a28 [net-_u21-pad3_ net-_u21-pad3_ ] net-_u41-pad3_ u41 +a29 [net-_u22-pad3_ net-_u22-pad3_ ] net-_u42-pad3_ u42 +a30 [net-_u41-pad3_ net-_u42-pad3_ ] net-_u56-pad3_ u56 +a31 [net-_u11-pad1_ net-_u15-pad2_ ] net-_u23-pad3_ u23 +a32 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u24-pad3_ u24 +a33 [net-_u23-pad3_ net-_u23-pad3_ ] net-_u43-pad3_ u43 +a34 [net-_u24-pad3_ net-_u24-pad3_ ] net-_u44-pad3_ u44 +a35 [net-_u43-pad3_ net-_u44-pad3_ ] net-_u57-pad3_ u57 +a36 [net-_u13-pad1_ net-_u15-pad2_ ] net-_u25-pad3_ u25 +a37 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u26-pad3_ u26 +a38 [net-_u25-pad3_ net-_u25-pad3_ ] net-_u45-pad3_ u45 +a39 [net-_u26-pad3_ net-_u26-pad3_ ] net-_u46-pad3_ u46 +a40 [net-_u45-pad3_ net-_u46-pad3_ ] net-_u58-pad3_ u58 +a41 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u27-pad3_ u27 +a42 [net-_u10-pad1_ net-_u28-pad2_ ] net-_u28-pad3_ u28 +a43 [net-_u27-pad3_ net-_u27-pad3_ ] net-_u47-pad3_ u47 +a44 [net-_u28-pad3_ net-_u28-pad3_ ] net-_u48-pad3_ u48 +a45 [net-_u47-pad3_ net-_u48-pad3_ ] net-_u59-pad3_ u59 +a46 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u29-pad3_ u29 +a47 [net-_u10-pad1_ net-_u28-pad2_ ] net-_u30-pad3_ u30 +a48 [net-_u29-pad3_ net-_u29-pad3_ ] net-_u49-pad3_ u49 +a49 [net-_u30-pad3_ net-_u30-pad3_ ] net-_u50-pad3_ u50 +a50 [net-_u49-pad3_ net-_u50-pad3_ ] net-_u60-pad3_ u60 +a51 net-_u2-pad5_ net-_u11-pad1_ u4 +a52 net-_u11-pad1_ net-_u13-pad1_ u9 +a53 net-_u2-pad6_ net-_u11-pad2_ u3 +a54 net-_u11-pad2_ net-_u15-pad2_ u7 +a55 net-_u2-pad7_ net-_u10-pad1_ u6 +a56 net-_u10-pad1_ net-_u10-pad2_ u10 +a57 net-_u2-pad8_ net-_u12-pad2_ u5 +a58 net-_u12-pad2_ net-_u28-pad2_ u8 +a59 [net-_u51-pad3_ net-_u52-pad3_ net-_u53-pad3_ net-_u54-pad3_ net-_u55-pad3_ net-_u56-pad3_ net-_u57-pad3_ net-_u58-pad3_ ] [net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ ] u62 +a60 [net-_u59-pad3_ net-_u60-pad3_ ] [net-_u1-pad9_ net-_u1-pad10_ ] u61 +a61 [net-_u1-pad14_ net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ ] [net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ net-_u2-pad8_ ] u2 +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u11 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u12 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u31 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u32 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u51 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u13 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u14 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u33 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u34 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u52 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u15 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u16 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u35 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u36 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u53 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u17 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u18 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u37 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u38 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u54 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u19 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u20 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u39 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u40 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u55 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u21 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u22 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u41 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u42 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u56 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u23 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u24 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u43 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u44 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u57 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u25 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u26 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u45 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u46 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u58 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u27 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u28 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u47 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u48 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u59 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u29 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u30 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u49 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u50 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u60 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: dac_bridge_8, NgSpice Name: dac_bridge +.model u62 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) +* Schematic Name: dac_bridge_2, NgSpice Name: dac_bridge +.model u61 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) +* Schematic Name: adc_bridge_4, NgSpice Name: adc_bridge +.model u2 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) +* Control Statements + +.ends SN5442A_IC \ No newline at end of file diff --git a/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC_Previous_Values.xml b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC_Previous_Values.xml new file mode 100644 index 00000000..8c4697fb --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/SN5442A_IC_Previous_Values.xml @@ -0,0 +1 @@ +truefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or Amperessecsecsecd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_nandd_inverterd_inverterd_inverterd_inverterd_inverterd_inverterd_inverterd_inverterdac_bridgedac_bridgeadc_bridge \ No newline at end of file diff --git a/library/SubcircuitLibrary/SN5442A_sub/analysis b/library/SubcircuitLibrary/SN5442A_sub/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/SN5442A_sub/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file -- cgit