diff options
| author | Fahim | 2014-09-09 16:11:17 +0530 |
|---|---|---|
| committer | Fahim | 2014-09-09 16:11:17 +0530 |
| commit | c632c1009c9e095135220c809d7c799841f160b3 (patch) | |
| tree | 3be2def8313164c3bf32799714ba53a4a1326ed6 /OSCAD/Examples/sedra_smith/chapter_3/example_3.3 | |
| parent | e338c2a59389c22b8cca9a78d75e626ae779c405 (diff) | |
| download | FreeEDA-c632c1009c9e095135220c809d7c799841f160b3.tar.gz FreeEDA-c632c1009c9e095135220c809d7c799841f160b3.tar.bz2 FreeEDA-c632c1009c9e095135220c809d7c799841f160b3.zip | |
Subject: Changing all content and name of directory and file to FreeEDA
Description: The content of file,name of directory and file has been
changed in the below format.
1. Oscad to FreeEDA
2. OSCAD to FreeEDA
3. oscad to freeeda
Diffstat (limited to 'OSCAD/Examples/sedra_smith/chapter_3/example_3.3')
15 files changed, 0 insertions, 1271 deletions
diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis deleted file mode 100644 index 10c280a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 5e-00 5e-00 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib deleted file mode 100644 index a8411e8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/bjt.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model bjt NPN( Vtf=1.7 Cjc=7.306p Nc=2 Tr=46.91n Ne=1.307 -+ Cje=22.01p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=411.1p Xti=3 Ikr=0 Bf=50 Fc=.5 -+ Ise=14.34f Br=6.092 Ikf=.2847 Mje=.377 Mjc=.3416 -+ Vaf=74.03 Vjc=.2 Vje=.75 Xtf=3 Itf=.6 -+ Is=14.34f Eg=1.11 )
\ No newline at end of file diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak deleted file mode 100644 index dad7e0c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.bak +++ /dev/null @@ -1,218 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:57:15 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir deleted file mode 100644 index 2e072a8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Tuesday 16 April 2013 12:03:45 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -Q1 7 1 5 PNP -v1 7 0 PULSE -R1 6 0 5000 -U2 1 7 5 VPLOT8_1 -U1 1 0 IPLOT -R2 3 4 10000 -U3 4 7 IPLOT -v2 3 0 10V -U4 5 6 IPLOT - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch deleted file mode 100644 index e0eb696..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.16.sch +++ /dev/null @@ -1,235 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 12:03:50 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CF0A9 -P 4000 3050 -F 0 "#FLG01" H 4000 3320 30 0001 C CNN -F 1 "PWR_FLAG" H 4000 3280 30 0000 C CNN - 1 4000 3050 - 1 0 0 -1 -$EndComp -Wire Wire Line - 3500 4200 3500 5050 -Connection ~ 4300 5050 -Wire Wire Line - 4300 5050 4300 3300 -Connection ~ 3500 3300 -Wire Wire Line - 3500 3550 3500 3050 -Wire Wire Line - 5450 4200 5450 4350 -Connection ~ 4000 3050 -Wire Wire Line - 3500 5050 6650 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Wire Wire Line - 5450 5350 5450 4850 -Wire Wire Line - 5150 3300 4800 3300 -Wire Wire Line - 3500 3050 5450 3050 -Wire Wire Line - 5450 3050 5450 3000 -Connection ~ 5450 3000 -$Comp -L PNP Q1 -U 1 1 516CEFD3 -P 5350 3300 -F 0 "Q1" H 5350 3150 60 0000 R CNN -F 1 "PNP" H 5350 3450 60 0000 R CNN - 1 5350 3300 - 1 0 0 1 -$EndComp -$Comp -L PULSE v1 -U 1 1 516CEF97 -P 3500 3750 -F 0 "v1" H 3300 3850 60 0000 C CNN -F 1 "PULSE" H 3300 3700 60 0000 C CNN -F 2 "R1" H 3200 3750 60 0000 C CNN - 1 3500 3750 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CEF60 -P 5450 4600 -F 0 "R1" V 5530 4600 50 0000 C CNN -F 1 "5000" V 5450 4600 50 0000 C CNN - 1 5450 4600 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG02" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG03 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG03" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR04 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR04" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "10000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak deleted file mode 100644 index f265808..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.bak +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Tuesday 16 April 2013 12:24:14 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib deleted file mode 100644 index 8652c69..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3-cache.lib +++ /dev/null @@ -1,109 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Thursday 25 April 2013 02:05:06 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 80 0 50 V V C CNN -F1 "R" 0 0 50 V V C CNN -$FPLIST - R? - SM0603 - SM0805 - R?-* -$ENDFPLIST -DRAW -S -40 150 40 -150 0 1 12 N -X ~ 1 0 250 100 D 60 60 1 1 P -X ~ 2 0 -250 100 U 60 60 1 1 P -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak deleted file mode 100644 index 246ba5c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.bak +++ /dev/null @@ -1,217 +0,0 @@ -EESchema Schematic File Version 2 date Tuesday 16 April 2013 11:04:07 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -EELAYER 43 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "16 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1000" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir deleted file mode 100644 index 97a0042..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir +++ /dev/null @@ -1,17 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Thursday 25 April 2013 02:05:01 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U2 7 2 5 VPLOT8_1 -U1 7 1 IPLOT -v1 1 0 5V -R1 1 1 2200 -R2 3 4 1k -U3 4 2 IPLOT -v2 3 0 10V -U4 5 0 IPLOT -Q1 5 7 2 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt deleted file mode 100644 index 51d6e2f..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.ckt +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 02:05:01 pm ist -.include npn.lib - -* Plotting option vplot8_1 -V_u1 7 1 0 -v1 1 0 5v -r1 1 1 2200 -r2 3 4 1k -V_u3 4 2 0 -v2 3 0 10v -V_u4 5 0 0 -q1 2 7 5 npn - -.dc v1 0e-00 5e-00 5e-00 -.plot v(7) v(2) v(5) -.plot i(V_u1) -.plot i(V_u3) -.plot i(V_u4) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out deleted file mode 100644 index 30154d7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.cir.out +++ /dev/null @@ -1,24 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: thursday 25 april 2013 02:05:01 pm ist -.include npn.lib - -* Plotting option vplot8_1 -V_u1 7 1 0 -v1 1 0 5v -r1 1 1 2200 -r2 3 4 1k -V_u3 4 2 0 -v2 3 0 10v -V_u4 5 0 0 -q1 2 7 5 npn - -.dc v1 0e-00 5e-00 5e-00 - -* Control Statements -.control -run -plot v(7) v(2) v(5) -plot i(V_u1) -plot i(V_u3) -plot i(V_u4) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro deleted file mode 100644 index f37394e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 10:53:01 AM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj deleted file mode 100644 index 00153d6..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.3.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch deleted file mode 100644 index 0bfa3f7..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/example_3.3.sch +++ /dev/null @@ -1,218 +0,0 @@ -EESchema Schematic File Version 2 date Thursday 25 April 2013 02:05:06 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.3-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "25 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Connection ~ 4000 3300 -Wire Wire Line - 5450 4200 5450 5350 -Wire Wire Line - 6650 5050 3500 5050 -Connection ~ 5450 5050 -Wire Wire Line - 6650 5050 6650 4450 -Wire Wire Line - 3500 5050 3500 4450 -Wire Wire Line - 4300 3300 3500 3300 -Wire Wire Line - 5450 3700 5450 3500 -Wire Wire Line - 5450 2950 5450 3100 -Wire Wire Line - 5450 2300 5450 2450 -Connection ~ 5450 3050 -Connection ~ 5450 3600 -Wire Wire Line - 3500 3300 3500 3550 -Wire Wire Line - 5450 1800 6650 1800 -Wire Wire Line - 6650 1800 6650 3550 -Wire Wire Line - 4800 3300 5150 3300 -Connection ~ 5100 3300 -Connection ~ 6650 5050 -Connection ~ 4950 3300 -Connection ~ 5450 5200 -Connection ~ 5450 4400 -$Comp -L PWR_FLAG #FLG01 -U 1 1 516CE235 -P 4950 3300 -F 0 "#FLG01" H 4950 3570 30 0001 C CNN -F 1 "PWR_FLAG" H 4950 3530 30 0000 C CNN - 1 4950 3300 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 516CE22C -P 5450 5200 -F 0 "#FLG02" H 5450 5470 30 0001 C CNN -F 1 "PWR_FLAG" H 5450 5430 30 0000 C CNN - 1 5450 5200 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR03 -U 1 1 516CE20C -P 5450 5350 -F 0 "#PWR03" H 5450 5350 30 0001 C CNN -F 1 "GND" H 5450 5280 30 0001 C CNN - 1 5450 5350 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 1 1 516CE1D8 -P 5100 3000 -F 0 "U2" H 4950 3100 50 0000 C CNN -F 1 "VPLOT8_1" H 5250 3100 50 0000 C CNN - 1 5100 3000 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U1 -U 1 1 516CE177 -P 4550 3300 -F 0 "U1" H 4400 3400 50 0000 C CNN -F 1 "IPLOT" H 4700 3400 50 0000 C CNN - 1 4550 3300 - -1 0 0 1 -$EndComp -$Comp -L DC v1 -U 1 1 516CE159 -P 3500 4000 -F 0 "v1" H 3300 4100 60 0000 C CNN -F 1 "5V" H 3300 3950 60 0000 C CNN -F 2 "R1" H 3200 4000 60 0000 C CNN - 1 3500 4000 - 1 0 0 -1 -$EndComp -$Comp -L R R1 -U 1 1 516CE13E -P 3750 3300 -F 0 "R1" V 3830 3300 50 0000 C CNN -F 1 "2200" V 3750 3300 50 0000 C CNN - 1 3750 3300 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U2 -U 2 1 516CE102 -P 5750 3050 -F 0 "U2" H 5600 3150 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3150 50 0000 C CNN - 2 5750 3050 - 0 1 1 0 -$EndComp -$Comp -L R R2 -U 1 1 516CE0C0 -P 5450 2050 -F 0 "R2" V 5530 2050 50 0000 C CNN -F 1 "1k" V 5450 2050 50 0000 C CNN - 1 5450 2050 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 516CE0B6 -P 5450 2700 -F 0 "U3" H 5300 2800 50 0000 C CNN -F 1 "IPLOT" H 5600 2800 50 0000 C CNN - 1 5450 2700 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 516CE08D -P 6650 4000 -F 0 "v2" H 6450 4100 60 0000 C CNN -F 1 "10V" H 6450 3950 60 0000 C CNN -F 2 "R1" H 6350 4000 60 0000 C CNN - 1 6650 4000 - 1 0 0 -1 -$EndComp -$Comp -L VPLOT8_1 U2 -U 3 1 516CE083 -P 5750 3600 -F 0 "U2" H 5600 3700 50 0000 C CNN -F 1 "VPLOT8_1" H 5900 3700 50 0000 C CNN - 3 5750 3600 - 0 1 1 0 -$EndComp -$Comp -L IPLOT U4 -U 1 1 516CE07C -P 5450 3950 -F 0 "U4" H 5300 4050 50 0000 C CNN -F 1 "IPLOT" H 5600 4050 50 0000 C CNN - 1 5450 3950 - 0 1 1 0 -$EndComp -$Comp -L NPN Q1 -U 1 1 516CE055 -P 5350 3300 -F 0 "Q1" H 5350 3150 50 0000 R CNN -F 1 "NPN" H 5350 3450 50 0000 R CNN - 1 5350 3300 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib deleted file mode 100644 index 5aecc2e..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.3/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf= Cjc= Nc= Tr= Ne= -+ Cje= Vjc= Xtb= Rb= Rc= -+ Tf= Xti= Ikr= Bf=50 Fc= -+ Ikf= Br= Mje= Mjc= Vaf= -+ Isc= Ise= Xtf= Vje= Is= -+ Itf= Eg= )
\ No newline at end of file |