diff options
Diffstat (limited to 'ANDROID_3.4.5/arch/powerpc/boot/dts')
260 files changed, 0 insertions, 58484 deletions
diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/a4m072.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/a4m072.dts deleted file mode 100644 index fabe7b7d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/a4m072.dts +++ /dev/null @@ -1,168 +0,0 @@ -/* - * a4m072 board Device Tree Source - * - * Copyright (C) 2011 DENX Software Engineering GmbH - * Heiko Schocher <hs@denx.de> - * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz <m8@semihalf.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "anonymous,a4m072"; - compatible = "anonymous,a4m072"; - - soc5200@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc5200b-immr"; - ranges = <0 0xf0000000 0x0000c000>; - reg = <0xf0000000 0x00000100>; - bus-frequency = <0>; /* From boot loader */ - system-frequency = <0>; /* From boot loader */ - - cdm@200 { - fsl,init-ext-48mhz-en = <0x0>; - fsl,init-fd-enable = <0x01>; - fsl,init-fd-counters = <0x3333>; - }; - - timer@600 { - fsl,has-wdt; - }; - - gpt3: timer@630 { /* General Purpose Timer in GPIO mode */ - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt4: timer@640 { /* General Purpose Timer in GPIO mode */ - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt5: timer@650 { /* General Purpose Timer in GPIO mode */ - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - spi@f00 { - status = "disabled"; - }; - - psc@2000 { - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - reg = <0x2000 0x100>; - interrupts = <2 1 0>; - }; - - psc@2200 { - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - reg = <0x2200 0x100>; - interrupts = <2 2 0>; - }; - - psc@2400 { - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - reg = <0x2400 0x100>; - interrupts = <2 3 0>; - }; - - psc@2600 { - status = "disabled"; - }; - - psc@2800 { - status = "disabled"; - }; - - psc@2c00 { - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - reg = <0x2c00 0x100>; - interrupts = <2 4 0>; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@1f { - reg = <0x1f>; - interrupts = <1 2 0>; /* IRQ 2 active low */ - }; - }; - - i2c@3d00 { - status = "disabled"; - }; - - i2c@3d40 { - hwmon@2e { - compatible = "nsc,lm87"; - reg = <0x2e>; - }; - rtc@51 { - compatible = "nxp,rtc8564"; - reg = <0x51>; - }; - }; - }; - - localbus { - compatible = "fsl,mpc5200b-lpb","simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0xfe000000 0x02000000 - 1 0 0x62000000 0x00400000 - 2 0 0x64000000 0x00200000 - 3 0 0x66000000 0x01000000 - 6 0 0x68000000 0x01000000 - 7 0 0x6a000000 0x00000004>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - }; - sram0@1,0 { - compatible = "mtd-ram"; - reg = <1 0x00000 0x00400000>; - bank-width = <2>; - }; - }; - - pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200-pci"; - reg = <0xf0000d00 0x100>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x16 */ - 0xc000 0 0 1 &mpc5200_pic 1 3 3 - 0xc000 0 0 2 &mpc5200_pic 1 3 3 - 0xc000 0 0 3 &mpc5200_pic 1 3 3 - 0xc000 0 0 4 &mpc5200_pic 1 3 3>; - clock-frequency = <0>; /* From boot loader */ - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/acadia.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/acadia.dts deleted file mode 100644 index 57291f61..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/acadia.dts +++ /dev/null @@ -1,224 +0,0 @@ -/* - * Device Tree Source for AMCC Acadia (405EZ) - * - * Copyright IBM Corp. 2008 - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "amcc,acadia"; - compatible = "amcc,acadia"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EZ"; - reg = <0x0>; - clock-frequency = <0>; /* Filled in by wrapper */ - timebase-frequency = <0>; /* Filled in by wrapper */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; - d-cache-size = <16384>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; /* Filled in by wrapper */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic-405ez", "ibm,uic"; - interrupt-controller; - dcr-reg = <0x0c0 0x009>; - cell-index = <0>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - plb { - compatible = "ibm,plb-405ez", "ibm,plb3"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by wrapper */ - - MAL0: mcmal { - compatible = "ibm,mcmal-405ez", "ibm,mcmal"; - dcr-reg = <0x380 0x62>; - num-tx-chans = <1>; - num-rx-chans = <1>; - interrupt-parent = <&UIC0>; - /* 405EZ has only 3 interrupts to the UIC, as - * SERR, TXDE, and RXDE are or'd together into - * one UIC bit - */ - interrupts = < - 0x13 0x4 /* TXEOB */ - 0x15 0x4 /* RXEOB */ - 0x12 0x4 /* SERR, TXDE, RXDE */>; - }; - - POB0: opb { - compatible = "ibm,opb-405ez", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - dcr-reg = <0x0a 0x05>; - clock-frequency = <0>; /* Filled in by wrapper */ - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x8>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by wrapper */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x5 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x8>; - clock-frequency = <0>; /* Filled in by wrapper */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x6 0x4>; - }; - - IIC: i2c@ef600500 { - compatible = "ibm,iic-405ez", "ibm,iic"; - reg = <0xef600500 0x11>; - interrupt-parent = <&UIC0>; - interrupts = <0xa 0x4>; - }; - - GPIO0: gpio@ef600700 { - compatible = "ibm,gpio-405ez"; - reg = <0xef600700 0x20>; - }; - - GPIO1: gpio@ef600800 { - compatible = "ibm,gpio-405ez"; - reg = <0xef600800 0x20>; - }; - - EMAC0: ethernet@ef600900 { - device_type = "network"; - compatible = "ibm,emac-405ez", "ibm,emac"; - interrupt-parent = <&UIC0>; - interrupts = < - 0x10 0x4 /* Ethernet */ - 0x11 0x4 /* Ethernet Wake up */>; - local-mac-address = [000000000000]; /* Filled in by wrapper */ - reg = <0xef600900 0x70>; - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "mii"; - phy-map = <0x0>; - }; - - CAN0: can@ef601000 { - compatible = "amcc,can-405ez"; - reg = <0xef601000 0x620>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - CAN1: can@ef601800 { - compatible = "amcc,can-405ez"; - reg = <0xef601800 0x620>; - interrupt-parent = <&UIC0>; - interrupts = <0x8 0x4>; - }; - - cameleon@ef602000 { - compatible = "amcc,cameleon-405ez"; - reg = <0xef602000 0x800>; - interrupt-parent = <&UIC0>; - interrupts = <0xb 0x4 0xc 0x4>; - }; - - ieee1588@ef602800 { - compatible = "amcc,ieee1588-405ez"; - reg = <0xef602800 0x60>; - interrupt-parent = <&UIC0>; - interrupts = <0x4 0x4>; - /* This thing is a bit weird. It has it's own UIC - * that it uses to generate snapshot triggers. We - * don't really support this device yet, and it needs - * work to figure this out. - */ - dcr-reg = <0xe0 0x9>; - }; - - usb@ef603000 { - compatible = "ohci-be"; - reg = <0xef603000 0x80>; - interrupts-parent = <&UIC0>; - interrupts = <0xd 0x4 0xe 0x4>; - }; - - dac@ef603300 { - compatible = "amcc,dac-405ez"; - reg = <0xef603300 0x40>; - interrupt-parent = <&UIC0>; - interrupts = <0x18 0x4>; - }; - - adc@ef603400 { - compatible = "amcc,adc-405ez"; - reg = <0xef603400 0x40>; - interrupt-parent = <&UIC0>; - interrupts = <0x17 0x4>; - }; - - spi@ef603500 { - compatible = "amcc,spi-405ez"; - reg = <0xef603500 0x100>; - interrupt-parent = <&UIC0>; - interrupts = <0x9 0x4>; - }; - }; - - EBC0: ebc { - compatible = "ibm,ebc-405ez", "ibm,ebc"; - dcr-reg = <0x12 0x2>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by wrapper */ - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-redboot.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-redboot.dts deleted file mode 100644 index 28e9cd3d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-redboot.dts +++ /dev/null @@ -1,185 +0,0 @@ -/* - * Device Tree Source for MPC885 ADS running RedBoot - * - * Copyright 2006 MontaVista Software, Inc. - * Copyright 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; -/ { - model = "Analogue & Micro Adder MPC875"; - compatible = "analogue-and-micro,adder875"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - console = &console; - ethernet0 = ð0; - ethernet1 = ð1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,875@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <16>; - i-cache-line-size = <16>; - d-cache-size = <8192>; - i-cache-size = <8192>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0x01000000>; - }; - - localbus@fa200100 { - compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xfa200100 0x40>; - - ranges = < - 0 0 0xfe000000 0x00800000 - 2 0 0xfa100000 0x00008000 - >; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x800000>; - bank-width = <2>; - device-width = <2>; - }; - }; - - soc@fa200000 { - compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xfa200000 0x00004000>; - - // Temporary until code stops depending on it. - device_type = "soc"; - - // Temporary until get_immrbase() is fixed. - reg = <0xfa200000 0x4000>; - - mdio@e00 { - compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - - PHY0: ethernet-phy@0 { - reg = <0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - reg = <1>; - device_type = "ethernet-phy"; - }; - }; - - eth0: ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc875-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - }; - - eth1: ethernet@1e00 { - device_type = "network"; - compatible = "fsl,mpc875-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0x1e00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <7 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - }; - - PIC: interrupt-controller@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0 0x24>; - compatible = "fsl,mpc875-pic", "fsl,pq1-pic"; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus"; - interrupts = <0>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - reg = <0x9c0 0x40>; - ranges; - - muram { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x1c00>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc875-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - clock-frequency = <50000000>; - reg = <0x9f0 0x10>; - }; - - CPM_PIC: interrupt-controller@930 { - interrupt-controller; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc875-cpm-pic", - "fsl,cpm1-pic"; - }; - - console: serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc875-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x0090>; - current-speed = <115200>; - }; - }; - }; - - chosen { - linux,stdout-path = &console; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-uboot.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-uboot.dts deleted file mode 100644 index 54fb60ec..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/adder875-uboot.dts +++ /dev/null @@ -1,184 +0,0 @@ -/* - * Device Tree Source for MPC885 ADS running U-Boot - * - * Copyright 2006 MontaVista Software, Inc. - * Copyright 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; -/ { - model = "Analogue & Micro Adder MPC875"; - compatible = "analogue-and-micro,adder875"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - console = &console; - ethernet0 = ð0; - ethernet1 = ð1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,875@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <16>; - i-cache-line-size = <16>; - d-cache-size = <8192>; - i-cache-size = <8192>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0x01000000>; - }; - - localbus@ff000100 { - compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xff000100 0x40>; - - ranges = < - 0 0 0xfe000000 0x01000000 - >; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x800000>; - bank-width = <2>; - device-width = <2>; - }; - }; - - soc@ff000000 { - compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0xff000000 0x00004000>; - - // Temporary until code stops depending on it. - device_type = "soc"; - - // Temporary until get_immrbase() is fixed. - reg = <0xff000000 0x4000>; - - mdio@e00 { - compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - - PHY0: ethernet-phy@0 { - reg = <0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - reg = <1>; - device_type = "ethernet-phy"; - }; - }; - - eth0: ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc875-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - }; - - eth1: ethernet@1e00 { - device_type = "network"; - compatible = "fsl,mpc875-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0x1e00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <7 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - }; - - PIC: interrupt-controller@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0 0x24>; - compatible = "fsl,mpc875-pic", "fsl,pq1-pic"; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus"; - interrupts = <0>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - reg = <0x9c0 0x40>; - ranges; - - muram { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x1c00>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc875-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - clock-frequency = <50000000>; - reg = <0x9f0 0x10>; - }; - - CPM_PIC: interrupt-controller@930 { - interrupt-controller; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc875-cpm-pic", - "fsl,cpm1-pic"; - }; - - console: serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc875-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x0090>; - current-speed = <115200>; - }; - }; - }; - - chosen { - linux,stdout-path = &console; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/amigaone.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/amigaone.dts deleted file mode 100644 index 49ac36b1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/amigaone.dts +++ /dev/null @@ -1,173 +0,0 @@ -/* - * AmigaOne Device Tree Source - * - * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "AmigaOne"; - compatible = "eyetech,amigaone"; - coherency-off; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #cpus = <1>; - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // 33.3 MHz, from U-boot - clock-frequency = <0>; // From U-boot - bus-frequency = <0>; // From U-boot - }; - }; - - memory { - device_type = "memory"; - reg = <0 0>; // From U-boot - }; - - pci@80000000 { - device_type = "pci"; - compatible = "mai-logic,articia-s"; - bus-frequency = <33333333>; - bus-range = <0 0xff>; - ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000 // PCI I/O - 0x02000000 0 0x80000000 0x80000000 0 0x7d000000 // PCI memory - 0x02000000 0 0x00000000 0xfd000000 0 0x01000000>; // PCI alias memory (ISA) - // Configuration address and data register. - reg = <0xfec00cf8 4 - 0xfee00cfc 4>; - 8259-interrupt-acknowledge = <0xfef00000>; - // Do not define a interrupt-parent here, if there is no - // interrupt-map property. - #address-cells = <3>; - #size-cells = <2>; - - isa@7 { - device_type = "isa"; - compatible = "pciclass,0601"; - vendor-id = <0x00001106>; - device-id = <0x00000686>; - revision-id = <0x00000010>; - class-code = <0x00060100>; - subsystem-id = <0>; - subsystem-vendor-id = <0>; - devsel-speed = <0x00000001>; - min-grant = <0>; - max-latency = <0>; - /* First 4k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */ - ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>; - interrupt-parent = <&i8259>; - #interrupt-cells = <2>; - #address-cells = <2>; - #size-cells = <1>; - - dma-controller@0 { - compatible = "pnpPNP,200"; - reg = <1 0x00000000 0x00000020 - 1 0x00000080 0x00000010 - 1 0x000000c0 0x00000020>; - }; - - i8259: interrupt-controller@20 { - device_type = "interrupt-controller"; - compatible = "pnpPNP,000"; - interrupt-controller; - reg = <1 0x00000020 0x00000002 - 1 0x000000a0 0x00000002 - 1 0x000004d0 0x00000002>; - reserved-interrupts = <2>; - #interrupt-cells = <2>; - }; - - timer@40 { - // Also adds pcspkr to platform devices. - compatible = "pnpPNP,100"; - reg = <1 0x00000040 0x00000020>; - }; - - 8042@60 { - device_type = "8042"; - reg = <1 0x00000060 0x00000001 - 1 0x00000064 0x00000001>; - interrupts = <1 3 12 3>; - #address-cells = <1>; - #size-cells = <0>; - - keyboard@0 { - compatible = "pnpPNP,303"; - reg = <0>; - }; - - mouse@1 { - compatible = "pnpPNP,f03"; - reg = <1>; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <1 0x00000070 0x00000002>; - interrupts = <8 3>; - }; - - serial@3f8 { - device_type = "serial"; - compatible = "pnpPNP,501","pnpPNP,500"; - reg = <1 0x000003f8 0x00000008>; - interrupts = <4 3>; - clock-frequency = <1843200>; - current-speed = <115200>; - }; - - serial@2f8 { - device_type = "serial"; - compatible = "pnpPNP,501","pnpPNP,500"; - reg = <1 0x000002f8 0x00000008>; - interrupts = <3 3>; - clock-frequency = <1843200>; - current-speed = <115200>; - }; - - parallel@378 { - device_type = "parallel"; - // No ECP support for now, otherwise add "pnpPNP,401". - compatible = "pnpPNP,400"; - reg = <1 0x00000378 0x00000003 - 1 0x00000778 0x00000003>; - }; - - fdc@3f0 { - device_type = "fdc"; - compatible = "pnpPNP,700"; - reg = <1 0x000003f0 0x00000008>; - interrupts = <6 3>; - #address-cells = <1>; - #size-cells = <0>; - - disk@0 { - reg = <0>; - }; - }; - }; - }; - - chosen { - linux,stdout-path = "/pci@80000000/isa@7/serial@3f8"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/arches.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/arches.dts deleted file mode 100644 index 30f41204..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/arches.dts +++ /dev/null @@ -1,355 +0,0 @@ -/* - * Device Tree Source for AMCC Arches (dual 460GT board) - * - * (C) Copyright 2008 Applied Micro Circuits Corporation - * Victor Gallardo <vgallardo@amcc.com> - * Adam Graham <agraham@amcc.com> - * - * Based on the glacier.dts file - * Stefan Roese <sr@denx.de> - * Copyright 2008 DENX Software Engineering - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,arches"; - compatible = "amcc,arches"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - ethernet2 = &EMAC2; - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,460GT"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - next-level-cache = <&L2C0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-460gt"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-460gt"; - dcr-reg = <0x00c 0x002>; - }; - - L2C0: l2c { - compatible = "ibm,l2-cache-460gt", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ - 0x030 0x008>; /* L2 cache DCR's */ - cache-line-size = <32>; /* 32 bytes */ - cache-size = <262144>; /* L2, 256K */ - interrupt-parent = <&UIC1>; - interrupts = <11 1>; - }; - - plb { - compatible = "ibm,plb-460gt", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - CRYPTO: crypto@180000 { - compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto"; - reg = <4 0x00180000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x1d 0x4>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <3>; - num-rx-chans = <24>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-parent = <&UIC2>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x3 0x4 - /*TXDE*/ 0x4 0x4 - /*RXDE*/ 0x5 0x4>; - desc-base-addr-high = <0x8>; - }; - - POB0: opb { - compatible = "ibm,opb-460gt", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-460gt", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl256n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x02000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x01b60000>; - }; - partition@1f60000 { - label = "env"; - reg = <0x01f60000 0x00040000>; - }; - partition@1fa0000 { - label = "u-boot"; - reg = <0x01fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-460gt", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - sttm@4a { - compatible = "ad,ad7414"; - reg = <0x4a>; - interrupt-parent = <&UIC1>; - interrupts = <0x0 0x8>; - }; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-460gt", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - TAH0: emac-tah@ef601350 { - compatible = "ibm,tah-460gt", "ibm,tah"; - reg = <0xef601350 0x00000030>; - }; - - TAH1: emac-tah@ef601450 { - compatible = "ibm,tah-460gt", "ibm,tah"; - reg = <0xef601450 0x00000030>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 - /*Wake*/ 0x1 &UIC2 0x14 0x4>; - reg = <0xef600e00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "sgmii"; - phy-map = <0xffffffff>; - gpcs-address = <0x0000000a>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 - /*Wake*/ 0x1 &UIC2 0x15 0x4>; - reg = <0xef600f00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <8>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "sgmii"; - phy-map = <0x00000000>; - gpcs-address = <0x0000000b>; - tah-device = <&TAH1>; - tah-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - - EMAC2: ethernet@ef601100 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC2>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4 - /*Wake*/ 0x1 &UIC2 0x16 0x4>; - reg = <0xef601100 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <2>; - mal-rx-channel = <16>; - cell-index = <2>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; /* emac2&3 only */ - phy-mode = "sgmii"; - phy-map = <0x00000001>; - gpcs-address = <0x0000000C>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/asp834x-redboot.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/asp834x-redboot.dts deleted file mode 100644 index 227290db..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/asp834x-redboot.dts +++ /dev/null @@ -1,312 +0,0 @@ -/* - * Analogue & Micro ASP8347 Device Tree Source - * - * Copyright 2008 Codehermit - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "Analogue & Micro ASP8347E"; - compatible = "analogue-and-micro,asp8347e"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8347@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x8000000>; // 128MB at 0 - }; - - localbus@ff005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8347e-localbus", - "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xff005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - ranges = < - 0 0 0xf0000000 0x02000000 - >; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <2>; - device-width = <2>; - }; - }; - - soc8349@ff000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xff000000 0x00100000>; - reg = <0xff000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8347-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - /* phy type (ULPI or SERIAL) are only types supported for MPH */ - /* port = 0 or 1 */ - usb@22000 { - compatible = "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <39 0x8>; - phy_type = "ulpi"; - port0; - }; - /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "otg"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 08 e5 11 32 33 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 08 e5 11 32 34 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - linux,network-index = <1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <400000000>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <400000000>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - /* May need to remove if on a part without crypto engine */ - crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x0000007e>; - /* desc mask is for rev2.0, - * we need runtime fixup for >2.0 */ - descriptor-types-mask = <0x01010ebf>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - }; - - chosen { - bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2"; - linux,stdout-path = &serial0; - }; - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/bamboo.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/bamboo.dts deleted file mode 100644 index aa68911f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/bamboo.dts +++ /dev/null @@ -1,300 +0,0 @@ -/* - * Device Tree Source for AMCC Bamboo - * - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * FIXME: Draft only! - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,bamboo"; - compatible = "amcc,bamboo"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - serial3 = &UART3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440EP"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440ep"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440ep"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - DMA0: dma { - compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Bamboo is oddball in the 44x world and doesn't use the ERPN - * bits. - */ - ranges = <0x00000000 0x00000000 0x00000000 0x80000000 - 0x80000000 0x00000000 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 0x00000008>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 0x00000008>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x4 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0xef600e00 0x00000070>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0 1>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1e 0x4 0x1f 0x4>; - reg = <0xef600f00 0x00000070>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <2 3>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - }; - - usb@ef601000 { - compatible = "ohci-be"; - reg = <0xef601000 0x00000080>; - interrupts = <0x8 0x1 0x9 0x1>; - interrupt-parent = < &UIC1 >; - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; - primary; - reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ - 0x00000000 0xeed00000 0x00000004 /* IACK */ - 0x00000000 0xeed00000 0x00000004 /* Special cycle */ - 0x00000000 0xef400000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x40000000 - 0x02000000 0x00000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* Bamboo has all 4 IRQ pins tied together per slot */ - interrupt-map-mask = <0xf800 0x0 0x0 0x0>; - interrupt-map = < - /* IDSEL 1 */ - 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 - - /* IDSEL 2 */ - 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 - - /* IDSEL 3 */ - 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 - - /* IDSEL 4 */ - 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/bluestone.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/bluestone.dts deleted file mode 100644 index 7bda373f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/bluestone.dts +++ /dev/null @@ -1,377 +0,0 @@ -/* - * Device Tree for Bluestone (APM821xx) board. - * - * Copyright (c) 2010, Applied Micro Circuits Corporation - * Author: Tirumala R Marri <tmarri@apm.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "apm,bluestone"; - compatible = "apm,bluestone"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,apm821xx"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - next-level-cache = <&L2C0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-apm821xx"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-apm821xx"; - dcr-reg = <0x00c 0x002>; - }; - - L2C0: l2c { - compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 - 0x030 0x008>; - cache-line-size = <32>; - cache-size = <262144>; - interrupt-parent = <&UIC1>; - interrupts = <11 1>; - }; - - plb { - compatible = "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-apm821xx"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal2"; - descriptor-memory = "ocm"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <1>; - num-rx-chans = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-parent = <&UIC2>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x3 0x4 - /*TXDE*/ 0x4 0x4 - /*RXDE*/ 0x5 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>; - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x00400000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00180000>; - }; - partition@180000 { - label = "env"; - reg = <0x00180000 0x00020000>; - }; - partition@1a0000 { - label = "u-boot"; - reg = <0x001a0000 0x00060000>; - }; - }; - - ndfc@1,0 { - compatible = "ibm,ndfc"; - reg = <0x00000003 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - /* 2Gb Nand Flash */ - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "firmware"; - reg = <0x00000000 0x00C00000>; - }; - partition@c00000 { - label = "environment"; - reg = <0x00C00000 0x00B00000>; - }; - partition@1700000 { - label = "kernel"; - reg = <0x01700000 0x00E00000>; - }; - partition@2500000 { - label = "root"; - reg = <0x02500000 0x08200000>; - }; - partition@a700000 { - label = "device-tree"; - reg = <0x0A700000 0x00B00000>; - }; - partition@b200000 { - label = "config"; - reg = <0x0B200000 0x00D00000>; - }; - partition@bf00000 { - label = "diag"; - reg = <0x0BF00000 0x00C00000>; - }; - partition@cb00000 { - label = "vendor"; - reg = <0x0CB00000 0x3500000>; - }; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <0x1 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - rtc@68 { - compatible = "stm,m41t80"; - reg = <0x68>; - interrupt-parent = <&UIC0>; - interrupts = <0x9 0x8>; - }; - sttm@4C { - compatible = "adm,adm1032"; - reg = <0x4C>; - interrupt-parent = <&UIC1>; - interrupts = <0x1E 0x8>; /* CPU_THERNAL_L */ - }; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - RGMII0: emac-rgmii@ef601500 { - compatible = "ibm,rgmii"; - reg = <0xef601500 0x00000008>; - has-mdio; - }; - - TAH0: emac-tah@ef601350 { - compatible = "ibm,tah"; - reg = <0xef601350 0x00000030>; - }; - - EMAC0: ethernet@ef600c00 { - device_type = "network"; - compatible = "ibm,emac-apm821xx", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 - /*Wake*/ 0x1 &UIC2 0x14 0x4>; - reg = <0xef600c00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <16384>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x08010000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 40 to 0x7f */ - bus-range = <0x40 0x7f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/c2k.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/c2k.dts deleted file mode 100644 index f5d625fa..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/c2k.dts +++ /dev/null @@ -1,371 +0,0 @@ -/* Device Tree Source for GEFanuc C2K - * - * Author: Remi Machet <rmachet@slac.stanford.edu> - * - * Originated from prpmc2800.dts - * - * 2008 (c) Stanford University - * 2007 (c) MontaVista, Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "C2K"; - compatible = "GEFanuc,C2K"; - coherency-off; - - aliases { - pci0 = &PCI0; - pci1 = &PCI1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "PowerPC,7447"; - reg = <0>; - clock-frequency = <996000000>; /* 996 MHz */ - bus-frequency = <166666667>; /* 166.6666 MHz */ - timebase-frequency = <41666667>; /* 166.6666/4 MHz */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x40000000>; /* 1GB */ - }; - - system-controller@d8000000 { /* Marvell Discovery */ - #address-cells = <1>; - #size-cells = <1>; - model = "mv64460"; - compatible = "marvell,mv64360"; - clock-frequency = <166666667>; /* 166.66... MHz */ - reg = <0xd8000000 0x00010000>; - virtual-reg = <0xd8000000>; - ranges = <0xd4000000 0xd4000000 0x01000000 /* PCI 0 I/O Space */ - 0x80000000 0x80000000 0x08000000 /* PCI 0 MEM Space */ - 0xd0000000 0xd0000000 0x01000000 /* PCI 1 I/O Space */ - 0xa0000000 0xa0000000 0x08000000 /* PCI 1 MEM Space */ - 0xd8100000 0xd8100000 0x00010000 /* FPGA */ - 0xd8110000 0xd8110000 0x00010000 /* FPGA USARTs */ - 0xf8000000 0xf8000000 0x08000000 /* User FLASH */ - 0x00000000 0xd8000000 0x00010000 /* Bridge's regs */ - 0xd8140000 0xd8140000 0x00040000>; /* Integrated SRAM */ - - mdio@2000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "marvell,mv64360-mdio"; - reg = <0x2000 4>; - PHY0: ethernet-phy@0 { - device_type = "ethernet-phy"; - interrupts = <76>; /* GPP 12 */ - interrupt-parent = <&PIC>; - reg = <0>; - }; - PHY1: ethernet-phy@1 { - device_type = "ethernet-phy"; - interrupts = <76>; /* GPP 12 */ - interrupt-parent = <&PIC>; - reg = <1>; - }; - PHY2: ethernet-phy@2 { - device_type = "ethernet-phy"; - interrupts = <76>; /* GPP 12 */ - interrupt-parent = <&PIC>; - reg = <2>; - }; - }; - - ethernet-group@2000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "marvell,mv64360-eth-group"; - reg = <0x2000 0x2000>; - ethernet@0 { - device_type = "network"; - compatible = "marvell,mv64360-eth"; - reg = <0>; - interrupts = <32>; - interrupt-parent = <&PIC>; - phy = <&PHY0>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - ethernet@1 { - device_type = "network"; - compatible = "marvell,mv64360-eth"; - reg = <1>; - interrupts = <33>; - interrupt-parent = <&PIC>; - phy = <&PHY1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - ethernet@2 { - device_type = "network"; - compatible = "marvell,mv64360-eth"; - reg = <2>; - interrupts = <34>; - interrupt-parent = <&PIC>; - phy = <&PHY2>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - }; - - SDMA0: sdma@4000 { - compatible = "marvell,mv64360-sdma"; - reg = <0x4000 0xc18>; - virtual-reg = <0xd8004000>; - interrupt-base = <0>; - interrupts = <36>; - interrupt-parent = <&PIC>; - }; - - SDMA1: sdma@6000 { - compatible = "marvell,mv64360-sdma"; - reg = <0x6000 0xc18>; - virtual-reg = <0xd8006000>; - interrupt-base = <0>; - interrupts = <38>; - interrupt-parent = <&PIC>; - }; - - BRG0: brg@b200 { - compatible = "marvell,mv64360-brg"; - reg = <0xb200 0x8>; - clock-src = <8>; - clock-frequency = <133333333>; - current-speed = <115200>; - }; - - BRG1: brg@b208 { - compatible = "marvell,mv64360-brg"; - reg = <0xb208 0x8>; - clock-src = <8>; - clock-frequency = <133333333>; - current-speed = <115200>; - }; - - CUNIT: cunit@f200 { - reg = <0xf200 0x200>; - }; - - MPSCROUTING: mpscrouting@b400 { - reg = <0xb400 0xc>; - }; - - MPSCINTR: mpscintr@b800 { - reg = <0xb800 0x100>; - virtual-reg = <0xd800b800>; - }; - - MPSC0: mpsc@8000 { - device_type = "serial"; - compatible = "marvell,mv64360-mpsc"; - reg = <0x8000 0x38>; - virtual-reg = <0xd8008000>; - sdma = <&SDMA0>; - brg = <&BRG0>; - cunit = <&CUNIT>; - mpscrouting = <&MPSCROUTING>; - mpscintr = <&MPSCINTR>; - cell-index = <0>; - interrupts = <40>; - interrupt-parent = <&PIC>; - }; - - MPSC1: mpsc@9000 { - device_type = "serial"; - compatible = "marvell,mv64360-mpsc"; - reg = <0x9000 0x38>; - virtual-reg = <0xd8009000>; - sdma = <&SDMA1>; - brg = <&BRG1>; - cunit = <&CUNIT>; - mpscrouting = <&MPSCROUTING>; - mpscintr = <&MPSCINTR>; - cell-index = <1>; - interrupts = <42>; - interrupt-parent = <&PIC>; - }; - - wdt@b410 { /* watchdog timer */ - compatible = "marvell,mv64360-wdt"; - reg = <0xb410 0x8>; - }; - - i2c@c000 { - compatible = "marvell,mv64360-i2c"; - reg = <0xc000 0x20>; - virtual-reg = <0xd800c000>; - interrupts = <37>; - interrupt-parent = <&PIC>; - }; - - PIC: pic { - #interrupt-cells = <1>; - #address-cells = <0>; - compatible = "marvell,mv64360-pic"; - reg = <0x0000 0x88>; - interrupt-controller; - }; - - mpp@f000 { - compatible = "marvell,mv64360-mpp"; - reg = <0xf000 0x10>; - }; - - gpp@f100 { - compatible = "marvell,mv64360-gpp"; - reg = <0xf100 0x20>; - }; - - PCI0: pci@80000000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "marvell,mv64360-pci"; - reg = <0x0cf8 0x8>; - ranges = <0x01000000 0x0 0x00000000 0xd4000000 0x0 0x01000000 - 0x02000000 0x0 0x80000000 0x80000000 0x0 0x08000000>; - bus-range = <0 255>; - clock-frequency = <66000000>; - interrupt-pci-iack = <0x0c34>; - interrupt-parent = <&PIC>; - interrupt-map-mask = <0x0000 0x0 0x0 0x7>; - interrupt-map = < - /* Only one interrupt line for PMC0 slot (INTA) */ - 0x0000 0 0 1 &PIC 88 - >; - }; - - - PCI1: pci@a0000000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "marvell,mv64360-pci"; - reg = <0x0c78 0x8>; - ranges = <0x01000000 0x0 0x00000000 0xd0000000 0x0 0x01000000 - 0x02000000 0x0 0x80000000 0xa0000000 0x0 0x08000000>; - bus-range = <0 255>; - clock-frequency = <66000000>; - interrupt-pci-iack = <0x0cb4>; - interrupt-parent = <&PIC>; - interrupt-map-mask = <0xf800 0x00 0x00 0x7>; - interrupt-map = < - /* IDSEL 0x01: PMC1 ? */ - 0x0800 0 0 1 &PIC 88 - /* IDSEL 0x02: cPCI bridge */ - 0x1000 0 0 1 &PIC 88 - /* IDSEL 0x03: USB controller */ - 0x1800 0 0 1 &PIC 91 - /* IDSEL 0x04: SATA controller */ - 0x2000 0 0 1 &PIC 95 - >; - }; - - cpu-error@0070 { - compatible = "marvell,mv64360-cpu-error"; - reg = <0x0070 0x10 0x0128 0x28>; - interrupts = <3>; - interrupt-parent = <&PIC>; - }; - - sram-ctrl@0380 { - compatible = "marvell,mv64360-sram-ctrl"; - reg = <0x0380 0x80>; - interrupts = <13>; - interrupt-parent = <&PIC>; - }; - - pci-error@1d40 { - compatible = "marvell,mv64360-pci-error"; - reg = <0x1d40 0x40 0x0c28 0x4>; - interrupts = <12>; - interrupt-parent = <&PIC>; - }; - - pci-error@1dc0 { - compatible = "marvell,mv64360-pci-error"; - reg = <0x1dc0 0x40 0x0ca8 0x4>; - interrupts = <16>; - interrupt-parent = <&PIC>; - }; - - mem-ctrl@1400 { - compatible = "marvell,mv64360-mem-ctrl"; - reg = <0x1400 0x60>; - interrupts = <17>; - interrupt-parent = <&PIC>; - }; - /* Devices attached to the device controller */ - devicebus@045c { - #address-cells = <2>; - #size-cells = <1>; - compatible = "marvell,mv64306-devctrl"; - reg = <0x45C 0x88>; - interrupts = <1>; - interrupt-parent = <&PIC>; - ranges = <0 0 0xd8100000 0x10000 - 2 0 0xd8110000 0x10000 - 4 0 0xf8000000 0x8000000>; - fpga@0,0 { - compatible = "sbs,fpga-c2k"; - reg = <0 0 0x10000>; - }; - fpga_usart@2,0 { - compatible = "sbs,fpga_usart-c2k"; - reg = <2 0 0x10000>; - }; - nor_flash@4,0 { - compatible = "cfi-flash"; - reg = <4 0 0x8000000>; /* 128MB */ - bank-width = <4>; - device-width = <1>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "boot"; - reg = <0x00000000 0x00080000>; - }; - partition@40000 { - label = "kernel"; - reg = <0x00080000 0x00400000>; - }; - partition@440000 { - label = "initrd"; - reg = <0x00480000 0x00B80000>; - }; - partition@1000000 { - label = "rootfs"; - reg = <0x01000000 0x06800000>; - }; - partition@7800000 { - label = "recovery"; - reg = <0x07800000 0x00800000>; - read-only; - }; - }; - }; - }; - chosen { - linux,stdout-path = &MPSC0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/canyonlands.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/canyonlands.dts deleted file mode 100644 index 3dc75dea..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/canyonlands.dts +++ /dev/null @@ -1,557 +0,0 @@ -/* - * Device Tree Source for AMCC Canyonlands (460EX) - * - * Copyright 2008-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,canyonlands"; - compatible = "amcc,canyonlands"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,460EX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - next-level-cache = <&L2C0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-460ex","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-460ex","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-460ex","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-460ex","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-460ex"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-460ex"; - dcr-reg = <0x00c 0x002>; - }; - - CPM0: cpm { - compatible = "ibm,cpm"; - dcr-access-method = "native"; - dcr-reg = <0x160 0x003>; - unused-units = <0x00000100>; - idle-doze = <0x02000000>; - standby = <0xfeff791d>; - }; - - L2C0: l2c { - compatible = "ibm,l2-cache-460ex", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ - 0x030 0x008>; /* L2 cache DCR's */ - cache-line-size = <32>; /* 32 bytes */ - cache-size = <262144>; /* L2, 256K */ - interrupt-parent = <&UIC1>; - interrupts = <11 1>; - }; - - plb { - compatible = "ibm,plb-460ex", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - CRYPTO: crypto@180000 { - compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto"; - reg = <4 0x00180000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x1d 0x4>; - }; - - HWRNG: hwrng@110000 { - compatible = "amcc,ppc460ex-rng", "ppc4xx-rng"; - reg = <4 0x00110000 0x50>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <16>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-parent = <&UIC2>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x3 0x4 - /*TXDE*/ 0x4 0x4 - /*RXDE*/ 0x5 0x4>; - }; - - USB0: ehci@bffd0400 { - compatible = "ibm,usb-ehci-460ex", "usb-ehci"; - interrupt-parent = <&UIC2>; - interrupts = <0x1d 4>; - reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>; - }; - - USB1: usb@bffd0000 { - compatible = "ohci-le"; - reg = <4 0xbffd0000 0x60>; - interrupt-parent = <&UIC2>; - interrupts = <0x1e 4>; - }; - - USBOTG0: usbotg@bff80000 { - compatible = "amcc,dwc-otg"; - reg = <0x4 0xbff80000 0x10000>; - interrupt-parent = <&USBOTG0>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupts = <0x0 0x1 0x2>; - interrupt-map = </* USB-OTG */ 0x0 &UIC2 0x1c 0x4 - /* HIGH-POWER */ 0x1 &UIC1 0x1a 0x8 - /* DMA */ 0x2 &UIC0 0xc 0x4>; - }; - - SATA0: sata@bffd1000 { - compatible = "amcc,sata-460ex"; - reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>; - interrupt-parent = <&UIC3>; - interrupts = <0x0 0x4 /* SATA */ - 0x5 0x4>; /* AHBDMA */ - }; - - POB0: opb { - compatible = "ibm,opb-460ex", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-460ex", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "ramdisk"; - reg = <0x00200000 0x01400000>; - }; - partition@1600000 { - label = "jffs2"; - reg = <0x01600000 0x00400000>; - }; - partition@1a00000 { - label = "user"; - reg = <0x01a00000 0x02560000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - cpld@2,0 { - compatible = "amcc,ppc460ex-bcsr"; - reg = <2 0x0 0x9>; - }; - - ndfc@3,0 { - compatible = "ibm,ndfc"; - reg = <0x00000003 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - }; - partition@100000 { - label = "user"; - reg = <0x00000000 0x03f00000>; - }; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <0x1 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-460ex", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - rtc@68 { - compatible = "stm,m41t80"; - reg = <0x68>; - interrupt-parent = <&UIC2>; - interrupts = <0x19 0x8>; - }; - sttm@48 { - compatible = "ad,ad7414"; - reg = <0x48>; - interrupt-parent = <&UIC1>; - interrupts = <0x14 0x8>; - }; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-460ex", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - GPIO0: gpio@ef600b00 { - compatible = "ibm,ppc4xx-gpio"; - reg = <0xef600b00 0x00000048>; - gpio-controller; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-460ex", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - RGMII0: emac-rgmii@ef601500 { - compatible = "ibm,rgmii-460ex", "ibm,rgmii"; - reg = <0xef601500 0x00000008>; - has-mdio; - }; - - TAH0: emac-tah@ef601350 { - compatible = "ibm,tah-460ex", "ibm,tah"; - reg = <0xef601350 0x00000030>; - }; - - TAH1: emac-tah@ef601450 { - compatible = "ibm,tah-460ex", "ibm,tah"; - reg = <0xef601450 0x00000030>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-460ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 - /*Wake*/ 0x1 &UIC2 0x14 0x4>; - reg = <0xef600e00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-460ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 - /*Wake*/ 0x1 &UIC2 0x15 0x4>; - reg = <0xef600f00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <8>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - tah-device = <&TAH1>; - tah-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - }; - - PCIX0: pci@c0ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix"; - primary; - large-inbound-windows; - enable-msi-hole; - reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ - 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ - 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0 to 0x3f */ - bus-range = <0x0 0x3f>; - - /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ - interrupt-map-mask = <0x0 0x0 0x0 0x0>; - interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; - }; - - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x08010000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 40 to 0x7f */ - bus-range = <0x40 0x7f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@d20000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ - 0x0000000c 0x08011000 0x00001000>; /* Registers */ - dcr-reg = <0x120 0x020>; - sdr-base = <0x340>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 80 to 0xbf */ - bus-range = <0x80 0xbf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; - }; - - MSI: ppc4xx-msi@C10000000 { - compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; - reg = < 0xC 0x10000000 0x100>; - sdr-base = <0x36C>; - msi-data = <0x00000000>; - msi-mask = <0x44440000>; - interrupt-count = <3>; - interrupts = <0 1 2 3>; - interrupt-parent = <&UIC3>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &UIC3 0x18 1 - 1 &UIC3 0x19 1 - 2 &UIC3 0x1A 1 - 3 &UIC3 0x1B 1>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/charon.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/charon.dts deleted file mode 100644 index 0e00e508..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/charon.dts +++ /dev/null @@ -1,236 +0,0 @@ -/* - * charon board Device Tree Source - * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz <m8@semihalf.com> - * - * Copyright (C) 2010 DENX Software Engineering GmbH - * Heiko Schocher <hs@denx.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "anon,charon"; - compatible = "anon,charon"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&mpc5200_pic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,5200@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; // 128MB - }; - - soc5200@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc5200-immr"; - ranges = <0 0xf0000000 0x0000c000>; - reg = <0xf0000000 0x00000100>; - bus-frequency = <0>; // from bootloader - system-frequency = <0>; // from bootloader - - cdm@200 { - compatible = "fsl,mpc5200-cdm"; - reg = <0x200 0x38>; - }; - - mpc5200_pic: interrupt-controller@500 { - // 5200 interrupts are encoded into two levels; - interrupt-controller; - #interrupt-cells = <3>; - compatible = "fsl,mpc5200-pic"; - reg = <0x500 0x80>; - }; - - timer@600 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x600 0x10>; - interrupts = <1 9 0>; - fsl,has-wdt; - }; - - can@900 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 17 0>; - reg = <0x900 0x80>; - }; - - can@980 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 18 0>; - reg = <0x980 0x80>; - }; - - gpio_simple: gpio@b00 { - compatible = "fsl,mpc5200-gpio"; - reg = <0xb00 0x40>; - interrupts = <1 7 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - usb@1000 { - compatible = "fsl,mpc5200-ohci","ohci-be"; - reg = <0x1000 0xff>; - interrupts = <2 6 0>; - }; - - dma-controller@1200 { - device_type = "dma-controller"; - compatible = "fsl,mpc5200-bestcomm"; - reg = <0x1200 0x80>; - interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 - 3 4 0 3 5 0 3 6 0 3 7 0 - 3 8 0 3 9 0 3 10 0 3 11 0 - 3 12 0 3 13 0 3 14 0 3 15 0>; - }; - - xlb@1f00 { - compatible = "fsl,mpc5200-xlb"; - reg = <0x1f00 0x100>; - }; - - serial@2000 { // PSC1 - compatible = "fsl,mpc5200-psc-uart"; - reg = <0x2000 0x100>; - interrupts = <2 1 0>; - }; - - serial@2400 { // PSC3 - compatible = "fsl,mpc5200-psc-uart"; - reg = <0x2400 0x100>; - interrupts = <2 3 0>; - }; - - ethernet@3000 { - compatible = "fsl,mpc5200-fec"; - reg = <0x3000 0x400>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <2 5 0>; - fixed-link = <1 1 100 0 0>; - }; - - mdio@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-mdio"; - reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts - interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. - }; - - ata@3a00 { - compatible = "fsl,mpc5200-ata"; - reg = <0x3a00 0x100>; - interrupts = <2 7 0>; - }; - - i2c@3d00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d00 0x40>; - interrupts = <2 15 0>; - }; - - - i2c@3d40 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d40 0x40>; - interrupts = <2 16 0>; - - dtt@28 { - compatible = "national,lm80"; - reg = <0x28>; - }; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - localbus { - compatible = "fsl,mpc5200-lpb","simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - ranges = < 0 0 0xfc000000 0x02000000 - 1 0 0xe0000000 0x04000000 // CS1 range, SM501 - 3 0 0xe8000000 0x00080000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <4>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - }; - - display@1,0 { - compatible = "smi,sm501"; - reg = <1 0x00000000 0x00800000 - 1 0x03e00000 0x00200000>; - mode = "640x480-32@60"; - interrupts = <1 1 3>; - little-endian; - }; - - mram0@3,0 { - compatible = "mtd-ram"; - reg = <3 0x00000 0x80000>; - bank-width = <1>; - }; - }; - - pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200-pci"; - reg = <0xf0000d00 0x100>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 - 0xc000 0 0 2 &mpc5200_pic 0 0 3 - 0xc000 0 0 3 &mpc5200_pic 0 0 3 - 0xc000 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/cm5200.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/cm5200.dts deleted file mode 100644 index ad3a4f4a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/cm5200.dts +++ /dev/null @@ -1,91 +0,0 @@ -/* - * CM5200 board Device Tree Source - * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz <m8@semihalf.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "schindler,cm5200"; - compatible = "schindler,cm5200"; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - can@900 { - status = "disabled"; - }; - - can@980 { - status = "disabled"; - }; - - psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2200 { // PSC2 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2400 { // PSC3 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - status = "disabled"; - }; - - psc@2c00 { // PSC6 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - ata@3a00 { - status = "disabled"; - }; - - i2c@3d00 { - status = "disabled"; - }; - - }; - - pci@f0000d00 { - status = "disabled"; - }; - - localbus { - // 16-bit flash device at LocalPlus Bus CS0 - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x2000000>; - bank-width = <2>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts deleted file mode 100644 index b801dd06..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts +++ /dev/null @@ -1,237 +0,0 @@ -/* - * Device Tree Source for IBM Embedded PPC 476 Platform - * - * Copyright © 2011 Tony Breeds IBM Corporation - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/memreserve/ 0x01f00000 0x00100000; // spin table - -/ { - #address-cells = <2>; - #size-cells = <2>; - model = "ibm,currituck"; - compatible = "ibm,currituck"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,476"; - reg = <0>; - clock-frequency = <1600000000>; // 1.6 GHz - timebase-frequency = <100000000>; // 100Mhz - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "ok"; - }; - cpu@1 { - device_type = "cpu"; - model = "PowerPC,476"; - reg = <1>; - clock-frequency = <1600000000>; // 1.6 GHz - timebase-frequency = <100000000>; // 100Mhz - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "disabled"; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x01f00000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // filled in by zImage - }; - - MPIC: interrupt-controller { - compatible = "chrp,open-pic"; - interrupt-controller; - dcr-reg = <0xffc00000 0x00040000>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - - }; - - plb { - compatible = "ibm,plb6"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - clock-frequency = <200000000>; // 200Mhz - - POB0: opb { - compatible = "ibm,opb-4xx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full - * 32-bit range - */ - ranges = <0x00000000 0x00000200 0x00000000 0x80000000 - 0x80000000 0x00000200 0x80000000 0x80000000>; - clock-frequency = <100000000>; - - UART0: serial@10000000 { - device_type = "serial"; - compatible = "ns16750", "ns16550"; - reg = <0x10000000 0x00000008>; - virtual-reg = <0xe1000000>; - clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART] - current-speed = <115200>; - interrupt-parent = <&MPIC>; - interrupts = <34 2>; - }; - - IIC0: i2c@00000000 { - compatible = "ibm,iic-currituck", "ibm,iic"; - reg = <0x0 0x00000014>; - interrupt-parent = <&MPIC>; - interrupts = <79 2>; - #address-cells = <1>; - #size-cells = <0>; - rtc@68 { - compatible = "stm,m41t80", "m41st85"; - reg = <0x68>; - }; - }; - }; - - PCIE0: pciex@10100000000 { // 4xGBIF1 - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x00000101 0x00000000 0x0 0x10000000 /* Config space access */ - 0x00000100 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ - dcr-reg = <0x80 0x20>; - -// pci_space < pci_addr > < cpu_addr > < size > - ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000 - 0x01000000 0x0 0x0 0x00000140 0x0 0x0 0x00010000>; - - /* Inbound starting at 0 to memsize filled in by zImage */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &MPIC 46 0x2 /* int A */ - 0x0 0x0 0x0 0x2 &MPIC 47 0x2 /* int B */ - 0x0 0x0 0x0 0x3 &MPIC 48 0x2 /* int C */ - 0x0 0x0 0x0 0x4 &MPIC 49 0x2 /* int D */>; - }; - - PCIE1: pciex@30100000000 { // 4xGBIF0 - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x00000301 0x00000000 0x0 0x10000000 /* Config space access */ - 0x00000300 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ - dcr-reg = <0x60 0x20>; - - ranges = <0x02000000 0x00000000 0x80000000 0x00000310 0x80000000 0x0 0x80000000 - 0x01000000 0x0 0x0 0x00000340 0x0 0x0 0x00010000>; - - /* Inbound starting at 0 to memsize filled in by zImage */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &MPIC 38 0x2 /* int A */ - 0x0 0x0 0x0 0x2 &MPIC 39 0x2 /* int B */ - 0x0 0x0 0x0 0x3 &MPIC 40 0x2 /* int C */ - 0x0 0x0 0x0 0x4 &MPIC 41 0x2 /* int D */>; - }; - - PCIE2: pciex@38100000000 { // 2xGBIF0 - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; - primary; - port = <0x2>; /* port number */ - reg = <0x00000381 0x00000000 0x0 0x10000000 /* Config space access */ - 0x00000380 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ - dcr-reg = <0xA0 0x20>; - - ranges = <0x02000000 0x00000000 0x80000000 0x00000390 0x80000000 0x0 0x80000000 - 0x01000000 0x0 0x0 0x000003C0 0x0 0x0 0x00010000>; - - /* Inbound starting at 0 to memsize filled in by zImage */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &MPIC 54 0x2 /* int A */ - 0x0 0x0 0x0 0x2 &MPIC 55 0x2 /* int B */ - 0x0 0x0 0x0 0x3 &MPIC 56 0x2 /* int C */ - 0x0 0x0 0x0 0x4 &MPIC 57 0x2 /* int D */>; - }; - - }; - - chosen { - linux,stdout-path = &UART0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/digsy_mtc.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/digsy_mtc.dts deleted file mode 100644 index a7511f2d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/digsy_mtc.dts +++ /dev/null @@ -1,169 +0,0 @@ -/* - * Digsy MTC board Device Tree Source - * - * Copyright (C) 2009 Semihalf - * - * Based on the CM5200 by M. Balakowicz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "intercontrol,digsy-mtc"; - compatible = "intercontrol,digsy-mtc"; - - memory { - reg = <0x00000000 0x02000000>; // 32MB - }; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - #gpio-cells = <2>; - fsl,has-wdt; - gpio-controller; - }; - - timer@610 { - #gpio-cells = <2>; - gpio-controller; - }; - - rtc@800 { - status = "disabled"; - }; - - spi@f00 { - msp430@0 { - compatible = "spidev"; - spi-max-frequency = <32000>; - reg = <0>; - }; - }; - - psc@2000 { // PSC1 - status = "disabled"; - }; - - psc@2200 { // PSC2 - status = "disabled"; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2800 { // PSC5 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2c00 { // PSC6 - status = "disabled"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - i2c@3d00 { - eeprom@50 { - compatible = "at,24c08"; - reg = <0x50>; - }; - - rtc@56 { - compatible = "mc,rv3029c2"; - reg = <0x56>; - }; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - i2c@3d40 { - status = "disabled"; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 - 0xc000 0 0 2 &mpc5200_pic 0 0 3 - 0xc000 0 0 3 &mpc5200_pic 0 0 3 - 0xc000 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; - }; - - localbus { - ranges = <0 0 0xff000000 0x1000000 - 4 0 0x60000000 0x0001000>; - - // 16-bit flash device at LocalPlus Bus CS0 - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x1000000>; - bank-width = <2>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - - partition@0 { - label = "kernel"; - reg = <0x0 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00300000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x00a00000>; - }; - partition@f00000 { - label = "u-boot"; - reg = <0x00f00000 0x100000>; - }; - }; - - can@4,0 { - compatible = "nxp,sja1000"; - reg = <4 0x000 0x80>; - nxp,external-clock-frequency = <24000000>; - interrupts = <1 2 3>; // Level-low - }; - - can@4,100 { - compatible = "nxp,sja1000"; - reg = <4 0x100 0x80>; - nxp,external-clock-frequency = <24000000>; - interrupts = <1 2 3>; // Level-low - }; - - serial@4,200 { - compatible = "nxp,sc28l92"; - reg = <4 0x200 0x10>; - interrupts = <1 3 3>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ebony.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ebony.dts deleted file mode 100644 index ec2d1422..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ebony.dts +++ /dev/null @@ -1,337 +0,0 @@ -/* - * Device Tree Source for IBM Ebony - * - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com> - * - * FIXME: Draft only! - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "ibm,ebony"; - compatible = "ibm,ebony"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440GP"; - reg = <0x00000000>; - clock-frequency = <0>; // Filled in by zImage - timebase-frequency = <0>; // Filled in by zImage - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; /* 32 kB */ - d-cache-size = <32768>; /* 32 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440gp", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440gp", "ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - CPC0: cpc { - compatible = "ibm,cpc-440gp"; - dcr-reg = <0x0b0 0x003 0x0e0 0x010>; - // FIXME: anything else? - }; - - plb { - compatible = "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; // Filled in by zImage - - SDRAM0: memory-controller { - compatible = "ibm,sdram-440gp"; - dcr-reg = <0x010 0x002>; - // FIXME: anything else? - }; - - SRAM0: sram { - compatible = "ibm,sram-440gp"; - dcr-reg = <0x020 0x008 0x00a 0x001>; - }; - - DMA0: dma { - // FIXME: ??? - compatible = "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <4>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full 32-bit - range */ - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - dcr-reg = <0x090 0x00b>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; // Filled in by zImage - - EBC0: ebc { - compatible = "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; // Filled in by zImage - // ranges property is supplied by zImage - // based on firmware's configuration of the - // EBC bridge - interrupts = <0x5 0x4>; - interrupt-parent = <&UIC1>; - - small-flash@0,80000 { - compatible = "jedec-flash"; - bank-width = <1>; - reg = <0x00000000 0x00080000 0x00080000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "OpenBIOS"; - reg = <0x00000000 0x00080000>; - read-only; - }; - }; - - nvram@1,0 { - /* NVRAM & RTC */ - compatible = "ds1743-nvram"; - #bytes = <0x2000>; - reg = <0x00000001 0x00000000 0x00002000>; - }; - - large-flash@2,0 { - compatible = "jedec-flash"; - bank-width = <1>; - reg = <0x00000002 0x00000000 0x00400000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "fs"; - reg = <0x00000000 0x00380000>; - }; - partition@380000 { - label = "firmware"; - reg = <0x00380000 0x00080000>; - }; - }; - - ir@3,0 { - reg = <0x00000003 0x00000000 0x00000010>; - }; - - fpga@7,0 { - compatible = "Ebony-FPGA"; - reg = <0x00000007 0x00000000 0x00000010>; - virtual-reg = <0xe8300000>; - }; - }; - - UART0: serial@40000200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x40000200 0x00000008>; - virtual-reg = <0xe0000200>; - clock-frequency = <11059200>; - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@40000300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x40000300 0x00000008>; - virtual-reg = <0xe0000300>; - clock-frequency = <11059200>; - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@40000400 { - /* FIXME */ - compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <0x40000400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - IIC1: i2c@40000500 { - /* FIXME */ - compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <0x40000500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - GPIO0: gpio@40000700 { - /* FIXME */ - compatible = "ibm,gpio-440gp"; - reg = <0x40000700 0x00000020>; - }; - - ZMII0: emac-zmii@40000780 { - compatible = "ibm,zmii-440gp", "ibm,zmii"; - reg = <0x40000780 0x0000000c>; - }; - - EMAC0: ethernet@40000800 { - device_type = "network"; - compatible = "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0x40000800 0x00000070>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <0 1>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000001>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - EMAC1: ethernet@40000900 { - device_type = "network"; - compatible = "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1e 0x4 0x1f 0x4>; - reg = <0x40000900 0x00000070>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <2 3>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000001>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - }; - - - GPT0: gpt@40000a00 { - /* FIXME */ - reg = <0x40000a00 0x000000d4>; - interrupt-parent = <&UIC0>; - interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>; - }; - - }; - - PCIX0: pci@20ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; - primary; - reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x00000002 0x0ed00000 0x00000004 /* Special cycles */ - 0x00000002 0x0ec80000 0x000000f0 /* Internal registers */ - 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* Ebony has all 4 IRQ pins tied together per slot */ - interrupt-map-mask = <0xf800 0x0 0x0 0x0>; - interrupt-map = < - /* IDSEL 1 */ - 0x800 0x0 0x0 0x0 &UIC0 0x17 0x8 - - /* IDSEL 2 */ - 0x1000 0x0 0x0 0x0 &UIC0 0x18 0x8 - - /* IDSEL 3 */ - 0x1800 0x0 0x0 0x0 &UIC0 0x19 0x8 - - /* IDSEL 4 */ - 0x2000 0x0 0x0 0x0 &UIC0 0x1a 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@40000200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/eiger.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/eiger.dts deleted file mode 100644 index 48bcf718..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/eiger.dts +++ /dev/null @@ -1,427 +0,0 @@ -/* - * Device Tree Source for AMCC (AppliedMicro) Eiger(460SX) - * - * Copyright 2009 AMCC (AppliedMicro) <ttnguyen@amcc.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,eiger"; - compatible = "amcc,eiger"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - ethernet2 = &EMAC2; - ethernet3 = &EMAC3; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,460SX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-460sx"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-460sx"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-460sx", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; - dcr-reg = <0x180 0x62>; - num-tx-chans = <4>; - num-rx-chans = <32>; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&UIC1>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x1 0x4 - /*TXDE*/ 0x2 0x4 - /*RXDE*/ 0x3 0x4 - /*COAL TX0*/ 0x18 0x2 - /*COAL TX1*/ 0x19 0x2 - /*COAL TX2*/ 0x1a 0x2 - /*COAL TX3*/ 0x1b 0x2 - /*COAL RX0*/ 0x1c 0x2 - /*COAL RX1*/ 0x1d 0x2 - /*COAL RX2*/ 0x1e 0x2 - /*COAL RX3*/ 0x1f 0x2>; - }; - - POB0: opb { - compatible = "ibm,opb-460sx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-460sx", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - /* reg property is supplied in by U-Boot */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "ramdisk"; - reg = <0x00200000 0x01400000>; - }; - partition@1600000 { - label = "jffs2"; - reg = <0x01600000 0x00400000>; - }; - partition@1a00000 { - label = "user"; - reg = <0x01a00000 0x02560000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - ndfc@1,0 { - compatible = "ibm,ndfc"; - /* reg property is supplied by U-boot */ - ccr = <0x00003000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "uboot"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "uboot-environment"; - reg = <0x00200000 0x00100000>; - }; - partition@300000 { - label = "linux"; - reg = <0x00300000 0x00300000>; - }; - partition@600000 { - label = "root-file-system"; - reg = <0x00600000 0x01900000>; - }; - partition@1f00000 { - label = "device-tree"; - reg = <0x01f00000 0x00020000>; - }; - partition@1f20000 { - label = "data"; - reg = <0x01f20000 0x060E0000>; - }; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600400 { - compatible = "ibm,iic-460sx", "ibm,iic"; - reg = <0xef600400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - index = <0>; - }; - - IIC1: i2c@ef600500 { - compatible = "ibm,iic-460sx", "ibm,iic"; - reg = <0xef600500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - #address-cells = <1>; - #size-cells = <0>; - index = <1>; - }; - - RGMII0: emac-rgmii@ef600900 { - compatible = "ibm,rgmii-460sx", "ibm,rgmii"; - reg = <0xef600900 0x00000008>; - has-mdio; - }; - - RGMII1: emac-rgmii@ef600920 { - compatible = "ibm,rgmii-460sx", "ibm,rgmii"; - reg = <0xef600920 0x00000008>; - has-mdio; - }; - - TAH0: emac-tah@ef600e50 { - compatible = "ibm,tah-460sx", "ibm,tah"; - reg = <0xef600e50 0x00000030>; - }; - - TAH1: emac-tah@ef600f50 { - compatible = "ibm,tah-460sx", "ibm,tah"; - reg = <0xef600f50 0x00000030>; - }; - - EMAC0: ethernet@ef600a00 { - device_type = "network"; - compatible = "ibm,emac-460sx", "ibm,emac4"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 - /*Wake*/ 0x1 &UIC2 0x1d 0x4>; - reg = <0xef600a00 0x00000070>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600b00 { - device_type = "network"; - compatible = "ibm,emac-460sx", "ibm,emac4"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4 - /*Wake*/ 0x1 &UIC2 0x1d 0x4>; - reg = <0xef600b00 0x00000070>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <8>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - tah-device = <&TAH1>; - tah-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - - EMAC2: ethernet@ef600c00 { - device_type = "network"; - compatible = "ibm,emac-460sx", "ibm,emac4"; - interrupt-parent = <&EMAC2>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x15 0x4 - /*Wake*/ 0x1 &UIC2 0x1d 0x4>; - reg = <0xef600c00 0x00000070>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <2>; - mal-rx-channel = <16>; - cell-index = <2>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; /* emac2&3 only */ - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII1>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - - EMAC3: ethernet@ef600d00 { - device_type = "network"; - compatible = "ibm,emac-460sx", "ibm,emac4"; - interrupt-parent = <&EMAC3>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x16 0x4 - /*Wake*/ 0x1 &UIC2 0x1d 0x4>; - reg = <0xef600d00 0x00000070>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <3>; - mal-rx-channel = <24>; - cell-index = <3>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; /* emac2&3 only */ - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII1>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - }; - - }; - chosen { - linux,stdout-path = "/plb/opb/serial@ef600200"; - }; - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep405.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ep405.dts deleted file mode 100644 index 53ef06cc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep405.dts +++ /dev/null @@ -1,230 +0,0 @@ -/* - * Device Tree Source for EP405 - * - * Copyright 2007 IBM Corp. - * Benjamin Herrenschmidt <benh@kernel.crashing.org> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "ep405"; - compatible = "ep405"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405GP"; - reg = <0x00000000>; - clock-frequency = <200000000>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; - d-cache-size = <16384>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - plb { - compatible = "ibm,plb3"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL: mcmal { - compatible = "ibm,mcmal-405gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <1>; - num-rx-chans = <1>; - interrupt-parent = <&UIC0>; - interrupts = < - 0xb 0x4 /* TXEOB */ - 0xc 0x4 /* RXEOB */ - 0xa 0x4 /* SERR */ - 0xd 0x4 /* TXDE */ - 0xe 0x4 /* RXDE */>; - }; - - POB0: opb { - compatible = "ibm,opb-405gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xef600000 0xef600000 0x00a00000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by zImage */ - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC: i2c@ef600500 { - compatible = "ibm,iic-405gp", "ibm,iic"; - reg = <0xef600500 0x00000011>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - GPIO: gpio@ef600700 { - compatible = "ibm,gpio-405gp"; - reg = <0xef600700 0x00000020>; - }; - - EMAC: ethernet@ef600800 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405gp", "ibm,emac"; - interrupt-parent = <&UIC0>; - interrupts = < - 0xf 0x4 /* Ethernet */ - 0x9 0x4 /* Ethernet Wake Up */>; - local-mac-address = [000000000000]; /* Filled in by zImage */ - reg = <0xef600800 0x00000070>; - mal-device = <&MAL>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - }; - - }; - - EBC0: ebc { - compatible = "ibm,ebc-405gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - - - /* The ranges property is supplied by the bootwrapper - * and is based on the firmware's configuration of the - * EBC bridge - */ - clock-frequency = <0>; /* Filled in by zImage */ - - /* NVRAM and RTC */ - nvrtc@4,200000 { - compatible = "ds1742"; - reg = <0x00000004 0x00200000 0x00000000>; /* size fixed up by zImage */ - }; - - /* "BCSR" CPLD contains a PCI irq controller */ - bcsr@4,0 { - compatible = "ep405-bcsr"; - reg = <0x00000004 0x00000000 0x00000010>; - interrupt-controller; - /* Routing table */ - irq-routing = [ 00 /* SYSERR */ - 01 /* STTM */ - 01 /* RTC */ - 01 /* FENET */ - 02 /* NB PCIIRQ mux ? */ - 03 /* SB Winbond 8259 ? */ - 04 /* Serial Ring */ - 05 /* USB (ep405pc) */ - 06 /* XIRQ 0 */ - 06 /* XIRQ 1 */ - 06 /* XIRQ 2 */ - 06 /* XIRQ 3 */ - 06 /* XIRQ 4 */ - 06 /* XIRQ 5 */ - 06 /* XIRQ 6 */ - 07]; /* Reserved */ - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; - primary; - reg = <0xeec00000 0x00000008 /* Config space access */ - 0xeed80000 0x00000004 /* IACK */ - 0xeed80000 0x00000004 /* Special cycle */ - 0xef480000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 - 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* That's all I know about IRQs on that thing ... */ - interrupt-map-mask = <0xf800 0x0 0x0 0x0>; - interrupt-map = < - /* USB */ - 0x7000 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IRQ5 */ - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep8248e.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ep8248e.dts deleted file mode 100644 index 756758fb..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep8248e.dts +++ /dev/null @@ -1,206 +0,0 @@ -/* - * Device Tree for the Embedded Planet EP8248E board running PlanetCore. - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; -/ { - model = "EP8248E"; - compatible = "fsl,ep8248e"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - planetcore-SMC1 = &smc1; - planetcore-SCC1 = &scc1; - ethernet0 = ð0; - ethernet1 = ð1; - serial0 = &smc1; - serial1 = &scc1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8248@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; - clock-frequency = <0>; - }; - }; - - localbus@f0010100 { - compatible = "fsl,mpc8248-localbus", - "fsl,pq2-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xf0010100 0x40>; - - ranges = <0 0 0xfc000000 0x04000000 - 1 0 0xfa000000 0x00008000>; - - flash@0,3800000 { - compatible = "cfi-flash"; - reg = <0 0x3800000 0x800000>; - bank-width = <4>; - device-width = <2>; - }; - - bcsr@1,0 { - #address-cells = <2>; - #size-cells = <1>; - reg = <1 0 0x10>; - compatible = "fsl,ep8248e-bcsr"; - ranges; - - mdio { - device_type = "mdio"; - compatible = "fsl,ep8248e-mdio-bitbang"; - #address-cells = <1>; - #size-cells = <0>; - reg = <1 8 1>; - - PHY0: ethernet-phy@0 { - interrupt-parent = <&PIC>; - reg = <0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&PIC>; - reg = <1>; - device_type = "ethernet-phy"; - }; - }; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0>; - }; - - soc@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8248-immr", "fsl,pq2-soc", "simple-bus"; - ranges = <0x00000000 0xf0000000 0x00053000>; - - // Temporary until code stops depending on it. - device_type = "soc"; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xf0000000 0x00053000>; - - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - compatible = "fsl,mpc8248-cpm", "fsl,cpm2", - "simple-bus"; - reg = <0x119c0 0x30>; - ranges; - - muram { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x2000 0x9800 0x800>; - }; - }; - - brg@119f0 { - compatible = "fsl,mpc8248-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x119f0 0x10 0x115f0 0x10>; - }; - - /* Monitor port/SMC1 */ - smc1: serial@11a80 { - device_type = "serial"; - compatible = "fsl,mpc8248-smc-uart", - "fsl,cpm2-smc-uart"; - reg = <0x11a80 0x20 0x87fc 2>; - interrupts = <4 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <7>; - fsl,cpm-command = <0x1d000000>; - linux,planetcore-label = "SMC1"; - }; - - /* "Serial" port/SCC1 */ - scc1: serial@11a00 { - device_type = "serial"; - compatible = "fsl,mpc8248-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a00 0x20 0x8000 0x100>; - interrupts = <40 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x00800000>; - linux,planetcore-label = "SCC1"; - }; - - eth0: ethernet@11300 { - device_type = "network"; - compatible = "fsl,mpc8248-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11300 0x20 0x8400 0x100 0x11390 1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - fsl,cpm-command = <0x12000300>; - }; - - eth1: ethernet@11320 { - device_type = "network"; - compatible = "fsl,mpc8248-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11320 0x20 0x8500 0x100 0x113b0 1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <33 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - fsl,cpm-command = <0x16200300>; - }; - - usb@11b60 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8248-usb", - "fsl,cpm2-usb"; - reg = <0x11b60 0x18 0x8b00 0x100>; - interrupt-parent = <&PIC>; - interrupts = <11 8>; - fsl,cpm-command = <0x2e600000>; - }; - }; - - PIC: interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x10c00 0x80>; - compatible = "fsl,mpc8248-pic", "fsl,pq2-pic"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep88xc.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ep88xc.dts deleted file mode 100644 index ae57d624..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ep88xc.dts +++ /dev/null @@ -1,215 +0,0 @@ -/* - * EP88xC Device Tree Source - * - * Copyright 2006 MontaVista Software, Inc. - * Copyright 2007,2008 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "EP88xC"; - compatible = "fsl,ep88xc"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,885@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <16>; - i-cache-line-size = <16>; - d-cache-size = <8192>; - i-cache-size = <8192>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; - }; - - localbus@fa200100 { - compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xfa200100 0x40>; - - ranges = < - 0x0 0x0 0xfc000000 0x4000000 - 0x3 0x0 0xfa000000 0x1000000 - >; - - flash@0,2000000 { - compatible = "cfi-flash"; - reg = <0x0 0x2000000 0x2000000>; - bank-width = <4>; - device-width = <2>; - }; - - board-control@3,400000 { - reg = <0x3 0x400000 0x10>; - compatible = "fsl,ep88xc-bcsr"; - }; - }; - - soc@fa200000 { - compatible = "fsl,mpc885", "fsl,pq1-soc"; - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xfa200000 0x4000>; - bus-frequency = <0>; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xfa200000 0x4000>; - - mdio@e00 { - compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - - PHY0: ethernet-phy@0 { - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - reg = <0x1>; - device_type = "ethernet-phy"; - }; - }; - - ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc885-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - }; - - ethernet@1e00 { - device_type = "network"; - compatible = "fsl,mpc885-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0x1e00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <7 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - }; - - PIC: interrupt-controller@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x0 0x24>; - compatible = "fsl,mpc885-pic", "fsl,pq1-pic"; - }; - - pcmcia@80 { - #address-cells = <3>; - #interrupt-cells = <1>; - #size-cells = <2>; - compatible = "fsl,pq-pcmcia"; - device_type = "pcmcia"; - reg = <0x80 0x80>; - interrupt-parent = <&PIC>; - interrupts = <13 1>; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc885-cpm", "fsl,cpm1"; - command-proc = <0x9c0>; - interrupts = <0>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - reg = <0x9c0 0x40>; - ranges; - - muram@2000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x1c00>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc885-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - reg = <0x9f0 0x10>; - }; - - CPM_PIC: interrupt-controller@930 { - interrupt-controller; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc885-cpm-pic", - "fsl,cpm1-pic"; - }; - - // MON-1 - serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc885-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x90>; - linux,planetcore-label = "SMC1"; - }; - - // SER-1 - serial@a20 { - device_type = "serial"; - compatible = "fsl,mpc885-scc-uart", - "fsl,cpm1-scc-uart"; - reg = <0xa20 0x20 0x3d00 0x80>; - interrupts = <29>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x40>; - linux,planetcore-label = "SCC2"; - }; - - usb@a00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc885-usb", - "fsl,cpm1-usb"; - reg = <0xa00 0x18 0x1c00 0x80>; - interrupt-parent = <&CPM_PIC>; - interrupts = <30>; - fsl,cpm-command = <0000>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi deleted file mode 100644 index c8b2daa4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi +++ /dev/null @@ -1,252 +0,0 @@ -/* - * MPC8536 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x8000 */ -&pci0 { - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - interrupts = <24 0x2 0 0>; - bus-range = <0 0xff>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <25 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <25 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci2 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xb000 */ -&pci3 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <27 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <27 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 - >; - }; -}; -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8536-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8536-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8536-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - -/include/ "pq3-espi-0.dtsi" - spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-gpio-0.dtsi" - - /* mark compat w/8572 to get some erratum treatment */ - gpio-controller@f000 { - compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio"; - }; - - sata@18000 { - compatible = "fsl,mpc8536-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - cell-index = <1>; - interrupts = <74 0x2 0 0>; - }; - - sata@19000 { - compatible = "fsl,mpc8536-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - cell-index = <2>; - interrupts = <41 0x2 0 0>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8536-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-etsec1-0.dtsi" -/include/ "pq3-etsec1-timer-0.dtsi" - - usb@22000 { - compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <28 0x2 0 0>; - }; - - usb@23000 { - compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <46 0x2 0 0>; - }; - - ptp_clock@24e00 { - interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>; - }; - -/include/ "pq3-etsec1-2.dtsi" - - ethernet@26000 { - cell-index = <1>; - }; - - usb@2b000 { - compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr"; - reg = <0x2b000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <60 0x2 0 0>; - }; - -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - compatible = "fsl,mpc8536-esdhc", "fsl,esdhc"; - }; - -/include/ "pq3-sec3.0-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - - global-utilities@e0000 { - compatible = "fsl,mpc8536-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi deleted file mode 100644 index 7de45a78..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8536si-pre.dtsi +++ /dev/null @@ -1,63 +0,0 @@ -/* - * MPC8536 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8536"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8536@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi deleted file mode 100644 index b68eb119..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi +++ /dev/null @@ -1,191 +0,0 @@ -/* - * MPC8544 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8544-lbc", "fsl,pq3-localbus", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x8000 */ -&pci0 { - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - interrupts = <24 0x2 0 0>; - bus-range = <0 0xff>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <25 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <25 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci2 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xb000 */ -&pci3 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <27 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <27 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8544-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8544-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8544-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8544-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-etsec1-0.dtsi" -/include/ "pq3-etsec1-2.dtsi" - - ethernet@26000 { - cell-index = <1>; - }; - -/include/ "pq3-sec2.1-0.dtsi" -/include/ "pq3-mpic.dtsi" - - global-utilities@e0000 { - compatible = "fsl,mpc8544-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi deleted file mode 100644 index 8777f923..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8544si-pre.dtsi +++ /dev/null @@ -1,63 +0,0 @@ -/* - * MPC8544 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8544"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8544@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi deleted file mode 100644 index 579d76cb..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi +++ /dev/null @@ -1,159 +0,0 @@ -/* - * MPC8548 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8548-lbc", "fsl,pq3-localbus", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x8000 */ -&pci0 { - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - interrupts = <24 0x2 0 0>; - bus-range = <0 0xff>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - interrupts = <25 0x2 0 0>; - bus-range = <0 0xff>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; -}; - -/* controller at 0xa000 */ -&pci2 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <48 2 0 0>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8548-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-etsec1-0.dtsi" -/include/ "pq3-etsec1-1.dtsi" -/include/ "pq3-etsec1-2.dtsi" -/include/ "pq3-etsec1-3.dtsi" - -/include/ "pq3-sec2.1-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-rmu-0.dtsi" - - global-utilities@e0000 { - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi deleted file mode 100644 index 720422d8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi +++ /dev/null @@ -1,64 +0,0 @@ -/* - * MPC8548 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8548"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi deleted file mode 100644 index 64e7075a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi +++ /dev/null @@ -1,270 +0,0 @@ -/* - * MPC8568 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus"; - interrupts = <19 2 0 0>; - sleep = <&pmc 0x08000000>; -}; - -/* controller at 0x8000 */ -&pci0 { - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - interrupts = <24 0x2 0 0>; - bus-range = <0 0xff>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - sleep = <&pmc 0x80000000>; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - sleep = <&pmc 0x20000000>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <48 2 0 0>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - sleep = <&pmc 0x00080000>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8568-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8568-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8568-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - - i2c-sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x00000004>; - ranges; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" - - }; - - duart-sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x00000002>; - ranges; - -/include/ "pq3-duart-0.dtsi" - - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8568-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" - dma@21300 { - sleep = <&pmc 0x00000400>; - }; - -/include/ "pq3-etsec1-0.dtsi" - ethernet@24000 { - sleep = <&pmc 0x00000080>; - }; - -/include/ "pq3-etsec1-1.dtsi" - ethernet@25000 { - sleep = <&pmc 0x00000040>; - }; - - par_io@e0100 { - reg = <0xe0100 0x100>; - device_type = "par_io"; - }; - -/include/ "pq3-sec2.1-0.dtsi" - crypto@30000 { - sleep = <&pmc 0x01000000>; - }; - -/include/ "pq3-mpic.dtsi" -/include/ "pq3-rmu-0.dtsi" - rmu@d3000 { - sleep = <&pmc 0x00040000>; - }; - - global-utilities@e0000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - ranges = <0 0xe0000 0x1000>; - fsl,has-rstcr; - - pmc: power@70 { - compatible = "fsl,mpc8568-pmc", - "fsl,mpc8548-pmc"; - reg = <0x70 0x20>; - }; - }; -}; - -&qe { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - sleep = <&pmc 0x00000800>; - brg-frequency = <0>; - bus-frequency = <396000000>; - fsl,qe-num-riscs = <2>; - fsl,qe-num-snums = <28>; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30 - interrupt-parent = <&mpic>; - }; - - spi@4c0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - cell-index = <0>; - interrupts = <2>; - interrupt-parent = <&qeic>; - }; - - spi@500 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - }; - - ucc@2000 { - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - }; - - ucc@3000 { - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - }; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x10000 0x10000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x10000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi deleted file mode 100644 index eacd62c5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8568si-pre.dtsi +++ /dev/null @@ -1,65 +0,0 @@ -/* - * MPC8568 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8568"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8568@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - sleep = <&pmc 0x00008000 // core - &pmc 0x00004000>; // timebase - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi deleted file mode 100644 index 3e6346a4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-post.dtsi +++ /dev/null @@ -1,304 +0,0 @@ -/* - * MPC8569 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8569-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; - sleep = <&pmc 0x08000000>; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - sleep = <&pmc 0x20000000>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <48 2 0 0>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - sleep = <&pmc 0x00080000>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8569-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8569-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8569-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - - i2c-sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x00000004>; - ranges; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" - - }; - - duart-sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x00000002>; - ranges; - -/include/ "pq3-duart-0.dtsi" - - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8569-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - sleep = <&pmc 0x00200000>; - }; - - par_io@e0100 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xe0100 0x100>; - ranges = <0x0 0xe0100 0x100>; - device_type = "par_io"; - }; - -/include/ "pq3-sec3.1-0.dtsi" - crypto@30000 { - sleep = <&pmc 0x01000000>; - }; - -/include/ "pq3-mpic.dtsi" -/include/ "pq3-rmu-0.dtsi" - rmu@d3000 { - sleep = <&pmc 0x00040000>; - }; - - global-utilities@e0000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - ranges = <0 0xe0000 0x1000>; - fsl,has-rstcr; - - pmc: power@70 { - compatible = "fsl,mpc8569-pmc", - "fsl,mpc8548-pmc"; - reg = <0x70 0x20>; - }; - }; -}; - -&qe { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - sleep = <&pmc 0x00000800>; - brg-frequency = <0>; - bus-frequency = <0>; - fsl,qe-num-riscs = <4>; - fsl,qe-num-snums = <46>; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - interrupts = <46 2 0 0 46 2 0 0>; //high:30 low:30 - interrupt-parent = <&mpic>; - }; - - timer@440 { - compatible = "fsl,mpc8569-qe-gtm", - "fsl,qe-gtm", "fsl,gtm"; - reg = <0x440 0x40>; - interrupts = <12 13 14 15>; - interrupt-parent = <&qeic>; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - - spi@4c0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8569-qe-spi", "fsl,spi"; - reg = <0x4c0 0x40>; - cell-index = <0>; - interrupts = <2>; - interrupt-parent = <&qeic>; - }; - - spi@500 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - }; - - usb@6c0 { - compatible = "fsl,mpc8569-qe-usb", - "fsl,mpc8323-qe-usb"; - reg = <0x6c0 0x40 0x8b00 0x100>; - interrupts = <11>; - interrupt-parent = <&qeic>; - }; - - ucc@2000 { - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - }; - - ucc@2200 { - cell-index = <3>; - reg = <0x2200 0x200>; - interrupts = <34>; - interrupt-parent = <&qeic>; - }; - - ucc@3000 { - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - }; - - ucc@3200 { - cell-index = <4>; - reg = <0x3200 0x200>; - interrupts = <35>; - interrupt-parent = <&qeic>; - }; - - ucc@3400 { - cell-index = <6>; - reg = <0x3400 0x200>; - interrupts = <41>; - interrupt-parent = <&qeic>; - }; - - ucc@3600 { - cell-index = <8>; - reg = <0x3600 0x200>; - interrupts = <43>; - interrupt-parent = <&qeic>; - }; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x10000 0x20000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x20000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi deleted file mode 100644 index b07064d1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8569si-pre.dtsi +++ /dev/null @@ -1,64 +0,0 @@ -/* - * MPC8569 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8569"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8569@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - sleep = <&pmc 0x00008000 // core - &pmc 0x00004000>; // timebase - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi deleted file mode 100644 index d44e25a4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi +++ /dev/null @@ -1,196 +0,0 @@ -/* - * MPC8572 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x8000 */ -&pci0 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <24 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <24 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <25 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <25 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci2 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8572-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupts = <18 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" -/include/ "pq3-dma-1.dtsi" -/include/ "pq3-gpio-0.dtsi" - gpio-controller@f000 { - compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio"; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2,1M - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-etsec1-0.dtsi" -/include/ "pq3-etsec1-timer-0.dtsi" - - ptp_clock@24e00 { - interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>; - }; - -/include/ "pq3-etsec1-1.dtsi" -/include/ "pq3-etsec1-2.dtsi" -/include/ "pq3-etsec1-3.dtsi" -/include/ "pq3-sec3.0-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - - global-utilities@e0000 { - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi deleted file mode 100644 index ca188326..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/mpc8572si-pre.dtsi +++ /dev/null @@ -1,70 +0,0 @@ -/* - * MPC8572 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,MPC8572"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi deleted file mode 100644 index 0bde9ee8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi +++ /dev/null @@ -1,202 +0,0 @@ -/* - * P1010/P1014 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&ifc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; - interrupts = <16 2 0 0 19 2 0 0>; -}; - -/* controller at 0x9000 */ -&pci0 { - compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1010-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1010-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p1010-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" -/include/ "pq3-espi-0.dtsi" - spi0: spi@7000 { - fsl,espi-num-chipselects = <1>; - }; - -/include/ "pq3-gpio-0.dtsi" -/include/ "pq3-sata2-0.dtsi" -/include/ "pq3-sata2-1.dtsi" - - can0: can@1c000 { - compatible = "fsl,p1010-flexcan"; - reg = <0x1c000 0x1000>; - interrupts = <48 0x2 0 0>; - }; - - can1: can@1d000 { - compatible = "fsl,p1010-flexcan"; - reg = <0x1d000 0x1000>; - interrupts = <61 0x2 0 0>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1010-l2-cache-controller", - "fsl,p1014-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - compatible = "fsl,p1010-esdhc", "fsl,esdhc"; - sdhci,auto-cmd12; - }; - -/include/ "pq3-sec4.4-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - -/include/ "pq3-etsec2-0.dtsi" - enet0: ethernet@b0000 { - queue-group@b0000 { - fsl,rx-bit-map = <0xff>; - fsl,tx-bit-map = <0xff>; - }; - }; - -/include/ "pq3-etsec2-1.dtsi" - enet1: ethernet@b1000 { - queue-group@b1000 { - fsl,rx-bit-map = <0xff>; - fsl,tx-bit-map = <0xff>; - }; - }; - -/include/ "pq3-etsec2-2.dtsi" - enet2: ethernet@b2000 { - queue-group@b2000 { - fsl,rx-bit-map = <0xff>; - fsl,tx-bit-map = <0xff>; - }; - - }; - - global-utilities@e0000 { - compatible = "fsl,p1010-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi deleted file mode 100644 index 7354a8f9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1010si-pre.dtsi +++ /dev/null @@ -1,64 +0,0 @@ -/* - * P1010/P1014 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P1010"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - can0 = &can0; - can1 = &can1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1010@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi deleted file mode 100644 index 68cc5e7f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi +++ /dev/null @@ -1,184 +0,0 @@ -/* - * P1020/P1011 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x9000 */ -&pci0 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1020-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1020-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p1020-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - -/include/ "pq3-espi-0.dtsi" - spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-gpio-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1020-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; -/include/ "pq3-usb2-dr-1.dtsi" - usb@23000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; - -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - compatible = "fsl,p1020-esdhc", "fsl,esdhc"; - sdhci,auto-cmd12; - }; -/include/ "pq3-sec3.3-0.dtsi" - -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - -/include/ "pq3-etsec2-0.dtsi" - enet0: enet0_grp2: ethernet@b0000 { - }; - -/include/ "pq3-etsec2-1.dtsi" - enet1: enet1_grp2: ethernet@b1000 { - }; - -/include/ "pq3-etsec2-2.dtsi" - enet2: enet2_grp2: ethernet@b2000 { - }; - - global-utilities@e0000 { - compatible = "fsl,p1020-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; - -/include/ "pq3-etsec2-grp2-0.dtsi" -/include/ "pq3-etsec2-grp2-1.dtsi" -/include/ "pq3-etsec2-grp2-2.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi deleted file mode 100644 index 6f0376e5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1020si-pre.dtsi +++ /dev/null @@ -1,68 +0,0 @@ -/* - * P1020/P1011 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P1020"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1020@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P1020@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi deleted file mode 100644 index 4252ef85..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi +++ /dev/null @@ -1,232 +0,0 @@ -/* - * P1021/P1012 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,p1021-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x9000 */ -&pci0 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1021-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1021-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p1021-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - -/include/ "pq3-espi-0.dtsi" - spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-gpio-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1021-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; - -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - sdhci,auto-cmd12; - }; - -/include/ "pq3-sec3.3-0.dtsi" - -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - -/include/ "pq3-etsec2-0.dtsi" - enet0: enet0_grp2: ethernet@b0000 { - }; - -/include/ "pq3-etsec2-1.dtsi" - enet1: enet1_grp2: ethernet@b1000 { - }; - -/include/ "pq3-etsec2-2.dtsi" - enet2: enet2_grp2: ethernet@b2000 { - }; - - global-utilities@e0000 { - compatible = "fsl,p1021-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; - -&qe { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - fsl,qe-num-riscs = <1>; - fsl,qe-num-snums = <28>; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - interrupts = <63 2 0 0 60 2 0 0>; //high:47 low:44 - }; - - ucc@2000 { - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2120 0x18>; - compatible = "fsl,ucc-mdio"; - }; - - ucc@2400 { - cell-index = <5>; - reg = <0x2400 0x200>; - interrupts = <40>; - interrupt-parent = <&qeic>; - }; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x10000 0x6000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x6000>; - }; - }; -}; - -/include/ "pq3-etsec2-grp2-0.dtsi" -/include/ "pq3-etsec2-grp2-1.dtsi" -/include/ "pq3-etsec2-grp2-2.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi deleted file mode 100644 index 4abd54bc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1021si-pre.dtsi +++ /dev/null @@ -1,68 +0,0 @@ -/* - * P1021/P1012 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P1021"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1021@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P1021@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi deleted file mode 100644 index 06216b8c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi +++ /dev/null @@ -1,246 +0,0 @@ -/* - * P1022/P1013 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - /* - * The localbus on the P1022 is not a simple-bus because of the eLBC - * pin muxing when the DIU is enabled. - */ - compatible = "fsl,p1022-elbc", "fsl,elbc"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0x9000 */ -&pci0 { - compatible = "fsl,p1022-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xa000 */ -&pci1 { - compatible = "fsl,p1022-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0xb000 */ -&pci2 { - compatible = "fsl,p1022-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1022-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1022-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p1022-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" -/include/ "pq3-espi-0.dtsi" - spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-dma-1.dtsi" - dma@c300 { - dma00: dma-channel@0 { - compatible = "fsl,ssi-dma-channel"; - }; - dma01: dma-channel@80 { - compatible = "fsl,ssi-dma-channel"; - }; - }; - -/include/ "pq3-gpio-0.dtsi" - - display@10000 { - compatible = "fsl,diu", "fsl,p1022-diu"; - reg = <0x10000 1000>; - interrupts = <64 2 0 0>; - }; - - ssi@15000 { - compatible = "fsl,mpc8610-ssi"; - cell-index = <0>; - reg = <0x15000 0x100>; - interrupts = <75 2 0 0>; - fsl,playback-dma = <&dma00>; - fsl,capture-dma = <&dma01>; - fsl,fifo-depth = <15>; - }; - -/include/ "pq3-sata2-0.dtsi" -/include/ "pq3-sata2-1.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1022-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; -/include/ "pq3-usb2-dr-1.dtsi" - usb@23000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; - -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - compatible = "fsl,p1022-esdhc", "fsl,esdhc"; - sdhci,auto-cmd12; - }; - -/include/ "pq3-sec3.3-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - -/include/ "pq3-etsec2-0.dtsi" - enet0: enet0_grp2: ethernet@b0000 { - }; - -/include/ "pq3-etsec2-1.dtsi" - enet1: enet1_grp2: ethernet@b1000 { - }; - - global-utilities@e0000 { - compatible = "fsl,p1022-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - power@e0070{ - compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc"; - reg = <0xe0070 0x20>; - }; - -}; - -/include/ "pq3-etsec2-grp2-0.dtsi" -/include/ "pq3-etsec2-grp2-1.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi deleted file mode 100644 index e930f4f7..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi +++ /dev/null @@ -1,68 +0,0 @@ -/* - * P1022/P1013 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P1022"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1022@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P1022@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi deleted file mode 100644 index 941fa159..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi +++ /dev/null @@ -1,227 +0,0 @@ -/* - * P1023/P1017 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,p1023-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0xa000 */ -&pci0 { - compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - }; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - }; -}; - -/* controller at 0xb000 */ -&pci2 { - compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 0 0>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 0 0>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p1023-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p1023-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <16 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p1023-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" - -/include/ "pq3-espi-0.dtsi" - spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-gpio-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,p1023-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2,256K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; - - crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x30000 0x10000>; - ranges = <0 0x30000 0x10000>; - interrupts = <58 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <45 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <45 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <57 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <57 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; - }; - -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - - global-utilities@e0000 { - compatible = "fsl,p1023-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi deleted file mode 100644 index ac45f6d9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p1023si-pre.dtsi +++ /dev/null @@ -1,76 +0,0 @@ -/* - * P1023/P1017 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P1023"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P1023@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P1023@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi deleted file mode 100644 index 884e01bc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi +++ /dev/null @@ -1,201 +0,0 @@ -/* - * P2020/P2010 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus"; - interrupts = <19 2 0 0>; -}; - -/* controller at 0xa000 */ -&pci0 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <26 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <26 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0x9000 */ -&pci1 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <25 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <25 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; - -/* controller at 0x8000 */ -&pci2 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 255>; - clock-frequency = <33333333>; - interrupts = <24 2 0 0>; - - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <24 2 0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 - >; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,p2020-immr", "simple-bus"; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,p2020-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2 0 0>; - }; - - memory-controller@2000 { - compatible = "fsl,p2020-memory-controller"; - reg = <0x2000 0x1000>; - interrupts = <18 2 0 0>; - }; - -/include/ "pq3-i2c-0.dtsi" -/include/ "pq3-i2c-1.dtsi" -/include/ "pq3-duart-0.dtsi" -/include/ "pq3-espi-0.dtsi" - spi0: spi@7000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "pq3-dma-1.dtsi" -/include/ "pq3-gpio-0.dtsi" - - L2: l2-cache-controller@20000 { - compatible = "fsl,p2020-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2,512K - interrupts = <16 2 0 0>; - }; - -/include/ "pq3-dma-0.dtsi" -/include/ "pq3-usb2-dr-0.dtsi" - usb@22000 { - compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; - }; -/include/ "pq3-etsec1-0.dtsi" -/include/ "pq3-etsec1-timer-0.dtsi" - - ptp_clock@24e00 { - interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>; - }; - - -/include/ "pq3-etsec1-1.dtsi" -/include/ "pq3-etsec1-2.dtsi" -/include/ "pq3-esdhc-0.dtsi" - sdhc@2e000 { - compatible = "fsl,p2020-esdhc", "fsl,esdhc"; - }; - -/include/ "pq3-sec3.1-0.dtsi" -/include/ "pq3-mpic.dtsi" -/include/ "pq3-mpic-timer-B.dtsi" - - global-utilities@e0000 { - compatible = "fsl,p2020-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi deleted file mode 100644 index 32132886..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2020si-pre.dtsi +++ /dev/null @@ -1,69 +0,0 @@ -/* - * P2020/P2010 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P2020"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,P2020@0 { - device_type = "cpu"; - reg = <0x0>; - next-level-cache = <&L2>; - }; - - PowerPC,P2020@1 { - device_type = "cpu"; - reg = <0x1>; - next-level-cache = <&L2>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi deleted file mode 100644 index 531eab82..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi +++ /dev/null @@ -1,327 +0,0 @@ -/* - * P2041/P2040 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; -}; - -/* controller at 0x200000 */ -&pci0 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; -}; - -/* controller at 0x201000 */ -&pci1 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; -}; - -/* controller at 0x202000 */ -&pci2 { - compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&dcsr { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@42000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu2>; - reg = <0x42000 0x1000>; - }; - dcsr-cpu-sb-proxy@43000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu3>; - reg = <0x43000 0x1000>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000>; - interrupts = <16 2 1 27>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - -/include/ "qoriq-mpic.dtsi" - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p2041-serdes"; - reg = <0xea000 0x1000>; - }; - -/include/ "qoriq-dma-0.dtsi" -/include/ "qoriq-dma-1.dtsi" -/include/ "qoriq-espi-0.dtsi" - spi@110000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "qoriq-esdhc-0.dtsi" - sdhc@114000 { - sdhci,auto-cmd12; - }; - -/include/ "qoriq-i2c-0.dtsi" -/include/ "qoriq-i2c-1.dtsi" -/include/ "qoriq-duart-0.dtsi" -/include/ "qoriq-duart-1.dtsi" -/include/ "qoriq-gpio-0.dtsi" -/include/ "qoriq-usb2-mph-0.dtsi" - usb0: usb@210000 { - compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - phy_type = "utmi"; - port0; - }; - -/include/ "qoriq-usb2-dr-0.dtsi" - usb1: usb@211000 { - compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - dr_mode = "host"; - phy_type = "utmi"; - }; - -/include/ "qoriq-sata2-0.dtsi" -/include/ "qoriq-sata2-1.dtsi" -/include/ "qoriq-sec4.2-0.dtsi" -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi deleted file mode 100644 index 2d0a40d6..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi +++ /dev/null @@ -1,111 +0,0 @@ -/* - * P2041 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P2041"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi deleted file mode 100644 index af4ebc80..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi +++ /dev/null @@ -1,354 +0,0 @@ -/* - * P3041 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; -}; - -/* controller at 0x200000 */ -&pci0 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; -}; - -/* controller at 0x201000 */ -&pci1 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; -}; - -/* controller at 0x202000 */ -&pci2 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; -}; - -/* controller at 0x203000 */ -&pci3 { - compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 12>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 12>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 43 1 0 0 - 0000 0 0 2 &mpic 0 1 0 0 - 0000 0 0 3 &mpic 4 1 0 0 - 0000 0 0 4 &mpic 8 1 0 0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&dcsr { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p3041-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p3041-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p3041-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p3041-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@42000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu2>; - reg = <0x42000 0x1000>; - }; - dcsr-cpu-sb-proxy@43000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu3>; - reg = <0x43000 0x1000>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000>; - interrupts = <16 2 1 27>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - -/include/ "qoriq-mpic.dtsi" - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p3041-serdes"; - reg = <0xea000 0x1000>; - }; - -/include/ "qoriq-dma-0.dtsi" -/include/ "qoriq-dma-1.dtsi" -/include/ "qoriq-espi-0.dtsi" - spi@110000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "qoriq-esdhc-0.dtsi" - sdhc@114000 { - sdhci,auto-cmd12; - }; - -/include/ "qoriq-i2c-0.dtsi" -/include/ "qoriq-i2c-1.dtsi" -/include/ "qoriq-duart-0.dtsi" -/include/ "qoriq-duart-1.dtsi" -/include/ "qoriq-gpio-0.dtsi" -/include/ "qoriq-usb2-mph-0.dtsi" - usb0: usb@210000 { - compatible = "fsl-usb2-mph-v1.6", "fsl-usb2-mph"; - phy_type = "utmi"; - port0; - }; - -/include/ "qoriq-usb2-dr-0.dtsi" - usb1: usb@211000 { - compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - dr_mode = "host"; - phy_type = "utmi"; - }; - -/include/ "qoriq-sata2-0.dtsi" -/include/ "qoriq-sata2-1.dtsi" -/include/ "qoriq-sec4.2-0.dtsi" -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi deleted file mode 100644 index 136def35..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi +++ /dev/null @@ -1,112 +0,0 @@ -/* - * P3041 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P3041"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi deleted file mode 100644 index b3e56929..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi +++ /dev/null @@ -1,302 +0,0 @@ -/* - * P3060 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; -}; - -/* controller at 0x200000 */ -&pci0 { - compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; -}; - -/* controller at 0x201000 */ -&pci1 { - compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&dcsr { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@44000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu4>; - reg = <0x44000 0x1000>; - }; - dcsr-cpu-sb-proxy@45000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu5>; - reg = <0x45000 0x1000>; - }; - dcsr-cpu-sb-proxy@46000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu6>; - reg = <0x46000 0x1000>; - }; - dcsr-cpu-sb-proxy@47000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu7>; - reg = <0x47000 0x1000>; - }; - -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p3060-l3-cache-controller", "cache"; - reg = <0x10000 0x1000 - 0x11000 0x1000>; - interrupts = <16 2 1 27 - 16 2 1 26>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x5000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - -/include/ "qoriq-rmu-0.dtsi" -/include/ "qoriq-mpic.dtsi" - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p3060-serdes"; - reg = <0xea000 0x1000>; - }; - -/include/ "qoriq-dma-0.dtsi" -/include/ "qoriq-dma-1.dtsi" -/include/ "qoriq-espi-0.dtsi" - spi@110000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "qoriq-i2c-0.dtsi" -/include/ "qoriq-i2c-1.dtsi" -/include/ "qoriq-duart-0.dtsi" -/include/ "qoriq-duart-1.dtsi" -/include/ "qoriq-gpio-0.dtsi" -/include/ "qoriq-usb2-mph-0.dtsi" - usb@210000 { - compatible = "fsl-usb2-mph-v2.2", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - }; -/include/ "qoriq-usb2-dr-0.dtsi" - usb@211000 { - compatible = "fsl-usb2-dr-v2.2", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - }; -/include/ "qoriq-sec4.1-0.dtsi" -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi deleted file mode 100644 index 00c8e70e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi +++ /dev/null @@ -1,125 +0,0 @@ -/* - * P3060 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P3060"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu4: PowerPC,e500mc@4 { - device_type = "cpu"; - reg = <4>; - next-level-cache = <&L2_4>; - L2_4: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu5: PowerPC,e500mc@5 { - device_type = "cpu"; - reg = <5>; - next-level-cache = <&L2_5>; - L2_5: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu6: PowerPC,e500mc@6 { - device_type = "cpu"; - reg = <6>; - next-level-cache = <&L2_6>; - L2_6: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu7: PowerPC,e500mc@7 { - device_type = "cpu"; - reg = <7>; - next-level-cache = <&L2_7>; - L2_7: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi deleted file mode 100644 index 8d35d2c1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi +++ /dev/null @@ -1,350 +0,0 @@ -/* - * P4080/P4040 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; -}; - -/* controller at 0x200000 */ -&pci0 { - compatible = "fsl,p4080-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; -}; - -/* controller at 0x201000 */ -&pci1 { - compatible = "fsl,p4080-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; -}; - -/* controller at 0x202000 */ -&pci2 { - compatible = "fsl,p4080-pcie"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&dcsr { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-ddr@13000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr2>; - reg = <0x13000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; - dcsr-cpu-sb-proxy@42000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu2>; - reg = <0x42000 0x1000>; - }; - dcsr-cpu-sb-proxy@43000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu3>; - reg = <0x43000 0x1000>; - }; - dcsr-cpu-sb-proxy@44000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu4>; - reg = <0x44000 0x1000>; - }; - dcsr-cpu-sb-proxy@45000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu5>; - reg = <0x45000 0x1000>; - }; - dcsr-cpu-sb-proxy@46000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu6>; - reg = <0x46000 0x1000>; - }; - dcsr-cpu-sb-proxy@47000 { - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu7>; - reg = <0x47000 0x1000>; - }; - -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - ddr2: memory-controller@9000 { - compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller"; - reg = <0x9000 0x1000>; - interrupts = <16 2 1 22>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000 - 0x11000 0x1000>; - interrupts = <16 2 1 27 - 16 2 1 26>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x5000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - -/include/ "qoriq-rmu-0.dtsi" -/include/ "qoriq-mpic.dtsi" - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p4080-serdes"; - reg = <0xea000 0x1000>; - }; - -/include/ "qoriq-dma-0.dtsi" -/include/ "qoriq-dma-1.dtsi" -/include/ "qoriq-espi-0.dtsi" - spi@110000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "qoriq-esdhc-0.dtsi" - sdhc@114000 { - voltage-ranges = <3300 3300>; - sdhci,auto-cmd12; - }; - -/include/ "qoriq-i2c-0.dtsi" -/include/ "qoriq-i2c-1.dtsi" -/include/ "qoriq-duart-0.dtsi" -/include/ "qoriq-duart-1.dtsi" -/include/ "qoriq-gpio-0.dtsi" -/include/ "qoriq-usb2-mph-0.dtsi" -/include/ "qoriq-usb2-dr-0.dtsi" -/include/ "qoriq-sec4.0-0.dtsi" -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi deleted file mode 100644 index b9556ee3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi +++ /dev/null @@ -1,143 +0,0 @@ -/* - * P4080/P4040 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P4080"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e500mc@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e500mc@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu2: PowerPC,e500mc@2 { - device_type = "cpu"; - reg = <2>; - next-level-cache = <&L2_2>; - L2_2: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu3: PowerPC,e500mc@3 { - device_type = "cpu"; - reg = <3>; - next-level-cache = <&L2_3>; - L2_3: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu4: PowerPC,e500mc@4 { - device_type = "cpu"; - reg = <4>; - next-level-cache = <&L2_4>; - L2_4: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu5: PowerPC,e500mc@5 { - device_type = "cpu"; - reg = <5>; - next-level-cache = <&L2_5>; - L2_5: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu6: PowerPC,e500mc@6 { - device_type = "cpu"; - reg = <6>; - next-level-cache = <&L2_6>; - L2_6: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu7: PowerPC,e500mc@7 { - device_type = "cpu"; - reg = <7>; - next-level-cache = <&L2_7>; - L2_7: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi deleted file mode 100644 index 64b6abea..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi +++ /dev/null @@ -1,357 +0,0 @@ -/* - * P5020/5010 Silicon/SoC Device Tree Source (post include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus"; - interrupts = <25 2 0 0>; - #address-cells = <2>; - #size-cells = <1>; -}; - -/* controller at 0x200000 */ -&pci0 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 15>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 15>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 40 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - }; -}; - -/* controller at 0x201000 */ -&pci1 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 14>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 14>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 41 1 0 0 - 0000 0 0 2 &mpic 5 1 0 0 - 0000 0 0 3 &mpic 6 1 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - }; -}; - -/* controller at 0x202000 */ -&pci2 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 13>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 13>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 42 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 1 0 0 - >; - }; -}; - -/* controller at 0x203000 */ -&pci3 { - compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2"; - device_type = "pci"; - #size-cells = <2>; - #address-cells = <3>; - bus-range = <0x0 0xff>; - clock-frequency = <33333333>; - interrupts = <16 2 1 12>; - pcie@0 { - reg = <0 0 0 0 0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - interrupts = <16 2 1 12>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 43 1 0 0 - 0000 0 0 2 &mpic 0 1 0 0 - 0000 0 0 3 &mpic 4 1 0 0 - 0000 0 0 4 &mpic 8 1 0 0 - >; - }; -}; - -&rio { - compatible = "fsl,srio"; - interrupts = <16 2 1 11>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - }; - - port2 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <2>; - }; -}; - -&dcsr { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,dcsr", "simple-bus"; - - dcsr-epu@0 { - compatible = "fsl,dcsr-epu"; - interrupts = <52 2 0 0 - 84 2 0 0 - 85 2 0 0>; - reg = <0x0 0x1000>; - }; - dcsr-npc { - compatible = "fsl,dcsr-npc"; - reg = <0x1000 0x1000 0x1000000 0x8000>; - }; - dcsr-nxc@2000 { - compatible = "fsl,dcsr-nxc"; - reg = <0x2000 0x1000>; - }; - dcsr-corenet { - compatible = "fsl,dcsr-corenet"; - reg = <0x8000 0x1000 0xB0000 0x1000>; - }; - dcsr-dpaa@9000 { - compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa"; - reg = <0x9000 0x1000>; - }; - dcsr-ocn@11000 { - compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn"; - reg = <0x11000 0x1000>; - }; - dcsr-ddr@12000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr1>; - reg = <0x12000 0x1000>; - }; - dcsr-ddr@13000 { - compatible = "fsl,dcsr-ddr"; - dev-handle = <&ddr2>; - reg = <0x13000 0x1000>; - }; - dcsr-nal@18000 { - compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal"; - reg = <0x18000 0x1000>; - }; - dcsr-rcpm@22000 { - compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm"; - reg = <0x22000 0x1000>; - }; - dcsr-cpu-sb-proxy@40000 { - compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu0>; - reg = <0x40000 0x1000>; - }; - dcsr-cpu-sb-proxy@41000 { - compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; - cpu-handle = <&cpu1>; - reg = <0x41000 0x1000>; - }; -}; - -&soc { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - - soc-sram-error { - compatible = "fsl,soc-sram-error"; - interrupts = <16 2 1 29>; - }; - - corenet-law@0 { - compatible = "fsl,corenet-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <32>; - }; - - ddr1: memory-controller@8000 { - compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; - reg = <0x8000 0x1000>; - interrupts = <16 2 1 23>; - }; - - ddr2: memory-controller@9000 { - compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller"; - reg = <0x9000 0x1000>; - interrupts = <16 2 1 22>; - }; - - cpc: l3-cache-controller@10000 { - compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; - reg = <0x10000 0x1000 - 0x11000 0x1000>; - interrupts = <16 2 1 27 - 16 2 1 26>; - }; - - corenet-cf@18000 { - compatible = "fsl,corenet-cf"; - reg = <0x18000 0x1000>; - interrupts = <16 2 1 31>; - fsl,ccf-num-csdids = <32>; - fsl,ccf-num-snoopids = <32>; - }; - - iommu@20000 { - compatible = "fsl,pamu-v1.0", "fsl,pamu"; - reg = <0x20000 0x4000>; - interrupts = < - 24 2 0 0 - 16 2 1 30>; - }; - -/include/ "qoriq-mpic.dtsi" - - guts: global-utilities@e0000 { - compatible = "fsl,qoriq-device-config-1.0"; - reg = <0xe0000 0xe00>; - fsl,has-rstcr; - #sleep-cells = <1>; - fsl,liodn-bits = <12>; - }; - - pins: global-utilities@e0e00 { - compatible = "fsl,qoriq-pin-control-1.0"; - reg = <0xe0e00 0x200>; - #sleep-cells = <2>; - }; - - clockgen: global-utilities@e1000 { - compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; - reg = <0xe1000 0x1000>; - clock-frequency = <0>; - }; - - rcpm: global-utilities@e2000 { - compatible = "fsl,qoriq-rcpm-1.0"; - reg = <0xe2000 0x1000>; - #sleep-cells = <1>; - }; - - sfp: sfp@e8000 { - compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0"; - reg = <0xe8000 0x1000>; - }; - - serdes: serdes@ea000 { - compatible = "fsl,p5020-serdes"; - reg = <0xea000 0x1000>; - }; - -/include/ "qoriq-dma-0.dtsi" -/include/ "qoriq-dma-1.dtsi" -/include/ "qoriq-espi-0.dtsi" - spi@110000 { - fsl,espi-num-chipselects = <4>; - }; - -/include/ "qoriq-esdhc-0.dtsi" - sdhc@114000 { - sdhci,auto-cmd12; - }; - -/include/ "qoriq-i2c-0.dtsi" -/include/ "qoriq-i2c-1.dtsi" -/include/ "qoriq-duart-0.dtsi" -/include/ "qoriq-duart-1.dtsi" -/include/ "qoriq-gpio-0.dtsi" -/include/ "qoriq-usb2-mph-0.dtsi" - usb0: usb@210000 { - compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - phy_type = "utmi"; - port0; - }; - -/include/ "qoriq-usb2-dr-0.dtsi" - usb1: usb@211000 { - compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - dr_mode = "host"; - phy_type = "utmi"; - }; - -/include/ "qoriq-sata2-0.dtsi" -/include/ "qoriq-sata2-1.dtsi" -/include/ "qoriq-sec4.2-0.dtsi" -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi deleted file mode 100644 index ae823a47..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi +++ /dev/null @@ -1,96 +0,0 @@ -/* - * P5020/P5010 Silicon/SoC Device Tree Source (pre include) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/dts-v1/; -/ { - compatible = "fsl,P5020"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ccsr = &soc; - dcsr = &dcsr; - - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - pci3 = &pci3; - usb0 = &usb0; - usb1 = &usb1; - dma0 = &dma0; - dma1 = &dma1; - sdhc = &sdhc; - msi0 = &msi0; - msi1 = &msi1; - msi2 = &msi2; - - crypto = &crypto; - sec_jr0 = &sec_jr0; - sec_jr1 = &sec_jr1; - sec_jr2 = &sec_jr2; - sec_jr3 = &sec_jr3; - rtic_a = &rtic_a; - rtic_b = &rtic_b; - rtic_c = &rtic_c; - rtic_d = &rtic_d; - sec_mon = &sec_mon; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: PowerPC,e5500@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2_0>; - L2_0: l2-cache { - next-level-cache = <&cpc>; - }; - }; - cpu1: PowerPC,e5500@1 { - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2_1>; - L2_1: l2-cache { - next-level-cache = <&cpc>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi deleted file mode 100644 index b5b37ad3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-0.dtsi +++ /dev/null @@ -1,66 +0,0 @@ -/* - * PQ3 DMA device tree stub [ controller @ offset 0x21000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <20 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <21 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <22 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <23 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi deleted file mode 100644 index 28cb8a55..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-dma-1.dtsi +++ /dev/null @@ -1,66 +0,0 @@ -/* - * PQ3 DMA device tree stub [ controller @ offset 0xc300 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <76 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <77 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <78 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <79 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi deleted file mode 100644 index 5e268fdb..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-duart-0.dtsi +++ /dev/null @@ -1,51 +0,0 @@ -/* - * PQ3 DUART device tree stub [ controller @ offset 0x4000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2 0 0>; -}; - -serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi deleted file mode 100644 index 5743433e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-esdhc-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * PQ3 eSDHC device tree stub [ controller @ offset 0x2e000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sdhc@2e000 { - compatible = "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <72 0x2 0 0>; - /* Filled in by U-Boot */ - clock-frequency = <0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi deleted file mode 100644 index 75854b2e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-espi-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * PQ3 eSPI device tree stub [ controller @ offset 0x7000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -spi@7000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8536-espi"; - reg = <0x7000 0x1000>; - interrupts = <59 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi deleted file mode 100644 index 3b0650a9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi +++ /dev/null @@ -1,54 +0,0 @@ -/* - * PQ3 eTSEC device tree stub [ @ offsets 0x24000 ] - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>; -}; - -mdio@24520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x24520 0x20>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi deleted file mode 100644 index 96693b41..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-1.dtsi +++ /dev/null @@ -1,54 +0,0 @@ -/* - * PQ3 eTSEC device tree stub [ @ offsets 0x25000 ] - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>; -}; - -mdio@25520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x25520 0x20>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi deleted file mode 100644 index 6b3fab19..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-2.dtsi +++ /dev/null @@ -1,54 +0,0 @@ -/* - * PQ3 eTSEC device tree stub [ @ offsets 0x26000 ] - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; -}; - -mdio@26520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x26520 0x20>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi deleted file mode 100644 index 0da592d9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-3.dtsi +++ /dev/null @@ -1,54 +0,0 @@ -/* - * PQ3 eTSEC device tree stub [ @ offsets 0x27000 ] - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>; -}; - -mdio@27520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x27520 0x20>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi deleted file mode 100644 index efe2ca04..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec1-timer-0.dtsi +++ /dev/null @@ -1,39 +0,0 @@ -/* - * PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -ptp_clock@24e00 { - compatible = "fsl,etsec-ptp"; - reg = <0x24e00 0xb0>; - interrupts = <68 2 0 0 69 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi deleted file mode 100644 index 1382fec9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi +++ /dev/null @@ -1,60 +0,0 @@ -/* - * PQ3 eTSEC2 device tree stub [ @ offsets 0x24000/0xb0000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -mdio@24000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,etsec2-mdio"; - reg = <0x24000 0x1000 0xb0030 0x4>; -}; - -ethernet@b0000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - - queue-group@b0000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb0000 0x1000>; - interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi deleted file mode 100644 index 221cd2ea..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi +++ /dev/null @@ -1,60 +0,0 @@ -/* - * PQ3 eTSEC2 device tree stub [ @ offsets 0x25000/0xb1000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - -mdio@25000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,etsec2-tbi"; - reg = <0x25000 0x1000 0xb1030 0x4>; -}; - -ethernet@b1000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - - queue-group@b1000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb1000 0x1000>; - interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi deleted file mode 100644 index 61456c31..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi +++ /dev/null @@ -1,59 +0,0 @@ -/* - * PQ3 eTSEC2 device tree stub [ @ offsets 0x26000/0xb2000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -mdio@26000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,etsec2-tbi"; - reg = <0x26000 0x1000 0xb1030 0x4>; -}; - -ethernet@b2000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "fsl,etsec2"; - fsl,num_rx_queues = <0x8>; - fsl,num_tx_queues = <0x8>; - fsl,magic-packet; - local-mac-address = [ 00 00 00 00 00 00 ]; - - queue-group@b2000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb2000 0x1000>; - interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi deleted file mode 100644 index 034ab8fa..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-0.dtsi +++ /dev/null @@ -1,42 +0,0 @@ -/* - * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb4000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&enet0_grp2 { - queue-group@b4000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb4000 0x1000>; - interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi deleted file mode 100644 index 3be9ba3b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-1.dtsi +++ /dev/null @@ -1,42 +0,0 @@ -/* - * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb5000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&enet1_grp2 { - queue-group@b5000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb5000 0x1000>; - interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi deleted file mode 100644 index 02a33457..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-etsec2-grp2-2.dtsi +++ /dev/null @@ -1,42 +0,0 @@ -/* - * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb6000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&enet2_grp2 { - queue-group@b6000 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xb6000 0x1000>; - interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi deleted file mode 100644 index 72a3ef59..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * PQ3 GPIO device tree stub [ controller @ offset 0xf000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -gpio-controller@f000 { - #gpio-cells = <2>; - compatible = "fsl,pq3-gpio"; - reg = <0xf000 0x100>; - interrupts = <47 0x2 0 0>; - gpio-controller; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi deleted file mode 100644 index d1dd6fb8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-0.dtsi +++ /dev/null @@ -1,43 +0,0 @@ -/* - * PQ3 I2C device tree stub [ controller @ offset 0x3000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2 0 0>; - dfsrr; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi deleted file mode 100644 index a9bd803e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-i2c-1.dtsi +++ /dev/null @@ -1,43 +0,0 @@ -/* - * PQ3 I2C device tree stub [ controller @ offset 0x3100 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2 0 0>; - dfsrr; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi deleted file mode 100644 index 1cf0b77b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi +++ /dev/null @@ -1,43 +0,0 @@ -/* - * PQ3 MPIC Message (Group B) device tree stub [ controller @ offset 0x42400 ] - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -message@42400 { - compatible = "fsl,mpic-v3.1-msgr"; - reg = <0x42400 0x200>; - interrupts = < - 0xb4 2 0 0 - 0xb5 2 0 0 - 0xb6 2 0 0 - 0xb7 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi deleted file mode 100644 index 8734cffa..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi +++ /dev/null @@ -1,42 +0,0 @@ -/* - * PQ3 MPIC Timer (Group B) device tree stub [ controller @ offset 0x42100 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -timer@42100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x42100 0x100 0x42300 4>; - interrupts = <4 0 3 0 - 5 0 3 0 - 6 0 3 0 - 7 0 3 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi deleted file mode 100644 index 71c30eb1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi +++ /dev/null @@ -1,79 +0,0 @@ -/* - * PQ3 MPIC device tree stub [ controller @ offset 0x40000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic"; - device_type = "open-pic"; - big-endian; - single-cpu-affinity; - last-interrupt-source = <255>; -}; - -timer@41100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x41100 0x100 0x41300 4>; - interrupts = <0 0 3 0 - 1 0 3 0 - 2 0 3 0 - 3 0 3 0>; -}; - -message@41400 { - compatible = "fsl,mpic-v3.1-msgr"; - reg = <0x41400 0x200>; - interrupts = < - 0xb0 2 0 0 - 0xb1 2 0 0 - 0xb2 2 0 0 - 0xb3 2 0 0>; -}; - -msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi deleted file mode 100644 index 587ca9ff..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-rmu-0.dtsi +++ /dev/null @@ -1,68 +0,0 @@ -/* - * PQ3 RIO Message Unit device tree stub [ controller @ offset 0xd3000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -rmu: rmu@d3000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,srio-rmu"; - reg = <0xd3000 0x500>; - ranges = <0x0 0xd3000 0x500>; - - message-unit@0 { - compatible = "fsl,srio-msg-unit"; - reg = <0x0 0x100>; - interrupts = < - 53 2 0 0 /* msg1_tx_irq */ - 54 2 0 0>;/* msg1_rx_irq */ - }; - message-unit@100 { - compatible = "fsl,srio-msg-unit"; - reg = <0x100 0x100>; - interrupts = < - 55 2 0 0 /* msg2_tx_irq */ - 56 2 0 0>;/* msg2_rx_irq */ - }; - doorbell-unit@400 { - compatible = "fsl,srio-dbell-unit"; - reg = <0x400 0x80>; - interrupts = < - 49 2 0 0 /* bell_outb_irq */ - 50 2 0 0>;/* bell_inb_irq */ - }; - port-write-unit@4e0 { - compatible = "fsl,srio-port-write-unit"; - reg = <0x4e0 0x20>; - interrupts = <48 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi deleted file mode 100644 index 3c28dd08..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-0.dtsi +++ /dev/null @@ -1,40 +0,0 @@ -/* - * PQ3 SATAv2 device tree stub [ controller @ offset 0x18000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sata@18000 { - compatible = "fsl,pq-sata-v2"; - reg = <0x18000 0x1000>; - cell-index = <1>; - interrupts = <74 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi deleted file mode 100644 index eefaf285..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sata2-1.dtsi +++ /dev/null @@ -1,40 +0,0 @@ -/* - * PQ3 SATAv2 device tree stub [ controller @ offset 0x19000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sata@19000 { - compatible = "fsl,pq-sata-v2"; - reg = <0x19000 0x1000>; - cell-index = <2>; - interrupts = <41 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi deleted file mode 100644 index 02a5c7ae..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec2.1-0.dtsi +++ /dev/null @@ -1,43 +0,0 @@ -/* - * PQ3 Sec/Crypto 2.1 device tree stub [ controller @ offset 0x30000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto@30000 { - compatible = "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 0 0>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0xfe>; - fsl,descriptor-types-mask = <0x12b0ebf>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi deleted file mode 100644 index bba1ba44..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.0-0.dtsi +++ /dev/null @@ -1,45 +0,0 @@ -/* - * PQ3 Sec/Crypto 3.0 device tree stub [ controller @ offset 0x30000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto@30000 { - compatible = "fsl,sec3.0", - "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 0 0 58 2 0 0>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi deleted file mode 100644 index 8f0a5669..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.1-0.dtsi +++ /dev/null @@ -1,45 +0,0 @@ -/* - * PQ3 Sec/Crypto 3.1 device tree stub [ controller @ offset 0x30000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto@30000 { - compatible = "fsl,sec3.1", "fsl,sec3.0", - "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 0 0 58 2 0 0>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0xbfe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi deleted file mode 100644 index c227f274..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec3.3-0.dtsi +++ /dev/null @@ -1,45 +0,0 @@ -/* - * PQ3 Sec/Crypto 3.3 device tree stub [ controller @ offset 0x30000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto@30000 { - compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", - "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 0 0 58 2 0 0>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x97c>; - fsl,descriptor-types-mask = <0x3a30abf>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi deleted file mode 100644 index d4c9d5da..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi +++ /dev/null @@ -1,65 +0,0 @@ -/* - * PQ3 Sec/Crypto 4.4 device tree stub [ controller @ offset 0x30000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto@30000 { - compatible = "fsl,sec-v4.4", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x30000 0x10000>; - interrupts = <58 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <45 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <45 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <45 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.4-job-ring", "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <45 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi deleted file mode 100644 index 185ab9dc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * PQ3 USB DR device tree stub [ controller @ offset 0x22000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -usb@22000 { - compatible = "fsl-usb2-dr"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <28 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi deleted file mode 100644 index fe24cd61..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/pq3-usb2-dr-1.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * PQ3 USB DR device tree stub [ controller @ offset 0x23000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <46 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi deleted file mode 100644 index 1aebf3ea..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-0.dtsi +++ /dev/null @@ -1,66 +0,0 @@ -/* - * QorIQ DMA device tree stub [ controller @ offset 0x100000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -dma0: dma@100300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0x100300 0x4>; - ranges = <0x0 0x100100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <28 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <29 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <30 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <31 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi deleted file mode 100644 index ecf5e180..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-dma-1.dtsi +++ /dev/null @@ -1,66 +0,0 @@ -/* - * QorIQ DMA device tree stub [ controller @ offset 0x101000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -dma1: dma@101300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,eloplus-dma"; - reg = <0x101300 0x4>; - ranges = <0x0 0x101100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupts = <32 2 0 0>; - }; - dma-channel@80 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupts = <33 2 0 0>; - }; - dma-channel@100 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupts = <34 2 0 0>; - }; - dma-channel@180 { - compatible = "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupts = <35 2 0 0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi deleted file mode 100644 index 225c07b4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-0.dtsi +++ /dev/null @@ -1,51 +0,0 @@ -/* - * QorIQ DUART device tree stub [ controller @ offset 0x11c000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -serial0: serial@11c500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x11c500 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; -}; - -serial1: serial@11c600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x11c600 0x100>; - clock-frequency = <0>; - interrupts = <36 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi deleted file mode 100644 index d23233a5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-duart-1.dtsi +++ /dev/null @@ -1,51 +0,0 @@ -/* - * QorIQ DUART device tree stub [ controller @ offset 0x11d000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -serial2: serial@11d500 { - cell-index = <2>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x11d500 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; -}; - -serial3: serial@11d600 { - cell-index = <3>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x11d600 0x100>; - clock-frequency = <0>; - interrupts = <37 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi deleted file mode 100644 index 20835ae2..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-esdhc-0.dtsi +++ /dev/null @@ -1,40 +0,0 @@ -/* - * QorIQ eSDHC device tree stub [ controller @ offset 0x114000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sdhc: sdhc@114000 { - compatible = "fsl,esdhc"; - reg = <0x114000 0x1000>; - interrupts = <48 2 0 0>; - clock-frequency = <0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi deleted file mode 100644 index 6db06975..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-espi-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * QorIQ eSPI device tree stub [ controller @ offset 0x110000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -spi@110000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8536-espi"; - reg = <0x110000 0x1000>; - interrupts = <53 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi deleted file mode 100644 index cf714f5f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-gpio-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * QorIQ GPIO device tree stub [ controller @ offset 0x130000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -gpio0: gpio@130000 { - compatible = "fsl,qoriq-gpio"; - reg = <0x130000 0x1000>; - interrupts = <55 2 0 0>; - #gpio-cells = <2>; - gpio-controller; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi deleted file mode 100644 index 5f9bf7de..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-0.dtsi +++ /dev/null @@ -1,53 +0,0 @@ -/* - * QorIQ I2C device tree stub [ controller @ offset 0x118000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -i2c@118000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x118000 0x100>; - interrupts = <38 2 0 0>; - dfsrr; -}; - -i2c@118100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x118100 0x100>; - interrupts = <38 2 0 0>; - dfsrr; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi deleted file mode 100644 index 7989bf5e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-i2c-1.dtsi +++ /dev/null @@ -1,53 +0,0 @@ -/* - * QorIQ I2C device tree stub [ controller @ offset 0x119000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -i2c@119000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <2>; - compatible = "fsl-i2c"; - reg = <0x119000 0x100>; - interrupts = <39 2 0 0>; - dfsrr; -}; - -i2c@119100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <3>; - compatible = "fsl-i2c"; - reg = <0x119100 0x100>; - interrupts = <39 2 0 0>; - dfsrr; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi deleted file mode 100644 index 08f42271..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-mpic.dtsi +++ /dev/null @@ -1,106 +0,0 @@ -/* - * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <4>; - reg = <0x40000 0x40000>; - compatible = "fsl,mpic", "chrp,open-pic"; - device_type = "open-pic"; - clock-frequency = <0x0>; -}; - -timer@41100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x41100 0x100 0x41300 4>; - interrupts = <0 0 3 0 - 1 0 3 0 - 2 0 3 0 - 3 0 3 0>; -}; - -msi0: msi@41600 { - compatible = "fsl,mpic-msi"; - reg = <0x41600 0x200 0x44140 4>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 0 0 - 0xe1 0 0 0 - 0xe2 0 0 0 - 0xe3 0 0 0 - 0xe4 0 0 0 - 0xe5 0 0 0 - 0xe6 0 0 0 - 0xe7 0 0 0>; -}; - -msi1: msi@41800 { - compatible = "fsl,mpic-msi"; - reg = <0x41800 0x200 0x45140 4>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe8 0 0 0 - 0xe9 0 0 0 - 0xea 0 0 0 - 0xeb 0 0 0 - 0xec 0 0 0 - 0xed 0 0 0 - 0xee 0 0 0 - 0xef 0 0 0>; -}; - -msi2: msi@41a00 { - compatible = "fsl,mpic-msi"; - reg = <0x41a00 0x200 0x46140 4>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xf0 0 0 0 - 0xf1 0 0 0 - 0xf2 0 0 0 - 0xf3 0 0 0 - 0xf4 0 0 0 - 0xf5 0 0 0 - 0xf6 0 0 0 - 0xf7 0 0 0>; -}; - -timer@42100 { - compatible = "fsl,mpic-global-timer"; - reg = <0x42100 0x100 0x42300 4>; - interrupts = <4 0 3 0 - 5 0 3 0 - 6 0 3 0 - 7 0 3 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi deleted file mode 100644 index ca7fec79..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-rmu-0.dtsi +++ /dev/null @@ -1,68 +0,0 @@ -/* - * QorIQ RIO Message Unit device tree stub [ controller @ offset 0xd3000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -rmu: rmu@d3000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,srio-rmu"; - reg = <0xd3000 0x500>; - ranges = <0x0 0xd3000 0x500>; - - message-unit@0 { - compatible = "fsl,srio-msg-unit"; - reg = <0x0 0x100>; - interrupts = < - 60 2 0 0 /* msg1_tx_irq */ - 61 2 0 0>;/* msg1_rx_irq */ - }; - message-unit@100 { - compatible = "fsl,srio-msg-unit"; - reg = <0x100 0x100>; - interrupts = < - 62 2 0 0 /* msg2_tx_irq */ - 63 2 0 0>;/* msg2_rx_irq */ - }; - doorbell-unit@400 { - compatible = "fsl,srio-dbell-unit"; - reg = <0x400 0x80>; - interrupts = < - 56 2 0 0 /* bell_outb_irq */ - 57 2 0 0>;/* bell_inb_irq */ - }; - port-write-unit@4e0 { - compatible = "fsl,srio-port-write-unit"; - reg = <0x4e0 0x20>; - interrupts = <16 2 1 11>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi deleted file mode 100644 index b642047f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-0.dtsi +++ /dev/null @@ -1,39 +0,0 @@ -/* - * QorIQ SATAv2 device tree stub [ controller @ offset 0x220000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sata@220000 { - compatible = "fsl,pq-sata-v2"; - reg = <0x220000 0x1000>; - interrupts = <68 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi deleted file mode 100644 index c5737025..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sata2-1.dtsi +++ /dev/null @@ -1,39 +0,0 @@ -/* - * QorIQ SATAv2 device tree stub [ controller @ offset 0x221000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -sata@221000 { - compatible = "fsl,pq-sata-v2"; - reg = <0x221000 0x1000>; - interrupts = <69 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi deleted file mode 100644 index 0cbbac32..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi +++ /dev/null @@ -1,100 +0,0 @@ -/* - * QorIQ Sec/Crypto 4.0 device tree stub [ controller @ offset 0x300000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto: crypto@300000 { - compatible = "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; -}; - -sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi deleted file mode 100644 index 3308986b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi +++ /dev/null @@ -1,109 +0,0 @@ -/* - * QorIQ Sec/Crypto 4.1 device tree stub [ controller @ offset 0x300000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto: crypto@300000 { - compatible = "fsl,sec-v4.1", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.1-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.1-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.1-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.1-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.1-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.1-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.1-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.1-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.1-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; -}; - -sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi deleted file mode 100644 index 7990e0d3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi +++ /dev/null @@ -1,109 +0,0 @@ -/* - * QorIQ Sec/Crypto 4.2 device tree stub [ controller @ offset 0x300000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -crypto: crypto@300000 { - compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x300000 0x10000>; - ranges = <0 0x300000 0x10000>; - interrupts = <92 2 0 0>; - - sec_jr0: jr@1000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x1000 0x1000>; - interrupts = <88 2 0 0>; - }; - - sec_jr1: jr@2000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x2000 0x1000>; - interrupts = <89 2 0 0>; - }; - - sec_jr2: jr@3000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x3000 0x1000>; - interrupts = <90 2 0 0>; - }; - - sec_jr3: jr@4000 { - compatible = "fsl,sec-v4.2-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x4000 0x1000>; - interrupts = <91 2 0 0>; - }; - - rtic@6000 { - compatible = "fsl,sec-v4.2-rtic", - "fsl,sec-v4.0-rtic"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6000 0x100>; - ranges = <0x0 0x6100 0xe00>; - - rtic_a: rtic-a@0 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x00 0x20 0x100 0x80>; - }; - - rtic_b: rtic-b@20 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x20 0x20 0x200 0x80>; - }; - - rtic_c: rtic-c@40 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x40 0x20 0x300 0x80>; - }; - - rtic_d: rtic-d@60 { - compatible = "fsl,sec-v4.2-rtic-memory", - "fsl,sec-v4.0-rtic-memory"; - reg = <0x60 0x20 0x500 0x80>; - }; - }; -}; - -sec_mon: sec_mon@314000 { - compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon"; - reg = <0x314000 0x1000>; - interrupts = <93 2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi deleted file mode 100644 index 4dd6f84c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-dr-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * QorIQ USB DR device tree stub [ controller @ offset 0x211000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -usb@211000 { - compatible = "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr"; - reg = <0x211000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <45 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi deleted file mode 100644 index f053835a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/fsl/qoriq-usb2-mph-0.dtsi +++ /dev/null @@ -1,41 +0,0 @@ -/* - * QorIQ USB Host device tree stub [ controller @ offset 0x210000 ] - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -usb@210000 { - compatible = "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph"; - reg = <0x210000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x2 0 0>; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/gamecube.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/gamecube.dts deleted file mode 100644 index ef3be0e5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/gamecube.dts +++ /dev/null @@ -1,114 +0,0 @@ -/* - * arch/powerpc/boot/dts/gamecube.dts - * - * Nintendo GameCube platform device tree source - * Copyright (C) 2007-2009 The GameCube Linux Team - * Copyright (C) 2007,2008,2009 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - */ - -/dts-v1/; - -/ { - model = "nintendo,gamecube"; - compatible = "nintendo,gamecube"; - #address-cells = <1>; - #size-cells = <1>; - - chosen { - bootargs = "root=/dev/gcnsda2 rootwait udbg-immortal"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x01800000>; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,gekko@0 { - device_type = "cpu"; - reg = <0>; - clock-frequency = <486000000>; /* 486MHz */ - bus-frequency = <162000000>; /* 162MHz core-to-bus 3x */ - timebase-frequency = <40500000>; /* 162MHz / 4 */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - }; - }; - - /* devices contained int the flipper chipset */ - flipper { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nintendo,flipper"; - ranges = <0x0c000000 0x0c000000 0x00010000>; - interrupt-parent = <&PIC>; - - video@0c002000 { - compatible = "nintendo,flipper-vi"; - reg = <0x0c002000 0x100>; - interrupts = <8>; - }; - - processor-interface@0c003000 { - compatible = "nintendo,flipper-pi"; - reg = <0x0c003000 0x100>; - - PIC: pic { - #interrupt-cells = <1>; - compatible = "nintendo,flipper-pic"; - interrupt-controller; - }; - }; - - dsp@0c005000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nintendo,flipper-dsp"; - reg = <0x0c005000 0x200>; - interrupts = <6>; - - memory@0 { - compatible = "nintendo,flipper-aram"; - reg = <0 0x1000000>; /* 16MB */ - }; - }; - - disk@0c006000 { - compatible = "nintendo,flipper-di"; - reg = <0x0c006000 0x40>; - interrupts = <2>; - }; - - audio@0c006c00 { - compatible = "nintendo,flipper-ai"; - reg = <0x0c006c00 0x20>; - interrupts = <6>; - }; - - gamepad-controller@0c006400 { - compatible = "nintendo,flipper-si"; - reg = <0x0c006400 0x100>; - interrupts = <3>; - }; - - /* External Interface bus */ - exi@0c006800 { - compatible = "nintendo,flipper-exi"; - reg = <0x0c006800 0x40>; - virtual-reg = <0x0c006800>; - interrupts = <4>; - }; - }; -}; - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ge_imp3a.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ge_imp3a.dts deleted file mode 100644 index fefae416..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ge_imp3a.dts +++ /dev/null @@ -1,255 +0,0 @@ -/* - * GE IMP3A Device Tree Source - * - * Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Based on: P2020 DS Device Tree Source - * Copyright 2009 Freescale Semiconductor Inc. - */ - -/include/ "fsl/p2020si-pre.dtsi" - -/ { - model = "GE_IMP3A"; - compatible = "ge,imp3a"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fef05000 { - reg = <0 0xfef05000 0 0x1000>; - - ranges = <0x0 0x0 0x0 0xff000000 0x01000000 - 0x1 0x0 0x0 0xe0000000 0x08000000 - 0x2 0x0 0x0 0xe8000000 0x08000000 - 0x3 0x0 0x0 0xfc100000 0x00020000 - 0x4 0x0 0x0 0xfc000000 0x00008000 - 0x5 0x0 0x0 0xfc008000 0x00008000 - 0x6 0x0 0x0 0xfee00000 0x00040000 - 0x7 0x0 0x0 0xfee80000 0x00040000>; - - /* nor@0,0 is a mirror of part of the memory in nor@1,0 - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "ge,imp3a-firmware-mirror", "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - label = "firmware"; - reg = <0x0 0x1000000>; - read-only; - }; - }; - */ - - nor@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "ge,imp3a-paged-flash", "cfi-flash"; - reg = <0x1 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - label = "user"; - reg = <0x0 0x7800000>; - }; - - partition@7800000 { - label = "firmware"; - reg = <0x7800000 0x800000>; - read-only; - }; - }; - - nvram@3,0 { - device_type = "nvram"; - compatible = "simtek,stk14ca8"; - reg = <0x3 0x0 0x20000>; - }; - - fpga@4,0 { - compatible = "ge,imp3a-fpga-regs"; - reg = <0x4 0x0 0x20>; - }; - - gef_pic: pic@4,20 { - #interrupt-cells = <1>; - interrupt-controller; - device_type = "interrupt-controller"; - compatible = "ge,imp3a-fpga-pic", "gef,fpga-pic-1.00"; - reg = <0x4 0x20 0x20>; - interrupts = <6 7 0 0>; - }; - - gef_gpio: gpio@4,400 { - #gpio-cells = <2>; - compatible = "ge,imp3a-gpio"; - reg = <0x4 0x400 0x24>; - gpio-controller; - }; - - wdt@4,800 { - compatible = "ge,imp3a-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x800 0x8>; - interrupts = <10 4>; - interrupt-parent = <&gef_pic>; - }; - - /* Second watchdog available, driver currently supports one. - wdt@4,808 { - compatible = "gef,imp3a-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x808 0x8>; - interrupts = <9 4>; - interrupt-parent = <&gef_pic>; - }; - */ - - nand@6,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x6 0x0 0x40000>; - }; - - nand@7,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x7 0x0 0x40000>; - }; - }; - - soc: soc@fef00000 { - ranges = <0x0 0 0xfef00000 0x100000>; - - i2c@3000 { - hwmon@48 { - compatible = "national,lm92"; - reg = <0x48>; - }; - - hwmon@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - rtc@51 { - compatible = "epson,rx8581"; - reg = <0x51>; - }; - - eti@6b { - compatible = "dallas,ds1682"; - reg = <0x6b>; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupt-parent = <&gef_pic>; - interrupts = <0xc 0x4>; - reg = <0x1>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&gef_pic>; - interrupts = <0xb 0x4>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26520 { - status = "disabled"; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "gmii"; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "gmii"; - }; - - enet2: ethernet@26000 { - status = "disabled"; - }; - }; - - pci0: pcie@fef08000 { - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xfe020000 0x0 0x10000>; - reg = <0 0xfef08000 0 0x1000>; - - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci1: pcie@fef09000 { - reg = <0 0xfef09000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xfe010000 0x0 0x10000>; - - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - - }; - - pci2: pcie@fef0a000 { - reg = <0 0xfef0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xfe000000 0x0 0x10000>; - - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; - -/include/ "fsl/p2020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_ppc9a.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_ppc9a.dts deleted file mode 100644 index 38dcb96c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_ppc9a.dts +++ /dev/null @@ -1,427 +0,0 @@ -/* - * GE PPC9A Device Tree Source - * - * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Based on: SBS CM6 Device Tree Source - * Copyright 2007 SBS Technologies GmbH & Co. KG - * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source) - * Copyright 2006 Freescale Semiconductor Inc. - */ - -/* - * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts - */ - -/dts-v1/; - -/ { - model = "GEF_PPC9A"; - compatible = "gef,ppc9a"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x40000000>; // set by uboot - }; - - localbus@fef05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0xfef05000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash - 1 0 0xe8000000 0x08000000 // Paged Flash 0 - 2 0 0xe0000000 0x08000000 // Paged Flash 1 - 3 0 0xfc100000 0x00020000 // NVRAM - 4 0 0xfc000000 0x00008000 // FPGA - 5 0 0xfc008000 0x00008000 // AFIX FPGA - 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit) - 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit) - - /* flash@0,0 is a mirror of part of the memory in flash@1,0 - flash@0,0 { - compatible = "gef,ppc9a-firmware-mirror", "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <4>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "firmware"; - reg = <0x0 0x1000000>; - read-only; - }; - }; - */ - - flash@1,0 { - compatible = "gef,ppc9a-paged-flash", "cfi-flash"; - reg = <0x1 0x0 0x8000000>; - bank-width = <4>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "user"; - reg = <0x0 0x7800000>; - }; - partition@7800000 { - label = "firmware"; - reg = <0x7800000 0x800000>; - read-only; - }; - }; - - nvram@3,0 { - device_type = "nvram"; - compatible = "simtek,stk14ca8"; - reg = <0x3 0x0 0x20000>; - }; - - fpga@4,0 { - compatible = "gef,ppc9a-fpga-regs"; - reg = <0x4 0x0 0x40>; - }; - - wdt@4,2000 { - compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x2000 0x8>; - interrupts = <0x1a 0x4>; - interrupt-parent = <&gef_pic>; - }; - /* Second watchdog available, driver currently supports one. - wdt@4,2010 { - compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x2010 0x8>; - interrupts = <0x1b 0x4>; - interrupt-parent = <&gef_pic>; - }; - */ - gef_pic: pic@4,4000 { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00"; - reg = <0x4 0x4000 0x20>; - interrupts = <0x8 - 0x9>; - interrupt-parent = <&mpic>; - - }; - gef_gpio: gpio@7,14000 { - #gpio-cells = <2>; - compatible = "gef,ppc9a-gpio", "gef,sbc610-gpio"; - reg = <0x7 0x14000 0x24>; - gpio-controller; - }; - }; - - soc@fef00000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - device_type = "soc"; - compatible = "fsl,mpc8641-soc", "simple-bus"; - ranges = <0x0 0xfef00000 0x00100000>; - bus-frequency = <33333333>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c1: i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - - hwmon@48 { - compatible = "national,lm92"; - reg = <0x48>; - }; - - hwmon@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - rtc@51 { - compatible = "epson,rx8581"; - reg = <0x00000051>; - }; - - eti@6b { - compatible = "dallas,ds1682"; - reg = <0x6b>; - }; - }; - - i2c2: i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&gef_pic>; - interrupts = <0x9 0x4>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&gef_pic>; - interrupts = <0x8 0x4>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <0x2a 0x2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <0x1c 0x2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpc8641-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@fef08000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfef08000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000 - 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <0x18 0x2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00400000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc310.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc310.dts deleted file mode 100644 index 5ab8932d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc310.dts +++ /dev/null @@ -1,461 +0,0 @@ -/* - * GE SBC310 Device Tree Source - * - * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Based on: SBS CM6 Device Tree Source - * Copyright 2007 SBS Technologies GmbH & Co. KG - * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source) - * Copyright 2006 Freescale Semiconductor Inc. - */ - -/* - * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts - */ - -/dts-v1/; - -/ { - model = "GEF_SBC310"; - compatible = "gef,sbc310"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x40000000>; // set by uboot - }; - - localbus@fef05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0xfef05000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash - 1 0 0xe0000000 0x08000000 // Paged Flash 0 - 2 0 0xe8000000 0x08000000 // Paged Flash 1 - 3 0 0xfc100000 0x00020000 // NVRAM - 4 0 0xfc000000 0x00010000>; // FPGA - - /* flash@0,0 is a mirror of part of the memory in flash@1,0 - flash@0,0 { - compatible = "gef,sbc310-firmware-mirror", "cfi-flash"; - reg = <0x0 0x0 0x01000000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "firmware"; - reg = <0x0 0x01000000>; - read-only; - }; - }; - */ - - flash@1,0 { - compatible = "gef,sbc310-paged-flash", "cfi-flash"; - reg = <0x1 0x0 0x8000000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "user"; - reg = <0x0 0x7800000>; - }; - partition@7800000 { - label = "firmware"; - reg = <0x7800000 0x800000>; - read-only; - }; - }; - - nvram@3,0 { - device_type = "nvram"; - compatible = "simtek,stk14ca8"; - reg = <0x3 0x0 0x20000>; - }; - - fpga@4,0 { - compatible = "gef,fpga-regs"; - reg = <0x4 0x0 0x40>; - }; - - wdt@4,2000 { - compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x2000 0x8>; - interrupts = <0x1a 0x4>; - interrupt-parent = <&gef_pic>; - }; -/* - wdt@4,2010 { - compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00", - "gef,fpga-wdt"; - reg = <0x4 0x2010 0x8>; - interrupts = <0x1b 0x4>; - interrupt-parent = <&gef_pic>; - }; -*/ - gef_pic: pic@4,4000 { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "gef,sbc310-fpga-pic", "gef,fpga-pic"; - reg = <0x4 0x4000 0x20>; - interrupts = <0x8 - 0x9>; - interrupt-parent = <&mpic>; - - }; - gef_gpio: gpio@4,8000 { - #gpio-cells = <2>; - compatible = "gef,sbc310-gpio"; - reg = <0x4 0x8000 0x24>; - gpio-controller; - }; - }; - - soc@fef00000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - device_type = "soc"; - compatible = "fsl,mpc8641-soc", "simple-bus"; - ranges = <0x0 0xfef00000 0x00100000>; - bus-frequency = <33333333>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c1: i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - - rtc@51 { - compatible = "epson,rx8581"; - reg = <0x00000051>; - }; - }; - - i2c2: i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - - hwmon@48 { - compatible = "national,lm92"; - reg = <0x48>; - }; - - hwmon@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - eti@6b { - compatible = "dallas,ds1682"; - reg = <0x6b>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&gef_pic>; - interrupts = <0x9 0x4>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&gef_pic>; - interrupts = <0x8 0x4>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <0x2a 0x2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <0x1c 0x2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpc8641-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@fef08000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfef08000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000 - 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <0x18 0x2>; - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2 - 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2 - 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2 - 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00400000>; - }; - }; - - pci1: pcie@fef09000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfef09000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xfe400000 0x0 0x00400000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <0x19 0x2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - 0x0000 0x0 0x0 0x1 &mpic 0x4 0x2 - 0x0000 0x0 0x0 0x2 &mpic 0x5 0x2 - 0x0000 0x0 0x0 0x3 &mpic 0x6 0x2 - 0x0000 0x0 0x0 0x4 &mpic 0x7 0x2 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xc0000000 - 0x02000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00400000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc610.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc610.dts deleted file mode 100644 index d5341f57..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/gef_sbc610.dts +++ /dev/null @@ -1,425 +0,0 @@ -/* - * GE SBC610 Device Tree Source - * - * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Based on: SBS CM6 Device Tree Source - * Copyright 2007 SBS Technologies GmbH & Co. KG - * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source) - * Copyright 2006 Freescale Semiconductor Inc. - */ - -/* - * Compiled with dtc -I dts -O dtb -o gef_sbc610.dtb gef_sbc610.dts - */ - -/dts-v1/; - -/ { - model = "GEF_SBC610"; - compatible = "gef,sbc610"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x40000000>; // set by uboot - }; - - localbus@fef05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0xfef05000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash - 1 0 0xe8000000 0x08000000 // Paged Flash 0 - 2 0 0xe0000000 0x08000000 // Paged Flash 1 - 3 0 0xfc100000 0x00020000 // NVRAM - 4 0 0xfc000000 0x00008000 // FPGA - 5 0 0xfc008000 0x00008000 // AFIX FPGA - 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit) - 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit) - - /* flash@0,0 is a mirror of part of the memory in flash@1,0 - flash@0,0 { - compatible = "gef,sbc610-firmware-mirror", "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <4>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "firmware"; - reg = <0x0 0x1000000>; - read-only; - }; - }; - */ - - flash@1,0 { - compatible = "gef,sbc610-paged-flash", "cfi-flash"; - reg = <0x1 0x0 0x8000000>; - bank-width = <4>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "user"; - reg = <0x0 0x7800000>; - }; - partition@7800000 { - label = "firmware"; - reg = <0x7800000 0x800000>; - read-only; - }; - }; - - nvram@3,0 { - device_type = "nvram"; - compatible = "simtek,stk14ca8"; - reg = <0x3 0x0 0x20000>; - }; - - fpga@4,0 { - compatible = "gef,fpga-regs"; - reg = <0x4 0x0 0x40>; - }; - - wdt@4,2000 { - compatible = "gef,fpga-wdt"; - reg = <0x4 0x2000 0x8>; - interrupts = <0x1a 0x4>; - interrupt-parent = <&gef_pic>; - }; - /* Second watchdog available, driver currently supports one. - wdt@4,2010 { - compatible = "gef,fpga-wdt"; - reg = <0x4 0x2010 0x8>; - interrupts = <0x1b 0x4>; - interrupt-parent = <&gef_pic>; - }; - */ - gef_pic: pic@4,4000 { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "gef,fpga-pic"; - reg = <0x4 0x4000 0x20>; - interrupts = <0x8 - 0x9>; - interrupt-parent = <&mpic>; - - }; - gef_gpio: gpio@7,14000 { - #gpio-cells = <2>; - compatible = "gef,sbc610-gpio"; - reg = <0x7 0x14000 0x24>; - gpio-controller; - }; - }; - - soc@fef00000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xfef00000 0x00100000>; - bus-frequency = <33333333>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c1: i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - - hwmon@48 { - compatible = "national,lm92"; - reg = <0x48>; - }; - - hwmon@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - rtc@51 { - compatible = "epson,rx8581"; - reg = <0x00000051>; - }; - - eti@6b { - compatible = "dallas,ds1682"; - reg = <0x6b>; - }; - }; - - i2c2: i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&gef_pic>; - interrupts = <0x9 0x4>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&gef_pic>; - interrupts = <0x8 0x4>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "gmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <0x2a 0x2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <0x1c 0x2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpc8641-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@fef08000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfef08000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000 - 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <0x18 0x2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00400000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/glacier.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/glacier.dts deleted file mode 100644 index 20000603..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/glacier.dts +++ /dev/null @@ -1,576 +0,0 @@ -/* - * Device Tree Source for AMCC Glacier (460GT) - * - * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,glacier"; - compatible = "amcc,glacier"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - ethernet2 = &EMAC2; - ethernet3 = &EMAC3; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,460GT"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - next-level-cache = <&L2C0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-460gt","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-460gt"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-460gt"; - dcr-reg = <0x00c 0x002>; - }; - - L2C0: l2c { - compatible = "ibm,l2-cache-460gt", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ - 0x030 0x008>; /* L2 cache DCR's */ - cache-line-size = <32>; /* 32 bytes */ - cache-size = <262144>; /* L2, 256K */ - interrupt-parent = <&UIC1>; - interrupts = <11 1>; - }; - - plb { - compatible = "ibm,plb-460gt", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - CRYPTO: crypto@180000 { - compatible = "amcc,ppc460gt-crypto", "amcc,ppc460ex-crypto", - "amcc,ppc4xx-crypto"; - reg = <4 0x00180000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x1d 0x4>; - }; - - HWRNG: hwrng@110000 { - compatible = "amcc,ppc460ex-rng", "ppc4xx-rng"; - reg = <4 0x00110000 0x50>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <32>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-parent = <&UIC2>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x3 0x4 - /*TXDE*/ 0x4 0x4 - /*RXDE*/ 0x5 0x4>; - desc-base-addr-high = <0x8>; - }; - - POB0: opb { - compatible = "ibm,opb-460gt", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-460gt", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "ramdisk"; - reg = <0x00200000 0x01400000>; - }; - partition@1600000 { - label = "jffs2"; - reg = <0x01600000 0x00400000>; - }; - partition@1a00000 { - label = "user"; - reg = <0x01a00000 0x02560000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - ndfc@3,0 { - compatible = "ibm,ndfc"; - reg = <0x00000003 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - }; - partition@100000 { - label = "user"; - reg = <0x00000000 0x03f00000>; - }; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <0x1 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 0x00000008>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <28 0x4>; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 0x00000008>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC1>; - interrupts = <29 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-460gt", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - rtc@68 { - compatible = "stm,m41t80"; - reg = <0x68>; - interrupt-parent = <&UIC2>; - interrupts = <0x19 0x8>; - }; - sttm@48 { - compatible = "ad,ad7414"; - reg = <0x48>; - interrupt-parent = <&UIC1>; - interrupts = <0x14 0x8>; - }; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-460gt", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-460gt", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - RGMII0: emac-rgmii@ef601500 { - compatible = "ibm,rgmii-460gt", "ibm,rgmii"; - reg = <0xef601500 0x00000008>; - has-mdio; - }; - - RGMII1: emac-rgmii@ef601600 { - compatible = "ibm,rgmii-460gt", "ibm,rgmii"; - reg = <0xef601600 0x00000008>; - has-mdio; - }; - - TAH0: emac-tah@ef601350 { - compatible = "ibm,tah-460gt", "ibm,tah"; - reg = <0xef601350 0x00000030>; - }; - - TAH1: emac-tah@ef601450 { - compatible = "ibm,tah-460gt", "ibm,tah"; - reg = <0xef601450 0x00000030>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 - /*Wake*/ 0x1 &UIC2 0x14 0x4>; - reg = <0xef600e00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 - /*Wake*/ 0x1 &UIC2 0x15 0x4>; - reg = <0xef600f00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <8>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - tah-device = <&TAH1>; - tah-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - - EMAC2: ethernet@ef601100 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC2>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4 - /*Wake*/ 0x1 &UIC2 0x16 0x4>; - reg = <0xef601100 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <2>; - mal-rx-channel = <16>; - cell-index = <2>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; /* emac2&3 only */ - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII1>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - - EMAC3: ethernet@ef601200 { - device_type = "network"; - compatible = "ibm,emac-460gt", "ibm,emac4sync"; - interrupt-parent = <&EMAC3>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4 - /*Wake*/ 0x1 &UIC2 0x17 0x4>; - reg = <0xef601200 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <3>; - mal-rx-channel = <24>; - cell-index = <3>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; /* emac2&3 only */ - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII1>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - }; - - PCIX0: pci@c0ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pcix-460gt", "ibm,plb-pcix"; - primary; - large-inbound-windows; - enable-msi-hole; - reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ - 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ - 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0 to 0x3f */ - bus-range = <0x0 0x3f>; - - /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ - interrupt-map-mask = <0x0 0x0 0x0 0x0>; - interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; - }; - - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x08010000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 40 to 0x7f */ - bus-range = <0x40 0x7f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@d20000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ - 0x0000000c 0x08011000 0x00001000>; /* Registers */ - dcr-reg = <0x120 0x020>; - sdr-base = <0x340>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 - 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 80 to 0xbf */ - bus-range = <0x80 0xbf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/haleakala.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/haleakala.dts deleted file mode 100644 index 2b256694..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/haleakala.dts +++ /dev/null @@ -1,281 +0,0 @@ -/* - * Device Tree Source for AMCC Haleakala (405EXr) - * - * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "amcc,haleakala"; - compatible = "amcc,haleakala", "amcc,kilauea"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EXr"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; /* 16 kB */ - d-cache-size = <16384>; /* 16 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic-405exr", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-405exr","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-405exr","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - plb { - compatible = "ibm,plb-405exr", "ibm,plb4"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2"; - dcr-reg = <0x010 0x002>; - interrupt-parent = <&UIC2>; - interrupts = <0x5 0x4 /* ECC DED Error */ - 0x6 0x4>; /* ECC SEC Error */ - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-405exr", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-405exr", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x80000000 0x80000000 0x10000000 - 0xef600000 0xef600000 0x00a00000 - 0xf0000000 0xf0000000 0x10000000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-405exr", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x03b60000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1a 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600400 { - compatible = "ibm,iic-405exr", "ibm,iic"; - reg = <0xef600400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@ef600500 { - compatible = "ibm,iic-405exr", "ibm,iic"; - reg = <0xef600500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - - RGMII0: emac-rgmii@ef600b00 { - compatible = "ibm,rgmii-405exr", "ibm,rgmii"; - reg = <0xef600b00 0x00000104>; - has-mdio; - }; - - EMAC0: ethernet@ef600900 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405exr", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600900 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIE0: pciex@0a0000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0xa0000000 0x20000000 /* Config space access */ - 0xef000000 0x00001000>; /* Registers */ - dcr-reg = <0x040 0x020>; - sdr-base = <0x400>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 - 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0x00 to 0x3f */ - bus-range = <0x0 0x3f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/holly.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/holly.dts deleted file mode 100644 index c6e11ebe..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/holly.dts +++ /dev/null @@ -1,197 +0,0 @@ -/* - * Device Tree Source for IBM Holly (PPC 750CL with TSI controller) - * Copyright 2007, IBM Corporation - * - * Stephen Winiecki <stevewin@us.ibm.com> - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - model = "41K7339"; - compatible = "ibm,holly"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells =<0>; - PowerPC,750CL@0 { - device_type = "cpu"; - reg = <0x00000000>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - d-cache-sets = <128>; - i-cache-sets = <128>; - timebase-frequency = <50000000>; - clock-frequency = <600000000>; - bus-frequency = <200000000>; - }; - }; - - memory@0 { - device_type = "memory"; - reg = <0x00000000 0x20000000>; - }; - - tsi109@c0000000 { - device_type = "tsi-bridge"; - compatible = "tsi109-bridge", "tsi108-bridge"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0xc0000000 0x00010000>; - reg = <0xc0000000 0x00010000>; - - i2c@7000 { - device_type = "i2c"; - compatible = "tsi109-i2c", "tsi108-i2c"; - interrupt-parent = <&MPIC>; - interrupts = <0xe 0x2>; - reg = <0x00007000 0x00000400>; - }; - - MDIO: mdio@6000 { - device_type = "mdio"; - compatible = "tsi109-mdio", "tsi108-mdio"; - reg = <0x00006000 0x00000050>; - #address-cells = <1>; - #size-cells = <0>; - - PHY1: ethernet-phy@1 { - compatible = "bcm5461a"; - reg = <0x00000001>; - txc-rxc-delay-disable; - }; - - PHY2: ethernet-phy@2 { - compatible = "bcm5461a"; - reg = <0x00000002>; - txc-rxc-delay-disable; - }; - }; - - ethernet@6200 { - device_type = "network"; - compatible = "tsi109-ethernet", "tsi108-ethernet"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x00006000 0x00000200>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupt-parent = <&MPIC>; - interrupts = <0x10 0x2>; - mdio-handle = <&MDIO>; - phy-handle = <&PHY1>; - }; - - ethernet@6600 { - device_type = "network"; - compatible = "tsi109-ethernet", "tsi108-ethernet"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x00006400 0x00000200>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupt-parent = <&MPIC>; - interrupts = <0x11 0x2>; - mdio-handle = <&MDIO>; - phy-handle = <&PHY2>; - }; - - serial@7808 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x00007808 0x00000200>; - virtual-reg = <0xc0007808>; - clock-frequency = <1067212800>; - current-speed = <115200>; - interrupt-parent = <&MPIC>; - interrupts = <0xc 0x2>; - }; - - serial@7c08 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x00007c08 0x00000200>; - virtual-reg = <0xc0007c08>; - clock-frequency = <1067212800>; - current-speed = <115200>; - interrupt-parent = <&MPIC>; - interrupts = <0xd 0x2>; - }; - - MPIC: pic@7400 { - device_type = "open-pic"; - compatible = "chrp,open-pic"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x00007400 0x00000400>; - big-endian; - }; - }; - - pci@c0001000 { - device_type = "pci"; - compatible = "tsi109-pci", "tsi108-pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xc0001000 0x00001000>; - bus-range = <0x0 0x0>; - /*----------------------------------------------------+ - | PCI memory range. - | 01 denotes I/O space - | 02 denotes 32-bit memory space - +----------------------------------------------------*/ - ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000 - 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>; - clock-frequency = <133333332>; - interrupt-parent = <&MPIC>; - interrupts = <0x17 0x2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - /*----------------------------------------------------+ - | The INTA, INTB, INTC, INTD are shared. - +----------------------------------------------------*/ - interrupt-map = < - 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 - 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 - 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 - 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 - - 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 - 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 - 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 - 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 - - 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 - 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 - 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 - 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 - - 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 - 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 - 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 - 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 - >; - - RT0: router@1180 { - device_type = "pic-router"; - interrupt-controller; - big-endian; - clock-frequency = <0>; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x17 0x2>; - interrupt-parent = <&MPIC>; - }; - }; - - chosen { - linux,stdout-path = "/tsi109@c0000000/serial@7808"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/hotfoot.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/hotfoot.dts deleted file mode 100644 index 71d3bb49..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/hotfoot.dts +++ /dev/null @@ -1,296 +0,0 @@ -/* - * Device Tree Source for ESTeem 195E Hotfoot - * - * Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "est,hotfoot"; - compatible = "est,hotfoot"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EP"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <0x20>; - d-cache-line-size = <0x20>; - i-cache-size = <0x4000>; - d-cache-size = <0x4000>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - plb { - compatible = "ibm,plb3"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405ep"; - dcr-reg = <0x010 0x002>; - }; - - MAL: mcmal { - compatible = "ibm,mcmal-405ep", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <2>; - interrupt-parent = <&UIC0>; - interrupts = < - 0xb 0x4 /* TXEOB */ - 0xc 0x4 /* RXEOB */ - 0xa 0x4 /* SERR */ - 0xd 0x4 /* TXDE */ - 0xe 0x4 /* RXDE */>; - }; - - POB0: opb { - compatible = "ibm,opb-405ep", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xef600000 0xef600000 0x00a00000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by zImage */ - - /* Hotfoot has UART0/UART1 swapped */ - - UART0: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <0x9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <0x9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - IIC: i2c@ef600500 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ibm,iic-405ep", "ibm,iic"; - reg = <0xef600500 0x00000011>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - - rtc@68 { - /* Actually a DS1339 */ - compatible = "dallas,ds1307"; - reg = <0x68>; - }; - - temp@4a { - /* Not present on all boards */ - compatible = "national,lm75"; - reg = <0x4a>; - }; - }; - - GPIO: gpio@ef600700 { - #gpio-cells = <2>; - compatible = "ibm,ppc4xx-gpio"; - reg = <0xef600700 0x00000020>; - gpio-controller; - }; - - gpio-leds { - compatible = "gpio-leds"; - status { - label = "Status"; - gpios = <&GPIO 1 0>; - }; - radiorx { - label = "Rx"; - gpios = <&GPIO 0xe 0>; - }; - }; - - EMAC0: ethernet@ef600800 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405ep", "ibm,emac"; - interrupt-parent = <&UIC0>; - interrupts = < - 0xf 0x4 /* Ethernet */ - 0x9 0x4 /* Ethernet Wake Up */>; - local-mac-address = [000000000000]; /* Filled in by zImage */ - reg = <0xef600800 0x00000070>; - mal-device = <&MAL>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <0x5dc>; - rx-fifo-size = <0x1000>; - tx-fifo-size = <0x800>; - phy-mode = "mii"; - phy-map = <0x00000000>; - }; - - EMAC1: ethernet@ef600900 { - linux,network-index = <0x1>; - device_type = "network"; - compatible = "ibm,emac-405ep", "ibm,emac"; - interrupt-parent = <&UIC0>; - interrupts = < - 0x11 0x4 /* Ethernet */ - 0x9 0x4 /* Ethernet Wake Up */>; - local-mac-address = [000000000000]; /* Filled in by zImage */ - reg = <0xef600900 0x00000070>; - mal-device = <&MAL>; - mal-tx-channel = <2>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <0x5dc>; - rx-fifo-size = <0x1000>; - tx-fifo-size = <0x800>; - mdio-device = <&EMAC0>; - phy-mode = "mii"; - phy-map = <0x0000001>; - }; - }; - - EBC0: ebc { - compatible = "ibm,ebc-405ep", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - - /* The ranges property is supplied by the bootwrapper - * and is based on the firmware's configuration of the - * EBC bridge - */ - clock-frequency = <0>; /* Filled in by zImage */ - - nor_flash@0 { - compatible = "cfi-flash"; - bank-width = <2>; - reg = <0x0 0xff800000 0x00800000>; - #address-cells = <1>; - #size-cells = <1>; - - /* This mapping is for the 8M flash - 4M flash has all ofssets -= 4M, - and FeatFS partition is not present */ - partition@0 { - label = "Bootloader"; - reg = <0x7c0000 0x40000>; - /* read-only; */ - }; - partition@1 { - label = "Env_and_Config_Primary"; - reg = <0x400000 0x10000>; - }; - partition@2 { - label = "Kernel"; - reg = <0x420000 0x100000>; - }; - partition@3 { - label = "Filesystem"; - reg = <0x520000 0x2a0000>; - }; - partition@4 { - label = "Env_and_Config_Secondary"; - reg = <0x410000 0x10000>; - }; - partition@5 { - label = "FeatFS"; - reg = <0x000000 0x400000>; - }; - partition@6 { - label = "Bootloader_Env"; - reg = <0x7d0000 0x10000>; - }; - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb405ep-pci", "ibm,plb-pci"; - primary; - reg = <0xeec00000 0x00000008 /* Config space access */ - 0xeed80000 0x00000004 /* IACK */ - 0xeed80000 0x00000004 /* Special cycle */ - 0xef480000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 - 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - interrupt-parent = <&UIC0>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 3 -- slot1 (optional) 27/29 A/B IRQ2/4 */ - 0x1800 0x0 0x0 0x1 &UIC0 0x1b 0x8 - 0x1800 0x0 0x0 0x2 &UIC0 0x1d 0x8 - - /* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */ - 0x2000 0x0 0x0 0x1 &UIC0 0x1a 0x8 - 0x2000 0x0 0x0 0x2 &UIC0 0x1c 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = &UART0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/icon.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/icon.dts deleted file mode 100644 index abcd0cae..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/icon.dts +++ /dev/null @@ -1,447 +0,0 @@ -/* - * Device Tree Source for Mosaix Technologies, Inc. ICON board - * - * Copyright 2010 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - model = "mosaixtech,icon"; - compatible = "mosaixtech,icon"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440SPe"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - reset-type = <2>; /* Use chip-reset */ - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440spe"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440spe"; - dcr-reg = <0x00c 0x002>; - }; - - MQ0: mq { - compatible = "ibm,mq-440spe"; - dcr-reg = <0x040 0x020>; - }; - - plb { - compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - /* addr-child addr-parent size */ - ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000 - 0x4 0x00200000 0x4 0x00200000 0x00000400 - 0x4 0xe0000000 0x4 0xe0000000 0x20000000 - 0xc 0x00000000 0xc 0x00000000 0x20000000 - 0xd 0x00000000 0xd 0x00000000 0x80000000 - 0xd 0x80000000 0xd 0x80000000 0x80000000 - 0xe 0x00000000 0xe 0x00000000 0x80000000 - 0xe 0x80000000 0xe 0x80000000 0x80000000 - 0xf 0x00000000 0xf 0x00000000 0x80000000 - 0xf 0x80000000 0xf 0x80000000 0x80000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <1>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4 - /*RXEOB*/ 0x1 &UIC1 0x7 0x4 - /*SERR*/ 0x2 &UIC1 0x1 0x4 - /*TXDE*/ 0x3 &UIC1 0x2 0x4 - /*RXDE*/ 0x4 &UIC1 0x3 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x01000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x00b60000>; - }; - partition@f60000 { - label = "env"; - reg = <0x00f60000 0x00040000>; - }; - partition@fa0000 { - label = "u-boot"; - reg = <0x00fa0000 0x00060000>; - }; - }; - - SysACE_CompactFlash: sysace@1,0 { - compatible = "xlnx,sysace"; - interrupt-parent = <&UIC2>; - interrupts = <24 0x4>; - reg = <0x00000001 0x00000000 0x10000>; - }; - }; - - UART0: serial@f0000200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000200 0x00000008>; - virtual-reg = <0xa0000200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@f0000300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000300 0x00000008>; - virtual-reg = <0xa0000300>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - - UART2: serial@f0000600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000600 0x00000008>; - virtual-reg = <0xa0000600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x5 0x4>; - }; - - IIC0: i2c@f0000400 { - compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; - reg = <0xf0000400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@f0000500 { - compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; - reg = <0xf0000500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@68 { - compatible = "stm,m41t00"; - reg = <0x68>; - }; - }; - - EMAC0: ethernet@f0000800 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-440spe", "ibm,emac4"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0xf0000800 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "gmii"; - phy-map = <0x00000000>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIX0: pci@c0ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix"; - primary; - large-inbound-windows; - enable-msi-hole; - reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ - 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ - 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* PCI-X interrupt (SM502) is routed to extIRQ10 (UIC1, 19) */ - interrupt-map-mask = <0x0 0x0 0x0 0x0>; - interrupt-map = <0x0 0x0 0x0 0x0 &UIC1 19 0x8>; - }; - - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x10000000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0x10 to 0x1f */ - bus-range = <0x10 0x1f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@d20000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ - 0x0000000c 0x10001000 0x00001000>; /* Registers */ - dcr-reg = <0x120 0x020>; - sdr-base = <0x340>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0x20 to 0x2f */ - bus-range = <0x20 0x2f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; - }; - - I2O: i2o@400100000 { - compatible = "ibm,i2o-440spe"; - reg = <0x00000004 0x00100000 0x100>; - dcr-reg = <0x060 0x020>; - }; - - DMA0: dma0@400100100 { - compatible = "ibm,dma-440spe"; - cell-index = <0>; - reg = <0x00000004 0x00100100 0x100>; - dcr-reg = <0x060 0x020>; - interrupt-parent = <&DMA0>; - interrupts = <0 1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = < - 0 &UIC0 0x14 4 - 1 &UIC1 0x16 4>; - }; - - DMA1: dma1@400100200 { - compatible = "ibm,dma-440spe"; - cell-index = <1>; - reg = <0x00000004 0x00100200 0x100>; - dcr-reg = <0x060 0x020>; - interrupt-parent = <&DMA1>; - interrupts = <0 1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = < - 0 &UIC0 0x16 4 - 1 &UIC1 0x16 4>; - }; - - xor-accel@400200000 { - compatible = "amcc,xor-accelerator"; - reg = <0x00000004 0x00200000 0x400>; - interrupt-parent = <&UIC1>; - interrupts = <0x1f 4>; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@f0000200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx-mpic.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx-mpic.dts deleted file mode 100644 index 23e9d9b7..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx-mpic.dts +++ /dev/null @@ -1,155 +0,0 @@ -/* - * Device Tree Source for IBM Embedded PPC 476 Platform - * - * Copyright 2010 Torez Smith, IBM Corporation. - * - * Based on earlier code: - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/memreserve/ 0x01f00000 0x00100000; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "ibm,iss-4xx"; - compatible = "ibm,iss-4xx"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,4xx"; // real CPU changed in sim - reg = <0>; - clock-frequency = <100000000>; // 100Mhz :-) - timebase-frequency = <100000000>; - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "ok"; - }; - cpu@1 { - device_type = "cpu"; - model = "PowerPC,4xx"; // real CPU changed in sim - reg = <1>; - clock-frequency = <100000000>; // 100Mhz :-) - timebase-frequency = <100000000>; - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "disabled"; - enable-method = "spin-table"; - cpu-release-addr = <0 0x01f00100>; - }; - cpu@2 { - device_type = "cpu"; - model = "PowerPC,4xx"; // real CPU changed in sim - reg = <2>; - clock-frequency = <100000000>; // 100Mhz :-) - timebase-frequency = <100000000>; - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "disabled"; - enable-method = "spin-table"; - cpu-release-addr = <0 0x01f00200>; - }; - cpu@3 { - device_type = "cpu"; - model = "PowerPC,4xx"; // real CPU changed in sim - reg = <3>; - clock-frequency = <100000000>; // 100Mhz :-) - timebase-frequency = <100000000>; - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "disabled"; - enable-method = "spin-table"; - cpu-release-addr = <0 0x01f00300>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage - - }; - - MPIC: interrupt-controller { - compatible = "chrp,open-pic"; - interrupt-controller; - dcr-reg = <0xffc00000 0x00030000>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - - }; - - plb { - compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */ - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; // Filled in by zImage - - POB0: opb { - compatible = "ibm,opb-4xx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full 32-bit - range */ - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - clock-frequency = <0>; // Filled in by zImage - UART0: serial@40000200 { - device_type = "serial"; - compatible = "ns16550a"; - reg = <0x40000200 0x00000008>; - virtual-reg = <0xe0000200>; - clock-frequency = <11059200>; - current-speed = <115200>; - interrupt-parent = <&MPIC>; - interrupts = <0x0 0x2>; - }; - }; - }; - - nvrtc { - compatible = "ds1743-nvram", "ds1743", "rtc-ds1743"; - reg = <0 0xEF703000 0x2000>; - }; - iss-block { - compatible = "ibm,iss-sim-block-device"; - reg = <0 0xEF701000 0x1000>; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@40000200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx.dts deleted file mode 100644 index 4ff6555c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/iss4xx.dts +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Device Tree Source for IBM Embedded PPC 476 Platform - * - * Copyright 2010 Torez Smith, IBM Corporation. - * - * Based on earlier code: - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "ibm,iss-4xx"; - compatible = "ibm,iss-4xx"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,4xx"; // real CPU changed in sim - reg = <0x00000000>; - clock-frequency = <100000000>; // 100Mhz :-) - timebase-frequency = <100000000>; - i-cache-line-size = <32>; // may need fixup in sim - d-cache-line-size = <32>; // may need fixup in sim - i-cache-size = <32768>; /* may need fixup in sim */ - d-cache-size = <32768>; /* may need fixup in sim */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-4xx", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-4xx", "ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - plb { - compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */ - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; // Filled in by zImage - - POB0: opb { - compatible = "ibm,opb-4xx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full 32-bit - range */ - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - clock-frequency = <0>; // Filled in by zImage - UART0: serial@40000200 { - device_type = "serial"; - compatible = "ns16550a"; - reg = <0x40000200 0x00000008>; - virtual-reg = <0xe0000200>; - clock-frequency = <11059200>; - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - }; - }; - - nvrtc { - compatible = "ds1743-nvram", "ds1743", "rtc-ds1743"; - reg = <0 0xEF703000 0x2000>; - }; - iss-block { - compatible = "ibm,iss-sim-block-device"; - reg = <0 0xEF701000 0x1000>; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@40000200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/katmai.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/katmai.dts deleted file mode 100644 index f913dbe2..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/katmai.dts +++ /dev/null @@ -1,510 +0,0 @@ -/* - * Device Tree Source for AMCC Katmai eval board - * - * Copyright (c) 2006, 2007 IBM Corp. - * Benjamin Herrenschmidt <benh@kernel.crashing.org> - * - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - model = "amcc,katmai"; - compatible = "amcc,katmai"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440SPe"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - reset-type = <2>; /* Use chip-reset */ - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-440spe","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440spe"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440spe"; - dcr-reg = <0x00c 0x002>; - }; - - MQ0: mq { - compatible = "ibm,mq-440spe"; - dcr-reg = <0x040 0x020>; - }; - - plb { - compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - /* addr-child addr-parent size */ - ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000 - 0x4 0x00200000 0x4 0x00200000 0x00000400 - 0x4 0xe0000000 0x4 0xe0000000 0x20000000 - 0xc 0x00000000 0xc 0x00000000 0x20000000 - 0xd 0x00000000 0xd 0x00000000 0x80000000 - 0xd 0x80000000 0xd 0x80000000 0x80000000 - 0xe 0x00000000 0xe 0x00000000 0x80000000 - 0xe 0x80000000 0xe 0x80000000 0x80000000 - 0xf 0x00000000 0xf 0x00000000 0x80000000 - 0xf 0x80000000 0xf 0x80000000 0x80000000>; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <1>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4 - /*RXEOB*/ 0x1 &UIC1 0x7 0x4 - /*SERR*/ 0x2 &UIC1 0x1 0x4 - /*TXDE*/ 0x3 &UIC1 0x2 0x4 - /*RXDE*/ 0x4 &UIC1 0x3 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x01000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x00b60000>; - }; - partition@f60000 { - label = "env"; - reg = <0x00f60000 0x00040000>; - }; - partition@fa0000 { - label = "u-boot"; - reg = <0x00fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@f0000200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000200 0x00000008>; - virtual-reg = <0xa0000200>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@f0000300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000300 0x00000008>; - virtual-reg = <0xa0000300>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - - UART2: serial@f0000600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xf0000600 0x00000008>; - virtual-reg = <0xa0000600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x5 0x4>; - }; - - IIC0: i2c@f0000400 { - compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; - reg = <0xf0000400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@f0000500 { - compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; - reg = <0xf0000500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - EMAC0: ethernet@f0000800 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-440spe", "ibm,emac4"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0xf0000800 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "gmii"; - phy-map = <0x00000000>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIX0: pci@c0ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix"; - primary; - large-inbound-windows; - enable-msi-hole; - reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ - 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ - 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* - * On Katmai, the following PCI-X interrupts signals - * have to be enabled via jumpers (only INTA is - * enabled per default): - * - * INTB: J3: 1-2 - * INTC: J2: 1-2 - * INTD: J1: 1-2 - */ - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 1 */ - 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8 - 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8 - 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8 - 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8 - >; - }; - - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x10000000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0x10 to 0x1f */ - bus-range = <0x10 0x1f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@d20000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ - 0x0000000c 0x10001000 0x00001000>; /* Registers */ - dcr-reg = <0x120 0x020>; - sdr-base = <0x340>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0x20 to 0x2f */ - bus-range = <0x20 0x2f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; - }; - - PCIE2: pciex@d40000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; - primary; - port = <0x2>; /* port number */ - reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ - 0x0000000c 0x10002000 0x00001000>; /* Registers */ - dcr-reg = <0x140 0x020>; - sdr-base = <0x370>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; - - /* Inbound 4GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>; - - /* This drives busses 0x30 to 0x3f */ - bus-range = <0x30 0x3f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; - }; - - MSI: ppc4xx-msi@400300000 { - compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; - reg = < 0x4 0x00300000 0x100>; - sdr-base = <0x3B0>; - msi-data = <0x00000000>; - msi-mask = <0x44440000>; - interrupt-count = <3>; - interrupts =<0 1 2 3>; - interrupt-parent = <&UIC0>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &UIC0 0xC 1 - 1 &UIC0 0x0D 1 - 2 &UIC0 0x0E 1 - 3 &UIC0 0x0F 1>; - }; - - I2O: i2o@400100000 { - compatible = "ibm,i2o-440spe"; - reg = <0x00000004 0x00100000 0x100>; - dcr-reg = <0x060 0x020>; - }; - - DMA0: dma0@400100100 { - compatible = "ibm,dma-440spe"; - cell-index = <0>; - reg = <0x00000004 0x00100100 0x100>; - dcr-reg = <0x060 0x020>; - interrupt-parent = <&DMA0>; - interrupts = <0 1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = < - 0 &UIC0 0x14 4 - 1 &UIC1 0x16 4>; - }; - - DMA1: dma1@400100200 { - compatible = "ibm,dma-440spe"; - cell-index = <1>; - reg = <0x00000004 0x00100200 0x100>; - dcr-reg = <0x060 0x020>; - interrupt-parent = <&DMA1>; - interrupts = <0 1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = < - 0 &UIC0 0x16 4 - 1 &UIC1 0x16 4>; - }; - - xor-accel@400200000 { - compatible = "amcc,xor-accelerator"; - reg = <0x00000004 0x00200000 0x400>; - interrupt-parent = <&UIC1>; - interrupts = <0x1f 4>; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@f0000200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/kilauea.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/kilauea.dts deleted file mode 100644 index 1613d6e4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/kilauea.dts +++ /dev/null @@ -1,435 +0,0 @@ -/* - * Device Tree Source for AMCC Kilauea (405EX) - * - * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "amcc,kilauea"; - compatible = "amcc,kilauea"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; /* 16 kB */ - d-cache-size = <16384>; /* 16 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic-405ex", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - CPM0: cpm { - compatible = "ibm,cpm"; - dcr-access-method = "native"; - dcr-reg = <0x0b0 0x003>; - unused-units = <0x00000000>; - idle-doze = <0x02000000>; - standby = <0xe3e74800>; - }; - - plb { - compatible = "ibm,plb-405ex", "ibm,plb4"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; - dcr-reg = <0x010 0x002>; - interrupt-parent = <&UIC2>; - interrupts = <0x5 0x4 /* ECC DED Error */ - 0x6 0x4>; /* ECC SEC Error */ - }; - - CRYPTO: crypto@ef700000 { - compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto"; - reg = <0xef700000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x17 0x2>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-405ex", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x80000000 0x80000000 0x10000000 - 0xef600000 0xef600000 0x00a00000 - 0xf0000000 0xf0000000 0x10000000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-405ex", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x03b60000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - ndfc@1,0 { - compatible = "ibm,ndfc"; - reg = <0x00000001 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - }; - partition@100000 { - label = "user"; - reg = <0x00000000 0x03f00000>; - }; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1a 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600400 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@68 { - compatible = "dallas,ds1338"; - reg = <0x68>; - }; - - dtt@48 { - compatible = "dallas,ds1775"; - reg = <0x48>; - }; - }; - - IIC1: i2c@ef600500 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - RGMII0: emac-rgmii@ef600b00 { - compatible = "ibm,rgmii-405ex", "ibm,rgmii"; - reg = <0xef600b00 0x00000104>; - has-mdio; - }; - - EMAC0: ethernet@ef600900 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600900 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600a00 { - linux,network-index = <0x1>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 - /*Wake*/ 0x1 &UIC1 0x1f 0x4>; - reg = <0xef600a00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIE0: pciex@0a0000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0xa0000000 0x20000000 /* Config space access */ - 0xef000000 0x00001000>; /* Registers */ - dcr-reg = <0x040 0x020>; - sdr-base = <0x400>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 - 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0x00 to 0x3f */ - bus-range = <0x0 0x3f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@0c0000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0xc0000000 0x20000000 /* Config space access */ - 0xef001000 0x00001000>; /* Registers */ - dcr-reg = <0x060 0x020>; - sdr-base = <0x440>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 - 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0x40 to 0x7f */ - bus-range = <0x40 0x7f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; - }; - - MSI: ppc4xx-msi@C10000000 { - compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; - reg = < 0x0 0xEF620000 0x100>; - sdr-base = <0x4B0>; - msi-data = <0x00000000>; - msi-mask = <0x44440000>; - interrupt-count = <12>; - interrupts = <0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD>; - interrupt-parent = <&UIC2>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &UIC2 0x10 1 - 1 &UIC2 0x11 1 - 2 &UIC2 0x12 1 - 2 &UIC2 0x13 1 - 2 &UIC2 0x14 1 - 2 &UIC2 0x15 1 - 2 &UIC2 0x16 1 - 2 &UIC2 0x17 1 - 2 &UIC2 0x18 1 - 2 &UIC2 0x19 1 - 2 &UIC2 0x1A 1 - 2 &UIC2 0x1B 1 - 2 &UIC2 0x1C 1 - 3 &UIC2 0x1D 1>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/klondike.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/klondike.dts deleted file mode 100644 index 8c942903..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/klondike.dts +++ /dev/null @@ -1,227 +0,0 @@ -/* - * Device Tree for Klondike (APM8018X) board. - * - * Copyright (c) 2010, Applied Micro Circuits Corporation - * Author: Tanmay Inamdar <tinamdar@apm.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "apm,klondike"; - compatible = "apm,klondike"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,apm8018x"; - reg = <0x00000000>; - clock-frequency = <300000000>; /* Filled in by U-Boot */ - timebase-frequency = <300000000>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; /* 16 kB */ - d-cache-size = <16384>; /* 16 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x010>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x010>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x010>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x010>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - plb { - compatible = "ibm,plb4"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-apm8018x"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <16>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-parent = <&UIC1>; - interrupts = </*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x1 0x4 - /*TXDE*/ 0x2 0x4 - /*RXDE*/ 0x3 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x20000000 0x20000000 0x30000000 - 0x50000000 0x50000000 0x10000000 - 0x60000000 0x60000000 0x10000000 - 0xFE000000 0xFE000000 0x00010000>; - dcr-reg = <0x100 0x020>; - clock-frequency = <300000000>; /* Filled in by U-Boot */ - - RGMII0: emac-rgmii@400a2000 { - compatible = "ibm,rgmii"; - reg = <0x400a2000 0x00000010>; - has-mdio; - }; - - TAH0: emac-tah@400a3000 { - compatible = "ibm,tah"; - reg = <0x400a3000 0x100>; - }; - - TAH1: emac-tah@400a4000 { - compatible = "ibm,tah"; - reg = <0x400a4000 0x100>; - }; - - EMAC0: ethernet@400a0000 { - compatible = "ibm,emac4", "ibm-emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4>; - reg = <0x400a0000 0x00000100>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0x0>; - mal-rx-channel = <0x0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-address = <0x2>; - turbo = "no"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - tah-device = <&TAH0>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@400a1000 { - compatible = "ibm,emac4", "ibm-emac4sync"; - status = "disabled"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4>; - reg = <0x400a1000 0x00000100>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <8>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-address = <0x3>; - turbo = "no"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - tah-device = <&TAH1>; - tah-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - mdio-device = <&EMAC0>; - }; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@50001000"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/kmeter1.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/kmeter1.dts deleted file mode 100644 index 983aee18..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/kmeter1.dts +++ /dev/null @@ -1,532 +0,0 @@ -/* - * Keymile KMETER1 Device Tree Source - * - * 2008-2011 DENX Software Engineering GmbH - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "KMETER1"; - compatible = "keymile,KMETER1"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet_piggy2; - ethernet1 = &enet_estar1; - ethernet2 = &enet_estar2; - ethernet3 = &enet_eth1; - ethernet4 = &enet_eth2; - ethernet5 = &enet_eth3; - ethernet6 = &enet_eth4; - serial0 = &serial0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8360@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; /* Filled in by U-Boot */ - bus-frequency = <0>; /* Filled in by U-Boot */ - clock-frequency = <0>; /* Filled in by U-Boot */ - }; - }; - - memory { - device_type = "memory"; - reg = <0 0>; /* Filled in by U-Boot */ - }; - - soc8360@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8360-immr", "simple-bus"; - ranges = <0x0 0xe0000000 0x00200000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; /* Filled in by U-Boot */ - - pmc: power@b00 { - compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl,mpc8313-i2c","fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - clock-frequency = <400000>; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <264000000>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - ipic: pic@700 { - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "fsl,pq2pro-pic", "fsl,ipic"; - interrupt-controller; - reg = <0x700 0x100>; - }; - - par_io@1400 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x1400 0x100>; - compatible = "fsl,mpc8360-par_io"; - num-ports = <7>; - - qe_pio_c: gpio-controller@30 { - #gpio-cells = <2>; - compatible = "fsl,mpc8360-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x1430 0x18>; - gpio-controller; - }; - pio_ucc1: ucc_pin@0 { - reg = <0>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 0 3 1 0 1 0 /* TxD0 */ - 0 4 1 0 1 0 /* TxD1 */ - 0 5 1 0 1 0 /* TxD2 */ - 0 6 1 0 1 0 /* TxD3 */ - 0 9 2 0 1 0 /* RxD0 */ - 0 10 2 0 1 0 /* RxD1 */ - 0 11 2 0 1 0 /* RxD2 */ - 0 12 2 0 1 0 /* RxD3 */ - 0 7 1 0 1 0 /* TX_EN */ - 0 8 1 0 1 0 /* TX_ER */ - 0 15 2 0 1 0 /* RX_DV */ - 0 16 2 0 1 0 /* RX_ER */ - 0 0 2 0 1 0 /* RX_CLK */ - 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ - 2 8 2 0 1 0 /* GTX125 - CLK9 */ - >; - }; - - pio_ucc2: ucc_pin@1 { - reg = <1>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 0 17 1 0 1 0 /* TxD0 */ - 0 18 1 0 1 0 /* TxD1 */ - 0 19 1 0 1 0 /* TxD2 */ - 0 20 1 0 1 0 /* TxD3 */ - 0 23 2 0 1 0 /* RxD0 */ - 0 24 2 0 1 0 /* RxD1 */ - 0 25 2 0 1 0 /* RxD2 */ - 0 26 2 0 1 0 /* RxD3 */ - 0 21 1 0 1 0 /* TX_EN */ - 0 22 1 0 1 0 /* TX_ER */ - 0 29 2 0 1 0 /* RX_DV */ - 0 30 2 0 1 0 /* RX_ER */ - 0 31 2 0 1 0 /* RX_CLK */ - 2 2 1 0 2 0 /* GTX_CLK - CLK3 */ - 2 3 2 0 1 0 /* GTX125 - CLK4 */ - >; - }; - - pio_ucc4: ucc_pin@3 { - reg = <3>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 1 14 1 0 1 0 /* TxD0 (PB14, out, f1) */ - 1 15 1 0 1 0 /* TxD1 (PB15, out, f1) */ - 1 20 2 0 1 0 /* RxD0 (PB20, in, f1) */ - 1 21 2 0 1 0 /* RxD1 (PB21, in, f1) */ - 1 18 1 0 1 0 /* TX_EN (PB18, out, f1) */ - 1 26 2 0 1 0 /* RX_DV (PB26, in, f1) */ - 1 27 2 0 1 0 /* RX_ER (PB27, in, f1) */ - - 2 16 2 0 1 0 /* UCC4_RMII_CLK (CLK17) */ - >; - }; - - pio_ucc5: ucc_pin@4 { - reg = <4>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 3 0 1 0 1 0 /* TxD0 (PD0, out, f1) */ - 3 1 1 0 1 0 /* TxD1 (PD1, out, f1) */ - 3 6 2 0 1 0 /* RxD0 (PD6, in, f1) */ - 3 7 2 0 1 0 /* RxD1 (PD7, in, f1) */ - 3 4 1 0 1 0 /* TX_EN (PD4, out, f1) */ - 3 12 2 0 1 0 /* RX_DV (PD12, in, f1) */ - 3 13 2 0 1 0 /* RX_ER (PD13, in, f1) */ - >; - }; - - pio_ucc6: ucc_pin@5 { - reg = <5>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 3 14 1 0 1 0 /* TxD0 (PD14, out, f1) */ - 3 15 1 0 1 0 /* TxD1 (PD15, out, f1) */ - 3 20 2 0 1 0 /* RxD0 (PD20, in, f1) */ - 3 21 2 0 1 0 /* RxD1 (PD21, in, f1) */ - 3 18 1 0 1 0 /* TX_EN (PD18, out, f1) */ - 3 26 2 0 1 0 /* RX_DV (PD26, in, f1) */ - 3 27 2 0 1 0 /* RX_ER (PD27, in, f1) */ - >; - }; - - pio_ucc7: ucc_pin@6 { - reg = <6>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 4 0 1 0 1 0 /* TxD0 (PE0, out, f1) */ - 4 1 1 0 1 0 /* TxD1 (PE1, out, f1) */ - 4 6 2 0 1 0 /* RxD0 (PE6, in, f1) */ - 4 7 2 0 1 0 /* RxD1 (PE7, in, f1) */ - 4 4 1 0 1 0 /* TX_EN (PE4, out, f1) */ - 4 12 2 0 1 0 /* RX_DV (PE12, in, f1) */ - 4 13 2 0 1 0 /* RX_ER (PE13, in, f1) */ - >; - }; - - pio_ucc8: ucc_pin@7 { - reg = <7>; - - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0 /* MDC */ - - 4 14 1 0 2 0 /* TxD0 (PE14, out, f2) */ - 4 15 1 0 1 0 /* TxD1 (PE15, out, f1) */ - 4 20 2 0 1 0 /* RxD0 (PE20, in, f1) */ - 4 21 2 0 1 0 /* RxD1 (PE21, in, f1) */ - 4 18 1 0 1 0 /* TX_EN (PE18, out, f1) */ - 4 26 2 0 1 0 /* RX_DV (PE26, in, f1) */ - 4 27 2 0 1 0 /* RX_ER (PE27, in, f1) */ - - 2 15 2 0 1 0 /* UCCx_RMII_CLK (CLK16) */ - >; - }; - - }; - - qe@100000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe"; - ranges = <0x0 0x100000 0x100000>; - reg = <0x100000 0x480>; - clock-frequency = <0>; /* Filled in by U-Boot */ - brg-frequency = <0>; /* Filled in by U-Boot */ - bus-frequency = <0>; /* Filled in by U-Boot */ - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x00010000 0x0000c000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0xc000>; - }; - }; - - /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */ - enet_estar1: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk9"; - phy-handle = <&phy_estar1>; - phy-connection-type = "rgmii-id"; - pio-handle = <&pio_ucc1>; - }; - - /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */ - enet_estar2: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk4"; - phy-handle = <&phy_estar2>; - phy-connection-type = "rgmii-id"; - pio-handle = <&pio_ucc2>; - }; - - /* Piggy2 (UCC4, MDIO 0x00, RMII) */ - enet_piggy2: ucc@3200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <4>; - reg = <0x3200 0x200>; - interrupts = <35>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk17"; - phy-handle = <&phy_piggy2>; - phy-connection-type = "rmii"; - pio-handle = <&pio_ucc4>; - }; - - /* Eth-1 (UCC5, MDIO 0x08, RMII) */ - enet_eth1: ucc@2400 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <5>; - reg = <0x2400 0x200>; - interrupts = <40>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - phy-handle = <&phy_eth1>; - phy-connection-type = "rmii"; - pio-handle = <&pio_ucc5>; - }; - - /* Eth-2 (UCC6, MDIO 0x09, RMII) */ - enet_eth2: ucc@3400 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <6>; - reg = <0x3400 0x200>; - interrupts = <41>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - phy-handle = <&phy_eth2>; - phy-connection-type = "rmii"; - pio-handle = <&pio_ucc6>; - }; - - /* Eth-3 (UCC7, MDIO 0x0a, RMII) */ - enet_eth3: ucc@2600 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <7>; - reg = <0x2600 0x200>; - interrupts = <42>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - phy-handle = <&phy_eth3>; - phy-connection-type = "rmii"; - pio-handle = <&pio_ucc7>; - }; - - /* Eth-4 (UCC8, MDIO 0x0b, RMII) */ - enet_eth4: ucc@3600 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <8>; - reg = <0x3600 0x200>; - interrupts = <43>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - phy-handle = <&phy_eth4>; - phy-connection-type = "rmii"; - pio-handle = <&pio_ucc8>; - }; - - mdio@3320 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3320 0x18>; - compatible = "fsl,ucc-mdio"; - - /* Piggy2 (UCC4, MDIO 0x00, RMII) */ - phy_piggy2: ethernet-phy@00 { - reg = <0x0>; - }; - - /* Eth-1 (UCC5, MDIO 0x08, RMII) */ - phy_eth1: ethernet-phy@08 { - reg = <0x08>; - }; - - /* Eth-2 (UCC6, MDIO 0x09, RMII) */ - phy_eth2: ethernet-phy@09 { - reg = <0x09>; - }; - - /* Eth-3 (UCC7, MDIO 0x0a, RMII) */ - phy_eth3: ethernet-phy@0a { - reg = <0x0a>; - }; - - /* Eth-4 (UCC8, MDIO 0x0b, RMII) */ - phy_eth4: ethernet-phy@0b { - reg = <0x0b>; - }; - - /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */ - phy_estar1: ethernet-phy@10 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x10>; - }; - - /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */ - phy_estar2: ethernet-phy@11 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x11>; - }; - }; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - big-endian; - interrupts = < - 32 0x8 - 33 0x8 - 34 0x8 - 35 0x8 - 40 0x8 - 41 0x8 - 42 0x8 - 43 0x8 - >; - interrupt-parent = <&ipic>; - }; - }; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xe0005000 0xd8>; - ranges = <0 0 0xf0000000 0x04000000 /* LB 0 */ - 1 0 0xe8000000 0x01000000 /* LB 1 */ - 3 0 0xa0000000 0x10000000>; /* LB 3 */ - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <2>; - partition@0 { /* 768KB */ - label = "u-boot"; - reg = <0 0xC0000>; - }; - partition@c0000 { /* 128KB */ - label = "env"; - reg = <0xC0000 0x20000>; - }; - partition@e0000 { /* 128KB */ - label = "envred"; - reg = <0xE0000 0x20000>; - }; - partition@100000 { /* 64512KB */ - label = "ubi0"; - reg = <0x100000 0x3F00000>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ksi8560.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ksi8560.dts deleted file mode 100644 index 296c572e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ksi8560.dts +++ /dev/null @@ -1,347 +0,0 @@ -/* - * Device Tree Source for Emerson KSI8560 - * - * Author: Alexandr Smirnov <asmirnov@ru.mvista.com> - * - * Based on mpc8560ads.dts - * - * 2008 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - */ - -/dts-v1/; - -/ { - model = "KSI8560"; - compatible = "emerson,KSI8560"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x8000>; /* L1, 32K */ - i-cache-size = <0x8000>; /* L1, 32K */ - timebase-frequency = <0>; /* From U-boot */ - bus-frequency = <0>; /* From U-boot */ - clock-frequency = <0>; /* From U-boot */ - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */ - }; - - soc@fdf00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x00000000 0xfdf00000 0x00100000>; - bus-frequency = <0>; /* Fixed by bootwrapper */ - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <0x12 0x2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <0x20>; /* 32 bytes */ - cache-size = <0x40000>; /* L2, 256K */ - interrupt-parent = <&mpic>; - interrupts = <0x10 0x2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - /* Mac address filled in by bootwrapper */ - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&PHY1>; - - mdio@520 { /* For TSECs */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - PHY2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - /* Mac address filled in by bootwrapper */ - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&PHY2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - #address-cells = <0>; - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <165000000>; /* 166MHz */ - }; - - CPMPIC: pic@90c00 { - #address-cells = <0>; - #interrupt-cells = <2>; - interrupt-controller; - interrupts = <0x2e 0x2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - serial@91a00 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a00 0x20 0x88000 0x100>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - current-speed = <0x1c200>; - interrupts = <0x28 0x8>; - interrupt-parent = <&CPMPIC>; - }; - - serial@91a20 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a20 0x20 0x88100 0x100>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - current-speed = <0x1c200>; - interrupts = <0x29 0x8>; - interrupt-parent = <&CPMPIC>; - }; - - mdio@90d00 { /* For FCCs */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,cpm2-mdio-bitbang"; - reg = <0x90d00 0x14>; - fsl,mdio-pin = <24>; - fsl,mdc-pin = <25>; - - PHY0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - }; - - enet2: ethernet@91300 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>; - /* Mac address filled in by bootwrapper */ - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x12000300>; - interrupts = <0x20 0x8>; - interrupt-parent = <&CPMPIC>; - phy-handle = <&PHY0>; - }; - }; - }; - - localbus@fdf05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8560-localbus", "simple-bus"; - reg = <0xfdf05000 0x68>; - - ranges = <0x0 0x0 0xe0000000 0x00800000 - 0x4 0x0 0xe8080000 0x00080000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <0x2>; - - partition@0 { - label = "Primary Kernel"; - reg = <0x0 0x180000>; - }; - partition@180000 { - label = "Primary Filesystem"; - reg = <0x180000 0x580000>; - }; - partition@700000 { - label = "Monitor"; - reg = <0x300000 0x100000>; - read-only; - }; - }; - - cpld@4,0 { - compatible = "emerson,KSI8560-cpld"; - reg = <0x4 0x0 0x80000>; - }; - }; - - - chosen { - linux,stdout-path = "/soc/cpm/serial@91a00"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHD.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHD.dts deleted file mode 100644 index 0a454515..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHD.dts +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Device Tree Souce for Buffalo KuroboxHD - * - * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHD, or use - * the default configuration linkstation_defconfig. - * - * Based on sandpoint.dts - * - * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de> - * Copyright 2008 Freescale Semiconductor, Inc. - * - * This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - -XXXX add flash parts, rtc, ?? - - */ - -/dts-v1/; - -/ { - model = "KuroboxHD"; - compatible = "linkstation"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,603e { /* Really 8241 */ - device_type = "cpu"; - reg = <0x0>; - clock-frequency = <200000000>; /* Fixed by bootloader */ - timebase-frequency = <24391680>; /* Fixed by bootloader */ - bus-frequency = <0>; /* Fixed by bootloader */ - /* Following required by dtc but not used */ - i-cache-size = <0x4000>; - d-cache-size = <0x4000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x4000000>; - }; - - soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "mpc10x"; - store-gathering = <0>; /* 0 == off, !0 == on */ - reg = <0x80000000 0x100000>; - ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */ - 0xfc000000 0xfc000000 0x100000 /* EUMB */ - 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */ - 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */ - 0xfef00000 0xfef00000 0x100000>; /* pci iack */ - - i2c@80003000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x80003000 0x1000>; - interrupts = <5 2>; - interrupt-parent = <&mpic>; - - rtc@32 { - compatible = "ricoh,rs5c372a"; - reg = <0x32>; - }; - }; - - serial0: serial@80004500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x80004500 0x8>; - clock-frequency = <97553800>; - current-speed = <9600>; - interrupts = <9 0>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@80004600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x80004600 0x8>; - clock-frequency = <97553800>; - current-speed = <57600>; - interrupts = <10 0>; - interrupt-parent = <&mpic>; - }; - - mpic: interrupt-controller@80040000 { - #interrupt-cells = <2>; - #address-cells = <0>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - interrupt-controller; - reg = <0x80040000 0x40000>; - }; - - pci0: pci@fec00000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "mpc10x-pci"; - reg = <0xfec00000 0x400000>; - ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000 - 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>; - bus-range = <0 255>; - clock-frequency = <133333333>; - interrupt-parent = <&mpic>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 11 - IRQ0 ETH */ - 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1 - /* IDSEL 12 - IRQ1 IDE0 */ - 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1 - /* IDSEL 14 - IRQ3 USB2.0 */ - 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHG.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHG.dts deleted file mode 100644 index 0e758b34..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/kuroboxHG.dts +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Device Tree Souce for Buffalo KuroboxHG - * - * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use - * the default configuration linkstation_defconfig. - * - * Based on sandpoint.dts - * - * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de> - * Copyright 2008 Freescale Semiconductor, Inc. - * - * This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - -XXXX add flash parts, rtc, ?? - - */ - -/dts-v1/; - -/ { - model = "KuroboxHG"; - compatible = "linkstation"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,603e { /* Really 8241 */ - device_type = "cpu"; - reg = <0x0>; - clock-frequency = <266000000>; /* Fixed by bootloader */ - timebase-frequency = <32522240>; /* Fixed by bootloader */ - bus-frequency = <0>; /* Fixed by bootloader */ - /* Following required by dtc but not used */ - i-cache-size = <0x4000>; - d-cache-size = <0x4000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; - }; - - soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "mpc10x"; - store-gathering = <0>; /* 0 == off, !0 == on */ - reg = <0x80000000 0x100000>; - ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */ - 0xfc000000 0xfc000000 0x100000 /* EUMB */ - 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */ - 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */ - 0xfef00000 0xfef00000 0x100000>; /* pci iack */ - - i2c@80003000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x80003000 0x1000>; - interrupts = <5 2>; - interrupt-parent = <&mpic>; - - rtc@32 { - compatible = "ricoh,rs5c372a"; - reg = <0x32>; - }; - }; - - serial0: serial@80004500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x80004500 0x8>; - clock-frequency = <130041000>; - current-speed = <9600>; - interrupts = <9 0>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@80004600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x80004600 0x8>; - clock-frequency = <130041000>; - current-speed = <57600>; - interrupts = <10 0>; - interrupt-parent = <&mpic>; - }; - - mpic: interrupt-controller@80040000 { - #interrupt-cells = <2>; - #address-cells = <0>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - interrupt-controller; - reg = <0x80040000 0x40000>; - }; - - pci0: pci@fec00000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "mpc10x-pci"; - reg = <0xfec00000 0x400000>; - ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000 - 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>; - bus-range = <0 255>; - clock-frequency = <133333333>; - interrupt-parent = <&mpic>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 11 - IRQ0 ETH */ - 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1 - /* IDSEL 12 - IRQ1 IDE0 */ - 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1 - /* IDSEL 14 - IRQ3 USB2.0 */ - 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200.dts deleted file mode 100644 index 179a1785..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200.dts +++ /dev/null @@ -1,308 +0,0 @@ -/* - * Lite5200 board Device Tree Source - * - * Copyright 2006-2007 Secret Lab Technologies Ltd. - * Grant Likely <grant.likely@secretlab.ca> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "fsl,lite5200"; - compatible = "fsl,lite5200"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&mpc5200_pic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,5200@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x04000000>; // 64MB - }; - - soc5200@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc5200-immr"; - ranges = <0 0xf0000000 0x0000c000>; - reg = <0xf0000000 0x00000100>; - bus-frequency = <0>; // from bootloader - system-frequency = <0>; // from bootloader - - cdm@200 { - compatible = "fsl,mpc5200-cdm"; - reg = <0x200 0x38>; - }; - - mpc5200_pic: interrupt-controller@500 { - // 5200 interrupts are encoded into two levels; - interrupt-controller; - #interrupt-cells = <3>; - compatible = "fsl,mpc5200-pic"; - reg = <0x500 0x80>; - }; - - timer@600 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x600 0x10>; - interrupts = <1 9 0>; - fsl,has-wdt; - }; - - timer@610 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x610 0x10>; - interrupts = <1 10 0>; - }; - - timer@620 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x620 0x10>; - interrupts = <1 11 0>; - }; - - timer@630 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x630 0x10>; - interrupts = <1 12 0>; - }; - - timer@640 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x640 0x10>; - interrupts = <1 13 0>; - }; - - timer@650 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x650 0x10>; - interrupts = <1 14 0>; - }; - - timer@660 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x660 0x10>; - interrupts = <1 15 0>; - }; - - timer@670 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x670 0x10>; - interrupts = <1 16 0>; - }; - - rtc@800 { // Real time clock - compatible = "fsl,mpc5200-rtc"; - reg = <0x800 0x100>; - interrupts = <1 5 0 1 6 0>; - }; - - can@900 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 17 0>; - reg = <0x900 0x80>; - }; - - can@980 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 18 0>; - reg = <0x980 0x80>; - }; - - gpio@b00 { - compatible = "fsl,mpc5200-gpio"; - reg = <0xb00 0x40>; - interrupts = <1 7 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpio@c00 { - compatible = "fsl,mpc5200-gpio-wkup"; - reg = <0xc00 0x40>; - interrupts = <1 8 0 0 3 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - spi@f00 { - compatible = "fsl,mpc5200-spi"; - reg = <0xf00 0x20>; - interrupts = <2 13 0 2 14 0>; - }; - - usb@1000 { - compatible = "fsl,mpc5200-ohci","ohci-be"; - reg = <0x1000 0xff>; - interrupts = <2 6 0>; - }; - - dma-controller@1200 { - compatible = "fsl,mpc5200-bestcomm"; - reg = <0x1200 0x80>; - interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 - 3 4 0 3 5 0 3 6 0 3 7 0 - 3 8 0 3 9 0 3 10 0 3 11 0 - 3 12 0 3 13 0 3 14 0 3 15 0>; - }; - - xlb@1f00 { - compatible = "fsl,mpc5200-xlb"; - reg = <0x1f00 0x100>; - }; - - serial@2000 { // PSC1 - compatible = "fsl,mpc5200-psc-uart"; - cell-index = <0>; - reg = <0x2000 0x100>; - interrupts = <2 1 0>; - }; - - // PSC2 in ac97 mode example - //ac97@2200 { // PSC2 - // compatible = "fsl,mpc5200-psc-ac97"; - // cell-index = <1>; - // reg = <0x2200 0x100>; - // interrupts = <2 2 0>; - //}; - - // PSC3 in CODEC mode example - //i2s@2400 { // PSC3 - // compatible = "fsl,mpc5200-psc-i2s"; - // cell-index = <2>; - // reg = <0x2400 0x100>; - // interrupts = <2 3 0>; - //}; - - // PSC4 in uart mode example - //serial@2600 { // PSC4 - // compatible = "fsl,mpc5200-psc-uart"; - // cell-index = <3>; - // reg = <0x2600 0x100>; - // interrupts = <2 11 0>; - //}; - - // PSC5 in uart mode example - //serial@2800 { // PSC5 - // compatible = "fsl,mpc5200-psc-uart"; - // cell-index = <4>; - // reg = <0x2800 0x100>; - // interrupts = <2 12 0>; - //}; - - // PSC6 in spi mode example - //spi@2c00 { // PSC6 - // compatible = "fsl,mpc5200-psc-spi"; - // cell-index = <5>; - // reg = <0x2c00 0x100>; - // interrupts = <2 4 0>; - //}; - - ethernet@3000 { - compatible = "fsl,mpc5200-fec"; - reg = <0x3000 0x400>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <2 5 0>; - phy-handle = <&phy0>; - }; - - mdio@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-mdio"; - reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts - interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. - - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - ata@3a00 { - compatible = "fsl,mpc5200-ata"; - reg = <0x3a00 0x100>; - interrupts = <2 7 0>; - }; - - i2c@3d00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d00 0x40>; - interrupts = <2 15 0>; - }; - - i2c@3d40 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d40 0x40>; - interrupts = <2 16 0>; - - eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200-pci"; - reg = <0xf0000d00 0x100>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 - 0xc000 0 0 2 &mpc5200_pic 0 0 3 - 0xc000 0 0 3 &mpc5200_pic 0 0 3 - 0xc000 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 - 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; - }; - - localbus { - compatible = "fsl,mpc5200-lpb","simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - - ranges = <0 0 0xff000000 0x01000000>; - - flash@0,0 { - compatible = "amd,am29lv652d", "cfi-flash"; - reg = <0 0 0x01000000>; - bank-width = <1>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200b.dts deleted file mode 100644 index fb288bb8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/lite5200b.dts +++ /dev/null @@ -1,146 +0,0 @@ -/* - * Lite5200B board Device Tree Source - * - * Copyright 2006-2007 Secret Lab Technologies Ltd. - * Grant Likely <grant.likely@secretlab.ca> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "fsl,lite5200b"; - compatible = "fsl,lite5200b"; - - memory { - reg = <0x00000000 0x10000000>; // 256MB - }; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - cell-index = <0>; - }; - - psc@2200 { // PSC2 - status = "disabled"; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - status = "disabled"; - }; - - psc@2c00 { // PSC6 - status = "disabled"; - }; - - // PSC2 in ac97 mode example - //ac97@2200 { // PSC2 - // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; - // cell-index = <1>; - //}; - - // PSC3 in CODEC mode example - //i2s@2400 { // PSC3 - // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible - // cell-index = <2>; - //}; - - // PSC6 in spi mode example - //spi@2c00 { // PSC6 - // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi"; - // cell-index = <5>; - //}; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - i2c@3d40 { - eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot - 0xc000 0 0 2 &mpc5200_pic 1 1 3 - 0xc000 0 0 3 &mpc5200_pic 1 2 3 - 0xc000 0 0 4 &mpc5200_pic 1 3 3 - - 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot - 0xc800 0 0 2 &mpc5200_pic 1 2 3 - 0xc800 0 0 3 &mpc5200_pic 1 3 3 - 0xc800 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 - 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; - }; - - localbus { - ranges = <0 0 0xfe000000 0x02000000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <1>; - #size-cells = <1>; - #address-cells = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "rootfs"; - reg = <0x00200000 0x01d00000>; - }; - partition@1f00000 { - label = "u-boot"; - reg = <0x01f00000 0x00060000>; - }; - partition@1f60000 { - label = "u-boot-env"; - reg = <0x01f60000 0x00020000>; - }; - partition@1f80000 { - label = "dtb"; - reg = <0x01f80000 0x00080000>; - }; - }; - }; - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/makalu.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/makalu.dts deleted file mode 100644 index 63d48b63..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/makalu.dts +++ /dev/null @@ -1,353 +0,0 @@ -/* - * Device Tree Source for AMCC Makalu (405EX) - * - * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "amcc,makalu"; - compatible = "amcc,makalu"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; /* 16 kB */ - d-cache-size = <16384>; /* 16 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic-405ex", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - plb { - compatible = "ibm,plb-405ex", "ibm,plb4"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; - dcr-reg = <0x010 0x002>; - interrupt-parent = <&UIC2>; - interrupts = <0x5 0x4 /* ECC DED Error */ - 0x6 0x4 /* ECC SEC Error */ >; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-405ex", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x80000000 0x80000000 0x10000000 - 0xef600000 0xef600000 0x00a00000 - 0xf0000000 0xf0000000 0x10000000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-405ex", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00200000>; - }; - partition@400000 { - label = "user"; - reg = <0x00400000 0x03b60000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1a 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600400 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@ef600500 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - - RGMII0: emac-rgmii@ef600b00 { - compatible = "ibm,rgmii-405ex", "ibm,rgmii"; - reg = <0xef600b00 0x00000104>; - has-mdio; - }; - - EMAC0: ethernet@ef600900 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600900 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x0000003f>; /* Start at 6 */ - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600a00 { - linux,network-index = <0x1>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 - /*Wake*/ 0x1 &UIC1 0x1f 0x4>; - reg = <0xef600a00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCIE0: pciex@0a0000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0xa0000000 0x20000000 /* Config space access */ - 0xef000000 0x00001000>; /* Registers */ - dcr-reg = <0x040 0x020>; - sdr-base = <0x400>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 - 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0x00 to 0x3f */ - bus-range = <0x0 0x3f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@0c0000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0xc0000000 0x20000000 /* Config space access */ - 0xef001000 0x00001000>; /* Registers */ - dcr-reg = <0x060 0x020>; - sdr-base = <0x440>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 - 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 0x40 to 0x7f */ - bus-range = <0x40 0x7f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/media5200.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/media5200.dts deleted file mode 100644 index 48d72f38..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/media5200.dts +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Freescale Media5200 board Device Tree Source - * - * Copyright 2009 Secret Lab Technologies Ltd. - * Grant Likely <grant.likely@secretlab.ca> - * Steven Cavanagh <scavanagh@secretlab.ca> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "fsl,media5200"; - compatible = "fsl,media5200"; - - aliases { - console = &console; - ethernet0 = ð0; - }; - - chosen { - linux,stdout-path = &console; - }; - - cpus { - PowerPC,5200@0 { - timebase-frequency = <33000000>; // 33 MHz, these were configured by U-Boot - bus-frequency = <132000000>; // 132 MHz - clock-frequency = <396000000>; // 396 MHz - }; - }; - - memory { - reg = <0x00000000 0x08000000>; // 128MB RAM - }; - - soc5200@f0000000 { - bus-frequency = <132000000>;// 132 MHz - - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - psc@2000 { // PSC1 - status = "disabled"; - }; - - psc@2200 { // PSC2 - status = "disabled"; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - status = "disabled"; - }; - - // PSC6 in uart mode - console: psc@2c00 { // PSC6 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - usb@1000 { - reg = <0x1000 0x100>; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &media5200_fpga 0 2 // 1st slot - 0xc000 0 0 2 &media5200_fpga 0 3 - 0xc000 0 0 3 &media5200_fpga 0 4 - 0xc000 0 0 4 &media5200_fpga 0 5 - - 0xc800 0 0 1 &media5200_fpga 0 3 // 2nd slot - 0xc800 0 0 2 &media5200_fpga 0 4 - 0xc800 0 0 3 &media5200_fpga 0 5 - 0xc800 0 0 4 &media5200_fpga 0 2 - - 0xd000 0 0 1 &media5200_fpga 0 4 // miniPCI - 0xd000 0 0 2 &media5200_fpga 0 5 - - 0xe000 0 0 1 &media5200_fpga 0 5 // CoralIP - >; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 - 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; - interrupt-parent = <&mpc5200_pic>; - }; - - localbus { - ranges = < 0 0 0xfc000000 0x02000000 - 1 0 0xfe000000 0x02000000 - 2 0 0xf0010000 0x00010000 - 3 0 0xf0020000 0x00010000 >; - flash@0,0 { - compatible = "amd,am29lv28ml", "cfi-flash"; - reg = <0 0x0 0x2000000>; // 32 MB - bank-width = <4>; // Width in bytes of the flash bank - device-width = <2>; // Two devices on each bank - }; - - flash@1,0 { - compatible = "amd,am29lv28ml", "cfi-flash"; - reg = <1 0 0x2000000>; // 32 MB - bank-width = <4>; // Width in bytes of the flash bank - device-width = <2>; // Two devices on each bank - }; - - media5200_fpga: fpga@2,0 { - compatible = "fsl,media5200-fpga"; - interrupt-controller; - #interrupt-cells = <2>; // 0:bank 1:id; no type field - reg = <2 0 0x10000>; - - interrupt-parent = <&mpc5200_pic>; - interrupts = <0 0 3 // IRQ bank 0 - 1 1 3>; // IRQ bank 1 - }; - - uart@3,0 { - compatible = "ti,tl16c752bpt"; - reg = <3 0 0x10000>; - interrupt-parent = <&media5200_fpga>; - interrupts = <0 0 0 1>; // 2 irqs - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mgcoge.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mgcoge.dts deleted file mode 100644 index ededaf5a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mgcoge.dts +++ /dev/null @@ -1,241 +0,0 @@ -/* - * Device Tree for the MGCOGE plattform from keymile - * - * Copyright 2008 DENX Software Engineering GmbH - * Heiko Schocher <hs@denx.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; -/ { - model = "MGCOGE"; - compatible = "keymile,km82xx"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = ð0; - serial0 = &smc2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8247@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; /* Filled in by U-Boot */ - clock-frequency = <0>; /* Filled in by U-Boot */ - bus-frequency = <0>; /* Filled in by U-Boot */ - }; - }; - - localbus@f0010100 { - compatible = "fsl,mpc8247-localbus", - "fsl,pq2-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xf0010100 0x40>; - - ranges = <0 0 0xfe000000 0x00400000 - 1 0 0x30000000 0x00010000 - 2 0 0x40000000 0x00010000 - 5 0 0x50000000 0x04000000 - >; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0x0 0x400000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <1>; - device-width = <1>; - partition@0 { - label = "u-boot"; - reg = <0x00000 0xC0000>; - }; - partition@1 { - label = "env"; - reg = <0xC0000 0x20000>; - }; - partition@2 { - label = "envred"; - reg = <0xE0000 0x20000>; - }; - partition@3 { - label = "free"; - reg = <0x100000 0x300000>; - }; - }; - - flash@5,0 { - compatible = "cfi-flash"; - reg = <5 0x00000000 0x02000000 - 5 0x02000000 0x02000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <2>; - partition@app { /* 64 MBytes */ - label = "ubi0"; - reg = <0x00000000 0x04000000>; - }; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0>; /* Filled in by U-Boot */ - }; - - soc@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus"; - ranges = <0x00000000 0xf0000000 0x00053000>; - - // Temporary until code stops depending on it. - device_type = "soc"; - - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - compatible = "fsl,mpc8247-cpm", "fsl,cpm2", - "simple-bus"; - reg = <0x119c0 0x30>; - ranges; - - muram { - compatible = "fsl,cpm-muram"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x80 0x1f80 0x9800 0x800>; - }; - }; - - brg@119f0 { - compatible = "fsl,mpc8247-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x119f0 0x10 0x115f0 0x10>; - }; - - /* Monitor port/SMC2 */ - smc2: serial@11a90 { - device_type = "serial"; - compatible = "fsl,mpc8247-smc-uart", - "fsl,cpm2-smc-uart"; - reg = <0x11a90 0x20 0x88fc 0x02>; - interrupts = <5 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x21200000>; - current-speed = <0>; /* Filled in by U-Boot */ - }; - - eth0: ethernet@11a60 { - device_type = "network"; - compatible = "fsl,mpc8247-scc-enet", - "fsl,cpm2-scc-enet"; - reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>; - local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ - interrupts = <43 8>; - interrupt-parent = <&PIC>; - linux,network-index = <0>; - fsl,cpm-command = <0xce00000>; - fixed-link = <0 0 10 0 0>; - }; - - i2c@11860 { - compatible = "fsl,mpc8272-i2c", - "fsl,cpm2-i2c"; - reg = <0x11860 0x20 0x8afc 0x2>; - interrupts = <1 8>; - interrupt-parent = <&PIC>; - fsl,cpm-command = <0x29600000>; - #address-cells = <1>; - #size-cells = <0>; - }; - - mdio@10d40 { - compatible = "fsl,cpm2-mdio-bitbang"; - reg = <0x10d00 0x14>; - #address-cells = <1>; - #size-cells = <0>; - fsl,mdio-pin = <12>; - fsl,mdc-pin = <13>; - - phy0: ethernet-phy@0 { - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - reg = <0x1>; - }; - }; - - /* FCC1 management to switch */ - ethernet@11300 { - device_type = "network"; - compatible = "fsl,cpm2-fcc-enet"; - reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>; - local-mac-address = [ 00 01 02 03 04 07 ]; - interrupts = <32 8>; - interrupt-parent = <&PIC>; - phy-handle = <&phy0>; - linux,network-index = <1>; - fsl,cpm-command = <0x12000300>; - }; - - /* FCC2 to redundant core unit over backplane */ - ethernet@11320 { - device_type = "network"; - compatible = "fsl,cpm2-fcc-enet"; - reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; - local-mac-address = [ 00 01 02 03 04 08 ]; - interrupts = <33 8>; - interrupt-parent = <&PIC>; - phy-handle = <&phy1>; - linux,network-index = <2>; - fsl,cpm-command = <0x16200300>; - }; - - usb@11b60 { - compatible = "fsl,mpc8272-cpm-usb"; - mode = "peripheral"; - reg = <0x11b60 0x40 0x8b00 0x100>; - interrupts = <11 8>; - interrupt-parent = <&PIC>; - usb-clock = <5>; - }; - }; - - cpm2_pio_c: gpio-controller@10d40 { - #gpio-cells = <2>; - compatible = "fsl,cpm2-pario-bank"; - reg = <0x10d40 0x14>; - gpio-controller; - }; - - PIC: interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x10c00 0x80>; - compatible = "fsl,mpc8247-pic", "fsl,pq2-pic"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/motionpro.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/motionpro.dts deleted file mode 100644 index 0b78e89a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/motionpro.dts +++ /dev/null @@ -1,140 +0,0 @@ -/* - * Motion-PRO board Device Tree Source - * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz <m8@semihalf.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "promess,motionpro"; - compatible = "promess,motionpro"; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - timer@660 { // Motion-PRO status LED - compatible = "promess,motionpro-led"; - label = "motionpro-statusled"; - blink-delay = <100>; // 100 msec - }; - - timer@670 { // Motion-PRO ready LED - compatible = "promess,motionpro-led"; - label = "motionpro-readyled"; - }; - - can@900 { - status = "disabled"; - }; - - psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - // PSC2 in spi master mode - psc@2200 { // PSC2 - compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi"; - cell-index = <1>; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2c00 { // PSC6 - status = "disabled"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@2 { - reg = <2>; - }; - }; - - i2c@3d00 { - status = "disabled"; - }; - - i2c@3d40 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - pci@f0000d00 { - status = "disabled"; - }; - - localbus { - ranges = <0 0 0xff000000 0x01000000 - 1 0 0x50000000 0x00010000 - 2 0 0x50010000 0x00010000 - 3 0 0x50020000 0x00010000>; - - // 8-bit DualPort SRAM on LocalPlus Bus CS1 - kollmorgen@1,0 { - compatible = "promess,motionpro-kollmorgen"; - reg = <1 0 0x10000>; - interrupts = <1 1 0>; - }; - - // 8-bit board CPLD on LocalPlus Bus CS2 - cpld@2,0 { - compatible = "promess,motionpro-cpld"; - reg = <2 0 0x10000>; - }; - - // 8-bit custom Anybus Module on LocalPlus Bus CS3 - anybus@3,0 { - compatible = "promess,motionpro-anybus"; - reg = <3 0 0x10000>; - }; - pro_module_general@3,0 { - compatible = "promess,pro_module_general"; - reg = <3 0 3>; - }; - pro_module_dio@3,800 { - compatible = "promess,pro_module_dio"; - reg = <3 0x800 2>; - }; - - // 16-bit flash device at LocalPlus Bus CS0 - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x01000000>; - bank-width = <2>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - }; - - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5121ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5121ads.dts deleted file mode 100644 index c9ef6bbe..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5121ads.dts +++ /dev/null @@ -1,419 +0,0 @@ -/* - * MPC5121E ADS Device Tree Source - * - * Copyright 2007,2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "mpc5121ads"; - compatible = "fsl,mpc5121ads"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - pci = &pci; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,5121@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <0x20>; // 32 bytes - i-cache-line-size = <0x20>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <49500000>;// 49.5 MHz (csb/4) - bus-frequency = <198000000>; // 198 MHz csb bus - clock-frequency = <396000000>; // 396 MHz ppc core - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - mbx@20000000 { - compatible = "fsl,mpc5121-mbx"; - reg = <0x20000000 0x4000>; - interrupts = <66 0x8>; - interrupt-parent = < &ipic >; - }; - - sram@30000000 { - compatible = "fsl,mpc5121-sram"; - reg = <0x30000000 0x20000>; // 128K at 0x30000000 - }; - - nfc@40000000 { - compatible = "fsl,mpc5121-nfc"; - reg = <0x40000000 0x100000>; // 1M at 0x40000000 - interrupts = <6 8>; - interrupt-parent = < &ipic >; - #address-cells = <1>; - #size-cells = <1>; - // ADS has two Hynix 512MB Nand flash chips in a single - // stacked package. - chips = <2>; - nand@0 { - label = "nand"; - reg = <0x00000000 0x40000000>; // 512MB + 512MB - }; - }; - - localbus@80000020 { - compatible = "fsl,mpc5121-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x80000020 0x40>; - - ranges = <0x0 0x0 0xfc000000 0x04000000 - 0x2 0x0 0x82000000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0x0 0x4000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <4>; - device-width = <2>; - protected@0 { - label = "protected"; - reg = <0x00000000 0x00040000>; // first sector is protected - read-only; - }; - filesystem@40000 { - label = "filesystem"; - reg = <0x00040000 0x03c00000>; // 60M for filesystem - }; - kernel@3c40000 { - label = "kernel"; - reg = <0x03c40000 0x00280000>; // 2.5M for kernel - }; - device-tree@3ec0000 { - label = "device-tree"; - reg = <0x03ec0000 0x00040000>; // one sector for device tree - }; - u-boot@3f00000 { - label = "u-boot"; - reg = <0x03f00000 0x00100000>; // 1M for u-boot - read-only; - }; - }; - - board-control@2,0 { - compatible = "fsl,mpc5121ads-cpld"; - reg = <0x2 0x0 0x8000>; - }; - - cpld_pic: pic@2,a { - compatible = "fsl,mpc5121ads-cpld-pic"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x2 0xa 0x5>; - interrupt-parent = < &ipic >; - // irq routing - // all irqs but touch screen are routed to irq0 (ipic 48) - // touch screen is statically routed to irq1 (ipic 17) - // so don't use it here - interrupts = <48 0x8>; - }; - }; - - soc@80000000 { - compatible = "fsl,mpc5121-immr"; - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - ranges = <0x0 0x80000000 0x400000>; - reg = <0x80000000 0x400000>; - bus-frequency = <66000000>; // 66 MHz ips bus - - - // IPIC - // interrupts cell = <intr #, sense> - // sense values match linux IORESOURCE_IRQ_* defines: - // sense == 8: Level, low assertion - // sense == 2: Edge, high-to-low change - // - ipic: interrupt-controller@c00 { - compatible = "fsl,mpc5121-ipic", "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0xc00 0x100>; - }; - - rtc@a00 { // Real time clock - compatible = "fsl,mpc5121-rtc"; - reg = <0xa00 0x100>; - interrupts = <79 0x8 80 0x8>; - interrupt-parent = < &ipic >; - }; - - reset@e00 { // Reset module - compatible = "fsl,mpc5121-reset"; - reg = <0xe00 0x100>; - }; - - clock@f00 { // Clock control - compatible = "fsl,mpc5121-clock"; - reg = <0xf00 0x100>; - }; - - pmc@1000{ //Power Management Controller - compatible = "fsl,mpc5121-pmc"; - reg = <0x1000 0x100>; - interrupts = <83 0x2>; - interrupt-parent = < &ipic >; - }; - - gpio@1100 { - compatible = "fsl,mpc5121-gpio"; - reg = <0x1100 0x100>; - interrupts = <78 0x8>; - interrupt-parent = < &ipic >; - }; - - can@1300 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <12 0x8>; - interrupt-parent = < &ipic >; - reg = <0x1300 0x80>; - }; - - can@1380 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <13 0x8>; - interrupt-parent = < &ipic >; - reg = <0x1380 0x80>; - }; - - i2c@1700 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c", "fsl-i2c"; - reg = <0x1700 0x20>; - interrupts = <9 0x8>; - interrupt-parent = < &ipic >; - fsl,preserve-clocking; - - hwmon@4a { - compatible = "adi,ad7414"; - reg = <0x4a>; - }; - - eeprom@50 { - compatible = "at,24c32"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "stm,m41t62"; - reg = <0x68>; - }; - }; - - i2c@1720 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c", "fsl-i2c"; - reg = <0x1720 0x20>; - interrupts = <10 0x8>; - interrupt-parent = < &ipic >; - }; - - i2c@1740 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c", "fsl-i2c"; - reg = <0x1740 0x20>; - interrupts = <11 0x8>; - interrupt-parent = < &ipic >; - }; - - i2ccontrol@1760 { - compatible = "fsl,mpc5121-i2c-ctrl"; - reg = <0x1760 0x8>; - }; - - axe@2000 { - compatible = "fsl,mpc5121-axe"; - reg = <0x2000 0x100>; - interrupts = <42 0x8>; - interrupt-parent = < &ipic >; - }; - - display@2100 { - compatible = "fsl,mpc5121-diu"; - reg = <0x2100 0x100>; - interrupts = <64 0x8>; - interrupt-parent = < &ipic >; - }; - - mdio@2800 { - compatible = "fsl,mpc5121-fec-mdio"; - reg = <0x2800 0x800>; - #address-cells = <1>; - #size-cells = <0>; - phy: ethernet-phy@0 { - reg = <1>; - device_type = "ethernet-phy"; - }; - }; - - ethernet@2800 { - device_type = "network"; - compatible = "fsl,mpc5121-fec"; - reg = <0x2800 0x800>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <4 0x8>; - interrupt-parent = < &ipic >; - phy-handle = < &phy >; - fsl,align-tx-packets = <4>; - }; - - // 5121e has two dr usb modules - // mpc5121_ads only uses USB0 - - // USB1 using external ULPI PHY - //usb@3000 { - // compatible = "fsl,mpc5121-usb2-dr"; - // reg = <0x3000 0x1000>; - // #address-cells = <1>; - // #size-cells = <0>; - // interrupt-parent = < &ipic >; - // interrupts = <43 0x8>; - // dr_mode = "otg"; - // phy_type = "ulpi"; - //}; - - // USB0 using internal UTMI PHY - usb@4000 { - compatible = "fsl,mpc5121-usb2-dr"; - reg = <0x4000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = < &ipic >; - interrupts = <44 0x8>; - dr_mode = "otg"; - phy_type = "utmi_wide"; - fsl,invert-drvvbus; - fsl,invert-pwr-fault; - }; - - // IO control - ioctl@a000 { - compatible = "fsl,mpc5121-ioctl"; - reg = <0xA000 0x1000>; - }; - - pata@10200 { - compatible = "fsl,mpc5121-pata"; - reg = <0x10200 0x100>; - interrupts = <5 0x8>; - interrupt-parent = < &ipic >; - }; - - // 512x PSCs are not 52xx PSC compatible - // PSC3 serial port A aka ttyPSC0 - serial@11300 { - device_type = "serial"; - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - // Logical port assignment needed until driver - // learns to use aliases - port-number = <0>; - cell-index = <3>; - reg = <0x11300 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; - rx-fifo-size = <16>; - tx-fifo-size = <16>; - }; - - // PSC4 serial port B aka ttyPSC1 - serial@11400 { - device_type = "serial"; - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - // Logical port assignment needed until driver - // learns to use aliases - port-number = <1>; - cell-index = <4>; - reg = <0x11400 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; - rx-fifo-size = <16>; - tx-fifo-size = <16>; - }; - - // PSC5 in ac97 mode - ac97@11500 { - compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc"; - cell-index = <5>; - reg = <0x11500 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; - fsl,mode = "ac97-slave"; - rx-fifo-size = <384>; - tx-fifo-size = <384>; - }; - - pscfifo@11f00 { - compatible = "fsl,mpc5121-psc-fifo"; - reg = <0x11f00 0x100>; - interrupts = <40 0x8>; - interrupt-parent = < &ipic >; - }; - - dma@14000 { - compatible = "fsl,mpc5121-dma"; - reg = <0x14000 0x1800>; - interrupts = <65 0x8>; - interrupt-parent = < &ipic >; - }; - - }; - - pci: pci@80008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - // IDSEL 0x15 - Slot 1 PCI - 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8 - 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8 - 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8 - 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8 - - // IDSEL 0x16 - Slot 2 MiniPCI - 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8 - 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8 - - // IDSEL 0x17 - Slot 3 MiniPCI - 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8 - 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8 - >; - interrupt-parent = < &ipic >; - interrupts = <1 0x8>; - bus-range = <0 0>; - ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x80008500 0x100 /* internal registers */ - 0x80008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc5121-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5200b.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5200b.dtsi deleted file mode 100644 index 7ab286ab..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc5200b.dtsi +++ /dev/null @@ -1,277 +0,0 @@ -/* - * base MPC5200b Device Tree Source - * - * Copyright (C) 2010 SecretLab - * Grant Likely <grant@secretlab.ca> - * John Bonesio <bones@secretlab.ca> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc5200b"; - compatible = "fsl,mpc5200b"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&mpc5200_pic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - powerpc: PowerPC,5200@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory: memory { - device_type = "memory"; - reg = <0x00000000 0x04000000>; // 64MB - }; - - soc: soc5200@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc5200b-immr"; - ranges = <0 0xf0000000 0x0000c000>; - reg = <0xf0000000 0x00000100>; - bus-frequency = <0>; // from bootloader - system-frequency = <0>; // from bootloader - - cdm@200 { - compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm"; - reg = <0x200 0x38>; - }; - - mpc5200_pic: interrupt-controller@500 { - // 5200 interrupts are encoded into two levels; - interrupt-controller; - #interrupt-cells = <3>; - compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic"; - reg = <0x500 0x80>; - }; - - timer@600 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x600 0x10>; - interrupts = <1 9 0>; - }; - - timer@610 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x610 0x10>; - interrupts = <1 10 0>; - }; - - timer@620 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x620 0x10>; - interrupts = <1 11 0>; - }; - - timer@630 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x630 0x10>; - interrupts = <1 12 0>; - }; - - timer@640 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x640 0x10>; - interrupts = <1 13 0>; - }; - - timer@650 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x650 0x10>; - interrupts = <1 14 0>; - }; - - timer@660 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x660 0x10>; - interrupts = <1 15 0>; - }; - - timer@670 { // General Purpose Timer - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x670 0x10>; - interrupts = <1 16 0>; - }; - - rtc@800 { // Real time clock - compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; - reg = <0x800 0x100>; - interrupts = <1 5 0 1 6 0>; - }; - - can@900 { - compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; - interrupts = <2 17 0>; - reg = <0x900 0x80>; - }; - - can@980 { - compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan"; - interrupts = <2 18 0>; - reg = <0x980 0x80>; - }; - - gpio_simple: gpio@b00 { - compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; - reg = <0xb00 0x40>; - interrupts = <1 7 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpio_wkup: gpio@c00 { - compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup"; - reg = <0xc00 0x40>; - interrupts = <1 8 0 0 3 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - spi@f00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; - reg = <0xf00 0x20>; - interrupts = <2 13 0 2 14 0>; - }; - - usb: usb@1000 { - compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; - reg = <0x1000 0xff>; - interrupts = <2 6 0>; - }; - - dma-controller@1200 { - compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; - reg = <0x1200 0x80>; - interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 - 3 4 0 3 5 0 3 6 0 3 7 0 - 3 8 0 3 9 0 3 10 0 3 11 0 - 3 12 0 3 13 0 3 14 0 3 15 0>; - }; - - xlb@1f00 { - compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb"; - reg = <0x1f00 0x100>; - }; - - psc1: psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2000 0x100>; - interrupts = <2 1 0>; - }; - - psc2: psc@2200 { // PSC2 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2200 0x100>; - interrupts = <2 2 0>; - }; - - psc3: psc@2400 { // PSC3 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2400 0x100>; - interrupts = <2 3 0>; - }; - - psc4: psc@2600 { // PSC4 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2600 0x100>; - interrupts = <2 11 0>; - }; - - psc5: psc@2800 { // PSC5 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2800 0x100>; - interrupts = <2 12 0>; - }; - - psc6: psc@2c00 { // PSC6 - compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc"; - reg = <0x2c00 0x100>; - interrupts = <2 4 0>; - }; - - eth0: ethernet@3000 { - compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; - reg = <0x3000 0x400>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <2 5 0>; - }; - - mdio@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; - reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts - interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. - }; - - ata@3a00 { - compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; - reg = <0x3a00 0x100>; - interrupts = <2 7 0>; - }; - - i2c@3d00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d00 0x40>; - interrupts = <2 15 0>; - }; - - i2c@3d40 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d40 0x40>; - interrupts = <2 16 0>; - }; - - sram@8000 { - compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - pci: pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; - reg = <0xf0000d00 0x100>; - // interrupt-map-mask = need to add - // interrupt-map = need to add - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - // ranges = need to add - }; - - localbus: localbus { - compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0xfc000000 0x2000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc7448hpc2.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc7448hpc2.dts deleted file mode 100644 index 2544f3ec..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc7448hpc2.dts +++ /dev/null @@ -1,197 +0,0 @@ -/* - * MPC7448HPC2 (Taiga) board Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * 2006 Roy Zang <Roy Zang at freescale.com>. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "mpc7448hpc2"; - compatible = "mpc74xx"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - - serial0 = &serial0; - serial1 = &serial1; - - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells =<0>; - - PowerPC,7448@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K bytes - i-cache-size = <0x8000>; // L1, 32K bytes - timebase-frequency = <0>; // 33 MHz, from uboot - clock-frequency = <0>; // From U-Boot - bus-frequency = <0>; // From U-Boot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x20000000 // DDR2 512M at 0 - >; - }; - - tsi108@c0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "tsi-bridge"; - ranges = <0x0 0xc0000000 0x10000>; - reg = <0xc0000000 0x10000>; - bus-frequency = <0>; - - i2c@7000 { - interrupt-parent = <&mpic>; - interrupts = <14 0>; - reg = <0x7000 0x400>; - device_type = "i2c"; - compatible = "tsi108-i2c"; - }; - - MDIO: mdio@6000 { - device_type = "mdio"; - compatible = "tsi108-mdio"; - reg = <0x6000 0x50>; - #address-cells = <1>; - #size-cells = <0>; - - phy8: ethernet-phy@8 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x8>; - }; - - phy9: ethernet-phy@9 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x9>; - }; - - }; - - enet0: ethernet@6200 { - linux,network-index = <0>; - #size-cells = <0>; - device_type = "network"; - compatible = "tsi108-ethernet"; - reg = <0x6000 0x200>; - address = [ 00 06 D2 00 00 01 ]; - interrupts = <16 2>; - interrupt-parent = <&mpic>; - mdio-handle = <&MDIO>; - phy-handle = <&phy8>; - }; - - enet1: ethernet@6600 { - linux,network-index = <1>; - #address-cells = <1>; - #size-cells = <0>; - device_type = "network"; - compatible = "tsi108-ethernet"; - reg = <0x6400 0x200>; - address = [ 00 06 D2 00 00 02 ]; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - mdio-handle = <&MDIO>; - phy-handle = <&phy9>; - }; - - serial0: serial@7808 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x7808 0x200>; - clock-frequency = <1064000000>; - interrupts = <12 0>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@7c08 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x7c08 0x200>; - clock-frequency = <1064000000>; - interrupts = <13 0>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@7400 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x7400 0x400>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - pci0: pci@1000 { - compatible = "tsi108-pci"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x1000 0x1000>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000 - 0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>; - clock-frequency = <133333332>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 - 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 - 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 - 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 - - /* IDSEL 0x12 */ - 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 - 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 - 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 - 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 - - /* IDSEL 0x13 */ - 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 - 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 - 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 - 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 - - /* IDSEL 0x14 */ - 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 - 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 - 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 - 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 - >; - - RT0: router@1180 { - clock-frequency = <0>; - interrupt-controller; - device_type = "pic-router"; - #address-cells = <0>; - #interrupt-cells = <2>; - big-endian; - interrupts = <23 2>; - interrupt-parent = <&mpic>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8272ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8272ads.dts deleted file mode 100644 index e802ebd8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8272ads.dts +++ /dev/null @@ -1,270 +0,0 @@ -/* - * MPC8272 ADS Device Tree Source - * - * Copyright 2005,2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8272ADS"; - compatible = "fsl,mpc8272ads"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = ð0; - ethernet1 = ð1; - serial0 = &scc1; - serial1 = &scc4; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8272@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; - }; - - localbus@f0010100 { - compatible = "fsl,mpc8272-localbus", - "fsl,pq2-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xf0010100 0x40>; - - ranges = <0x0 0x0 0xff800000 0x00800000 - 0x1 0x0 0xf4500000 0x8000 - 0x3 0x0 0xf8200000 0x8000>; - - flash@0,0 { - compatible = "jedec-flash"; - reg = <0x0 0x0 0x00800000>; - bank-width = <4>; - device-width = <1>; - }; - - board-control@1,0 { - reg = <0x1 0x0 0x20>; - compatible = "fsl,mpc8272ads-bcsr"; - }; - - PCI_PIC: interrupt-controller@3,0 { - compatible = "fsl,mpc8272ads-pci-pic", - "fsl,pq2ads-pci-pic"; - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x3 0x0 0x8>; - interrupt-parent = <&PIC>; - interrupts = <20 8>; - }; - }; - - - pci@f0010800 { - device_type = "pci"; - reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>; - compatible = "fsl,mpc8272-pci", "fsl,pq2-pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &PCI_PIC 0 - 0xb000 0x0 0x0 0x2 &PCI_PIC 1 - 0xb000 0x0 0x0 0x3 &PCI_PIC 2 - 0xb000 0x0 0x0 0x4 &PCI_PIC 3 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &PCI_PIC 4 - 0xb800 0x0 0x0 0x2 &PCI_PIC 5 - 0xb800 0x0 0x0 0x3 &PCI_PIC 6 - 0xb800 0x0 0x0 0x4 &PCI_PIC 7 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &PCI_PIC 8 - 0xc000 0x0 0x0 0x2 &PCI_PIC 9 - 0xc000 0x0 0x0 0x3 &PCI_PIC 10 - 0xc000 0x0 0x0 0x4 &PCI_PIC 11>; - - interrupt-parent = <&PIC>; - interrupts = <18 8>; - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>; - }; - - soc@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8272", "fsl,pq2-soc"; - ranges = <0x0 0xf0000000 0x53000>; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xf0000000 0x53000>; - - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; - reg = <0x119c0 0x30>; - ranges; - - muram@0 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9800 0x800>; - }; - }; - - brg@119f0 { - compatible = "fsl,mpc8272-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x119f0 0x10 0x115f0 0x10>; - }; - - scc1: serial@11a00 { - device_type = "serial"; - compatible = "fsl,mpc8272-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a00 0x20 0x8000 0x100>; - interrupts = <40 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - }; - - scc4: serial@11a60 { - device_type = "serial"; - compatible = "fsl,mpc8272-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a60 0x20 0x8300 0x100>; - interrupts = <43 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <4>; - fsl,cpm-command = <0xce00000>; - }; - - usb@11b60 { - compatible = "fsl,mpc8272-cpm-usb"; - reg = <0x11b60 0x40 0x8b00 0x100>; - interrupts = <11 8>; - interrupt-parent = <&PIC>; - mode = "peripheral"; - }; - - mdio@10d40 { - device_type = "mdio"; - compatible = "fsl,mpc8272ads-mdio-bitbang", - "fsl,mpc8272-mdio-bitbang", - "fsl,cpm2-mdio-bitbang"; - reg = <0x10d40 0x14>; - #address-cells = <1>; - #size-cells = <0>; - fsl,mdio-pin = <18>; - fsl,mdc-pin = <19>; - - PHY0: ethernet-phy@0 { - interrupt-parent = <&PIC>; - interrupts = <23 8>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&PIC>; - interrupts = <23 8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - }; - - eth0: ethernet@11300 { - device_type = "network"; - compatible = "fsl,mpc8272-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - fsl,cpm-command = <0x12000300>; - }; - - eth1: ethernet@11320 { - device_type = "network"; - compatible = "fsl,mpc8272-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <33 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - fsl,cpm-command = <0x16200300>; - }; - - i2c@11860 { - compatible = "fsl,mpc8272-i2c", - "fsl,cpm2-i2c"; - reg = <0x11860 0x20 0x8afc 0x2>; - interrupts = <1 8>; - interrupt-parent = <&PIC>; - fsl,cpm-command = <0x29600000>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - PIC: interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x10c00 0x80>; - compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic"; - }; - - crypto@30000 { - compatible = "fsl,sec1.0"; - reg = <0x40000 0x13000>; - interrupts = <47 0x8>; - interrupt-parent = <&PIC>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x1010415>; - }; - }; - - chosen { - linux,stdout-path = "/soc/cpm/serial@11a00"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308_p1m.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308_p1m.dts deleted file mode 100644 index 22b0832b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308_p1m.dts +++ /dev/null @@ -1,340 +0,0 @@ -/* - * mpc8308_p1m Device Tree Source - * - * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "denx,mpc8308_p1m"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8308@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; // 128MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - ranges = <0x0 0x0 0xfc000000 0x04000000 - 0x1 0x0 0xfbff0000 0x00008000 - 0x2 0x0 0xfbff8000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x4000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x60000>; - read-only; - }; - env@60000 { - reg = <0x60000 0x20000>; - }; - env1@80000 { - reg = <0x80000 0x20000>; - }; - kernel@a0000 { - reg = <0xa0000 0x200000>; - }; - dtb@2a0000 { - reg = <0x2a0000 0x20000>; - }; - ramdisk@2c0000 { - reg = <0x2c0000 0x640000>; - }; - user@700000 { - reg = <0x700000 0x3900000>; - }; - }; - - can@1,0 { - compatible = "nxp,sja1000"; - reg = <0x1 0x0 0x80>; - interrupts = <18 0x8>; - interrups-parent = <&ipic>; - }; - - cpld@2,0 { - compatible = "denx,mpc8308_p1m-cpld"; - reg = <0x2 0x0 0x8>; - interrupts = <48 0x8>; - interrups-parent = <&ipic>; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8308-immr", "simple-bus"; - ranges = <0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - fram@50 { - compatible = "ramtron,24c64"; - reg = <0x50>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - pwm@28 { - compatible = "maxim,ds1050"; - reg = <0x28>; - }; - sensor@48 { - compatible = "maxim,max6625"; - reg = <0x48>; - }; - sensor@49 { - compatible = "maxim,max6625"; - reg = <0x49>; - }; - sensor@4b { - compatible = "maxim,max6625"; - reg = <0x4b>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "peripheral"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x24000 0x1000>; - - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - phy-handle = < &phy1 >; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <19 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - phy-handle = < &phy2 >; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <133333333>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <133333333>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - gpio@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x18>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - timer@500 { - compatible = "fsl,mpc8308-gtm", "fsl,gtm"; - reg = <0x500 0x100>; - interrupts = <90 8 78 8 84 8 72 8>; - interrupt-parent = <&ipic>; - clock-frequency = <133333333>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - ipic-msi@7c0 { - compatible = "fsl,ipic-msi"; - reg = <0x7c0 0x40>; - msi-available-ranges = <0x0 0x100>; - interrupts = < 0x43 0x8 - 0x4 0x8 - 0x51 0x8 - 0x52 0x8 - 0x56 0x8 - 0x57 0x8 - 0x58 0x8 - 0x59 0x8 >; - interrupt-parent = < &ipic >; - }; - - dma@2c000 { - compatible = "fsl,mpc8308-dma", "fsl,mpc5121-dma"; - reg = <0x2c000 0x1800>; - interrupts = <3 0x8 - 94 0x8>; - interrupt-parent = < &ipic >; - }; - - }; - - pci0: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000 - 0xb0000000 0x01000000>; - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; - bus-range = <0 0>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &ipic 1 8>; - interrupts = <0x1 0x8>; - interrupt-parent = <&ipic>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308rdb.dts deleted file mode 100644 index f66d10d9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8308rdb.dts +++ /dev/null @@ -1,311 +0,0 @@ -/* - * MPC8308RDB Device Tree Source - * - * Copyright 2009 Freescale Semiconductor Inc. - * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8308rdb"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8308@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; // 128MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe0600000 0x00002000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x60000>; - read-only; - }; - env@60000 { - reg = <0x60000 0x10000>; - }; - env1@70000 { - reg = <0x70000 0x10000>; - }; - kernel@80000 { - reg = <0x80000 0x200000>; - }; - dtb@280000 { - reg = <0x280000 0x10000>; - }; - ramdisk@290000 { - reg = <0x290000 0x570000>; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8315-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x2000>; - - jffs2@0 { - reg = <0x0 0x2000000>; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8308-immr", "simple-bus"; - ranges = <0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "peripheral"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x24000 0x1000>; - - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = < &tbi0 >; - phy-handle = < &phy2 >; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = < &tbi1 >; - /* Vitesse 7385 isn't on the MDIO bus */ - fixed-link = <1 1 1000 0 0>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <133333333>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <133333333>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - gpio@c00 { - #gpio-cells = <2>; - device_type = "gpio"; - compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x18>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - ipic-msi@7c0 { - compatible = "fsl,ipic-msi"; - reg = <0x7c0 0x40>; - msi-available-ranges = <0x0 0x100>; - interrupts = < 0x43 0x8 - 0x4 0x8 - 0x51 0x8 - 0x52 0x8 - 0x56 0x8 - 0x57 0x8 - 0x58 0x8 - 0x59 0x8 >; - interrupt-parent = < &ipic >; - }; - - dma@2c000 { - compatible = "fsl,mpc8308-dma", "fsl,mpc5121-dma"; - reg = <0x2c000 0x1800>; - interrupts = <3 0x8 - 94 0x8>; - interrupt-parent = < &ipic >; - }; - - }; - - pci0: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000 - 0xb0000000 0x01000000>; - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; - bus-range = <0 0>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - interrupts = <0x1 0x8>; - interrupt-parent = <&ipic>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8313erdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8313erdb.dts deleted file mode 100644 index 1c836c6c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8313erdb.dts +++ /dev/null @@ -1,410 +0,0 @@ -/* - * MPC8313E RDB Device Tree Source - * - * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8313ERDB"; - compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8313@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; // 128MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe2800000 0x00008000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8313-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x2000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc8313@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x03000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <1>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x4c>; - fsl,descriptor-types-mask = <0x0122003f>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "utmi_wide"; - sleep = <&pmc 0x00300000>; - }; - - ptp_clock@24E00 { - compatible = "fsl,etsec-ptp"; - reg = <0x24E00 0xB0>; - interrupts = <12 0x8 13 0x8>; - interrupt-parent = < &ipic >; - fsl,tclk-period = <10>; - fsl,tmr-prsc = <100>; - fsl,tmr-add = <0x999999A4>; - fsl,tmr-fiper1 = <0x3B9AC9F6>; - fsl,tmr-fiper2 = <0x00018696>; - fsl,max-adj = <659999998>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - sleep = <&pmc 0x20000000>; - ranges = <0x0 0x24000 0x1000>; - - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 0x8 36 0x8 35 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = < &tbi0 >; - /* Vitesse 7385 isn't on the MDIO bus */ - fixed-link = <1 1 1000 0 0>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - phy4: ethernet-phy@4 { - interrupt-parent = <&ipic>; - interrupts = <20 0x8>; - reg = <0x4>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <34 0x8 33 0x8 32 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = < &tbi1 >; - phy-handle = < &phy4 >; - sleep = <&pmc 0x10000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 8>; - interrupt-parent = <&ipic>; - fsl,mpc8313-wakeup-timer = <>m1>; - - /* Remove this (or change to "okay") if you have - * a REVA3 or later board, if you apply one of the - * workarounds listed in section 8.5 of the board - * manual, or if you are adapting this device tree - * to a different board. - */ - status = "fail"; - }; - - gtm1: timer@500 { - compatible = "fsl,mpc8313-gtm", "fsl,gtm"; - reg = <0x500 0x100>; - interrupts = <90 8 78 8 84 8 72 8>; - interrupt-parent = <&ipic>; - }; - - timer@600 { - compatible = "fsl,mpc8313-gtm", "fsl,gtm"; - reg = <0x600 0x100>; - interrupts = <91 8 79 8 85 8 73 8>; - interrupt-parent = <&ipic>; - }; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x00010000>; - ranges; - - pci0: pci@e0008500 { - cell-index = <1>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0E -mini PCI */ - 0x7000 0x0 0x0 0x1 &ipic 18 0x8 - 0x7000 0x0 0x0 0x2 &ipic 18 0x8 - 0x7000 0x0 0x0 0x3 &ipic 18 0x8 - 0x7000 0x0 0x0 0x4 &ipic 18 0x8 - - /* IDSEL 0x0F - PCI slot */ - 0x7800 0x0 0x0 0x1 &ipic 17 0x8 - 0x7800 0x0 0x0 0x2 &ipic 18 0x8 - 0x7800 0x0 0x0 0x3 &ipic 17 0x8 - 0x7800 0x0 0x0 0x4 &ipic 18 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8313-dma", "fsl,elo-dma"; - reg = <0xe00082a8 4>; - ranges = <0 0xe0008100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - - dma-channel@0 { - compatible = "fsl,mpc8313-dma-channel", - "fsl,elo-dma-channel"; - reg = <0 0x28>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - }; - - dma-channel@80 { - compatible = "fsl,mpc8313-dma-channel", - "fsl,elo-dma-channel"; - reg = <0x80 0x28>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <1>; - }; - - dma-channel@100 { - compatible = "fsl,mpc8313-dma-channel", - "fsl,elo-dma-channel"; - reg = <0x100 0x28>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <2>; - }; - - dma-channel@180 { - compatible = "fsl,mpc8313-dma-channel", - "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <3>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8315erdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8315erdb.dts deleted file mode 100644 index 811848e9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8315erdb.dts +++ /dev/null @@ -1,480 +0,0 @@ -/* - * MPC8315E RDB Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8315erdb"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8315@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; // 128MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe0600000 0x00002000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8315-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x2000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8315-immr", "simple-bus"; - ranges = <0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - - mcu_pio: mcu@a { - #gpio-cells = <2>; - compatible = "fsl,mc9s08qg8-mpc8315erdb", - "fsl,mcu-mpc8349emitx"; - reg = <0x0a>; - gpio-controller; - }; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8315-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "utmi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = < &phy0 >; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&ipic>; - interrupts = <20 0x8>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <19 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = < &phy1 >; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <133333333>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <133333333>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", - "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", - "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x97c>; - fsl,descriptor-types-mask = <0x3a30abf>; - }; - - sata@18000 { - compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - cell-index = <1>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - }; - - sata@19000 { - compatible = "fsl,mpc8315-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - cell-index = <2>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - }; - - gtm1: timer@500 { - compatible = "fsl,mpc8315-gtm", "fsl,gtm"; - reg = <0x500 0x100>; - interrupts = <90 8 78 8 84 8 72 8>; - interrupt-parent = <&ipic>; - clock-frequency = <133333333>; - }; - - timer@600 { - compatible = "fsl,mpc8315-gtm", "fsl,gtm"; - reg = <0x600 0x100>; - interrupts = <91 8 79 8 85 8 73 8>; - interrupt-parent = <&ipic>; - clock-frequency = <133333333>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - ipic-msi@7c0 { - compatible = "fsl,ipic-msi"; - reg = <0x7c0 0x40>; - msi-available-ranges = <0 0x100>; - interrupts = <0x43 0x8 - 0x4 0x8 - 0x51 0x8 - 0x52 0x8 - 0x56 0x8 - 0x57 0x8 - 0x58 0x8 - 0x59 0x8>; - interrupt-parent = < &ipic >; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc", - "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 8>; - interrupt-parent = <&ipic>; - fsl,mpc8313-wakeup-timer = <>m1>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0E -mini PCI */ - 0x7000 0x0 0x0 0x1 &ipic 18 0x8 - 0x7000 0x0 0x0 0x2 &ipic 18 0x8 - 0x7000 0x0 0x0 0x3 &ipic 18 0x8 - 0x7000 0x0 0x0 0x4 &ipic 18 0x8 - - /* IDSEL 0x0F -mini PCI */ - 0x7800 0x0 0x0 0x1 &ipic 17 0x8 - 0x7800 0x0 0x0 0x2 &ipic 17 0x8 - 0x7800 0x0 0x0 0x3 &ipic 17 0x8 - 0x7800 0x0 0x0 0x4 &ipic 17 0x8 - - /* IDSEL 0x10 - PCI slot */ - 0x8000 0x0 0x0 0x1 &ipic 48 0x8 - 0x8000 0x0 0x0 0x2 &ipic 17 0x8 - 0x8000 0x0 0x0 0x3 &ipic 48 0x8 - 0x8000 0x0 0x0 0x4 &ipic 17 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x01000000 0 0x00000000 0xe0300000 0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc0000000 - 0x02000000 0 0xc0000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - leds { - compatible = "gpio-leds"; - - pwr { - gpios = <&mcu_pio 0 0>; - default-state = "on"; - }; - - hdd { - gpios = <&mcu_pio 1 0>; - linux,default-trigger = "ide-disk"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_mds.dts deleted file mode 100644 index da9c72dd..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_mds.dts +++ /dev/null @@ -1,441 +0,0 @@ -/* - * MPC8323E EMDS Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - - * To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do - * this: - * - * 1) On chip U61, lift (disconnect) pins 21 (TXD) and 22 (RXD) from the board. - * 2) Solder a wire from U61-21 to P19A-23. P19 is a grid of pins on the board - * next to the serial ports. - * 3) Solder a wire from U61-22 to P19K-22. - * - * Note that there's a typo in the schematic. The board labels the last column - * of pins "P19K", but in the schematic, that column is called "P19J". So if - * you're going by the schematic, the pin is called "P19J-K22". - */ - -/dts-v1/; - -/ { - model = "MPC8323EMDS"; - compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8323@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <16384>; // L1, 16K - i-cache-size = <16384>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x08000000>; - }; - - bcsr@f8000000 { - compatible = "fsl,mpc8323mds-bcsr"; - reg = <0xf8000000 0x8000>; - }; - - soc8323@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <132000000>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8323-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <1>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x4c>; - fsl,descriptor-types-mask = <0x0122003f>; - sleep = <&pmc 0x03000000>; - }; - - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - par_io@1400 { - reg = <0x1400 0x100>; - device_type = "par_io"; - num-ports = <7>; - - pio3: ucc_pin@03 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 3 4 3 0 2 0 /* MDIO */ - 3 5 1 0 2 0 /* MDC */ - 0 13 2 0 1 0 /* RX_CLK (CLK9) */ - 3 24 2 0 1 0 /* TX_CLK (CLK10) */ - 1 0 1 0 1 0 /* TxD0 */ - 1 1 1 0 1 0 /* TxD1 */ - 1 2 1 0 1 0 /* TxD2 */ - 1 3 1 0 1 0 /* TxD3 */ - 1 4 2 0 1 0 /* RxD0 */ - 1 5 2 0 1 0 /* RxD1 */ - 1 6 2 0 1 0 /* RxD2 */ - 1 7 2 0 1 0 /* RxD3 */ - 1 8 2 0 1 0 /* RX_ER */ - 1 9 1 0 1 0 /* TX_ER */ - 1 10 2 0 1 0 /* RX_DV */ - 1 11 2 0 1 0 /* COL */ - 1 12 1 0 1 0 /* TX_EN */ - 1 13 2 0 1 0>; /* CRS */ - }; - pio4: ucc_pin@04 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 3 31 2 0 1 0 /* RX_CLK (CLK7) */ - 3 6 2 0 1 0 /* TX_CLK (CLK8) */ - 1 18 1 0 1 0 /* TxD0 */ - 1 19 1 0 1 0 /* TxD1 */ - 1 20 1 0 1 0 /* TxD2 */ - 1 21 1 0 1 0 /* TxD3 */ - 1 22 2 0 1 0 /* RxD0 */ - 1 23 2 0 1 0 /* RxD1 */ - 1 24 2 0 1 0 /* RxD2 */ - 1 25 2 0 1 0 /* RxD3 */ - 1 26 2 0 1 0 /* RX_ER */ - 1 27 1 0 1 0 /* TX_ER */ - 1 28 2 0 1 0 /* RX_DV */ - 1 29 2 0 1 0 /* COL */ - 1 30 1 0 1 0 /* TX_EN */ - 1 31 2 0 1 0>; /* CRS */ - }; - pio5: ucc_pin@05 { - pio-map = < - /* - * open has - * port pin dir drain sel irq - */ - 2 0 1 0 2 0 /* TxD5 */ - 2 8 2 0 2 0 /* RxD5 */ - - 2 29 2 0 0 0 /* CTS5 */ - 2 31 1 0 2 0 /* RTS5 */ - - 2 24 2 0 0 0 /* CD */ - - >; - }; - - }; - }; - - qe@e0100000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - ranges = <0x0 0xe0100000 0x00100000>; - reg = <0xe0100000 0x480>; - brg-frequency = <0>; - bus-frequency = <198000000>; - fsl,qe-num-riscs = <1>; - fsl,qe-num-snums = <28>; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x00010000 0x00004000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x4000>; - }; - }; - - spi@4c0 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - interrupts = <2>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - spi@500 { - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - usb@6c0 { - compatible = "qe_udc"; - reg = <0x6c0 0x40 0x8b00 0x100>; - interrupts = <11>; - interrupt-parent = <&qeic>; - mode = "slave"; - }; - - enet0: ucc@2200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <3>; - reg = <0x2200 0x200>; - interrupts = <34>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk9"; - tx-clock-name = "clk10"; - phy-handle = <&phy3>; - pio-handle = <&pio3>; - }; - - enet1: ucc@3200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <4>; - reg = <0x3200 0x200>; - interrupts = <35>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk7"; - tx-clock-name = "clk8"; - phy-handle = <&phy4>; - pio-handle = <&pio4>; - }; - - ucc@2400 { - device_type = "serial"; - compatible = "ucc_uart"; - cell-index = <5>; /* The UCC number, 1-7*/ - port-number = <0>; /* Which ttyQEx device */ - soft-uart; /* We need Soft-UART */ - reg = <0x2400 0x200>; - interrupts = <40>; /* From Table 18-12 */ - interrupt-parent = < &qeic >; - /* - * For Soft-UART, we need to set TX to 1X, which - * means specifying separate clock sources. - */ - rx-clock-name = "brg5"; - tx-clock-name = "brg6"; - pio-handle = < &pio5 >; - }; - - - mdio@2320 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2320 0x18>; - compatible = "fsl,ucc-mdio"; - - phy3: ethernet-phy@03 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - phy4: ethernet-phy@04 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x4>; - device_type = "ethernet-phy"; - }; - }; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - big-endian; - interrupts = <32 0x8 33 0x8>; //high:32 low:33 - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x11 AD17 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 AD18 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 AD19 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 AD21*/ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 AD22*/ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 AD23*/ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 AD24*/ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xd0000000 0x0 0x00100000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - sleep = <&pmc 0x00010000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_rdb.dts deleted file mode 100644 index ff7b15b3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc832x_rdb.dts +++ /dev/null @@ -1,373 +0,0 @@ -/* - * MPC832x RDB Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8323ERDB"; - compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet1; - ethernet1 = &enet0; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8323@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <0x20>; // 32 bytes - i-cache-line-size = <0x20>; // 32 bytes - d-cache-size = <16384>; // L1, 16K - i-cache-size = <16384>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x04000000>; - }; - - soc8323@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8323-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <1>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x4c>; - fsl,descriptor-types-mask = <0x0122003f>; - sleep = <&pmc 0x03000000>; - }; - - ipic:pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - par_io@1400 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1400 0x100>; - ranges = <3 0x1448 0x18>; - compatible = "fsl,mpc8323-qe-pario"; - device_type = "par_io"; - num-ports = <7>; - - qe_pio_d: gpio-controller@1448 { - #gpio-cells = <2>; - compatible = "fsl,mpc8323-qe-pario-bank"; - reg = <3 0x18>; - gpio-controller; - }; - - ucc2pio:ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 3 4 3 0 2 0 /* MDIO */ - 3 5 1 0 2 0 /* MDC */ - 3 21 2 0 1 0 /* RX_CLK (CLK16) */ - 3 23 2 0 1 0 /* TX_CLK (CLK3) */ - 0 18 1 0 1 0 /* TxD0 */ - 0 19 1 0 1 0 /* TxD1 */ - 0 20 1 0 1 0 /* TxD2 */ - 0 21 1 0 1 0 /* TxD3 */ - 0 22 2 0 1 0 /* RxD0 */ - 0 23 2 0 1 0 /* RxD1 */ - 0 24 2 0 1 0 /* RxD2 */ - 0 25 2 0 1 0 /* RxD3 */ - 0 26 2 0 1 0 /* RX_ER */ - 0 27 1 0 1 0 /* TX_ER */ - 0 28 2 0 1 0 /* RX_DV */ - 0 29 2 0 1 0 /* COL */ - 0 30 1 0 1 0 /* TX_EN */ - 0 31 2 0 1 0>; /* CRS */ - }; - ucc3pio:ucc_pin@03 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 13 2 0 1 0 /* RX_CLK (CLK9) */ - 3 24 2 0 1 0 /* TX_CLK (CLK10) */ - 1 0 1 0 1 0 /* TxD0 */ - 1 1 1 0 1 0 /* TxD1 */ - 1 2 1 0 1 0 /* TxD2 */ - 1 3 1 0 1 0 /* TxD3 */ - 1 4 2 0 1 0 /* RxD0 */ - 1 5 2 0 1 0 /* RxD1 */ - 1 6 2 0 1 0 /* RxD2 */ - 1 7 2 0 1 0 /* RxD3 */ - 1 8 2 0 1 0 /* RX_ER */ - 1 9 1 0 1 0 /* TX_ER */ - 1 10 2 0 1 0 /* RX_DV */ - 1 11 2 0 1 0 /* COL */ - 1 12 1 0 1 0 /* TX_EN */ - 1 13 2 0 1 0>; /* CRS */ - }; - }; - }; - - qe@e0100000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - ranges = <0x0 0xe0100000 0x00100000>; - reg = <0xe0100000 0x480>; - brg-frequency = <0>; - bus-frequency = <198000000>; - fsl,qe-num-riscs = <1>; - fsl,qe-num-snums = <28>; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x00010000 0x00004000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0x4000>; - }; - }; - - spi@4c0 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - interrupts = <2>; - interrupt-parent = <&qeic>; - gpios = <&qe_pio_d 13 0>; - mode = "cpu-qe"; - - mmc-slot@0 { - compatible = "fsl,mpc8323rdb-mmc-slot", - "mmc-spi-slot"; - reg = <0>; - gpios = <&qe_pio_d 14 1 - &qe_pio_d 15 0>; - voltage-ranges = <3300 3300>; - spi-max-frequency = <50000000>; - }; - }; - - spi@500 { - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - enet0: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk16"; - tx-clock-name = "clk3"; - phy-handle = <&phy00>; - pio-handle = <&ucc2pio>; - }; - - enet1: ucc@2200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <3>; - reg = <0x2200 0x200>; - interrupts = <34>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk9"; - tx-clock-name = "clk10"; - phy-handle = <&phy04>; - pio-handle = <&ucc3pio>; - }; - - mdio@3120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3120 0x18>; - compatible = "fsl,ucc-mdio"; - - phy00:ethernet-phy@00 { - interrupt-parent = <&ipic>; - interrupts = <0>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy04:ethernet-phy@04 { - interrupt-parent = <&ipic>; - interrupts = <0>; - reg = <0x4>; - device_type = "ethernet-phy"; - }; - }; - - qeic:interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - big-endian; - interrupts = <32 0x8 33 0x8>; //high:32 low:33 - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x10 AD16 (USB) */ - 0x8000 0x0 0x0 0x1 &ipic 17 0x8 - - /* IDSEL 0x11 AD17 (Mini1)*/ - 0x8800 0x0 0x0 0x1 &ipic 18 0x8 - 0x8800 0x0 0x0 0x2 &ipic 19 0x8 - 0x8800 0x0 0x0 0x3 &ipic 20 0x8 - 0x8800 0x0 0x0 0x4 &ipic 48 0x8 - - /* IDSEL 0x12 AD18 (PCI/Mini2) */ - 0x9000 0x0 0x0 0x1 &ipic 19 0x8 - 0x9000 0x0 0x0 0x2 &ipic 20 0x8 - 0x9000 0x0 0x0 0x3 &ipic 48 0x8 - 0x9000 0x0 0x0 0x4 &ipic 17 0x8>; - - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x01000000 0x0 0xd0000000 0xd0000000 0x0 0x04000000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - sleep = <&pmc 0x00010000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitx.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitx.dts deleted file mode 100644 index 2608679d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitx.dts +++ /dev/null @@ -1,426 +0,0 @@ -/* - * MPC8349E-mITX Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8349EMITX"; - compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8349@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc8349@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; // from bootloader - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - gpio1: gpio-controller@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8349-gpio"; - reg = <0xc00 0x100>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - gpio2: gpio-controller@d00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8349-gpio"; - reg = <0xd00 0x100>; - interrupts = <75 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - eeprom: at24@50 { - compatible = "st-micro,24c256"; - reg = <0x50>; - }; - - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - interrupts = <18 0x8>; - interrupt-parent = <&ipic>; - }; - - pcf1: iexp@38 { - #gpio-cells = <2>; - compatible = "ti,pcf8574a"; - reg = <0x38>; - gpio-controller; - }; - - pcf2: iexp@39 { - #gpio-cells = <2>; - compatible = "ti,pcf8574a"; - reg = <0x39>; - gpio-controller; - }; - - spd: at24@51 { - compatible = "at24,spd"; - reg = <0x51>; - }; - - mcu_pio: mcu@a { - #gpio-cells = <2>; - compatible = "fsl,mc9s08qg8-mpc8349emitx", - "fsl,mcu-mpc8349emitx"; - reg = <0x0a>; - gpio-controller; - }; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@22000 { - compatible = "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <39 0x8>; - phy_type = "ulpi"; - port0; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "peripheral"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy1c>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - /* Vitesse 8201 */ - phy1c: ethernet-phy@1c { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x1c>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - /* Vitesse 7385 isn't on the MDIO bus */ - fixed-link = <1 1 1000 0 0>; - linux,network-index = <1>; - tbi-handle = <&tbi1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; // from bootloader - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; // from bootloader - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - gpio-leds { - compatible = "gpio-leds"; - - green { - label = "Green"; - gpios = <&pcf1 0 1>; - linux,default-trigger = "heartbeat"; - }; - - yellow { - label = "Yellow"; - gpios = <&pcf1 1 1>; - /* linux,default-trigger = "heartbeat"; */ - default-state = "on"; - }; - }; - - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x10 - SATA */ - 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */ - >; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pci@e0008600 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0E - MiniPCI Slot */ - 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */ - - /* IDSEL 0x0F - PCI Slot */ - 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */ - 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */ - >; - interrupt-parent = <&ipic>; - interrupts = <67 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008600 0x100 /* internal registers */ - 0xe0008380 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8349e-localbus", - "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xe0005000 0xd8>; - ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */ - 0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */ - 0x2 0x0 0xf9000000 0x200000 /* exp slot */ - 0x3 0x0 0xf0000000 0x210>; /* CF slot */ - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - flash@0,800000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x800000 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - pata@3,0 { - compatible = "fsl,mpc8349emitx-pata", "ata-generic"; - reg = <0x3 0x0 0x10 0x3 0x20c 0x4>; - reg-shift = <1>; - pio-mode = <6>; - interrupts = <23 0x8>; - interrupt-parent = <&ipic>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitxgp.dts deleted file mode 100644 index 6cd044d8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8349emitxgp.dts +++ /dev/null @@ -1,251 +0,0 @@ -/* - * MPC8349E-mITX-GP Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8349EMITXGP"; - compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8349@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc8349@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; // from bootloader - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - interrupts = <18 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "otg"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy1c>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - /* Vitesse 8201 */ - phy1c: ethernet-phy@1c { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x1c>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; // from bootloader - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; // from bootloader - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - }; - - pci0: pci@e0008600 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0F - PCI Slot */ - 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */ - 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */ - >; - interrupt-parent = <&ipic>; - interrupts = <67 0x8>; - bus-range = <0x1 0x1>; - ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008600 0x100 /* internal registers */ - 0xe0008380 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc834x_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc834x_mds.dts deleted file mode 100644 index 45528640..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc834x_mds.dts +++ /dev/null @@ -1,409 +0,0 @@ -/* - * MPC8349E MDS Device Tree Source - * - * Copyright 2005, 2006 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8349EMDS"; - compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8349@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - bcsr@e2400000 { - compatible = "fsl,mpc8349mds-bcsr"; - reg = <0xe2400000 0x8000>; - }; - - soc8349@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - /* phy type (ULPI or SERIAL) are only types supported for MPH */ - /* port = 0 or 1 */ - usb@22000 { - compatible = "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <39 0x8>; - phy_type = "ulpi"; - port0; - }; - /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "otg"; - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - linux,network-index = <1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pci@e0008600 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <67 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 - 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008600 0x100 /* internal registers */ - 0xe0008380 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_mds.dts deleted file mode 100644 index 81dd513d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_mds.dts +++ /dev/null @@ -1,487 +0,0 @@ -/* - * MPC8360E EMDS Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - - -/* -/memreserve/ 00000000 1000000; -*/ - -/dts-v1/; - -/ { - model = "MPC8360MDS"; - compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8360@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <66000000>; - bus-frequency = <264000000>; - clock-frequency = <528000000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xe0005000 0xd8>; - ranges = <0 0 0xfe000000 0x02000000 - 1 0 0xf8000000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x2000000>; - bank-width = <2>; - device-width = <1>; - }; - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr13: gpio-controller@d { - #gpio-cells = <2>; - compatible = "fsl,mpc8360mds-bcsr-gpio"; - reg = <0xd 1>; - gpio-controller; - }; - }; - }; - - soc8360@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <264000000>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <264000000>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <264000000>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - sleep = <&pmc 0x03000000>; - }; - - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - - par_io@1400 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0x1400 0x100>; - ranges = <0 0x1400 0x100>; - device_type = "par_io"; - num-ports = <7>; - - qe_pio_b: gpio-controller@18 { - #gpio-cells = <2>; - compatible = "fsl,mpc8360-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x18 0x18>; - gpio-controller; - }; - - pio1: ucc_pin@01 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 3 1 0 1 0 /* TxD0 */ - 0 4 1 0 1 0 /* TxD1 */ - 0 5 1 0 1 0 /* TxD2 */ - 0 6 1 0 1 0 /* TxD3 */ - 1 6 1 0 3 0 /* TxD4 */ - 1 7 1 0 1 0 /* TxD5 */ - 1 9 1 0 2 0 /* TxD6 */ - 1 10 1 0 2 0 /* TxD7 */ - 0 9 2 0 1 0 /* RxD0 */ - 0 10 2 0 1 0 /* RxD1 */ - 0 11 2 0 1 0 /* RxD2 */ - 0 12 2 0 1 0 /* RxD3 */ - 0 13 2 0 1 0 /* RxD4 */ - 1 1 2 0 2 0 /* RxD5 */ - 1 0 2 0 2 0 /* RxD6 */ - 1 4 2 0 2 0 /* RxD7 */ - 0 7 1 0 1 0 /* TX_EN */ - 0 8 1 0 1 0 /* TX_ER */ - 0 15 2 0 1 0 /* RX_DV */ - 0 16 2 0 1 0 /* RX_ER */ - 0 0 2 0 1 0 /* RX_CLK */ - 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ - 2 8 2 0 1 0>; /* GTX125 - CLK9 */ - }; - pio2: ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 17 1 0 1 0 /* TxD0 */ - 0 18 1 0 1 0 /* TxD1 */ - 0 19 1 0 1 0 /* TxD2 */ - 0 20 1 0 1 0 /* TxD3 */ - 1 2 1 0 1 0 /* TxD4 */ - 1 3 1 0 2 0 /* TxD5 */ - 1 5 1 0 3 0 /* TxD6 */ - 1 8 1 0 3 0 /* TxD7 */ - 0 23 2 0 1 0 /* RxD0 */ - 0 24 2 0 1 0 /* RxD1 */ - 0 25 2 0 1 0 /* RxD2 */ - 0 26 2 0 1 0 /* RxD3 */ - 0 27 2 0 1 0 /* RxD4 */ - 1 12 2 0 2 0 /* RxD5 */ - 1 13 2 0 3 0 /* RxD6 */ - 1 11 2 0 2 0 /* RxD7 */ - 0 21 1 0 1 0 /* TX_EN */ - 0 22 1 0 1 0 /* TX_ER */ - 0 29 2 0 1 0 /* RX_DV */ - 0 30 2 0 1 0 /* RX_ER */ - 0 31 2 0 1 0 /* RX_CLK */ - 2 2 1 0 2 0 /* GTX_CLK - CLK10 */ - 2 3 2 0 1 0 /* GTX125 - CLK4 */ - 0 1 3 0 2 0 /* MDIO */ - 0 2 1 0 1 0>; /* MDC */ - }; - - }; - }; - - qe@e0100000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe"; - ranges = <0x0 0xe0100000 0x00100000>; - reg = <0xe0100000 0x480>; - brg-frequency = <0>; - bus-frequency = <396000000>; - fsl,qe-num-riscs = <2>; - fsl,qe-num-snums = <28>; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0x0 0x00010000 0x0000c000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0x0 0xc000>; - }; - }; - - timer@440 { - compatible = "fsl,mpc8360-qe-gtm", - "fsl,qe-gtm", "fsl,gtm"; - reg = <0x440 0x40>; - clock-frequency = <132000000>; - interrupts = <12 13 14 15>; - interrupt-parent = <&qeic>; - }; - - spi@4c0 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - interrupts = <2>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - spi@500 { - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - mode = "cpu"; - }; - - usb@6c0 { - compatible = "fsl,mpc8360-qe-usb", - "fsl,mpc8323-qe-usb"; - reg = <0x6c0 0x40 0x8b00 0x100>; - interrupts = <11>; - interrupt-parent = <&qeic>; - fsl,fullspeed-clock = "clk21"; - fsl,lowspeed-clock = "brg9"; - gpios = <&qe_pio_b 2 0 /* USBOE */ - &qe_pio_b 3 0 /* USBTP */ - &qe_pio_b 8 0 /* USBTN */ - &qe_pio_b 9 0 /* USBRP */ - &qe_pio_b 11 0 /* USBRN */ - &bcsr13 5 0 /* SPEED */ - &bcsr13 4 1>; /* POWER */ - }; - - enet0: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk9"; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - pio-handle = <&pio1>; - }; - - enet1: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk4"; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - pio-handle = <&pio2>; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2120 0x18>; - compatible = "fsl,ucc-mdio"; - - phy0: ethernet-phy@00 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@01 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - tbi-phy@2 { - device_type = "tbi-phy"; - reg = <0x2>; - }; - }; - - qeic: interrupt-controller@80 { - interrupt-controller; - compatible = "fsl,qe-ic"; - #address-cells = <0>; - #interrupt-cells = <1>; - reg = <0x80 0x80>; - big-endian; - interrupts = <32 0x8 33 0x8>; // high:32 low:33 - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 AD17 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 AD18 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 AD19 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 AD21*/ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 AD22*/ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 AD23*/ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 AD24*/ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - sleep = <&pmc 0x00010000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_rdk.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_rdk.dts deleted file mode 100644 index b6e9aec1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc836x_rdk.dts +++ /dev/null @@ -1,471 +0,0 @@ -/* - * MPC8360E RDK Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * Copyright 2007-2008 MontaVista Software, Inc. - * - * Author: Anton Vorontsov <avorontsov@ru.mvista.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360rdk"; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - serial2 = &serial2; - serial3 = &serial3; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8360@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - /* filled by u-boot */ - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - /* filled by u-boot */ - reg = <0 0>; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc", - "simple-bus"; - ranges = <0 0xe0000000 0x200000>; - reg = <0xe0000000 0x200>; - /* filled by u-boot */ - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <16 8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - serial0: serial@4500 { - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - interrupts = <9 8>; - interrupt-parent = <&ipic>; - /* filled by u-boot */ - clock-frequency = <0>; - }; - - serial1: serial@4600 { - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - interrupts = <10 8>; - interrupt-parent = <&ipic>; - /* filled by u-boot */ - clock-frequency = <0>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - sleep = <&pmc 0x03000000>; - }; - - ipic: interrupt-controller@700 { - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "fsl,pq2pro-pic", "fsl,ipic"; - interrupt-controller; - reg = <0x700 0x100>; - }; - - qe_pio_b: gpio-controller@1418 { - #gpio-cells = <2>; - compatible = "fsl,mpc8360-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x1418 0x18>; - gpio-controller; - }; - - qe_pio_e: gpio-controller@1460 { - #gpio-cells = <2>; - compatible = "fsl,mpc8360-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x1460 0x18>; - gpio-controller; - }; - - qe@100000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "qe"; - compatible = "fsl,qe", "simple-bus"; - ranges = <0 0x100000 0x100000>; - reg = <0x100000 0x480>; - /* filled by u-boot */ - clock-frequency = <0>; - bus-frequency = <0>; - brg-frequency = <0>; - fsl,qe-num-riscs = <2>; - fsl,qe-num-snums = <28>; - - muram@10000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0 0x10000 0xc000>; - - data-only@0 { - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0 0xc000>; - }; - }; - - timer@440 { - compatible = "fsl,mpc8360-qe-gtm", - "fsl,qe-gtm", "fsl,gtm"; - reg = <0x440 0x40>; - interrupts = <12 13 14 15>; - interrupt-parent = <&qeic>; - clock-frequency = <166666666>; - }; - - usb@6c0 { - compatible = "fsl,mpc8360-qe-usb", - "fsl,mpc8323-qe-usb"; - reg = <0x6c0 0x40 0x8b00 0x100>; - interrupts = <11>; - interrupt-parent = <&qeic>; - fsl,fullspeed-clock = "clk21"; - gpios = <&qe_pio_b 2 0 /* USBOE */ - &qe_pio_b 3 0 /* USBTP */ - &qe_pio_b 8 0 /* USBTN */ - &qe_pio_b 9 0 /* USBRP */ - &qe_pio_b 11 0 /* USBRN */ - &qe_pio_e 20 0 /* SPEED */ - &qe_pio_e 21 1 /* POWER */>; - }; - - spi@4c0 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x4c0 0x40>; - interrupts = <2>; - interrupt-parent = <&qeic>; - mode = "cpu-qe"; - }; - - spi@500 { - cell-index = <1>; - compatible = "fsl,spi"; - reg = <0x500 0x40>; - interrupts = <1>; - interrupt-parent = <&qeic>; - mode = "cpu-qe"; - }; - - enet0: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <1>; - reg = <0x2000 0x200>; - interrupts = <32>; - interrupt-parent = <&qeic>; - rx-clock-name = "none"; - tx-clock-name = "clk9"; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-rxid"; - /* filled by u-boot */ - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - - enet1: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <2>; - reg = <0x3000 0x200>; - interrupts = <33>; - interrupt-parent = <&qeic>; - rx-clock-name = "none"; - tx-clock-name = "clk4"; - phy-handle = <&phy4>; - phy-connection-type = "rgmii-rxid"; - /* filled by u-boot */ - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - - enet2: ucc@2600 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <7>; - reg = <0x2600 0x200>; - interrupts = <42>; - interrupt-parent = <&qeic>; - rx-clock-name = "clk20"; - tx-clock-name = "clk19"; - phy-handle = <&phy1>; - phy-connection-type = "mii"; - /* filled by u-boot */ - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - - enet3: ucc@3200 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <4>; - reg = <0x3200 0x200>; - interrupts = <35>; - interrupt-parent = <&qeic>; - rx-clock-name = "clk8"; - tx-clock-name = "clk7"; - phy-handle = <&phy3>; - phy-connection-type = "mii"; - /* filled by u-boot */ - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,ucc-mdio"; - reg = <0x2120 0x18>; - - phy1: ethernet-phy@1 { - device_type = "ethernet-phy"; - compatible = "national,DP83848VV"; - reg = <1>; - }; - - phy2: ethernet-phy@2 { - device_type = "ethernet-phy"; - compatible = "broadcom,BCM5481UA2KMLG"; - reg = <2>; - }; - - phy3: ethernet-phy@3 { - device_type = "ethernet-phy"; - compatible = "national,DP83848VV"; - reg = <3>; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - compatible = "broadcom,BCM5481UA2KMLG"; - reg = <4>; - }; - }; - - serial2: ucc@2400 { - device_type = "serial"; - compatible = "ucc_uart"; - reg = <0x2400 0x200>; - cell-index = <5>; - port-number = <0>; - rx-clock-name = "brg7"; - tx-clock-name = "brg8"; - interrupts = <40>; - interrupt-parent = <&qeic>; - soft-uart; - }; - - serial3: ucc@3400 { - device_type = "serial"; - compatible = "ucc_uart"; - reg = <0x3400 0x200>; - cell-index = <6>; - port-number = <1>; - rx-clock-name = "brg13"; - tx-clock-name = "brg14"; - interrupts = <41>; - interrupt-parent = <&qeic>; - soft-uart; - }; - - qeic: interrupt-controller@80 { - #address-cells = <0>; - #interrupt-cells = <1>; - compatible = "fsl,qe-ic"; - interrupt-controller; - reg = <0x80 0x80>; - big-endian; - interrupts = <32 8 33 8>; - interrupt-parent = <&ipic>; - }; - }; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", - "simple-bus"; - reg = <0xe0005000 0xd8>; - ranges = <0 0 0xff800000 0x0800000 - 1 0 0x60000000 0x0001000 - 2 0 0x70000000 0x4000000>; - - flash@0,0 { - compatible = "intel,PC28F640P30T85", "cfi-flash"; - reg = <0 0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - upm@1,0 { - compatible = "fsl,upm-nand"; - reg = <1 0 1>; - fsl,upm-addr-offset = <16>; - fsl,upm-cmd-offset = <8>; - gpios = <&qe_pio_e 18 0>; - - flash { - compatible = "stm,nand512-a"; - }; - }; - - display@2,0 { - device_type = "display"; - compatible = "fujitsu,MB86277", "fujitsu,mint"; - reg = <2 0 0x4000000>; - fujitsu,sh3; - little-endian; - /* filled by u-boot */ - address = <0>; - depth = <0>; - width = <0>; - height = <0>; - linebytes = <0>; - /* linux,opened; - added by uboot */ - }; - }; - - pci0: pci@e0008500 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; - interrupts = <66 8>; - interrupt-parent = <&ipic>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */ - 0xa000 0 0 1 &ipic 18 8 - 0xa000 0 0 2 &ipic 19 8 - - /* PCI1 IDSEL 0x15 AD21 */ - 0xa800 0 0 1 &ipic 19 8 - 0xa800 0 0 2 &ipic 20 8 - 0xa800 0 0 3 &ipic 21 8 - 0xa800 0 0 4 &ipic 18 8>; - sleep = <&pmc 0x00010000>; - /* filled by u-boot */ - bus-range = <0 0>; - clock-frequency = <0>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_mds.dts deleted file mode 100644 index cfccef57..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_mds.dts +++ /dev/null @@ -1,511 +0,0 @@ -/* - * MPC8377E MDS Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc8377emds"; - compatible = "fsl,mpc8377emds","fsl,mpc837xmds"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8377@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // booting from NOR flash - ranges = <0 0x0 0xfe000000 0x02000000 - 1 0x0 0xf8000000 0x00008000 - 3 0x0 0xe0600000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - fs@100000 { - reg = <0x100000 0x800000>; - }; - - kernel@1d00000 { - reg = <0x1d00000 0x200000>; - }; - - dtb@1f00000 { - reg = <0x1f00000 0x100000>; - }; - }; - - bcsr@1,0 { - reg = <1 0x0 0x8000>; - compatible = "fsl,mpc837xmds-bcsr"; - }; - - nand@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <19 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8377-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <0x47 8>; - }; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_rdb.dts deleted file mode 100644 index 353deff1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ /dev/null @@ -1,503 +0,0 @@ -/* - * MPC8377E RDB Device Tree Source - * - * Copyright 2007, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8377rdb"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8377@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe0600000 0x00008000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - gpio1: gpio-controller@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x100>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - gpio2: gpio-controller@d00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; - reg = <0xd00 0x100>; - interrupts = <75 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - at24@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - - mcu_pio: mcu@a { - #gpio-cells = <2>; - compatible = "fsl,mc9s08qg8-mpc8377erdb", - "fsl,mcu-mpc8349emitx"; - reg = <0x0a>; - gpio-controller; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8377-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <111111111>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - fixed-link = <1 1 1000 0 0>; - tbi-handle = <&tbi1>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ - - /* IDSEL AD14 IRQ6 inta */ - 0x7000 0x0 0x0 0x1 &ipic 22 0x8 - - /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ - 0x7800 0x0 0x0 0x1 &ipic 21 0x8 - 0x7800 0x0 0x0 0x2 &ipic 22 0x8 - 0x7800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ - 0xE000 0x0 0x0 0x1 &ipic 23 0x8 - 0xE000 0x0 0x0 0x2 &ipic 21 0x8 - 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - leds { - compatible = "gpio-leds"; - - pwr { - gpios = <&mcu_pio 0 0>; - default-state = "on"; - }; - - hdd { - gpios = <&mcu_pio 1 0>; - linux,default-trigger = "ide-disk"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_wlan.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_wlan.dts deleted file mode 100644 index ef4a305a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8377_wlan.dts +++ /dev/null @@ -1,465 +0,0 @@ -/* - * MPC8377E WLAN Device Tree Source - * - * Copyright 2007-2009 Freescale Semiconductor Inc. - * Copyright 2009 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8377wlan"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8377@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - ranges = <0x0 0x0 0xfc000000 0x04000000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x4000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - reg = <0 0x80000>; - label = "u-boot"; - read-only; - }; - - partition@a0000 { - reg = <0xa0000 0x300000>; - label = "kernel"; - }; - - partition@3a0000 { - reg = <0x3a0000 0x3c60000>; - label = "rootfs"; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - gpio1: gpio-controller@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x100>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - gpio2: gpio-controller@d00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; - reg = <0xd00 0x100>; - interrupts = <75 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - at24@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8377-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - clock-frequency = <133333333>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - phy-handle = <&phy3>; - tbi-handle = <&tbi1>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ - - /* IDSEL AD14 IRQ6 inta */ - 0x7000 0x0 0x0 0x1 &ipic 22 0x8 - - /* IDSEL AD15 IRQ5 inta */ - 0x7800 0x0 0x0 0x1 &ipic 21 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_mds.dts deleted file mode 100644 index 538fcb92..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_mds.dts +++ /dev/null @@ -1,495 +0,0 @@ -/* - * MPC8378E MDS Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc8378emds"; - compatible = "fsl,mpc8378emds","fsl,mpc837xmds"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8378@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // booting from NOR flash - ranges = <0 0x0 0xfe000000 0x02000000 - 1 0x0 0xf8000000 0x00008000 - 3 0x0 0xe0600000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - fs@100000 { - reg = <0x100000 0x800000>; - }; - - kernel@1d00000 { - reg = <0x1d00000 0x200000>; - }; - - dtb@1f00000 { - reg = <0x1f00000 0x100000>; - }; - }; - - bcsr@1,0 { - reg = <1 0x0 0x8000>; - compatible = "fsl,mpc837xmds-bcsr"; - }; - - nand@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8378-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <19 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - clock-frequency = <0>; - sleep = <&pmc 0x00010000>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_rdb.dts deleted file mode 100644 index 32333a90..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ /dev/null @@ -1,487 +0,0 @@ -/* - * MPC8378E RDB Device Tree Source - * - * Copyright 2007, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8378rdb"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8378@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe0600000 0x00008000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8378-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - gpio1: gpio-controller@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x100>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - gpio2: gpio-controller@d00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio"; - reg = <0xd00 0x100>; - interrupts = <75 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - at24@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - - mcu_pio: mcu@a { - #gpio-cells = <2>; - compatible = "fsl,mc9s08qg8-mpc8378erdb", - "fsl,mcu-mpc8349emitx"; - reg = <0x0a>; - gpio-controller; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <111111111>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - fixed-link = <1 1 1000 0 0>; - tbi-handle = <&tbi1>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ - - /* IDSEL AD14 IRQ6 inta */ - 0x7000 0x0 0x0 0x1 &ipic 22 0x8 - - /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ - 0x7800 0x0 0x0 0x1 &ipic 21 0x8 - 0x7800 0x0 0x0 0x2 &ipic 22 0x8 - 0x7800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ - 0xE000 0x0 0x0 0x1 &ipic 23 0x8 - 0xE000 0x0 0x0 0x2 &ipic 21 0x8 - 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - pci1: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 1 8 - 0 0 0 2 &ipic 1 8 - 0 0 0 3 &ipic 1 8 - 0 0 0 4 &ipic 1 8>; - sleep = <&pmc 0x00300000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xa8000000 - 0x02000000 0 0xa8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - pci2: pcie@e000a000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; - reg = <0xe000a000 0x00001000>; - ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 - 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0 0 0 1 &ipic 2 8 - 0 0 0 2 &ipic 2 8 - 0 0 0 3 &ipic 2 8 - 0 0 0 4 &ipic 2 8>; - sleep = <&pmc 0x000c0000>; - clock-frequency = <0>; - - pcie@0 { - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - reg = <0 0 0 0 0>; - ranges = <0x02000000 0 0xc8000000 - 0x02000000 0 0xc8000000 - 0 0x10000000 - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00800000>; - }; - }; - - leds { - compatible = "gpio-leds"; - - pwr { - gpios = <&mcu_pio 0 0>; - default-state = "on"; - }; - - hdd { - gpios = <&mcu_pio 1 0>; - linux,default-trigger = "ide-disk"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_mds.dts deleted file mode 100644 index 5387092f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_mds.dts +++ /dev/null @@ -1,461 +0,0 @@ -/* - * MPC8379E MDS Device Tree Source - * - * Copyright 2007 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "fsl,mpc8379emds"; - compatible = "fsl,mpc8379emds","fsl,mpc837xmds"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8379@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // booting from NOR flash - ranges = <0 0x0 0xfe000000 0x02000000 - 1 0x0 0xf8000000 0x00008000 - 3 0x0 0xe0600000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - fs@100000 { - reg = <0x100000 0x800000>; - }; - - kernel@1d00000 { - reg = <0x1d00000 0x200000>; - }; - - dtb@1f00000 { - reg = <0x1f00000 0x100000>; - }; - }; - - bcsr@1,0 { - reg = <1 0x0 0x8000>; - compatible = "fsl,mpc837xmds-bcsr"; - }; - - nand@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8379-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <19 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8379-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <0>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - phy3: ethernet-phy@3 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - sata@1a000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x1a000 0x1000>; - interrupts = <46 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x0000000c>; - }; - - sata@1b000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x1b000 0x1000>; - interrupts = <47 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000003>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 20 0x8 - 0x8800 0x0 0x0 0x2 &ipic 21 0x8 - 0x8800 0x0 0x0 0x3 &ipic 22 0x8 - 0x8800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &ipic 22 0x8 - 0x9000 0x0 0x0 0x2 &ipic 23 0x8 - 0x9000 0x0 0x0 0x3 &ipic 20 0x8 - 0x9000 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &ipic 23 0x8 - 0x9800 0x0 0x0 0x2 &ipic 20 0x8 - 0x9800 0x0 0x0 0x3 &ipic 21 0x8 - 0x9800 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &ipic 20 0x8 - 0xa800 0x0 0x0 0x2 &ipic 21 0x8 - 0xa800 0x0 0x0 0x3 &ipic 22 0x8 - 0xa800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &ipic 23 0x8 - 0xb000 0x0 0x0 0x2 &ipic 20 0x8 - 0xb000 0x0 0x0 0x3 &ipic 21 0x8 - 0xb000 0x0 0x0 0x4 &ipic 22 0x8 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &ipic 22 0x8 - 0xb800 0x0 0x0 0x2 &ipic 23 0x8 - 0xb800 0x0 0x0 0x3 &ipic 20 0x8 - 0xb800 0x0 0x0 0x4 &ipic 21 0x8 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &ipic 21 0x8 - 0xc000 0x0 0x0 0x2 &ipic 22 0x8 - 0xc000 0x0 0x0 0x3 &ipic 23 0x8 - 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_rdb.dts deleted file mode 100644 index 46224c24..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ /dev/null @@ -1,453 +0,0 @@ -/* - * MPC8379E RDB Device Tree Source - * - * Copyright 2007, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - compatible = "fsl,mpc8379rdb"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8379@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - - // CS0 and CS1 are swapped when - // booting from nand, but the - // addresses are the same. - ranges = <0x0 0x0 0xfe000000 0x00800000 - 0x1 0x0 0xe0600000 0x00008000 - 0x2 0x0 0xf0000000 0x00020000 - 0x3 0x0 0xfa000000 0x00008000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8379-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x8000>; - - u-boot@0 { - reg = <0x0 0x100000>; - read-only; - }; - - kernel@100000 { - reg = <0x100000 0x300000>; - }; - fs@400000 { - reg = <0x400000 0x1c00000>; - }; - }; - }; - - immr@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - device_type = "watchdog"; - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - gpio1: gpio-controller@c00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; - reg = <0xc00 0x100>; - interrupts = <74 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - gpio2: gpio-controller@d00 { - #gpio-cells = <2>; - compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; - reg = <0xd00 0x100>; - interrupts = <75 0x8>; - interrupt-parent = <&ipic>; - gpio-controller; - }; - - sleep-nexus { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - sleep = <&pmc 0x0c000000>; - ranges; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - at24@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - - mcu_pio: mcu@a { - #gpio-cells = <2>; - compatible = "fsl,mc9s08qg8-mpc8379erdb", - "fsl,mcu-mpc8349emitx"; - reg = <0x0a>; - gpio-controller; - }; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8379-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - sdhci,wp-inverted; - /* Filled in by U-Boot */ - clock-frequency = <111111111>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <0x23000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <38 0x8>; - phy_type = "ulpi"; - sleep = <&pmc 0x00c00000>; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - sleep = <&pmc 0xc0000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - phy-connection-type = "mii"; - interrupt-parent = <&ipic>; - fixed-link = <1 1 1000 0 0>; - tbi-handle = <&tbi1>; - sleep = <&pmc 0x30000000>; - fsl,magic-packet; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - sleep = <&pmc 0x03000000>; - }; - - sata@18000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x000000c0>; - }; - - sata@19000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000030>; - }; - - sata@1a000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x1a000 0x1000>; - interrupts = <46 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x0000000c>; - }; - - sata@1b000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x1b000 0x1000>; - interrupts = <47 0x8>; - interrupt-parent = <&ipic>; - sleep = <&pmc 0x00000003>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: interrupt-controller@700 { - compatible = "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - }; - - pmc: power@b00 { - compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc"; - reg = <0xb00 0x100 0xa00 0x100>; - interrupts = <80 0x8>; - interrupt-parent = <&ipic>; - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ - - /* IDSEL AD14 IRQ6 inta */ - 0x7000 0x0 0x0 0x1 &ipic 22 0x8 - - /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ - 0x7800 0x0 0x0 0x1 &ipic 21 0x8 - 0x7800 0x0 0x0 0x2 &ipic 22 0x8 - 0x7800 0x0 0x0 0x4 &ipic 23 0x8 - - /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ - 0xE000 0x0 0x0 0x1 &ipic 23 0x8 - 0xE000 0x0 0x0 0x2 &ipic 21 0x8 - 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; - sleep = <&pmc 0x00010000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; - - leds { - compatible = "gpio-leds"; - - pwr { - gpios = <&mcu_pio 0 0>; - default-state = "on"; - }; - - hdd { - gpios = <&mcu_pio 1 0>; - linux,default-trigger = "ide-disk"; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dts deleted file mode 100644 index 19736222..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dts +++ /dev/null @@ -1,109 +0,0 @@ -/* - * MPC8536 DS Device Tree Source - * - * Copyright 2008, 2011 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8536si-pre.dtsi" - -/ { - model = "fsl,mpc8536ds"; - compatible = "fsl,mpc8536ds"; - - cpus { - #cpus = <1>; - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8536@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0 0 0>; // Filled by U-Boot - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 - 0x2 0x0 0x0 0xffa00000 0x00040000 - 0x3 0x0 0x0 0xffdf0000 0x00008000>; - }; - - board_soc: soc: soc@ffe00000 { - ranges = <0x0 0 0xffe00000 0x100000>; - }; - - pci0: pci@ffe08000 { - reg = <0 0xffe08000 0 0x1000>; - ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000 - 0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 J17 Slot 1 */ - 0x8800 0 0 1 &mpic 1 1 0 0 - 0x8800 0 0 2 &mpic 2 1 0 0 - 0x8800 0 0 3 &mpic 3 1 0 0 - 0x8800 0 0 4 &mpic 4 1 0 0>; - }; - - pci1: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000 - 0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x98000000 - 0x02000000 0 0x98000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000 - 0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0x90000000 - 0x02000000 0 0x90000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci3: pcie@ffe0b000 { - reg = <0 0xffe0b000 0 0x1000>; - ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 - 0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xa0000000 - 0x02000000 0 0xa0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00100000>; - }; - }; -}; - -/include/ "fsl/mpc8536si-post.dtsi" -/include/ "mpc8536ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dtsi deleted file mode 100644 index cc46dbd9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds.dtsi +++ /dev/null @@ -1,234 +0,0 @@ -/* - * MPC8536DS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - reg = <0x0 0x03000000>; - label = "ramdisk-nor"; - }; - - partition@3000000 { - reg = <0x03000000 0x00e00000>; - label = "diagnostic-nor"; - read-only; - }; - - partition@3e00000 { - reg = <0x03e00000 0x00200000>; - label = "dink-nor"; - read-only; - }; - - partition@4000000 { - reg = <0x04000000 0x00400000>; - label = "kernel-nor"; - }; - - partition@4400000 { - reg = <0x04400000 0x03b00000>; - label = "fs-nor"; - }; - - partition@7f00000 { - reg = <0x07f00000 0x00080000>; - label = "dtb-nor"; - }; - - partition@7f80000 { - reg = <0x07f80000 0x00080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8536-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - reg = <0x0 0x02000000>; - label = "u-boot-nand"; - read-only; - }; - - partition@2000000 { - reg = <0x02000000 0x10000000>; - label = "fs-nand"; - }; - - partition@12000000 { - reg = <0x12000000 0x08000000>; - label = "ramdisk-nand"; - }; - - partition@1a000000 { - reg = <0x1a000000 0x04000000>; - label = "kernel-nand"; - }; - - partition@1e000000 { - reg = <0x1e000000 0x01000000>; - label = "dtb-nand"; - }; - - partition@1f000000 { - reg = <0x1f000000 0x21000000>; - label = "empty-nand"; - }; - }; - - board-control@3,0 { - compatible = "fsl,mpc8536ds-fpga-pixis"; - reg = <0x3 0x0 0x8000>; - }; -}; - -&board_soc { - i2c@3100 { - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0 0x1 0 0>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - flash@1 { - compatible = "spansion,s25sl12801"; - reg = <1>; - spi-max-frequency = <40000000>; - }; - flash@2 { - compatible = "spansion,s25sl12801"; - reg = <2>; - spi-max-frequency = <40000000>; - }; - flash@3 { - compatible = "spansion,s25sl12801"; - reg = <3>; - spi-max-frequency = <40000000>; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - usb@23000 { - phy_type = "ulpi"; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <10 0x1 0 0>; - reg = <0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupts = <10 0x1 0 0>; - reg = <1>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - mdio@26520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x26520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - usb@2b000 { - dr_mode = "peripheral"; - phy_type = "ulpi"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds_36b.dts deleted file mode 100644 index f8a3b341..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8536ds_36b.dts +++ /dev/null @@ -1,109 +0,0 @@ -/* - * MPC8536DS Device Tree Source (36-bit address map) - * - * Copyright 2008-2009, 2011 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8536si-pre.dtsi" - -/ { - model = "fsl,mpc8536ds"; - compatible = "fsl,mpc8536ds"; - - cpus { - #cpus = <1>; - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8536@0 { - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0 0 0>; // Filled by U-Boot - }; - - lbc: localbus@ffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 - 0x2 0x0 0xf 0xffa00000 0x00040000 - 0x3 0x0 0xf 0xffdf0000 0x00008000>; - }; - - board_soc: soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pci@ffe08000 { - reg = <0xf 0xffe08000 0 0x1000>; - ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000 - 0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 J17 Slot 1 */ - 0x8800 0 0 1 &mpic 1 1 0 0 - 0x8800 0 0 2 &mpic 2 1 0 0 - 0x8800 0 0 3 &mpic 3 1 0 0 - 0x8800 0 0 4 &mpic 4 1 0 0>; - }; - - pci1: pcie@ffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000 - 0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xf8000000 - 0x02000000 0 0xf8000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x02000000 0 0xf8000000 0xc 0x10000000 0 0x08000000 - 0x01000000 0 0x00000000 0xf 0xffc10000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xf8000000 - 0x02000000 0 0xf8000000 - 0 0x08000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci3: pcie@fffe0b000 { - reg = <0xf 0xffe0b000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xffc30000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00100000>; - }; - }; -}; - -/include/ "fsl/mpc8536si-post.dtsi" -/include/ "mpc8536ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8540ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8540ads.dts deleted file mode 100644 index f99fb110..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8540ads.dts +++ /dev/null @@ -1,360 +0,0 @@ -/* - * MPC8540 ADS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8540ADS"; - compatible = "MPC8540ADS", "MPC85xxADS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8540@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; // 128M at 0x0 - }; - - soc8540@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8540-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <7 1>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "FEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <41 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy3>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x02 */ - 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x03 */ - 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x04 */ - 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x05 */ - 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x0c */ - 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x0d */ - 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x0e */ - 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x0f */ - 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x13 */ - 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x14 */ - 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8541cds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8541cds.dts deleted file mode 100644 index 0f5e9391..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8541cds.dts +++ /dev/null @@ -1,379 +0,0 @@ -/* - * MPC8541 CDS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8541CDS"; - compatible = "MPC8541CDS", "MPC85xxCDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8541@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; // 128M at 0x0 - }; - - soc8541@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8541-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8541-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8541-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8541-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8541-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x10 */ - 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x12 (Slot 1) */ - 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x13 (Slot 2) */ - 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 - - /* IDSEL 0x14 (Slot 3) */ - 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x15 (Slot 4) */ - 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* Bus 1 (Tundra Bridge) */ - /* IDSEL 0x12 (ISA bridge) */ - 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - - i8259@19000 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x19000 0x0 0x0 0x0 0x1>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <1>; - interrupt-parent = <&pci0>; - }; - }; - - pci1: pci@e0009000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0009000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dts deleted file mode 100644 index e934987e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dts +++ /dev/null @@ -1,105 +0,0 @@ -/* - * MPC8544 DS Device Tree Source - * - * Copyright 2007, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8544si-pre.dtsi" - -/ { - model = "MPC8544DS"; - compatible = "MPC8544DS", "MPC85xxDS"; - - memory { - device_type = "memory"; - reg = <0 0 0 0>; // Filled by U-Boot - }; - - lbc: localbus@e0005000 { - reg = <0 0xe0005000 0 0x1000>; - }; - - board_soc: soc: soc8544@e0000000 { - ranges = <0x0 0x0 0xe0000000 0x100000>; - }; - - pci0: pci@e0008000 { - reg = <0 0xe0008000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 J17 Slot 1 */ - 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x12 J16 Slot 2 */ - - 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>; - }; - - pci1: pcie@e0009000 { - reg = <0x0 0xe0009000 0x0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci2: pcie@e000a000 { - reg = <0x0 0xe000a000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - board_pci3: pci3: pcie@e000b000 { - reg = <0x0 0xe000b000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000 - 0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>; - pcie@0 { - ranges = <0x2000000 0x0 0xb0000000 - 0x2000000 0x0 0xb0000000 - 0x0 0x100000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/* - * mpc8544ds.dtsi must be last to ensure board_pci3 overrides pci3 settings - * for interrupt-map & interrupt-map-mask - */ - -/include/ "fsl/mpc8544si-post.dtsi" -/include/ "mpc8544ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dtsi deleted file mode 100644 index 270f64b9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8544ds.dtsi +++ /dev/null @@ -1,161 +0,0 @@ -/* - * MPC8544DS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_soc { - enet0: ethernet@24000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi0>; - phy-connection-type = "rgmii-id"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <10 1 0 0>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupts = <10 1 0 0>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - phy-handle = <&phy1>; - tbi-handle = <&tbi1>; - phy-connection-type = "rgmii-id"; - }; - - mdio@26520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; -}; - -&board_pci3 { - pcie@0 { - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - // IDSEL 0x1c USB - 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2 - 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2 - 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2 - 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2 - - // IDSEL 0x1d Audio - 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 - - // IDSEL 0x1e Legacy - 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 - 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 - 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 - >; - - - uli1575@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0xb0000000 - 0x2000000 0x0 0xb0000000 - 0x0 0x100000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 - 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2 0 0>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <0x1 0x60 0x1 0x1 0x64 0x1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0x0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <0x1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - - gpio@400 { - reg = <0x1 0x400 0x80>; - }; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds.dtsi deleted file mode 100644 index c61f525e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds.dtsi +++ /dev/null @@ -1,306 +0,0 @@ -/* - * MPC8548CDS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x01000000>; - bank-width = <2>; - device-width = <2>; - - partition@0 { - reg = <0x0 0x0b00000>; - label = "ramdisk-nor"; - }; - - partition@300000 { - reg = <0x0b00000 0x0400000>; - label = "kernel-nor"; - }; - - partition@700000 { - reg = <0x0f00000 0x060000>; - label = "dtb-nor"; - }; - - partition@760000 { - reg = <0x0f60000 0x020000>; - label = "env-nor"; - read-only; - }; - - partition@780000 { - reg = <0x0f80000 0x080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - board-control@1,0 { - compatible = "fsl,mpc8548cds-fpga"; - reg = <0x1 0x0 0x1000>; - }; -}; - -&board_soc { - i2c@3000 { - eeprom@50 { - compatible = "atmel,24c64"; - reg = <0x50>; - }; - - eeprom@56 { - compatible = "atmel,24c64"; - reg = <0x56>; - }; - - eeprom@57 { - compatible = "atmel,24c64"; - reg = <0x57>; - }; - }; - - i2c@3100 { - eeprom@50 { - compatible = "atmel,24c64"; - reg = <0x50>; - }; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <5 1 0 0>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupts = <5 1 0 0>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupts = <5 1 0 0>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupts = <5 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - }; - - mdio@26520 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@27000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - }; - - mdio@27520 { - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; -}; - -&board_pci0 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x4 (PCIX Slot 2) */ - 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x5 (PCIX Slot 3) */ - 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0 - 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0 - 0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0 - 0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0 - - /* IDSEL 0x6 (PCIX Slot 4) */ - 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0 - 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x8 (PCIX Slot 5) */ - 0x4000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x4000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0xC (Tsi310 bridge) */ - 0x6000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x6000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x14 (Slot 2) */ - 0xa000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0xa000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xa000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xa000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x15 (Slot 3) */ - 0xa800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0 - 0xa800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0 - 0xa800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0 - 0xa800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0 - - /* IDSEL 0x16 (Slot 4) */ - 0xb000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0xb000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0xb000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0 - 0xb000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x18 (Slot 5) */ - 0xc000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0xc000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xc000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xc000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x1C (Tsi310 bridge PCI primary) */ - 0xe000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0xe000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xe000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xe000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; - - pci_bridge@1c { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x00 (PrPMC Site) */ - 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x04 (VIA chip) */ - 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0 - 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0 - - /* IDSEL 0x05 (8139) */ - 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x06 (Slot 6) */ - 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0 - 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDESL 0x07 (Slot 7) */ - 0x3800 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x3800 0x0 0x0 0x2 &mpic 0x0 0x1 0 0 - 0x3800 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x3800 0x0 0x0 0x4 &mpic 0x2 0x1 0 0>; - - reg = <0xe000 0x0 0x0 0x0 0x0>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x80000>; - clock-frequency = <33333333>; - - isa@4 { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0x2000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <0 1 0 0>; - interrupt-parent = <&mpic>; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_32b.dts deleted file mode 100644 index 6fd63163..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_32b.dts +++ /dev/null @@ -1,86 +0,0 @@ -/* - * MPC8548 CDS Device Tree Source (32-bit address map) - * - * Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8548si-pre.dtsi" - -/ { - model = "MPC8548CDS"; - compatible = "MPC8548CDS", "MPC85xxCDS"; - - memory { - device_type = "memory"; - reg = <0 0 0x0 0x8000000>; // 128M at 0x0 - }; - - board_lbc: lbc: localbus@e0005000 { - reg = <0 0xe0005000 0 0x1000>; - - ranges = <0x0 0x0 0x0 0xff000000 0x01000000 - 0x1 0x0 0x0 0xf8004000 0x00001000>; - - }; - - board_soc: soc: soc8548@e0000000 { - ranges = <0 0x0 0xe0000000 0x100000>; - }; - - board_pci0: pci0: pci@e0008000 { - reg = <0 0xe0008000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>; - clock-frequency = <66666666>; - }; - - pci1: pci@e0009000 { - reg = <0 0xe0009000 0 0x1000>; - ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0 - 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; - }; - - pci2: pcie@e000a000 { - reg = <0 0xe000a000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - rio: rapidio@e00c0000 { - reg = <0x0 0xe00c0000 0x0 0x20000>; - port1 { - ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; - }; - }; -}; - -/* - * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask. - */ - -/include/ "fsl/mpc8548si-post.dtsi" -/include/ "mpc8548cds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_36b.dts deleted file mode 100644 index 10e551b1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8548cds_36b.dts +++ /dev/null @@ -1,86 +0,0 @@ -/* - * MPC8548 CDS Device Tree Source (36-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8548si-pre.dtsi" - -/ { - model = "MPC8548CDS"; - compatible = "MPC8548CDS", "MPC85xxCDS"; - - memory { - device_type = "memory"; - reg = <0 0 0x0 0x8000000>; // 128M at 0x0 - }; - - board_lbc: lbc: localbus@fe0005000 { - reg = <0xf 0xe0005000 0 0x1000>; - - ranges = <0x0 0x0 0xf 0xff000000 0x01000000 - 0x1 0x0 0xf 0xf8004000 0x00001000>; - - }; - - board_soc: soc: soc8548@fe0000000 { - ranges = <0 0xf 0xe0000000 0x100000>; - }; - - board_pci0: pci0: pci@fe0008000 { - reg = <0xf 0xe0008000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>; - clock-frequency = <66666666>; - }; - - pci1: pci@fe0009000 { - reg = <0xf 0xe0009000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0xf 0xe2800000 0x0 0x800000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0 - 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 - 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 - 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; - }; - - pci2: pcie@fe000a000 { - reg = <0xf 0xe000a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xe3000000 0x0 0x100000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - rio: rapidio@fe00c0000 { - reg = <0xf 0xe00c0000 0x0 0x20000>; - port1 { - ranges = <0x0 0x0 0xc 0x40000000 0x0 0x20000000>; - }; - }; -}; - -/* - * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask. - */ - -/include/ "fsl/mpc8548si-post.dtsi" -/include/ "mpc8548cds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8555cds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8555cds.dts deleted file mode 100644 index fe104386..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8555cds.dts +++ /dev/null @@ -1,379 +0,0 @@ -/* - * MPC8555 CDS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8555CDS"; - compatible = "MPC8555CDS", "MPC85xxCDS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8555@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x8000000>; // 128M at 0x0 - }; - - soc8555@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8555-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8555-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8555-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8555-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x10 */ - 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x12 (Slot 1) */ - 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x13 (Slot 2) */ - 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 - - /* IDSEL 0x14 (Slot 3) */ - 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x15 (Slot 4) */ - 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* Bus 1 (Tundra Bridge) */ - /* IDSEL 0x12 (ISA bridge) */ - 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - - i8259@19000 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x19000 0x0 0x0 0x0 0x1>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <1>; - interrupt-parent = <&pci0>; - }; - }; - - pci1: pci@e0009000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0009000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8560ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8560ads.dts deleted file mode 100644 index 6e85e1ba..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8560ads.dts +++ /dev/null @@ -1,394 +0,0 @@ -/* - * MPC8560 ADS Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8560ADS"; - compatible = "MPC8560ADS", "MPC85xxADS"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <82500000>; - bus-frequency = <330000000>; - clock-frequency = <825000000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x10000000>; - }; - - soc8560@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <330000000>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <7 1>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <7 1>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <165000000>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - serial0: serial@91a00 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a00 0x20 0x88000 0x100>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - current-speed = <115200>; - interrupts = <40 8>; - interrupt-parent = <&cpmpic>; - }; - - serial1: serial@91a20 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a20 0x20 0x88100 0x100>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - current-speed = <115200>; - interrupts = <41 8>; - interrupt-parent = <&cpmpic>; - }; - - enet2: ethernet@91320 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x16200300>; - interrupts = <33 8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy2>; - }; - - enet3: ethernet@91340 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x1a400300>; - interrupts = <34 8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy3>; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x2 */ - 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 0x3 */ - 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x4 */ - 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 0x5 */ - 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 12 */ - 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 13 */ - 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 14*/ - 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 15 */ - 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 18 */ - 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 - - /* IDSEL 19 */ - 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 20 */ - 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* IDSEL 21 */ - 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8568mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8568mds.dts deleted file mode 100644 index 09598bb5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8568mds.dts +++ /dev/null @@ -1,322 +0,0 @@ -/* - * MPC8568E MDS Device Tree Source - * - * Copyright 2007, 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8568si-pre.dtsi" - -/ { - model = "MPC8568EMDS"; - compatible = "MPC8568EMDS", "MPC85xxMDS"; - - aliases { - pci0 = &pci0; - pci1 = &pci1; - rapidio0 = &rio; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; - }; - - lbc: localbus@e0005000 { - reg = <0x0 0xe0005000 0x0 0x1000>; - ranges = <0x0 0x0 0xfe000000 0x02000000 - 0x1 0x0 0xf8000000 0x00008000 - 0x2 0x0 0xf0000000 0x04000000 - 0x4 0x0 0xf8008000 0x00008000 - 0x5 0x0 0xf8010000 0x00008000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x02000000>; - bank-width = <2>; - device-width = <2>; - }; - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8568mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr5: gpio-controller@11 { - #gpio-cells = <2>; - compatible = "fsl,mpc8568mds-bcsr-gpio"; - reg = <0x5 0x1>; - gpio-controller; - }; - }; - - pib@4,0 { - compatible = "fsl,mpc8568mds-pib"; - reg = <4 0 0x8000>; - }; - - pib@5,0 { - compatible = "fsl,mpc8568mds-pib"; - reg = <5 0 0x8000>; - }; - }; - - soc: soc8568@e0000000 { - ranges = <0x0 0x0 0xe0000000 0x100000>; - - i2c-sleep-nexus { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <3 1 0 0>; - }; - }; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - }; - - mdio@24520 { - phy0: ethernet-phy@7 { - interrupts = <1 1 0 0>; - reg = <0x7>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupts = <1 1 0 0>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupts = <2 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy3>; - sleep = <&pmc 0x00000040>; - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - par_io@e0100 { - num-ports = <7>; - - pio1: ucc_pin@01 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x4 0xa 0x1 0x0 0x2 0x0 /* TxD0 */ - 0x4 0x9 0x1 0x0 0x2 0x0 /* TxD1 */ - 0x4 0x8 0x1 0x0 0x2 0x0 /* TxD2 */ - 0x4 0x7 0x1 0x0 0x2 0x0 /* TxD3 */ - 0x4 0x17 0x1 0x0 0x2 0x0 /* TxD4 */ - 0x4 0x16 0x1 0x0 0x2 0x0 /* TxD5 */ - 0x4 0x15 0x1 0x0 0x2 0x0 /* TxD6 */ - 0x4 0x14 0x1 0x0 0x2 0x0 /* TxD7 */ - 0x4 0xf 0x2 0x0 0x2 0x0 /* RxD0 */ - 0x4 0xe 0x2 0x0 0x2 0x0 /* RxD1 */ - 0x4 0xd 0x2 0x0 0x2 0x0 /* RxD2 */ - 0x4 0xc 0x2 0x0 0x2 0x0 /* RxD3 */ - 0x4 0x1d 0x2 0x0 0x2 0x0 /* RxD4 */ - 0x4 0x1c 0x2 0x0 0x2 0x0 /* RxD5 */ - 0x4 0x1b 0x2 0x0 0x2 0x0 /* RxD6 */ - 0x4 0x1a 0x2 0x0 0x2 0x0 /* RxD7 */ - 0x4 0xb 0x1 0x0 0x2 0x0 /* TX_EN */ - 0x4 0x18 0x1 0x0 0x2 0x0 /* TX_ER */ - 0x4 0x10 0x2 0x0 0x2 0x0 /* RX_DV */ - 0x4 0x1e 0x2 0x0 0x2 0x0 /* RX_ER */ - 0x4 0x11 0x2 0x0 0x2 0x0 /* RX_CLK */ - 0x4 0x13 0x1 0x0 0x2 0x0 /* GTX_CLK */ - 0x1 0x1f 0x2 0x0 0x3 0x0>; /* GTX125 */ - }; - - pio2: ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x5 0xa 0x1 0x0 0x2 0x0 /* TxD0 */ - 0x5 0x9 0x1 0x0 0x2 0x0 /* TxD1 */ - 0x5 0x8 0x1 0x0 0x2 0x0 /* TxD2 */ - 0x5 0x7 0x1 0x0 0x2 0x0 /* TxD3 */ - 0x5 0x17 0x1 0x0 0x2 0x0 /* TxD4 */ - 0x5 0x16 0x1 0x0 0x2 0x0 /* TxD5 */ - 0x5 0x15 0x1 0x0 0x2 0x0 /* TxD6 */ - 0x5 0x14 0x1 0x0 0x2 0x0 /* TxD7 */ - 0x5 0xf 0x2 0x0 0x2 0x0 /* RxD0 */ - 0x5 0xe 0x2 0x0 0x2 0x0 /* RxD1 */ - 0x5 0xd 0x2 0x0 0x2 0x0 /* RxD2 */ - 0x5 0xc 0x2 0x0 0x2 0x0 /* RxD3 */ - 0x5 0x1d 0x2 0x0 0x2 0x0 /* RxD4 */ - 0x5 0x1c 0x2 0x0 0x2 0x0 /* RxD5 */ - 0x5 0x1b 0x2 0x0 0x2 0x0 /* RxD6 */ - 0x5 0x1a 0x2 0x0 0x2 0x0 /* RxD7 */ - 0x5 0xb 0x1 0x0 0x2 0x0 /* TX_EN */ - 0x5 0x18 0x1 0x0 0x2 0x0 /* TX_ER */ - 0x5 0x10 0x2 0x0 0x2 0x0 /* RX_DV */ - 0x5 0x1e 0x2 0x0 0x2 0x0 /* RX_ER */ - 0x5 0x11 0x2 0x0 0x2 0x0 /* RX_CLK */ - 0x5 0x13 0x1 0x0 0x2 0x0 /* GTX_CLK */ - 0x1 0x1f 0x2 0x0 0x3 0x0 /* GTX125 */ - 0x4 0x6 0x3 0x0 0x2 0x0 /* MDIO */ - 0x4 0x5 0x1 0x0 0x2 0x0>; /* MDC */ - }; - }; - }; - - qe: qe@e0080000 { - ranges = <0x0 0x0 0xe0080000 0x40000>; - reg = <0x0 0xe0080000 0x0 0x480>; - - spi@4c0 { - mode = "cpu"; - }; - - spi@500 { - mode = "cpu"; - }; - - enet2: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - pio-handle = <&pio1>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - enet3: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk16"; - pio-handle = <&pio2>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2120 0x18>; - compatible = "fsl,ucc-mdio"; - - /* These are the same PHYs as on - * gianfar's MDIO bus */ - qe_phy0: ethernet-phy@07 { - interrupt-parent = <&mpic>; - interrupts = <1 1 0 0>; - reg = <0x7>; - device_type = "ethernet-phy"; - }; - qe_phy1: ethernet-phy@01 { - interrupt-parent = <&mpic>; - interrupts = <2 1 0 0>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - qe_phy2: ethernet-phy@02 { - interrupt-parent = <&mpic>; - interrupts = <1 1 0 0>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - qe_phy3: ethernet-phy@03 { - interrupt-parent = <&mpic>; - interrupts = <2 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - }; - }; - - pci0: pci@e0008000 { - reg = <0x0 0xe0008000 0x0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0x0 0xe2000000 0x0 0x800000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x12 AD18 */ - 0x9000 0x0 0x0 0x1 &mpic 0x5 0x1 0 0 - 0x9000 0x0 0x0 0x2 &mpic 0x6 0x1 0 0 - 0x9000 0x0 0x0 0x3 &mpic 0x7 0x1 0 0 - 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 0 0 - - /* IDSEL 0x13 AD19 */ - 0x9800 0x0 0x0 0x1 &mpic 0x6 0x1 0 0 - 0x9800 0x0 0x0 0x2 &mpic 0x7 0x1 0 0 - 0x9800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x9800 0x0 0x0 0x4 &mpic 0x5 0x1 0 0>; - }; - - /* PCI Express */ - pci1: pcie@e000a000 { - ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0x0 0xe2800000 0x0 0x800000>; - reg = <0x0 0xe000a000 0x0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x800000>; - }; - }; - - rio: rapidio@e00c00000 { - reg = <0x0 0xe00c0000 0x0 0x20000>; - port1 { - ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; - }; - }; - - leds { - compatible = "gpio-leds"; - - green { - gpios = <&bcsr5 1 0>; - }; - - amber { - gpios = <&bcsr5 2 0>; - }; - - red { - gpios = <&bcsr5 3 0>; - }; - }; -}; - -/include/ "fsl/mpc8568si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8569mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8569mds.dts deleted file mode 100644 index 7e283c89..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8569mds.dts +++ /dev/null @@ -1,452 +0,0 @@ -/* - * MPC8569E MDS Device Tree Source - * - * Copyright (C) 2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8569si-pre.dtsi" - -/ { - model = "MPC8569EMDS"; - compatible = "fsl,MPC8569EMDS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - aliases { - ethernet2 = &enet2; - ethernet3 = &enet3; - ethernet5 = &enet5; - ethernet7 = &enet7; - rapidio0 = &rio; - }; - - memory { - device_type = "memory"; - }; - - lbc: localbus@e0005000 { - reg = <0x0 0xe0005000 0x0 0x1000>; - - ranges = <0x0 0x0 0x0 0xfe000000 0x02000000 - 0x1 0x0 0x0 0xf8000000 0x00008000 - 0x2 0x0 0x0 0xf0000000 0x04000000 - 0x3 0x0 0x0 0xfc000000 0x00008000 - 0x4 0x0 0x0 0xf8008000 0x00008000 - 0x5 0x0 0x0 0xf8010000 0x00008000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x02000000>; - bank-width = <1>; - device-width = <1>; - partition@0 { - label = "ramdisk"; - reg = <0x00000000 0x01c00000>; - }; - partition@1c00000 { - label = "kernel"; - reg = <0x01c00000 0x002e0000>; - }; - partiton@1ee0000 { - label = "dtb"; - reg = <0x01ee0000 0x00020000>; - }; - partition@1f00000 { - label = "firmware"; - reg = <0x01f00000 0x00080000>; - read-only; - }; - partition@1f80000 { - label = "u-boot"; - reg = <0x01f80000 0x00080000>; - read-only; - }; - }; - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8569mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr17: gpio-controller@11 { - #gpio-cells = <2>; - compatible = "fsl,mpc8569mds-bcsr-gpio"; - reg = <0x11 0x1>; - gpio-controller; - }; - }; - - nand@3,0 { - compatible = "fsl,mpc8569-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <3 0 0x8000>; - }; - - pib@4,0 { - compatible = "fsl,mpc8569mds-pib"; - reg = <4 0 0x8000>; - }; - - pib@5,0 { - compatible = "fsl,mpc8569mds-pib"; - reg = <5 0 0x8000>; - }; - }; - - soc: soc@e0000000 { - ranges = <0x0 0x0 0xe0000000 0x100000>; - - i2c-sleep-nexus { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <3 1 0 0>; - }; - }; - }; - - sdhc@2e000 { - status = "disabled"; - sdhci,1-bit-only; - }; - - par_io@e0100 { - num-ports = <7>; - - qe_pio_e: gpio-controller@80 { - #gpio-cells = <2>; - compatible = "fsl,mpc8569-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0x80 0x18>; - gpio-controller; - }; - - qe_pio_f: gpio-controller@a0 { - #gpio-cells = <2>; - compatible = "fsl,mpc8569-qe-pario-bank", - "fsl,mpc8323-qe-pario-bank"; - reg = <0xa0 0x18>; - gpio-controller; - }; - - pio1: ucc_pin@01 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ - 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/ - 0x0 0x0 0x1 0x0 0x3 0x0 /* ENET1_TXD0_SER1_TXD0 */ - 0x0 0x1 0x1 0x0 0x3 0x0 /* ENET1_TXD1_SER1_TXD1 */ - 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */ - 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */ - 0x0 0x6 0x2 0x0 0x3 0x0 /* ENET1_RXD0_SER1_RXD0 */ - 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */ - 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */ - 0x0 0x9 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */ - 0x0 0x4 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */ - 0x0 0xc 0x2 0x0 0x3 0x0 /* ENET1_RX_DV_SER1_CTS_B */ - 0x2 0x8 0x2 0x0 0x1 0x0 /* ENET1_GRXCLK */ - 0x2 0x14 0x1 0x0 0x2 0x0>; /* ENET1_GTXCLK */ - }; - - pio2: ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ - 0x2 0x10 0x2 0x0 0x3 0x0 /* CLK17 */ - 0x0 0xe 0x1 0x0 0x2 0x0 /* ENET2_TXD0_SER2_TXD0 */ - 0x0 0xf 0x1 0x0 0x2 0x0 /* ENET2_TXD1_SER2_TXD1 */ - 0x0 0x10 0x1 0x0 0x1 0x0 /* ENET2_TXD2_SER2_TXD2 */ - 0x0 0x11 0x1 0x0 0x1 0x0 /* ENET2_TXD3_SER2_TXD3 */ - 0x0 0x14 0x2 0x0 0x2 0x0 /* ENET2_RXD0_SER2_RXD0 */ - 0x0 0x15 0x2 0x0 0x1 0x0 /* ENET2_RXD1_SER2_RXD1 */ - 0x0 0x16 0x2 0x0 0x1 0x0 /* ENET2_RXD2_SER2_RXD2 */ - 0x0 0x17 0x2 0x0 0x1 0x0 /* ENET2_RXD3_SER2_RXD3 */ - 0x0 0x12 0x1 0x0 0x2 0x0 /* ENET2_TX_EN_SER2_RTS_B */ - 0x0 0x1a 0x2 0x0 0x3 0x0 /* ENET2_RX_DV_SER2_CTS_B */ - 0x2 0x3 0x2 0x0 0x1 0x0 /* ENET2_GRXCLK */ - 0x2 0x2 0x1 0x0 0x2 0x0>; /* ENET2_GTXCLK */ - }; - - pio3: ucc_pin@03 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ - 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/ - 0x0 0x1d 0x1 0x0 0x2 0x0 /* ENET3_TXD0_SER3_TXD0 */ - 0x0 0x1e 0x1 0x0 0x3 0x0 /* ENET3_TXD1_SER3_TXD1 */ - 0x0 0x1f 0x1 0x0 0x2 0x0 /* ENET3_TXD2_SER3_TXD2 */ - 0x1 0x0 0x1 0x0 0x3 0x0 /* ENET3_TXD3_SER3_TXD3 */ - 0x1 0x3 0x2 0x0 0x3 0x0 /* ENET3_RXD0_SER3_RXD0 */ - 0x1 0x4 0x2 0x0 0x1 0x0 /* ENET3_RXD1_SER3_RXD1 */ - 0x1 0x5 0x2 0x0 0x2 0x0 /* ENET3_RXD2_SER3_RXD2 */ - 0x1 0x6 0x2 0x0 0x3 0x0 /* ENET3_RXD3_SER3_RXD3 */ - 0x1 0x1 0x1 0x0 0x1 0x0 /* ENET3_TX_EN_SER3_RTS_B */ - 0x1 0x9 0x2 0x0 0x3 0x0 /* ENET3_RX_DV_SER3_CTS_B */ - 0x2 0x9 0x2 0x0 0x2 0x0 /* ENET3_GRXCLK */ - 0x2 0x19 0x1 0x0 0x2 0x0>; /* ENET3_GTXCLK */ - }; - - pio4: ucc_pin@04 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */ - 0x2 0x10 0x2 0x0 0x3 0x0 /* CLK17 */ - 0x1 0xc 0x1 0x0 0x2 0x0 /* ENET4_TXD0_SER4_TXD0 */ - 0x1 0xd 0x1 0x0 0x2 0x0 /* ENET4_TXD1_SER4_TXD1 */ - 0x1 0xe 0x1 0x0 0x1 0x0 /* ENET4_TXD2_SER4_TXD2 */ - 0x1 0xf 0x1 0x0 0x2 0x0 /* ENET4_TXD3_SER4_TXD3 */ - 0x1 0x12 0x2 0x0 0x2 0x0 /* ENET4_RXD0_SER4_RXD0 */ - 0x1 0x13 0x2 0x0 0x1 0x0 /* ENET4_RXD1_SER4_RXD1 */ - 0x1 0x14 0x2 0x0 0x1 0x0 /* ENET4_RXD2_SER4_RXD2 */ - 0x1 0x15 0x2 0x0 0x2 0x0 /* ENET4_RXD3_SER4_RXD3 */ - 0x1 0x10 0x1 0x0 0x2 0x0 /* ENET4_TX_EN_SER4_RTS_B */ - 0x1 0x18 0x2 0x0 0x3 0x0 /* ENET4_RX_DV_SER4_CTS_B */ - 0x2 0x11 0x2 0x0 0x2 0x0 /* ENET4_GRXCLK */ - 0x2 0x18 0x1 0x0 0x2 0x0>; /* ENET4_GTXCLK */ - }; - }; - }; - - qe: qe@e0080000 { - ranges = <0x0 0x0 0xe0080000 0x40000>; - reg = <0x0 0xe0080000 0x0 0x480>; - - spi@4c0 { - gpios = <&qe_pio_e 30 0>; - mode = "cpu-qe"; - - serial-flash@0 { - compatible = "stm,m25p40"; - reg = <0>; - spi-max-frequency = <25000000>; - }; - }; - - spi@500 { - mode = "cpu"; - }; - - usb@6c0 { - fsl,fullspeed-clock = "clk5"; - fsl,lowspeed-clock = "brg10"; - gpios = <&qe_pio_f 3 0 /* USBOE */ - &qe_pio_f 4 0 /* USBTP */ - &qe_pio_f 5 0 /* USBTN */ - &qe_pio_f 6 0 /* USBRP */ - &qe_pio_f 8 0 /* USBRN */ - &bcsr17 1 0 /* SPEED */ - &bcsr17 2 0>; /* POWER */ - }; - - enet0: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk12"; - pio-handle = <&pio1>; - tbi-handle = <&tbi1>; - phy-handle = <&qe_phy0>; - phy-connection-type = "rgmii-id"; - }; - - mdio@2120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2120 0x18>; - compatible = "fsl,ucc-mdio"; - - qe_phy0: ethernet-phy@07 { - interrupt-parent = <&mpic>; - interrupts = <1 1 0 0>; - reg = <0x7>; - device_type = "ethernet-phy"; - }; - qe_phy1: ethernet-phy@01 { - interrupt-parent = <&mpic>; - interrupts = <2 1 0 0>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - qe_phy2: ethernet-phy@02 { - interrupt-parent = <&mpic>; - interrupts = <3 1 0 0>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - qe_phy3: ethernet-phy@03 { - interrupt-parent = <&mpic>; - interrupts = <4 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - qe_phy5: ethernet-phy@04 { - reg = <0x04>; - device_type = "ethernet-phy"; - }; - qe_phy7: ethernet-phy@06 { - reg = <0x6>; - device_type = "ethernet-phy"; - }; - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - mdio@3520 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3520 0x18>; - compatible = "fsl,ucc-mdio"; - - tbi6: tbi-phy@15 { - reg = <0x15>; - device_type = "tbi-phy"; - }; - }; - mdio@3720 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3720 0x38>; - compatible = "fsl,ucc-mdio"; - tbi8: tbi-phy@17 { - reg = <0x17>; - device_type = "tbi-phy"; - }; - }; - - enet2: ucc@2200 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk12"; - pio-handle = <&pio3>; - tbi-handle = <&tbi3>; - phy-handle = <&qe_phy2>; - phy-connection-type = "rgmii-id"; - }; - - mdio@2320 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2320 0x18>; - compatible = "fsl,ucc-mdio"; - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet1: ucc@3000 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk17"; - pio-handle = <&pio2>; - tbi-handle = <&tbi2>; - phy-handle = <&qe_phy1>; - phy-connection-type = "rgmii-id"; - }; - - mdio@3120 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3120 0x18>; - compatible = "fsl,ucc-mdio"; - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet3: ucc@3200 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk17"; - pio-handle = <&pio4>; - tbi-handle = <&tbi4>; - phy-handle = <&qe_phy3>; - phy-connection-type = "rgmii-id"; - }; - - mdio@3320 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x3320 0x18>; - compatible = "fsl,ucc-mdio"; - tbi4: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet5: ucc@3400 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "none"; - tbi-handle = <&tbi6>; - phy-handle = <&qe_phy5>; - phy-connection-type = "sgmii"; - }; - - enet7: ucc@3600 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "none"; - tbi-handle = <&tbi8>; - phy-handle = <&qe_phy7>; - phy-connection-type = "sgmii"; - }; - }; - - /* PCI Express */ - pci1: pcie@e000a000 { - reg = <0x0 0xe000a000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x00800000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x800000>; - }; - }; - - rio: rapidio@e00c00000 { - reg = <0x0 0xe00c0000 0x0 0x20000>; - port1 { - ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; - }; - port2 { - status = "disabled"; - }; - }; -}; - -/include/ "fsl/mpc8569si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dts deleted file mode 100644 index 0c9f2955..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dts +++ /dev/null @@ -1,90 +0,0 @@ -/* - * MPC8572 DS Device Tree Source - * - * Copyright 2007-2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8572si-pre.dtsi" - -/ { - model = "fsl,MPC8572DS"; - compatible = "fsl,MPC8572DS"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 - 0x1 0x0 0x0 0xe0000000 0x08000000 - 0x2 0x0 0x0 0xffa00000 0x00040000 - 0x3 0x0 0x0 0xffdf0000 0x00008000 - 0x4 0x0 0x0 0xffa40000 0x00040000 - 0x5 0x0 0x0 0xffa80000 0x00040000 - 0x6 0x0 0x0 0xffac0000 0x00040000>; - }; - - board_soc: soc: soc8572@ffe00000 { - ranges = <0x0 0 0xffe00000 0x100000>; - }; - - board_pci0: pci0: pcie@ffe08000 { - reg = <0 0xffe08000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci1: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci2: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; - -/* - * mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask - */ - -/include/ "fsl/mpc8572si-post.dtsi" -/include/ "mpc8572ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dtsi deleted file mode 100644 index 14178944..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds.dtsi +++ /dev/null @@ -1,411 +0,0 @@ -/* - * MPC8572DS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - reg = <0x0 0x03000000>; - label = "ramdisk-nor"; - }; - - partition@3000000 { - reg = <0x03000000 0x00e00000>; - label = "diagnostic-nor"; - read-only; - }; - - partition@3e00000 { - reg = <0x03e00000 0x00200000>; - label = "dink-nor"; - read-only; - }; - - partition@4000000 { - reg = <0x04000000 0x00400000>; - label = "kernel-nor"; - }; - - partition@4400000 { - reg = <0x04400000 0x03b00000>; - label = "fs-nor"; - }; - - partition@7f00000 { - reg = <0x07f00000 0x00060000>; - label = "dtb-nor"; - }; - - partition@7f60000 { - reg = <0x07f60000 0x00020000>; - label = "env-nor"; - read-only; - }; - - partition@7f80000 { - reg = <0x07f80000 0x00080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - reg = <0x0 0x02000000>; - label = "u-boot-nand"; - read-only; - }; - - partition@2000000 { - reg = <0x02000000 0x10000000>; - label = "fs-nand"; - }; - - partition@12000000 { - reg = <0x12000000 0x08000000>; - label = "ramdisk-nand"; - }; - - partition@1a000000 { - reg = <0x1a000000 0x04000000>; - label = "kernel-nand"; - }; - - partition@1e000000 { - reg = <0x1e000000 0x01000000>; - label = "dtb-nand"; - }; - - partition@1f000000 { - reg = <0x1f000000 0x21000000>; - label = "empty-nand"; - }; - }; - - nand@4,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x4 0x0 0x40000>; - }; - - nand@5,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x5 0x0 0x40000>; - }; - - nand@6,0 { - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x6 0x0 0x40000>; - }; -}; - -&board_soc { - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <10 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <10 1 0 0>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupts = <10 1 0 0>; - reg = <0x2>; - }; - phy3: ethernet-phy@3 { - interrupts = <10 1 0 0>; - reg = <0x3>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - ptp_clock@24e00 { - fsl,tclk-period = <5>; - fsl,tmr-prsc = <200>; - fsl,tmr-add = <0xAAAAAAAB>; - fsl,tmr-fiper1 = <0x3B9AC9FB>; - fsl,tmr-fiper2 = <0x3B9AC9FB>; - fsl,max-adj = <499999999>; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - - }; - mdio@26520 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet3: ethernet@27000 { - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - }; - - mdio@27520 { - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; -}; - -&board_pci0 { - pcie@0 { - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x11 func 0 - PCI slot 1 */ - 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 1 - PCI slot 1 */ - 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 2 - PCI slot 1 */ - 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 3 - PCI slot 1 */ - 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 4 - PCI slot 1 */ - 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 5 - PCI slot 1 */ - 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 6 - PCI slot 1 */ - 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x11 func 7 - PCI slot 1 */ - 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0 - 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0 - 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0 - 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0 - - /* IDSEL 0x12 func 0 - PCI slot 2 */ - 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 1 - PCI slot 2 */ - 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 2 - PCI slot 2 */ - 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 3 - PCI slot 2 */ - 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 4 - PCI slot 2 */ - 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 5 - PCI slot 2 */ - 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 6 - PCI slot 2 */ - 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - /* IDSEL 0x12 func 7 - PCI slot 2 */ - 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 0 0 - 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 0 0 - 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 0 0 - 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 0 0 - - // IDSEL 0x1c USB - 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2 - 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2 - 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2 - 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2 - - // IDSEL 0x1d Audio - 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 - - // IDSEL 0x1e Legacy - 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 - 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 - 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 - >; - - - uli1575@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 - 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2 0 0>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <0x1 0x60 0x1 0x1 0x64 0x1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0x0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <0x1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - - gpio@400 { - reg = <0x1 0x400 0x80>; - }; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_36b.dts deleted file mode 100644 index 6c3d0b30..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_36b.dts +++ /dev/null @@ -1,90 +0,0 @@ -/* - * MPC8572DS Device Tree Source (36-bit address map) - * - * Copyright 2007-2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/mpc8572si-pre.dtsi" - -/ { - model = "fsl,MPC8572DS"; - compatible = "fsl,MPC8572DS"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 - 0x1 0x0 0xf 0xe0000000 0x08000000 - 0x2 0x0 0xf 0xffa00000 0x00040000 - 0x3 0x0 0xf 0xffdf0000 0x00008000 - 0x4 0x0 0xf 0xffa40000 0x00040000 - 0x5 0x0 0xf 0xffa80000 0x00040000 - 0x6 0x0 0xf 0xffac0000 0x00040000>; - }; - - board_soc: soc: soc8572@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - board_pci0: pci0: pcie@fffe08000 { - reg = <0xf 0xffe08000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci1: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci2: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x00010000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; - -/* - * mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask - */ - -/include/ "fsl/mpc8572si-post.dtsi" -/include/ "mpc8572ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts deleted file mode 100644 index d34d1271..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts +++ /dev/null @@ -1,82 +0,0 @@ -/* - * MPC8572 DS Core0 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0, - * eth1, crypto, pci0, pci1. - * - * Copyright 2007-2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc8572ds.dts" - -/ { - model = "fsl,MPC8572DS"; - compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP"; - - cpus { - PowerPC,8572@0 { - }; - PowerPC,8572@1 { - status = "disabled"; - }; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc8572@ffe00000 { - serial@4600 { - status = "disabled"; - }; - dma@c300 { - status = "disabled"; - }; - gpio-controller@f000 { - }; - l2-cache-controller@20000 { - cache-size = <0x80000>; // L2, 512K - }; - ethernet@26000 { - status = "disabled"; - }; - mdio@26520 { - status = "disabled"; - }; - ethernet@27000 { - status = "disabled"; - }; - mdio@27520 { - status = "disabled"; - }; - pic@40000 { - protected-sources = < - 31 32 33 37 38 39 /* enet2 enet3 */ - 76 77 78 79 26 42 /* dma2 pci2 serial*/ - 0xe4 0xe5 0xe6 0xe7 /* msi */ - >; - }; - - msi@41600 { - msi-available-ranges = <0 0x80>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0>; - }; - timer@42100 { - status = "disabled"; - }; - }; - pcie@ffe0a000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts deleted file mode 100644 index d6a8fafc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts +++ /dev/null @@ -1,118 +0,0 @@ -/* - * MPC8572 DS Core1 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts allows core1 to have l2, dma2, eth2, eth3, pci2, msi. - * - * Please note to add "-b 1" for core1's dts compiling. - * - * Copyright 2007-2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc8572ds.dts" - -/ { - model = "fsl,MPC8572DS"; - compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP"; - - cpus { - PowerPC,8572@0 { - status = "disabled"; - }; - PowerPC,8572@1 { - }; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc8572@ffe00000 { - ecm-law@0 { - status = "disabled"; - }; - ecm@1000 { - status = "disabled"; - }; - memory-controller@2000 { - status = "disabled"; - }; - memory-controller@6000 { - status = "disabled"; - }; - i2c@3000 { - status = "disabled"; - }; - i2c@3100 { - status = "disabled"; - }; - serial@4500 { - status = "disabled"; - }; - gpio-controller@f000 { - status = "disabled"; - }; - l2-cache-controller@20000 { - cache-size = <0x80000>; // L2, 512K - }; - dma@21300 { - status = "disabled"; - }; - ethernet@24000 { - status = "disabled"; - }; - mdio@24520 { - status = "disabled"; - }; - ptp_clock@24e00 { - status = "disabled"; - }; - ethernet@25000 { - status = "disabled"; - }; - mdio@25520 { - status = "disabled"; - }; - crypto@30000 { - status = "disabled"; - }; - pic@40000 { - protected-sources = < - 18 16 10 42 45 58 /* MEM L2 mdio serial crypto */ - 29 30 34 35 36 40 /* enet0 enet1 */ - 24 25 20 21 22 23 /* pci0 pci1 dma1 */ - 43 /* i2c */ - 0x1 0x2 0x3 0x4 /* pci slot */ - 0x9 0xa 0xb 0xc /* usb */ - 0x6 0x7 0xe 0x5 /* Audio elgacy SATA */ - 0xe0 0xe1 0xe2 0xe3 /* msi */ - >; - }; - timer@41100 { - status = "disabled"; - }; - msi@41600 { - msi-available-ranges = <0x80 0x80>; - interrupts = < - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - }; - global-utilities@e0000 { - status = "disabled"; - }; - }; - pcie@ffe08000 { - status = "disabled"; - }; - pcie@ffe09000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8610_hpcd.dts deleted file mode 100644 index 6a109a0c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8610_hpcd.dts +++ /dev/null @@ -1,506 +0,0 @@ -/* - * MPC8610 HPCD Device Tree Source - * - * Copyright 2007-2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License Version 2 as published - * by the Free Software Foundation. - */ - -/dts-v1/; - -/ { - model = "MPC8610HPCD"; - compatible = "fsl,MPC8610HPCD"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8610@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; // L1 - i-cache-size = <32768>; // L1 - sleep = <&pmc 0x00008000 0 // core - &pmc 0x00004000 0>; // timebase - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512M at 0x0 - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8610-elbc", "fsl,elbc", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - ranges = <0 0 0xf8000000 0x08000000 - 1 0 0xf0000000 0x08000000 - 2 0 0xe8400000 0x00008000 - 4 0 0xe8440000 0x00008000 - 5 0 0xe8480000 0x00008000 - 6 0 0xe84c0000 0x00008000 - 3 0 0xe8000000 0x00000020>; - sleep = <&pmc 0x08000000 0>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x8000000>; - bank-width = <2>; - device-width = <1>; - }; - - flash@1,0 { - compatible = "cfi-flash"; - reg = <1 0 0x8000000>; - bank-width = <2>; - device-width = <1>; - }; - - flash@2,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x8000>; - }; - - flash@4,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <4 0 0x8000>; - }; - - flash@5,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <5 0 0x8000>; - }; - - flash@6,0 { - compatible = "fsl,mpc8610-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <6 0 0x8000>; - }; - - board-control@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,fpga-pixis"; - reg = <3 0 0x20>; - ranges = <0 3 0 0x20>; - interrupt-parent = <&mpic>; - interrupts = <8 8>; - - sdcsr_pio: gpio-controller@a { - #gpio-cells = <2>; - compatible = "fsl,fpga-pixis-gpio-bank"; - reg = <0xa 1>; - gpio-controller; - }; - }; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - device_type = "soc"; - compatible = "fsl,mpc8610-immr", "simple-bus"; - ranges = <0x0 0xe0000000 0x00100000>; - bus-frequency = <0>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8610-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - cs4270:codec@4f { - compatible = "cirrus,cs4270"; - reg = <0x4f>; - /* MCLK source is a stand-alone oscillator */ - clock-frequency = <12288000>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x00000004 0>; - dfsrr; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x00000002 0>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x00000008 0>; - }; - - spi@7000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8610-spi", "fsl,spi"; - reg = <0x7000 0x40>; - cell-index = <0>; - interrupts = <59 2>; - interrupt-parent = <&mpic>; - mode = "cpu"; - gpios = <&sdcsr_pio 7 0>; - sleep = <&pmc 0x00000800 0>; - - mmc-slot@0 { - compatible = "fsl,mpc8610hpcd-mmc-slot", - "mmc-spi-slot"; - reg = <0>; - gpios = <&sdcsr_pio 0 1 /* nCD */ - &sdcsr_pio 1 0>; /* WP */ - voltage-ranges = <3300 3300>; - spi-max-frequency = <50000000>; - }; - }; - - display@2c000 { - compatible = "fsl,diu"; - reg = <0x2c000 100>; - interrupts = <72 2>; - interrupt-parent = <&mpic>; - sleep = <&pmc 0x04000000 0>; - }; - - mpic: interrupt-controller@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - msi@41600 { - compatible = "fsl,mpc8610-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8610-guts"; - reg = <0xe0000 0x1000>; - ranges = <0 0xe0000 0x1000>; - fsl,has-rstcr; - - pmc: power@70 { - compatible = "fsl,mpc8610-pmc", - "fsl,mpc8641d-pmc"; - reg = <0x70 0x20>; - }; - }; - - wdt@e4000 { - compatible = "fsl,mpc8610-wdt"; - reg = <0xe4000 0x100>; - }; - - ssi@16000 { - compatible = "fsl,mpc8610-ssi"; - cell-index = <0>; - reg = <0x16000 0x100>; - interrupt-parent = <&mpic>; - interrupts = <62 2>; - fsl,mode = "i2s-slave"; - codec-handle = <&cs4270>; - fsl,playback-dma = <&dma00>; - fsl,capture-dma = <&dma01>; - fsl,fifo-depth = <8>; - sleep = <&pmc 0 0x08000000>; - }; - - ssi@16100 { - compatible = "fsl,mpc8610-ssi"; - status = "disabled"; - cell-index = <1>; - reg = <0x16100 0x100>; - interrupt-parent = <&mpic>; - interrupts = <63 2>; - fsl,fifo-depth = <8>; - sleep = <&pmc 0 0x04000000>; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma"; - cell-index = <0>; - reg = <0x21300 0x4>; /* DMA general status register */ - ranges = <0x0 0x21100 0x200>; - sleep = <&pmc 0x00000400 0>; - - dma00: dma-channel@0 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,ssi-dma-channel"; - cell-index = <0>; - reg = <0x0 0x80>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma01: dma-channel@1 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,ssi-dma-channel"; - cell-index = <1>; - reg = <0x80 0x80>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@2 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <2>; - reg = <0x100 0x80>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@3 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <3>; - reg = <0x180 0x80>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma"; - cell-index = <1>; - reg = <0xc300 0x4>; /* DMA general status register */ - ranges = <0x0 0xc100 0x200>; - sleep = <&pmc 0x00000200 0>; - - dma-channel@0 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <0>; - reg = <0x0 0x80>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@1 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <1>; - reg = <0x80 0x80>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@2 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <2>; - reg = <0x100 0x80>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@3 { - compatible = "fsl,mpc8610-dma-channel", - "fsl,eloplus-dma-channel"; - cell-index = <3>; - reg = <0x180 0x80>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - }; - - pci0: pci@e0008000 { - compatible = "fsl,mpc8610-pci"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe1000000 0x0 0x00100000>; - sleep = <&pmc 0x80000000 0>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x11 */ - 0x8800 0 0 1 &mpic 4 1 - 0x8800 0 0 2 &mpic 5 1 - 0x8800 0 0 3 &mpic 6 1 - 0x8800 0 0 4 &mpic 7 1 - - /* IDSEL 0x12 */ - 0x9000 0 0 1 &mpic 5 1 - 0x9000 0 0 2 &mpic 6 1 - 0x9000 0 0 3 &mpic 7 1 - 0x9000 0 0 4 &mpic 4 1 - >; - }; - - pci1: pcie@e000a000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe000a000 0x1000>; - bus-range = <1 3>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>; - sleep = <&pmc 0x40000000 0>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0 0 7>; - - interrupt-map = < - /* IDSEL 0x1b */ - 0xd800 0 0 1 &mpic 2 1 - - /* IDSEL 0x1c*/ - 0xe000 0 0 1 &mpic 1 1 - 0xe000 0 0 2 &mpic 1 1 - 0xe000 0 0 3 &mpic 1 1 - 0xe000 0 0 4 &mpic 1 1 - - /* IDSEL 0x1f */ - 0xf800 0 0 1 &mpic 3 2 - 0xf800 0 0 2 &mpic 0 1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x10000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00100000>; - uli1575@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x10000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00100000>; - - isa@1e { - device_type = "isa"; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0 0 0 0>; - ranges = <1 0 0x01000000 0 0 - 0x00001000>; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <1 0x70 2>; - }; - }; - }; - }; - }; - - pci2: pcie@e0009000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "fsl,mpc8641-pcie"; - reg = <0xe0009000 0x00001000>; - ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>; - bus-range = <0 255>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0x0000 0 0 1 &mpic 4 1 - 0x0000 0 0 2 &mpic 5 1 - 0x0000 0 0 3 &mpic 6 1 - 0x0000 0 0 4 &mpic 7 1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - sleep = <&pmc 0x20000000 0>; - clock-frequency = <33333333>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn.dts deleted file mode 100644 index 1e8666cc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ /dev/null @@ -1,667 +0,0 @@ -/* - * MPC8641 HPCN Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8641HPCN"; - compatible = "fsl,mpc8641hpcn"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; // L1 - i-cache-size = <32768>; // L1 - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x40000000>; // 1G at 0x0 - }; - - localbus@ffe05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0xffe05000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xef800000 0x00800000 - 2 0 0xffdf8000 0x00008000 - 3 0 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x00800000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00300000>; - }; - partition@300000 { - label = "firmware b"; - reg = <0x00300000 0x00100000>; - read-only; - }; - partition@400000 { - label = "fs"; - reg = <0x00400000 0x00300000>; - }; - partition@700000 { - label = "firmware a"; - reg = <0x00700000 0x00100000>; - read-only; - }; - }; - }; - - soc8641@ffe00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x00000000 0xffe00000 0x00100000>; - bus-frequency = <0>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <28 2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - rmu: rmu@d3000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,srio-rmu"; - reg = <0xd3000 0x500>; - ranges = <0x0 0xd3000 0x500>; - - message-unit@0 { - compatible = "fsl,srio-msg-unit"; - reg = <0x0 0x100>; - interrupts = < - 53 2 /* msg1_tx_irq */ - 54 2>;/* msg1_rx_irq */ - }; - message-unit@100 { - compatible = "fsl,srio-msg-unit"; - reg = <0x100 0x100>; - interrupts = < - 55 2 /* msg2_tx_irq */ - 56 2>;/* msg2_rx_irq */ - }; - doorbell-unit@400 { - compatible = "fsl,srio-dbell-unit"; - reg = <0x400 0x80>; - interrupts = < - 49 2 /* bell_outb_irq */ - 50 2>;/* bell_inb_irq */ - }; - port-write-unit@4e0 { - compatible = "fsl,srio-port-write-unit"; - reg = <0x4e0 0x20>; - interrupts = <48 2>; - }; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@ffe08000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xffe08000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xff00 0 0 7>; - interrupt-map = < - /* IDSEL 0x11 func 0 - PCI slot 1 */ - 0x8800 0 0 1 &mpic 2 1 - 0x8800 0 0 2 &mpic 3 1 - 0x8800 0 0 3 &mpic 4 1 - 0x8800 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 1 - PCI slot 1 */ - 0x8900 0 0 1 &mpic 2 1 - 0x8900 0 0 2 &mpic 3 1 - 0x8900 0 0 3 &mpic 4 1 - 0x8900 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 2 - PCI slot 1 */ - 0x8a00 0 0 1 &mpic 2 1 - 0x8a00 0 0 2 &mpic 3 1 - 0x8a00 0 0 3 &mpic 4 1 - 0x8a00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 3 - PCI slot 1 */ - 0x8b00 0 0 1 &mpic 2 1 - 0x8b00 0 0 2 &mpic 3 1 - 0x8b00 0 0 3 &mpic 4 1 - 0x8b00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 4 - PCI slot 1 */ - 0x8c00 0 0 1 &mpic 2 1 - 0x8c00 0 0 2 &mpic 3 1 - 0x8c00 0 0 3 &mpic 4 1 - 0x8c00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 5 - PCI slot 1 */ - 0x8d00 0 0 1 &mpic 2 1 - 0x8d00 0 0 2 &mpic 3 1 - 0x8d00 0 0 3 &mpic 4 1 - 0x8d00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 6 - PCI slot 1 */ - 0x8e00 0 0 1 &mpic 2 1 - 0x8e00 0 0 2 &mpic 3 1 - 0x8e00 0 0 3 &mpic 4 1 - 0x8e00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 7 - PCI slot 1 */ - 0x8f00 0 0 1 &mpic 2 1 - 0x8f00 0 0 2 &mpic 3 1 - 0x8f00 0 0 3 &mpic 4 1 - 0x8f00 0 0 4 &mpic 1 1 - - /* IDSEL 0x12 func 0 - PCI slot 2 */ - 0x9000 0 0 1 &mpic 3 1 - 0x9000 0 0 2 &mpic 4 1 - 0x9000 0 0 3 &mpic 1 1 - 0x9000 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 1 - PCI slot 2 */ - 0x9100 0 0 1 &mpic 3 1 - 0x9100 0 0 2 &mpic 4 1 - 0x9100 0 0 3 &mpic 1 1 - 0x9100 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 2 - PCI slot 2 */ - 0x9200 0 0 1 &mpic 3 1 - 0x9200 0 0 2 &mpic 4 1 - 0x9200 0 0 3 &mpic 1 1 - 0x9200 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 3 - PCI slot 2 */ - 0x9300 0 0 1 &mpic 3 1 - 0x9300 0 0 2 &mpic 4 1 - 0x9300 0 0 3 &mpic 1 1 - 0x9300 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 4 - PCI slot 2 */ - 0x9400 0 0 1 &mpic 3 1 - 0x9400 0 0 2 &mpic 4 1 - 0x9400 0 0 3 &mpic 1 1 - 0x9400 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 5 - PCI slot 2 */ - 0x9500 0 0 1 &mpic 3 1 - 0x9500 0 0 2 &mpic 4 1 - 0x9500 0 0 3 &mpic 1 1 - 0x9500 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 6 - PCI slot 2 */ - 0x9600 0 0 1 &mpic 3 1 - 0x9600 0 0 2 &mpic 4 1 - 0x9600 0 0 3 &mpic 1 1 - 0x9600 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 7 - PCI slot 2 */ - 0x9700 0 0 1 &mpic 3 1 - 0x9700 0 0 2 &mpic 4 1 - 0x9700 0 0 3 &mpic 1 1 - 0x9700 0 0 4 &mpic 2 1 - - // IDSEL 0x1c USB - 0xe000 0 0 1 &i8259 12 2 - 0xe100 0 0 2 &i8259 9 2 - 0xe200 0 0 3 &i8259 10 2 - 0xe300 0 0 4 &i8259 11 2 - - // IDSEL 0x1d Audio - 0xe800 0 0 1 &i8259 6 2 - - // IDSEL 0x1e Legacy - 0xf000 0 0 1 &i8259 7 2 - 0xf100 0 0 1 &i8259 7 2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0 0 1 &i8259 14 2 - 0xf900 0 0 1 &i8259 5 2 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - uli1575@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x20000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0 0 0 0>; - ranges = <1 0 0x01000000 0 0 - 0x00001000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <1 0x20 2 - 1 0xa0 2 - 1 0x4d0 2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <1 0x60 1 1 0x64 1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = - "pnpPNP,b00"; - reg = <1 0x70 2>; - }; - - gpio@400 { - reg = <1 0x400 0x80>; - }; - }; - }; - }; - - }; - - pci1: pcie@ffe09000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xffe09000 0x1000>; - bus-range = <0 0xff>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0000 0 0 1 &mpic 4 1 - 0x0000 0 0 2 &mpic 5 1 - 0x0000 0 0 3 &mpic 6 1 - 0x0000 0 0 4 &mpic 7 1 - >; - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - }; - }; -/* - * Only one of Rapid IO or PCI can be present due to HW limitations and - * due to the fact that the 2 now share address space in the new memory - * map. The most likely case is that we have PCI, so comment out the - * rapidio node. Leave it here for reference. - - rapidio@ffec0000 { - reg = <0xffec0000 0x11000>; - compatible = "fsl,srio"; - interrupt-parent = <&mpic>; - interrupts = <48 2>; - #address-cells = <2>; - #size-cells = <2>; - fsl,srio-rmu-handle = <&rmu>; - ranges; - - port1 { - #address-cells = <2>; - #size-cells = <2>; - cell-index = <1>; - ranges = <0 0 0x80000000 0 0x20000000>; - }; - }; -*/ - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts deleted file mode 100644 index fd4cd4da..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts +++ /dev/null @@ -1,609 +0,0 @@ -/* - * MPC8641 HPCN Device Tree Source - * - * Copyright 2008-2009 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC8641HPCN"; - compatible = "fsl,mpc8641hpcn"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <32768>; // L1, 32K - i-cache-size = <32768>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0 - }; - - localbus@fffe05000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0x0f 0xffe05000 0x0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xf 0xef800000 0x00800000 - 2 0 0xf 0xffdf8000 0x00008000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x00800000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00300000>; - }; - partition@300000 { - label = "firmware b"; - reg = <0x00300000 0x00100000>; - read-only; - }; - partition@400000 { - label = "fs"; - reg = <0x00400000 0x00300000>; - }; - partition@700000 { - label = "firmware a"; - reg = <0x00700000 0x00100000>; - read-only; - }; - }; - }; - - soc8641@fffe00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x00000000 0x0f 0xffe00000 0x00100000>; - bus-frequency = <0>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <28 2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@fffe08000 { - cell-index = <0>; - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x0f 0xffe08000 0x0 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0xe0000000 0x0c 0x00000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0x0f 0xffc00000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xff00 0 0 7>; - interrupt-map = < - /* IDSEL 0x11 func 0 - PCI slot 1 */ - 0x8800 0 0 1 &mpic 2 1 - 0x8800 0 0 2 &mpic 3 1 - 0x8800 0 0 3 &mpic 4 1 - 0x8800 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 1 - PCI slot 1 */ - 0x8900 0 0 1 &mpic 2 1 - 0x8900 0 0 2 &mpic 3 1 - 0x8900 0 0 3 &mpic 4 1 - 0x8900 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 2 - PCI slot 1 */ - 0x8a00 0 0 1 &mpic 2 1 - 0x8a00 0 0 2 &mpic 3 1 - 0x8a00 0 0 3 &mpic 4 1 - 0x8a00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 3 - PCI slot 1 */ - 0x8b00 0 0 1 &mpic 2 1 - 0x8b00 0 0 2 &mpic 3 1 - 0x8b00 0 0 3 &mpic 4 1 - 0x8b00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 4 - PCI slot 1 */ - 0x8c00 0 0 1 &mpic 2 1 - 0x8c00 0 0 2 &mpic 3 1 - 0x8c00 0 0 3 &mpic 4 1 - 0x8c00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 5 - PCI slot 1 */ - 0x8d00 0 0 1 &mpic 2 1 - 0x8d00 0 0 2 &mpic 3 1 - 0x8d00 0 0 3 &mpic 4 1 - 0x8d00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 6 - PCI slot 1 */ - 0x8e00 0 0 1 &mpic 2 1 - 0x8e00 0 0 2 &mpic 3 1 - 0x8e00 0 0 3 &mpic 4 1 - 0x8e00 0 0 4 &mpic 1 1 - - /* IDSEL 0x11 func 7 - PCI slot 1 */ - 0x8f00 0 0 1 &mpic 2 1 - 0x8f00 0 0 2 &mpic 3 1 - 0x8f00 0 0 3 &mpic 4 1 - 0x8f00 0 0 4 &mpic 1 1 - - /* IDSEL 0x12 func 0 - PCI slot 2 */ - 0x9000 0 0 1 &mpic 3 1 - 0x9000 0 0 2 &mpic 4 1 - 0x9000 0 0 3 &mpic 1 1 - 0x9000 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 1 - PCI slot 2 */ - 0x9100 0 0 1 &mpic 3 1 - 0x9100 0 0 2 &mpic 4 1 - 0x9100 0 0 3 &mpic 1 1 - 0x9100 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 2 - PCI slot 2 */ - 0x9200 0 0 1 &mpic 3 1 - 0x9200 0 0 2 &mpic 4 1 - 0x9200 0 0 3 &mpic 1 1 - 0x9200 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 3 - PCI slot 2 */ - 0x9300 0 0 1 &mpic 3 1 - 0x9300 0 0 2 &mpic 4 1 - 0x9300 0 0 3 &mpic 1 1 - 0x9300 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 4 - PCI slot 2 */ - 0x9400 0 0 1 &mpic 3 1 - 0x9400 0 0 2 &mpic 4 1 - 0x9400 0 0 3 &mpic 1 1 - 0x9400 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 5 - PCI slot 2 */ - 0x9500 0 0 1 &mpic 3 1 - 0x9500 0 0 2 &mpic 4 1 - 0x9500 0 0 3 &mpic 1 1 - 0x9500 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 6 - PCI slot 2 */ - 0x9600 0 0 1 &mpic 3 1 - 0x9600 0 0 2 &mpic 4 1 - 0x9600 0 0 3 &mpic 1 1 - 0x9600 0 0 4 &mpic 2 1 - - /* IDSEL 0x12 func 7 - PCI slot 2 */ - 0x9700 0 0 1 &mpic 3 1 - 0x9700 0 0 2 &mpic 4 1 - 0x9700 0 0 3 &mpic 1 1 - 0x9700 0 0 4 &mpic 2 1 - - // IDSEL 0x1c USB - 0xe000 0 0 1 &i8259 12 2 - 0xe100 0 0 2 &i8259 9 2 - 0xe200 0 0 3 &i8259 10 2 - 0xe300 0 0 4 &i8259 11 2 - - // IDSEL 0x1d Audio - 0xe800 0 0 1 &i8259 6 2 - - // IDSEL 0x1e Legacy - 0xf000 0 0 1 &i8259 7 2 - 0xf100 0 0 1 &i8259 7 2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0 0 1 &i8259 14 2 - 0xf900 0 0 1 &i8259 5 2 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - uli1575@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x20000000 - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0 0 0 0>; - ranges = <1 0 0x01000000 0 0 - 0x00001000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <1 0x20 2 - 1 0xa0 2 - 1 0x4d0 2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <9 2>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <1 0x60 1 1 0x64 1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = - "pnpPNP,b00"; - reg = <1 0x70 2>; - }; - - gpio@400 { - reg = <1 0x400 0x80>; - }; - }; - }; - }; - - }; - - pci1: pcie@fffe09000 { - cell-index = <1>; - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0x0f 0xffe09000 0x0 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0xe0000000 0x0c 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0x0f 0xffc10000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0000 0 0 1 &mpic 4 1 - 0x0000 0 0 2 &mpic 5 1 - 0x0000 0 0 3 &mpic 6 1 - 0x0000 0 0 4 &mpic 7 1 - >; - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00010000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc866ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc866ads.dts deleted file mode 100644 index bd700651..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc866ads.dts +++ /dev/null @@ -1,191 +0,0 @@ -/* - * MPC866 ADS Device Tree Source - * - * Copyright 2006 MontaVista Software, Inc. - * Copyright 2008 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC866ADS"; - compatible = "fsl,mpc866ads"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,866@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <16>; // 16 bytes - i-cache-line-size = <16>; // 16 bytes - d-cache-size = <0x2000>; // L1, 8K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x800000>; - }; - - localbus@ff000100 { - compatible = "fsl,mpc866-localbus", "fsl,pq1-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xff000100 0x40>; - - ranges = < - 0x1 0x0 0xff080000 0x8000 - 0x5 0x0 0xff0a0000 0x8000 - >; - - board-control@1,0 { - reg = <0x1 0x0 0x20 0x5 0x300 0x4>; - compatible = "fsl,mpc866ads-bcsr"; - }; - }; - - soc@ff000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xff000000 0x100000>; - reg = <0xff000000 0x200>; - bus-frequency = <0>; - - mdio@e00 { - compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - PHY: ethernet-phy@f { - reg = <0xf>; - device_type = "ethernet-phy"; - }; - }; - - ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc866-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY>; - linux,network-index = <0>; - }; - - PIC: pic@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x0 0x24>; - compatible = "fsl,mpc866-pic", "fsl,pq1-pic"; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc866-cpm", "fsl,cpm1"; - ranges; - reg = <0x9c0 0x40>; - brg-frequency = <0>; - interrupts = <0 2>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - - muram@2000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x1c00>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc866-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - reg = <0x9f0 0x10>; - clock-frequency = <0>; - }; - - CPM_PIC: pic@930 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc866-cpm-pic", - "fsl,cpm1-pic"; - }; - - - serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc866-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x90>; - }; - - serial@a90 { - device_type = "serial"; - compatible = "fsl,mpc866-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa90 0x10 0x3f80 0x40>; - interrupts = <3>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0xd0>; - }; - - ethernet@a00 { - device_type = "network"; - compatible = "fsl,mpc866-scc-enet", - "fsl,cpm1-scc-enet"; - reg = <0xa00 0x18 0x3c00 0x100>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <30>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-command = <0000>; - linux,network-index = <1>; - }; - - i2c@860 { - compatible = "fsl,mpc866-i2c", - "fsl,cpm1-i2c"; - reg = <0x860 0x20 0x3c80 0x30>; - interrupts = <16>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-command = <0x10>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - }; - - chosen { - linux,stdout-path = "/soc/cpm/serial@a80"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc885ads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc885ads.dts deleted file mode 100644 index b123e9f7..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mpc885ads.dts +++ /dev/null @@ -1,235 +0,0 @@ -/* - * MPC885 ADS Device Tree Source - * - * Copyright 2006 MontaVista Software, Inc. - * Copyright 2007,2008 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "MPC885ADS"; - compatible = "fsl,mpc885ads"; - #address-cells = <1>; - #size-cells = <1>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,885@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <16>; - i-cache-line-size = <16>; - d-cache-size = <8192>; - i-cache-size = <8192>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; - }; - - localbus@ff000100 { - compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xff000100 0x40>; - - ranges = < - 0x0 0x0 0xfe000000 0x800000 - 0x1 0x0 0xff080000 0x8000 - 0x5 0x0 0xff0a0000 0x8000 - >; - - flash@0,0 { - compatible = "jedec-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <4>; - device-width = <1>; - }; - - board-control@1,0 { - reg = <0x1 0x0 0x20 0x5 0x300 0x4>; - compatible = "fsl,mpc885ads-bcsr"; - }; - }; - - soc@ff000000 { - compatible = "fsl,mpc885", "fsl,pq1-soc"; - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xff000000 0x4000>; - bus-frequency = <0>; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xff000000 0x4000>; - - mdio@e00 { - compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - - PHY0: ethernet-phy@0 { - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - PHY2: ethernet-phy@2 { - reg = <0x2>; - device_type = "ethernet-phy"; - }; - }; - - ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc885-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - }; - - ethernet@1e00 { - device_type = "network"; - compatible = "fsl,mpc885-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0x1e00 0x188>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <7 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - }; - - PIC: interrupt-controller@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x0 0x24>; - compatible = "fsl,mpc885-pic", "fsl,pq1-pic"; - }; - - pcmcia@80 { - #address-cells = <3>; - #interrupt-cells = <1>; - #size-cells = <2>; - compatible = "fsl,pq-pcmcia"; - device_type = "pcmcia"; - reg = <0x80 0x80>; - interrupt-parent = <&PIC>; - interrupts = <13 1>; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc885-cpm", "fsl,cpm1"; - command-proc = <0x9c0>; - interrupts = <0>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - reg = <0x9c0 0x40>; - ranges; - - muram@2000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x1c00>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc885-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - clock-frequency = <0>; - reg = <0x9f0 0x10>; - }; - - CPM_PIC: interrupt-controller@930 { - interrupt-controller; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc885-cpm-pic", - "fsl,cpm1-pic"; - }; - - serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc885-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x90>; - }; - - serial@a90 { - device_type = "serial"; - compatible = "fsl,mpc885-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa90 0x10 0x3f80 0x40>; - interrupts = <3>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0xd0>; - }; - - ethernet@a40 { - device_type = "network"; - compatible = "fsl,mpc885-scc-enet", - "fsl,cpm1-scc-enet"; - reg = <0xa40 0x18 0x3e00 0x100>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <28>; - interrupt-parent = <&CPM_PIC>; - phy-handle = <&PHY2>; - fsl,cpm-command = <0x80>; - linux,network-index = <2>; - }; - - i2c@860 { - compatible = "fsl,mpc885-i2c", - "fsl,cpm1-i2c"; - reg = <0x860 0x20 0x3c80 0x30>; - interrupts = <16>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-command = <0x10>; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - }; - - chosen { - linux,stdout-path = "/soc/cpm/serial@a80"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/mucmc52.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/mucmc52.dts deleted file mode 100644 index 21d34720..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/mucmc52.dts +++ /dev/null @@ -1,250 +0,0 @@ -/* - * Manroland mucmc52 board Device Tree Source - * - * Copyright (C) 2009 DENX Software Engineering GmbH - * Heiko Schocher <hs@denx.de> - * Copyright 2006-2007 Secret Lab Technologies Ltd. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "manroland,mucmc52"; - compatible = "manroland,mucmc52"; - - soc5200@f0000000 { - gpt0: timer@600 { // GPT 0 in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt1: timer@610 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt2: timer@620 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt3: timer@630 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - timer@640 { - status = "disabled"; - }; - - timer@650 { - status = "disabled"; - }; - - timer@660 { - status = "disabled"; - }; - - timer@670 { - status = "disabled"; - }; - - rtc@800 { - status = "disabled"; - }; - - can@900 { - status = "disabled"; - }; - - can@980 { - status = "disabled"; - }; - - spi@f00 { - status = "disabled"; - }; - - usb@1000 { - status = "disabled"; - }; - - psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2200 { // PSC2 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - status = "disabled"; - }; - - psc@2c00 { // PSC6 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - compatible = "intel,lxt971"; - reg = <0>; - }; - }; - - i2c@3d00 { - status = "disabled"; - }; - - i2c@3d40 { - hwmon@2c { - compatible = "ad,adm9240"; - reg = <0x2c>; - }; - rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x10 */ - 0x8000 0 0 1 &mpc5200_pic 0 3 3 - 0x8000 0 0 2 &mpc5200_pic 0 3 3 - 0x8000 0 0 3 &mpc5200_pic 0 2 3 - 0x8000 0 0 4 &mpc5200_pic 0 1 3 - >; - ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000 - 0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; - }; - - localbus { - ranges = <0 0 0xff800000 0x00800000 - 1 0 0x80000000 0x00800000 - 3 0 0x80000000 0x00800000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x00800000>; - bank-width = <4>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - partition@0 { - label = "DTS"; - reg = <0x0 0x00100000>; - }; - partition@100000 { - label = "Kernel"; - reg = <0x100000 0x00200000>; - }; - partition@300000 { - label = "RootFS"; - reg = <0x00300000 0x00200000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x00200000>; - }; - partition@700000 { - label = "U-Boot"; - reg = <0x00700000 0x00040000>; - }; - partition@740000 { - label = "Env"; - reg = <0x00740000 0x00020000>; - }; - partition@760000 { - label = "red. Env"; - reg = <0x00760000 0x00020000>; - }; - partition@780000 { - label = "reserve"; - reg = <0x00780000 0x00080000>; - }; - }; - - simple100: gpio-controller-100@3,600100 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600100 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple104: gpio-controller-104@3,600104 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600104 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple200: gpio-controller-200@3,600200 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600200 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple201: gpio-controller-201@3,600201 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600201 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple202: gpio-controller-202@3,600202 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600202 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple203: gpio-controller-203@3,600203 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600203 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple204: gpio-controller-204@3,600204 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600204 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple206: gpio-controller-206@3,600206 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600206 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple207: gpio-controller-207@3,600207 { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x00600207 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - simple20f: gpio-controller-20f@3,60020f { - compatible = "manroland,mucmc52-aux-gpio"; - reg = <3 0x0060020f 0x1>; - gpio-controller; - #gpio-cells = <2>; - }; - - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/obs600.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/obs600.dts deleted file mode 100644 index 18e7d79e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/obs600.dts +++ /dev/null @@ -1,314 +0,0 @@ -/* - * Device Tree Source for PlatHome OpenBlockS 600 (405EX) - * - * Copyright 2011 Ben Herrenschmidt, IBM Corp. - * - * Based on Kilauea by: - * - * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "PlatHome,OpenBlockS 600"; - compatible = "plathome,obs600"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405EX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; /* 16 kB */ - d-cache-size = <16384>; /* 16 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic-405ex", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-405ex","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - CPM0: cpm { - compatible = "ibm,cpm"; - dcr-access-method = "native"; - dcr-reg = <0x0b0 0x003>; - unused-units = <0x00000000>; - idle-doze = <0x02000000>; - standby = <0xe3e74800>; - }; - - plb { - compatible = "ibm,plb-405ex", "ibm,plb4"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; - dcr-reg = <0x010 0x002>; - interrupt-parent = <&UIC2>; - interrupts = <0x5 0x4 /* ECC DED Error */ - 0x6 0x4>; /* ECC SEC Error */ - }; - - CRYPTO: crypto@ef700000 { - compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto"; - reg = <0xef700000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x17 0x2>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-405ex", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x80000000 0x80000000 0x10000000 - 0xef600000 0xef600000 0x00a00000 - 0xf0000000 0xf0000000 0x10000000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-405ex", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x08000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel + initrd"; - reg = <0x00000000 0x03de0000>; - }; - partition@3de0000 { - label = "user config area"; - reg = <0x03de0000 0x00080000>; - }; - partition@3e60000 { - label = "user program area"; - reg = <0x03e60000 0x04000000>; - }; - partition@7e60000 { - label = "flat device tree"; - reg = <0x07e60000 0x00080000>; - }; - partition@7ee0000 { - label = "test program"; - reg = <0x07ee0000 0x00080000>; - }; - partition@7f60000 { - label = "u-boot env"; - reg = <0x07f60000 0x00040000>; - }; - partition@7fa0000 { - label = "u-boot"; - reg = <0x07fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1a 0x4>; - }; - - UART1: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@ef600400 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - - rtc@68 { - compatible = "dallas,ds1340"; - reg = <0x68>; - }; - }; - - IIC1: i2c@ef600500 { - compatible = "ibm,iic-405ex", "ibm,iic"; - reg = <0xef600500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - RGMII0: emac-rgmii@ef600b00 { - compatible = "ibm,rgmii-405ex", "ibm,rgmii"; - reg = <0xef600b00 0x00000104>; - has-mdio; - }; - - EMAC0: ethernet@ef600900 { - linux,network-index = <0x0>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600900 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600a00 { - linux,network-index = <0x1>; - device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4sync"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 - /*Wake*/ 0x1 &UIC1 0x1f 0x4>; - reg = <0xef600a00 0x000000c4>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - tx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - GPIO: gpio@ef600800 { - device_type = "gpio"; - compatible = "ibm,gpio-405ex", "ibm,ppc4xx-gpio"; - reg = <0xef600800 0x50>; - }; - }; - }; - chosen { - linux,stdout-path = "/plb/opb/serial@ef600200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dts deleted file mode 100644 index b868d229..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dts +++ /dev/null @@ -1,66 +0,0 @@ -/* - * P1010 RDB Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p1010si-pre.dtsi" - -/ { - model = "fsl,P1010RDB"; - compatible = "fsl,P1010RDB"; - - memory { - device_type = "memory"; - }; - - board_ifc: ifc: ifc@ffe1e000 { - /* NOR, NAND Flashes and CPLD on board */ - ranges = <0x0 0x0 0x0 0xee000000 0x02000000 - 0x1 0x0 0x0 0xff800000 0x00010000 - 0x3 0x0 0x0 0xffb00000 0x00000020>; - reg = <0x0 0xffe1e000 0 0x2000>; - }; - - board_soc: soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1010rdb.dtsi" -/include/ "fsl/p1010si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dtsi deleted file mode 100644 index 49776143..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb.dtsi +++ /dev/null @@ -1,234 +0,0 @@ -/* - * P1010 RDB Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_ifc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@80000 { - /* 7 MB for Linux Kernel Image */ - reg = <0x00080000 0x00700000>; - label = "NOR Linux Kernel Image"; - }; - - partition@800000 { - /* 20MB for JFFS2 based Root file System */ - reg = <0x00800000 0x01400000>; - label = "NOR JFFS2 Root File System"; - }; - - partition@1f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x01f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,ifc-nand"; - reg = <0x1 0x0 0x10000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND DTB Image"; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND Linux Kernel Image"; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND Compressed RFS Image"; - }; - - partition@a00000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00f00000>; - label = "NAND JFFS2 Root File System"; - }; - - partition@1900000 { - /* 7MB for User Area */ - reg = <0x01900000 0x00700000>; - label = "NAND User area"; - }; - }; - - cpld@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1010rdb-cpld"; - reg = <0x3 0x0 0x0000020>; - bank-width = <1>; - device-width = <1>; - }; -}; - -&board_soc { - i2c@3000 { - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; - - partition@0 { - /* 1MB for u-boot Bootloader Image */ - /* 1MB for Environment */ - reg = <0x0 0x00100000>; - label = "SPI Flash U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 512KB for DTB Image */ - reg = <0x00100000 0x00080000>; - label = "SPI Flash DTB Image"; - }; - - partition@180000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00180000 0x00400000>; - label = "SPI Flash Linux Kernel Image"; - }; - - partition@580000 { - /* 4MB for Compressed RFS Image */ - reg = <0x00580000 0x00400000>; - label = "SPI Flash Compressed RFSImage"; - }; - - partition@980000 { - /* 6.5MB for JFFS2 based RFS */ - reg = <0x00980000 0x00680000>; - label = "SPI Flash JFFS2 RFS"; - }; - }; - }; - - usb@22000 { - phy_type = "utmi"; - dr_mode = "host"; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x1>; - }; - - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x0>; - }; - - phy2: ethernet-phy@2 { - interrupts = <2 1 0 0>; - reg = <0x2>; - }; - - tbi-phy@3 { - device_type = "tbi-phy"; - reg = <0x3>; - }; - }; - - mdio@25000 { - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy1>; - tbi-handle = <&tbi0>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy2>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb_36b.dts deleted file mode 100644 index 64776f4a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1010rdb_36b.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P1010 RDB Device Tree Source (36-bit address map) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1010si-pre.dtsi" - -/ { - model = "fsl,P1010RDB"; - compatible = "fsl,P1010RDB"; - - memory { - device_type = "memory"; - }; - - board_ifc: ifc: ifc@fffe1e000 { - /* NOR, NAND Flashes and CPLD on board */ - ranges = <0x0 0x0 0xf 0xee000000 0x02000000 - 0x1 0x0 0xf 0xff800000 0x00010000 - 0x3 0x0 0xf 0xffb00000 0x00000020>; - reg = <0xf 0xffe1e000 0 0x2000>; - }; - - board_soc: soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1010rdb.dtsi" -/include/ "fsl/p1010si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc.dtsi deleted file mode 100644 index a24699cf..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc.dtsi +++ /dev/null @@ -1,151 +0,0 @@ -/* - * P1020 MBG-PC Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x4000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* 128KB for DTB Image */ - reg = <0x0 0x00020000>; - label = "NOR DTB Image"; - }; - - partition@20000 { - /* 3.875 MB for Linux Kernel Image */ - reg = <0x00020000 0x003e0000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 58MB for Root file System */ - reg = <0x00400000 0x03a00000>; - label = "NOR Root File System"; - }; - - partition@3e00000 { - /* This location must not be altered */ - /* 1M for Vitesse 7385 Switch firmware */ - reg = <0x3e00000 0x00100000>; - label = "NOR Vitesse-7385 Firmware"; - read-only; - }; - - partition@3f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x03f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x1>; - }; - }; - - mdio@25000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26000 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - /* USB2 is shared with localbus, so it must be disabled - by default. We can't put 'status = "disabled";' here - since U-Boot doesn't clear the status property when - it enables USB2. OTOH, U-Boot does create a new node - when there isn't any. So, just comment it out. - */ - usb@23000 { - status = "disabled"; - phy_type = "ulpi"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts deleted file mode 100644 index ab8f076e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_32b.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P1020 MBG-PC Device Tree Source (32-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020MBG-PC"; - compatible = "fsl,P1020MBG-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0x0 0xffe05000 0x0 0x1000>; - - /* NOR and L2 switch */ - ranges = <0x0 0x0 0x0 0xec000000 0x04000000 - 0x1 0x0 0x0 0xffa00000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - reg = <0x0 0xffe09000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0x0 0xffe0a000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020mbg-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts deleted file mode 100644 index 9e9f4014..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020mbg-pc_36b.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P1020 MBG-PC Device Tree Source (36-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020MBG-PC"; - compatible = "fsl,P1020MBG-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0x0 0x1000>; - - /* NOR and L2 switch */ - ranges = <0x0 0x0 0xf 0xec000000 0x04000000 - 0x1 0x0 0xf 0xffa00000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00020000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020mbg-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc.dtsi deleted file mode 100644 index c952cd37..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc.dtsi +++ /dev/null @@ -1,247 +0,0 @@ -/* - * P1020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1020-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND DTB Image"; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND Linux Kernel Image"; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND Compressed RFS Image"; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; - - cpld@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cpld"; - reg = <0x3 0x0 0x20000>; - read-only; - }; -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@u-boot { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "u-boot"; - read-only; - }; - - partition@dtb { - /* 512KB for DTB Image*/ - reg = <0x00080000 0x00080000>; - label = "dtb"; - }; - - partition@kernel { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "kernel"; - }; - - partition@fs { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "file system"; - }; - - partition@jffs-fs { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "file system jffs2"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - /* USB2 is shared with localbus, so it must be disabled - by default. We can't put 'status = "disabled";' here - since U-Boot doesn't clear the status property when - it enables USB2. OTOH, U-Boot does create a new node - when there isn't any. So, just comment it out. - usb@23000 { - phy_type = "ulpi"; - }; - */ - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x1>; - }; - - tbi0: tbi-phy@11 { - device_type = "tbi-phy"; - reg = <0x11>; - }; - }; - - mdio@25000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts deleted file mode 100644 index 4de69b72..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_32b.dts +++ /dev/null @@ -1,90 +0,0 @@ -/* - * P1020 RDB-PC Device Tree Source (32-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020RDB-PC"; - compatible = "fsl,P1020RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xff800000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000 - 0x3 0x0 0x0 0xffa00000 0x00020000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020rdb-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts deleted file mode 100644 index 5237da74..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_36b.dts +++ /dev/null @@ -1,90 +0,0 @@ -/* - * P1020 RDB-PC Device Tree Source (36-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020RDB-PC"; - compatible = "fsl,P1020RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0xf 0xef000000 0x01000000 - 0x1 0x0 0xf 0xff800000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00040000 - 0x3 0x0 0xf 0xffa00000 0x00020000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020rdb-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts deleted file mode 100644 index f4115159..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core0.dts +++ /dev/null @@ -1,64 +0,0 @@ -/* - * P1020 RDB-PC Core0 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb, - * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi. - * - * Please note to add "-b 0" for core0's dts compiling. - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p1020rdb-pc_32b.dts" - -/ { - model = "fsl,P1020RDB-PC"; - compatible = "fsl,P1020RDB-PC"; - - aliases { - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - PowerPC,P1020@1 { - status = "disabled"; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - serial1: serial@4600 { - status = "disabled"; - }; - - enet0: ethernet@b0000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 42 29 30 34 /* serial1, enet0-queue-group0 */ - 17 18 24 45 /* enet0-queue-group1, crypto */ - >; - pic-no-reset; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts deleted file mode 100644 index a91335ad..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb-pc_camp_core1.dts +++ /dev/null @@ -1,142 +0,0 @@ -/* - * P1020 RDB-PC Core1 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts allows core1 to have l2, eth0, crypto. - * - * Please note to add "-b 1" for core1's dts compiling. - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p1020rdb-pc_32b.dts" - -/ { - model = "fsl,P1020RDB-PC"; - compatible = "fsl,P1020RDB-PC"; - - aliases { - ethernet0 = &enet0; - serial0 = &serial1; - }; - - cpus { - PowerPC,P1020@0 { - status = "disabled"; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - ecm-law@0 { - status = "disabled"; - }; - - ecm@1000 { - status = "disabled"; - }; - - memory-controller@2000 { - status = "disabled"; - }; - - i2c@3000 { - status = "disabled"; - }; - - i2c@3100 { - status = "disabled"; - }; - - serial0: serial@4500 { - status = "disabled"; - }; - - spi@7000 { - status = "disabled"; - }; - - gpio: gpio-controller@f000 { - status = "disabled"; - }; - - dma@21300 { - status = "disabled"; - }; - - mdio@24000 { - status = "disabled"; - }; - - mdio@25000 { - status = "disabled"; - }; - - enet1: ethernet@b1000 { - status = "disabled"; - }; - - enet2: ethernet@b2000 { - status = "disabled"; - }; - - usb@22000 { - status = "disabled"; - }; - - sdhci@2e000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 16 /* ecm, mem, L2, pci0, pci1 */ - 43 42 59 /* i2c, serial0, spi */ - 47 63 62 /* gpio, tdm */ - 20 21 22 23 /* dma */ - 03 02 /* mdio */ - 35 36 40 /* enet1-queue-group0 */ - 51 52 67 /* enet1-queue-group1 */ - 31 32 33 /* enet2-queue-group0 */ - 25 26 27 /* enet2-queue-group1 */ - 28 72 58 /* usb, sdhci, crypto */ - 0xb0 0xb1 0xb2 /* message */ - 0xb3 0xb4 0xb5 - 0xb6 0xb7 - 0xe0 0xe1 0xe2 /* msi */ - 0xe3 0xe4 0xe5 - 0xe6 0xe7 /* sdhci, crypto , pci */ - >; - pic-no-reset; - }; - - msi@41600 { - status = "disabled"; - }; - - global-utilities@e0000 { //global utilities block - status = "disabled"; - }; - }; - - pci0: pcie@ffe09000 { - status = "disabled"; - }; - - pci1: pcie@ffe0a000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dts deleted file mode 100644 index 518bf99b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dts +++ /dev/null @@ -1,66 +0,0 @@ -/* - * P1020 RDB Device Tree Source - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020RDB"; - compatible = "fsl,P1020RDB"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xffa00000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - }; - - board_soc: soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020rdb.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dtsi deleted file mode 100644 index 1fb7e0e0..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb.dtsi +++ /dev/null @@ -1,246 +0,0 @@ -/* - * P1020 RDB Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR (RO) Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR (RO) DTB Image"; - read-only; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR (RO) Linux Kernel Image"; - read-only; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR (RW) JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR (RO) U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1020-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND (RO) U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND (RO) DTB Image"; - read-only; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND (RO) Linux Kernel Image"; - read-only; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND (RO) Compressed RFS Image"; - read-only; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND (RW) JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND (RW) Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; -}; - -&board_soc { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@u-boot { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "u-boot"; - read-only; - }; - - partition@dtb { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "dtb"; - read-only; - }; - - partition@kernel { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "kernel"; - read-only; - }; - - partition@fs { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "file system"; - read-only; - }; - - partition@jffs-fs { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "file system jffs2"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - /* USB2 is shared with localbus. It is used - only in case of SPI and SD boot after - appropriate device-tree fixup done by uboot */ - usb@23000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x1>; - }; - - tbi-phy@2 { - device_type = "tbi-phy"; - reg = <0x2>; - }; - }; - - mdio@25000 { - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi0>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_36b.dts deleted file mode 100644 index bdbdb609..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_36b.dts +++ /dev/null @@ -1,66 +0,0 @@ -/* - * P1020 RDB Device Tree Source (36-bit address map) - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020RDB"; - compatible = "fsl,P1020RDB"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0xf 0xef000000 0x01000000 - 0x1 0x0 0xf 0xffa00000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00020000>; - }; - - board_soc: soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020rdb.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts deleted file mode 100644 index 41b4585c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts +++ /dev/null @@ -1,63 +0,0 @@ -/* - * P1020 RDB Core0 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb, - * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi. - * - * Please note to add "-b 0" for core0's dts compiling. - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p1020rdb.dts" - -/ { - model = "fsl,P1020RDB"; - compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP"; - - aliases { - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - PowerPC,P1020@1 { - status = "disabled"; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - serial1: serial@4600 { - status = "disabled"; - }; - - enet0: ethernet@b0000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 42 29 30 34 /* serial1, enet0-queue-group0 */ - 17 18 24 45 /* enet0-queue-group1, crypto */ - >; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts deleted file mode 100644 index 51745382..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts +++ /dev/null @@ -1,141 +0,0 @@ -/* - * P1020 RDB Core1 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts allows core1 to have l2, eth0, crypto. - * - * Please note to add "-b 1" for core1's dts compiling. - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p1020rdb.dts" - -/ { - model = "fsl,P1020RDB"; - compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP"; - - aliases { - ethernet0 = &enet0; - serial0 = &serial1; - }; - - cpus { - PowerPC,P1020@0 { - status = "disabled"; - }; - }; - - memory { - device_type = "memory"; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - ecm-law@0 { - status = "disabled"; - }; - - ecm@1000 { - status = "disabled"; - }; - - memory-controller@2000 { - status = "disabled"; - }; - - i2c@3000 { - status = "disabled"; - }; - - i2c@3100 { - status = "disabled"; - }; - - serial0: serial@4500 { - status = "disabled"; - }; - - spi@7000 { - status = "disabled"; - }; - - gpio: gpio-controller@f000 { - status = "disabled"; - }; - - dma@21300 { - status = "disabled"; - }; - - mdio@24000 { - status = "disabled"; - }; - - mdio@25000 { - status = "disabled"; - }; - - enet1: ethernet@b1000 { - status = "disabled"; - }; - - enet2: ethernet@b2000 { - status = "disabled"; - }; - - usb@22000 { - status = "disabled"; - }; - - sdhci@2e000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 16 /* ecm, mem, L2, pci0, pci1 */ - 43 42 59 /* i2c, serial0, spi */ - 47 63 62 /* gpio, tdm */ - 20 21 22 23 /* dma */ - 03 02 /* mdio */ - 35 36 40 /* enet1-queue-group0 */ - 51 52 67 /* enet1-queue-group1 */ - 31 32 33 /* enet2-queue-group0 */ - 25 26 27 /* enet2-queue-group1 */ - 28 72 58 /* usb, sdhci, crypto */ - 0xb0 0xb1 0xb2 /* message */ - 0xb3 0xb4 0xb5 - 0xb6 0xb7 - 0xe0 0xe1 0xe2 /* msi */ - 0xe3 0xe4 0xe5 - 0xe6 0xe7 /* sdhci, crypto , pci */ - >; - }; - - msi@41600 { - status = "disabled"; - }; - - global-utilities@e0000 { //global utilities block - status = "disabled"; - }; - }; - - pci0: pcie@ffe09000 { - status = "disabled"; - }; - - pci1: pcie@ffe0a000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc.dtsi deleted file mode 100644 index 7ea85eab..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc.dtsi +++ /dev/null @@ -1,140 +0,0 @@ -/* - * P1020 UTM-PC Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* 256KB for DTB Image */ - reg = <0x0 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@40000 { - /* 3.75 MB for Linux Kernel Image */ - reg = <0x00040000 0x003c0000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 27MB for Root file System */ - reg = <0x00400000 0x01b00000>; - label = "NOR Root File System"; - }; - - partition@1f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x01f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupts = <1 1 0 0>; - reg = <0x2>; - }; - }; - - mdio@25000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26000 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - /* USB2 is shared with localbus, so it must be disabled - by default. We can't put 'status = "disabled";' here - since U-Boot doesn't clear the status property when - it enables USB2. OTOH, U-Boot does create a new node - when there isn't any. So, just comment it out. - */ - usb@23000 { - status = "disabled"; - phy_type = "ulpi"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_32b.dts deleted file mode 100644 index 4bfdd897..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_32b.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P1020 UTM-PC Device Tree Source (32-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020UTM-PC"; - compatible = "fsl,P1020UTM-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0x0 0xffe05000 0x0 0x1000>; - - /* NOR */ - ranges = <0x0 0x0 0x0 0xec000000 0x02000000 - 0x1 0x0 0x0 0xffa00000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - reg = <0x0 0xffe09000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0x0 0xffe0a000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020utm-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_36b.dts deleted file mode 100644 index abec5355..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1020utm-pc_36b.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P1020 UTM-PC Device Tree Source (36-bit address map) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1020si-pre.dtsi" -/ { - model = "fsl,P1020UTM-PC"; - compatible = "fsl,P1020UTM-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0x0 0x1000>; - - /* NOR */ - ranges = <0x0 0x0 0xf 0xec000000 0x02000000 - 0x1 0x0 0xf 0xffa00000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00020000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0x0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1020utm-pc.dtsi" -/include/ "fsl/p1020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021mds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021mds.dts deleted file mode 100644 index 97116f19..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021mds.dts +++ /dev/null @@ -1,325 +0,0 @@ -/* - * P1021 MDS Device Tree Source - * - * Copyright 2010,2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p1021si-pre.dtsi" -/ { - model = "fsl,P1021"; - compatible = "fsl,P1021MDS"; - - aliases { - ethernet3 = &enet3; - ethernet4 = &enet4; - }; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0x0 0xffe05000 0x0 0x1000>; - - /* NAND Flash, BCSR, PMC0/1*/ - ranges = <0x0 0x0 0x0 0xfc000000 0x02000000 - 0x1 0x0 0x0 0xf8000000 0x00008000 - 0x2 0x0 0x0 0xf8010000 0x00020000 - 0x3 0x0 0x0 0xf8020000 0x00020000>; - - nand@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1021-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x0 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND (RO) U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND (RO) DTB Image"; - read-only; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND (RO) Linux Kernel Image"; - read-only; - }; - - partition@600000 { - /* 5MB for Compressed Root file System Image */ - reg = <0x00600000 0x00500000>; - label = "NAND (RO) Compressed RFS Image"; - read-only; - }; - - partition@b00000 { - /* 6MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00600000>; - label = "NAND (RW) JFFS2 Root File System"; - }; - - partition@1100000 { - /* 14MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00e00000>; - label = "NAND (RW) Writable User area"; - }; - - partition@1f00000 { - /* 1MB for microcode */ - reg = <0x01f00000 0x00100000>; - label = "NAND (RO) QE Ucode"; - read-only; - }; - }; - - bcsr@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1021mds-bcsr"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - }; - - pib@2,0 { - compatible = "fsl,p1021mds-pib"; - reg = <2 0 0x10000>; - }; - - pib@3,0 { - compatible = "fsl,p1021mds-pib"; - reg = <3 0 0x10000>; - }; - }; - - soc: soc@ffe00000 { - compatible = "fsl,p1021-immr", "simple-bus"; - ranges = <0x0 0x0 0xffe00000 0x100000>; - - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - spi@7000 { - - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@u-boot { - label = "u-boot-spi"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel-spi"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb-spi"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system-spi"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupts = <1 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x1>; - }; - phy4: ethernet-phy@4 { - reg = <0x4>; - }; - tbi-phy@5 { - device_type = "tbi-phy"; - reg = <0x5>; - }; - }; - - mdio@25000 { - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - ethernet@b0000 { - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - ethernet@b1000 { - phy-handle = <&phy4>; - tbi-handle = <&tbi0>; - phy-connection-type = "sgmii"; - }; - - ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - par_io@e0100 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xe0100 0x60>; - ranges = <0x0 0xe0100 0x60>; - device_type = "par_io"; - num-ports = <3>; - pio1: ucc_pin@01 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ - 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */ - 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */ - 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */ - 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */ - 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */ - 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */ - 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */ - 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */ - 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */ - 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */ - 0x0 0x5 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */ - 0x0 0xd 0x1 0x0 0x2 0x0 /* ENET1_TX_ER */ - 0x0 0x4 0x2 0x0 0x2 0x0 /* ENET1_RX_DV_SER1_CTS_B */ - 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RX_ER_SER1_CD_B */ - 0x0 0x11 0x2 0x0 0x2 0x0 /* ENET1_CRS */ - 0x0 0x10 0x2 0x0 0x2 0x0>; /* ENET1_COL */ - }; - - pio2: ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ - 0x1 0xb 0x2 0x0 0x1 0x0 /* CLK13 */ - 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */ - 0x1 0xa 0x1 0x0 0x2 0x0 /* ENET5_TXD1_SER5_TXD1 */ - 0x1 0x6 0x2 0x0 0x2 0x0 /* ENET5_RXD0_SER5_RXD0 */ - 0x1 0x9 0x2 0x0 0x2 0x0 /* ENET5_RXD1_SER5_RXD1 */ - 0x1 0x5 0x1 0x0 0x2 0x0 /* ENET5_TX_EN_SER5_RTS_B */ - 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */ - 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */ - }; - }; - }; - - pci0: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - qe: qe@ffe80000 { - ranges = <0x0 0x0 0xffe80000 0x40000>; - reg = <0 0xffe80000 0 0x480>; - brg-frequency = <0>; - bus-frequency = <0>; - status = "disabled"; /* no firmware loaded */ - - enet3: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "clk12"; - tx-clock-name = "clk9"; - pio-handle = <&pio1>; - phy-handle = <&qe_phy0>; - phy-connection-type = "mii"; - }; - - mdio@2120 { - qe_phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <4 1 0 0>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - qe_phy1: ethernet-phy@03 { - interrupt-parent = <&mpic>; - interrupts = <5 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet4: ucc@2400 { - device_type = "network"; - compatible = "ucc_geth"; - local-mac-address = [ 00 00 00 00 00 00 ]; - rx-clock-name = "none"; - tx-clock-name = "clk13"; - pio-handle = <&pio2>; - phy-handle = <&qe_phy1>; - phy-connection-type = "rmii"; - }; - }; -}; - -/include/ "fsl/p1021si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dts deleted file mode 100644 index 90b6b4ca..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dts +++ /dev/null @@ -1,96 +0,0 @@ -/* - * P1021 RDB Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1021si-pre.dtsi" -/ { - model = "fsl,P1021RDB"; - compatible = "fsl,P1021RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xff800000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - qe: qe@ffe80000 { - ranges = <0x0 0x0 0xffe80000 0x40000>; - reg = <0 0xffe80000 0 0x480>; - brg-frequency = <0>; - bus-frequency = <0>; - }; -}; - -/include/ "p1021rdb.dtsi" -/include/ "fsl/p1021si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dtsi deleted file mode 100644 index b973461a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb.dtsi +++ /dev/null @@ -1,236 +0,0 @@ -/* - * P1021 RDB Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR U-Boot Image"; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1021-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND DTB Image"; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND Linux Kernel Image"; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND Compressed RFS Image"; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for User Writable Area */ - reg = <0x01100000 0x00f00000>; - label = "NAND Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@u-boot { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "SPI Flash U-Boot Image"; - read-only; - }; - - partition@dtb { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "SPI Flash DTB Image"; - }; - - partition@kernel { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "SPI Flash Linux Kernel Image"; - }; - - partition@fs { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "SPI Flash Compressed RFSImage"; - }; - - partition@jffs-fs { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "SPI Flash JFFS2 RFS"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <2 1 0 0>; - reg = <0x1>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@25000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26000 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - tbi-handle = <&tbi2>; - phy-connection-type = "rgmii-id"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb_36b.dts deleted file mode 100644 index ea6d8b5f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1021rdb_36b.dts +++ /dev/null @@ -1,96 +0,0 @@ -/* - * P1021 RDB Device Tree Source (36-bit address map) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1021si-pre.dtsi" -/ { - model = "fsl,P1021RDB"; - compatible = "fsl,P1021RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes and Vitesse 5 port L2 switch */ - ranges = <0x0 0x0 0xf 0xef000000 0x01000000 - 0x1 0x0 0xf 0xff800000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00020000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - reg = <0xf 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - qe: qe@fffe80000 { - ranges = <0x0 0xf 0xffe80000 0x40000>; - reg = <0xf 0xffe80000 0 0x480>; - brg-frequency = <0>; - bus-frequency = <0>; - }; -}; - -/include/ "p1021rdb.dtsi" -/include/ "fsl/p1021si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds.dtsi deleted file mode 100644 index 7cdb5050..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds.dtsi +++ /dev/null @@ -1,234 +0,0 @@ -/* - * P1022 DS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - /* - * This node is used to access the pixis via "indirect" mode, - * which is done by writing the pixis register index to chip - * select 0 and the value to/from chip select 1. Indirect - * mode is the only way to access the pixis when DIU video - * is enabled. Note that this assumes that the first column - * of the 'ranges' property above is the chip select number. - */ - board-control@0,0 { - compatible = "fsl,p1022ds-indirect-pixis"; - reg = <0x0 0x0 1 /* CS0 */ - 0x1 0x0 1>; /* CS1 */ - interrupt-parent = <&mpic>; - interrupts = <8 0 0 0>; - }; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - reg = <0x0 0x03000000>; - label = "ramdisk-nor"; - read-only; - }; - - partition@3000000 { - reg = <0x03000000 0x00e00000>; - label = "diagnostic-nor"; - read-only; - }; - - partition@3e00000 { - reg = <0x03e00000 0x00200000>; - label = "dink-nor"; - read-only; - }; - - partition@4000000 { - reg = <0x04000000 0x00400000>; - label = "kernel-nor"; - read-only; - }; - - partition@4400000 { - reg = <0x04400000 0x03b00000>; - label = "jffs2-nor"; - }; - - partition@7f00000 { - reg = <0x07f00000 0x00080000>; - label = "dtb-nor"; - read-only; - }; - - partition@7f80000 { - reg = <0x07f80000 0x00080000>; - label = "u-boot-nor"; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - reg = <0x0 0x02000000>; - label = "u-boot-nand"; - read-only; - }; - - partition@2000000 { - reg = <0x02000000 0x10000000>; - label = "jffs2-nand"; - }; - - partition@12000000 { - reg = <0x12000000 0x10000000>; - label = "ramdisk-nand"; - read-only; - }; - - partition@22000000 { - reg = <0x22000000 0x04000000>; - label = "kernel-nand"; - }; - - partition@26000000 { - reg = <0x26000000 0x01000000>; - label = "dtb-nand"; - read-only; - }; - - partition@27000000 { - reg = <0x27000000 0x19000000>; - label = "reserved-nand"; - }; - }; - - board-control@3,0 { - compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - interrupt-parent = <&mpic>; - /* - * IRQ8 is generated if the "EVENT" switch is pressed - * and PX_CTL[EVESEL] is set to 00. - */ - interrupts = <8 0 0 0>; - }; -}; - -&board_soc { - i2c@3100 { - wm8776:codec@1a { - compatible = "wlf,wm8776"; - reg = <0x1a>; - /* - * clock-frequency will be set by U-Boot if - * the clock is enabled. - */ - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@0 { - label = "u-boot-spi"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@100000 { - label = "kernel-spi"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@600000 { - label = "dtb-spi"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@700000 { - label = "file system-spi"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - ssi@15000 { - fsl,mode = "i2s-slave"; - codec-handle = <&wm8776>; - fsl,ssi-asynchronous; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - usb@23000 { - status = "disabled"; - }; - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x1>; - }; - phy1: ethernet-phy@1 { - interrupts = <9 1 0 0>; - reg = <0x2>; - }; - tbi-phy@2 { - device_type = "tbi-phy"; - reg = <0x2>; - }; - }; - - ethernet@b0000 { - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - ethernet@b1000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_32b.dts deleted file mode 100644 index d96cae00..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_32b.dts +++ /dev/null @@ -1,103 +0,0 @@ -/* - * P1022 DS 32-bit Physical Address Map Device Tree Source - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1022si-pre.dtsi" -/ { - model = "fsl,P1022DS"; - compatible = "fsl,P1022DS"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@ffe05000 { - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 - 0x1 0x0 0x0 0xe0000000 0x08000000 - 0x2 0x0 0x0 0xff800000 0x00040000 - 0x3 0x0 0x0 0xffdf0000 0x00008000>; - reg = <0x0 0xffe05000 0 0x1000>; - }; - - board_soc: soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0x0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - reg = <0 0xffe0a000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@ffe0b000 { - ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - reg = <0 0xffe0b000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "fsl/p1022si-post.dtsi" -/include/ "p1022ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_36b.dts deleted file mode 100644 index f7aacce4..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1022ds_36b.dts +++ /dev/null @@ -1,103 +0,0 @@ -/* - * P1022 DS 36-bit Physical Address Map Device Tree Source - * - * Copyright 2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1022si-pre.dtsi" -/ { - model = "fsl,P1022DS"; - compatible = "fsl,P1022DS"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@fffe05000 { - ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 - 0x1 0x0 0xf 0xe0000000 0x08000000 - 0x2 0x0 0xf 0xff800000 0x00040000 - 0x3 0x0 0xf 0xffdf0000 0x00008000>; - reg = <0xf 0xffe05000 0 0x1000>; - }; - - board_soc: soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - reg = <0xf 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>; - reg = <0xf 0xffe0a000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@fffe0b000 { - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - reg = <0xf 0xffe0b000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "fsl/p1022si-post.dtsi" -/include/ "p1022ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1023rds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1023rds.dts deleted file mode 100644 index beb6cb12..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1023rds.dts +++ /dev/null @@ -1,219 +0,0 @@ -/* - * P1023 RDS Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Author: Roy Zang <tie-fei.zang@freescale.com> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1023si-pre.dtsi" - -/ { - model = "fsl,P1023"; - compatible = "fsl,P1023RDS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - soc: soc@ff600000 { - ranges = <0x0 0x0 0xff600000 0x200000>; - - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - }; - }; - - spi@7000 { - fsl_dataflash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "atmel,at45db081d"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - /* 512KB for u-boot Bootloader Image */ - label = "u-boot-spi"; - reg = <0x00000000 0x00080000>; - read-only; - }; - partition@dtb { - /* 512KB for DTB Image */ - label = "dtb-spi"; - reg = <0x00080000 0x00080000>; - read-only; - }; - }; - }; - - usb@22000 { - dr_mode = "host"; - phy_type = "ulpi"; - }; - }; - - lbc: localbus@ff605000 { - reg = <0 0xff605000 0 0x1000>; - - /* NOR Flash, BCSR */ - ranges = <0x0 0x0 0x0 0xee000000 0x02000000 - 0x1 0x0 0x0 0xe0000000 0x00008000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x02000000>; - bank-width = <2>; - device-width = <1>; - partition@0 { - label = "ramdisk"; - reg = <0x00000000 0x01c00000>; - }; - partition@1c00000 { - label = "kernel"; - reg = <0x01c00000 0x002e0000>; - }; - partiton@1ee0000 { - label = "dtb"; - reg = <0x01ee0000 0x00020000>; - }; - partition@1f00000 { - label = "firmware"; - reg = <0x01f00000 0x00080000>; - read-only; - }; - partition@1f80000 { - label = "u-boot"; - reg = <0x01f80000 0x00080000>; - read-only; - }; - }; - - fpga@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1023rds-fpga"; - reg = <1 0 0x8000>; - ranges = <0 1 0 0x8000>; - - bcsr@20 { - compatible = "fsl,p1023rds-bcsr"; - reg = <0x20 0x20>; - }; - }; - }; - - pci0: pcie@ff60a000 { - reg = <0 0xff60a000 0 0x1000>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - pcie@0 { - /* IRQ[0:3] are pulled up on board, set to active-low */ - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 0 1 0 0 - 0000 0 0 2 &mpic 1 1 0 0 - 0000 0 0 3 &mpic 2 1 0 0 - 0000 0 0 4 &mpic 3 1 0 0 - >; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - board_pci1: pci1: pcie@ff609000 { - reg = <0 0xff609000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - pcie@0 { - /* - * IRQ[4:6] only for PCIe, set to active-high, - * IRQ[7] is pulled up on board, set to active-low - */ - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 4 2 0 0 - 0000 0 0 2 &mpic 5 2 0 0 - 0000 0 0 3 &mpic 6 2 0 0 - 0000 0 0 4 &mpic 7 1 0 0 - >; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@ff60b000 { - reg = <0 0xff60b000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - /* - * IRQ[8:10] are pulled up on board, set to active-low - * IRQ[11] only for PCIe, set to active-high, - */ - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0000 0 0 1 &mpic 8 1 0 0 - 0000 0 0 2 &mpic 9 1 0 0 - 0000 0 0 3 &mpic 10 1 0 0 - 0000 0 0 4 &mpic 11 2 0 0 - >; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "fsl/p1023si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb.dtsi deleted file mode 100644 index cf3676fc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb.dtsi +++ /dev/null @@ -1,286 +0,0 @@ -/* - * P1025 RDB Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1025-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND DTB Image"; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND Linux Kernel Image"; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND Compressed RFS Image"; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND Writable User area"; - }; - }; - -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - - partition@u-boot { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "u-boot"; - read-only; - }; - - partition@dtb { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "dtb"; - }; - - partition@kernel { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "kernel"; - }; - - partition@fs { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "file system"; - }; - - partition@jffs-fs { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "file system jffs2"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - /* USB2 is shared with localbus, so it must be disabled - by default. We can't put 'status = "disabled";' here - since U-Boot doesn't clear the status property when - it enables USB2. OTOH, U-Boot does create a new node - when there isn't any. So, just comment it out. - usb@23000 { - phy_type = "ulpi"; - }; - */ - - mdio@24000 { - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <3 1>; - reg = <0x0>; - }; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <2 1>; - reg = <0x1>; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@25000 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26000 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@b0000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - - }; - - enet1: ethernet@b1000 { - phy-handle = <&phy0>; - tbi-handle = <&tbi1>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@b2000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - - par_io@e0100 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0xe0100 0x60>; - ranges = <0x0 0xe0100 0x60>; - device_type = "par_io"; - num-ports = <3>; - pio1: ucc_pin@01 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ - 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */ - 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */ - 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */ - 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */ - 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */ - 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */ - 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */ - 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */ - 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */ - 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */ - 0x0 0x5 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */ - 0x0 0xd 0x1 0x0 0x2 0x0 /* ENET1_TX_ER */ - 0x0 0x4 0x2 0x0 0x2 0x0 /* ENET1_RX_DV_SER1_CTS_B */ - 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RX_ER_SER1_CD_B */ - 0x0 0x11 0x2 0x0 0x2 0x0 /* ENET1_CRS */ - 0x0 0x10 0x2 0x0 0x2 0x0>; /* ENET1_COL */ - }; - - pio2: ucc_pin@02 { - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */ - 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */ - 0x1 0xb 0x2 0x0 0x1 0x0 /* CLK13 */ - 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */ - 0x1 0xa 0x1 0x0 0x2 0x0 /* ENET5_TXD1_SER5_TXD1 */ - 0x1 0x6 0x2 0x0 0x2 0x0 /* ENET5_RXD0_SER5_RXD0 */ - 0x1 0x9 0x2 0x0 0x2 0x0 /* ENET5_RXD1_SER5_RXD1 */ - 0x1 0x5 0x1 0x0 0x2 0x0 /* ENET5_TX_EN_SER5_RTS_B */ - 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */ - 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */ - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_32b.dts deleted file mode 100644 index ac5729c1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_32b.dts +++ /dev/null @@ -1,135 +0,0 @@ -/* - * P1025 RDB Device Tree Source (32-bit address map) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1021si-pre.dtsi" -/ { - model = "fsl,P1025RDB"; - compatible = "fsl,P1025RDB"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xff800000 0x00040000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - qe: qe@ffe80000 { - ranges = <0x0 0x0 0xffe80000 0x40000>; - reg = <0 0xffe80000 0 0x480>; - brg-frequency = <0>; - bus-frequency = <0>; - status = "disabled"; /* no firmware loaded */ - - enet3: ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - rx-clock-name = "clk12"; - tx-clock-name = "clk9"; - pio-handle = <&pio1>; - phy-handle = <&qe_phy0>; - phy-connection-type = "mii"; - }; - - mdio@2120 { - qe_phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <4 1 0 0>; - reg = <0x6>; - device_type = "ethernet-phy"; - }; - qe_phy1: ethernet-phy@03 { - interrupt-parent = <&mpic>; - interrupts = <5 1 0 0>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet4: ucc@2400 { - device_type = "network"; - compatible = "ucc_geth"; - rx-clock-name = "none"; - tx-clock-name = "clk13"; - pio-handle = <&pio2>; - phy-handle = <&qe_phy1>; - phy-connection-type = "rmii"; - }; - }; -}; - -/include/ "p1025rdb.dtsi" -/include/ "fsl/p1021si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_36b.dts deleted file mode 100644 index 4ce4bfa0..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p1025rdb_36b.dts +++ /dev/null @@ -1,88 +0,0 @@ -/* - * P1025 RDB Device Tree Source (36-bit address map) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p1021si-pre.dtsi" -/ { - model = "fsl,P1025RDB"; - compatible = "fsl,P1025RDB"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - /* NOR, NAND Flashes */ - ranges = <0x0 0x0 0xf 0xef000000 0x01000000 - 0x1 0x0 0xf 0xff800000 0x00040000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xe 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci1: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p1025rdb.dtsi" -/include/ "fsl/p1021si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dts deleted file mode 100644 index 237310cc..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dts +++ /dev/null @@ -1,89 +0,0 @@ -/* - * P2020 DS Device Tree Source - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p2020si-pre.dtsi" - -/ { - model = "fsl,P2020DS"; - compatible = "fsl,P2020DS"; - - memory { - device_type = "memory"; - }; - - board_lbc: lbc: localbus@ffe05000 { - ranges = <0x0 0x0 0x0 0xe8000000 0x08000000 - 0x1 0x0 0x0 0xe0000000 0x08000000 - 0x2 0x0 0x0 0xffa00000 0x00040000 - 0x3 0x0 0x0 0xffdf0000 0x00008000 - 0x4 0x0 0x0 0xffa40000 0x00040000 - 0x5 0x0 0x0 0xffa80000 0x00040000 - 0x6 0x0 0x0 0xffac0000 0x00040000>; - reg = <0 0xffe05000 0 0x1000>; - }; - - board_soc: soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci2: pcie@ffe08000 { - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - reg = <0 0xffe08000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - board_pci1: pci1: pcie@ffe09000 { - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - reg = <0 0xffe09000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; - - pci0: pcie@ffe0a000 { - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>; - reg = <0 0xffe0a000 0 0x1000>; - pcie@0 { - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - }; - }; -}; - -/* - * p2020ds.dtsi must be last to ensure board_pci0 overrides pci0 settings - * for interrupt-map & interrupt-map-mask - */ - -/include/ "fsl/p2020si-post.dtsi" -/include/ "p2020ds.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dtsi deleted file mode 100644 index d3b939c5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020ds.dtsi +++ /dev/null @@ -1,317 +0,0 @@ -/* - * P2020DS Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011-2012 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&board_lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x8000000>; - bank-width = <2>; - device-width = <1>; - - ramdisk@0 { - reg = <0x0 0x03000000>; - read-only; - }; - - diagnostic@3000000 { - reg = <0x03000000 0x00e00000>; - read-only; - }; - - dink@3e00000 { - reg = <0x03e00000 0x00200000>; - read-only; - }; - - kernel@4000000 { - reg = <0x04000000 0x00400000>; - read-only; - }; - - jffs2@4400000 { - reg = <0x04400000 0x03b00000>; - }; - - dtb@7f00000 { - reg = <0x07f00000 0x00080000>; - read-only; - }; - - u-boot@7f80000 { - reg = <0x07f80000 0x00080000>; - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - u-boot@0 { - reg = <0x0 0x02000000>; - read-only; - }; - - jffs2@2000000 { - reg = <0x02000000 0x10000000>; - }; - - ramdisk@12000000 { - reg = <0x12000000 0x08000000>; - read-only; - }; - - kernel@1a000000 { - reg = <0x1a000000 0x04000000>; - }; - - dtb@1e000000 { - reg = <0x1e000000 0x01000000>; - read-only; - }; - - empty@1f000000 { - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis"; - reg = <0x3 0x0 0x30>; - }; - - nand@4,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x4 0x0 0x40000>; - }; - - nand@5,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x5 0x0 0x40000>; - }; - - nand@6,0 { - compatible = "fsl,elbc-fcm-nand"; - reg = <0x6 0x0 0x40000>; - }; -}; - -&board_soc { - usb@22000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <3 1 0 0>; - reg = <0x1>; - }; - phy2: ethernet-phy@2 { - interrupts = <3 1 0 0>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - - }; - - mdio@25520 { - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26520 { - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - - }; - - ptp_clock@24e00 { - fsl,tclk-period = <5>; - fsl,tmr-prsc = <200>; - fsl,tmr-add = <0xCCCCCCCD>; - fsl,tmr-fiper1 = <0x3B9AC9FB>; - fsl,tmr-fiper2 = <0x0001869B>; - fsl,max-adj = <249999999>; - }; - - enet0: ethernet@24000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - }; - - enet2: ethernet@26000 { - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - }; -}; - -&board_pci1 { - pcie@0 { - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - - // IDSEL 0x11 func 0 - PCI slot 1 - 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 1 - PCI slot 1 - 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 2 - PCI slot 1 - 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 3 - PCI slot 1 - 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 4 - PCI slot 1 - 0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 5 - PCI slot 1 - 0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 6 - PCI slot 1 - 0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x11 func 7 - PCI slot 1 - 0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2 - 0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2 - - // IDSEL 0x1d Audio - 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2 - - // IDSEL 0x1e Legacy - 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2 - 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2 - - // IDSEL 0x1f IDE/SATA - 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2 - 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2 - >; - - uli1575@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x10000>; - isa@1e { - device_type = "isa"; - #interrupt-cells = <2>; - #size-cells = <1>; - #address-cells = <2>; - reg = <0xf000 0x0 0x0 0x0 0x0>; - ranges = <0x1 0x0 0x1000000 0x0 0x0 - 0x1000>; - interrupt-parent = <&i8259>; - - i8259: interrupt-controller@20 { - reg = <0x1 0x20 0x2 - 0x1 0xa0 0x2 - 0x1 0x4d0 0x2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <4 1 0 0>; - interrupt-parent = <&mpic>; - }; - - i8042@60 { - #size-cells = <0>; - #address-cells = <1>; - reg = <0x1 0x60 0x1 0x1 0x64 0x1>; - interrupts = <1 3 12 3>; - interrupt-parent = - <&i8259>; - - keyboard@0 { - reg = <0x0>; - compatible = "pnpPNP,303"; - }; - - mouse@1 { - reg = <0x1>; - compatible = "pnpPNP,f03"; - }; - }; - - rtc@70 { - compatible = "pnpPNP,b00"; - reg = <0x1 0x70 0x2>; - }; - - gpio@400 { - reg = <0x1 0x400 0x80>; - }; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc.dtsi b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc.dtsi deleted file mode 100644 index c21d1c7d..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc.dtsi +++ /dev/null @@ -1,241 +0,0 @@ -/* - * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -&lbc { - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR DTB Image"; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR Linux Kernel Image"; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p2020-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND DTB Image"; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND Linux Kernel Image"; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND Compressed RFS Image"; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; - - cpld@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cpld"; - reg = <0x3 0x0 0x20000>; - read-only; - }; -}; - -&soc { - i2c@3000 { - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,m25p80"; - reg = <0>; - spi-max-frequency = <40000000>; - - partition@0 { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "SPI U-Boot Image"; - read-only; - }; - - partition@80000 { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "SPI DTB Image"; - }; - - partition@100000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "SPI Linux Kernel Image"; - }; - - partition@500000 { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "SPI Compressed RFS Image"; - }; - - partition@900000 { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "SPI JFFS2 RFS"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <2 1 0 0>; - reg = <0x1>; - }; - }; - - mdio@25520 { - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26520 { - status = "disabled"; - }; - - ptp_clock@24e00 { - fsl,tclk-period = <5>; - fsl,tmr-prsc = <200>; - fsl,tmr-add = <0xCCCCCCCD>; - fsl,tmr-fiper1 = <0x3B9AC9FB>; - fsl,tmr-fiper2 = <0x0001869B>; - fsl,max-adj = <249999999>; - }; - - enet0: ethernet@24000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@26000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts deleted file mode 100644 index 852e5b27..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts +++ /dev/null @@ -1,96 +0,0 @@ -/* - * P2020 RDB-PC 32Bit Physical Address Map Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p2020si-pre.dtsi" - -/ { - model = "fsl,P2020RDB"; - compatible = "fsl,P2020RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR and NAND Flashes */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xff800000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000 - 0x3 0x0 0x0 0xffa00000 0x00020000>; - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - }; - - pci0: pcie@ffe08000 { - reg = <0 0xffe08000 0 0x1000>; - status = "disabled"; - }; - - pci1: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p2020rdb-pc.dtsi" -/include/ "fsl/p2020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts deleted file mode 100644 index b5a56ca5..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts +++ /dev/null @@ -1,96 +0,0 @@ -/* - * P2020 RDB-PC 36Bit Physical Address Map Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p2020si-pre.dtsi" - -/ { - model = "fsl,P2020RDB"; - compatible = "fsl,P2020RDB-PC"; - - memory { - device_type = "memory"; - }; - - lbc: localbus@fffe05000 { - reg = <0xf 0xffe05000 0 0x1000>; - - /* NOR and NAND Flashes */ - ranges = <0x0 0x0 0xf 0xef000000 0x01000000 - 0x1 0x0 0xf 0xff800000 0x00040000 - 0x2 0x0 0xf 0xffb00000 0x00020000 - 0x3 0x0 0xf 0xffa00000 0x00020000>; - }; - - soc: soc@fffe00000 { - ranges = <0x0 0xf 0xffe00000 0x100000>; - }; - - pci0: pcie@fffe08000 { - reg = <0xf 0xffe08000 0 0x1000>; - status = "disabled"; - }; - - pci1: pcie@fffe09000 { - reg = <0xf 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@fffe0a000 { - reg = <0xf 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xe0000000 - 0x2000000 0x0 0xe0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "p2020rdb-pc.dtsi" -/include/ "fsl/p2020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb.dts deleted file mode 100644 index 153bc76b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb.dts +++ /dev/null @@ -1,291 +0,0 @@ -/* - * P2020 RDB Device Tree Source - * - * Copyright 2009-2012 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "fsl/p2020si-pre.dtsi" - -/ { - model = "fsl,P2020RDB"; - compatible = "fsl,P2020RDB"; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - memory { - device_type = "memory"; - }; - - lbc: localbus@ffe05000 { - reg = <0 0xffe05000 0 0x1000>; - - /* NOR and NAND Flashes */ - ranges = <0x0 0x0 0x0 0xef000000 0x01000000 - 0x1 0x0 0x0 0xff800000 0x00040000 - 0x2 0x0 0x0 0xffb00000 0x00020000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* This location must not be altered */ - /* 256KB for Vitesse 7385 Switch firmware */ - reg = <0x0 0x00040000>; - label = "NOR (RO) Vitesse-7385 Firmware"; - read-only; - }; - - partition@40000 { - /* 256KB for DTB Image */ - reg = <0x00040000 0x00040000>; - label = "NOR (RO) DTB Image"; - read-only; - }; - - partition@80000 { - /* 3.5 MB for Linux Kernel Image */ - reg = <0x00080000 0x00380000>; - label = "NOR (RO) Linux Kernel Image"; - read-only; - }; - - partition@400000 { - /* 11MB for JFFS2 based Root file System */ - reg = <0x00400000 0x00b00000>; - label = "NOR (RW) JFFS2 Root File System"; - }; - - partition@f00000 { - /* This location must not be altered */ - /* 512KB for u-boot Bootloader Image */ - /* 512KB for u-boot Environment Variables */ - reg = <0x00f00000 0x00100000>; - label = "NOR (RO) U-Boot Image"; - read-only; - }; - }; - - nand@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p2020-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <0x1 0x0 0x40000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND (RO) U-Boot Image"; - read-only; - }; - - partition@100000 { - /* 1MB for DTB Image */ - reg = <0x00100000 0x00100000>; - label = "NAND (RO) DTB Image"; - read-only; - }; - - partition@200000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00200000 0x00400000>; - label = "NAND (RO) Linux Kernel Image"; - read-only; - }; - - partition@600000 { - /* 4MB for Compressed Root file System Image */ - reg = <0x00600000 0x00400000>; - label = "NAND (RO) Compressed RFS Image"; - read-only; - }; - - partition@a00000 { - /* 7MB for JFFS2 based Root file System */ - reg = <0x00a00000 0x00700000>; - label = "NAND (RW) JFFS2 Root File System"; - }; - - partition@1100000 { - /* 15MB for JFFS2 based Root file System */ - reg = <0x01100000 0x00f00000>; - label = "NAND (RW) Writable User area"; - }; - }; - - L2switch@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "vitesse-7385"; - reg = <0x2 0x0 0x20000>; - }; - - }; - - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - - i2c@3000 { - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - - spi@7000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; - - partition@0 { - /* 512KB for u-boot Bootloader Image */ - reg = <0x0 0x00080000>; - label = "SPI (RO) U-Boot Image"; - read-only; - }; - - partition@80000 { - /* 512KB for DTB Image */ - reg = <0x00080000 0x00080000>; - label = "SPI (RO) DTB Image"; - read-only; - }; - - partition@100000 { - /* 4MB for Linux Kernel Image */ - reg = <0x00100000 0x00400000>; - label = "SPI (RO) Linux Kernel Image"; - read-only; - }; - - partition@500000 { - /* 4MB for Compressed RFS Image */ - reg = <0x00500000 0x00400000>; - label = "SPI (RO) Compressed RFS Image"; - read-only; - }; - - partition@900000 { - /* 7MB for JFFS2 based RFS */ - reg = <0x00900000 0x00700000>; - label = "SPI (RW) JFFS2 RFS"; - }; - }; - }; - - usb@22000 { - phy_type = "ulpi"; - dr_mode = "host"; - }; - - mdio@24520 { - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; - }; - phy1: ethernet-phy@1 { - interrupts = <3 1 0 0>; - reg = <0x1>; - }; - tbi-phy@2 { - device_type = "tbi-phy"; - reg = <0x2>; - }; - }; - - mdio@25520 { - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@26520 { - status = "disabled"; - }; - - ptp_clock@24e00 { - fsl,tclk-period = <5>; - fsl,tmr-prsc = <200>; - fsl,tmr-add = <0xCCCCCCCD>; - fsl,tmr-fiper1 = <0x3B9AC9FB>; - fsl,tmr-fiper2 = <0x0001869B>; - fsl,max-adj = <249999999>; - }; - - enet0: ethernet@24000 { - fixed-link = <1 1 1000 0 0>; - phy-connection-type = "rgmii-id"; - }; - - enet1: ethernet@25000 { - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - }; - - enet2: ethernet@26000 { - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - }; - }; - - pci0: pcie@ffe08000 { - reg = <0 0xffe08000 0 0x1000>; - status = "disabled"; - }; - - pci1: pcie@ffe09000 { - reg = <0 0xffe09000 0 0x1000>; - ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0xa0000000 - 0x2000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - pci2: pcie@ffe0a000 { - reg = <0 0xffe0a000 0 0x1000>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; - pcie@0 { - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; - -/include/ "fsl/p2020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts deleted file mode 100644 index 66aac864..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts +++ /dev/null @@ -1,67 +0,0 @@ -/* - * P2020 RDB Core0 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb, - * eth1, eth2, sdhc, crypto, global-util, pci0. - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p2020rdb.dts" - -/ { - model = "fsl,P2020RDB"; - compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP"; - - cpus { - PowerPC,P2020@1 { - status = "disabled"; - }; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - serial1: serial@4600 { - status = "disabled"; - }; - - dma@c300 { - status = "disabled"; - }; - - enet0: ethernet@24000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 42 76 77 78 79 /* serial1 , dma2 */ - 29 30 34 26 /* enet0, pci1 */ - 0xe0 0xe1 0xe2 0xe3 /* msi */ - 0xe4 0xe5 0xe6 0xe7 - >; - }; - - msi@41600 { - status = "disabled"; - }; - }; - - pci0: pcie@ffe08000 { - status = "disabled"; - }; - - pci2: pcie@ffe0a000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts deleted file mode 100644 index 9bd8ef49..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts +++ /dev/null @@ -1,125 +0,0 @@ -/* - * P2020 RDB Core1 Device Tree Source in CAMP mode. - * - * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache - * can be shared, all the other devices must be assigned to one core only. - * This dts allows core1 to have l2, dma2, eth0, pci1, msi. - * - * Please note to add "-b 1" for core1's dts compiling. - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "p2020rdb.dts" - -/ { - model = "fsl,P2020RDB"; - compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP"; - - cpus { - PowerPC,P2020@0 { - status = "disabled"; - }; - }; - - localbus@ffe05000 { - status = "disabled"; - }; - - soc@ffe00000 { - ecm-law@0 { - status = "disabled"; - }; - - ecm@1000 { - status = "disabled"; - }; - - memory-controller@2000 { - status = "disabled"; - }; - - i2c@3000 { - status = "disabled"; - }; - - i2c@3100 { - status = "disabled"; - }; - - serial0: serial@4500 { - status = "disabled"; - }; - - spi@7000 { - status = "disabled"; - }; - - gpio: gpio-controller@f000 { - status = "disabled"; - }; - - dma@21300 { - status = "disabled"; - }; - - usb@22000 { - status = "disabled"; - }; - - mdio@24520 { - status = "disabled"; - }; - - mdio@25520 { - status = "disabled"; - }; - - mdio@26520 { - status = "disabled"; - }; - - enet1: ethernet@25000 { - status = "disabled"; - }; - - enet2: ethernet@26000 { - status = "disabled"; - }; - - sdhci@2e000 { - status = "disabled"; - }; - - crypto@30000 { - status = "disabled"; - }; - - mpic: pic@40000 { - protected-sources = < - 17 18 43 42 59 47 /*ecm, mem, i2c, serial0, spi,gpio */ - 16 20 21 22 23 28 /* L2, dma1, USB */ - 03 35 36 40 31 32 33 /* mdio, enet1, enet2 */ - 72 45 58 25 /* sdhci, crypto , pci */ - >; - }; - - global-utilities@e0000 { //global utilities block - status = "disabled"; - }; - - }; - - pci0: pcie@ffe08000 { - status = "disabled"; - }; - - pci1: pcie@ffe09000 { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2041rdb.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p2041rdb.dts deleted file mode 100644 index 28521397..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p2041rdb.dts +++ /dev/null @@ -1,180 +0,0 @@ -/* - * P2041RDB Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p2041si-pre.dtsi" - -/ { - model = "fsl,P2041RDB"; - compatible = "fsl,P2041RDB"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - soc: soc@ffe000000 { - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118000 { - lm75b@48 { - compatible = "nxp,lm75a"; - reg = <0x48>; - }; - eeprom@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - rtc@68 { - compatible = "pericom,pt7c4338"; - reg = <0x68>; - }; - }; - - i2c@118100 { - eeprom@50 { - compatible = "at24,24c256"; - reg = <0x50>; - }; - }; - - usb1: usb@211000 { - dr_mode = "host"; - }; - }; - - rio: rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - lbc: localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xe8000000 0x08000000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x08000000>; - bank-width = <2>; - device-width = <2>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; -}; - -/include/ "fsl/p2041si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p3041ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p3041ds.dts deleted file mode 100644 index 22a215e9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p3041ds.dts +++ /dev/null @@ -1,233 +0,0 @@ -/* - * P3041DS Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p3041si-pre.dtsi" - -/ { - model = "fsl,P3041DS"; - compatible = "fsl,P3041DS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - soc: soc@ffe000000 { - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118100 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "at24,24c256"; - reg = <0x52>; - }; - }; - - i2c@119100 { - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - }; - - rio: rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - lbc: localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xe8000000 0x08000000 - 2 0 0xf 0xffa00000 0x00040000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x08000000>; - bank-width = <2>; - device-width = <2>; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - label = "NAND U-Boot Image"; - reg = <0x0 0x02000000>; - read-only; - }; - - partition@2000000 { - label = "NAND Root File System"; - reg = <0x02000000 0x10000000>; - }; - - partition@12000000 { - label = "NAND Compressed RFS Image"; - reg = <0x12000000 0x08000000>; - }; - - partition@1a000000 { - label = "NAND Linux Kernel Image"; - reg = <0x1a000000 0x04000000>; - }; - - partition@1e000000 { - label = "NAND DTB Image"; - reg = <0x1e000000 0x01000000>; - }; - - partition@1f000000 { - label = "NAND Writable User area"; - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci3: pcie@ffe203000 { - reg = <0xf 0xfe203000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; -}; - -/include/ "fsl/p3041si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p3060qds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p3060qds.dts deleted file mode 100644 index 9ae875c8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p3060qds.dts +++ /dev/null @@ -1,242 +0,0 @@ -/* - * P3060QDS Device Tree Source - * - * Copyright 2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p3060si-pre.dtsi" - -/ { - model = "fsl,P3060QDS"; - compatible = "fsl,P3060QDS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - soc: soc@ffe000000 { - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - flash@1 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,en25q32b"; - reg = <1>; - spi-max-frequency = <40000000>; /* input clock */ - partition@spi1 { - label = "spi1"; - reg = <0x00000000 0x00400000>; - }; - }; - flash@2 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "atmel,at45db081d"; - reg = <2>; - spi-max-frequency = <40000000>; /* input clock */ - partition@spi1 { - label = "spi2"; - reg = <0x00000000 0x00100000>; - }; - }; - flash@3 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,sst25wf040"; - reg = <3>; - spi-max-frequency = <40000000>; /* input clock */ - partition@spi3 { - label = "spi3"; - reg = <0x00000000 0x00080000>; - }; - }; - }; - - i2c@118000 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@53 { - compatible = "at24,24c256"; - reg = <0x53>; - }; - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - - usb0: usb@210000 { - phy_type = "ulpi"; - }; - - usb1: usb@211000 { - dr_mode = "host"; - phy_type = "ulpi"; - }; - }; - - rio: rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - lbc: localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xe8000000 0x08000000 - 2 0 0xf 0xffa00000 0x00040000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x08000000>; - bank-width = <2>; - device-width = <2>; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - label = "NAND U-Boot Image"; - reg = <0x0 0x02000000>; - read-only; - }; - - partition@2000000 { - label = "NAND Root File System"; - reg = <0x02000000 0x10000000>; - }; - - partition@12000000 { - label = "NAND Compressed RFS Image"; - reg = <0x12000000 0x08000000>; - }; - - partition@1a000000 { - label = "NAND Linux Kernel Image"; - reg = <0x1a000000 0x04000000>; - }; - - partition@1e000000 { - label = "NAND DTB Image"; - reg = <0x1e000000 0x01000000>; - }; - - partition@1f000000 { - label = "NAND Writable User area"; - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p3060qds-fpga", "fsl,fpga-qixis"; - reg = <3 0 0x100>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; -}; - -/include/ "fsl/p3060si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p4080ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p4080ds.dts deleted file mode 100644 index 3e204609..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p4080ds.dts +++ /dev/null @@ -1,187 +0,0 @@ -/* - * P4080DS Device Tree Source - * - * Copyright 2009-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p4080si-pre.dtsi" - -/ { - model = "fsl,P4080DS"; - compatible = "fsl,P4080DS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - soc: soc@ffe000000 { - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118100 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "at24,24c256"; - reg = <0x52>; - }; - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - - usb0: usb@210000 { - phy_type = "ulpi"; - }; - - usb1: usb@211000 { - dr_mode = "host"; - phy_type = "ulpi"; - }; - }; - - rio: rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - lbc: localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xe8000000 0x08000000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x08000000>; - bank-width = <2>; - device-width = <2>; - }; - - board-control@3,0 { - compatible = "fsl,p4080ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - -}; - -/include/ "fsl/p4080si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/p5020ds.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/p5020ds.dts deleted file mode 100644 index 27c07ed6..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/p5020ds.dts +++ /dev/null @@ -1,233 +0,0 @@ -/* - * P5020DS Device Tree Source - * - * Copyright 2010-2011 Freescale Semiconductor Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Freescale Semiconductor nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") as published by the Free Software - * Foundation, either version 2 of that License or (at your option) any - * later version. - * - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/include/ "fsl/p5020si-pre.dtsi" - -/ { - model = "fsl,P5020DS"; - compatible = "fsl,P5020DS"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&mpic>; - - memory { - device_type = "memory"; - }; - - dcsr: dcsr@f00000000 { - ranges = <0x00000000 0xf 0x00000000 0x01008000>; - }; - - soc: soc@ffe000000 { - ranges = <0x00000000 0xf 0xfe000000 0x1000000>; - reg = <0xf 0xfe000000 0 0x00001000>; - spi@110000 { - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spansion,s25sl12801"; - reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ - partition@u-boot { - label = "u-boot"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@kernel { - label = "kernel"; - reg = <0x00100000 0x00500000>; - read-only; - }; - partition@dtb { - label = "dtb"; - reg = <0x00600000 0x00100000>; - read-only; - }; - partition@fs { - label = "file system"; - reg = <0x00700000 0x00900000>; - }; - }; - }; - - i2c@118100 { - eeprom@51 { - compatible = "at24,24c256"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "at24,24c256"; - reg = <0x52>; - }; - }; - - i2c@119100 { - rtc@68 { - compatible = "dallas,ds3232"; - reg = <0x68>; - interrupts = <0x1 0x1 0 0>; - }; - }; - }; - - rio: rapidio@ffe0c0000 { - reg = <0xf 0xfe0c0000 0 0x11000>; - - port1 { - ranges = <0 0 0xc 0x20000000 0 0x10000000>; - }; - port2 { - ranges = <0 0 0xc 0x30000000 0 0x10000000>; - }; - }; - - lbc: localbus@ffe124000 { - reg = <0xf 0xfe124000 0 0x1000>; - ranges = <0 0 0xf 0xe8000000 0x08000000 - 2 0 0xf 0xffa00000 0x00040000 - 3 0 0xf 0xffdf0000 0x00008000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x08000000>; - bank-width = <2>; - device-width = <2>; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,elbc-fcm-nand"; - reg = <0x2 0x0 0x40000>; - - partition@0 { - label = "NAND U-Boot Image"; - reg = <0x0 0x02000000>; - read-only; - }; - - partition@2000000 { - label = "NAND Root File System"; - reg = <0x02000000 0x10000000>; - }; - - partition@12000000 { - label = "NAND Compressed RFS Image"; - reg = <0x12000000 0x08000000>; - }; - - partition@1a000000 { - label = "NAND Linux Kernel Image"; - reg = <0x1a000000 0x04000000>; - }; - - partition@1e000000 { - label = "NAND DTB Image"; - reg = <0x1e000000 0x01000000>; - }; - - partition@1f000000 { - label = "NAND Writable User area"; - reg = <0x1f000000 0x21000000>; - }; - }; - - board-control@3,0 { - compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis"; - reg = <3 0 0x30>; - }; - }; - - pci0: pcie@ffe200000 { - reg = <0xf 0xfe200000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci1: pcie@ffe201000 { - reg = <0xf 0xfe201000 0 0x1000>; - ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci2: pcie@ffe202000 { - reg = <0xf 0xfe202000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; - - pci3: pcie@ffe203000 { - reg = <0xf 0xfe203000 0 0x1000>; - ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; - pcie@0 { - ranges = <0x02000000 0 0xe0000000 - 0x02000000 0 0xe0000000 - 0 0x20000000 - - 0x01000000 0 0x00000000 - 0x01000000 0 0x00000000 - 0 0x00010000>; - }; - }; -}; - -/include/ "fsl/p5020si-post.dtsi" diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm030.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm030.dts deleted file mode 100644 index 9e354997..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm030.dts +++ /dev/null @@ -1,137 +0,0 @@ -/* - * phyCORE-MPC5200B-tiny (pcm030) board Device Tree Source - * - * Copyright 2006 Pengutronix - * Sascha Hauer <s.hauer@pengutronix.de> - * Copyright 2007 Pengutronix - * Juergen Beisert <j.beisert@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "phytec,pcm030"; - compatible = "phytec,pcm030"; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - gpt2: timer@620 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt3: timer@630 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt4: timer@640 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt5: timer@650 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt6: timer@660 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt7: timer@670 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - psc@2000 { /* PSC1 in ac97 mode */ - compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97"; - cell-index = <0>; - }; - - /* PSC2 port is used by CAN1/2 */ - psc@2200 { - status = "disabled"; - }; - - psc@2400 { /* PSC3 in UART mode */ - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - /* PSC4 is ??? */ - psc@2600 { - status = "disabled"; - }; - - /* PSC5 is ??? */ - psc@2800 { - status = "disabled"; - }; - - psc@2c00 { /* PSC6 in UART mode */ - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - i2c@3d40 { - rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "catalyst,24c32"; - reg = <0x52>; - pagesize = <32>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot - 0xc000 0 0 2 &mpc5200_pic 1 1 3 - 0xc000 0 0 3 &mpc5200_pic 1 2 3 - 0xc000 0 0 4 &mpc5200_pic 1 3 3 - - 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot - 0xc800 0 0 2 &mpc5200_pic 1 2 3 - 0xc800 0 0 3 &mpc5200_pic 1 3 3 - 0xc800 0 0 4 &mpc5200_pic 0 0 3>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 - 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; - }; - - localbus { - status = "disabled"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm032.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm032.dts deleted file mode 100644 index 1dd478bf..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/pcm032.dts +++ /dev/null @@ -1,218 +0,0 @@ -/* - * phyCORE-MPC5200B-IO (pcm032) board Device Tree Source - * - * Copyright (C) 2006-2009 Pengutronix - * Sascha Hauer <s.hauer@pengutronix.de> - * Juergen Beisert <j.beisert@pengutronix.de> - * Wolfram Sang <w.sang@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "phytec,pcm032"; - compatible = "phytec,pcm032"; - - memory { - reg = <0x00000000 0x08000000>; // 128MB - }; - - soc5200@f0000000 { - timer@600 { // General Purpose Timer - fsl,has-wdt; - }; - - gpt2: timer@620 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt3: timer@630 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt4: timer@640 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt5: timer@650 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt6: timer@660 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x660 0x10>; - interrupts = <1 15 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt7: timer@670 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - psc@2000 { /* PSC1 is ac97 */ - compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97"; - cell-index = <0>; - }; - - /* PSC2 port is used by CAN1/2 */ - psc@2200 { - status = "disabled"; - }; - - psc@2400 { /* PSC3 in UART mode */ - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - /* PSC4 is ??? */ - psc@2600 { - status = "disabled"; - }; - - /* PSC5 is ??? */ - psc@2800 { - status = "disabled"; - }; - - psc@2c00 { /* PSC6 in UART mode */ - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - i2c@3d40 { - rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; - eeprom@52 { - compatible = "catalyst,24c32"; - reg = <0x52>; - pagesize = <32>; - }; - }; - }; - - pci@f0000d00 { - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot - 0xc000 0 0 2 &mpc5200_pic 1 1 3 - 0xc000 0 0 3 &mpc5200_pic 1 2 3 - 0xc000 0 0 4 &mpc5200_pic 1 3 3 - - 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot - 0xc800 0 0 2 &mpc5200_pic 1 2 3 - 0xc800 0 0 3 &mpc5200_pic 1 3 3 - 0xc800 0 0 4 &mpc5200_pic 0 0 3>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000 - 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>; - }; - - localbus { - ranges = <0 0 0xfe000000 0x02000000 - 1 0 0xfc000000 0x02000000 - 2 0 0xfbe00000 0x00200000 - 3 0 0xf9e00000 0x02000000 - 4 0 0xf7e00000 0x02000000 - 5 0 0xe6000000 0x02000000 - 6 0 0xe8000000 0x02000000 - 7 0 0xea000000 0x02000000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <4>; - #size-cells = <1>; - #address-cells = <1>; - - partition@0 { - label = "ubootl"; - reg = <0x00000000 0x00040000>; - }; - partition@40000 { - label = "kernel"; - reg = <0x00040000 0x001c0000>; - }; - partition@200000 { - label = "jffs2"; - reg = <0x00200000 0x01d00000>; - }; - partition@1f00000 { - label = "uboot"; - reg = <0x01f00000 0x00040000>; - }; - partition@1f40000 { - label = "env"; - reg = <0x01f40000 0x00040000>; - }; - partition@1f80000 { - label = "oftree"; - reg = <0x01f80000 0x00040000>; - }; - partition@1fc0000 { - label = "space"; - reg = <0x01fc0000 0x00040000>; - }; - }; - - sram@2,0 { - compatible = "mtd-ram"; - reg = <2 0 0x00200000>; - bank-width = <2>; - }; - - /* - * example snippets for FPGA - * - * fpga@3,0 { - * compatible = "fpga_driver"; - * reg = <3 0 0x02000000>; - * bank-width = <4>; - * }; - * - * fpga@4,0 { - * compatible = "fpga_driver"; - * reg = <4 0 0x02000000>; - * bank-width = <4>; - * }; - */ - - /* - * example snippets for free chipselects - * - * device@5,0 { - * compatible = "custom_driver"; - * reg = <5 0 0x02000000>; - * }; - * - * device@6,0 { - * compatible = "custom_driver"; - * reg = <6 0 0x02000000>; - * }; - * - * device@7,0 { - * compatible = "custom_driver"; - * reg = <7 0 0x02000000>; - * }; - */ - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/pdm360ng.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/pdm360ng.dts deleted file mode 100644 index 94dfa5c9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/pdm360ng.dts +++ /dev/null @@ -1,410 +0,0 @@ -/* - * Device Tree Source for IFM PDM360NG. - * - * Copyright 2009 - 2010 DENX Software Engineering. - * Anatolij Gustschin <agust@denx.de> - * - * Based on MPC5121E ADS dts. - * Copyright 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "pdm360ng"; - compatible = "ifm,pdm360ng"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&ipic>; - - aliases { - ethernet0 = ð0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,5121@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <0x20>; // 32 bytes - i-cache-line-size = <0x20>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <49500000>;// 49.5 MHz (csb/4) - bus-frequency = <198000000>; // 198 MHz csb bus - clock-frequency = <396000000>; // 396 MHz ppc core - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512MB at 0 - }; - - nfc@40000000 { - compatible = "fsl,mpc5121-nfc"; - reg = <0x40000000 0x100000>; - interrupts = <0x6 0x8>; - #address-cells = <0x1>; - #size-cells = <0x1>; - bank-width = <0x1>; - chips = <0x1>; - - partition@0 { - label = "nand0"; - reg = <0x0 0x40000000>; - }; - }; - - sram@50000000 { - compatible = "fsl,mpc5121-sram"; - reg = <0x50000000 0x20000>; // 128K at 0x50000000 - }; - - localbus@80000020 { - compatible = "fsl,mpc5121-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x80000020 0x40>; - - ranges = <0x0 0x0 0xf0000000 0x10000000 /* Flash */ - 0x2 0x0 0x50040000 0x00020000>; /* CS2: MRAM */ - - flash@0,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - reg = <0 0x00000000 0x08000000 - 0 0x08000000 0x08000000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <4>; - device-width = <2>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00080000>; - read-only; - }; - partition@80000 { - label = "environment"; - reg = <0x00080000 0x00080000>; - read-only; - }; - partition@100000 { - label = "splash-image"; - reg = <0x00100000 0x00080000>; - read-only; - }; - partition@180000 { - label = "device-tree"; - reg = <0x00180000 0x00040000>; - }; - partition@1c0000 { - label = "kernel"; - reg = <0x001c0000 0x00500000>; - }; - partition@6c0000 { - label = "filesystem"; - reg = <0x006c0000 0x07940000>; - }; - }; - - mram0@2,0 { - compatible = "mtd-ram"; - reg = <2 0x00000 0x10000>; - bank-width = <2>; - }; - - mram1@2,10000 { - compatible = "mtd-ram"; - reg = <2 0x010000 0x10000>; - bank-width = <2>; - }; - }; - - soc@80000000 { - compatible = "fsl,mpc5121-immr"; - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - ranges = <0x0 0x80000000 0x400000>; - reg = <0x80000000 0x400000>; - bus-frequency = <66000000>; // 66 MHz ips bus - - // IPIC - // interrupts cell = <intr #, sense> - // sense values match linux IORESOURCE_IRQ_* defines: - // sense == 8: Level, low assertion - // sense == 2: Edge, high-to-low change - // - ipic: interrupt-controller@c00 { - compatible = "fsl,mpc5121-ipic", "fsl,ipic"; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0xc00 0x100>; - }; - - rtc@a00 { // Real time clock - compatible = "fsl,mpc5121-rtc"; - reg = <0xa00 0x100>; - interrupts = <79 0x8 80 0x8>; - }; - - reset@e00 { // Reset module - compatible = "fsl,mpc5121-reset"; - reg = <0xe00 0x100>; - }; - - clock@f00 { // Clock control - compatible = "fsl,mpc5121-clock"; - reg = <0xf00 0x100>; - }; - - pmc@1000{ //Power Management Controller - compatible = "fsl,mpc5121-pmc"; - reg = <0x1000 0x100>; - interrupts = <83 0x2>; - }; - - gpio@1100 { - compatible = "fsl,mpc5121-gpio"; - reg = <0x1100 0x100>; - interrupts = <78 0x8>; - }; - - can@1300 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <12 0x8>; - reg = <0x1300 0x80>; - }; - - can@1380 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <13 0x8>; - reg = <0x1380 0x80>; - }; - - i2c@1700 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c"; - reg = <0x1700 0x20>; - interrupts = <0x9 0x8>; - fsl,preserve-clocking; - - eeprom@50 { - compatible = "at,24c01"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "stm,m41t00"; - reg = <0x68>; - }; - }; - - i2c@1740 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c"; - reg = <0x1740 0x20>; - interrupts = <0xb 0x8>; - fsl,preserve-clocking; - }; - - i2ccontrol@1760 { - compatible = "fsl,mpc5121-i2c-ctrl"; - reg = <0x1760 0x8>; - }; - - axe@2000 { - compatible = "fsl,mpc5121-axe"; - reg = <0x2000 0x100>; - interrupts = <42 0x8>; - }; - - display@2100 { - compatible = "fsl,mpc5121-diu"; - reg = <0x2100 0x100>; - interrupts = <64 0x8>; - }; - - can@2300 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <90 0x8>; - reg = <0x2300 0x80>; - }; - - can@2380 { - compatible = "fsl,mpc5121-mscan"; - interrupts = <91 0x8>; - reg = <0x2380 0x80>; - }; - - viu@2400 { - compatible = "fsl,mpc5121-viu"; - reg = <0x2400 0x400>; - interrupts = <67 0x8>; - }; - - mdio@2800 { - compatible = "fsl,mpc5121-fec-mdio"; - reg = <0x2800 0x200>; - #address-cells = <1>; - #size-cells = <0>; - phy: ethernet-phy@0 { - compatible = "smsc,lan8700"; - reg = <0x1f>; - }; - }; - - eth0: ethernet@2800 { - compatible = "fsl,mpc5121-fec"; - reg = <0x2800 0x200>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <4 0x8>; - phy-handle = < &phy >; - }; - - // USB1 using external ULPI PHY - usb@3000 { - compatible = "fsl,mpc5121-usb2-dr"; - reg = <0x3000 0x600>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <43 0x8>; - dr_mode = "host"; - phy_type = "ulpi"; - }; - - // USB0 using internal UTMI PHY - usb@4000 { - compatible = "fsl,mpc5121-usb2-dr"; - reg = <0x4000 0x600>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = <44 0x8>; - dr_mode = "otg"; - phy_type = "utmi_wide"; - fsl,invert-pwr-fault; - }; - - // IO control - ioctl@a000 { - compatible = "fsl,mpc5121-ioctl"; - reg = <0xA000 0x1000>; - }; - - // 512x PSCs are not 52xx PSCs compatible - serial@11000 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <0>; - reg = <0x11000 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11100 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <1>; - reg = <0x11100 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11200 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <2>; - reg = <0x11200 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11300 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <3>; - reg = <0x11300 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11400 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <4>; - reg = <0x11400 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11600 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <6>; - reg = <0x11600 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11800 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <8>; - reg = <0x11800 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - serial@11B00 { - compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; - cell-index = <11>; - reg = <0x11B00 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - }; - - pscfifo@11f00 { - compatible = "fsl,mpc5121-psc-fifo"; - reg = <0x11f00 0x100>; - interrupts = <40 0x8>; - }; - - spi@11900 { - compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc"; - cell-index = <9>; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x11900 0x100>; - interrupts = <40 0x8>; - fsl,rx-fifo-size = <16>; - fsl,tx-fifo-size = <16>; - - // 7845 touch screen controller - ts@0 { - compatible = "ti,ads7846"; - reg = <0x0>; - spi-max-frequency = <3000000>; - // pen irq is GPIO25 - interrupts = <78 0x8>; - }; - }; - - dma@14000 { - compatible = "fsl,mpc5121-dma"; - reg = <0x14000 0x1800>; - interrupts = <65 0x8>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/pq2fads.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/pq2fads.dts deleted file mode 100644 index 0bb66937..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/pq2fads.dts +++ /dev/null @@ -1,250 +0,0 @@ -/* - * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip. - * - * Copyright 2007,2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "pq2fads"; - compatible = "fsl,pq2fads"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <16384>; - i-cache-size = <16384>; - timebase-frequency = <0>; - clock-frequency = <0>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; - }; - - localbus@f0010100 { - compatible = "fsl,mpc8280-localbus", - "fsl,pq2-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xf0010100 0x60>; - - ranges = <0x0 0x0 0xff800000 0x800000 - 0x1 0x0 0xf4500000 0x8000 - 0x8 0x0 0xf8200000 0x8000>; - - flash@0,0 { - compatible = "jedec-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <4>; - device-width = <1>; - }; - - bcsr@1,0 { - reg = <0x1 0x0 0x20>; - compatible = "fsl,pq2fads-bcsr"; - }; - - PCI_PIC: pic@8,0 { - #interrupt-cells = <1>; - interrupt-controller; - reg = <0x8 0x0 0x8>; - compatible = "fsl,pq2ads-pci-pic"; - interrupt-parent = <&PIC>; - interrupts = <24 8>; - }; - }; - - pci0: pci@f0010800 { - device_type = "pci"; - reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>; - compatible = "fsl,mpc8280-pci", "fsl,pq2-pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - clock-frequency = <66000000>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x16 */ - 0xb000 0x0 0x0 0x1 &PCI_PIC 0 - 0xb000 0x0 0x0 0x2 &PCI_PIC 1 - 0xb000 0x0 0x0 0x3 &PCI_PIC 2 - 0xb000 0x0 0x0 0x4 &PCI_PIC 3 - - /* IDSEL 0x17 */ - 0xb800 0x0 0x0 0x1 &PCI_PIC 4 - 0xb800 0x0 0x0 0x2 &PCI_PIC 5 - 0xb800 0x0 0x0 0x3 &PCI_PIC 6 - 0xb800 0x0 0x0 0x4 &PCI_PIC 7 - - /* IDSEL 0x18 */ - 0xc000 0x0 0x0 0x1 &PCI_PIC 8 - 0xc000 0x0 0x0 0x2 &PCI_PIC 9 - 0xc000 0x0 0x0 0x3 &PCI_PIC 10 - 0xc000 0x0 0x0 0x4 &PCI_PIC 11>; - - interrupt-parent = <&PIC>; - interrupts = <18 8>; - ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>; - }; - - soc@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8280", "fsl,pq2-soc"; - ranges = <0x0 0xf0000000 0x53000>; - - // Temporary -- will go away once kernel uses ranges for get_immrbase(). - reg = <0xf0000000 0x53000>; - - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - compatible = "fsl,mpc8280-cpm", "fsl,cpm2"; - reg = <0x119c0 0x30>; - ranges; - - muram@0 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9800 0x800>; - }; - }; - - brg@119f0 { - compatible = "fsl,mpc8280-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x119f0 0x10 0x115f0 0x10>; - }; - - serial0: serial@11a00 { - device_type = "serial"; - compatible = "fsl,mpc8280-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a00 0x20 0x8000 0x100>; - interrupts = <40 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - }; - - serial1: serial@11a20 { - device_type = "serial"; - compatible = "fsl,mpc8280-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x11a20 0x20 0x8100 0x100>; - interrupts = <41 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - }; - - enet0: ethernet@11320 { - device_type = "network"; - compatible = "fsl,mpc8280-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; - interrupts = <33 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - linux,network-index = <0>; - fsl,cpm-command = <0x16200300>; - }; - - enet1: ethernet@11340 { - device_type = "network"; - compatible = "fsl,mpc8280-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>; - interrupts = <34 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY1>; - linux,network-index = <1>; - fsl,cpm-command = <0x1a400300>; - local-mac-address = [00 e0 0c 00 79 01]; - }; - - mdio@10d40 { - device_type = "mdio"; - compatible = "fsl,pq2fads-mdio-bitbang", - "fsl,mpc8280-mdio-bitbang", - "fsl,cpm2-mdio-bitbang"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x10d40 0x14>; - fsl,mdio-pin = <9>; - fsl,mdc-pin = <10>; - - PHY0: ethernet-phy@0 { - interrupt-parent = <&PIC>; - interrupts = <25 2>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&PIC>; - interrupts = <25 2>; - reg = <0x3>; - device_type = "ethernet-phy"; - }; - }; - - usb@11b60 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc8280-usb", - "fsl,cpm2-usb"; - reg = <0x11b60 0x18 0x8b00 0x100>; - interrupt-parent = <&PIC>; - interrupts = <11 8>; - fsl,cpm-command = <0x2e600000>; - }; - }; - - PIC: interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <0x10c00 0x80>; - compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic"; - }; - - }; - - chosen { - linux,stdout-path = "/soc/cpm/serial@11a00"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/prpmc2800.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/prpmc2800.dts deleted file mode 100644 index 1ee6ff43..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/prpmc2800.dts +++ /dev/null @@ -1,302 +0,0 @@ -/* Device Tree Source for Motorola PrPMC2800 - * - * Author: Mark A. Greer <mgreer@mvista.com> - * - * 2007 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - * Property values that are labeled as "Default" will be updated by bootwrapper - * if it can determine the exact PrPMC type. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "PrPMC280/PrPMC2800"; /* Default */ - compatible = "motorola,PrPMC2800"; - coherency-off; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,7447 { - device_type = "cpu"; - reg = <0>; - clock-frequency = <733333333>; /* Default */ - bus-frequency = <133333333>; - timebase-frequency = <33333333>; - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x20000000>; /* Default (512MB) */ - }; - - system-controller@f1000000 { /* Marvell Discovery mv64360 */ - #address-cells = <1>; - #size-cells = <1>; - model = "mv64360"; /* Default */ - compatible = "marvell,mv64360"; - clock-frequency = <133333333>; - reg = <0xf1000000 0x10000>; - virtual-reg = <0xf1000000>; - ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */ - 0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */ - 0xa0000000 0xa0000000 0x4000000 /* User FLASH */ - 0x00000000 0xf1000000 0x0010000 /* Bridge's regs */ - 0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */ - - flash@a0000000 { - device_type = "rom"; - compatible = "direct-mapped"; - reg = <0xa0000000 0x4000000>; /* Default (64MB) */ - probe-type = "CFI"; - bank-width = <4>; - partitions = <0x00000000 0x00100000 /* RO */ - 0x00100000 0x00040001 /* RW */ - 0x00140000 0x00400000 /* RO */ - 0x00540000 0x039c0000 /* RO */ - 0x03f00000 0x00100000>; /* RO */ - partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B"; - }; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - device_type = "mdio"; - compatible = "marvell,mv64360-mdio"; - PHY0: ethernet-phy@1 { - device_type = "ethernet-phy"; - compatible = "broadcom,bcm5421"; - interrupts = <76>; /* GPP 12 */ - interrupt-parent = <&PIC>; - reg = <1>; - }; - PHY1: ethernet-phy@3 { - device_type = "ethernet-phy"; - compatible = "broadcom,bcm5421"; - interrupts = <76>; /* GPP 12 */ - interrupt-parent = <&PIC>; - reg = <3>; - }; - }; - - ethernet-group@2000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "marvell,mv64360-eth-group"; - reg = <0x2000 0x2000>; - ethernet@0 { - device_type = "network"; - compatible = "marvell,mv64360-eth"; - reg = <0>; - interrupts = <32>; - interrupt-parent = <&PIC>; - phy = <&PHY0>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - ethernet@1 { - device_type = "network"; - compatible = "marvell,mv64360-eth"; - reg = <1>; - interrupts = <33>; - interrupt-parent = <&PIC>; - phy = <&PHY1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - }; - }; - - SDMA0: sdma@4000 { - compatible = "marvell,mv64360-sdma"; - reg = <0x4000 0xc18>; - virtual-reg = <0xf1004000>; - interrupts = <36>; - interrupt-parent = <&PIC>; - }; - - SDMA1: sdma@6000 { - compatible = "marvell,mv64360-sdma"; - reg = <0x6000 0xc18>; - virtual-reg = <0xf1006000>; - interrupts = <38>; - interrupt-parent = <&PIC>; - }; - - BRG0: brg@b200 { - compatible = "marvell,mv64360-brg"; - reg = <0xb200 0x8>; - clock-src = <8>; - clock-frequency = <133333333>; - current-speed = <9600>; - }; - - BRG1: brg@b208 { - compatible = "marvell,mv64360-brg"; - reg = <0xb208 0x8>; - clock-src = <8>; - clock-frequency = <133333333>; - current-speed = <9600>; - }; - - CUNIT: cunit@f200 { - reg = <0xf200 0x200>; - }; - - MPSCROUTING: mpscrouting@b400 { - reg = <0xb400 0xc>; - }; - - MPSCINTR: mpscintr@b800 { - reg = <0xb800 0x100>; - virtual-reg = <0xf100b800>; - }; - - MPSC0: mpsc@8000 { - device_type = "serial"; - compatible = "marvell,mv64360-mpsc"; - reg = <0x8000 0x38>; - virtual-reg = <0xf1008000>; - sdma = <&SDMA0>; - brg = <&BRG0>; - cunit = <&CUNIT>; - mpscrouting = <&MPSCROUTING>; - mpscintr = <&MPSCINTR>; - cell-index = <0>; - interrupts = <40>; - interrupt-parent = <&PIC>; - }; - - MPSC1: mpsc@9000 { - device_type = "serial"; - compatible = "marvell,mv64360-mpsc"; - reg = <0x9000 0x38>; - virtual-reg = <0xf1009000>; - sdma = <&SDMA1>; - brg = <&BRG1>; - cunit = <&CUNIT>; - mpscrouting = <&MPSCROUTING>; - mpscintr = <&MPSCINTR>; - cell-index = <1>; - interrupts = <42>; - interrupt-parent = <&PIC>; - }; - - wdt@b410 { /* watchdog timer */ - compatible = "marvell,mv64360-wdt"; - reg = <0xb410 0x8>; - }; - - i2c@c000 { - device_type = "i2c"; - compatible = "marvell,mv64360-i2c"; - reg = <0xc000 0x20>; - virtual-reg = <0xf100c000>; - interrupts = <37>; - interrupt-parent = <&PIC>; - }; - - PIC: pic { - #interrupt-cells = <1>; - #address-cells = <0>; - compatible = "marvell,mv64360-pic"; - reg = <0x0 0x88>; - interrupt-controller; - }; - - mpp@f000 { - compatible = "marvell,mv64360-mpp"; - reg = <0xf000 0x10>; - }; - - gpp@f100 { - compatible = "marvell,mv64360-gpp"; - reg = <0xf100 0x20>; - }; - - pci@80000000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "marvell,mv64360-pci"; - reg = <0xcf8 0x8>; - ranges = <0x01000000 0x0 0x0 - 0x88000000 0x0 0x01000000 - 0x02000000 0x0 0x80000000 - 0x80000000 0x0 0x08000000>; - bus-range = <0 255>; - clock-frequency = <66000000>; - interrupt-pci-iack = <0xc34>; - interrupt-parent = <&PIC>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0a */ - 0x5000 0 0 1 &PIC 80 - 0x5000 0 0 2 &PIC 81 - 0x5000 0 0 3 &PIC 91 - 0x5000 0 0 4 &PIC 93 - - /* IDSEL 0x0b */ - 0x5800 0 0 1 &PIC 91 - 0x5800 0 0 2 &PIC 93 - 0x5800 0 0 3 &PIC 80 - 0x5800 0 0 4 &PIC 81 - - /* IDSEL 0x0c */ - 0x6000 0 0 1 &PIC 91 - 0x6000 0 0 2 &PIC 93 - 0x6000 0 0 3 &PIC 80 - 0x6000 0 0 4 &PIC 81 - - /* IDSEL 0x0d */ - 0x6800 0 0 1 &PIC 93 - 0x6800 0 0 2 &PIC 80 - 0x6800 0 0 3 &PIC 81 - 0x6800 0 0 4 &PIC 91 - >; - }; - - cpu-error@0070 { - compatible = "marvell,mv64360-cpu-error"; - reg = <0x70 0x10 0x128 0x28>; - interrupts = <3>; - interrupt-parent = <&PIC>; - }; - - sram-ctrl@0380 { - compatible = "marvell,mv64360-sram-ctrl"; - reg = <0x380 0x80>; - interrupts = <13>; - interrupt-parent = <&PIC>; - }; - - pci-error@1d40 { - compatible = "marvell,mv64360-pci-error"; - reg = <0x1d40 0x40 0xc28 0x4>; - interrupts = <12>; - interrupt-parent = <&PIC>; - }; - - mem-ctrl@1400 { - compatible = "marvell,mv64360-mem-ctrl"; - reg = <0x1400 0x60>; - interrupts = <17>; - interrupt-parent = <&PIC>; - }; - }; - - chosen { - bootargs = "ip=on"; - linux,stdout-path = &MPSC0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/ps3.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/ps3.dts deleted file mode 100644 index 96ba5b51..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/ps3.dts +++ /dev/null @@ -1,70 +0,0 @@ -/* - * PS3 Game Console device tree. - * - * Copyright (C) 2007 Sony Computer Entertainment Inc. - * Copyright 2007 Sony Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/dts-v1/; - -/ { - model = "SonyPS3"; - compatible = "sony,ps3"; - #size-cells = <2>; - #address-cells = <2>; - - chosen { - }; - - /* - * We'll get the size of the bootmem block from lv1 after startup, - * so we'll put a null entry here. - */ - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000 0x00000000>; - }; - - /* - * The boot cpu is always zero for PS3. - * - * dtc expects a clock-frequency and timebase-frequency entries, so - * we'll put a null entries here. These will be initialized after - * startup with data from lv1. - * - * Seems the only way currently to indicate a processor has multiple - * threads is with an ibm,ppc-interrupt-server#s entry. We'll put one - * here so we can bring up both of ours. See smp_setup_cpu_maps(). - */ - - cpus { - #size-cells = <0>; - #address-cells = <1>; - - cpu@0 { - device_type = "cpu"; - reg = <0x00000000>; - ibm,ppc-interrupt-server#s = <0x0 0x1>; - clock-frequency = <0>; - timebase-frequency = <0>; - i-cache-size = <32768>; - d-cache-size = <32768>; - i-cache-line-size = <128>; - d-cache-line-size = <128>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/rainier.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/rainier.dts deleted file mode 100644 index 9684c80e..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/rainier.dts +++ /dev/null @@ -1,350 +0,0 @@ -/* - * Device Tree Source for AMCC Rainier - * - * Based on Sequoia code - * Copyright (c) 2007 MontaVista Software, Inc. - * - * FIXME: Draft only! - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,rainier"; - compatible = "amcc,rainier"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - serial3 = &UART3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440GRx"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440grx","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440grx","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-440grx","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440grx", "ibm,sdr-440ep"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440grx", "ibm,cpr-440ep"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-440grx", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali"; - dcr-reg = <0x010 0x002>; - }; - - DMA0: dma { - compatible = "ibm,dma-440grx", "ibm,dma-4xx"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440grx", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-440grx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440grx", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl256n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Kernel"; - reg = <0x00000000 0x00180000>; - }; - partition@180000 { - label = "ramdisk"; - reg = <0x00180000 0x00200000>; - }; - partition@380000 { - label = "file system"; - reg = <0x00380000 0x03aa0000>; - }; - partition@3e20000 { - label = "kozio"; - reg = <0x03e20000 0x00140000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 0x00000008>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x3 0x4>; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 0x00000008>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x4 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-440grx", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-440grx", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440grx", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - RGMII0: emac-rgmii@ef601000 { - compatible = "ibm,rgmii-440grx", "ibm,rgmii"; - reg = <0xef601000 0x00000008>; - has-mdio; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600e00 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 - /*Wake*/ 0x1 &UIC1 0x1f 0x4>; - reg = <0xef600f00 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCI0: pci@1ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440grx-pci", "ibm,plb-pci"; - primary; - reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ - 0x00000001 0xeed00000 0x00000004 /* IACK */ - 0x00000001 0xeed00000 0x00000004 /* Special cycle */ - 0x00000001 0xef400000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000 - 0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000 - 0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* All PCI interrupts are routed to IRQ 67 */ - interrupt-map-mask = <0x0 0x0 0x0 0x0>; - interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - bootargs = "console=ttyS0,115200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/redwood.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/redwood.dts deleted file mode 100644 index d86a3a49..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/redwood.dts +++ /dev/null @@ -1,387 +0,0 @@ -/* - * Device Tree Source for AMCC Redwood(460SX) - * - * Copyright 2008 AMCC <tmarri@amcc.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,redwood"; - compatible = "amcc,redwood"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,460SX"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC3: interrupt-controller3 { - compatible = "ibm,uic-460sx","ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x0f0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-460sx"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-460sx"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-460sx", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by U-Boot */ - - SDRAM0: sdram { - compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; - dcr-reg = <0x180 0x62>; - num-tx-chans = <4>; - num-rx-chans = <32>; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&UIC1>; - interrupts = < /*TXEOB*/ 0x6 0x4 - /*RXEOB*/ 0x7 0x4 - /*SERR*/ 0x1 0x4 - /*TXDE*/ 0x2 0x4 - /*RXDE*/ 0x3 0x4 - /*COAL TX0*/ 0x18 0x2 - /*COAL TX1*/ 0x19 0x2 - /*COAL TX2*/ 0x1a 0x2 - /*COAL TX3*/ 0x1b 0x2 - /*COAL RX0*/ 0x1c 0x2 - /*COAL RX1*/ 0x1d 0x2 - /*COAL RX2*/ 0x1e 0x2 - /*COAL RX3*/ 0x1f 0x2>; - }; - - POB0: opb { - compatible = "ibm,opb-460sx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; - clock-frequency = <0>; /* Filled in by U-Boot */ - - EBC0: ebc { - compatible = "ibm,ebc-460sx", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by U-Boot */ - /* ranges property is supplied by U-Boot */ - interrupts = <0x6 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; - bank-width = <2>; - reg = <0x0000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "ramdisk"; - reg = <0x00200000 0x01400000>; - }; - partition@1600000 { - label = "jffs2"; - reg = <0x01600000 0x00400000>; - }; - partition@1a00000 { - label = "user"; - reg = <0x01a00000 0x02560000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - }; - - UART0: serial@ef600200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600200 0x00000008>; - virtual-reg = <0xef600200>; - clock-frequency = <0>; /* Filled in by U-Boot */ - current-speed = <0>; /* Filled in by U-Boot */ - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - RGMII0: emac-rgmii@ef600900 { - compatible = "ibm,rgmii-460sx", "ibm,rgmii"; - reg = <0xef600900 0x00000008>; - }; - - EMAC0: ethernet@ef600a00 { - device_type = "network"; - compatible = "ibm,emac-460sx", "ibm,emac4"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 - /*Wake*/ 0x1 &UIC2 0x1d 0x4>; - reg = <0xef600a00 0x00000070>; - local-mac-address = [000000000000]; /* Filled in by U-Boot */ - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - rx-fifo-size-gige = <16384>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - PCIE0: pciex@d00000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ - 0x0000000c 0x10000000 0x00001000>; /* Registers */ - dcr-reg = <0x100 0x020>; - sdr-base = <0x300>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 10 to 0x1f */ - bus-range = <0x10 0x1f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; - }; - - PCIE1: pciex@d20000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ - 0x0000000c 0x10001000 0x00001000>; /* Registers */ - dcr-reg = <0x120 0x020>; - sdr-base = <0x340>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 10 to 0x1f */ - bus-range = <0x20 0x2f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; - }; - - PCIE2: pciex@d40000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; - primary; - port = <0x2>; /* port number */ - reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ - 0x0000000c 0x10002000 0x00001000>; /* Registers */ - dcr-reg = <0x140 0x020>; - sdr-base = <0x370>; - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* This drives busses 10 to 0x1f */ - bus-range = <0x30 0x3f>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ - 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ - 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ - 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; - }; - - MSI: ppc4xx-msi@400300000 { - compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; - reg = < 0x4 0x00300000 0x100 - 0x4 0x00300000 0x100>; - sdr-base = <0x3B0>; - msi-data = <0x00000000>; - msi-mask = <0x44440000>; - interrupt-count = <3>; - interrupts =<0 1 2 3>; - interrupt-parent = <&UIC0>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0 &UIC0 0xC 1 - 1 &UIC0 0x0D 1 - 2 &UIC0 0x0E 1 - 3 &UIC0 0x0F 1>; - }; - - }; - - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600200"; - }; - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sam440ep.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sam440ep.dts deleted file mode 100644 index f0663be1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sam440ep.dts +++ /dev/null @@ -1,293 +0,0 @@ -/* - * Device Tree Source for ACube Sam440ep based off bamboo.dts code - * original copyrights below - * - * Copyright (c) 2006, 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * Modified from bamboo.dts for sam440ep: - * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "acube,sam440ep"; - compatible = "acube,sam440ep"; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - serial3 = &UART3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440EP"; - reg = <0>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0 0 0>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 9>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 9>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 4 0x1f 4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440ep"; - dcr-reg = <0x00e 2>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440ep"; - dcr-reg = <0x00c 2>; - }; - - plb { - compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <0x010 2>; - }; - - DMA0: dma { - compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0 &UIC0 10 4 - /*RXEOB*/ 1 &UIC0 11 4 - /*SERR*/ 2 &UIC1 0 4 - /*TXDE*/ 3 &UIC1 1 4 - /*RXDE*/ 4 &UIC1 2 4>; - }; - - POB0: opb { - compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Bamboo is oddball in the 44x world and doesn't use the ERPN - * bits. - */ - ranges = <0x00000000 0 0x00000000 0x80000000 - 0x80000000 0 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <7 4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 2>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <5 1>; - interrupt-parent = <&UIC1>; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 8>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <0x1c200>; - interrupt-parent = <&UIC0>; - interrupts = <0 4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 8>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <1 4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 8>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <3 4>; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 8>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <4 4>; - }; - - IIC0: i2c@ef600700 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - index = <0>; - reg = <0xef600700 0x14>; - interrupt-parent = <&UIC0>; - interrupts = <2 4>; - rtc@68 { - compatible = "stm,m41t80"; - reg = <0x68>; - }; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - index = <5>; - reg = <0xef600800 0x14>; - interrupt-parent = <&UIC0>; - interrupts = <7 4>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = <0xef600d00 0xc>; - }; - - EMAC0: ethernet@ef600e00 { - linux,network-index = <0>; - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 4 0x1d 4>; - reg = <0xef600e00 0x70>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0 1>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <0x5dc>; - rx-fifo-size = <0x1000>; - tx-fifo-size = <0x800>; - phy-mode = "rmii"; - phy-map = <00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - - EMAC1: ethernet@ef600f00 { - linux,network-index = <1>; - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1e 4 0x1f 4>; - reg = <0xef600f00 0x70>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <2 3>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <0x5dc>; - rx-fifo-size = <0x1000>; - tx-fifo-size = <0x800>; - phy-mode = "rmii"; - phy-map = <00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - }; - usb@ef601000 { - compatible = "ohci-be"; - reg = <0xef601000 0x80>; - interrupts = <8 4 9 4>; - interrupt-parent = <&UIC1>; - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; - primary; - reg = <0 0xeec00000 8 /* Config space access */ - 0 0xeed00000 4 /* IACK */ - 0 0xeed00000 4 /* Special cycle */ - 0 0xef400000 0x40>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 - 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8349.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8349.dts deleted file mode 100644 index b1e45a85..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8349.dts +++ /dev/null @@ -1,333 +0,0 @@ -/* - * SBC8349E Device Tree Source - * - * Copyright 2007 Wind River Inc. - * - * Paul Gortmaker (see MAINTAINERS for contact information) - * - * -based largely on the Freescale MPC834x_MDS dts. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "SBC8349E"; - compatible = "SBC834xE"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8349@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; // 256MB at 0 - }; - - soc8349@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x00100000>; - reg = <0xe0000000 0x00000200>; - bus-frequency = <0>; - - wdt@200 { - compatible = "mpc83xx_wdt"; - reg = <0x200 0x100>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <15 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - }; - - spi@7000 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <0x7000 0x1000>; - interrupts = <16 0x8>; - interrupt-parent = <&ipic>; - mode = "cpu"; - }; - - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <0x82a8 4>; - ranges = <0 0x8100 0x1a8>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0 0x80>; - cell-index = <0>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - reg = <0x180 0x28>; - cell-index = <3>; - interrupt-parent = <&ipic>; - interrupts = <71 8>; - }; - }; - - /* phy type (ULPI or SERIAL) are only types supported for MPH */ - /* port = 0 or 1 */ - usb@22000 { - compatible = "fsl-usb2-mph"; - reg = <0x22000 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&ipic>; - interrupts = <39 0x8>; - phy_type = "ulpi"; - port0; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <32 0x8 33 0x8 34 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - linux,network-index = <0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@19 { - interrupt-parent = <&ipic>; - interrupts = <20 0x8>; - reg = <0x19>; - device_type = "ethernet-phy"; - }; - - phy1: ethernet-phy@1a { - interrupt-parent = <&ipic>; - interrupts = <21 0x8>; - reg = <0x1a>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 0x8 36 0x8 37 0x8>; - interrupt-parent = <&ipic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - linux,network-index = <1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <9 0x8>; - interrupt-parent = <&ipic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <10 0x8>; - interrupt-parent = <&ipic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - /* IPIC - * interrupts cell = <intr #, sense> - * sense values match linux IORESOURCE_IRQ_* defines: - * sense == 8: Level, low assertion - * sense == 2: Edge, high-to-low change - */ - ipic: pic@700 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x700 0x100>; - device_type = "ipic"; - }; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8349-localbus", "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupts = <77 0x8>; - interrupt-parent = <&ipic>; - ranges = <0x0 0x0 0xff800000 0x00800000 /* 8MB Flash */ - 0x1 0x0 0xf8000000 0x00002000 /* 8KB EEPROM */ - 0x2 0x0 0x10000000 0x04000000 /* 64MB SDRAM */ - 0x3 0x0 0x10000000 0x04000000>; /* 64MB SDRAM */ - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "intel,28F640J3A", "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00040000>; - read-only; - }; - - partition@40000 { - label = "user"; - reg = <0x00040000 0x006c0000>; - }; - - partition@700000 { - label = "legacy u-boot"; - reg = <0x00700000 0x00100000>; - read-only; - }; - - }; - }; - - pci0: pci@e0008500 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &ipic 48 0x8 - 0x8800 0x0 0x0 0x2 &ipic 17 0x8 - 0x8800 0x0 0x0 0x3 &ipic 18 0x8 - 0x8800 0x0 0x0 0x4 &ipic 19 0x8>; - - interrupt-parent = <&ipic>; - interrupts = <0x42 0x8>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100 /* internal registers */ - 0xe0008300 0x8>; /* config space access registers */ - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8548.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8548.dts deleted file mode 100644 index 77be7711..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8548.dts +++ /dev/null @@ -1,428 +0,0 @@ -/* - * SBC8548 Device Tree Source - * - * Copyright 2007 Wind River Systems Inc. - * - * Paul Gortmaker (see MAINTAINERS for contact information) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - - -/dts-v1/; - -/ { - model = "SBC8548"; - compatible = "SBC8548"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <0x20>; // 32 bytes - i-cache-line-size = <0x20>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - localbus@e0000000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "simple-bus"; - reg = <0xe0000000 0x5000>; - interrupt-parent = <&mpic>; - - ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/ - 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/ - 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/ - 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */ - 0x6 0x0 0xfb800000 0x04000000>; /*64MB Flash*/ - - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x800000>; - bank-width = <1>; - device-width = <1>; - partition@0x0 { - label = "space"; - reg = <0x00000000 0x00100000>; - }; - partition@0x100000 { - label = "bootloader"; - reg = <0x00100000 0x00700000>; - read-only; - }; - }; - - epld@5,0 { - compatible = "wrs,epld-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x5 0x0 0x00b10000>; - ranges = < - 0x0 0x0 0x5 0x000000 0x1fff /* LED */ - 0x1 0x0 0x5 0x100000 0x1fff /* Switches */ - 0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */ - 0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */ - >; - - led@0,0 { - compatible = "led"; - reg = <0x0 0x0 0x1fff>; - }; - - switches@1,0 { - compatible = "switches"; - reg = <0x1 0x0 0x1fff>; - }; - - hw-rev@3,0 { - compatible = "hw-rev"; - reg = <0x3 0x0 0x1fff>; - }; - - eeprom@b,0 { - compatible = "eeprom"; - reg = <0xb 0 0x1fff>; - }; - - }; - - alt-flash@6,0 { - #address-cells = <1>; - #size-cells = <1>; - reg = <0x6 0x0 0x04000000>; - compatible = "cfi-flash"; - bank-width = <4>; - device-width = <1>; - partition@0x0 { - label = "bootloader"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@0x00100000 { - label = "file-system"; - reg = <0x00100000 0x01f00000>; - }; - partition@0x02000000 { - label = "boot-config"; - reg = <0x02000000 0x00100000>; - }; - partition@0x02100000 { - label = "space"; - reg = <0x02100000 0x01f00000>; - }; - }; - }; - - soc8548@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x00000000 0xe0000000 0x00100000>; - bus-frequency = <0>; - compatible = "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <0x12 0x2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <0x20>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupt-parent = <&mpic>; - interrupts = <0x10 0x2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@19 { - interrupt-parent = <&mpic>; - interrupts = <0x6 0x1>; - reg = <0x19>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1a { - interrupt-parent = <&mpic>; - interrupts = <0x7 0x1>; - reg = <0x1a>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <0x2a 0x2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <0x2a 0x2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities reg - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - crypto@30000 { - compatible = "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0xfe>; - fsl,descriptor-types-mask = <0x12b0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x01 (PCI-X slot) @66MHz */ - 0x0800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x0800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x0800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x0800 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x11 (PCI, 3.3V 32bit) @33MHz */ - 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1>; - - interrupt-parent = <&mpic>; - interrupts = <0x18 0x2>; - bus-range = <0 0>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00800000>; - clock-frequency = <66000000>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - }; - - pci1: pcie@e000a000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x0 (PEX) */ - 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1>; - - interrupt-parent = <&mpic>; - interrupts = <0x1a 0x2>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2800000 0x0 0x08000000>; - clock-frequency = <33000000>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe000a000 0x1000>; - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x10000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00800000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8560.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8560.dts deleted file mode 100644 index 72078eb1..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8560.dts +++ /dev/null @@ -1,406 +0,0 @@ -/* - * SBC8560 Device Tree Source - * - * Copyright 2007 Wind River Systems Inc. - * - * Paul Gortmaker (see MAINTAINERS for contact information) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "SBC8560"; - compatible = "SBC8560"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <0x20>; // 32 bytes - i-cache-line-size = <0x20>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; - }; - - soc@ff700000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xff700000 0x00100000>; - clock-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8560-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <0x12 0x2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8560-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <0x20>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <0x10 0x2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <0x2b 0x2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - phy0: ethernet-phy@19 { - interrupt-parent = <&mpic>; - interrupts = <0x6 0x1>; - reg = <0x19>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1a { - interrupt-parent = <&mpic>; - interrupts = <0x7 0x1>; - reg = <0x1a>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@1b { - interrupt-parent = <&mpic>; - interrupts = <0x8 0x1>; - reg = <0x1b>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@1c { - interrupt-parent = <&mpic>; - interrupts = <0x8 0x1>; - reg = <0x1c>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,open-pic"; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <165000000>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x2e 0x2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - enet2: ethernet@91320 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x16200300>; - interrupts = <0x21 0x8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy2>; - }; - - enet3: ethernet@91340 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x1a400300>; - interrupts = <0x22 0x8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy3>; - }; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8560-guts"; - reg = <0xe0000 0x1000>; - }; - }; - - pci0: pci@ff708000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xff708000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x02 */ - 0x1000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0x1000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0x1000 0x0 0x0 0x3 &mpic 0x4 0x1 - 0x1000 0x0 0x0 0x4 &mpic 0x5 0x1>; - - interrupt-parent = <&mpic>; - interrupts = <0x18 0x2>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - }; - - localbus@ff705000 { - compatible = "fsl,mpc8560-localbus", "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xff705000 0x100>; // BRx, ORx, etc. - - ranges = < - 0x0 0x0 0xff800000 0x0800000 // 8MB boot flash - 0x1 0x0 0xe4000000 0x4000000 // 64MB flash - 0x3 0x0 0x20000000 0x4000000 // 64MB SDRAM - 0x4 0x0 0x24000000 0x4000000 // 64MB SDRAM - 0x5 0x0 0xfc000000 0x0c00000 // EPLD - 0x6 0x0 0xe0000000 0x4000000 // 64MB flash - 0x7 0x0 0x80000000 0x0200000 // ATM1,2 - >; - - epld@5,0 { - compatible = "wrs,epld-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x5 0x0 0xc00000>; - ranges = < - 0x0 0x0 0x5 0x000000 0x1fff // LED disp. - 0x1 0x0 0x5 0x100000 0x1fff // switches - 0x2 0x0 0x5 0x200000 0x1fff // ID reg. - 0x3 0x0 0x5 0x300000 0x1fff // status reg. - 0x4 0x0 0x5 0x400000 0x1fff // reset reg. - 0x5 0x0 0x5 0x500000 0x1fff // Wind port - 0x7 0x0 0x5 0x700000 0x1fff // UART #1 - 0x8 0x0 0x5 0x800000 0x1fff // UART #2 - 0x9 0x0 0x5 0x900000 0x1fff // RTC - 0xb 0x0 0x5 0xb00000 0x1fff // EEPROM - >; - - bidr@2,0 { - compatible = "wrs,sbc8560-bidr"; - reg = <0x2 0x0 0x10>; - }; - - bcsr@3,0 { - compatible = "wrs,sbc8560-bcsr"; - reg = <0x3 0x0 0x10>; - }; - - brstcr@4,0 { - compatible = "wrs,sbc8560-brstcr"; - reg = <0x4 0x0 0x10>; - }; - - serial0: serial@7,0 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x7 0x0 0x100>; - clock-frequency = <1843200>; - interrupts = <0x9 0x2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@8,0 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x8 0x0 0x100>; - clock-frequency = <1843200>; - interrupts = <0xa 0x2>; - interrupt-parent = <&mpic>; - }; - - rtc@9,0 { - compatible = "m48t59"; - reg = <0x9 0x0 0x1fff>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8641d.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8641d.dts deleted file mode 100644 index 56bebce8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sbc8641d.dts +++ /dev/null @@ -1,459 +0,0 @@ -/* - * SBC8641D Device Tree Source - * - * Copyright 2008 Wind River Systems Inc. - * - * Paul Gortmaker (see MAINTAINERS for contact information) - * - * Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "SBC8641D"; - compatible = "wind,sbc8641"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8641@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; // L1 - i-cache-size = <32768>; // L1 - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - PowerPC,8641@1 { - device_type = "cpu"; - reg = <1>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; // From uboot - bus-frequency = <0>; // From uboot - clock-frequency = <0>; // From uboot - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; // 512M at 0x0 - }; - - localbus@f8005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8641-localbus", "simple-bus"; - reg = <0xf8005000 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - - ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash - 1 0 0xf0000000 0x00010000 // 64KB EEPROM - 2 0 0xf1000000 0x00100000 // EPLD (1MB) - 3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3) - 4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4) - 6 0 0xf4000000 0x00100000 // LCD display (1MB) - 7 0 0xe8000000 0x04000000>; // 64MB OneNAND - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x01000000>; - bank-width = <2>; - device-width = <2>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "dtb"; - reg = <0x00000000 0x00100000>; - read-only; - }; - partition@300000 { - label = "kernel"; - reg = <0x00100000 0x00400000>; - read-only; - }; - partition@400000 { - label = "fs"; - reg = <0x00500000 0x00a00000>; - }; - partition@700000 { - label = "firmware"; - reg = <0x00f00000 0x00100000>; - read-only; - }; - }; - - epld@2,0 { - compatible = "wrs,epld-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <2 0 0x100000>; - ranges = <0 0 5 0 1 // User switches - 1 0 5 1 1 // Board ID/Rev - 3 0 5 3 1>; // LEDs - }; - }; - - soc@f8000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x00000000 0xf8000000 0x00100000>; - bus-frequency = <0>; - - mcm-law@0 { - compatible = "fsl,mcm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - mcm@1000 { - compatible = "fsl,mpc8641-mcm", "fsl,mcm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8641-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1f { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0x1f>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <0>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <10 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <28 2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - clock-frequency = <0>; - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - big-endian; - }; - - global-utilities@e0000 { - compatible = "fsl,mpc8641-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - }; - - pci0: pcie@f8008000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xf8008000 0x1000>; - bus-range = <0x0 0xff>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xff00 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0000 0 0 1 &mpic 0 1 - 0x0000 0 0 2 &mpic 1 1 - 0x0000 0 0 3 &mpic 2 1 - 0x0000 0 0 4 &mpic 3 1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0x80000000 - 0x02000000 0x0 0x80000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00100000>; - }; - - }; - - pci1: pcie@f8009000 { - compatible = "fsl,mpc8641-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xf8009000 0x1000>; - bus-range = <0 0xff>; - ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0000 0 0 1 &mpic 4 1 - 0x0000 0 0 2 &mpic 5 1 - 0x0000 0 0 3 &mpic 6 1 - 0x0000 0 0 4 &mpic 7 1 - >; - - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xa0000000 - 0x02000000 0x0 0xa0000000 - 0x0 0x20000000 - - 0x01000000 0x0 0x00000000 - 0x01000000 0x0 0x00000000 - 0x0 0x00100000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/sequoia.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/sequoia.dts deleted file mode 100644 index b1d32924..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/sequoia.dts +++ /dev/null @@ -1,412 +0,0 @@ -/* - * Device Tree Source for AMCC Sequoia - * - * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com> - * Copyright (c) 2006, 2007 IBM Corp. - * - * FIXME: Draft only! - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,sequoia"; - compatible = "amcc,sequoia"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - serial3 = &UART3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440EPx"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440epx","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440epx","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-440epx","ibm,uic"; - interrupt-controller; - cell-index = <2>; - dcr-reg = <0x0e0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440epx", "ibm,sdr-440ep"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440epx", "ibm,cpr-440ep"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-440epx", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; - dcr-reg = <0x010 0x002>; - }; - - CRYPTO: crypto@e0100000 { - compatible = "amcc,ppc440epx-crypto","amcc,ppc4xx-crypto"; - reg = <0 0xE0100000 0x80400>; - interrupt-parent = <&UIC0>; - interrupts = <0x17 0x4>; - }; - - rng@e0120000 { - compatible = "amcc,ppc440epx-rng","amcc,ppc4xx-rng"; - reg = <0 0xE0120000 0x150>; - }; - - DMA0: dma { - compatible = "ibm,dma-440epx", "ibm,dma-4xx"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440epx", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <2>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - USB1: usb@e0000400 { - compatible = "ibm,usb-ohci-440epx", "ohci-be"; - reg = <0x00000000 0xe0000400 0x00000060>; - interrupt-parent = <&UIC0>; - interrupts = <0x15 0x8>; - }; - - USB0: ehci@e0000300 { - compatible = "ibm,usb-ehci-440epx", "usb-ehci"; - interrupt-parent = <&UIC0>; - interrupts = <0x1a 0x4>; - reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>; - big-endian; - }; - - POB0: opb { - compatible = "ibm,opb-440epx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440epx", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl256n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Kernel"; - reg = <0x00000000 0x00180000>; - }; - partition@180000 { - label = "ramdisk"; - reg = <0x00180000 0x00200000>; - }; - partition@380000 { - label = "file system"; - reg = <0x00380000 0x03aa0000>; - }; - partition@3e20000 { - label = "kozio"; - reg = <0x03e20000 0x00140000>; - }; - partition@3f60000 { - label = "env"; - reg = <0x03f60000 0x00040000>; - }; - partition@3fa0000 { - label = "u-boot"; - reg = <0x03fa0000 0x00060000>; - }; - }; - - ndfc@3,0 { - compatible = "ibm,ndfc"; - reg = <0x00000003 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x00000000 0x00084000>; - }; - partition@84000 { - label = "user"; - reg = <0x00000000 0x01f7c000>; - }; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 0x00000008>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x3 0x4>; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 0x00000008>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC1>; - interrupts = <0x4 0x4>; - }; - - IIC0: i2c@ef600700 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ibm,iic-440epx", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - - hwmon@48 { - compatible = "adi,ad7414"; - reg = <0x48>; - }; - }; - - IIC1: i2c@ef600800 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ibm,iic-440epx", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440epx", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - RGMII0: emac-rgmii@ef601000 { - compatible = "ibm,rgmii-440epx", "ibm,rgmii"; - reg = <0xef601000 0x00000008>; - has-mdio; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-440epx", "ibm,emac4"; - interrupt-parent = <&EMAC0>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 - /*Wake*/ 0x1 &UIC1 0x1d 0x4>; - reg = <0xef600e00 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-440epx", "ibm,emac4"; - interrupt-parent = <&EMAC1>; - interrupts = <0x0 0x1>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 - /*Wake*/ 0x1 &UIC1 0x1f 0x4>; - reg = <0xef600f00 0x00000074>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - has-inverted-stacr-oc; - has-new-stacr-staopc; - }; - }; - - PCI0: pci@1ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440epx-pci", "ibm,plb-pci"; - primary; - reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ - 0x00000001 0xeed00000 0x00000004 /* IACK */ - 0x00000001 0xeed00000 0x00000004 /* Special cycle */ - 0x00000001 0xef400000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - * From the 440EPx user manual: - * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB - * I/O 1 E800 0000 1 E800 FFFF 64KB - * I/O 1 E880 0000 1 EBFF FFFF 56MB - */ - ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000 - 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000 - 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - /* All PCI interrupts are routed to IRQ 67 */ - interrupt-map-mask = <0x0 0x0 0x0 0x0>; - interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - bootargs = "console=ttyS0,115200"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/socrates.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/socrates.dts deleted file mode 100644 index 134a5ff9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/socrates.dts +++ /dev/null @@ -1,352 +0,0 @@ -/* - * Device Tree Source for the Socrates board (MPC8544). - * - * Copyright (c) 2008 Emcraft Systems. - * Sergei Poselenov, <sposelenov@emcraft.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "abb,socrates"; - compatible = "abb,socrates"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8544@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; // Filled in by U-Boot - }; - - soc8544@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - - ranges = <0x00000000 0xe0000000 0x00100000>; - bus-frequency = <0>; // Filled in by U-Boot - compatible = "fsl,mpc8544-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8544-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8544-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8544-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl,mpc8544-i2c", "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - fsl,preserve-clocking; - - dtt@28 { - compatible = "winbond,w83782d"; - reg = <0x28>; - }; - rtc@32 { - compatible = "epson,rx8025"; - reg = <0x32>; - interrupts = <7 1>; - interrupt-parent = <&mpic>; - }; - dtt@4c { - compatible = "dallas,ds75"; - reg = <0x4c>; - }; - ts@4a { - compatible = "ti,tsc2003"; - reg = <0x4a>; - interrupt-parent = <&mpic>; - interrupts = <8 1>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl,mpc8544-i2c", "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - fsl,preserve-clocking; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - phy-handle = <&phy0>; - tbi-handle = <&tbi0>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <0 1>; - reg = <0>; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <0 1>; - reg = <1>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - }; - }; - }; - - enet1: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - phy-handle = <&phy1>; - tbi-handle = <&tbi1>; - phy-connection-type = "rgmii-id"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - - localbus { - compatible = "fsl,mpc8544-localbus", - "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xe0005000 0x40>; - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = <0 0 0xfc000000 0x04000000 - 2 0 0xc8000000 0x04000000 - 3 0 0xc0000000 0x00100000 - >; /* Overwritten by U-Boot */ - - nor_flash@0,0 { - compatible = "amd,s29gl256n", "cfi-flash"; - bank-width = <2>; - reg = <0x0 0x000000 0x4000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x0 0x1e0000>; - read-only; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x1e0000 0x20000>; - }; - partition@200000 { - label = "root"; - reg = <0x200000 0x200000>; - }; - partition@400000 { - label = "user"; - reg = <0x400000 0x3b80000>; - }; - partition@3f80000 { - label = "env"; - reg = <0x3f80000 0x40000>; - read-only; - }; - partition@3fc0000 { - label = "u-boot"; - reg = <0x3fc0000 0x40000>; - read-only; - }; - }; - - display@2,0 { - compatible = "fujitsu,lime"; - reg = <2 0x0 0x4000000>; - interrupt-parent = <&mpic>; - interrupts = <6 1>; - }; - - fpga_pic: fpga-pic@3,10 { - compatible = "abb,socrates-fpga-pic"; - reg = <3 0x10 0x10>; - interrupt-controller; - /* IRQs 2, 10, 11, active low, level-sensitive */ - interrupts = <2 1 10 1 11 1>; - interrupt-parent = <&mpic>; - #interrupt-cells = <3>; - }; - - spi@3,60 { - compatible = "abb,socrates-spi"; - reg = <3 0x60 0x10>; - interrupts = <8 4 0>; // number, type, routing - interrupt-parent = <&fpga_pic>; - }; - - nand@3,70 { - compatible = "abb,socrates-nand"; - reg = <3 0x70 0x04>; - bank-width = <1>; - #address-cells = <1>; - #size-cells = <1>; - data@0 { - label = "data"; - reg = <0x0 0x40000000>; - }; - }; - - can@3,100 { - compatible = "philips,sja1000"; - reg = <3 0x100 0x80>; - interrupts = <2 8 1>; // number, type, routing - interrupt-parent = <&fpga_pic>; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 1 &mpic 5 1 - /* IDSEL 0x12 */ - 0x9000 0x0 0x0 1 &mpic 4 1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>; - }; - -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/storcenter.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/storcenter.dts deleted file mode 100644 index 2a555738..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/storcenter.dts +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Device Tree Source for IOMEGA StorCenter - * - * Copyright 2007 Oyvind Repvik - * Copyright 2007 Jon Loeliger - * - * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - model = "StorCenter"; - compatible = "iomega,storcenter"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8241@0 { - device_type = "cpu"; - reg = <0>; - clock-frequency = <200000000>; - timebase-frequency = <25000000>; - bus-frequency = <0>; /* from bootwrapper */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; - d-cache-size = <16384>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */ - }; - - soc@fc000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8241", "mpc10x"; - store-gathering = <0>; /* 0 == off, !0 == on */ - ranges = <0x0 0xfc000000 0x100000>; - reg = <0xfc000000 0x100000>; /* EUMB */ - bus-frequency = <0>; /* fixed by loader */ - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x20>; - clock-frequency = <97553800>; /* Hz */ - current-speed = <115200>; - interrupts = <25 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x20>; - clock-frequency = <97553800>; /* Hz */ - current-speed = <9600>; - interrupts = <26 2>; - interrupt-parent = <&mpic>; - }; - - mpic: interrupt-controller@40000 { - #interrupt-cells = <2>; - #address-cells = <0>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - interrupt-controller; - reg = <0x40000 0x40000>; - }; - - }; - - pci0: pci@fe800000 { - #address-cells = <3>; - #size-cells = <2>; - #interrupt-cells = <1>; - device_type = "pci"; - compatible = "mpc10x-pci"; - reg = <0xfe800000 0x1000>; - ranges = <0x01000000 0x0 0x0 0xfe000000 0x0 0x00c00000 - 0x02000000 0x0 0x80000000 0x80000000 0x0 0x70000000>; - bus-range = <0 0xff>; - clock-frequency = <97553800>; - interrupt-parent = <&mpic>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = < - /* IDSEL 13 - IDE */ - 0x6800 0 0 1 &mpic 0 1 - 0x6800 0 0 2 &mpic 0 1 - 0x6800 0 0 3 &mpic 0 1 - 0x6800 0 0 4 &mpic 0 1 - /* IDSEL 14 - USB */ - 0x7000 0 0 1 &mpic 0 1 - 0x7000 0 0 2 &mpic 0 1 - 0x7000 0 0 3 &mpic 0 1 - 0x7000 0 0 4 &mpic 0 1 - /* IDSEL 15 - ETH */ - 0x7800 0 0 1 &mpic 0 1 - 0x7800 0 0 2 &mpic 0 1 - 0x7800 0 0 3 &mpic 0 1 - 0x7800 0 0 4 &mpic 0 1 - >; - }; - - chosen { - linux,stdout-path = &serial0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/stx_gp3_8560.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/stx_gp3_8560.dts deleted file mode 100644 index b670d03f..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/stx_gp3_8560.dts +++ /dev/null @@ -1,306 +0,0 @@ -/* - * STX GP3 - 8560 ADS Device Tree Source - * - * Copyright 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "stx,gp3"; - compatible = "stx,gp3-8560", "stx,gp3"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc@fdf00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0 0xfdf00000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8560-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <5 4>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy4: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <5 4>; - reg = <4>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy4>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <0>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - serial0: serial@91a20 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a20 0x20 0x88100 0x100>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - interrupts = <41 8>; - interrupt-parent = <&cpmpic>; - }; - }; - }; - - pci0: pci@fdf08000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x0c */ - 0x6000 0 0 1 &mpic 1 1 - 0x6000 0 0 2 &mpic 2 1 - 0x6000 0 0 3 &mpic 3 1 - 0x6000 0 0 4 &mpic 4 1 - - /* IDSEL 0x0d */ - 0x6800 0 0 1 &mpic 4 1 - 0x6800 0 0 2 &mpic 1 1 - 0x6800 0 0 3 &mpic 2 1 - 0x6800 0 0 4 &mpic 3 1 - - /* IDSEL 0x0e */ - 0x7000 0 0 1 &mpic 3 1 - 0x7000 0 0 2 &mpic 4 1 - 0x7000 0 0 3 &mpic 1 1 - 0x7000 0 0 4 &mpic 2 1 - - /* IDSEL 0x0f */ - 0x7800 0 0 1 &mpic 2 1 - 0x7800 0 0 2 &mpic 3 1 - 0x7800 0 0 3 &mpic 4 1 - 0x7800 0 0 4 &mpic 1 1>; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xfdf08000 0x1000>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/stxssa8555.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/stxssa8555.dts deleted file mode 100644 index 4f166b01..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/stxssa8555.dts +++ /dev/null @@ -1,380 +0,0 @@ -/* - * MPC8555-based STx GP3 Device Tree Source - * - * Copyright 2006, 2008 Freescale Semiconductor Inc. - * - * Copyright 2010 Silicon Turnkey Express LLC. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "stx,gp3"; - compatible = "stx,gp3-8560", "stx,gp3"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8555@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; // 33 MHz, from uboot - bus-frequency = <0>; // 166 MHz - clock-frequency = <0>; // 825 MHz, from uboot - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc8555@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "simple-bus"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8555-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8555-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8555-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x4>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-cpm", "fsl,cpm2"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8555-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - interrupt-map-mask = <0x1f800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x10 */ - 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x11 */ - 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x12 (Slot 1) */ - 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1 - - /* IDSEL 0x13 (Slot 2) */ - 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1 - 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1 - 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1 - 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1 - - /* IDSEL 0x14 (Slot 3) */ - 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1 - 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1 - 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1 - 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1 - - /* IDSEL 0x15 (Slot 4) */ - 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1 - - /* Bus 1 (Tundra Bridge) */ - /* IDSEL 0x12 (ISA bridge) */ - 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - - i8259@19000 { - interrupt-controller; - device_type = "interrupt-controller"; - reg = <0x19000 0x0 0x0 0x0 0x1>; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - interrupts = <1>; - interrupt-parent = <&pci0>; - }; - }; - - pci1: pci@e0009000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x15 */ - 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1 - 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - bus-range = <0 0>; - ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0009000 0x1000>; - compatible = "fsl,mpc8540-pci"; - device_type = "pci"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/taishan.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/taishan.dts deleted file mode 100644 index 1657ad0b..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/taishan.dts +++ /dev/null @@ -1,427 +0,0 @@ -/* - * Device Tree Source for IBM/AMCC Taishan - * - * Copyright 2007 IBM Corp. - * Hugh Blemings <hugh@au.ibm.com> based off code by - * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,taishan"; - compatible = "amcc,taishan"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC2; - ethernet1 = &EMAC3; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440GX"; - reg = <0x00000000>; - clock-frequency = <800000000>; // 800MHz - timebase-frequency = <0>; // Filled in by zImage - i-cache-line-size = <50>; - d-cache-line-size = <50>; - i-cache-size = <32768>; /* 32 kB */ - d-cache-size = <32768>; /* 32 kB */ - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage - }; - - - UICB0: interrupt-controller-base { - compatible = "ibm,uic-440gx", "ibm,uic"; - interrupt-controller; - cell-index = <3>; - dcr-reg = <0x200 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440gx", "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */ - interrupt-parent = <&UICB0>; - - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440gx", "ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x3 0x4 0x2 0x4>; /* cascade */ - interrupt-parent = <&UICB0>; - }; - - UIC2: interrupt-controller2 { - compatible = "ibm,uic-440gx", "ibm,uic"; - interrupt-controller; - cell-index = <2>; /* was 1 */ - dcr-reg = <0x210 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x5 0x4 0x4 0x4>; /* cascade */ - interrupt-parent = <&UICB0>; - }; - - - CPC0: cpc { - compatible = "ibm,cpc-440gp"; - dcr-reg = <0x0b0 0x003 0x0e0 0x010>; - // FIXME: anything else? - }; - - L2C0: l2c { - compatible = "ibm,l2-cache-440gx", "ibm,l2-cache"; - dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ - 0x030 0x008>; /* L2 cache DCR's */ - cache-line-size = <32>; /* 32 bytes */ - cache-size = <262144>; /* L2, 256K */ - interrupt-parent = <&UIC2>; - interrupts = <0x17 0x1>; - }; - - plb { - compatible = "ibm,plb-440gx", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <160000000>; // 160MHz - - SDRAM0: memory-controller { - compatible = "ibm,sdram-440gp"; - dcr-reg = <0x010 0x002>; - // FIXME: anything else? - }; - - SRAM0: sram { - compatible = "ibm,sram-440gp"; - dcr-reg = <0x020 0x008 0x00a 0x001>; - }; - - DMA0: dma { - // FIXME: ??? - compatible = "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440gx", "ibm,mcmal2"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <4>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - interrupt-map-mask = <0xffffffff>; - }; - - POB0: opb { - compatible = "ibm,opb-440gx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full 32-bit - range */ - ranges = <0x00000000 0x00000001 0x00000000 0x80000000 - 0x80000000 0x00000001 0x80000000 0x80000000>; - dcr-reg = <0x090 0x00b>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <80000000>; // 80MHz - - - EBC0: ebc { - compatible = "ibm,ebc-440gx", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <80000000>; // 80MHz - - /* ranges property is supplied by zImage - * based on firmware's configuration of the - * EBC bridge */ - - interrupts = <0x5 0x4>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "cfi-flash"; - bank-width = <4>; - device-width = <2>; - reg = <0x0 0x0 0x4000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x0 0x180000>; - }; - partition@180000 { - label = "root"; - reg = <0x180000 0x200000>; - }; - partition@380000 { - label = "user"; - reg = <0x380000 0x3bc0000>; - }; - partition@3f40000 { - label = "env"; - reg = <0x3f40000 0x80000>; - }; - partition@3fc0000 { - label = "u-boot"; - reg = <0x3fc0000 0x40000>; - }; - }; - }; - - - - UART0: serial@40000200 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x40000200 0x00000008>; - virtual-reg = <0xe0000200>; - clock-frequency = <11059200>; - current-speed = <115200>; /* 115200 */ - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@40000300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0x40000300 0x00000008>; - virtual-reg = <0xe0000300>; - clock-frequency = <11059200>; - current-speed = <115200>; /* 115200 */ - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC0: i2c@40000400 { - /* FIXME */ - compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <0x40000400 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - IIC1: i2c@40000500 { - /* FIXME */ - compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <0x40000500 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - }; - - GPIO0: gpio@40000700 { - /* FIXME */ - compatible = "ibm,gpio-440gp"; - reg = <0x40000700 0x00000020>; - }; - - ZMII0: emac-zmii@40000780 { - compatible = "ibm,zmii-440gx", "ibm,zmii"; - reg = <0x40000780 0x0000000c>; - }; - - RGMII0: emac-rgmii@40000790 { - compatible = "ibm,rgmii"; - reg = <0x40000790 0x00000008>; - }; - - TAH0: emac-tah@40000b50 { - compatible = "ibm,tah-440gx", "ibm,tah"; - reg = <0x40000b50 0x00000030>; - }; - - TAH1: emac-tah@40000d50 { - compatible = "ibm,tah-440gx", "ibm,tah"; - reg = <0x40000d50 0x00000030>; - }; - - EMAC0: ethernet@40000800 { - unused = <0x1>; - device_type = "network"; - compatible = "ibm,emac-440gx", "ibm,emac4"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0x40000800 0x00000074>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000001>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - EMAC1: ethernet@40000900 { - unused = <0x1>; - device_type = "network"; - compatible = "ibm,emac-440gx", "ibm,emac4"; - interrupt-parent = <&UIC1>; - interrupts = <0x1e 0x4 0x1f 0x4>; - reg = <0x40000900 0x00000074>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <1>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000001>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - }; - - EMAC2: ethernet@40000c00 { - device_type = "network"; - compatible = "ibm,emac-440gx", "ibm,emac4"; - interrupt-parent = <&UIC2>; - interrupts = <0x0 0x4 0x1 0x4>; - reg = <0x40000c00 0x00000074>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <2>; - mal-rx-channel = <2>; - cell-index = <2>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-address = <1>; - rgmii-device = <&RGMII0>; - rgmii-channel = <0>; - zmii-device = <&ZMII0>; - zmii-channel = <2>; - tah-device = <&TAH0>; - tah-channel = <0>; - }; - - EMAC3: ethernet@40000e00 { - device_type = "network"; - compatible = "ibm,emac-440gx", "ibm,emac4"; - interrupt-parent = <&UIC2>; - interrupts = <0x2 0x4 0x3 0x4>; - reg = <0x40000e00 0x00000074>; - local-mac-address = [000000000000]; // Filled in by zImage - mal-device = <&MAL0>; - mal-tx-channel = <3>; - mal-rx-channel = <3>; - cell-index = <3>; - max-frame-size = <9000>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rgmii"; - phy-address = <3>; - rgmii-device = <&RGMII0>; - rgmii-channel = <1>; - zmii-device = <&ZMII0>; - zmii-channel = <3>; - tah-device = <&TAH1>; - tah-channel = <0>; - }; - - - GPT0: gpt@40000a00 { - /* FIXME */ - reg = <0x40000a00 0x000000d4>; - interrupt-parent = <&UIC0>; - interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>; - }; - - }; - - PCIX0: pci@20ec00000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; - primary; - large-inbound-windows; - enable-msi-hole; - reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */ - 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ - 0x00000002 0x0ed00000 0x00000004 /* Special cycles */ - 0x00000002 0x0ec80000 0x00000100 /* Internal registers */ - 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed - */ - ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000 - 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 1 */ - 0x800 0x0 0x0 0x1 &UIC0 0x17 0x8 - 0x800 0x0 0x0 0x2 &UIC0 0x18 0x8 - 0x800 0x0 0x0 0x3 &UIC0 0x19 0x8 - 0x800 0x0 0x0 0x4 &UIC0 0x1a 0x8 - - /* IDSEL 2 */ - 0x1000 0x0 0x0 0x1 &UIC0 0x18 0x8 - 0x1000 0x0 0x0 0x2 &UIC0 0x19 0x8 - 0x1000 0x0 0x0 0x3 &UIC0 0x1a 0x8 - 0x1000 0x0 0x0 0x4 &UIC0 0x17 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@40000300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm5200.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm5200.dts deleted file mode 100644 index 1db07f6c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm5200.dts +++ /dev/null @@ -1,211 +0,0 @@ -/* - * TQM5200 board Device Tree Source - * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz <m8@semihalf.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm5200"; - compatible = "tqc,tqm5200"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&mpc5200_pic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,5200@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K - timebase-frequency = <0>; // from bootloader - bus-frequency = <0>; // from bootloader - clock-frequency = <0>; // from bootloader - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x04000000>; // 64MB - }; - - soc5200@f0000000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc5200-immr"; - ranges = <0 0xf0000000 0x0000c000>; - reg = <0xf0000000 0x00000100>; - bus-frequency = <0>; // from bootloader - system-frequency = <0>; // from bootloader - - cdm@200 { - compatible = "fsl,mpc5200-cdm"; - reg = <0x200 0x38>; - }; - - mpc5200_pic: interrupt-controller@500 { - // 5200 interrupts are encoded into two levels; - interrupt-controller; - #interrupt-cells = <3>; - compatible = "fsl,mpc5200-pic"; - reg = <0x500 0x80>; - }; - - timer@600 { // General Purpose Timer - compatible = "fsl,mpc5200-gpt"; - reg = <0x600 0x10>; - interrupts = <1 9 0>; - fsl,has-wdt; - }; - - can@900 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 17 0>; - reg = <0x900 0x80>; - }; - - can@980 { - compatible = "fsl,mpc5200-mscan"; - interrupts = <2 18 0>; - reg = <0x980 0x80>; - }; - - gpio_simple: gpio@b00 { - compatible = "fsl,mpc5200-gpio"; - reg = <0xb00 0x40>; - interrupts = <1 7 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - usb@1000 { - compatible = "fsl,mpc5200-ohci","ohci-be"; - reg = <0x1000 0xff>; - interrupts = <2 6 0>; - }; - - dma-controller@1200 { - compatible = "fsl,mpc5200-bestcomm"; - reg = <0x1200 0x80>; - interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 - 3 4 0 3 5 0 3 6 0 3 7 0 - 3 8 0 3 9 0 3 10 0 3 11 0 - 3 12 0 3 13 0 3 14 0 3 15 0>; - }; - - xlb@1f00 { - compatible = "fsl,mpc5200-xlb"; - reg = <0x1f00 0x100>; - }; - - serial@2000 { // PSC1 - compatible = "fsl,mpc5200-psc-uart"; - reg = <0x2000 0x100>; - interrupts = <2 1 0>; - }; - - serial@2200 { // PSC2 - compatible = "fsl,mpc5200-psc-uart"; - reg = <0x2200 0x100>; - interrupts = <2 2 0>; - }; - - serial@2400 { // PSC3 - compatible = "fsl,mpc5200-psc-uart"; - reg = <0x2400 0x100>; - interrupts = <2 3 0>; - }; - - ethernet@3000 { - compatible = "fsl,mpc5200-fec"; - reg = <0x3000 0x400>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <2 5 0>; - phy-handle = <&phy0>; - }; - - mdio@3000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-mdio"; - reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts - interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. - - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - ata@3a00 { - compatible = "fsl,mpc5200-ata"; - reg = <0x3a00 0x100>; - interrupts = <2 7 0>; - }; - - i2c@3d40 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5200-i2c","fsl-i2c"; - reg = <0x3d40 0x40>; - interrupts = <2 16 0>; - - rtc@68 { - compatible = "dallas,ds1307"; - reg = <0x68>; - }; - }; - - sram@8000 { - compatible = "fsl,mpc5200-sram"; - reg = <0x8000 0x4000>; - }; - }; - - localbus { - compatible = "fsl,mpc5200-lpb","simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0xfc000000 0x02000000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x02000000>; - bank-width = <4>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - }; - }; - - pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200-pci"; - reg = <0xf0000d00 0x100>; - interrupt-map-mask = <0xf800 0 0 7>; - interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 - 0xc000 0 0 2 &mpc5200_pic 0 0 3 - 0xc000 0 0 3 &mpc5200_pic 0 0 3 - 0xc000 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 10 0>; - bus-range = <0 0>; - ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000 - 0x02000000 0 0x90000000 0x90000000 0 0x10000000 - 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8540.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8540.dts deleted file mode 100644 index ed264d9a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8540.dts +++ /dev/null @@ -1,349 +0,0 @@ -/* - * TQM 8540 Device Tree Source - * - * Copyright 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8540"; - compatible = "tqc,tqm8540"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8540@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8540-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8540-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8540-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "FEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <41 2>; - interrupt-parent = <&mpic>; - phy-handle = <&phy3>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - }; - }; - - localbus@e0005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8540-localbus", "fsl,pq3-localbus", - "simple-bus"; - reg = <0xe0005000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = <0x0 0x0 0xfe000000 0x02000000>; - - nor@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x02000000>; - bank-width = <4>; - device-width = <2>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00180000>; - }; - partition@180000 { - label = "root"; - reg = <0x00180000 0x01dc0000>; - }; - partition@1f40000 { - label = "env1"; - reg = <0x01f40000 0x00040000>; - }; - partition@1f80000 { - label = "env2"; - reg = <0x01f80000 0x00040000>; - }; - partition@1fc0000 { - label = "u-boot"; - reg = <0x01fc0000 0x00040000>; - read-only; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8541.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8541.dts deleted file mode 100644 index 92524211..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8541.dts +++ /dev/null @@ -1,329 +0,0 @@ -/* - * TQM 8541 Device Tree Source - * - * Copyright 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8541"; - compatible = "tqc,tqm8541"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8541@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8541-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8541-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8541-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8541-cpm", "fsl,cpm2", "simple-bus"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8541-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <0>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548-bigflash.dts deleted file mode 100644 index 6e1ac508..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ /dev/null @@ -1,504 +0,0 @@ -/* - * TQM8548 Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * Copyright 2008 Wolfgang Grandegger <wg@denx.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8548"; - compatible = "tqc,tqm8548"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; // Filled in by U-Boot - }; - - soc@a0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xa0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8548-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - phy4: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <4>; - device_type = "ethernet-phy"; - }; - phy5: ethernet-phy@5 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <5>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy4>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy5>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { // global utilities reg - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - localbus@a0005000 { - compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xa0005000 0x100>; // BRx, ORx, etc. - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = < - 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 - 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 - 2 0x0 0xa3000000 0x00008000 // CAN (2 x CC770) - 3 0x0 0xa3010000 0x00008000 // NAND FLASH - - >; - - flash@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <1 0x0 0x8000000>; - bank-width = <4>; - device-width = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00300000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x07a00000>; - }; - partition@7f00000 { - label = "env1"; - reg = <0x07f00000 0x00040000>; - }; - partition@7f40000 { - label = "env2"; - reg = <0x07f40000 0x00040000>; - }; - partition@7f80000 { - label = "u-boot"; - reg = <0x07f80000 0x00080000>; - read-only; - }; - }; - - /* Note: CAN support needs be enabled in U-Boot */ - can@2,0 { - compatible = "bosch,cc770"; // Bosch CC770 - reg = <2 0x0 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - bosch,clock-out-frequency = <16000000>; - }; - - can@2,100 { - compatible = "bosch,cc770"; // Bosch CC770 - reg = <2 0x100 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - }; - - /* Note: NAND support needs to be enabled in U-Boot */ - upm@3,0 { - #address-cells = <0>; - #size-cells = <0>; - compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand"; - reg = <3 0x0 0x800>; - fsl,upm-addr-offset = <0x10>; - fsl,upm-cmd-offset = <0x08>; - /* Micron MT29F8G08FAB multi-chip device */ - fsl,upm-addr-line-cs-offsets = <0x0 0x200>; - fsl,upm-wait-flags = <0x5>; - chip-delay = <25>; // in micro-seconds - - nand@0 { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "fs"; - reg = <0x00000000 0x10000000>; - }; - }; - }; - }; - - pci0: pci@a0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xa0008000 0x1000>; - clock-frequency = <33333333>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xa2000000 0 0x01000000>; - }; - - pci1: pcie@a000a000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 (PEX) */ - 0x00000 0 0 1 &mpic 0 1 - 0x00000 0 0 2 &mpic 1 1 - 0x00000 0 0 3 &mpic 2 1 - 0x00000 0 0 4 &mpic 3 1>; - - interrupt-parent = <&mpic>; - interrupts = <26 2>; - bus-range = <0 0xff>; - ranges = <0x02000000 0 0xb0000000 0xb0000000 0 0x10000000 - 0x01000000 0 0x00000000 0xaf000000 0 0x08000000>; - clock-frequency = <33333333>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xa000a000 0x1000>; - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0 0xb0000000 0x02000000 0 - 0xb0000000 0 0x10000000 - 0x01000000 0 0x00000000 0x01000000 0 - 0x00000000 0 0x08000000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548.dts deleted file mode 100644 index 161e75ea..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8548.dts +++ /dev/null @@ -1,504 +0,0 @@ -/* - * TQM8548 Device Tree Source - * - * Copyright 2006 Freescale Semiconductor Inc. - * Copyright 2008 Wolfgang Grandegger <wg@denx.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8548"; - compatible = "tqc,tqm8548"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; // Filled in by U-Boot - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8548-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <10>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@0 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - phy4: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <4>; - device_type = "ethernet-phy"; - }; - phy5: ethernet-phy@5 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <5>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy4>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy5>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { // global utilities reg - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - localbus@e0005000 { - compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xe0005000 0x100>; // BRx, ORx, etc. - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = < - 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 - 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 - 2 0x0 0xe3000000 0x00008000 // CAN (2 x CC770) - 3 0x0 0xe3010000 0x00008000 // NAND FLASH - - >; - - flash@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <1 0x0 0x8000000>; - bank-width = <4>; - device-width = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00300000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x07a00000>; - }; - partition@7f00000 { - label = "env1"; - reg = <0x07f00000 0x00040000>; - }; - partition@7f40000 { - label = "env2"; - reg = <0x07f40000 0x00040000>; - }; - partition@7f80000 { - label = "u-boot"; - reg = <0x07f80000 0x00080000>; - read-only; - }; - }; - - /* Note: CAN support needs be enabled in U-Boot */ - can@2,0 { - compatible = "bosch,cc770"; // Bosch CC770 - reg = <2 0x0 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - bosch,clock-out-frequency = <16000000>; - }; - - can@2,100 { - compatible = "bosch,cc770"; // Bosch CC770 - reg = <2 0x100 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - }; - - /* Note: NAND support needs to be enabled in U-Boot */ - upm@3,0 { - #address-cells = <0>; - #size-cells = <0>; - compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand"; - reg = <3 0x0 0x800>; - fsl,upm-addr-offset = <0x10>; - fsl,upm-cmd-offset = <0x08>; - /* Micron MT29F8G08FAB multi-chip device */ - fsl,upm-addr-line-cs-offsets = <0x0 0x200>; - fsl,upm-wait-flags = <0x5>; - chip-delay = <25>; // in micro-seconds - - nand@0 { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "fs"; - reg = <0x00000000 0x10000000>; - }; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <33333333>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; - }; - - pci1: pcie@e000a000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 (PEX) */ - 0x00000 0 0 1 &mpic 0 1 - 0x00000 0 0 2 &mpic 1 1 - 0x00000 0 0 3 &mpic 2 1 - 0x00000 0 0 4 &mpic 3 1>; - - interrupt-parent = <&mpic>; - interrupts = <26 2>; - bus-range = <0 0xff>; - ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x20000000 - 0x01000000 0 0x00000000 0xef000000 0 0x08000000>; - clock-frequency = <33333333>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe000a000 0x1000>; - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0 0xc0000000 0x02000000 0 - 0xc0000000 0 0x20000000 - 0x01000000 0 0x00000000 0x01000000 0 - 0x00000000 0 0x08000000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8555.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8555.dts deleted file mode 100644 index aa6ff0d3..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8555.dts +++ /dev/null @@ -1,329 +0,0 @@ -/* - * TQM 8555 Device Tree Source - * - * Copyright 2008 Freescale Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8555"; - compatible = "tqc,tqm8555"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8555@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8555-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8555-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8555-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; // reg base, size - clock-frequency = <0>; // should we fill in in uboot? - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x7e>; - fsl,descriptor-types-mask = <0x01010ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8555-cpm", "fsl,cpm2", "simple-bus"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x2000 0x9000 0x1000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8555-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <0>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic"; - }; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8560.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8560.dts deleted file mode 100644 index 7665a16a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8560.dts +++ /dev/null @@ -1,402 +0,0 @@ -/* - * TQM 8560 Device Tree Source - * - * Copyright 2008 Freescale Semiconductor Inc. - * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "tqc,tqm8560"; - compatible = "tqc,tqm8560"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8560@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; - i-cache-line-size = <32>; - d-cache-size = <32768>; - i-cache-size = <32768>; - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; - }; - - soc@e0000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xe0000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8560-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <8>; - }; - - ecm@1000 { - compatible = "fsl,mpc8560-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8540-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8540-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; - cache-size = <0x40000>; // L2, 256K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - dtt@48 { - compatible = "national,lm75"; - reg = <0x48>; - }; - - rtc@68 { - compatible = "dallas,ds1337"; - reg = <0x68>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8560-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <2>; - device_type = "ethernet-phy"; - }; - phy3: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - device_type = "open-pic"; - compatible = "chrp,open-pic"; - }; - - cpm@919c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus"; - reg = <0x919c0 0x30>; - ranges; - - muram@80000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x80000 0x10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 0x4000 0x9000 0x2000>; - }; - }; - - brg@919f0 { - compatible = "fsl,mpc8560-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <0x919f0 0x10 0x915f0 0x10>; - clock-frequency = <0>; - }; - - cpmpic: pic@90c00 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - interrupts = <46 2>; - interrupt-parent = <&mpic>; - reg = <0x90c00 0x80>; - compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; - }; - - serial0: serial@91a00 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a00 0x20 0x88000 0x100>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x800000>; - current-speed = <115200>; - interrupts = <40 8>; - interrupt-parent = <&cpmpic>; - }; - - serial1: serial@91a20 { - device_type = "serial"; - compatible = "fsl,mpc8560-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <0x91a20 0x20 0x88100 0x100>; - fsl,cpm-brg = <2>; - fsl,cpm-command = <0x4a00000>; - current-speed = <115200>; - interrupts = <41 8>; - interrupt-parent = <&cpmpic>; - }; - - enet2: ethernet@91340 { - device_type = "network"; - compatible = "fsl,mpc8560-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - fsl,cpm-command = <0x1a400300>; - interrupts = <34 8>; - interrupt-parent = <&cpmpic>; - phy-handle = <&phy3>; - }; - }; - }; - - localbus@e0005000 { - compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xe0005000 0x100>; // BRx, ORx, etc. - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = < - 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 - 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 - 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) - >; - - flash@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <1 0x0 0x8000000>; - bank-width = <4>; - device-width = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x00300000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x07a00000>; - }; - partition@7f00000 { - label = "env1"; - reg = <0x07f00000 0x00040000>; - }; - partition@7f40000 { - label = "env2"; - reg = <0x07f40000 0x00040000>; - }; - partition@7f80000 { - label = "u-boot"; - reg = <0x07f80000 0x00080000>; - read-only; - }; - }; - - /* Note: CAN support needs be enabled in U-Boot */ - can0@2,0 { - compatible = "intel,82527"; // Bosch CC770 - reg = <2 0x0 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - }; - - can1@2,100 { - compatible = "intel,82527"; // Bosch CC770 - reg = <2 0x100 0x100>; - interrupts = <4 1>; - interrupt-parent = <&mpic>; - }; - }; - - pci0: pci@e0008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xe0008000 0x1000>; - clock-frequency = <66666666>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 28 */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1 - 0xe000 0 0 3 &mpic 6 1 - 0xe000 0 0 4 &mpic 5 1 - - /* IDSEL 11 */ - 0x5800 0 0 1 &mpic 6 1 - 0x5800 0 0 2 &mpic 5 1 - >; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8xx.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8xx.dts deleted file mode 100644 index c3dba251..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/tqm8xx.dts +++ /dev/null @@ -1,197 +0,0 @@ -/* - * TQM8XX Device Tree Source - * - * Heiko Schocher <hs@denx.de> - * 2010 DENX Software Engineering GmbH - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/dts-v1/; - -/ { - model = "TQM8xx"; - compatible = "tqc,tqm8xx"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = ð0; - ethernet1 = ð1; - mdio1 = &phy1; - serial0 = &smc1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,860@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <16>; // 16 bytes - i-cache-line-size = <16>; // 16 bytes - d-cache-size = <0x1000>; // L1, 4K - i-cache-size = <0x1000>; // L1, 4K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - interrupts = <15 2>; // decrementer interrupt - interrupt-parent = <&PIC>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x2000000>; - }; - - localbus@fff00100 { - compatible = "fsl,mpc860-localbus", "fsl,pq1-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xfff00100 0x40>; - - ranges = < - 0x0 0x0 0x40000000 0x800000 - 0x3 0x0 0xc0000000 0x200 - >; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x800000>; - #address-cells = <1>; - #size-cells = <1>; - bank-width = <4>; - device-width = <2>; - }; - - /* Note: CAN support needs be enabled in U-Boot */ - can@3,0 { - compatible = "intc,82527"; - reg = <3 0x0 0x80>; - interrupts = <8 1>; - interrupt-parent = <&PIC>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - bosch,clock-out-frequency = <16000000>; - }; - - can@3,100 { - compatible = "intc,82527"; - reg = <3 0x100 0x80>; - interrupts = <8 1>; - interrupt-parent = <&PIC>; - bosch,external-clock-frequency = <16000000>; - bosch,disconnect-rx1-input; - bosch,disconnect-tx1-output; - bosch,iso-low-speed-mux; - }; - }; - - soc@fff00000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xfff00000 0x00004000>; - - phy1: mdio@e00 { - compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio"; - reg = <0xe00 0x188>; - #address-cells = <1>; - #size-cells = <0>; - PHY: ethernet-phy@f { - reg = <0xf>; - device_type = "ethernet-phy"; - }; - }; - - eth1: ethernet@e00 { - device_type = "network"; - compatible = "fsl,mpc866-fec-enet", - "fsl,pq1-fec-enet"; - reg = <0xe00 0x188>; - interrupts = <3 1>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY>; - linux,network-index = <1>; - }; - - PIC: pic@0 { - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x0 0x24>; - compatible = "fsl,mpc860-pic", "fsl,pq1-pic"; - }; - - cpm@9c0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc860-cpm", "fsl,cpm1"; - ranges; - reg = <0x9c0 0x40>; - brg-frequency = <0>; - interrupts = <0 2>; // cpm error interrupt - interrupt-parent = <&CPM_PIC>; - - muram@2000 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x2000 0x2000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0x0 0x2000>; - }; - }; - - brg@9f0 { - compatible = "fsl,mpc860-brg", - "fsl,cpm1-brg", - "fsl,cpm-brg"; - reg = <0x9f0 0x10>; - clock-frequency = <0>; - }; - - CPM_PIC: pic@930 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - interrupts = <5 2 0 2>; - interrupt-parent = <&PIC>; - reg = <0x930 0x20>; - compatible = "fsl,mpc860-cpm-pic", - "fsl,cpm1-pic"; - }; - - - smc1: serial@a80 { - device_type = "serial"; - compatible = "fsl,mpc860-smc-uart", - "fsl,cpm1-smc-uart"; - reg = <0xa80 0x10 0x3e80 0x40>; - interrupts = <4>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <0x90>; - }; - - eth0: ethernet@a00 { - device_type = "network"; - compatible = "fsl,mpc860-scc-enet", - "fsl,cpm1-scc-enet"; - reg = <0xa00 0x18 0x3c00 0x100>; - interrupts = <30>; - interrupt-parent = <&CPM_PIC>; - fsl,cpm-command = <0000>; - linux,network-index = <0>; - fixed-link = <0 0 10 0 0>; - }; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/uc101.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/uc101.dts deleted file mode 100644 index ba83d548..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/uc101.dts +++ /dev/null @@ -1,190 +0,0 @@ -/* - * Manroland uc101 board Device Tree Source - * - * Copyright (C) 2009 DENX Software Engineering GmbH - * Heiko Schocher <hs@denx.de> - * Copyright 2006-2007 Secret Lab Technologies Ltd. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/include/ "mpc5200b.dtsi" - -/ { - model = "manroland,uc101"; - compatible = "manroland,uc101"; - - soc5200@f0000000 { - gpt0: timer@600 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt1: timer@610 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt2: timer@620 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt3: timer@630 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x630 0x10>; - interrupts = <1 12 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt4: timer@640 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt5: timer@650 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt6: timer@660 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - gpt7: timer@670 { // General Purpose Timer in GPIO mode - gpio-controller; - #gpio-cells = <2>; - }; - - rtc@800 { - status = "disabled"; - }; - - can@900 { - status = "disabled"; - }; - - can@980 { - status = "disabled"; - }; - - spi@f00 { - status = "disabled"; - }; - - usb@1000 { - status = "disabled"; - }; - - psc@2000 { // PSC1 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2200 { // PSC2 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - psc@2400 { // PSC3 - status = "disabled"; - }; - - psc@2600 { // PSC4 - status = "disabled"; - }; - - psc@2800 { // PSC5 - status = "disabled"; - }; - - psc@2c00 { // PSC6 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - }; - - ethernet@3000 { - phy-handle = <&phy0>; - }; - - mdio@3000 { - phy0: ethernet-phy@0 { - compatible = "intel,lxt971"; - reg = <0>; - }; - }; - - i2c@3d00 { - status = "disabled"; - }; - - i2c@3d40 { - fsl,preserve-clocking; - clock-frequency = <400000>; - - hwmon@2c { - compatible = "ad,adm9240"; - reg = <0x2c>; - }; - rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; - }; - }; - - pci@f0000d00 { - status = "disabled"; - }; - - localbus { - ranges = <0 0 0xff800000 0x00800000 - 1 0 0x80000000 0x00800000 - 3 0 0x80000000 0x00800000>; - - flash@0,0 { - compatible = "cfi-flash"; - reg = <0 0 0x00800000>; - bank-width = <2>; - device-width = <2>; - #size-cells = <1>; - #address-cells = <1>; - - partition@0 { - label = "DTS"; - reg = <0x0 0x00100000>; - }; - partition@100000 { - label = "Kernel"; - reg = <0x100000 0x00200000>; - }; - partition@300000 { - label = "RootFS"; - reg = <0x00300000 0x00200000>; - }; - partition@500000 { - label = "user"; - reg = <0x00500000 0x00200000>; - }; - partition@700000 { - label = "U-Boot"; - reg = <0x00700000 0x00040000>; - }; - partition@740000 { - label = "Env"; - reg = <0x00740000 0x00010000>; - }; - partition@750000 { - label = "red. Env"; - reg = <0x00750000 0x00010000>; - }; - partition@760000 { - label = "reserve"; - reg = <0x00760000 0x000a0000>; - }; - }; - - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml507.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml507.dts deleted file mode 100644 index 52d8c1ad..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml507.dts +++ /dev/null @@ -1,398 +0,0 @@ -/* - * This file supports the Xilinx ML507 board with the 440 processor. - * A reference design for the FPGA is provided at http://git.xilinx.com. - * - * (C) Copyright 2008 Xilinx, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - * - * --- - * - * Device Tree Generator version: 1.1 - * - * CAUTION: This file is automatically generated by libgen. - * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6 - * - * XPS project directory: ml507_ppc440_emb_ref - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,virtex440"; - dcr-parent = <&ppc440_0>; - model = "testing"; - DDR2_SDRAM: memory@0 { - device_type = "memory"; - reg = < 0 0x10000000 >; - } ; - chosen { - bootargs = "console=ttyS0 root=/dev/ram"; - linux,stdout-path = &RS232_Uart_1; - } ; - cpus { - #address-cells = <1>; - #cpus = <1>; - #size-cells = <0>; - ppc440_0: cpu@0 { - clock-frequency = <400000000>; - compatible = "PowerPC,440", "ibm,ppc440"; - d-cache-line-size = <0x20>; - d-cache-size = <0x8000>; - dcr-access-method = "native"; - dcr-controller ; - device_type = "cpu"; - i-cache-line-size = <0x20>; - i-cache-size = <0x8000>; - model = "PowerPC,440"; - reg = <0>; - timebase-frequency = <400000000>; - xlnx,apu-control = <1>; - xlnx,apu-udi-0 = <0>; - xlnx,apu-udi-1 = <0>; - xlnx,apu-udi-10 = <0>; - xlnx,apu-udi-11 = <0>; - xlnx,apu-udi-12 = <0>; - xlnx,apu-udi-13 = <0>; - xlnx,apu-udi-14 = <0>; - xlnx,apu-udi-15 = <0>; - xlnx,apu-udi-2 = <0>; - xlnx,apu-udi-3 = <0>; - xlnx,apu-udi-4 = <0>; - xlnx,apu-udi-5 = <0>; - xlnx,apu-udi-6 = <0>; - xlnx,apu-udi-7 = <0>; - xlnx,apu-udi-8 = <0>; - xlnx,apu-udi-9 = <0>; - xlnx,dcr-autolock-enable = <1>; - xlnx,dcu-rd-ld-cache-plb-prio = <0>; - xlnx,dcu-rd-noncache-plb-prio = <0>; - xlnx,dcu-rd-touch-plb-prio = <0>; - xlnx,dcu-rd-urgent-plb-prio = <0>; - xlnx,dcu-wr-flush-plb-prio = <0>; - xlnx,dcu-wr-store-plb-prio = <0>; - xlnx,dcu-wr-urgent-plb-prio = <0>; - xlnx,dma0-control = <0>; - xlnx,dma0-plb-prio = <0>; - xlnx,dma0-rxchannelctrl = <0x1010000>; - xlnx,dma0-rxirqtimer = <0x3ff>; - xlnx,dma0-txchannelctrl = <0x1010000>; - xlnx,dma0-txirqtimer = <0x3ff>; - xlnx,dma1-control = <0>; - xlnx,dma1-plb-prio = <0>; - xlnx,dma1-rxchannelctrl = <0x1010000>; - xlnx,dma1-rxirqtimer = <0x3ff>; - xlnx,dma1-txchannelctrl = <0x1010000>; - xlnx,dma1-txirqtimer = <0x3ff>; - xlnx,dma2-control = <0>; - xlnx,dma2-plb-prio = <0>; - xlnx,dma2-rxchannelctrl = <0x1010000>; - xlnx,dma2-rxirqtimer = <0x3ff>; - xlnx,dma2-txchannelctrl = <0x1010000>; - xlnx,dma2-txirqtimer = <0x3ff>; - xlnx,dma3-control = <0>; - xlnx,dma3-plb-prio = <0>; - xlnx,dma3-rxchannelctrl = <0x1010000>; - xlnx,dma3-rxirqtimer = <0x3ff>; - xlnx,dma3-txchannelctrl = <0x1010000>; - xlnx,dma3-txirqtimer = <0x3ff>; - xlnx,endian-reset = <0>; - xlnx,generate-plb-timespecs = <1>; - xlnx,icu-rd-fetch-plb-prio = <0>; - xlnx,icu-rd-spec-plb-prio = <0>; - xlnx,icu-rd-touch-plb-prio = <0>; - xlnx,interconnect-imask = <0xffffffff>; - xlnx,mplb-allow-lock-xfer = <1>; - xlnx,mplb-arb-mode = <0>; - xlnx,mplb-awidth = <0x20>; - xlnx,mplb-counter = <0x500>; - xlnx,mplb-dwidth = <0x80>; - xlnx,mplb-max-burst = <8>; - xlnx,mplb-native-dwidth = <0x80>; - xlnx,mplb-p2p = <0>; - xlnx,mplb-prio-dcur = <2>; - xlnx,mplb-prio-dcuw = <3>; - xlnx,mplb-prio-icu = <4>; - xlnx,mplb-prio-splb0 = <1>; - xlnx,mplb-prio-splb1 = <0>; - xlnx,mplb-read-pipe-enable = <1>; - xlnx,mplb-sync-tattribute = <0>; - xlnx,mplb-wdog-enable = <1>; - xlnx,mplb-write-pipe-enable = <1>; - xlnx,mplb-write-post-enable = <1>; - xlnx,num-dma = <1>; - xlnx,pir = <0xf>; - xlnx,ppc440mc-addr-base = <0>; - xlnx,ppc440mc-addr-high = <0xfffffff>; - xlnx,ppc440mc-arb-mode = <0>; - xlnx,ppc440mc-bank-conflict-mask = <0xc00000>; - xlnx,ppc440mc-control = <0xf810008f>; - xlnx,ppc440mc-max-burst = <8>; - xlnx,ppc440mc-prio-dcur = <2>; - xlnx,ppc440mc-prio-dcuw = <3>; - xlnx,ppc440mc-prio-icu = <4>; - xlnx,ppc440mc-prio-splb0 = <1>; - xlnx,ppc440mc-prio-splb1 = <0>; - xlnx,ppc440mc-row-conflict-mask = <0x3ffe00>; - xlnx,ppcdm-asyncmode = <0>; - xlnx,ppcds-asyncmode = <0>; - xlnx,user-reset = <0>; - DMA0: sdma@80 { - compatible = "xlnx,ll-dma-1.00.a"; - dcr-reg = < 0x80 0x11 >; - interrupt-parent = <&xps_intc_0>; - interrupts = < 10 2 11 2 >; - } ; - } ; - } ; - plb_v46_0: plb@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,plb-v46-1.03.a", "simple-bus"; - ranges ; - DIP_Switches_8Bit: gpio@81460000 { - compatible = "xlnx,xps-gpio-1.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 7 2 >; - reg = < 0x81460000 0x10000 >; - xlnx,all-inputs = <1>; - xlnx,all-inputs-2 = <0>; - xlnx,dout-default = <0>; - xlnx,dout-default-2 = <0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <8>; - xlnx,interrupt-present = <1>; - xlnx,is-bidir = <1>; - xlnx,is-bidir-2 = <1>; - xlnx,is-dual = <0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - FLASH: flash@fc000000 { - bank-width = <2>; - compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash"; - reg = < 0xfc000000 0x2000000 >; - xlnx,family = "virtex5"; - xlnx,include-datawidth-matching-0 = <0x1>; - xlnx,include-datawidth-matching-1 = <0x0>; - xlnx,include-datawidth-matching-2 = <0x0>; - xlnx,include-datawidth-matching-3 = <0x0>; - xlnx,include-negedge-ioregs = <0x0>; - xlnx,include-plb-ipif = <0x1>; - xlnx,include-wrbuf = <0x1>; - xlnx,max-mem-width = <0x10>; - xlnx,mch-native-dwidth = <0x20>; - xlnx,mch-plb-clk-period-ps = <0x2710>; - xlnx,mch-splb-awidth = <0x20>; - xlnx,mch0-accessbuf-depth = <0x10>; - xlnx,mch0-protocol = <0x0>; - xlnx,mch0-rddatabuf-depth = <0x10>; - xlnx,mch1-accessbuf-depth = <0x10>; - xlnx,mch1-protocol = <0x0>; - xlnx,mch1-rddatabuf-depth = <0x10>; - xlnx,mch2-accessbuf-depth = <0x10>; - xlnx,mch2-protocol = <0x0>; - xlnx,mch2-rddatabuf-depth = <0x10>; - xlnx,mch3-accessbuf-depth = <0x10>; - xlnx,mch3-protocol = <0x0>; - xlnx,mch3-rddatabuf-depth = <0x10>; - xlnx,mem0-width = <0x10>; - xlnx,mem1-width = <0x20>; - xlnx,mem2-width = <0x20>; - xlnx,mem3-width = <0x20>; - xlnx,num-banks-mem = <0x1>; - xlnx,num-channels = <0x2>; - xlnx,priority-mode = <0x0>; - xlnx,synch-mem-0 = <0x0>; - xlnx,synch-mem-1 = <0x0>; - xlnx,synch-mem-2 = <0x0>; - xlnx,synch-mem-3 = <0x0>; - xlnx,synch-pipedelay-0 = <0x2>; - xlnx,synch-pipedelay-1 = <0x2>; - xlnx,synch-pipedelay-2 = <0x2>; - xlnx,synch-pipedelay-3 = <0x2>; - xlnx,tavdv-ps-mem-0 = <0x1adb0>; - xlnx,tavdv-ps-mem-1 = <0x3a98>; - xlnx,tavdv-ps-mem-2 = <0x3a98>; - xlnx,tavdv-ps-mem-3 = <0x3a98>; - xlnx,tcedv-ps-mem-0 = <0x1adb0>; - xlnx,tcedv-ps-mem-1 = <0x3a98>; - xlnx,tcedv-ps-mem-2 = <0x3a98>; - xlnx,tcedv-ps-mem-3 = <0x3a98>; - xlnx,thzce-ps-mem-0 = <0x88b8>; - xlnx,thzce-ps-mem-1 = <0x1b58>; - xlnx,thzce-ps-mem-2 = <0x1b58>; - xlnx,thzce-ps-mem-3 = <0x1b58>; - xlnx,thzoe-ps-mem-0 = <0x1b58>; - xlnx,thzoe-ps-mem-1 = <0x1b58>; - xlnx,thzoe-ps-mem-2 = <0x1b58>; - xlnx,thzoe-ps-mem-3 = <0x1b58>; - xlnx,tlzwe-ps-mem-0 = <0x88b8>; - xlnx,tlzwe-ps-mem-1 = <0x0>; - xlnx,tlzwe-ps-mem-2 = <0x0>; - xlnx,tlzwe-ps-mem-3 = <0x0>; - xlnx,twc-ps-mem-0 = <0x2af8>; - xlnx,twc-ps-mem-1 = <0x3a98>; - xlnx,twc-ps-mem-2 = <0x3a98>; - xlnx,twc-ps-mem-3 = <0x3a98>; - xlnx,twp-ps-mem-0 = <0x11170>; - xlnx,twp-ps-mem-1 = <0x2ee0>; - xlnx,twp-ps-mem-2 = <0x2ee0>; - xlnx,twp-ps-mem-3 = <0x2ee0>; - xlnx,xcl0-linesize = <0x4>; - xlnx,xcl0-writexfer = <0x1>; - xlnx,xcl1-linesize = <0x4>; - xlnx,xcl1-writexfer = <0x1>; - xlnx,xcl2-linesize = <0x4>; - xlnx,xcl2-writexfer = <0x1>; - xlnx,xcl3-linesize = <0x4>; - xlnx,xcl3-writexfer = <0x1>; - } ; - Hard_Ethernet_MAC: xps-ll-temac@81c00000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,compound"; - ethernet@81c00000 { - compatible = "xlnx,xps-ll-temac-1.01.b"; - device_type = "network"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 5 2 >; - llink-connected = <&DMA0>; - local-mac-address = [ 02 00 00 00 00 00 ]; - reg = < 0x81c00000 0x40 >; - xlnx,bus2core-clk-ratio = <1>; - xlnx,phy-type = <1>; - xlnx,phyaddr = <1>; - xlnx,rxcsum = <1>; - xlnx,rxfifo = <0x1000>; - xlnx,temac-type = <0>; - xlnx,txcsum = <1>; - xlnx,txfifo = <0x1000>; - } ; - } ; - IIC_EEPROM: i2c@81600000 { - compatible = "xlnx,xps-iic-2.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 6 2 >; - reg = < 0x81600000 0x10000 >; - xlnx,clk-freq = <0x5f5e100>; - xlnx,family = "virtex5"; - xlnx,gpo-width = <0x1>; - xlnx,iic-freq = <0x186a0>; - xlnx,scl-inertial-delay = <0x0>; - xlnx,sda-inertial-delay = <0x0>; - xlnx,ten-bit-adr = <0x0>; - } ; - LEDs_8Bit: gpio@81400000 { - compatible = "xlnx,xps-gpio-1.00.a"; - reg = < 0x81400000 0x10000 >; - xlnx,all-inputs = <0>; - xlnx,all-inputs-2 = <0>; - xlnx,dout-default = <0>; - xlnx,dout-default-2 = <0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <8>; - xlnx,interrupt-present = <0>; - xlnx,is-bidir = <1>; - xlnx,is-bidir-2 = <1>; - xlnx,is-dual = <0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - LEDs_Positions: gpio@81420000 { - compatible = "xlnx,xps-gpio-1.00.a"; - reg = < 0x81420000 0x10000 >; - xlnx,all-inputs = <0>; - xlnx,all-inputs-2 = <0>; - xlnx,dout-default = <0>; - xlnx,dout-default-2 = <0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <5>; - xlnx,interrupt-present = <0>; - xlnx,is-bidir = <1>; - xlnx,is-bidir-2 = <1>; - xlnx,is-dual = <0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - Push_Buttons_5Bit: gpio@81440000 { - compatible = "xlnx,xps-gpio-1.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 8 2 >; - reg = < 0x81440000 0x10000 >; - xlnx,all-inputs = <1>; - xlnx,all-inputs-2 = <0>; - xlnx,dout-default = <0>; - xlnx,dout-default-2 = <0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <5>; - xlnx,interrupt-present = <1>; - xlnx,is-bidir = <1>; - xlnx,is-bidir-2 = <1>; - xlnx,is-dual = <0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - RS232_Uart_1: serial@83e00000 { - clock-frequency = <100000000>; - compatible = "xlnx,xps-uart16550-2.00.b", "ns16550"; - current-speed = <9600>; - device_type = "serial"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 9 2 >; - reg = < 0x83e00000 0x10000 >; - reg-offset = <0x1003>; - reg-shift = <2>; - xlnx,family = "virtex5"; - xlnx,has-external-rclk = <0>; - xlnx,has-external-xin = <0>; - xlnx,is-a-16550 = <1>; - } ; - SysACE_CompactFlash: sysace@83600000 { - compatible = "xlnx,xps-sysace-1.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 4 2 >; - reg = < 0x83600000 0x10000 >; - xlnx,family = "virtex5"; - xlnx,mem-width = <0x10>; - } ; - xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 { - compatible = "xlnx,xps-bram-if-cntlr-1.00.a"; - reg = < 0xffff0000 0x10000 >; - xlnx,family = "virtex5"; - } ; - xps_intc_0: interrupt-controller@81800000 { - #interrupt-cells = <2>; - compatible = "xlnx,xps-intc-1.00.a"; - interrupt-controller ; - reg = < 0x81800000 0x10000 >; - xlnx,num-intr-inputs = <0xc>; - } ; - xps_timebase_wdt_1: xps-timebase-wdt@83a00000 { - compatible = "xlnx,xps-timebase-wdt-1.00.b"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 2 0 1 2 >; - reg = < 0x83a00000 0x10000 >; - xlnx,family = "virtex5"; - xlnx,wdt-enable-once = <0>; - xlnx,wdt-interval = <0x1e>; - } ; - xps_timer_1: timer@83c00000 { - compatible = "xlnx,xps-timer-1.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 3 2 >; - reg = < 0x83c00000 0x10000 >; - xlnx,count-width = <0x20>; - xlnx,family = "virtex5"; - xlnx,gen0-assert = <1>; - xlnx,gen1-assert = <1>; - xlnx,one-timer-only = <1>; - xlnx,trig0-assert = <1>; - xlnx,trig1-assert = <1>; - } ; - } ; -} ; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml510.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml510.dts deleted file mode 100644 index 81a8dc2c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/virtex440-ml510.dts +++ /dev/null @@ -1,465 +0,0 @@ -/* - * Xilinx ML510 Reference Design support - * - * This DTS file was created for the ml510_bsb1_pcores_ppc440 reference design. - * The reference design contains a bug which prevent PCI DMA from working - * properly. A description of the bug is given in the plbv46_pci section. It - * needs to be fixed by the user until Xilinx updates their reference design. - * - * Copyright 2009, Roderick Colenbrander - */ - -/dts-v1/; -/ { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,ml510-ref-design", "xlnx,virtex440"; - dcr-parent = <&ppc440_0>; - DDR2_SDRAM_DIMM0: memory@0 { - device_type = "memory"; - reg = < 0x0 0x20000000 >; - } ; - alias { - ethernet0 = &Hard_Ethernet_MAC; - serial0 = &RS232_Uart_1; - } ; - chosen { - bootargs = "console=ttyS0 root=/dev/ram"; - linux,stdout-path = "/plb@0/serial@83e00000"; - } ; - cpus { - #address-cells = <1>; - #cpus = <0x1>; - #size-cells = <0>; - ppc440_0: cpu@0 { - #address-cells = <1>; - #size-cells = <1>; - clock-frequency = <300000000>; - compatible = "PowerPC,440", "ibm,ppc440"; - d-cache-line-size = <0x20>; - d-cache-size = <0x8000>; - dcr-access-method = "native"; - dcr-controller ; - device_type = "cpu"; - i-cache-line-size = <0x20>; - i-cache-size = <0x8000>; - model = "PowerPC,440"; - reg = <0>; - timebase-frequency = <300000000>; - xlnx,apu-control = <0x2000>; - xlnx,apu-udi-0 = <0x0>; - xlnx,apu-udi-1 = <0x0>; - xlnx,apu-udi-10 = <0x0>; - xlnx,apu-udi-11 = <0x0>; - xlnx,apu-udi-12 = <0x0>; - xlnx,apu-udi-13 = <0x0>; - xlnx,apu-udi-14 = <0x0>; - xlnx,apu-udi-15 = <0x0>; - xlnx,apu-udi-2 = <0x0>; - xlnx,apu-udi-3 = <0x0>; - xlnx,apu-udi-4 = <0x0>; - xlnx,apu-udi-5 = <0x0>; - xlnx,apu-udi-6 = <0x0>; - xlnx,apu-udi-7 = <0x0>; - xlnx,apu-udi-8 = <0x0>; - xlnx,apu-udi-9 = <0x0>; - xlnx,dcr-autolock-enable = <0x1>; - xlnx,dcu-rd-ld-cache-plb-prio = <0x0>; - xlnx,dcu-rd-noncache-plb-prio = <0x0>; - xlnx,dcu-rd-touch-plb-prio = <0x0>; - xlnx,dcu-rd-urgent-plb-prio = <0x0>; - xlnx,dcu-wr-flush-plb-prio = <0x0>; - xlnx,dcu-wr-store-plb-prio = <0x0>; - xlnx,dcu-wr-urgent-plb-prio = <0x0>; - xlnx,dma0-control = <0x0>; - xlnx,dma0-plb-prio = <0x0>; - xlnx,dma0-rxchannelctrl = <0x1010000>; - xlnx,dma0-rxirqtimer = <0x3ff>; - xlnx,dma0-txchannelctrl = <0x1010000>; - xlnx,dma0-txirqtimer = <0x3ff>; - xlnx,dma1-control = <0x0>; - xlnx,dma1-plb-prio = <0x0>; - xlnx,dma1-rxchannelctrl = <0x1010000>; - xlnx,dma1-rxirqtimer = <0x3ff>; - xlnx,dma1-txchannelctrl = <0x1010000>; - xlnx,dma1-txirqtimer = <0x3ff>; - xlnx,dma2-control = <0x0>; - xlnx,dma2-plb-prio = <0x0>; - xlnx,dma2-rxchannelctrl = <0x1010000>; - xlnx,dma2-rxirqtimer = <0x3ff>; - xlnx,dma2-txchannelctrl = <0x1010000>; - xlnx,dma2-txirqtimer = <0x3ff>; - xlnx,dma3-control = <0x0>; - xlnx,dma3-plb-prio = <0x0>; - xlnx,dma3-rxchannelctrl = <0x1010000>; - xlnx,dma3-rxirqtimer = <0x3ff>; - xlnx,dma3-txchannelctrl = <0x1010000>; - xlnx,dma3-txirqtimer = <0x3ff>; - xlnx,endian-reset = <0x0>; - xlnx,generate-plb-timespecs = <0x1>; - xlnx,icu-rd-fetch-plb-prio = <0x0>; - xlnx,icu-rd-spec-plb-prio = <0x0>; - xlnx,icu-rd-touch-plb-prio = <0x0>; - xlnx,interconnect-imask = <0xffffffff>; - xlnx,mplb-allow-lock-xfer = <0x1>; - xlnx,mplb-arb-mode = <0x0>; - xlnx,mplb-awidth = <0x20>; - xlnx,mplb-counter = <0x500>; - xlnx,mplb-dwidth = <0x80>; - xlnx,mplb-max-burst = <0x8>; - xlnx,mplb-native-dwidth = <0x80>; - xlnx,mplb-p2p = <0x0>; - xlnx,mplb-prio-dcur = <0x2>; - xlnx,mplb-prio-dcuw = <0x3>; - xlnx,mplb-prio-icu = <0x4>; - xlnx,mplb-prio-splb0 = <0x1>; - xlnx,mplb-prio-splb1 = <0x0>; - xlnx,mplb-read-pipe-enable = <0x1>; - xlnx,mplb-sync-tattribute = <0x0>; - xlnx,mplb-wdog-enable = <0x1>; - xlnx,mplb-write-pipe-enable = <0x1>; - xlnx,mplb-write-post-enable = <0x1>; - xlnx,num-dma = <0x0>; - xlnx,pir = <0xf>; - xlnx,ppc440mc-addr-base = <0x0>; - xlnx,ppc440mc-addr-high = <0x1fffffff>; - xlnx,ppc440mc-arb-mode = <0x0>; - xlnx,ppc440mc-bank-conflict-mask = <0x1800000>; - xlnx,ppc440mc-control = <0xf810008f>; - xlnx,ppc440mc-max-burst = <0x8>; - xlnx,ppc440mc-prio-dcur = <0x2>; - xlnx,ppc440mc-prio-dcuw = <0x3>; - xlnx,ppc440mc-prio-icu = <0x4>; - xlnx,ppc440mc-prio-splb0 = <0x1>; - xlnx,ppc440mc-prio-splb1 = <0x0>; - xlnx,ppc440mc-row-conflict-mask = <0x7ffe00>; - xlnx,ppcdm-asyncmode = <0x0>; - xlnx,ppcds-asyncmode = <0x0>; - xlnx,user-reset = <0x0>; - } ; - } ; - plb_v46_0: plb@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,plb-v46-1.03.a", "simple-bus"; - ranges ; - FLASH: flash@fc000000 { - bank-width = <2>; - compatible = "xlnx,xps-mch-emc-2.00.a", "cfi-flash"; - reg = < 0xfc000000 0x2000000 >; - xlnx,family = "virtex5"; - xlnx,include-datawidth-matching-0 = <0x1>; - xlnx,include-datawidth-matching-1 = <0x0>; - xlnx,include-datawidth-matching-2 = <0x0>; - xlnx,include-datawidth-matching-3 = <0x0>; - xlnx,include-negedge-ioregs = <0x0>; - xlnx,include-plb-ipif = <0x1>; - xlnx,include-wrbuf = <0x1>; - xlnx,max-mem-width = <0x10>; - xlnx,mch-native-dwidth = <0x20>; - xlnx,mch-plb-clk-period-ps = <0x2710>; - xlnx,mch-splb-awidth = <0x20>; - xlnx,mch0-accessbuf-depth = <0x10>; - xlnx,mch0-protocol = <0x0>; - xlnx,mch0-rddatabuf-depth = <0x10>; - xlnx,mch1-accessbuf-depth = <0x10>; - xlnx,mch1-protocol = <0x0>; - xlnx,mch1-rddatabuf-depth = <0x10>; - xlnx,mch2-accessbuf-depth = <0x10>; - xlnx,mch2-protocol = <0x0>; - xlnx,mch2-rddatabuf-depth = <0x10>; - xlnx,mch3-accessbuf-depth = <0x10>; - xlnx,mch3-protocol = <0x0>; - xlnx,mch3-rddatabuf-depth = <0x10>; - xlnx,mem0-width = <0x10>; - xlnx,mem1-width = <0x20>; - xlnx,mem2-width = <0x20>; - xlnx,mem3-width = <0x20>; - xlnx,num-banks-mem = <0x1>; - xlnx,num-channels = <0x2>; - xlnx,priority-mode = <0x0>; - xlnx,synch-mem-0 = <0x0>; - xlnx,synch-mem-1 = <0x0>; - xlnx,synch-mem-2 = <0x0>; - xlnx,synch-mem-3 = <0x0>; - xlnx,synch-pipedelay-0 = <0x2>; - xlnx,synch-pipedelay-1 = <0x2>; - xlnx,synch-pipedelay-2 = <0x2>; - xlnx,synch-pipedelay-3 = <0x2>; - xlnx,tavdv-ps-mem-0 = <0x1adb0>; - xlnx,tavdv-ps-mem-1 = <0x3a98>; - xlnx,tavdv-ps-mem-2 = <0x3a98>; - xlnx,tavdv-ps-mem-3 = <0x3a98>; - xlnx,tcedv-ps-mem-0 = <0x1adb0>; - xlnx,tcedv-ps-mem-1 = <0x3a98>; - xlnx,tcedv-ps-mem-2 = <0x3a98>; - xlnx,tcedv-ps-mem-3 = <0x3a98>; - xlnx,thzce-ps-mem-0 = <0x88b8>; - xlnx,thzce-ps-mem-1 = <0x1b58>; - xlnx,thzce-ps-mem-2 = <0x1b58>; - xlnx,thzce-ps-mem-3 = <0x1b58>; - xlnx,thzoe-ps-mem-0 = <0x1b58>; - xlnx,thzoe-ps-mem-1 = <0x1b58>; - xlnx,thzoe-ps-mem-2 = <0x1b58>; - xlnx,thzoe-ps-mem-3 = <0x1b58>; - xlnx,tlzwe-ps-mem-0 = <0x88b8>; - xlnx,tlzwe-ps-mem-1 = <0x0>; - xlnx,tlzwe-ps-mem-2 = <0x0>; - xlnx,tlzwe-ps-mem-3 = <0x0>; - xlnx,twc-ps-mem-0 = <0x1adb0>; - xlnx,twc-ps-mem-1 = <0x3a98>; - xlnx,twc-ps-mem-2 = <0x3a98>; - xlnx,twc-ps-mem-3 = <0x3a98>; - xlnx,twp-ps-mem-0 = <0x11170>; - xlnx,twp-ps-mem-1 = <0x2ee0>; - xlnx,twp-ps-mem-2 = <0x2ee0>; - xlnx,twp-ps-mem-3 = <0x2ee0>; - xlnx,xcl0-linesize = <0x4>; - xlnx,xcl0-writexfer = <0x1>; - xlnx,xcl1-linesize = <0x4>; - xlnx,xcl1-writexfer = <0x1>; - xlnx,xcl2-linesize = <0x4>; - xlnx,xcl2-writexfer = <0x1>; - xlnx,xcl3-linesize = <0x4>; - xlnx,xcl3-writexfer = <0x1>; - } ; - Hard_Ethernet_MAC: xps-ll-temac@81c00000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xlnx,compound"; - ethernet@81c00000 { - compatible = "xlnx,xps-ll-temac-1.01.b"; - device_type = "network"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 8 2 >; - llink-connected = <&Hard_Ethernet_MAC_fifo>; - local-mac-address = [ 02 00 00 00 00 00 ]; - reg = < 0x81c00000 0x40 >; - xlnx,bus2core-clk-ratio = <0x1>; - xlnx,phy-type = <0x3>; - xlnx,phyaddr = <0x1>; - xlnx,rxcsum = <0x0>; - xlnx,rxfifo = <0x8000>; - xlnx,temac-type = <0x0>; - xlnx,txcsum = <0x0>; - xlnx,txfifo = <0x8000>; - } ; - } ; - Hard_Ethernet_MAC_fifo: xps-ll-fifo@81a00000 { - compatible = "xlnx,xps-ll-fifo-1.01.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 6 2 >; - reg = < 0x81a00000 0x10000 >; - xlnx,family = "virtex5"; - } ; - IIC_EEPROM: i2c@81600000 { - compatible = "xlnx,xps-iic-2.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 9 2 >; - reg = < 0x81600000 0x10000 >; - xlnx,clk-freq = <0x5f5e100>; - xlnx,family = "virtex5"; - xlnx,gpo-width = <0x1>; - xlnx,iic-freq = <0x186a0>; - xlnx,scl-inertial-delay = <0x5>; - xlnx,sda-inertial-delay = <0x5>; - xlnx,ten-bit-adr = <0x0>; - } ; - LCD_OPTIONAL: gpio@81420000 { - compatible = "xlnx,xps-gpio-1.00.a"; - reg = < 0x81420000 0x10000 >; - xlnx,all-inputs = <0x0>; - xlnx,all-inputs-2 = <0x0>; - xlnx,dout-default = <0x0>; - xlnx,dout-default-2 = <0x0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <0xb>; - xlnx,interrupt-present = <0x0>; - xlnx,is-bidir = <0x1>; - xlnx,is-bidir-2 = <0x1>; - xlnx,is-dual = <0x0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - LEDs_4Bit: gpio@81400000 { - compatible = "xlnx,xps-gpio-1.00.a"; - reg = < 0x81400000 0x10000 >; - xlnx,all-inputs = <0x0>; - xlnx,all-inputs-2 = <0x0>; - xlnx,dout-default = <0x0>; - xlnx,dout-default-2 = <0x0>; - xlnx,family = "virtex5"; - xlnx,gpio-width = <0x4>; - xlnx,interrupt-present = <0x0>; - xlnx,is-bidir = <0x1>; - xlnx,is-bidir-2 = <0x1>; - xlnx,is-dual = <0x0>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - } ; - RS232_Uart_1: serial@83e00000 { - clock-frequency = <100000000>; - compatible = "xlnx,xps-uart16550-2.00.b", "ns16550"; - current-speed = <9600>; - device_type = "serial"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 11 2 >; - reg = < 0x83e00000 0x10000 >; - reg-offset = <0x1003>; - reg-shift = <2>; - xlnx,family = "virtex5"; - xlnx,has-external-rclk = <0x0>; - xlnx,has-external-xin = <0x0>; - xlnx,is-a-16550 = <0x1>; - } ; - SPI_EEPROM: xps-spi@feff8000 { - compatible = "xlnx,xps-spi-2.00.b"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 10 2 >; - reg = < 0xfeff8000 0x80 >; - xlnx,family = "virtex5"; - xlnx,fifo-exist = <0x1>; - xlnx,num-ss-bits = <0x1>; - xlnx,num-transfer-bits = <0x8>; - xlnx,sck-ratio = <0x80>; - } ; - SysACE_CompactFlash: sysace@83600000 { - compatible = "xlnx,xps-sysace-1.00.a"; - interrupt-parent = <&xps_intc_0>; - interrupts = < 7 2 >; - reg = < 0x83600000 0x10000 >; - xlnx,family = "virtex5"; - xlnx,mem-width = <0x10>; - } ; - plbv46_pci_0: plbv46-pci@85e00000 { - #size-cells = <2>; - #address-cells = <3>; - compatible = "xlnx,plbv46-pci-1.03.a"; - device_type = "pci"; - reg = < 0x85e00000 0x10000 >; - - /* - * The default ML510 BSB has C_IPIFBAR2PCIBAR_0 set to - * 0 which means that a read/write to the memory mapped - * i/o region (which starts at 0xa0000000) for pci - * bar 0 on the plb side translates to 0. - * It is important to set this value to 0xa0000000, so - * that inbound and outbound pci transactions work - * properly including DMA. - */ - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000 - 0x01000000 0 0x00000000 0xf0000000 0 0x00010000>; - - #interrupt-cells = <1>; - interrupt-parent = <&xps_intc_0>; - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - /* IRQ mapping for pci slots and ALI M1533 - * periperhals. In total there are 5 interrupt - * lines connected to a xps_intc controller. - * Four of them are PCI IRQ A, B, C, D and - * which correspond to respectively xpx_intc - * 5, 4, 3 and 2. The fifth interrupt line is - * connected to the south bridge and this one - * uses irq 1 and is active high instead of - * active low. - * - * The M1533 contains various peripherals - * including AC97 audio, a modem, USB, IDE and - * some power management stuff. The modem - * isn't connected on the ML510 and the power - * management core also isn't used. - */ - - /* IDSEL 0x16 / dev=6, bus=0 / PCI slot 3 */ - 0x3000 0 0 1 &xps_intc_0 3 2 - 0x3000 0 0 2 &xps_intc_0 2 2 - 0x3000 0 0 3 &xps_intc_0 5 2 - 0x3000 0 0 4 &xps_intc_0 4 2 - - /* IDSEL 0x13 / dev=3, bus=1 / PCI slot 4 */ - /* - 0x11800 0 0 1 &xps_intc_0 5 0 2 - 0x11800 0 0 2 &xps_intc_0 4 0 2 - 0x11800 0 0 3 &xps_intc_0 3 0 2 - 0x11800 0 0 4 &xps_intc_0 2 0 2 - */ - - /* According to the datasheet + schematic - * ABCD [FPGA] of slot 5 is mapped to DABC. - * Testing showed that at least A maps to B, - * the mapping of the other pins is a guess - * and for that reason the lines have been - * commented out. - */ - /* IDSEL 0x15 / dev=5, bus=0 / PCI slot 5 */ - 0x2800 0 0 1 &xps_intc_0 4 2 - /* - 0x2800 0 0 2 &xps_intc_0 3 2 - 0x2800 0 0 3 &xps_intc_0 2 2 - 0x2800 0 0 4 &xps_intc_0 5 2 - */ - - /* IDSEL 0x12 / dev=2, bus=1 / PCI slot 6 */ - /* - 0x11000 0 0 1 &xps_intc_0 4 0 2 - 0x11000 0 0 2 &xps_intc_0 3 0 2 - 0x11000 0 0 3 &xps_intc_0 2 0 2 - 0x11000 0 0 4 &xps_intc_0 5 0 2 - */ - - /* IDSEL 0x11 / dev=1, bus=0 / AC97 audio */ - 0x0800 0 0 1 &i8259 7 2 - - /* IDSEL 0x1b / dev=11, bus=0 / IDE */ - 0x5800 0 0 1 &i8259 14 2 - - /* IDSEL 0x1f / dev 15, bus=0 / 2x USB 1.1 */ - 0x7800 0 0 1 &i8259 7 2 - >; - ali_m1533 { - #size-cells = <1>; - #address-cells = <2>; - i8259: interrupt-controller@20 { - reg = <1 0x20 2 - 1 0xa0 2 - 1 0x4d0 2>; - interrupt-controller; - device_type = "interrupt-controller"; - #address-cells = <0>; - #interrupt-cells = <2>; - compatible = "chrp,iic"; - - /* south bridge irq is active high */ - interrupts = <1 3>; - interrupt-parent = <&xps_intc_0>; - }; - }; - } ; - xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 { - compatible = "xlnx,xps-bram-if-cntlr-1.00.a"; - reg = < 0xffff0000 0x10000 >; - xlnx,family = "virtex5"; - } ; - xps_intc_0: interrupt-controller@81800000 { - #interrupt-cells = <0x2>; - compatible = "xlnx,xps-intc-1.00.a"; - interrupt-controller ; - reg = < 0x81800000 0x10000 >; - xlnx,num-intr-inputs = <0xc>; - } ; - xps_tft_0: tft@86e00000 { - compatible = "xlnx,xps-tft-1.00.a"; - reg = < 0x86e00000 0x10000 >; - xlnx,dcr-splb-slave-if = <0x1>; - xlnx,default-tft-base-addr = <0x0>; - xlnx,family = "virtex5"; - xlnx,i2c-slave-addr = <0x76>; - xlnx,mplb-awidth = <0x20>; - xlnx,mplb-dwidth = <0x80>; - xlnx,mplb-native-dwidth = <0x40>; - xlnx,mplb-smallest-slave = <0x20>; - xlnx,tft-interface = <0x1>; - } ; - } ; -} ; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/walnut.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/walnut.dts deleted file mode 100644 index 4a9f726a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/walnut.dts +++ /dev/null @@ -1,246 +0,0 @@ -/* - * Device Tree Source for IBM Walnut - * - * Copyright 2007 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "ibm,walnut"; - compatible = "ibm,walnut"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC; - serial0 = &UART0; - serial1 = &UART1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,405GP"; - reg = <0x00000000>; - clock-frequency = <200000000>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <16384>; - d-cache-size = <16384>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller { - compatible = "ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - plb { - compatible = "ibm,plb3"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: memory-controller { - compatible = "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - MAL: mcmal { - compatible = "ibm,mcmal-405gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <1>; - num-rx-chans = <1>; - interrupt-parent = <&UIC0>; - interrupts = < - 0xb 0x4 /* TXEOB */ - 0xc 0x4 /* RXEOB */ - 0xa 0x4 /* SERR */ - 0xd 0x4 /* TXDE */ - 0xe 0x4 /* RXDE */>; - }; - - POB0: opb { - compatible = "ibm,opb-405gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xef600000 0xef600000 0x00a00000>; - dcr-reg = <0x0a0 0x005>; - clock-frequency = <0>; /* Filled in by zImage */ - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <9600>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - IIC: i2c@ef600500 { - compatible = "ibm,iic-405gp", "ibm,iic"; - reg = <0xef600500 0x00000011>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - GPIO: gpio@ef600700 { - compatible = "ibm,gpio-405gp"; - reg = <0xef600700 0x00000020>; - }; - - EMAC: ethernet@ef600800 { - device_type = "network"; - compatible = "ibm,emac-405gp", "ibm,emac"; - interrupt-parent = <&UIC0>; - interrupts = < - 0xf 0x4 /* Ethernet */ - 0x9 0x4 /* Ethernet Wake Up */>; - local-mac-address = [000000000000]; /* Filled in by zImage */ - reg = <0xef600800 0x00000070>; - mal-device = <&MAL>; - mal-tx-channel = <0>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000001>; - }; - - }; - - EBC0: ebc { - compatible = "ibm,ebc-405gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - /* The ranges property is supplied by the bootwrapper - * and is based on the firmware's configuration of the - * EBC bridge - */ - clock-frequency = <0>; /* Filled in by zImage */ - - sram@0,0 { - reg = <0x00000000 0x00000000 0x00080000>; - }; - - flash@0,80000 { - compatible = "jedec-flash"; - bank-width = <1>; - reg = <0x00000000 0x00080000 0x00080000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "OpenBIOS"; - reg = <0x00000000 0x00080000>; - read-only; - }; - }; - - nvram@1,0 { - /* NVRAM and RTC */ - compatible = "ds1743-nvram"; - #bytes = <0x2000>; - reg = <0x00000001 0x00000000 0x00002000>; - }; - - keyboard@2,0 { - compatible = "intel,82C42PC"; - reg = <0x00000002 0x00000000 0x00000002>; - }; - - ir@3,0 { - compatible = "ti,TIR2000PAG"; - reg = <0x00000003 0x00000000 0x00000010>; - }; - - fpga@7,0 { - compatible = "Walnut-FPGA"; - reg = <0x00000007 0x00000000 0x00000010>; - virtual-reg = <0xf0300005>; - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; - primary; - reg = <0xeec00000 0x00000008 /* Config space access */ - 0xeed80000 0x00000004 /* IACK */ - 0xeed80000 0x00000004 /* Special cycle */ - 0xef480000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 - 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; - - /* Walnut has all 4 IRQ pins tied together per slot */ - interrupt-map-mask = <0xf800 0x0 0x0 0x0>; - interrupt-map = < - /* IDSEL 1 */ - 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 - - /* IDSEL 2 */ - 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8 - - /* IDSEL 3 */ - 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8 - - /* IDSEL 4 */ - 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/warp.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/warp.dts deleted file mode 100644 index e576ee85..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/warp.dts +++ /dev/null @@ -1,309 +0,0 @@ -/* - * Device Tree Source for PIKA Warp - * - * Copyright (c) 2008-2009 PIKA Technologies - * Sean MacLennan <smaclennan@pikatech.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "pika,warp"; - compatible = "pika,warp"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440EP"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440ep"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440ep"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - DMA0: dma { - compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x00000000 0x00000000 0x00000000 0x80000000 - 0x80000000 0x00000000 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - fpga@2,0 { - compatible = "pika,fpga"; - reg = <0x00000002 0x00000000 0x00001000>; - interrupts = <0x18 0x8>; - interrupt-parent = <&UIC0>; - }; - - fpga@2,2000 { - compatible = "pika,fpga-sgl"; - reg = <0x00000002 0x00002000 0x00000200>; - }; - - fpga@2,4000 { - compatible = "pika,fpga-sd"; - reg = <0x00000002 0x00004000 0x00004000>; - }; - - nor@0,0 { - compatible = "amd,s29gl032a", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x00400000>; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "splash"; - reg = <0x00000000 0x00010000>; - }; - partition@300000 { - label = "fpga"; - reg = <0x0300000 0x00040000>; - }; - partition@340000 { - label = "env"; - reg = <0x0340000 0x00040000>; - }; - partition@380000 { - label = "u-boot"; - reg = <0x0380000 0x00080000>; - }; - }; - - ndfc@1,0 { - compatible = "ibm,ndfc"; - reg = <0x00000001 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x03E00000>; - }; - partition@40000000 { - label = "persistent"; - reg = <0x04000000 0x04000000>; - }; - partition@80000000 { - label = "persistent1"; - reg = <0x08000000 0x04000000>; - }; - partition@C0000000 { - label = "persistent2"; - reg = <0x0C000000 0x04000000>; - }; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - #address-cells = <1>; - #size-cells = <0>; - - ad7414@4a { - compatible = "adi,ad7414"; - reg = <0x4a>; - interrupts = <0x19 0x8>; - interrupt-parent = <&UIC0>; - }; - - /* This will create 52 and 53 */ - at24@52 { - compatible = "at,24c04"; - reg = <0x52>; - }; - }; - - GPIO0: gpio@ef600b00 { - compatible = "ibm,ppc4xx-gpio"; - reg = <0xef600b00 0x00000048>; - #gpio-cells = <2>; - gpio-controller; - }; - - GPIO1: gpio@ef600c00 { - compatible = "ibm,ppc4xx-gpio"; - reg = <0xef600c00 0x00000048>; - #gpio-cells = <2>; - gpio-controller; - }; - - power-leds { - compatible = "gpio-leds"; - green { - gpios = <&GPIO1 0 0>; - default-state = "keep"; - }; - red { - gpios = <&GPIO1 1 0>; - default-state = "keep"; - }; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0xef600e00 0x00000070>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0 1>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - - usb@ef601000 { - compatible = "ohci-be"; - reg = <0xef601000 0x00000080>; - interrupts = <0x8 0x1 0x9 0x1>; - interrupt-parent = < &UIC1 >; - }; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/wii.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/wii.dts deleted file mode 100644 index 77528c9a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/wii.dts +++ /dev/null @@ -1,218 +0,0 @@ -/* - * arch/powerpc/boot/dts/wii.dts - * - * Nintendo Wii platform device tree source - * Copyright (C) 2008-2009 The GameCube Linux Team - * Copyright (C) 2008,2009 Albert Herranz - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - */ - -/dts-v1/; - -/* - * This is commented-out for now. - * Until a later patch is merged, the kernel can use only the first - * contiguous RAM range and will BUG() if the memreserve is outside - * that range. - */ -/*/memreserve/ 0x10000000 0x0004000;*/ /* DSP RAM */ - -/ { - model = "nintendo,wii"; - compatible = "nintendo,wii"; - #address-cells = <1>; - #size-cells = <1>; - - chosen { - bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x01800000 /* MEM1 24MB 1T-SRAM */ - 0x10000000 0x04000000>; /* MEM2 64MB GDDR3 */ - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,broadway@0 { - device_type = "cpu"; - reg = <0>; - clock-frequency = <729000000>; /* 729MHz */ - bus-frequency = <243000000>; /* 243MHz core-to-bus 3x */ - timebase-frequency = <60750000>; /* 243MHz / 4 */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - }; - }; - - /* devices contained in the hollywood chipset */ - hollywood { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nintendo,hollywood"; - ranges = <0x0c000000 0x0c000000 0x01000000 - 0x0d000000 0x0d000000 0x00800000 - 0x0d800000 0x0d800000 0x00800000>; - interrupt-parent = <&PIC0>; - - video@0c002000 { - compatible = "nintendo,hollywood-vi", - "nintendo,flipper-vi"; - reg = <0x0c002000 0x100>; - interrupts = <8>; - }; - - processor-interface@0c003000 { - compatible = "nintendo,hollywood-pi", - "nintendo,flipper-pi"; - reg = <0x0c003000 0x100>; - - PIC0: pic0 { - #interrupt-cells = <1>; - compatible = "nintendo,flipper-pic"; - interrupt-controller; - }; - }; - - dsp@0c005000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "nintendo,hollywood-dsp", - "nintendo,flipper-dsp"; - reg = <0x0c005000 0x200>; - interrupts = <6>; - }; - - gamepad-controller@0d006400 { - compatible = "nintendo,hollywood-si", - "nintendo,flipper-si"; - reg = <0x0d006400 0x100>; - interrupts = <3>; - }; - - audio@0c006c00 { - compatible = "nintendo,hollywood-ai", - "nintendo,flipper-ai"; - reg = <0x0d006c00 0x20>; - interrupts = <6>; - }; - - /* External Interface bus */ - exi@0d006800 { - compatible = "nintendo,hollywood-exi", - "nintendo,flipper-exi"; - reg = <0x0d006800 0x40>; - virtual-reg = <0x0d006800>; - interrupts = <4>; - }; - - usb@0d040000 { - compatible = "nintendo,hollywood-usb-ehci", - "usb-ehci"; - reg = <0x0d040000 0x100>; - interrupts = <4>; - interrupt-parent = <&PIC1>; - }; - - usb@0d050000 { - compatible = "nintendo,hollywood-usb-ohci", - "usb-ohci"; - reg = <0x0d050000 0x100>; - interrupts = <5>; - interrupt-parent = <&PIC1>; - }; - - usb@0d060000 { - compatible = "nintendo,hollywood-usb-ohci", - "usb-ohci"; - reg = <0x0d060000 0x100>; - interrupts = <6>; - interrupt-parent = <&PIC1>; - }; - - sd@0d070000 { - compatible = "nintendo,hollywood-sdhci", - "sdhci"; - reg = <0x0d070000 0x200>; - interrupts = <7>; - interrupt-parent = <&PIC1>; - }; - - sdio@0d080000 { - compatible = "nintendo,hollywood-sdhci", - "sdhci"; - reg = <0x0d080000 0x200>; - interrupts = <8>; - interrupt-parent = <&PIC1>; - }; - - ipc@0d000000 { - compatible = "nintendo,hollywood-ipc"; - reg = <0x0d000000 0x10>; - interrupts = <30>; - interrupt-parent = <&PIC1>; - }; - - PIC1: pic1@0d800030 { - #interrupt-cells = <1>; - compatible = "nintendo,hollywood-pic"; - reg = <0x0d800030 0x10>; - interrupt-controller; - interrupts = <14>; - }; - - GPIO: gpio@0d8000c0 { - #gpio-cells = <2>; - compatible = "nintendo,hollywood-gpio"; - reg = <0x0d8000c0 0x40>; - gpio-controller; - - /* - * This is commented out while a standard binding - * for i2c over gpio is defined. - */ - /* - i2c-video { - #address-cells = <1>; - #size-cells = <0>; - compatible = "i2c-gpio"; - - gpios = <&GPIO 15 0 - &GPIO 14 0>; - clock-frequency = <250000>; - no-clock-stretching; - scl-is-open-drain; - sda-is-open-drain; - sda-enforce-dir; - - AVE: audio-video-encoder@70 { - compatible = "nintendo,wii-audio-video-encoder"; - reg = <0x70>; - }; - }; - */ - }; - - control@0d800100 { - compatible = "nintendo,hollywood-control"; - reg = <0x0d800100 0x300>; - }; - - disk@0d806000 { - compatible = "nintendo,hollywood-di"; - reg = <0x0d806000 0x40>; - interrupts = <2>; - }; - }; -}; - diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xcalibur1501.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xcalibur1501.dts deleted file mode 100644 index cc00f4dd..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xcalibur1501.dts +++ /dev/null @@ -1,696 +0,0 @@ -/* - * Copyright (C) 2008 Extreme Engineering Solutions, Inc. - * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. - * - * XCalibur1501 6U CompactPCI single-board computer based on MPC8572E - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; -/ { - model = "xes,xcalibur1501"; - compatible = "xes,xcalibur1501", "xes,MPC8572"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - serial0 = &serial0; - serial1 = &serial1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot - }; - - localbus@ef005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xef005000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - /* Local bus region mappings */ - ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Flash 1 */ - 1 0 0 0xf0000000 0x8000000 /* CS1: Flash 2 */ - 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ - 3 0 0 0xef840000 0x40000 /* CS3: NAND CE2 */ - 4 0 0 0xe9000000 0x100000>; /* CS4: USB */ - - nor-boot@0,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - reg = <0 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Primary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Primary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Primary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Primary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Primary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nor-alternate@1,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - //reg = <0xf0000000 0x08000000>; /* 128MB */ - reg = <1 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Secondary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Secondary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Secondary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Secondary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Secondary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - /* - * Actual part could be ST Micro NAND08GW3B2A (1 GB), - * Micron MT29F8G08DAA (2x 512 MB), or Micron - * MT29F16G08FAA (2x 1 GB), depending on the build - * configuration - */ - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x40000>; - /* U-Boot should fix this up if chip size > 1 GB */ - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - - usb@4,0 { - compatible = "nxp,usb-isp1761"; - reg = <4 0 0x100000>; - bus-width = <32>; - interrupt-parent = <&mpic>; - interrupts = <10 1>; - }; - }; - - soc8572@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8572-immr", "simple-bus"; - ranges = <0x0 0 0xef000000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2, 1M - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - temp-sensor@48 { - compatible = "dallas,ds1631", "dallas,ds1621"; - reg = <0x48>; - }; - - temp-sensor@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - cpu-supervisor@51 { - compatible = "dallas,ds4510"; - reg = <0x51>; - }; - - eeprom@54 { - compatible = "atmel,at24c128b"; - reg = <0x54>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - pcie-switch@6a { - compatible = "plx,pex8648"; - reg = <0x6a>; - }; - - /* On-board signals for VID, flash, serial */ - gpio1: gpio@18 { - compatible = "nxp,pca9557"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* PMC0/XMC0 signals */ - gpio2: gpio@1c { - compatible = "nxp,pca9557"; - reg = <0x1c>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* PMC1/XMC1 signals */ - gpio3: gpio@1d { - compatible = "nxp,pca9557"; - reg = <0x1d>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* CompactPCI signals (sysen, GA[4:0]) */ - gpio4: gpio@1e { - compatible = "nxp,pca9557"; - reg = <0x1e>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* CompactPCI J5 GPIO and FAL/DEG/PRST */ - gpio5: gpio@1f { - compatible = "nxp,pca9557"; - reg = <0x1f>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC 1 front panel 0 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <4 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <4 1>; - reg = <0x2>; - }; - phy2: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x3>; - }; - phy3: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <5 1>; - reg = <0x4>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 2 front panel 1 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 3 PICMG2.16 backplane port 0 */ - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 4 PICMG2.16 backplane port 1 */ - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* UART0 */ - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - /* UART1 */ - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - msi@41600 { - compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - gpio0: gpio@f000 { - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x1000>; - interrupts = <47 2>; - interrupt-parent = <&mpic>; - #gpio-cells = <2>; - gpio-controller; - }; - - gpio-leds { - compatible = "gpio-leds"; - - heartbeat { - label = "Heartbeat"; - gpios = <&gpio0 4 1>; - linux,default-trigger = "heartbeat"; - }; - - yellow { - label = "Yellow"; - gpios = <&gpio0 5 1>; - }; - - red { - label = "Red"; - gpios = <&gpio0 6 1>; - }; - - green { - label = "Green"; - gpios = <&gpio0 7 1>; - }; - }; - - /* PME (pattern-matcher) */ - pme@10000 { - compatible = "fsl,mpc8572-pme", "pme8572"; - reg = <0x10000 0x5000>; - interrupts = <57 2 64 2 65 2 66 2 67 2>; - interrupt-parent = <&mpic>; - }; - - tlu@2f000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x2f000 0x1000>; - interupts = <61 2 >; - interrupt-parent = <&mpic>; - }; - - tlu@15000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x15000 0x1000>; - interupts = <75 2>; - interrupt-parent = <&mpic>; - }; - }; - - /* - * PCI Express controller 3 @ ef008000 is not used. - * This would have been pci0 on other mpc85xx platforms. - * - * PCI Express controller 2 @ ef009000 is not used. - * This would have been pci1 on other mpc85xx platforms. - */ - - /* PCI Express controller 1, wired to PEX8648 PCIe switch */ - pci2: pcie@ef00a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef00a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 - 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200.dts deleted file mode 100644 index 8fd7b703..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200.dts +++ /dev/null @@ -1,468 +0,0 @@ -/* - * Copyright (C) 2009 Extreme Engineering Solutions, Inc. - * Based on TQM8548 device tree - * - * XPedite5200 PrPMC/XMC module based on MPC8548E - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; - -/ { - model = "xes,xpedite5200"; - compatible = "xes,xpedite5200", "xes,MPC8548"; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; // Filled in by U-Boot - }; - - soc@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xef000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8548-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - /* On-card I2C */ - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - /* - * Board GPIO: - * 0: BRD_CFG0 (1: P14 IO present) - * 1: BRD_CFG1 (1: FP ethernet present) - * 2: BRD_CFG2 (1: XMC IO present) - * 3: XMC root complex indicator - * 4: Flash boot device indicator - * 5: Flash write protect enable - * 6: PMC monarch indicator - * 7: PMC EREADY - */ - gpio1: gpio@18 { - compatible = "nxp,pca9556"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* P14 GPIO */ - gpio2: gpio@19 { - compatible = "nxp,pca9556"; - reg = <0x19>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - eeprom@50 { - compatible = "atmel,at24c16"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - dtt@48 { - compatible = "maxim,max1237"; - reg = <0x34>; - }; - }; - - /* Off-card I2C */ - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC1: Front panel port 0 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x2>; - }; - phy2: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x3>; - }; - phy3: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x4>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC2: Front panel port 1 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC3: Rear panel port 2 */ - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC4: Rear panel port 3 */ - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - current-speed = <115200>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { // global utilities reg - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - localbus@ef005000 { - compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xef005000 0x100>; // BRx, ORx, etc. - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = < - 0 0x0 0xfc000000 0x04000000 // NOR boot flash - 1 0x0 0xf8000000 0x04000000 // NOR expansion flash - 2 0x0 0xef800000 0x00010000 // NAND CE1 - 3 0x0 0xef840000 0x00010000 // NAND CE2 - >; - - nor-boot@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x4000000>; - bank-width = <2>; - - partition@0 { - label = "Primary OS"; - reg = <0x00000000 0x180000>; - }; - partition@180000 { - label = "Secondary OS"; - reg = <0x00180000 0x180000>; - }; - partition@300000 { - label = "User"; - reg = <0x00300000 0x3c80000>; - }; - partition@3f80000 { - label = "Boot firmware"; - reg = <0x03f80000 0x80000>; - }; - }; - - nor-alternate@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <1 0x0 0x4000000>; - bank-width = <2>; - - partition@0 { - label = "Filesystem"; - reg = <0x00000000 0x3f80000>; - }; - partition@3f80000 { - label = "Alternate boot firmware"; - reg = <0x03f80000 0x80000>; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xes,address-ctl-nand"; - reg = <2 0x0 0x10000>; - cle-line = <0x8>; /* CLE tied to A3 */ - ale-line = <0x10>; /* ALE tied to A4 */ - - /* U-Boot should fix this up */ - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - }; - - /* PMC interface */ - pci0: pci@ef008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xef008000 0x1000>; - clock-frequency = <33333333>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1>; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x40000000 - 0x01000000 0 0x00000000 0xe8000000 0 0x00800000>; - }; - - /* XMC PCIe is not yet enabled in U-Boot on XPedite5200 */ -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200_xmon.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200_xmon.dts deleted file mode 100644 index 0baa8283..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5200_xmon.dts +++ /dev/null @@ -1,508 +0,0 @@ -/* - * Copyright (C) 2009 Extreme Engineering Solutions, Inc. - * Based on TQM8548 device tree - * - * XPedite5200 PrPMC/XMC module based on MPC8548E. This dts is for the - * xMon boot loader memory map which differs from U-Boot's. - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; - -/ { - model = "xes,xpedite5200"; - compatible = "xes,xpedite5200", "xes,MPC8548"; - #address-cells = <1>; - #size-cells = <1>; - form-factor = "PMC/XMC"; - boot-bank = <0x0>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - ethernet3 = &enet3; - - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8548@0 { - device_type = "cpu"; - reg = <0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0>; // Filled in by boot loader - }; - - soc@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - ranges = <0x0 0xef000000 0x100000>; - bus-frequency = <0>; - compatible = "fsl,mpc8548-immr", "simple-bus"; - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8548-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8548-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8548-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x80000>; // L2, 512K - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - /* On-card I2C */ - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - /* - * Board GPIO: - * 0: BRD_CFG0 (1: P14 IO present) - * 1: BRD_CFG1 (1: FP ethernet present) - * 2: BRD_CFG2 (1: XMC IO present) - * 3: XMC root complex indicator - * 4: Flash boot device indicator - * 5: Flash write protect enable - * 6: PMC monarch indicator - * 7: PMC EREADY - */ - gpio1: gpio@18 { - compatible = "nxp,pca9556"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - /* P14 GPIO */ - gpio2: gpio@19 { - compatible = "nxp,pca9556"; - reg = <0x19>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - eeprom@50 { - compatible = "atmel,at24c16"; - reg = <0x50>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - dtt@48 { - compatible = "maxim,max1237"; - reg = <0x34>; - }; - }; - - /* Off-card I2C */ - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8548-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC1: Front panel port 0 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x2>; - }; - phy2: ethernet-phy@3 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x3>; - }; - phy3: ethernet-phy@4 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x4>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC2: Front panel port 1 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC3: Rear panel port 2 */ - enet2: ethernet@26000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <2>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x26000 0x1000>; - ranges = <0x0 0x26000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <31 2 32 2 33 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi2>; - phy-handle = <&phy2>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi2: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC4: Rear panel port 3 */ - enet3: ethernet@27000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <3>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x27000 0x1000>; - ranges = <0x0 0x27000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <37 2 38 2 39 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi3>; - phy-handle = <&phy3>; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi3: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - current-speed = <9600>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - current-speed = <9600>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { // global utilities reg - compatible = "fsl,mpc8548-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - }; - - localbus@ef005000 { - compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", - "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0xef005000 0x100>; // BRx, ORx, etc. - interrupt-parent = <&mpic>; - interrupts = <19 2>; - - ranges = < - 0 0x0 0xf8000000 0x08000000 // NOR boot flash - 1 0x0 0xf0000000 0x08000000 // NOR expansion flash - 2 0x0 0xe8000000 0x00010000 // NAND CE1 - 3 0x0 0xe8010000 0x00010000 // NAND CE2 - >; - - nor-boot@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0 0x0 0x4000000>; - bank-width = <2>; - - partition@0 { - label = "Primary OS"; - reg = <0x00000000 0x180000>; - }; - partition@180000 { - label = "Secondary OS"; - reg = <0x00180000 0x180000>; - }; - partition@300000 { - label = "User"; - reg = <0x00300000 0x3c80000>; - }; - partition@3f80000 { - label = "Boot firmware"; - reg = <0x03f80000 0x80000>; - }; - }; - - nor-alternate@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <1 0x0 0x4000000>; - bank-width = <2>; - - partition@0 { - label = "Filesystem"; - reg = <0x00000000 0x3f80000>; - }; - partition@3f80000 { - label = "Alternate boot firmware"; - reg = <0x03f80000 0x80000>; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "xes,address-ctl-nand"; - reg = <2 0x0 0x10000>; - cle-line = <0x8>; /* CLE tied to A3 */ - ale-line = <0x10>; /* ALE tied to A4 */ - - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - }; - - /* PMC interface */ - pci0: pci@ef008000 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; - device_type = "pci"; - reg = <0xef008000 0x1000>; - clock-frequency = <33333333>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL */ - 0xe000 0 0 1 &mpic 2 1 - 0xe000 0 0 2 &mpic 3 1>; - - interrupt-parent = <&mpic>; - interrupts = <24 2>; - bus-range = <0 0>; - ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 - 0x01000000 0 0x00000000 0xd0000000 0 0x01000000>; - }; - - /* XMC PCIe */ - pci1: pcie@ef00a000 { - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x00000 0 0 1 &mpic 0 1 - 0x00000 0 0 2 &mpic 1 1 - 0x00000 0 0 3 &mpic 2 1 - 0x00000 0 0 4 &mpic 3 1>; - - interrupt-parent = <&mpic>; - interrupts = <26 2>; - bus-range = <0 0xff>; - ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000 - 0x01000000 0 0x00000000 0xd1000000 0 0x01000000>; - clock-frequency = <33333333>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xef00a000 0x1000>; - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - pcie@0 { - reg = <0 0 0 0 0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0 0xc0000000 0x02000000 0 - 0xc0000000 0 0x20000000 - 0x01000000 0 0x00000000 0x01000000 0 - 0x00000000 0 0x08000000>; - }; - }; - - /* Needed for dtbImage boot wrapper compatibility */ - chosen { - linux,stdout-path = &serial0; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5301.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5301.dts deleted file mode 100644 index 53c1c6a9..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5301.dts +++ /dev/null @@ -1,640 +0,0 @@ -/* - * Copyright (C) 2008 Extreme Engineering Solutions, Inc. - * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. - * - * XPedite5301 PMC/XMC module based on MPC8572E - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; -/ { - model = "xes,xpedite5301"; - compatible = "xes,xpedite5301", "xes,MPC8572"; - #address-cells = <2>; - #size-cells = <2>; - form-factor = "PMC/XMC"; - boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */ - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot - }; - - localbus@ef005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xef005000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - /* Local bus region mappings */ - ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */ - 1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */ - 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ - 3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */ - - nor-boot@0,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - reg = <0 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Primary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Primary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Primary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Primary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Primary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nor-alternate@1,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - //reg = <0xf0000000 0x08000000>; /* 128MB */ - reg = <1 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Secondary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Secondary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Secondary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Secondary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Secondary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - /* - * Actual part could be ST Micro NAND08GW3B2A (1 GB), - * Micron MT29F8G08DAA (2x 512 MB), or Micron - * MT29F16G08FAA (2x 1 GB), depending on the build - * configuration - */ - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x40000>; - /* U-Boot should fix this up if chip size > 1 GB */ - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - - }; - - soc8572@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8572-immr", "simple-bus"; - ranges = <0x0 0 0xef000000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2, 1M - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - temp-sensor@48 { - compatible = "dallas,ds1631", "dallas,ds1621"; - reg = <0x48>; - }; - - temp-sensor@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - cpu-supervisor@51 { - compatible = "dallas,ds4510"; - reg = <0x51>; - }; - - eeprom@54 { - compatible = "atmel,at24c128b"; - reg = <0x54>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - pcie-switch@70 { - compatible = "plx,pex8518"; - reg = <0x70>; - }; - - gpio1: gpio@18 { - compatible = "nxp,pca9557"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio2: gpio@1c { - compatible = "nxp,pca9557"; - reg = <0x1c>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio3: gpio@1e { - compatible = "nxp,pca9557"; - reg = <0x1e>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio4: gpio@1f { - compatible = "nxp,pca9557"; - reg = <0x1f>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC 1 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 2 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* UART0 */ - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - /* UART1 */ - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - msi@41600 { - compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - gpio0: gpio@f000 { - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x1000>; - interrupts = <47 2>; - interrupt-parent = <&mpic>; - #gpio-cells = <2>; - gpio-controller; - }; - - gpio-leds { - compatible = "gpio-leds"; - - heartbeat { - label = "Heartbeat"; - gpios = <&gpio0 4 1>; - linux,default-trigger = "heartbeat"; - }; - - yellow { - label = "Yellow"; - gpios = <&gpio0 5 1>; - }; - - red { - label = "Red"; - gpios = <&gpio0 6 1>; - }; - - green { - label = "Green"; - gpios = <&gpio0 7 1>; - }; - }; - - /* PME (pattern-matcher) */ - pme@10000 { - compatible = "fsl,mpc8572-pme", "pme8572"; - reg = <0x10000 0x5000>; - interrupts = <57 2 64 2 65 2 66 2 67 2>; - interrupt-parent = <&mpic>; - }; - - tlu@2f000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x2f000 0x1000>; - interupts = <61 2 >; - interrupt-parent = <&mpic>; - }; - - tlu@15000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x15000 0x1000>; - interupts = <75 2>; - interrupt-parent = <&mpic>; - }; - }; - - /* - * PCI Express controller 3 @ ef008000 is not used. - * This would have been pci0 on other mpc85xx platforms. - */ - - /* PCI Express controller 2, wired to XMC P15 connector */ - pci1: pcie@ef009000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef009000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x5 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x6 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x7 0x1 - >; - pcie@0 { - reg = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - /* PCI Express controller 1, wired to PEX8112 for PMC interface */ - pci2: pcie@ef00a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef00a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 - 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5330.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5330.dts deleted file mode 100644 index 21522598..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5330.dts +++ /dev/null @@ -1,707 +0,0 @@ -/* - * Copyright (C) 2008 Extreme Engineering Solutions, Inc. - * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. - * - * XPedite5330 3U CompactPCI module based on MPC8572E - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; -/ { - model = "xes,xpedite5330"; - compatible = "xes,xpedite5330", "xes,MPC8572"; - #address-cells = <2>; - #size-cells = <2>; - form-factor = "3U CompactPCI"; - boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */ - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci0 = &pci0; - pci1 = &pci1; - pci2 = &pci2; - }; - - pmcslots { - #address-cells = <1>; - #size-cells = <0>; - - pmcslot@0 { - cell-index = <0>; - /* - * boolean properties (true if defined): - * monarch; - * module-present; - */ - }; - }; - - xmcslots { - #address-cells = <1>; - #size-cells = <0>; - - xmcslot@0 { - cell-index = <0>; - /* - * boolean properties (true if defined): - * module-present; - */ - }; - }; - - cpci { - /* - * boolean properties (true if defined): - * system-controller; - */ - system-controller; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot - }; - - localbus@ef005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xef005000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - /* Local bus region mappings */ - ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */ - 1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */ - 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ - 3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */ - - nor-boot@0,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - reg = <0 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Primary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Primary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Primary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Primary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Primary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nor-alternate@1,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - //reg = <0xf0000000 0x08000000>; /* 128MB */ - reg = <1 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Secondary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Secondary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Secondary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Secondary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Secondary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - /* - * Actual part could be ST Micro NAND08GW3B2A (1 GB), - * Micron MT29F8G08DAA (2x 512 MB), or Micron - * MT29F16G08FAA (2x 1 GB), depending on the build - * configuration - */ - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x40000>; - /* U-Boot should fix this up if chip size > 1 GB */ - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - - }; - - soc8572@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8572-immr", "simple-bus"; - ranges = <0x0 0 0xef000000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2, 1M - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - temp-sensor@48 { - compatible = "dallas,ds1631", "dallas,ds1621"; - reg = <0x48>; - }; - - temp-sensor@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - cpu-supervisor@51 { - compatible = "dallas,ds4510"; - reg = <0x51>; - }; - - eeprom@54 { - compatible = "atmel,at24c128b"; - reg = <0x54>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - pcie-switch@70 { - compatible = "plx,pex8518"; - reg = <0x70>; - }; - - gpio1: gpio@18 { - compatible = "nxp,pca9557"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio2: gpio@1c { - compatible = "nxp,pca9557"; - reg = <0x1c>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio3: gpio@1e { - compatible = "nxp,pca9557"; - reg = <0x1e>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio4: gpio@1f { - compatible = "nxp,pca9557"; - reg = <0x1f>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC 1 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 2 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* UART0 */ - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - /* UART1 */ - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - msi@41600 { - compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - gpio0: gpio@f000 { - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x1000>; - interrupts = <47 2>; - interrupt-parent = <&mpic>; - #gpio-cells = <2>; - gpio-controller; - }; - - gpio-leds { - compatible = "gpio-leds"; - - heartbeat { - label = "Heartbeat"; - gpios = <&gpio0 4 1>; - linux,default-trigger = "heartbeat"; - }; - - yellow { - label = "Yellow"; - gpios = <&gpio0 5 1>; - }; - - red { - label = "Red"; - gpios = <&gpio0 6 1>; - }; - - green { - label = "Green"; - gpios = <&gpio0 7 1>; - }; - }; - - /* PME (pattern-matcher) */ - pme@10000 { - compatible = "fsl,mpc8572-pme", "pme8572"; - reg = <0x10000 0x5000>; - interrupts = <57 2 64 2 65 2 66 2 67 2>; - interrupt-parent = <&mpic>; - }; - - tlu@2f000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x2f000 0x1000>; - interupts = <61 2 >; - interrupt-parent = <&mpic>; - }; - - tlu@15000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x15000 0x1000>; - interupts = <75 2>; - interrupt-parent = <&mpic>; - }; - }; - - /* PCI Express controller 3 - CompactPCI bus via PEX8112 bridge */ - pci0: pcie@ef008000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef008000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe9000000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <24 2>; - interrupt-map-mask = <0xff00 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x02000000 0x0 0xe0000000 - 0x02000000 0x0 0xe0000000 - 0x0 0x10000000 - - 0x01000000 0x0 0x0 - 0x01000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - /* PCI Express controller 2, PMC module via PEX8112 bridge */ - pci1: pcie@ef009000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef009000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x5 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x6 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x7 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - /* PCI Express controller 1, XMC P15 */ - pci2: pcie@ef00a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef00a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 - 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5370.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5370.dts deleted file mode 100644 index 11dbda10..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/xpedite5370.dts +++ /dev/null @@ -1,638 +0,0 @@ -/* - * Copyright (C) 2008 Extreme Engineering Solutions, Inc. - * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. - * - * XPedite5370 3U VPX single-board computer based on MPC8572E - * - * This is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/dts-v1/; -/ { - model = "xes,xpedite5370"; - compatible = "xes,xpedite5370", "xes,MPC8572"; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &enet0; - ethernet1 = &enet1; - serial0 = &serial0; - serial1 = &serial1; - pci1 = &pci1; - pci2 = &pci2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - PowerPC,8572@0 { - device_type = "cpu"; - reg = <0x0>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - - PowerPC,8572@1 { - device_type = "cpu"; - reg = <0x1>; - d-cache-line-size = <32>; // 32 bytes - i-cache-line-size = <32>; // 32 bytes - d-cache-size = <0x8000>; // L1, 32K - i-cache-size = <0x8000>; // L1, 32K - timebase-frequency = <0>; - bus-frequency = <0>; - clock-frequency = <0>; - next-level-cache = <&L2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot - }; - - localbus@ef005000 { - #address-cells = <2>; - #size-cells = <1>; - compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; - reg = <0 0xef005000 0 0x1000>; - interrupts = <19 2>; - interrupt-parent = <&mpic>; - /* Local bus region mappings */ - ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */ - 1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */ - 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ - 3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */ - - nor-boot@0,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - reg = <0 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Primary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Primary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Primary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Primary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Primary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nor-alternate@1,0 { - compatible = "amd,s29gl01gp", "cfi-flash"; - bank-width = <2>; - //reg = <0xf0000000 0x08000000>; /* 128MB */ - reg = <1 0 0x8000000>; /* 128MB */ - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "Secondary user space"; - reg = <0x00000000 0x6f00000>; /* 111 MB */ - }; - partition@6f00000 { - label = "Secondary kernel"; - reg = <0x6f00000 0x1000000>; /* 16 MB */ - }; - partition@7f00000 { - label = "Secondary DTB"; - reg = <0x7f00000 0x40000>; /* 256 KB */ - }; - partition@7f40000 { - label = "Secondary U-Boot environment"; - reg = <0x7f40000 0x40000>; /* 256 KB */ - }; - partition@7f80000 { - label = "Secondary U-Boot"; - reg = <0x7f80000 0x80000>; /* 512 KB */ - read-only; - }; - }; - - nand@2,0 { - #address-cells = <1>; - #size-cells = <1>; - /* - * Actual part could be ST Micro NAND08GW3B2A (1 GB), - * Micron MT29F8G08DAA (2x 512 MB), or Micron - * MT29F16G08FAA (2x 1 GB), depending on the build - * configuration - */ - compatible = "fsl,mpc8572-fcm-nand", - "fsl,elbc-fcm-nand"; - reg = <2 0 0x40000>; - /* U-Boot should fix this up if chip size > 1 GB */ - partition@0 { - label = "NAND Filesystem"; - reg = <0 0x40000000>; - }; - }; - - }; - - soc8572@ef000000 { - #address-cells = <1>; - #size-cells = <1>; - device_type = "soc"; - compatible = "fsl,mpc8572-immr", "simple-bus"; - ranges = <0x0 0 0xef000000 0x100000>; - bus-frequency = <0>; // Filled out by uboot. - - ecm-law@0 { - compatible = "fsl,ecm-law"; - reg = <0x0 0x1000>; - fsl,num-laws = <12>; - }; - - ecm@1000 { - compatible = "fsl,mpc8572-ecm", "fsl,ecm"; - reg = <0x1000 0x1000>; - interrupts = <17 2>; - interrupt-parent = <&mpic>; - }; - - memory-controller@2000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x2000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - memory-controller@6000 { - compatible = "fsl,mpc8572-memory-controller"; - reg = <0x6000 0x1000>; - interrupt-parent = <&mpic>; - interrupts = <18 2>; - }; - - L2: l2-cache-controller@20000 { - compatible = "fsl,mpc8572-l2-cache-controller"; - reg = <0x20000 0x1000>; - cache-line-size = <32>; // 32 bytes - cache-size = <0x100000>; // L2, 1M - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - - i2c@3000 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - - temp-sensor@48 { - compatible = "dallas,ds1631", "dallas,ds1621"; - reg = <0x48>; - }; - - temp-sensor@4c { - compatible = "adi,adt7461"; - reg = <0x4c>; - }; - - cpu-supervisor@51 { - compatible = "dallas,ds4510"; - reg = <0x51>; - }; - - eeprom@54 { - compatible = "atmel,at24c128b"; - reg = <0x54>; - }; - - rtc@68 { - compatible = "stm,m41t00", - "dallas,ds1338"; - reg = <0x68>; - }; - - pcie-switch@70 { - compatible = "plx,pex8518"; - reg = <0x70>; - }; - - gpio1: gpio@18 { - compatible = "nxp,pca9557"; - reg = <0x18>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio2: gpio@1c { - compatible = "nxp,pca9557"; - reg = <0x1c>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio3: gpio@1e { - compatible = "nxp,pca9557"; - reg = <0x1e>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - - gpio4: gpio@1f { - compatible = "nxp,pca9557"; - reg = <0x1f>; - #gpio-cells = <2>; - gpio-controller; - polarity = <0x00>; - }; - }; - - i2c@3100 { - #address-cells = <1>; - #size-cells = <0>; - cell-index = <1>; - compatible = "fsl-i2c"; - reg = <0x3100 0x100>; - interrupts = <43 2>; - interrupt-parent = <&mpic>; - dfsrr; - }; - - dma@c300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0xc300 0x4>; - ranges = <0x0 0xc100 0x200>; - cell-index = <1>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <76 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <77 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <78 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <79 2>; - }; - }; - - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; - reg = <0x21300 0x4>; - ranges = <0x0 0x21100 0x200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x0 0x80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <20 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x80 0x80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <21 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x100 0x80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <22 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8572-dma-channel", - "fsl,eloplus-dma-channel"; - reg = <0x180 0x80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <23 2>; - }; - }; - - /* eTSEC 1 */ - enet0: ethernet@24000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <0>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x24000 0x1000>; - ranges = <0x0 0x24000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <29 2 30 2 34 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi0>; - phy-handle = <&phy0>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x520 0x20>; - - phy0: ethernet-phy@1 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x1>; - }; - phy1: ethernet-phy@2 { - interrupt-parent = <&mpic>; - interrupts = <8 1>; - reg = <0x2>; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* eTSEC 2 */ - enet1: ethernet@25000 { - #address-cells = <1>; - #size-cells = <1>; - cell-index = <1>; - device_type = "network"; - model = "eTSEC"; - compatible = "gianfar"; - reg = <0x25000 0x1000>; - ranges = <0x0 0x25000 0x1000>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <35 2 36 2 40 2>; - interrupt-parent = <&mpic>; - tbi-handle = <&tbi1>; - phy-handle = <&phy1>; - phy-connection-type = "sgmii"; - - mdio@520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - }; - - /* UART0 */ - serial0: serial@4500 { - cell-index = <0>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4500 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - /* UART1 */ - serial1: serial@4600 { - cell-index = <1>; - device_type = "serial"; - compatible = "fsl,ns16550", "ns16550"; - reg = <0x4600 0x100>; - clock-frequency = <0>; - interrupts = <42 2>; - interrupt-parent = <&mpic>; - }; - - global-utilities@e0000 { //global utilities block - compatible = "fsl,mpc8572-guts"; - reg = <0xe0000 0x1000>; - fsl,has-rstcr; - }; - - msi@41600 { - compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; - reg = <0x41600 0x80>; - msi-available-ranges = <0 0x100>; - interrupts = < - 0xe0 0 - 0xe1 0 - 0xe2 0 - 0xe3 0 - 0xe4 0 - 0xe5 0 - 0xe6 0 - 0xe7 0>; - interrupt-parent = <&mpic>; - }; - - crypto@30000 { - compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", - "fsl,sec2.1", "fsl,sec2.0"; - reg = <0x30000 0x10000>; - interrupts = <45 2 58 2>; - interrupt-parent = <&mpic>; - fsl,num-channels = <4>; - fsl,channel-fifo-len = <24>; - fsl,exec-units-mask = <0x9fe>; - fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - mpic: pic@40000 { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <2>; - reg = <0x40000 0x40000>; - compatible = "chrp,open-pic"; - device_type = "open-pic"; - }; - - gpio0: gpio@f000 { - compatible = "fsl,mpc8572-gpio"; - reg = <0xf000 0x1000>; - interrupts = <47 2>; - interrupt-parent = <&mpic>; - #gpio-cells = <2>; - gpio-controller; - }; - - gpio-leds { - compatible = "gpio-leds"; - - heartbeat { - label = "Heartbeat"; - gpios = <&gpio0 4 1>; - linux,default-trigger = "heartbeat"; - }; - - yellow { - label = "Yellow"; - gpios = <&gpio0 5 1>; - }; - - red { - label = "Red"; - gpios = <&gpio0 6 1>; - }; - - green { - label = "Green"; - gpios = <&gpio0 7 1>; - }; - }; - - /* PME (pattern-matcher) */ - pme@10000 { - compatible = "fsl,mpc8572-pme", "pme8572"; - reg = <0x10000 0x5000>; - interrupts = <57 2 64 2 65 2 66 2 67 2>; - interrupt-parent = <&mpic>; - }; - - tlu@2f000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x2f000 0x1000>; - interupts = <61 2 >; - interrupt-parent = <&mpic>; - }; - - tlu@15000 { - compatible = "fsl,mpc8572-tlu", "fsl_tlu"; - reg = <0x15000 0x1000>; - interupts = <75 2>; - interrupt-parent = <&mpic>; - }; - }; - - /* - * PCI Express controller 3 @ ef008000 is not used. - * This would have been pci0 on other mpc85xx platforms. - */ - - /* PCI Express controller 2, wired to VPX P1,P2 backplane */ - pci1: pcie@ef009000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef009000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000 - 0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x00010000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <25 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x4 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x5 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x6 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x7 0x1 - >; - pcie@0 { - reg = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0xc0000000 - 0x2000000 0x0 0xc0000000 - 0x0 0x10000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; - - /* PCI Express controller 1, wired to PEX8518 PCIe switch */ - pci2: pcie@ef00a000 { - compatible = "fsl,mpc8548-pcie"; - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0 0xef00a000 0 0x1000>; - bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 - 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; - clock-frequency = <33333333>; - interrupt-parent = <&mpic>; - interrupts = <26 2>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - /* IDSEL 0x0 */ - 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 - 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 - 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 - 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 - >; - pcie@0 { - reg = <0x0 0x0 0x0 0x0 0x0>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - ranges = <0x2000000 0x0 0x80000000 - 0x2000000 0x0 0x80000000 - 0x0 0x40000000 - - 0x1000000 0x0 0x0 - 0x1000000 0x0 0x0 - 0x0 0x100000>; - }; - }; -}; diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/yosemite.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/yosemite.dts deleted file mode 100644 index 30bb4753..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/yosemite.dts +++ /dev/null @@ -1,332 +0,0 @@ -/* - * Device Tree Source for AMCC Yosemite - * - * Copyright 2008 IBM Corp. - * Josh Boyer <jwboyer@linux.vnet.ibm.com> - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <1>; - model = "amcc,yosemite"; - compatible = "amcc,yosemite"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - ethernet0 = &EMAC0; - ethernet1 = &EMAC1; - serial0 = &UART0; - serial1 = &UART1; - serial2 = &UART2; - serial3 = &UART3; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,440EP"; - reg = <0x00000000>; - clock-frequency = <0>; /* Filled in by zImage */ - timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - }; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ - }; - - UIC0: interrupt-controller0 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <0>; - dcr-reg = <0x0c0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - }; - - UIC1: interrupt-controller1 { - compatible = "ibm,uic-440ep","ibm,uic"; - interrupt-controller; - cell-index = <1>; - dcr-reg = <0x0d0 0x009>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ - interrupt-parent = <&UIC0>; - }; - - SDR0: sdr { - compatible = "ibm,sdr-440ep"; - dcr-reg = <0x00e 0x002>; - }; - - CPR0: cpr { - compatible = "ibm,cpr-440ep"; - dcr-reg = <0x00c 0x002>; - }; - - plb { - compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; - #address-cells = <2>; - #size-cells = <1>; - ranges; - clock-frequency = <0>; /* Filled in by zImage */ - - SDRAM0: sdram { - compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <0x010 0x002>; - }; - - DMA0: dma { - compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <0x100 0x027>; - }; - - MAL0: mcmal { - compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <0x180 0x062>; - num-tx-chans = <4>; - num-rx-chans = <2>; - interrupt-parent = <&MAL0>; - interrupts = <0x0 0x1 0x2 0x3 0x4>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 - /*RXEOB*/ 0x1 &UIC0 0xb 0x4 - /*SERR*/ 0x2 &UIC1 0x0 0x4 - /*TXDE*/ 0x3 &UIC1 0x1 0x4 - /*RXDE*/ 0x4 &UIC1 0x2 0x4>; - }; - - POB0: opb { - compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Bamboo is oddball in the 44x world and doesn't use the ERPN - * bits. - */ - ranges = <0x00000000 0x00000000 0x00000000 0x80000000 - 0x80000000 0x00000000 0x80000000 0x80000000>; - interrupt-parent = <&UIC1>; - interrupts = <0x7 0x4>; - clock-frequency = <0>; /* Filled in by zImage */ - - EBC0: ebc { - compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <0x012 0x002>; - #address-cells = <2>; - #size-cells = <1>; - clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <0x5 0x1>; - interrupt-parent = <&UIC1>; - - nor_flash@0,0 { - compatible = "amd,s29gl256n", "cfi-flash"; - bank-width = <2>; - reg = <0x00000000 0x00000000 0x04000000>; - #address-cells = <1>; - #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0x00000000 0x001e0000>; - }; - partition@1e0000 { - label = "dtb"; - reg = <0x001e0000 0x00020000>; - }; - partition@200000 { - label = "ramdisk"; - reg = <0x00200000 0x01400000>; - }; - partition@1600000 { - label = "jffs2"; - reg = <0x01600000 0x00400000>; - }; - partition@1a00000 { - label = "user"; - reg = <0x01a00000 0x02540000>; - }; - partition@3f40000 { - label = "env"; - reg = <0x03f40000 0x00040000>; - }; - partition@3f80000 { - label = "u-boot"; - reg = <0x03f80000 0x00080000>; - }; - }; - }; - - UART0: serial@ef600300 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600300 0x00000008>; - virtual-reg = <0xef600300>; - clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <115200>; - interrupt-parent = <&UIC0>; - interrupts = <0x0 0x4>; - }; - - UART1: serial@ef600400 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600400 0x00000008>; - virtual-reg = <0xef600400>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x1 0x4>; - }; - - UART2: serial@ef600500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600500 0x00000008>; - virtual-reg = <0xef600500>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x3 0x4>; - status = "disabled"; - }; - - UART3: serial@ef600600 { - device_type = "serial"; - compatible = "ns16550"; - reg = <0xef600600 0x00000008>; - virtual-reg = <0xef600600>; - clock-frequency = <0>; - current-speed = <0>; - interrupt-parent = <&UIC0>; - interrupts = <0x4 0x4>; - status = "disabled"; - }; - - IIC0: i2c@ef600700 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = <0xef600700 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x2 0x4>; - }; - - IIC1: i2c@ef600800 { - compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = <0xef600800 0x00000014>; - interrupt-parent = <&UIC0>; - interrupts = <0x7 0x4>; - }; - - spi@ef600900 { - compatible = "amcc,spi-440ep"; - reg = <0xef600900 0x00000006>; - interrupts = <0x8 0x4>; - interrupt-parent = <&UIC0>; - }; - - ZMII0: emac-zmii@ef600d00 { - compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = <0xef600d00 0x0000000c>; - }; - - EMAC0: ethernet@ef600e00 { - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1c 0x4 0x1d 0x4>; - reg = <0xef600e00 0x00000070>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <0 1>; - mal-rx-channel = <0>; - cell-index = <0>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <0>; - }; - - EMAC1: ethernet@ef600f00 { - device_type = "network"; - compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; - interrupt-parent = <&UIC1>; - interrupts = <0x1e 0x4 0x1f 0x4>; - reg = <0xef600f00 0x00000070>; - local-mac-address = [000000000000]; - mal-device = <&MAL0>; - mal-tx-channel = <2 3>; - mal-rx-channel = <1>; - cell-index = <1>; - max-frame-size = <1500>; - rx-fifo-size = <4096>; - tx-fifo-size = <2048>; - phy-mode = "rmii"; - phy-map = <0x00000000>; - zmii-device = <&ZMII0>; - zmii-channel = <1>; - }; - - usb@ef601000 { - compatible = "ohci-be"; - reg = <0xef601000 0x00000080>; - interrupts = <0x8 0x4 0x9 0x4>; - interrupt-parent = < &UIC1 >; - }; - }; - - PCI0: pci@ec000000 { - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; - primary; - reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ - 0x00000000 0xeed00000 0x00000004 /* IACK */ - 0x00000000 0xeed00000 0x00000004 /* Special cycle */ - 0x00000000 0xef400000 0x00000040>; /* Internal registers */ - - /* Outbound ranges, one memory and one IO, - * later cannot be changed. Chip supports a second - * IO range but we don't use it for now - */ - ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 - 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; - - /* Inbound 2GB range starting at 0 */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - - interrupt-map-mask = <0xf800 0x0 0x0 0x0>; - interrupt-map = < - /* IDSEL 12 */ - 0x6000 0x0 0x0 0x0 &UIC0 0x19 0x8 - >; - }; - }; - - chosen { - linux,stdout-path = "/plb/opb/serial@ef600300"; - }; -}; |