diff options
Diffstat (limited to 'ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts')
-rw-r--r-- | ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts | 237 |
1 files changed, 0 insertions, 237 deletions
diff --git a/ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts b/ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts deleted file mode 100644 index b801dd06..00000000 --- a/ANDROID_3.4.5/arch/powerpc/boot/dts/currituck.dts +++ /dev/null @@ -1,237 +0,0 @@ -/* - * Device Tree Source for IBM Embedded PPC 476 Platform - * - * Copyright © 2011 Tony Breeds IBM Corporation - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - */ - -/dts-v1/; - -/memreserve/ 0x01f00000 0x00100000; // spin table - -/ { - #address-cells = <2>; - #size-cells = <2>; - model = "ibm,currituck"; - compatible = "ibm,currituck"; - dcr-parent = <&{/cpus/cpu@0}>; - - aliases { - serial0 = &UART0; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - model = "PowerPC,476"; - reg = <0>; - clock-frequency = <1600000000>; // 1.6 GHz - timebase-frequency = <100000000>; // 100Mhz - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "ok"; - }; - cpu@1 { - device_type = "cpu"; - model = "PowerPC,476"; - reg = <1>; - clock-frequency = <1600000000>; // 1.6 GHz - timebase-frequency = <100000000>; // 100Mhz - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <32768>; - d-cache-size = <32768>; - dcr-controller; - dcr-access-method = "native"; - status = "disabled"; - enable-method = "spin-table"; - cpu-release-addr = <0x0 0x01f00000>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; // filled in by zImage - }; - - MPIC: interrupt-controller { - compatible = "chrp,open-pic"; - interrupt-controller; - dcr-reg = <0xffc00000 0x00040000>; - #address-cells = <0>; - #size-cells = <0>; - #interrupt-cells = <2>; - - }; - - plb { - compatible = "ibm,plb6"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - clock-frequency = <200000000>; // 200Mhz - - POB0: opb { - compatible = "ibm,opb-4xx", "ibm,opb"; - #address-cells = <1>; - #size-cells = <1>; - /* Wish there was a nicer way of specifying a full - * 32-bit range - */ - ranges = <0x00000000 0x00000200 0x00000000 0x80000000 - 0x80000000 0x00000200 0x80000000 0x80000000>; - clock-frequency = <100000000>; - - UART0: serial@10000000 { - device_type = "serial"; - compatible = "ns16750", "ns16550"; - reg = <0x10000000 0x00000008>; - virtual-reg = <0xe1000000>; - clock-frequency = <1851851>; // PCIe refclk/MCGC0_CTL[UART] - current-speed = <115200>; - interrupt-parent = <&MPIC>; - interrupts = <34 2>; - }; - - IIC0: i2c@00000000 { - compatible = "ibm,iic-currituck", "ibm,iic"; - reg = <0x0 0x00000014>; - interrupt-parent = <&MPIC>; - interrupts = <79 2>; - #address-cells = <1>; - #size-cells = <0>; - rtc@68 { - compatible = "stm,m41t80", "m41st85"; - reg = <0x68>; - }; - }; - }; - - PCIE0: pciex@10100000000 { // 4xGBIF1 - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; - primary; - port = <0x0>; /* port number */ - reg = <0x00000101 0x00000000 0x0 0x10000000 /* Config space access */ - 0x00000100 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ - dcr-reg = <0x80 0x20>; - -// pci_space < pci_addr > < cpu_addr > < size > - ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000 - 0x01000000 0x0 0x0 0x00000140 0x0 0x0 0x00010000>; - - /* Inbound starting at 0 to memsize filled in by zImage */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &MPIC 46 0x2 /* int A */ - 0x0 0x0 0x0 0x2 &MPIC 47 0x2 /* int B */ - 0x0 0x0 0x0 0x3 &MPIC 48 0x2 /* int C */ - 0x0 0x0 0x0 0x4 &MPIC 49 0x2 /* int D */>; - }; - - PCIE1: pciex@30100000000 { // 4xGBIF0 - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; - primary; - port = <0x1>; /* port number */ - reg = <0x00000301 0x00000000 0x0 0x10000000 /* Config space access */ - 0x00000300 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ - dcr-reg = <0x60 0x20>; - - ranges = <0x02000000 0x00000000 0x80000000 0x00000310 0x80000000 0x0 0x80000000 - 0x01000000 0x0 0x0 0x00000340 0x0 0x0 0x00010000>; - - /* Inbound starting at 0 to memsize filled in by zImage */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &MPIC 38 0x2 /* int A */ - 0x0 0x0 0x0 0x2 &MPIC 39 0x2 /* int B */ - 0x0 0x0 0x0 0x3 &MPIC 40 0x2 /* int C */ - 0x0 0x0 0x0 0x4 &MPIC 41 0x2 /* int D */>; - }; - - PCIE2: pciex@38100000000 { // 2xGBIF0 - device_type = "pci"; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex"; - primary; - port = <0x2>; /* port number */ - reg = <0x00000381 0x00000000 0x0 0x10000000 /* Config space access */ - 0x00000380 0x00000000 0x0 0x00001000>; /* UTL Registers space access */ - dcr-reg = <0xA0 0x20>; - - ranges = <0x02000000 0x00000000 0x80000000 0x00000390 0x80000000 0x0 0x80000000 - 0x01000000 0x0 0x0 0x000003C0 0x0 0x0 0x00010000>; - - /* Inbound starting at 0 to memsize filled in by zImage */ - dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>; - - /* This drives busses 0 to 0xf */ - bus-range = <0x0 0xf>; - - /* Legacy interrupts (note the weird polarity, the bridge seems - * to invert PCIe legacy interrupts). - * We are de-swizzling here because the numbers are actually for - * port of the root complex virtual P2P bridge. But I want - * to avoid putting a node for it in the tree, so the numbers - * below are basically de-swizzled numbers. - * The real slot is on idsel 0, so the swizzling is 1:1 - */ - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = < - 0x0 0x0 0x0 0x1 &MPIC 54 0x2 /* int A */ - 0x0 0x0 0x0 0x2 &MPIC 55 0x2 /* int B */ - 0x0 0x0 0x0 0x3 &MPIC 56 0x2 /* int C */ - 0x0 0x0 0x0 0x4 &MPIC 57 0x2 /* int D */>; - }; - - }; - - chosen { - linux,stdout-path = &UART0; - }; -}; |