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AgeCommit message (Expand)Author
2019-12-18debug statementsrahulp13
2019-12-09Merge pull request #34 from rahulp13/masterRahul P
2019-12-04up counter examplerahulp13
2019-12-04trialrahulp13
2019-11-28Merge pull request #33 from saurabhb17/mastersaurabhb17
2019-11-28VHDL codes for PWMsaurabhb17
2019-11-27Merge pull request #32 from rahulp13/masterRahul P
2019-11-27update installer (#31)Rahul P
2019-11-27update installerrahulp13
2019-11-26update installerrahulp13
2019-11-22Merge pull request #30 from rahulp13/masterRahul P
2019-11-22removed stop-time for modelsrahulp13
2019-11-22update readmerahulp13
2019-11-19Update readme.mdRahul P
2019-11-19updated readmerahul
2019-11-19Merge pull request #29 from rahulp13/masterRahul P
2019-11-19Delete readme.mdRahul P
2019-11-13enabled successive uploadsrahul
2019-11-11socket dont-route & reuse-port, close prev-sock to reuse itrahul
2019-11-11modified cfuncrahul
2019-11-08close client socket at that instancerahul
2019-10-24display error on QMessageBoxrahul
2019-10-24changed library name and pathrahul
2019-10-24added uninstaller optionrahul
2019-10-24removed trial_xor examplerahul
2019-10-22Multiple models for each instancerahul
2019-10-22Examplesrahul
2019-10-15blocking socketrahul
2019-10-15Support for Ngspice-31rahul
2019-10-15Support for Ngspice-31rahul
2019-10-03multiple sockets through poll()rahul
2019-10-01documentedrahul
2019-09-27adjusted layoutrahul
2019-09-26multiple instances (static ip)rahul
2019-09-26multiple instances (static ip)rahul
2019-09-18support for multiple ghdl modelsfossee
2019-09-03earlier ngpsice uninstallfossee
2019-09-03added ghdl installationfossee
2019-09-03ghdl setup modifiedfossee
2019-09-03added examples and modified serverfossee
2019-09-01Add files via uploadRahul P
2019-09-01Add files via uploadRahul P
2019-07-10structural styleRahul Paknikar
2019-07-07std_logicRahul Paknikar
2019-07-07std_logic_vectorRahul Paknikar
2019-07-07std_logic_vectorRahul Paknikar
2019-07-07std_logic with std_logic_vectorRahul Paknikar
2019-07-07Update and rename full_adder.vhdl to full_adder_slv.vhdlRahul Paknikar
2019-07-07solved infinite loop, greater buffer sizeRahul Paknikar
2019-07-07Std_LogicRahul Paknikar
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