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path: root/usrp2/fpga/eth/rtl/verilog/flow_ctrl_rx.v
AgeCommit message (Expand)Author
2009-04-02Fix for fifo overruns on eth rx in full duplex. Now send re-pause long befor...matt
2008-09-08Merged r9433:9527 from features/gr-usrp2 into trunk. Adds usrp2 and gr-usrp2...jcorgan