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path: root/usrp/fpga/sdr_lib
AgeCommit message (Expand)Author
2008-09-02Allows for changing the interpolation rate dynamically. Stop the pipeline, s...matt
2007-11-10Restores 8-bit sample format support to FPGA code. Synthesized with 7.1SP1.jcorgan
2007-11-01Merged r6766:6775 from jcorgan/t195. Fixes ticket:195. NOTE: this removes 8...jcorgan
2007-11-01Merged r6749:6763 from jcorgan/t179. Fixes ticket:179. New RBFs synthesized...jcorgan
2007-07-12Merged r5732:5941 from jcorgan/sar into trunk. Adds start of gr-radar-mono c...jcorgan
2007-05-30not usedmatt
2007-05-02Merged r5203:5204 from developer branch jcorgan/atr. Fixed ATR delay enable a...jcorgan
2007-04-16Adds capability to independently delay the Auto T/R switching signaljcorgan
2007-03-30registered to meet timingmatt
2007-03-20proper shifting for the cic decim now keeps signals roughly leveledmatt
2007-03-20if you ever tried to interpolate by 44 it didn't work. now it does.matt
2007-03-20removed a parametermatt
2007-03-20allow for varying the bitwidthmatt
2007-03-20added commentmatt
2007-03-20added comments, removed dead codematt
2007-03-05Refactored FPGA *.vh files. Moved common pieces to toplevel/include.eb
2007-01-17Applied patch from Brett Trotter that stuffs zeros into the head ofeb
2007-01-14removed unused/out-of-date bus_interface.veb
2006-11-01optimized halfband coefficients, courtesy of Larry Doolittlematt
2006-09-13Updated FSF address in all files. Fixes ticket:51eb
2006-08-03Houston, we have a trunk.jcorgan
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