Merged SVN matt/new_eth r10782:11633 into new_eth

* svn diff http://gnuradio.org/svn/branches/developers/matt/new_eth
  -r10782:11633

* Patch applied with no conflicts or fuzz.

5 files changed, 46 insertions, 77 deletions

diff --git a/usrp2/firmware/apps/gen_eth_packets.c b/usrp2/firmware/apps/gen_eth_packets.c
index ce1e8160b..b81f60dac 100644
--- a/usrp2/firmware/apps/gen_eth_packets.c
+++ b/usrp2/firmware/apps/gen_eth_packets.c
@@ -141,11 +141,12 @@ main(void)
   ethernet_register_link_changed_callback(link_changed_callback);
   ethernet_init();
 
+  /*
   if (hwconfig_simulation_p()){
     eth_mac->speed = 4;	// hardcode mac speed to 1000
     link_is_up = true;
   }
-
+  */
   // fire off a receive from the ethernet
   bp_receive_to_buf(CPU_RX_BUF, PORT_ETH, 1, 0, BP_LAST_LINE);
 
diff --git a/usrp2/firmware/apps/txrx.c b/usrp2/firmware/apps/txrx.c
index 730ee66c5..935e62a72 100644
--- a/usrp2/firmware/apps/txrx.c
+++ b/usrp2/firmware/apps/txrx.c
@@ -257,12 +257,14 @@ main(void)
 {
   u2_init();
 
-  putstr("\nTxRx\n");
+  putstr("\nTxRx-NEWETH\n");
   print_mac_addr(ethernet_mac_addr()->addr);
   newline();
 
   ethernet_register_link_changed_callback(link_changed_callback);
+  putstr("Before ethernet_init()\n");
   ethernet_init();
+  putstr("After ethernet_init()\n");
 
 
 #if 0
diff --git a/usrp2/firmware/lib/eth_mac.c b/usrp2/firmware/lib/eth_mac.c
index 5fadaf40b..41690af95 100644
--- a/usrp2/firmware/lib/eth_mac.c
+++ b/usrp2/firmware/lib/eth_mac.c
@@ -21,7 +21,7 @@
 #include "bool.h"
 #include "eth_phy.h"	// for simulation constants
 #include "mdelay.h"
-
+#include "stdio.h"
 
 #define PHY_ADDR 1
 
@@ -29,7 +29,11 @@ void
 eth_mac_set_addr(const u2_mac_addr_t *src)
 {
   int i;
-
+  eth_mac->ucast_hi = ((unsigned int)src->addr[0])<<8 + ((unsigned int)src->addr[1]);
+  eth_mac->ucast_lo = ((unsigned int)src->addr[2])<<24 + ((unsigned int)src->addr[3])<<16 +
+    ((unsigned int)src->addr[4])<<8 +((unsigned int)src->addr[5]);
+  
+  /*
   // tell mac our source address and enable automatic insertion on Tx.
   eth_mac->mac_tx_add_prom_wr = 0;	// just in case
   for (i = 0; i < 6; i++){
@@ -53,6 +57,8 @@ eth_mac_set_addr(const u2_mac_addr_t *src)
     mdelay(1);
   }
   // eth_mac->mac_rx_add_chk_en = 1;  // FIXME enable when everything's working
+
+  */
 }
 
 
@@ -62,14 +68,14 @@ eth_mac_init(const u2_mac_addr_t *src)
   eth_mac->miimoder = 25;	// divider from CPU clock (50MHz/25 = 2MHz)
 
   eth_mac_set_addr(src);
-
+  eth_mac->settings = 0x39; 
   // set rx flow control high and low water marks
   // unsigned int lwmark = (2*2048 + 64)/4; // 2 * 2048-byte frames + 1 * 64-byte pause frame
   // eth_mac->fc_hwmark = lwmark + 2048/4;  // plus a 2048-byte frame
 
-  eth_mac->fc_lwmark = 600;		// there are currently 2047 lines in the fifo
-  eth_mac->fc_hwmark = 1200;
-  eth_mac->fc_padtime = 1700;           // how long before flow control runs out do we 
+  //  eth_mac->fc_lwmark = 600;		// there are currently 2047 lines in the fifo
+  // eth_mac->fc_hwmark = 1200;
+  //eth_mac->fc_padtime = 1700;           // how long before flow control runs out do we 
                                         // request a re-pause.  Units of 8ns (bytes)
 
   //eth_mac->tx_pause_en = 0;		// pay attn to pause frames sent to us
@@ -80,8 +86,8 @@ eth_mac_init(const u2_mac_addr_t *src)
 int
 eth_mac_read_rmon(int addr)
 {
-  int t;
-  
+  int t = 0;
+  /*  
   eth_mac->rmon_rd_addr = addr;
   eth_mac->rmon_rd_apply = 1;
   while(eth_mac->rmon_rd_grant == 0)
@@ -89,6 +95,7 @@ eth_mac_read_rmon(int addr)
 
   t = eth_mac->rmon_rd_dout;
   eth_mac->rmon_rd_apply = 0;
+  */
   return t;
 }
 
@@ -111,6 +118,7 @@ eth_mac_miim_read(int addr)
   while((eth_mac->miistatus & MIIS_BUSY) != 0)
     ;
 
+  printf("MIIM-READ ADDR %d DATA %d\n",addr, eth_mac->miirx_data);
   return eth_mac->miirx_data;
 }
 
@@ -122,6 +130,7 @@ eth_mac_miim_write(int addr, int value)
   eth_mac->miitx_data = value;
   eth_mac->miicommand = MIIC_WCTRLDATA;
 
+  printf("MIIM-WRITE ADDR %d VAL %d\n",addr,value);
   while((eth_mac->miistatus & MIIS_BUSY) != 0)
     ;
 }
diff --git a/usrp2/firmware/lib/eth_mac_regs.h b/usrp2/firmware/lib/eth_mac_regs.h
index 8daab937d..3c866e471 100644
--- a/usrp2/firmware/lib/eth_mac_regs.h
+++ b/usrp2/firmware/lib/eth_mac_regs.h
@@ -20,68 +20,21 @@
 #define INCLUDED_ETH_MAC_REGS_H
 
 /*
- * See opencores.org 10_100_1000 Mbps Tri-mode Ethernet MAC Specification
+ * Simple GEMAC
  *
- * In reality, these are 16-bit regs, but are assigned
- * on 32-bit boundaries.  Because we're little endian,
- * declaring them "int" works.
  */
 typedef struct {
-  volatile int	tx_hwmark;
-  volatile int	tx_lwmark;
-
-  //! if set, send pause frames automatically
-  volatile int	pause_frame_send_en;
-
-  //! quanta value for pause frame in units of 512 bit times.
-  volatile int	pause_quanta_set;
-
-  volatile int	ifg_set;
-  volatile int	full_duplex;
-  volatile int	max_retry;
-  volatile int	mac_tx_add_en;
-  volatile int	mac_tx_add_prom_data;
-  volatile int	mac_tx_add_prom_add;
-  volatile int	mac_tx_add_prom_wr;
-
-  //! if set, other end can pause us (i.e., we pay attention to pause frames)
-  volatile int	tx_pause_en;
-
-  // Flow Control high and low water marks
-  //! when space available (in 32-bit lines) > hwmark, send un-pause frame
-  volatile int	fc_hwmark;	
-
-  //! when space avail (in 32-bit lines) < lwmark, send pause frame
-  volatile int	fc_lwmark;	
-
-  volatile int	mac_rx_add_chk_en;
-  volatile int	mac_rx_add_prom_data;
-  volatile int	mac_rx_add_prom_add;
-  volatile int	mac_rx_add_prom_wr;
-  volatile int	broadcast_filter_en;
-  volatile int	broadcast_bucket_depth;
-  volatile int	broadcast_bucket_interval;
-  volatile int	rx_append_crc;
-  volatile int	rx_hwmark;
-  volatile int	rx_lwmark;
-  volatile int	crc_chk_en;
-  volatile int	rx_ifg_set;
-  volatile int	rx_max_length;
-  volatile int	rx_min_length;
-  volatile int	rmon_rd_addr;		// performance counter access
-  volatile int	rmon_rd_apply;		
-  volatile int	rmon_rd_grant;		// READONLY
-  volatile int	rmon_rd_dout;	        // READONLY
-  volatile int	dummy;	// READONLY
-  volatile int	line_loop_en;
-  volatile int	speed;
-  volatile int	miimoder;
-  volatile int	miicommand;
-  volatile int	miiaddress;
-  volatile int	miitx_data;
-  volatile int	miirx_data;
-  volatile int	miistatus;
-  volatile int	fc_padtime;
+  volatile int settings;
+  volatile int ucast_hi;
+  volatile int ucast_lo;
+  volatile int mcast_hi;
+  volatile int mcast_lo;
+  volatile int miimoder;
+  volatile int miiaddress;
+  volatile int miitx_data;
+  volatile int miicommand;
+  volatile int miistatus;
+  volatile int miirx_data;
 } eth_mac_regs_t;
 
 // miicommand register
diff --git a/usrp2/firmware/lib/ethernet.c b/usrp2/firmware/lib/ethernet.c
index d19287044..32d2e39bd 100644
--- a/usrp2/firmware/lib/ethernet.c
+++ b/usrp2/firmware/lib/ethernet.c
@@ -43,6 +43,8 @@ ethernet_register_link_changed_callback(ethernet_link_changed_callback_t new_cal
 static void
 ed_set_mac_speed(int speed)
 {
+  printf("Speed set to %d\n",speed);
+  /*
   switch(speed){
   case 10:
     eth_mac->speed = 1;
@@ -56,6 +58,7 @@ ed_set_mac_speed(int speed)
   default:
     break;
   }
+  */
 }
 
 static void
@@ -196,17 +199,17 @@ ethernet_init(void)
   ed_state.link_speed = S_UNKNOWN;
 
   // initialize MAC registers
-  eth_mac->tx_hwmark = 0x1e;
-  eth_mac->tx_lwmark = 0x19;
+  //  eth_mac->tx_hwmark = 0x1e;
+  //eth_mac->tx_lwmark = 0x19;
 
-  eth_mac->crc_chk_en = 1;
-  eth_mac->rx_max_length = 2048;
+  //eth_mac->crc_chk_en = 1;
+  //eth_mac->rx_max_length = 2048;
 
   // configure PAUSE frame stuff
-  eth_mac->tx_pause_en = 1;		// pay attn to pause frames sent to us
+  //eth_mac->tx_pause_en = 1;		// pay attn to pause frames sent to us
 
-  eth_mac->pause_quanta_set = 38;	// a bit more than 1 max frame 16kb/512 + fudge
-  eth_mac->pause_frame_send_en = 1;	// enable sending pause frames
+  //eth_mac->pause_quanta_set = 38;	// a bit more than 1 max frame 16kb/512 + fudge
+  //eth_mac->pause_frame_send_en = 1;	// enable sending pause frames
 
 
   // setup PHY to interrupt on changes
@@ -322,6 +325,7 @@ ethernet_check_errors(void)
   // these registers are reset when read
   
   int	r = 0;
+  /*
   if (eth_mac_read_rmon(0x05) != 0)
     r |= RME_RX_CRC;
   if (eth_mac_read_rmon(0x06) != 0)
@@ -335,6 +339,6 @@ ethernet_check_errors(void)
     r |= RME_TX_FIFO_UNDER;
   if (eth_mac_read_rmon(0x27) != 0)
     r |= RME_TX_FIFO_OVER;
-
+  */
   return r;
 }