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authormatt2006-08-16 03:49:35 +0000
committermatt2006-08-16 03:49:35 +0000
commit91387b113c5fce022b74c85569c6f10fdf53b6f3 (patch)
tree48afc9264f4b5c786b34c7d7ce13ee99295e6d50 /usrp-hw/sym/generated/ep2c20-f484-IO7.src
parentef5fd2df34e16a56c664d0ffeb04d1c0b426950f (diff)
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first checkin of usrp-hw
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@3293 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'usrp-hw/sym/generated/ep2c20-f484-IO7.src')
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diff --git a/usrp-hw/sym/generated/ep2c20-f484-IO7.src b/usrp-hw/sym/generated/ep2c20-f484-IO7.src
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+# This is the template file for creating symbols with tragesym
+# every line starting with '#' is a comment line.
+
+[options]
+# rotate_labels rotates the pintext of top and bottom pins
+# wordswap swaps labels if the pin is on the right side an looks like this:
+# "PB1 (CLK)"
+wordswap=yes
+rotate_labels=yes
+sort_labels=no
+generate_pinseq=yes
+sym_width=2800
+pinwidthvertikal=400
+pinwidthhorizontal=400
+
+[geda_attr]
+# name will be printed in the top of the symbol
+# if you have a device with slots, you'll have to use slot= and slotdef=
+# use comment= if there are special information you want to add
+version=20030525
+name=EP2C20-F484-IO7
+device=EP2C20-F484
+refdes=U?
+footprint=FG484
+description=EP2C20 Cyclone II FPGA
+documentation=http://www.altera.com
+author=mettus
+numslots=0
+#slot=1
+#slotdef=1:
+#slotdef=2:
+#slotdef=3:
+#slotdef=4:
+#comment=
+#comment=
+#comment=
+
+[pins]
+# tabseparated list of pin descriptions
+# pinnr is the physical number of the pin
+# seq is the pinseq= attribute, leave it blank if it doesn't matter
+# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
+# style can be (line,dot,clk,dotclk,none). none if only want to add a net
+# posit. can be (l,r,t,b) or empty for nets
+# net specifies the name of the Vcc or GND name
+# label represents the pinlabel.
+# negation lines can be added with _Q_
+# if you want to add a "_" or "\" use "\_" and "\\" as escape sequences
+#-----------------------------------------------------
+#pinnr seq type style posit. net label
+#-----------------------------------------------------
+W12 clk clk r CLK13/LVDSCLK6P
+V12 clk clk r CLK12/_LVDSCLK6N_
+AB12 io line l IO/LVDS108P
+AA12 io line l IO/_LVDS108N_
+AB13 io line l IO/LVDS107P
+AA13 io line l IO/_LVDS107N_
+T12 io line l IO/LVDS106P
+U13 io line l IO/_LVDS106N_
+Y13 io line l IO/VREFB7N1
+R12 io line l IO
+AB14 io line l IO/LVDS105P
+AA14 io line l IO/_LVDS105N_
+AB15 io line l IO/LVDS104P
+AA15 io line l IO/_LVDS104N_
+AB16 io line l IO/LVDS103P
+AA16 io line l IO/_LVDS103N_
+W14 io line l IO/LVDS102P
+V14 io line l IO/_LVDS102N_
+AB17 io line l IO/LVDS101P
+AA17 io line l IO/_LVDS101N_
+R13 io line l IO
+U14 io line l IO/LVDS100P
+T15 io line l IO/_LVDS100N_
+Y14 io line l IO/LVDS99P
+W15 io line l IO/_LVDS99N_
+R14 io line l IO/LVDS98P
+R15 io line l IO/_LVDS98N_
+AB18 io line l IO/LVDS97P
+AA18 io line l IO/_LVDS97N_
+Y16 io line l IO/VREFB7N0