more initial checkins

git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@3294 221aa14e-8319-0410-a670-987f0aec2ac5

7 files changed, 5133 insertions, 0 deletions

diff --git a/usrp-hw/dbsrx/ChangeLog b/usrp-hw/dbsrx/ChangeLog
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/usrp-hw/dbsrx/ChangeLog
diff --git a/usrp-hw/dbsrx/dbsrx.pcb b/usrp-hw/dbsrx/dbsrx.pcb
new file mode 100644
index 000000000..8265a6604
--- /dev/null
+++ b/usrp-hw/dbsrx/dbsrx.pcb
@@ -0,0 +1,3430 @@
+# release: pcb-bin 1.99q
+# date:    Mon Dec 12 15:52:53 2005
+# user:    matt (Matt Ettus)
+# host:    localhost.localdomain
+
+PCB["RX Daughterboard" 275000 250000]
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+	SymbolLine[1000 2000 1500 2500 800]
+	SymbolLine[1500 2500 2000 2500 800]
+	SymbolLine[2000 2500 2500 2000 800]
+)
+Via[15000 235000 13200 2000 11000 12800 "" "hole,lock"]
+Via[260000 235000 13200 2000 11000 12800 "" "hole,lock"]
+Via[260000 15000 13200 2000 11000 12800 "" "hole,lock"]
+Via[55000 55000 13200 2000 11000 12800 "" "hole,lock"]
+Via[163000 83500 5999 1998 0 3499 "" "thermal(1)"]
+Via[88000 115000 5999 1998 0 3499 "" "thermal(1)"]
+Via[88000 89000 5999 1998 0 3499 "" "thermal(1)"]
+Via[58500 100500 3499 1596 0 1497 "" "thermal(1)"]
+Via[44000 85000 3499 1596 0 1497 "" "thermal(1)"]
+Via[177000 135500 3599 1596 0 1798 "" ""]
+Via[59000 94000 3499 1596 0 1497 "" ""]
+Via[127500 123000 3499 1596 0 1497 "" ""]
+Via[73000 90500 3499 1596 0 1497 "" ""]
+Via[109000 123000 3499 1596 0 1497 "" ""]
+Via[64500 113000 3499 1596 0 1497 "" ""]
+Via[131500 126000 3499 1596 0 1497 "" ""]
+Via[40000 107000 3499 1596 0 1497 "" ""]
+Via[132500 145000 5999 1998 0 3499 "" "thermal(1)"]
+Via[225000 115000 5999 1996 0 3499 "" "thermal(1)"]
+Via[253500 142000 5999 1996 0 3499 "" "thermal(1)"]
+Via[232000 106000 5999 1998 0 3499 "" "thermal(1)"]
+Via[168500 181000 3599 1596 0 1798 "" ""]
+Via[172500 186500 3599 1596 0 1798 "" ""]
+Via[268000 49500 5999 1996 0 3499 "" "thermal(1)"]
+Via[254500 47000 5999 1996 0 3499 "" "thermal(1)"]
+Via[232500 40000 5999 1998 0 3499 "" "thermal(1)"]
+Via[208000 196500 3599 1596 0 1798 "" "thermal(1)"]
+Via[216500 45000 3599 1596 0 1798 "" "thermal(1)"]
+Via[244000 50500 3599 1596 0 1798 "" ""]
+Via[210000 55500 3599 1596 0 1798 "" ""]
+Via[178000 123500 5999 1998 0 3499 "" ""]
+Via[140000 159000 5999 1998 0 3499 "" ""]
+Via[178500 236000 5999 1998 0 3499 "" "thermal(1)"]
+Via[145000 237000 5999 1998 0 3499 "" "thermal(1)"]
+Via[193500 38500 3599 1596 0 1798 "" ""]
+Via[170500 45000 3599 1596 0 1798 "" "thermal(1)"]
+Via[195000 139000 3599 1596 0 1798 "" "thermal(1)"]
+Via[127000 162000 3599 1596 0 1798 "" "thermal(1)"]
+Via[127000 167500 3599 1596 0 1798 "" "thermal(1)"]
+Via[194500 49500 3599 1596 0 1798 "" ""]
+Via[195000 34000 3599 1596 0 1798 "" ""]
+Via[130000 131500 5999 1996 0 3499 "" ""]
+Via[236000 78000 5999 1996 0 3499 "" ""]
+Via[199000 169000 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[156500 190000 3499 1598 0 1497 "" "thermal(1)"]
+Via[156500 164000 3499 1598 0 1497 "" "thermal(1)"]
+Via[223500 193500 3599 1596 0 1798 "" "thermal(1)"]
+Via[232000 183500 3599 1596 0 1798 "" "thermal(1)"]
+Via[184500 219500 3599 1596 0 1798 "" "thermal(1)"]
+Via[185000 204500 3599 1596 0 1798 "" "thermal(1)"]
+Via[175500 167000 3599 1596 0 1798 "" "usetherm,thermal(2)"]
+Via[217000 165000 3599 1596 0 1798 "" "usetherm,thermal(2)"]
+Via[187500 50000 3599 1596 0 1798 "" "usetherm,thermal(2)"]
+Via[212500 201500 3599 1596 0 1798 "" "usetherm,thermal(2)"]
+Via[174000 213500 3599 1596 0 1798 "" "usetherm,thermal(2)"]
+Via[180500 187500 3599 1596 0 1798 "" "usetherm,thermal(2)"]
+Via[241500 42500 5999 1998 0 3499 "" "usetherm,thermal(2)"]
+Via[264000 94500 5999 1996 0 3499 "" "usetherm,thermal(2)"]
+Via[195500 155500 3599 1596 0 1798 "" "usetherm,thermal(2)"]
+Via[188000 155500 3599 1596 0 1798 "" "usetherm,thermal(2)"]
+Via[264500 117000 5999 1996 0 3499 "" "usetherm,thermal(2)"]
+Via[139000 75000 3599 1596 0 1798 "" ""]
+Via[149000 67500 3599 1596 0 1798 "" ""]
+Via[208500 178500 3599 1596 0 1798 "" ""]
+Via[122500 120500 3499 1596 0 1497 "" ""]
+Via[141000 120000 3599 1596 0 1798 "" ""]
+Via[137500 126500 3599 1596 0 1798 "" ""]
+Via[143000 124500 3599 1596 0 1798 "" ""]
+Via[188500 139500 3599 1596 0 1798 "" ""]
+Via[211500 136500 3599 1596 0 1798 "" ""]
+Via[232000 150000 3599 1596 0 1798 "" ""]
+Via[228500 141000 3599 1596 0 1798 "" ""]
+Via[205500 145500 3599 1596 0 1798 "" ""]
+Via[239500 159500 3599 1596 0 1798 "" ""]
+Via[159500 136500 3599 1596 0 1798 "" ""]
+Via[159500 154000 3599 1596 0 1798 "" ""]
+Via[201000 86500 3599 1596 0 1798 "" "thermal(1)"]
+Via[189500 121500 3599 1596 0 1798 "" "thermal(1)"]
+Via[207500 191500 3599 1596 0 1798 "" "usetherm,thermal(2)"]
+Via[204500 159000 3599 1596 0 1798 "" "thermal(1)"]
+Via[188000 169000 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[188000 172500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[188000 176000 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[188000 179500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[191000 178000 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[191000 174500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[191000 170500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[193500 168500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[193500 172500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[194000 176500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[193500 180000 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[196500 178500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[199500 180000 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[199000 176500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[196500 174500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[199000 172500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[196000 170500 3099 1596 0 1497 "" "thermal(0,1)"]
+Via[150500 189000 3099 1596 0 1497 "" "thermal(1)"]
+Via[123000 174500 3099 1596 0 1497 "" "thermal(1)"]
+Via[111500 160500 3099 1596 0 1497 "" "thermal(1)"]
+Via[118500 160500 3099 1596 0 1497 "" "thermal(1)"]
+Via[122000 165500 3099 1596 0 1497 "" "thermal(1)"]
+Via[141000 185000 3099 1596 0 1497 "" "thermal(1)"]
+Via[147000 184000 3099 1596 0 1497 "" "thermal(1)"]
+Via[151500 185000 3099 1596 0 1497 "" "thermal(1)"]
+Via[136500 193000 3099 1596 0 1497 "" "thermal(1)"]
+Via[145500 191500 3099 1596 0 1497 "" "thermal(1)"]
+Via[140000 198500 3099 1596 0 1497 "" "thermal(1)"]
+Via[147000 199500 3099 1596 0 1497 "" "thermal(1)"]
+Via[154500 201000 3099 1596 0 1497 "" "thermal(1)"]
+Via[129500 174500 3099 1596 0 1497 "" "thermal(1)"]
+Via[115000 123500 3599 1596 0 1798 "" ""]
+Via[156000 52500 3599 1596 0 1798 "" ""]
+Via[147500 208000 5999 1996 0 3499 "" "thermal(2)"]
+
+Element["" "0603" "R6" "1K" 200500 38500 -12000 -7000 0 100 ""]
+(
+	Pad[-2400 -900 -2400 900 2400 3000 2400 "1" "1" "square"]
+	Pad[2400 -900 2400 900 2400 3000 2400 "2" "2" "square"]
+	ElementLine [-4200 -2700 4200 -2700 600]
+	ElementLine [4200 -2700 4200 2700 600]
+	ElementLine [-4200 2700 4200 2700 600]
+	ElementLine [-4200 -2700 -4200 2700 600]
+
+	)
+
+Element["onsolder" "0603" "C26" "100pF" 186500 82500 -5500 -15000 0 100 "auto"]
+(
+	Pad[2400 -900 2400 900 2400 3000 2400 "1" "1" "auto,square"]
+	Pad[-2400 -900 -2400 900 2400 3000 2400 "2" "2" "auto,square"]
+	ElementLine [-4200 -2700 4200 -2700 600]
+	ElementLine [-4200 -2700 -4200 2700 600]
+	ElementLine [-4200 2700 4200 2700 600]
+	ElementLine [4200 -2700 4200 2700 600]
+
+	)
+
+Element["" "0603" "R7" "1K" 209500 38500 5500 -2000 0 100 ""]
+(
+	Pad[-2400 -900 -2400 900 2400 3000 2400 "1" "1" "square"]
+	Pad[2400 -900 2400 900 2400 3000 2400 "2" "2" "square"]
+	ElementLine [-4200 -2700 4200 -2700 600]
+	ElementLine [4200 -2700 4200 2700 600]
+	ElementLine [-4200 2700 4200 2700 600]
+	ElementLine [-4200 -2700 -4200 2700 600]
+
+	)
+
+Element["" "0603" "C83" ".01uF" 201000 195500 -3500 18300 0 100 ""]
+(
+	Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"]
+	Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"]
+	ElementLine [-4200 2700 4200 2700 600]
+	ElementLine [-4200 -2700 -4200 2700 600]
+	ElementLine [-4200 -2700 4200 -2700 600]
+	ElementLine [4200 -2700 4200 2700 600]
+
+	)
+
+Element["onsolder" "0603" "R10" "50" 208500 75000 -4500 -22500 1 100 "auto"]
+(
+	Pad[-900 -2400 900 -2400 2400 3000 2400 "1" "1" "auto,square"]
+	Pad[-900 2400 900 2400 2400 3000 2400 "2" "2" "auto,square"]
+	ElementLine [-2700 -4200 -2700 4200 600]
+	ElementLine [-2700 4200 2700 4200 600]
+	ElementLine [2700 -4200 2700 4200 600]
+	ElementLine [-2700 -4200 2700 -4200 600]
+
+	)
+
+Element["onsolder" "0603" "R15" "50" 194000 75000 -700 -22500 1 100 "auto"]
+(
+	Pad[-900 -2400 900 -2400 2400 2000 3000 "1" "1" "auto,square"]
+	Pad[-900 2400 900 2400 2400 2000 3000 "2" "2" "auto,square"]
+	ElementLine [-2700 -4200 -2700 4200 600]
+	ElementLine [-2700 4200 2700 4200 600]
+	ElementLine [2700 -4200 2700 4200 600]
+	ElementLine [-2700 -4200 2700 -4200 600]
+
+	)
+
+Element["" "0603" "R19" "250,_0.1%" 181000 81000 -1500 6300 0 100 ""]
+(
+	Pad[-900 -2400 900 -2400 2400 2000 3000 "1" "1" "square"]
+	Pad[-900 2400 900 2400 2400 2000 3000 "2" "2" "square"]
+	ElementLine [2700 -4200 2700 4200 600]
+	ElementLine [-2700 4200 2700 4200 600]
+	ElementLine [-2700 -4200 -2700 4200 600]
+	ElementLine [-2700 -4200 2700 -4200 600]
+
+	)
+
+Element["" "0603" "R20" "250,_0.1%" 172500 81000 -11500 5800 0 100 ""]
+(
+	Pad[-900 -2400 900 -2400 2400 2000 3000 "1" "1" "square"]
+	Pad[-900 2400 900 2400 2400 2000 3000 "2" "2" "square"]
+	ElementLine [2700 -4200 2700 4200 600]
+	ElementLine [-2700 4200 2700 4200 600]
+	ElementLine [-2700 -4200 -2700 4200 600]
+	ElementLine [-2700 -4200 2700 -4200 600]
+
+	)
+
+Element["" "0603" "C59" "3300pF" 192000 201500 -5000 16800 0 100 ""]
+(
+	Pad[2400 -900 2400 900 2400 2000 3000 "1" "1" "square"]
+	Pad[-2400 -900 -2400 900 2400 2000 3000 "2" "2" "square"]
+	ElementLine [-4200 2700 4200 2700 600]
+	ElementLine [-4200 -2700 -4200 2700 600]
+	ElementLine [-4200 -2700 4200 -2700 600]
+	ElementLine [4200 -2700 4200 2700 600]
+
+	)
+
+Element["" "0603" "R9" "43.2" 159000 175500 -12500 -19500 0 100 ""]
+(
+	Pad[-2400 -900 -2400 900 2400 3000 2400 "1" "1" "square"]
+	Pad[2400 -900 2400 900 2400 3000 2400 "2" "2" "square"]
+	ElementLine [-4200 -2700 4200 -2700 600]
+	ElementLine [4200 -2700 4200 2700 600]
+	ElementLine [-4200 2700 4200 2700 600]
+	ElementLine [-4200 -2700 -4200 2700 600]
+
+	)
+
+Element["" "CONNECTOR-1-2" "J100" "unknown" 103500 225000 -5500 17000 0 100 ""]
+(
+	Pin[0 0 6000 3000 6600 4000 "1" "1" "square"]
+	Pin[0 10000 6000 3000 6600 4000 "2" "2" "thermal(1)"]
+	ElementLine [-5000 5000 5000 5000 1000]
+	ElementLine [-5000 -5000 -5000 5000 1000]
+	ElementLine [5000 -5000 5000 15000 2000]
+	ElementLine [-5000 15000 5000 15000 2000]
+	ElementLine [-5000 -5000 -5000 15000 2000]
+	ElementLine [-5000 -5000 5000 -5000 2000]
+
+	)
+
+Element["" "CONNECTOR-8-2" "J25" "unknown" 8000 24000 27700 9900 0 100 ""]
+(
+	Pin[0 0 6000 3000 6600 4000 "1" "1" "square,edge2"]
+	Pin[0 -10000 6000 3000 6600 4000 "2" "2" "edge2,thermal(1)"]
+	Pin[10000 0 6000 3000 6600 4000 "3" "3" "edge2"]
+	Pin[10000 -10000 6000 3000 6600 4000 "4" "4" "edge2,thermal(1)"]
+	Pin[20000 0 6000 3000 6600 4000 "5" "5" "edge2"]
+	Pin[20000 -10000 6000 3000 6600 4000 "6" "6" "edge2,thermal(1)"]
+	Pin[30000 0 6000 3000 6600 4000 "7" "7" "edge2"]
+	Pin[30000 -10000 6000 3000 6600 4000 "8" "8" "edge2,thermal(1)"]
+	Pin[40000 0 6000 3000 6600 4000 "9" "9" "edge2"]
+	Pin[40000 -10000 6000 3000 6600 4000 "10" "10" "edge2,thermal(1)"]
+	Pin[50000 0 6000 3000 6600 4000 "11" "11" "edge2"]
+	Pin[50000 -10000 6000 3000 6600 4000 "12" "12" "edge2,thermal(1)"]
+	Pin[60000 0 6000 3000 6600 4000 "13" "13" "edge2"]
+	Pin[60000 -10000 6000 3000 6600 4000 "14" "14" "edge2,thermal(1)"]
+	Pin[70000 0 6000 3000 6600 4000 "15" "15" "edge2"]
+	Pin[70000 -10000 6000 3000 6600 4000 "16" "16" "edge2,thermal(1)"]
+	ElementLine [-5000 -5000 5000 -5000 1000]
+	ElementLine [5000 -5000 5000 5000 1000]
+	ElementLine [-5000 -15000 -5000 5000 2000]
+	ElementLine [-5000 -15000 75000 -15000 2000]
+	ElementLine [75000 -15000 75000 5000 2000]
+	ElementLine [-5000 5000 75000 5000 2000]
+
+	)
+
+Element["onsolder,lock" "PMC-REVERSE" "J2" "unknown" 94993 95811 -18000 9000 0 100 "auto"]
+(
+	Pin[-6693 7189 7200 2000 7200 5800 "" "1" "hole,lock,edge2"]
+	Pin[128740 7189 7200 2000 7200 5800 "" "2" "hole,lock,edge2"]
+	Pad[0 9900 0 19000 2400 1000 3400 "" "1" "auto,lock,edge2"]
+	Pad[122047 -4622 122047 4478 2400 1000 3400 "" "64" "auto,lock"]
+	Pad[7874 9900 7874 19000 2400 1000 3400 "" "5" "auto,lock,edge2"]
+	Pad[3937 9900 3937 19000 2400 1000 3400 "" "3" "auto,lock,edge2"]
+	Pad[11811 9900 11811 19000 2400 1000 3400 "" "7" "auto,lock,edge2"]
+	Pad[0 -4622 0 4478 2400 1000 3400 "" "2" "auto,lock"]
+	Pad[15748 9900 15748 19000 2400 1000 3400 "" "9" "auto,lock,edge2"]
+	Pad[7874 -4622 7874 4478 2400 1000 3400 "" "6" "auto,lock"]
+	Pad[19685 9900 19685 19000 2400 1000 3400 "" "11" "auto,lock,edge2"]
+	Pad[11811 -4622 11811 4478 2400 1000 3400 "" "8" "auto,lock"]
+	Pad[23622 9900 23622 19000 2400 1000 3400 "" "13" "auto,lock,edge2"]
+	Pad[15748 -4622 15748 4478 2400 1000 3400 "" "10" "auto,lock"]
+	Pad[27559 9900 27559 19000 2400 1000 3400 "" "15" "auto,lock,edge2"]
+	Pad[19685 -4622 19685 4478 2400 1000 3400 "" "12" "auto,lock"]
+	Pad[31496 9900 31496 19000 2400 1000 3400 "" "17" "auto,lock,edge2"]
+	Pad[23622 -4622 23622 4478 2400 1000 3400 "" "14" "auto,lock"]
+	Pad[35433 9900 35433 19000 2400 1000 3400 "" "19" "auto,lock,edge2"]
+	Pad[27559 -4622 27559 4478 2400 1000 3400 "" "16" "auto,lock"]
+	Pad[39370 9900 39370 19000 2400 1000 3400 "" "21" "auto,lock,edge2"]
+	Pad[31496 -4622 31496 4478 2400 1000 3400 "" "18" "auto,lock"]
+	Pad[35433 -4622 35433 4478 2400 1000 3400 "" "20" "auto,lock"]
+	Pad[39370 -4622 39370 4478 2400 1000 3400 "" "22" "auto,lock"]
+	Pad[43307 -4622 43307 4478 2400 1000 3400 "" "24" "auto,lock"]
+	Pad[47244 -4622 47244 4478 2400 1000 3400 "" "26" "auto,lock"]
+	Pad[51181 -4622 51181 4478 2400 1000 3400 "" "28" "auto,lock"]
+	Pad[55118 -4622 55118 4478 2400 1000 3400 "" "30" "auto,lock"]
+	Pad[59055 -4622 59055 4478 2400 1000 3400 "" "32" "auto,lock"]
+	Pad[62992 -4622 62992 4478 2400 1000 3400 "" "34" "auto,lock"]
+	Pad[66929 -4622 66929 4478 2400 1000 3400 "" "36" "auto,lock"]
+	Pad[70866 -4622 70866 4478 2400 1000 3400 "" "38" "auto,lock"]
+	Pad[74803 -4622 74803 4478 2400 1000 3400 "" "40" "auto,lock"]
+	Pad[78740 -4622 78740 4478 2400 1000 3400 "" "42" "auto,lock"]
+	Pad[82677 -4622 82677 4478 2400 1000 3400 "" "44" "auto,lock"]
+	Pad[86614 -4622 86614 4478 2400 1000 3400 "" "46" "auto,lock"]
+	Pad[90551 -4622 90551 4478 2400 1000 3400 "" "48" "auto,lock"]
+	Pad[98425 -4622 98425 4478 2400 1000 3400 "" "52" "auto,lock"]
+	Pad[94488 -4622 94488 4478 2400 1000 3400 "" "50" "auto,lock"]
+	Pad[102362 -4622 102362 4478 2400 1000 3400 "" "54" "auto,lock"]
+	Pad[106299 -4622 106299 4478 2400 1000 3400 "" "56" "auto,lock"]
+	Pad[110236 -4622 110236 4478 2400 1000 3400 "" "58" "auto,lock"]
+	Pad[114173 -4622 114173 4478 2400 1000 3400 "" "60" "auto,lock"]
+	Pad[3937 -4622 3937 4478 2400 1000 3400 "" "4" "auto,lock"]
+	Pad[43307 9900 43307 19000 2400 1000 3400 "" "23" "auto,lock,edge2"]
+	Pad[47244 9900 47244 19000 2400 1000 3400 "" "25" "auto,lock,edge2"]
+	Pad[51181 9900 51181 19000 2400 1000 3400 "" "27" "auto,lock,edge2"]
+	Pad[55118 9900 55118 19000 2400 1000 3400 "" "29" "auto,lock,edge2"]
+	Pad[59055 9900 59055 19000 2400 1000 3400 "" "31" "auto,lock,edge2"]
+	Pad[62992 9900 62992 19000 2400 1000 3400 "" "33" "auto,lock,edge2"]
+	Pad[66929 9900 66929 19000 2400 1000 3400 "" "35" "auto,lock,edge2"]
+	Pad[70866 9900 70866 19000 2400 1000 3400 "" "37" "auto,lock,edge2"]
+	Pad[74803 9900 74803 19000 2400 1000 3400 "" "39" "auto,lock,edge2"]
+	Pad[78740 9900 78740 19000 2400 1000 3400 "" "41" "auto,lock,edge2"]
+	Pad[82677 9900 82677 19000 2400 1000 3400 "" "43" "auto,lock,edge2"]
+	Pad[86614 9900 86614 19000 2400 1000 3400 "" "45" "auto,lock,edge2"]
+	Pad[90551 9900 90551 19000 2400 1000 3400 "" "47" "auto,lock,edge2"]
+	Pad[94488 9900 94488 19000 2400 1000 3400 "" "49" "auto,lock,edge2"]
+	Pad[98425 9900 98425 19000 2400 1000 3400 "" "51" "auto,lock,edge2"]
+	Pad[102362 9900 102362 19000 2400 1000 3400 "" "53" "auto,lock,edge2"]
+	Pad[106299 9900 106299 19000 2400 1000 3400 "" "55" "auto,lock,edge2"]
+	Pad[110236 9900 110236 19000 2400 1000 3400 "" "57" "auto,lock,edge2"]
+	Pad[114173 9900 114173 19000 2400 1000 3400 "" "59" "auto,lock,edge2"]
+	Pad[118110 9900 118110 19000 2400 1000 3400 "" "61" "auto,lock,edge2"]
+	Pad[122047 9900 122047 19000 2400 1000 3400 "" "63" "auto,lock,edge2"]
+	Pad[118110 -4622 118110 4478 2400 1000 3400 "" "62" "auto,lock"]
+	ElementLine [134000 -9000 134000 24000 1000]
+	ElementLine [-11000 24000 134000 24000 1000]
+	ElementLine [-11000 -9000 134000 -9000 1000]
+	ElementLine [-11000 -9000 -11000 24000 1000]
+
+	)
+
+Element["" "0603" "C85" "22pF" 153000 62000 -2700 15500 1 100 ""]
+(
+	Pad[-900 2400 900 2400 2400 2000 3000 "1" "1" "square"]
+	Pad[-900 -2400 900 -2400 2400 2000 3000 "2" "2" "square"]
+	ElementLine [-2700 -4200 -2700 4200 600]
+	ElementLine [-2700 -4200 2700 -4200 600]
+	ElementLine [2700 -4200 2700 4200 600]
+	ElementLine [-2700 4200 2700 4200 600]
+
+	)
+
+Element["onsolder" "0603" "C25" "100pF" 195500 82500 -4000 -15000 0 100 "auto"]
+(
+	Pad[-2400 -900 -2400 900 2400 3000 2400 "1" "1" "auto,square"]
+	Pad[2400 -900 2400 900 2400 3000 2400 "2" "2" "auto,square"]
+	ElementLine [-4200 2700 4200 2700 600]
+	ElementLine [4200 -2700 4200 2700 600]
+	ElementLine [-4200 -2700 4200 -2700 600]
+	ElementLine [-4200 -2700 -4200 2700 600]
+
+	)
+
+Element["" "0603" "C99" "47pF" 126500 181000 -4500 3800 0 100 ""]
+(
+	Pad[-2400 -900 -2400 900 2400 2000 3000 "1" "1" "square"]
+	Pad[2400 -900 2400 900 2400 2000 3000 "2" "2" "square"]
+	ElementLine [-4200 -2700 4200 -2700 600]
+	ElementLine [4200 -2700 4200 2700 600]
+	ElementLine [-4200 2700 4200 2700 600]
+	ElementLine [-4200 -2700 -4200 2700 600]
+
+	)
+
+Element["" "SO8" "U6" "unknown" 178500 62000 -2500 10500 0 100 ""]
+(
+	Pad[7000 7500 13500 7500 2000 1000 3000 "1" "1" "square,edge2"]
+	Pad[7000 2500 13500 2500 2000 1000 3000 "2" "2" "square,edge2"]
+	Pad[7000 -2500 13500 -2500 2000 1000 3000 "3" "3" "square,edge2"]
+	Pad[7000 -7500 13500 -7500 2000 1000 3000 "4" "4" "square,edge2"]
+	Pad[-13500 -7500 -7000 -7500 2000 1000 3000 "5" "5" "square"]
+	Pad[-13500 -2500 -7000 -2500 2000 1000 3000 "6" "6" "square"]
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+Layer(5 "OTHER5")
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+NetList()
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+	(
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+		Connect("L601-1")
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+	(
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+		Connect("L601-2")
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+	(
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+		Connect("C100-2")
+		Connect("L100-1")
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+	)
+	Net("unnamed_net34" "(unknown)")
+	(
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+		Connect("R18-2")
+		Connect("R19-1")
+		Connect("U6-1")
+	)
+	Net("unnamed_net33" "(unknown)")
+	(
+		Connect("C85-1")
+		Connect("R17-2")
+		Connect("R20-1")
+		Connect("U6-8")
+	)
+	Net("unnamed_net32" "(unknown)")
+	(
+		Connect("C86-2")
+		Connect("R18-1")
+		Connect("U6-4")
+		Connect("R16-1")
+	)
+	Net("unnamed_net31" "(unknown)")
+	(
+		Connect("C85-2")
+		Connect("R17-1")
+		Connect("U6-5")
+		Connect("R15-1")
+	)
+	Net("unnamed_net30" "(unknown)")
+	(
+		Connect("R14-1")
+		Connect("C84-2")
+	)
+	Net("unnamed_net29" "(unknown)")
+	(
+		Connect("R194-1")
+		Connect("C261-1")
+		Connect("R193-2")
+		Connect("C63-2")
+	)
+	Net("unnamed_net28" "(unknown)")
+	(
+		Connect("R93-1")
+		Connect("C61-2")
+	)
+	Net("unnamed_net27" "(unknown)")
+	(
+		Connect("C73-1")
+		Connect("R11-2")
+	)
+	Net("unnamed_net26" "(unknown)")
+	(
+		Connect("U4-6")
+		Connect("L98-2")
+		Connect("C96-1")
+	)
+	Net("unnamed_net25" "(unknown)")
+	(
+		Connect("U4-3")
+		Connect("C99-2")
+	)
+	Net("unnamed_net24" "(unknown)")
+	(
+		Connect("L100-2")
+		Connect("J3-1")
+		Connect("C99-1")
+	)
+	Net("unnamed_net23" "(unknown)")
+	(
+		Connect("R40-2")
+		Connect("C96-2")
+		Connect("R9-1")
+	)
+	Net("unnamed_net22" "(unknown)")
+	(
+		Connect("C72-1")
+		Connect("R9-2")
+	)
+	Net("unnamed_net21" "(unknown)")
+	(
+		Connect("R19-2")
+		Connect("U3-36")
+	)
+	Net("unnamed_net20" "(unknown)")
+	(
+		Connect("R20-2")
+		Connect("U3-37")
+	)
+	Net("unnamed_net19" "(unknown)")
+	(
+		Connect("R22-1")
+		Connect("R21-1")
+		Connect("C87-2")
+		Connect("U3-7")
+	)
+	Net("unnamed_net18" "(unknown)")
+	(
+		Connect("C73-2")
+		Connect("U3-4")
+	)
+	Net("unnamed_net17" "(unknown)")
+	(
+		Connect("C72-2")
+		Connect("U3-5")
+	)
+	Net("VccVCO" "(unknown)")
+	(
+		Connect("R12-1")
+		Connect("C82-1")
+		Connect("C80-1")
+		Connect("U3-13")
+	)
+	Net("unnamed_net16" "(unknown)")
+	(
+		Connect("C71-1")
+		Connect("U3-20")
+	)
+	Net("unnamed_net15" "(unknown)")
+	(
+		Connect("C70-1")
+		Connect("U3-14")
+	)
+	Net("unnamed_net14" "(unknown)")
+	(
+		Connect("C69-1")
+		Connect("U3-40")
+	)
+	Net("unnamed_net13" "(unknown)")
+	(
+		Connect("C69-2")
+		Connect("U3-39")
+	)
+	Net("unnamed_net12" "(unknown)")
+	(
+		Connect("C68-1")
+		Connect("U3-1")
+	)
+	Net("unnamed_net11" "(unknown)")
+	(
+		Connect("C68-2")
+		Connect("U3-2")
+	)
+	Net("unnamed_net10" "(unknown)")
+	(
+		Connect("C63-1")
+		Connect("C61-1")
+		Connect("U3-21")
+	)
+	Net("unnamed_net9" "(unknown)")
+	(
+		Connect("C83-2")
+		Connect("R14-2")
+		Connect("R13-1")
+		Connect("U3-17")
+	)
+	Net("unnamed_net8" "(unknown)")
+	(
+		Connect("R13-2")
+		Connect("C59-1")
+		Connect("U3-16")
+	)
+	Net("unnamed_net7" "(unknown)")
+	(
+		Connect("Q1-3")
+		Connect("U3-26")
+	)
+	Net("unnamed_net6" "(unknown)")
+	(
+		Connect("U3-34")
+		Connect("R68-2")
+	)
+	Net("unnamed_net5" "(unknown)")
+	(
+		Connect("U3-33")
+		Connect("R67-2")
+	)
+	Net("5V_RF" "(unknown)")
+	(
+		Connect("J101-2")
+		Connect("C182-1")
+		Connect("U2-3")
+		Connect("C28-1")
+		Connect("C27-1")
+		Connect("U6-3")
+		Connect("R12-2")
+		Connect("C81-1")
+		Connect("C79-2")
+		Connect("U3-38")
+		Connect("C78-2")
+		Connect("U3-35")
+		Connect("C77-2")
+		Connect("U3-30")
+		Connect("C76-2")
+		Connect("U3-19")
+		Connect("C75-2")
+		Connect("U3-12")
+		Connect("C74-2")
+		Connect("U3-3")
+		Connect("U5-3")
+	)
+	Net("unnamed_net4" "(unknown)")
+	(
+		Connect("C67-1")
+		Connect("R66-2")
+		Connect("R67-1")
+		Connect("U5-1")
+	)
+	Net("unnamed_net3" "(unknown)")
+	(
+		Connect("C66-1")
+		Connect("R65-2")
+		Connect("R68-1")
+		Connect("U5-8")
+	)
+	Net("unnamed_net2" "(unknown)")
+	(
+		Connect("C67-2")
+		Connect("R66-1")
+		Connect("U5-4")
+		Connect("R71-1")
+	)
+	Net("unnamed_net1" "(unknown)")
+	(
+		Connect("C66-2")
+		Connect("R65-1")
+		Connect("U5-5")
+		Connect("R10-1")
+	)
+	Net("local_vref" "(unknown)")
+	(
+		Connect("U6-2")
+		Connect("U5-2")
+		Connect("C124-1")
+		Connect("C24-1")
+		Connect("R7-1")
+		Connect("R6-2")
+	)
+	Net("AUX_ADC_B1" "(unknown)")
+	(
+		Connect("J2-61")
+	)
+	Net("AUX_ADC_A1" "(unknown)")
+	(
+		Connect("J2-59")
+	)
+	Net("AUX_ADC_REF" "(unknown)")
+	(
+		Connect("J2-57")
+	)
+	Net("AUX_DAC_C" "(unknown)")
+	(
+		Connect("J2-55")
+	)
+	Net("AUX_DAC_B" "(unknown)")
+	(
+		Connect("J2-53")
+	)
+	Net("AUX_DAC_A" "(unknown)")
+	(
+		Connect("R21-2")
+		Connect("J2-51")
+	)
+	Net("AUX_DAC_D" "(unknown)")
+	(
+		Connect("J2-49")
+	)
+	Net("SEN_RX" "(unknown)")
+	(
+		Connect("J2-35")
+	)
+	Net("VINP_A" "(unknown)")
+	(
+		Connect("C65-1")
+		Connect("R71-2")
+		Connect("J2-62")
+	)
+	Net("VINN_A" "(unknown)")
+	(
+		Connect("C64-1")
+		Connect("R10-2")
+		Connect("J2-60")
+	)
+	Net("VREF" "(unknown)")
+	(
+		Connect("J2-56")
+	)
+	Net("VINN_B" "(unknown)")
+	(
+		Connect("C25-1")
+		Connect("R15-2")
+		Connect("J2-52")
+	)
+	Net("VINP_B" "(unknown)")
+	(
+		Connect("C26-1")
+		Connect("R16-2")
+		Connect("J2-50")
+	)
+	Net("AVDD" "(unknown)")
+	(
+		Connect("C97-1")
+		Connect("L98-1")
+		Connect("C98-1")
+		Connect("R6-1")
+		Connect("J2-45")
+		Connect("J2-43")
+		Connect("J2-46")
+		Connect("J2-44")
+	)
+	Net("AGND" "(unknown)")
+	(
+		Connect("R93-2")
+		Connect("U4-1")
+		Connect("U4-2")
+		Connect("U4-5")
+		Connect("U4-4")
+		Connect("C184-1")
+		Connect("C183-1")
+		Connect("C182-2")
+		Connect("U2-4")
+		Connect("U2-2")
+		Connect("C100-1")
+		Connect("J100-2")
+		Connect("Q1-2")
+		Connect("J3-5")
+		Connect("J3-4")
+		Connect("J3-3")
+		Connect("J3-2")
+		Connect("C28-2")
+		Connect("C27-2")
+		Connect("C87-1")
+		Connect("U6-6")
+		Connect("C26-2")
+		Connect("C25-2")
+		Connect("C59-2")
+		Connect("C84-1")
+		Connect("C83-1")
+		Connect("C82-2")
+		Connect("C81-2")
+		Connect("C80-2")
+		Connect("C75-1")
+		Connect("C76-1")
+		Connect("C77-1")
+		Connect("C78-1")
+		Connect("C79-1")
+		Connect("C74-1")
+		Connect("R11-1")
+		Connect("R40-1")
+		Connect("C97-2")
+		Connect("C98-2")
+		Connect("C71-2")
+		Connect("C70-2")
+		Connect("U3-10")
+		Connect("U3-41")
+		Connect("U3-25")
+		Connect("U3-31")
+		Connect("U3-11")
+		Connect("U3-18")
+		Connect("U3-9")
+		Connect("U3-6")
+		Connect("U5-6")
+		Connect("C65-2")
+		Connect("C64-2")
+		Connect("C124-2")
+		Connect("R7-2")
+		Connect("C24-2")
+		Connect("J2-63")
+		Connect("J2-47")
+		Connect("J2-41")
+		Connect("J2-64")
+		Connect("J2-58")
+		Connect("J2-54")
+		Connect("J2-48")
+		Connect("J2-42")
+	)
+	Net("io_rx_00" "(unknown)")
+	(
+		Connect("R193-1")
+		Connect("J2-36")
+	)
+	Net("io_rx_01" "(unknown)")
+	(
+		Connect("J24-13")
+		Connect("J2-34")
+	)
+	Net("io_rx_02" "(unknown)")
+	(
+		Connect("J24-11")
+		Connect("J2-32")
+	)
+	Net("io_rx_03" "(unknown)")
+	(
+		Connect("R22-2")
+		Connect("J24-9")
+		Connect("J2-30")
+	)
+	Net("io_rx_04" "(unknown)")
+	(
+		Connect("J24-7")
+		Connect("J2-28")
+	)
+	Net("SDI" "(unknown)")
+	(
+		Connect("J2-33")
+	)
+	Net("SDO" "(unknown)")
+	(
+		Connect("J2-31")
+	)
+	Net("SCLK" "(unknown)")
+	(
+		Connect("J2-29")
+	)
+	Net("RESET" "(unknown)")
+	(
+		Connect("J2-27")
+	)
+	Net("io_rx_05" "(unknown)")
+	(
+		Connect("J24-5")
+		Connect("J2-26")
+	)
+	Net("RS232_RXD" "(unknown)")
+	(
+		Connect("J2-25")
+	)
+	Net("io_rx_06" "(unknown)")
+	(
+		Connect("J24-3")
+		Connect("J2-24")
+	)
+	Net("RS232_TXD" "(unknown)")
+	(
+		Connect("J2-23")
+	)
+	Net("io_rx_07" "(unknown)")
+	(
+		Connect("J24-1")
+		Connect("J2-22")
+	)
+	Net("I2C_A0" "(unknown)")
+	(
+		Connect("J2-21")
+	)
+	Net("io_rx_08" "(unknown)")
+	(
+		Connect("J25-15")
+		Connect("J2-20")
+	)
+	Net("I2C_A1" "(unknown)")
+	(
+		Connect("Q1-1")
+		Connect("U1-2")
+		Connect("J2-19")
+	)
+	Net("io_rx_09" "(unknown)")
+	(
+		Connect("J25-13")
+		Connect("J2-18")
+	)
+	Net("SDA" "(unknown)")
+	(
+		Connect("U3-27")
+		Connect("U1-5")
+		Connect("J2-17")
+	)
+	Net("io_rx_10" "(unknown)")
+	(
+		Connect("J25-11")
+		Connect("J2-16")
+	)
+	Net("SCL" "(unknown)")
+	(
+		Connect("U3-29")
+		Connect("U1-6")
+		Connect("J2-15")
+	)
+	Net("io_rx_11" "(unknown)")
+	(
+		Connect("J25-9")
+		Connect("J2-14")
+	)
+	Net("io_rx_12" "(unknown)")
+	(
+		Connect("J25-7")
+		Connect("J2-12")
+	)
+	Net("clock_p" "(unknown)")
+	(
+		Connect("R194-2")
+		Connect("J2-11")
+	)
+	Net("io_rx_13" "(unknown)")
+	(
+		Connect("J25-5")
+		Connect("J2-10")
+	)
+	Net("io_rx_14" "(unknown)")
+	(
+		Connect("J25-3")
+		Connect("J2-8")
+	)
+	Net("DVDD" "(unknown)")
+	(
+		Connect("U1-8")
+		Connect("U1-3")
+		Connect("U1-1")
+		Connect("J2-9")
+		Connect("J2-7")
+	)
+	Net("io_rx_15" "(unknown)")
+	(
+		Connect("J25-1")
+		Connect("J2-6")
+	)
+	Net("6V" "(unknown)")
+	(
+		Connect("L600-1")
+		Connect("C187-2")
+		Connect("J2-5")
+		Connect("J2-3")
+	)
+	Net("DGND" "(unknown)")
+	(
+		Connect("C261-2")
+		Connect("C187-1")
+		Connect("J25-6")
+		Connect("J25-4")
+		Connect("J25-14")
+		Connect("J25-12")
+		Connect("J25-10")
+		Connect("J25-16")
+		Connect("J25-8")
+		Connect("J25-2")
+		Connect("J24-6")
+		Connect("J24-4")
+		Connect("J24-14")
+		Connect("J24-12")
+		Connect("J24-10")
+		Connect("J24-16")
+		Connect("J24-8")
+		Connect("J24-2")
+		Connect("U1-4")
+		Connect("U1-7")
+		Connect("J2-37")
+		Connect("J2-38")
+		Connect("J2-2")
+		Connect("J2-1")
+	)
+)
diff --git a/usrp-hw/dbsrx/dbsrx.prj b/usrp-hw/dbsrx/dbsrx.prj
new file mode 100644
index 000000000..cbe51968e
--- /dev/null
+++ b/usrp-hw/dbsrx/dbsrx.prj
@@ -0,0 +1,6 @@
+# List all schematics
+schematics dbsrx.sch
+
+output-name dbsrx
+
+elements-dir ../pkg/newlib
diff --git a/usrp-hw/dbsrx/dbsrx.sch b/usrp-hw/dbsrx/dbsrx.sch
new file mode 100644
index 000000000..32ddb2ccd
--- /dev/null
+++ b/usrp-hw/dbsrx/dbsrx.sch
@@ -0,0 +1,1688 @@
+v 20050820 1
+C 83700 45200 1 180 1 pmc64.sym
+{
+T 84400 32000 5 10 1 1 0 2 1
+refdes=J2
+T 83700 45200 5 10 0 1 90 6 1
+footprint=PMC-REVERSE
+}
+N 85200 40100 86900 40100 4
+{
+T 85500 40100 5 10 1 1 0 0 1
+netname=RS232_RXD
+}
+N 85200 40500 86900 40500 4
+{
+T 85500 40500 5 10 1 1 0 0 1
+netname=RS232_TXD
+}
+C 83600 32300 1 90 0 generic-power.sym
+{
+T 83350 32500 5 10 1 1 90 3 1
+net=AGND:1
+}
+N 83600 32500 83800 32500 4
+N 85200 41300 86500 41300 4
+{
+T 85600 41300 5 10 1 1 0 0 1
+netname=I2C_A1
+}
+N 85200 44900 85500 44900 4
+N 83800 44900 83500 44900 4
+C 85400 32700 1 270 0 generic-power.sym
+{
+T 85650 32500 5 10 1 1 270 3 1
+net=AGND:1
+}
+N 85400 32500 85200 32500 4
+N 85200 38100 86400 38100 4
+{
+T 85300 38100 5 10 1 1 0 0 1
+netname=SEN_RX
+}
+N 83800 37700 83600 37700 4
+N 85200 37700 85400 37700 4
+C 83600 36700 1 90 0 generic-power.sym
+{
+T 83350 36900 5 10 1 1 90 3 1
+net=AGND:1
+}
+N 83600 36900 83800 36900 4
+C 85400 37100 1 270 0 generic-power.sym
+{
+T 85650 36900 5 10 1 1 270 3 1
+net=AGND:1
+}
+N 85400 36900 85200 36900 4
+N 85200 33300 86800 33300 4
+{
+T 85200 33300 5 10 1 1 0 0 1
+netname=AUX_ADC_A1
+}
+N 85200 32900 86800 32900 4
+{
+T 85200 32900 5 10 1 1 0 0 1
+netname=AUX_ADC_B1
+}
+C 83600 33500 1 90 0 generic-power.sym
+{
+T 83350 33700 5 10 1 1 90 3 1
+net=AGND:1
+}
+N 83600 33700 83800 33700 4
+C 83600 34300 1 90 0 generic-power.sym
+{
+T 83350 34500 5 10 1 1 90 3 1
+net=AGND:1
+}
+N 83600 34500 83800 34500 4
+C 83600 35500 1 90 0 generic-power.sym
+{
+T 83350 35700 5 10 1 1 90 3 1
+net=AGND:1
+}
+N 83600 35700 83800 35700 4
+N 82200 32900 83800 32900 4
+{
+T 82200 32900 5 10 1 1 0 0 1
+netname=VINP_A
+}
+N 82200 33300 83800 33300 4
+{
+T 82200 33300 5 10 1 1 0 0 1
+netname=VINN_A
+}
+N 82200 35300 83800 35300 4
+{
+T 82200 35300 5 10 1 1 0 0 1
+netname=VINP_B
+}
+N 82200 34900 83800 34900 4
+{
+T 82200 34900 5 10 1 1 0 0 1
+netname=VINN_B
+}
+N 83800 34100 82200 34100 4
+{
+T 82300 34100 5 10 1 1 0 0 1
+netname=VREF
+}
+C 85400 35900 1 270 0 generic-power.sym
+{
+T 85650 35700 5 10 1 1 270 3 1
+net=AGND:1
+}
+N 85400 35700 85200 35700 4
+C 86000 36300 1 270 0 generic-power.sym
+{
+T 86250 36100 5 10 1 1 270 3 1
+net=AVDD:1
+}
+N 85200 36500 85700 36500 4
+N 85200 36100 86000 36100 4
+C 85700 36700 1 270 0 generic-power.sym
+{
+T 85950 36500 5 10 1 1 270 3 1
+net=AVDD:1
+}
+C 85900 44700 1 270 0 generic-power.sym
+{
+T 86150 44500 5 10 1 1 270 3 1
+net=6V:1
+}
+C 83000 36300 1 90 1 generic-power.sym
+{
+T 82750 36100 5 10 1 1 90 3 1
+net=AVDD:1
+}
+N 83800 36100 83000 36100 4
+N 83800 36500 83300 36500 4
+C 83300 36700 1 90 1 generic-power.sym
+{
+T 83050 36500 5 10 1 1 90 3 1
+net=AVDD:1
+}
+N 85200 44500 85900 44500 4
+N 85200 44100 85700 44100 4
+C 85700 43500 1 270 0 generic-power.sym
+{
+T 85950 43300 5 10 1 1 270 3 1
+net=DVDD:1
+}
+N 85200 43300 85700 43300 4
+N 85200 43700 85500 43700 4
+N 85700 44100 85700 44500 4
+N 85500 43700 85500 43300 4
+N 81800 44100 83800 44100 4
+{
+T 82100 44100 5 10 1 1 0 0 1
+netname=io_rx_15
+}
+N 81800 43700 83800 43700 4
+{
+T 82100 43700 5 10 1 1 0 0 1
+netname=io_rx_14
+}
+N 81800 42500 83800 42500 4
+{
+T 82100 42500 5 10 1 1 0 0 1
+netname=io_rx_11
+}
+N 81800 43300 83800 43300 4
+{
+T 82100 43300 5 10 1 1 0 0 1
+netname=io_rx_13
+}
+N 81800 42900 83800 42900 4
+{
+T 82100 42900 5 10 1 1 0 0 1
+netname=io_rx_12
+}
+N 81800 41300 83800 41300 4
+{
+T 82100 41300 5 10 1 1 0 0 1
+netname=io_rx_08
+}
+N 81800 42100 83800 42100 4
+{
+T 82100 42100 5 10 1 1 0 0 1
+netname=io_rx_10
+}
+N 81800 41700 83800 41700 4
+{
+T 82100 41700 5 10 1 1 0 0 1
+netname=io_rx_09
+}
+N 81800 40100 83800 40100 4
+{
+T 82100 40100 5 10 1 1 0 0 1
+netname=io_rx_05
+}
+N 81800 40900 83800 40900 4
+{
+T 82100 40900 5 10 1 1 0 0 1
+netname=io_rx_07
+}
+N 81800 40500 83800 40500 4
+{
+T 82100 40500 5 10 1 1 0 0 1
+netname=io_rx_06
+}
+N 81800 38900 83800 38900 4
+{
+T 82100 38900 5 10 1 1 0 0 1
+netname=io_rx_02
+}
+N 81800 39700 83800 39700 4
+{
+T 82100 39700 5 10 1 1 0 0 1
+netname=io_rx_04
+}
+N 81800 39300 83800 39300 4
+{
+T 82100 39300 5 10 1 1 0 0 1
+netname=io_rx_03
+}
+N 81800 38100 83800 38100 4
+{
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+refdes=C81
+T 55400 41500 5 10 1 1 0 6 1
+value=1000pF
+T 56000 41500 5 10 0 1 90 2 1
+footprint=0603
+}
+C 56200 40500 1 270 1 resistor-1.sym
+{
+T 56100 41000 5 10 1 1 0 6 1
+refdes=R12
+T 56100 40700 5 10 1 1 0 6 1
+value=4.7
+T 56200 40500 5 10 0 1 90 2 1
+footprint=0603
+}
+C 56000 39600 1 0 1 capacitor-2.sym
+{
+T 55400 39600 5 10 1 1 0 6 1
+refdes=C82
+T 56200 39600 5 10 1 1 0 6 1
+value=100uF
+T 56000 39600 5 10 0 1 90 2 1
+footprint=EIA6032
+}
+N 56300 41900 56300 41400 4
+N 56000 41700 56300 41700 4
+N 55100 41700 54500 41700 4
+N 54500 39800 55100 39800 4
+N 55100 40300 54500 40300 4
+N 56300 40500 56300 39800 4
+N 56000 40300 56300 40300 4
+C 54700 39500 1 180 0 generic-power.sym
+{
+T 54500 39250 5 10 1 1 180 3 1
+net=AGND:1
+}
+N 54500 39500 54500 41700 4
+N 71100 32800 72100 32800 4
+{
+T 71200 32800 5 10 1 1 0 0 1
+netname=I2C_A1
+}
+T 71900 30900 9 10 1 0 0 0 4
+We invert A1 which tells us which
+side we're on, A or B
+Leave other addresses open (high)
+A2,A0 will match EEPROM
+C 57400 31400 1 180 0 generic-power.sym
+{
+T 57200 31150 5 10 1 1 180 3 1
+net=AGND:1
+}
+N 57200 31400 57200 31600 4
+C 57000 33600 1 270 0 capacitor-1.sym
+{
+T 57200 33400 5 10 1 1 180 0 1
+refdes=C61
+T 57200 32900 5 10 1 1 0 6 1
+value=.1uF
+T 57000 33600 5 10 0 1 0 0 1
+footprint=0603
+}
+N 57200 32500 57200 32700 4
+N 57200 33800 57200 33600 4
+C 57000 34000 1 180 0 capacitor-1.sym
+{
+T 56100 33900 5 10 1 1 0 0 1
+refdes=C63
+T 56700 33900 5 10 1 1 0 0 1
+value=.1uF
+T 57000 34000 5 10 0 1 270 0 1
+footprint=0603
+}
+N 53800 33800 54800 33800 4
+{
+T 53900 33800 5 10 1 1 0 0 1
+netname=io_rx_00
+}
+C 60100 32300 1 90 0 capacitor-1.sym
+{
+T 59500 32500 5 10 1 1 0 0 1
+refdes=C83
+T 59400 32300 5 10 1 1 0 0 1
+value=.01uF
+T 60100 32300 5 10 0 1 180 0 1
+footprint=0603
+}
+C 60800 33300 1 0 0 resistor-1.sym
+{
+T 61400 33700 5 10 1 1 180 0 1
+refdes=R13
+T 61400 33200 5 10 1 1 180 0 1
+value=1K
+T 60800 33300 5 10 0 1 0 0 1
+footprint=0603
+}
+C 61700 33200 1 270 0 capacitor-1.sym
+{
+T 62500 33000 5 10 1 1 180 0 1
+refdes=C59
+T 62000 32500 5 10 1 1 0 0 1
+value=3300pF
+T 61700 33200 5 10 0 1 0 0 1
+footprint=0603
+}
+C 60100 31200 1 270 1 capacitor-1.sym
+{
+T 60700 31400 5 10 1 1 0 6 1
+refdes=C84
+T 60800 31200 5 10 1 1 0 6 1
+value=.1uF
+T 60100 31200 5 10 0 1 180 6 1
+footprint=0603
+}
+C 60200 32300 1 270 1 resistor-1.sym
+{
+T 60700 32800 5 10 1 1 0 6 1
+refdes=R14
+T 61000 32500 5 10 1 1 0 6 1
+value=2.21K
+T 60200 32300 5 10 0 1 90 2 1
+footprint=0603
+}
+C 60300 30900 1 180 0 generic-power.sym
+{
+T 60100 30650 5 10 1 1 180 3 1
+net=AGND:1
+}
+N 60300 31200 60300 31100 4
+N 59900 31100 59900 32300 4
+N 60300 32100 60300 32300 4
+N 60100 30900 60100 31100 4
+N 59600 33400 60800 33400 4
+N 60300 33200 60300 33400 4
+N 59900 33200 59900 33400 4
+N 61700 33400 61900 33400 4
+N 59600 33800 61900 33800 4
+N 61900 33200 61900 33800 4
+N 59900 31100 61900 31100 4
+N 61900 31100 61900 32300 4
+N 74300 47600 73500 47600 4
+{
+T 74300 47600 5 10 1 1 0 6 1
+netname=VINP_B
+}
+N 74300 48600 73500 48600 4
+{
+T 74300 48600 5 10 1 1 0 6 1
+netname=VINN_B
+}
+C 72600 48500 1 0 0 resistor-1.sym
+{
+T 73400 48900 5 10 1 1 180 0 1
+refdes=R15
+T 73300 48400 5 10 1 1 180 0 1
+value=50
+T 72600 48500 5 10 0 1 0 0 1
+footprint=0603
+}
+C 72600 47500 1 0 0 resistor-1.sym
+{
+T 73400 47900 5 10 1 1 180 0 1
+refdes=R16
+T 73300 47400 5 10 1 1 180 0 1
+value=50
+T 72600 47500 5 10 0 1 0 0 1
+footprint=0603
+}
+C 74300 48400 1 0 0 capacitor-1.sym
+{
+T 74900 48700 5 10 1 1 0 0 1
+refdes=C25
+T 74900 48300 5 10 1 1 0 0 1
+value=100pF
+T 74300 48400 5 10 0 1 90 0 1
+footprint=0603
+}
+C 74300 47400 1 0 0 capacitor-1.sym
+{
+T 74900 47700 5 10 1 1 0 0 1
+refdes=C26
+T 74900 47300 5 10 1 1 0 0 1
+value=100pF
+T 74300 47400 5 10 0 1 90 0 1
+footprint=0603
+}
+N 75200 48600 75400 48600 4
+C 75500 48000 1 270 1 generic-power.sym
+{
+T 75750 48200 5 10 1 1 270 3 1
+net=AGND:1
+}
+N 72200 48600 72600 48600 4
+N 72200 47600 72600 47600 4
+C 70100 46700 1 0 0 ad813x.sym
+{
+T 71400 49200 5 10 1 1 0 0 1
+refdes=U6
+}
+C 70700 49500 1 0 0 generic-power.sym
+{
+T 70900 49750 5 10 1 1 180 5 1
+net=5V_RF:1
+}
+C 71100 46700 1 180 0 generic-power.sym
+{
+T 70900 46450 5 10 1 1 180 3 1
+net=AGND:1
+}
+N 70900 46700 70900 46800 4
+N 70900 49500 70900 49400 4
+C 71600 50400 1 180 0 resistor-1.sym
+{
+T 71100 50000 5 10 1 1 0 0 1
+value=250, 0.1%
+T 71600 50400 5 10 0 1 180 0 1
+footprint=0603
+T 71100 50500 5 10 1 1 0 0 1
+refdes=R17
+}
+C 71600 46200 1 180 0 resistor-1.sym
+{
+T 71100 45800 5 10 1 1 0 0 1
+value=250, 0.1%
+T 71600 46200 5 10 0 1 180 0 1
+footprint=0603
+T 71100 46300 5 10 1 1 0 0 1
+refdes=R18
+}
+C 69900 47700 1 180 0 resistor-1.sym
+{
+T 69500 47300 5 10 1 1 0 0 1
+value=250, 0.1%
+T 69900 47700 5 10 0 1 180 0 1
+footprint=0603
+T 69200 47300 5 10 1 1 0 0 1
+refdes=R19
+}
+C 69900 48700 1 180 0 resistor-1.sym
+{
+T 69600 48800 5 10 1 1 0 0 1
+value=250, 0.1%
+T 69900 48700 5 10 0 1 180 0 1
+footprint=0603
+T 69200 48800 5 10 1 1 0 0 1
+refdes=R20
+}
+N 68900 48100 70200 48100 4
+{
+T 69300 48100 5 10 1 1 0 0 1
+netname=local_vref
+}
+N 69900 47600 70200 47600 4
+N 70100 46100 70700 46100 4
+N 71600 46100 72400 46100 4
+N 69900 48600 70200 48600 4
+N 70100 50300 70700 50300 4
+N 71600 50300 72400 50300 4
+C 70700 51100 1 180 1 capacitor-1.sym
+{
+T 70600 51000 5 10 1 1 0 0 1
+refdes=C85
+T 71300 51000 5 10 1 1 0 0 1
+value=22pF
+T 67300 42700 5 10 0 1 270 2 1
+footprint=0603
+}
+C 70700 45700 1 180 1 capacitor-1.sym
+{
+T 70600 45600 5 10 1 1 0 0 1
+refdes=C86
+T 71300 45600 5 10 1 1 0 0 1
+value=22pF
+T 70700 45700 5 10 0 1 270 2 1
+footprint=0603
+}
+N 70100 45500 70100 47600 4
+N 70100 45500 70700 45500 4
+N 71600 45500 72400 45500 4
+N 72400 45500 72400 47600 4
+N 70100 48600 70100 50900 4
+N 70100 50900 70700 50900 4
+N 71600 50900 72400 50900 4
+N 72400 48600 72400 50900 4
+N 75400 48600 75400 47600 4
+N 75400 47600 75200 47600 4
+N 75400 48200 75500 48200 4
+N 67200 45300 67600 45300 4
+N 68100 47600 69000 47600 4
+N 67200 45700 68100 45700 4
+N 67200 46500 67600 46500 4
+N 68100 42400 69000 42400 4
+N 67200 46100 68100 46100 4
+N 72600 33400 72600 33700 4
+N 72600 33700 74100 33700 4
+N 72600 32300 72600 32600 4
+N 62700 45400 64100 45400 4
+{
+T 62800 45400 5 10 1 1 0 0 1
+netname=AUX_DAC_A
+}
+N 63000 45100 64100 45100 4
+{
+T 63200 45100 5 10 1 1 0 0 1
+netname=io_rx_03
+}
+C 65000 45500 1 180 0 resistor-1.sym
+{
+T 64600 45600 5 10 1 1 0 0 1
+value=1K
+T 65000 45500 5 10 0 1 180 0 1
+footprint=0603
+T 64200 45600 5 10 1 1 0 0 1
+refdes=R21
+}
+C 65000 45000 1 0 1 resistor-1.sym
+{
+T 64600 44900 5 10 1 1 180 6 1
+value=NONE
+T 65000 45000 5 10 0 1 0 6 1
+footprint=0603
+T 64200 44900 5 10 1 1 180 6 1
+refdes=R22
+}
+C 64900 44000 1 270 1 capacitor-1.sym
+{
+T 65200 44200 5 10 1 1 0 0 1
+refdes=C87
+T 65200 44600 5 10 1 1 0 0 1
+value=.01uF
+T 64900 44000 5 10 0 1 0 2 1
+footprint=0603
+}
+N 65200 45700 65100 45700 4
+N 65100 45700 65100 44900 4
+N 65000 45400 65100 45400 4
+N 65000 45100 65100 45100 4
+C 64900 43800 1 180 1 generic-power.sym
+{
+T 65100 43550 5 10 1 1 180 3 1
+net=AGND:1
+}
+N 65100 43800 65100 44000 4
+N 67600 46500 67600 48600 4
+N 67600 48600 69000 48600 4
+N 68100 46100 68100 47600 4
+N 68100 45700 68100 42400 4
+N 67600 45300 67600 41400 4
+N 67600 41400 69000 41400 4
+C 76500 46600 1 90 1 capacitor-1.sym
+{
+T 76600 46200 5 10 1 1 0 0 1
+refdes=C27
+T 76600 46000 5 10 1 1 0 0 1
+value=.1uF
+T 76500 46600 5 10 0 1 180 2 1
+footprint=0603
+}
+C 77400 46600 1 90 1 capacitor-1.sym
+{
+T 77500 46200 5 10 1 1 0 0 1
+refdes=C28
+T 77500 46000 5 10 1 1 0 0 1
+value=1000pF
+T 77400 46600 5 10 0 1 180 2 1
+footprint=0603
+}
+N 76300 46600 76300 46800 4
+N 76300 46800 77200 46800 4
+N 77200 46800 77200 46600 4
+N 76300 45700 76300 45500 4
+N 76300 45500 77200 45500 4
+N 77200 45500 77200 45700 4
+C 76500 46900 1 0 0 generic-power.sym
+{
+T 76700 47150 5 10 1 1 180 5 1
+net=5V_RF:1
+}
+N 76700 46900 76700 46800 4
+C 76900 45400 1 180 0 generic-power.sym
+{
+T 76700 45150 5 10 1 1 180 3 1
+net=AGND:1
+}
+N 76700 45400 76700 45500 4
+C 54400 46000 1 0 0 SMA-5.sym
+{
+T 54400 46800 5 10 1 1 0 0 1
+refdes=J3
+T 54400 46000 5 10 0 1 0 0 1
+footprint=SMA_VERT
+}
+C 72100 32600 1 0 0 nmos-sot23.sym
+{
+T 72800 33200 5 10 1 1 0 0 1
+refdes=Q1
+}
+C 72800 32300 1 180 0 generic-power.sym
+{
+T 72600 32050 5 10 1 1 180 3 1
+net=AGND:1
+}
+C 78100 31300 1 270 0 generic-power.sym
+{
+T 78350 31100 5 10 1 1 270 3 1
+net=DGND:1
+}
+C 80500 34500 1 270 0 generic-power.sym
+{
+T 80750 34300 5 10 1 1 270 3 1
+net=DGND:1
+}
+C 80500 38500 1 270 0 generic-power.sym
+{
+T 80750 38300 5 10 1 1 270 3 1
+net=DGND:1
+}
+C 85500 45100 1 270 0 generic-power.sym
+{
+T 85750 44900 5 10 1 1 270 3 1
+net=DGND:1
+}
+C 83500 44700 1 90 0 generic-power.sym
+{
+T 83250 44900 5 10 1 1 90 3 1
+net=DGND:1
+}
+C 83600 37500 1 90 0 generic-power.sym
+{
+T 83350 37700 5 10 1 1 90 3 1
+net=DGND:1
+}
+C 85400 37900 1 270 0 generic-power.sym
+{
+T 85650 37700 5 10 1 1 270 3 1
+net=DGND:1
+}
+C 54000 43900 1 0 0 connector2-1.sym
+{
+T 54000 44700 5 10 1 1 0 0 1
+refdes=J100
+T 54000 43900 5 10 0 1 0 0 1
+footprint=CONNECTOR 1 2
+}
+C 55900 44800 1 90 0 inductor-1.sym
+{
+T 55700 45300 5 10 1 1 180 0 1
+refdes=L100
+T 55900 44800 5 10 0 1 90 0 1
+footprint=0603
+T 55200 45000 5 10 1 1 0 0 1
+value=27nH
+}
+C 55600 43900 1 180 1 generic-power.sym
+{
+T 55800 43650 5 10 1 1 180 3 1
+net=AGND:1
+}
+N 55700 44400 55800 44400 4
+N 55800 44400 55800 44800 4
+N 55800 44100 55800 43900 4
+N 55800 45700 55800 46500 4
+C 56600 44300 1 270 1 capacitor-1.sym
+{
+T 56900 44900 5 10 1 1 0 0 1
+refdes=C100
+T 57400 44500 5 10 1 1 0 6 1
+value=.1uF
+T 56600 44300 5 10 0 1 0 2 1
+footprint=0603
+}
+N 55700 44100 56800 44100 4
+N 56800 44100 56800 44300 4
+N 55800 44700 56200 44700 4
+N 56200 44700 56200 45400 4
+N 56800 45400 56800 45200 4
+C 82100 49600 1 270 0 lm2940imp.sym
+{
+T 83600 49300 5 10 1 1 0 6 1
+refdes=U2
+}
+C 83000 46900 1 180 0 generic-power.sym
+{
+T 82800 46650 5 10 1 1 180 3 1
+net=AGND:1
+}
+N 82600 47500 82600 47300 4
+N 83000 47300 83000 47500 4
+N 82800 46900 82800 47300 4
+C 79500 49900 1 0 0 generic-power.sym
+{
+T 79700 50150 5 10 1 1 0 3 1
+net=6V:1
+}
+N 79700 49200 79700 49900 4
+C 83900 49900 1 0 0 generic-power.sym
+{
+T 84100 50150 5 10 1 1 180 5 1
+net=5V_RF:1
+}
+N 84100 48900 84100 49900 4
+C 84300 48900 1 90 1 capacitor-2.sym
+{
+T 84600 48100 5 10 1 1 0 6 1
+refdes=C182
+T 84700 48600 5 10 1 1 0 6 1
+value=22uF
+T 84300 48900 5 10 0 1 180 2 1
+footprint=EIA6032
+}
+N 84100 47300 84100 48000 4
+N 83000 49500 83000 49700 4
+N 83000 49700 84100 49700 4
+N 82600 49700 82600 49500 4
+C 79500 48300 1 270 1 capacitor-1.sym
+{
+T 79300 48900 5 10 1 1 0 0 1
+refdes=C187
+T 79300 48500 5 10 1 1 0 0 1
+value=.1uF
+T 79500 48300 5 10 0 1 0 2 1
+footprint=0603
+}
+N 79700 48300 79700 47300 4
+C 57700 45800 1 0 0 mga82563.sym
+{
+T 58300 47100 5 10 1 1 0 0 1
+refdes=U4
+T 58500 46500 5 10 0 1 0 0 1
+footprint=SC70_6
+}
+C 59800 47700 1 270 0 inductor-1.sym
+{
+T 60100 47200 5 10 1 1 0 0 1
+refdes=L98
+T 59800 47700 5 10 0 1 270 0 1
+footprint=0603
+T 60100 47000 5 10 1 1 0 0 1
+value=27nH
+}
+C 58700 45200 1 180 0 generic-power.sym
+{
+T 58500 44950 5 10 1 1 180 3 1
+net=AGND:1
+}
+N 58100 45800 58100 45500 4
+N 58100 45500 58900 45500 4
+N 58900 45500 58900 45800 4
+N 58600 45500 58600 45800 4
+N 58300 45500 58300 45800 4
+N 58500 45200 58500 45500 4
+C 68000 31800 1 0 0 capacitor-1.sym
+{
+T 68600 32100 5 10 1 1 0 0 1
+refdes=C124
+T 68600 31700 5 10 1 1 0 0 1
+value=1000pF
+T 68000 31800 5 10 0 1 90 0 1
+footprint=0603
+}
+N 67800 32000 67800 33300 4
+N 67800 32000 68000 32000 4
+N 69100 32000 69100 33300 4
+N 69100 32000 68900 32000 4
+C 79800 49600 1 0 0 inductor-1.sym
+{
+T 80000 49900 5 10 1 1 0 0 1
+refdes=L600
+T 79800 49600 5 10 0 1 0 0 1
+footprint=1206
+}
+C 79900 47300 1 180 0 generic-power.sym
+{
+T 79700 47050 5 10 1 1 180 3 1
+net=DGND:1
+}
+C 80900 49600 1 0 0 inductor-1.sym
+{
+T 81100 49900 5 10 1 1 0 0 1
+refdes=L601
+T 80900 49600 5 10 0 1 0 0 1
+footprint=1206
+}
+N 82600 49700 81800 49700 4
+N 80900 49700 80700 49700 4
+N 79800 49700 79700 49700 4
+C 80600 48300 1 270 1 capacitor-1.sym
+{
+T 80300 48900 5 10 1 1 0 0 1
+refdes=C183
+T 80400 48500 5 10 1 1 0 0 1
+value=.1uF
+T 80600 48300 5 10 0 1 0 2 1
+footprint=0603
+}
+N 80800 49700 80800 49200 4
+N 80800 47300 80800 48300 4
+N 80800 47300 84100 47300 4
+N 81900 47300 81900 48300 4
+C 81700 48300 1 270 1 capacitor-1.sym
+{
+T 81400 48900 5 10 1 1 0 0 1
+refdes=C184
+T 81500 48500 5 10 1 1 0 0 1
+value=.1uF
+T 81700 48300 5 10 0 1 0 2 1
+footprint=0603
+}
+N 81900 49700 81900 49200 4
+C 75600 31100 1 90 0 generic-power.sym
+{
+T 75350 31300 5 10 1 1 90 3 1
+net=DVDD:1
+}
+N 75600 31300 76600 31300 4
+C 60100 48100 1 0 1 generic-power.sym
+{
+T 59900 48350 5 10 1 1 0 3 1
+net=AVDD:1
+}
+N 59900 37000 60600 37000 4
+C 57100 32500 1 270 0 resistor-1.sym
+{
+T 57000 32000 5 10 1 1 0 6 1
+refdes=R93
+T 57000 31800 5 10 1 1 0 6 1
+value=50
+T 57100 32500 5 10 0 1 270 0 1
+footprint=0603
+}
+C 55700 33300 1 270 0 capacitor-1.sym
+{
+T 55900 33100 5 10 1 1 180 0 1
+refdes=C261
+T 55900 32600 5 10 1 1 0 6 1
+value=200pF
+T 55700 33300 5 10 0 1 0 0 1
+footprint=0603
+}
+C 54800 33700 1 0 0 resistor-1.sym
+{
+T 55300 33600 5 10 1 1 90 6 1
+refdes=R193
+T 55500 33600 5 10 1 1 90 6 1
+value=10
+T 54800 33700 5 10 0 1 0 0 1
+footprint=0603
+}
+N 55900 33300 55900 33800 4
+C 56100 32100 1 180 0 generic-power.sym
+{
+T 55900 31850 5 10 1 1 180 3 1
+net=DGND:1
+}
+N 55900 32100 55900 32400 4
+N 57000 33800 57600 33800 4
+N 55700 33800 56100 33800 4
+N 85200 42900 86300 42900 4
+{
+T 85500 42900 5 10 1 1 0 0 1
+netname=clock_p
+}
+N 53800 34000 54800 34000 4
+{
+T 54000 34000 5 10 1 1 0 0 1
+netname=clock_p
+}
+C 55700 34100 1 180 0 resistor-1.sym
+{
+T 55600 34400 5 10 1 1 0 6 1
+refdes=R194
+T 55600 34200 5 10 1 1 0 6 1
+value=NONE
+T 55700 34100 5 10 0 1 180 0 1
+footprint=0603
+}
+N 55700 34000 55800 34000 4
+N 55800 34000 55800 33800 4
+C 59500 43800 1 0 1 connector2-1.sym
+{
+T 59500 44600 5 10 1 1 0 6 1
+refdes=J101
+T 59500 43800 5 10 0 1 0 6 1
+footprint=CONNECTOR 1 2
+}
+N 57600 44300 57600 45400 4
+N 56200 45400 57600 45400 4
+C 57600 44200 1 90 1 generic-power.sym
+{
+T 57350 44000 5 10 1 1 270 5 1
+net=5V_RF:1
+}
+N 57800 44300 57600 44300 4
+N 57800 44000 57600 44000 4
diff --git a/usrp-hw/dbsrx/gnetlistrc b/usrp-hw/dbsrx/gnetlistrc
new file mode 100644
index 000000000..6bbd9c292
--- /dev/null
+++ b/usrp-hw/dbsrx/gnetlistrc
@@ -0,0 +1,3 @@
+(component-library "../sym")
+(component-library "../sym/generated")
+
diff --git a/usrp-hw/dbsrx/gschemrc b/usrp-hw/dbsrx/gschemrc
new file mode 100644
index 000000000..6bbd9c292
--- /dev/null
+++ b/usrp-hw/dbsrx/gschemrc
@@ -0,0 +1,3 @@
+(component-library "../sym")
+(component-library "../sym/generated")
+
diff --git a/usrp-hw/dbsrx/netlist_cmd b/usrp-hw/dbsrx/netlist_cmd
new file mode 100755
index 000000000..64f5d8af7
--- /dev/null
+++ b/usrp-hw/dbsrx/netlist_cmd
@@ -0,0 +1,3 @@
+gsch2pcb dbsrx.prj
+gnetlist -g partslist3 -o dbsrx.bom dbsrx.sch
+