diff options
Diffstat (limited to 'library/SubcircuitLibrary/SN74LS42')
| -rw-r--r-- | library/SubcircuitLibrary/SN74LS42/7442-cache.lib | 42 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/SN74LS42/7442.cir | 38 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/SN74LS42/7442.cir.out | 35 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/SN74LS42/7442.pro | 73 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/SN74LS42/7442.proj | 1 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/SN74LS42/7442.sch | 697 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/SN74LS42/7442_Previous_Values.xml | 1 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/SN74LS42/analysis | 1 |
8 files changed, 888 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/SN74LS42/7442-cache.lib b/library/SubcircuitLibrary/SN74LS42/7442-cache.lib new file mode 100644 index 00000000..96dd6bbc --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS42/7442-cache.lib @@ -0,0 +1,42 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# 4_and +# +DEF 4_and X 0 40 Y Y 1 F N +F0 "X" 50 -50 60 H V C CNN +F1 "4_and" 100 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 100 0 206 760 -760 0 1 0 N 150 200 150 -200 +P 2 0 1 0 -200 200 150 200 N +P 4 0 1 0 -200 200 -200 -200 50 -200 150 -200 N +X in1 1 -400 150 200 R 50 50 1 1 I +X in2 2 -400 50 200 R 50 50 1 1 I +X in3 3 -400 -50 200 R 50 50 1 1 I +X in4 4 -400 -150 200 R 50 50 1 1 I +X out 5 500 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# d_nor +# +DEF d_nor U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_nor" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50 +A -25 -124 325 574 323 0 1 0 N 150 150 250 50 +A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50 +P 2 0 1 0 -250 -50 150 -50 N +P 2 0 1 0 -250 150 150 150 N +X IN1 1 -450 100 215 R 50 50 1 1 I +X IN2 2 -450 0 215 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/SN74LS42/7442.cir b/library/SubcircuitLibrary/SN74LS42/7442.cir new file mode 100644 index 00000000..f3018de9 --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS42/7442.cir @@ -0,0 +1,38 @@ +* C:\Users\pt710\eSim-Workspace\7442\7442.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 03/24/25 00:31:00 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +X1 Net-_U1-Pad3_ Net-_U2-Pad3_ Net-_U3-Pad3_ Net-_U4-Pad3_ Net-_U11-Pad1_ 4_and +X2 Net-_U6-Pad3_ Net-_U2-Pad3_ Net-_U3-Pad3_ Net-_U4-Pad3_ Net-_U12-Pad1_ 4_and +X3 Net-_U1-Pad3_ Net-_U5-Pad3_ Net-_U3-Pad3_ Net-_U4-Pad3_ Net-_U13-Pad1_ 4_and +X4 Net-_U6-Pad3_ Net-_U5-Pad3_ Net-_U3-Pad3_ Net-_U4-Pad3_ Net-_U14-Pad1_ 4_and +X5 Net-_U1-Pad3_ Net-_U2-Pad3_ Net-_U7-Pad3_ Net-_U4-Pad3_ Net-_U15-Pad1_ 4_and +X6 Net-_U6-Pad3_ Net-_U2-Pad3_ Net-_U7-Pad3_ Net-_U4-Pad3_ Net-_U9-Pad1_ 4_and +X7 Net-_U1-Pad3_ Net-_U5-Pad3_ Net-_U7-Pad3_ Net-_U4-Pad3_ Net-_U10-Pad1_ 4_and +X8 Net-_U6-Pad3_ Net-_U5-Pad3_ Net-_U7-Pad3_ Net-_U4-Pad3_ Net-_U16-Pad1_ 4_and +X9 Net-_U1-Pad3_ Net-_U2-Pad3_ Net-_U3-Pad3_ Net-_U8-Pad3_ Net-_U17-Pad1_ 4_and +X10 Net-_U6-Pad3_ Net-_U2-Pad3_ Net-_U3-Pad3_ Net-_U8-Pad3_ Net-_U18-Pad1_ 4_and +U1 Net-_U1-Pad1_ Net-_U1-Pad1_ Net-_U1-Pad3_ d_nor +U6 Net-_U1-Pad3_ Net-_U1-Pad3_ Net-_U6-Pad3_ d_nor +U2 Net-_U2-Pad1_ Net-_U2-Pad1_ Net-_U2-Pad3_ d_nor +U5 Net-_U2-Pad3_ Net-_U2-Pad3_ Net-_U5-Pad3_ d_nor +U3 Net-_U3-Pad1_ Net-_U3-Pad1_ Net-_U3-Pad3_ d_nor +U7 Net-_U3-Pad3_ Net-_U3-Pad3_ Net-_U7-Pad3_ d_nor +U4 Net-_U4-Pad1_ Net-_U4-Pad1_ Net-_U4-Pad3_ d_nor +U8 Net-_U4-Pad3_ Net-_U4-Pad3_ Net-_U8-Pad3_ d_nor +U11 Net-_U11-Pad1_ Net-_U11-Pad1_ ? d_nor +U12 Net-_U12-Pad1_ Net-_U12-Pad1_ ? d_nor +U13 Net-_U13-Pad1_ Net-_U13-Pad1_ ? d_nor +U14 Net-_U14-Pad1_ Net-_U14-Pad1_ ? d_nor +U15 Net-_U15-Pad1_ Net-_U15-Pad1_ ? d_nor +U9 Net-_U9-Pad1_ Net-_U9-Pad1_ ? d_nor +U10 Net-_U10-Pad1_ Net-_U10-Pad1_ ? d_nor +U16 Net-_U16-Pad1_ Net-_U16-Pad1_ ? d_nor +U17 Net-_U17-Pad1_ Net-_U17-Pad1_ ? d_nor +U18 Net-_U18-Pad1_ Net-_U18-Pad1_ ? d_nor + +.end diff --git a/library/SubcircuitLibrary/SN74LS42/7442.cir.out b/library/SubcircuitLibrary/SN74LS42/7442.cir.out new file mode 100644 index 00000000..c533de51 --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS42/7442.cir.out @@ -0,0 +1,35 @@ +* c:\users\pt710\esim-workspace\lm318\lm318.cir + +.include NPN.lib +.include PNP.lib +.include D.lib +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222 +q5 net-_c1-pad2_ net-_q5-pad2_ net-_q1-pad3_ Q2N2222 +r1 +15v net-_q1-pad1_ 10k +r2 +15v net-_c1-pad2_ 10k +q8 net-_q1-pad3_ net-_q8-pad2_ +15v Q2N2907A +r7 +15v net-_q8-pad2_ 1k +q2 gnd net-_q2-pad2_ net-_q2-pad3_ Q2N2222 +q4 net-_c1-pad2_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222 +r3 net-_q2-pad3_ gnd 1k +q7 net-_c1-pad1_ net-_c1-pad2_ net-_q7-pad3_ Q2N2222 +r6 net-_q7-pad3_ gnd 1k +q3 +15v net-_c1-pad1_ net-_q3-pad3_ Q2N2222 +q6 out net-_q3-pad3_ +15v Q2N2907A +r4 out gnd 10k +d1 net-_c1-pad1_ out 1N4148 +d2 ? gnd 1N4148 +r5 net-_c1-pad1_ +15v 10k +* u2 out plot_v1 +c1 net-_c1-pad1_ net-_c1-pad2_ 50p +v1 net-_q5-pad2_ net-_q1-pad2_ sine(0 1 0 0 0) +.tran 10e-06 10e-03 1e-06 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +plot v(out) +.endc +.end diff --git a/library/SubcircuitLibrary/SN74LS42/7442.pro b/library/SubcircuitLibrary/SN74LS42/7442.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS42/7442.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/SN74LS42/7442.proj b/library/SubcircuitLibrary/SN74LS42/7442.proj new file mode 100644 index 00000000..773ca67d --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS42/7442.proj @@ -0,0 +1 @@ +schematicFile LM348.sch diff --git a/library/SubcircuitLibrary/SN74LS42/7442.sch b/library/SubcircuitLibrary/SN74LS42/7442.sch new file mode 100644 index 00000000..376df495 --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS42/7442.sch @@ -0,0 +1,697 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +LIBS:7442-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L 4_and X1 +U 1 1 67E04AC9 +P 5250 950 +F 0 "X1" H 5300 900 60 0000 C CNN +F 1 "4_and" H 5350 1050 60 0000 C CNN +F 2 "" H 5250 950 60 0000 C CNN +F 3 "" H 5250 950 60 0000 C CNN + 1 5250 950 + 1 0 0 -1 +$EndComp +$Comp +L 4_and X2 +U 1 1 67E04B24 +P 5250 1500 +F 0 "X2" H 5300 1450 60 0000 C CNN +F 1 "4_and" H 5350 1600 60 0000 C CNN +F 2 "" H 5250 1500 60 0000 C CNN +F 3 "" H 5250 1500 60 0000 C CNN + 1 5250 1500 + 1 0 0 -1 +$EndComp +$Comp +L 4_and X3 +U 1 1 67E04B55 +P 5250 2000 +F 0 "X3" H 5300 1950 60 0000 C CNN +F 1 "4_and" H 5350 2100 60 0000 C CNN +F 2 "" H 5250 2000 60 0000 C CNN +F 3 "" H 5250 2000 60 0000 C CNN + 1 5250 2000 + 1 0 0 -1 +$EndComp +$Comp +L 4_and X4 +U 1 1 67E04B78 +P 5250 2500 +F 0 "X4" H 5300 2450 60 0000 C CNN +F 1 "4_and" H 5350 2600 60 0000 C CNN +F 2 "" H 5250 2500 60 0000 C CNN +F 3 "" H 5250 2500 60 0000 C CNN + 1 5250 2500 + 1 0 0 -1 +$EndComp +$Comp +L 4_and X5 +U 1 1 67E04BF5 +P 5250 3000 +F 0 "X5" H 5300 2950 60 0000 C CNN +F 1 "4_and" H 5350 3100 60 0000 C CNN +F 2 "" H 5250 3000 60 0000 C CNN +F 3 "" H 5250 3000 60 0000 C CNN + 1 5250 3000 + 1 0 0 -1 +$EndComp +$Comp +L 4_and X6 +U 1 1 67E04C1C +P 5250 3550 +F 0 "X6" H 5300 3500 60 0000 C CNN +F 1 "4_and" H 5350 3650 60 0000 C CNN +F 2 "" H 5250 3550 60 0000 C CNN +F 3 "" H 5250 3550 60 0000 C CNN + 1 5250 3550 + 1 0 0 -1 +$EndComp +$Comp +L 4_and X7 +U 1 1 67E04C53 +P 5250 4100 +F 0 "X7" H 5300 4050 60 0000 C CNN +F 1 "4_and" H 5350 4200 60 0000 C CNN +F 2 "" H 5250 4100 60 0000 C CNN +F 3 "" H 5250 4100 60 0000 C CNN + 1 5250 4100 + 1 0 0 -1 +$EndComp +$Comp +L 4_and X8 +U 1 1 67E04CB4 +P 5250 4650 +F 0 "X8" H 5300 4600 60 0000 C CNN +F 1 "4_and" H 5350 4750 60 0000 C CNN +F 2 "" H 5250 4650 60 0000 C CNN +F 3 "" H 5250 4650 60 0000 C CNN + 1 5250 4650 + 1 0 0 -1 +$EndComp +$Comp +L 4_and X9 +U 1 1 67E04CFB +P 5250 5200 +F 0 "X9" H 5300 5150 60 0000 C CNN +F 1 "4_and" H 5350 5300 60 0000 C CNN +F 2 "" H 5250 5200 60 0000 C CNN +F 3 "" H 5250 5200 60 0000 C CNN + 1 5250 5200 + 1 0 0 -1 +$EndComp +$Comp +L 4_and X10 +U 1 1 67E04D68 +P 5250 5700 +F 0 "X10" H 5300 5650 60 0000 C CNN +F 1 "4_and" H 5350 5800 60 0000 C CNN +F 2 "" H 5250 5700 60 0000 C CNN +F 3 "" H 5250 5700 60 0000 C CNN + 1 5250 5700 + 1 0 0 -1 +$EndComp +$Comp +L d_nor U1 +U 1 1 67E04E09 +P 1600 1150 +F 0 "U1" H 1600 1150 60 0000 C CNN +F 1 "d_nor" H 1650 1250 60 0000 C CNN +F 2 "" H 1600 1150 60 0000 C CNN +F 3 "" H 1600 1150 60 0000 C CNN + 1 1600 1150 + 1 0 0 -1 +$EndComp +$Comp +L d_nor U6 +U 1 1 67E04E3A +P 2950 1750 +F 0 "U6" H 2950 1750 60 0000 C CNN +F 1 "d_nor" H 3000 1850 60 0000 C CNN +F 2 "" H 2950 1750 60 0000 C CNN +F 3 "" H 2950 1750 60 0000 C CNN + 1 2950 1750 + 1 0 0 -1 +$EndComp +$Comp +L d_nor U2 +U 1 1 67E04E6F +P 1600 2400 +F 0 "U2" H 1600 2400 60 0000 C CNN +F 1 "d_nor" H 1650 2500 60 0000 C CNN +F 2 "" H 1600 2400 60 0000 C CNN +F 3 "" H 1600 2400 60 0000 C CNN + 1 1600 2400 + 1 0 0 -1 +$EndComp +$Comp +L d_nor U5 +U 1 1 67E04EA6 +P 2900 2950 +F 0 "U5" H 2900 2950 60 0000 C CNN +F 1 "d_nor" H 2950 3050 60 0000 C CNN +F 2 "" H 2900 2950 60 0000 C CNN +F 3 "" H 2900 2950 60 0000 C CNN + 1 2900 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b/library/SubcircuitLibrary/SN74LS42/7442_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source><v1 name="Source type">1mv</v1><v1 name="Source type">1</v1><v1 name="Source type">sine<field1 name="Offset Value" /><field2 name="Amplitude">1</field2><field3 name="Frequency" /><field4 name="Delay Time" /><field5 name="Damping Factor" /></v1></source><model /><devicemodel><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q5><q8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q8><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q4><q7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q7><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q3><q6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q6><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><d2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d2></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">false</field1><field2 name="Dec">true</field2><field3 name="Oct">false</field3><field4 name="Start Frequency">10</field4><field5 name="Stop Frequency">1</field5><field6 name="No. of points">10</field6><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Meg</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">1</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">10</field3><field4 name="Start Combo">us</field4><field5 name="Step Combo">us</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/SN74LS42/analysis b/library/SubcircuitLibrary/SN74LS42/analysis new file mode 100644 index 00000000..dd369dec --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS42/analysis @@ -0,0 +1 @@ +.tran 10e-06 10e-03 1e-06
\ No newline at end of file |