summaryrefslogtreecommitdiff
path: root/library/SubcircuitLibrary/SN74LS148
diff options
context:
space:
mode:
Diffstat (limited to 'library/SubcircuitLibrary/SN74LS148')
-rw-r--r--library/SubcircuitLibrary/SN74LS148/74148-cache.lib168
-rw-r--r--library/SubcircuitLibrary/SN74LS148/74148.cir55
-rw-r--r--library/SubcircuitLibrary/SN74LS148/74148.cir.out170
-rw-r--r--library/SubcircuitLibrary/SN74LS148/74148.pro83
-rw-r--r--library/SubcircuitLibrary/SN74LS148/74148.sch1070
-rw-r--r--library/SubcircuitLibrary/SN74LS148/74148.sub164
-rw-r--r--library/SubcircuitLibrary/SN74LS148/74148_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/SN74LS148/analysis1
8 files changed, 1712 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/SN74LS148/74148-cache.lib b/library/SubcircuitLibrary/SN74LS148/74148-cache.lib
new file mode 100644
index 00000000..3f72f50a
--- /dev/null
+++ b/library/SubcircuitLibrary/SN74LS148/74148-cache.lib
@@ -0,0 +1,168 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 3_and
+#
+DEF 3_and X 0 40 Y Y 1 F N
+F0 "X" 100 -50 60 H V C CNN
+F1 "3_and" 150 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 150 50 158 716 -716 0 1 0 N 200 200 200 -100
+P 2 0 1 0 -150 200 200 200 N
+P 3 0 1 0 -150 200 -150 -100 200 -100 N
+X in1 1 -350 150 200 R 50 50 1 1 I
+X in2 2 -350 50 200 R 50 50 1 1 I
+X in3 3 -350 -50 200 R 50 50 1 1 I
+X out 4 500 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 4_and
+#
+DEF 4_and X 0 40 Y Y 1 F N
+F0 "X" 50 -50 60 H V C CNN
+F1 "4_and" 100 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 206 760 -760 0 1 0 N 150 200 150 -200
+P 2 0 1 0 -200 200 150 200 N
+P 4 0 1 0 -200 200 -200 -200 50 -200 150 -200 N
+X in1 1 -400 150 200 R 50 50 1 1 I
+X in2 2 -400 50 200 R 50 50 1 1 I
+X in3 3 -400 -50 200 R 50 50 1 1 I
+X in4 4 -400 -150 200 R 50 50 1 1 I
+X out 5 500 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 5_and
+#
+DEF 5_and X 0 40 Y Y 1 F N
+F0 "X" 50 -100 60 H V C CNN
+F1 "5_and" 100 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 255 787 -787 0 1 0 N 150 250 150 -250
+P 2 0 1 0 -250 250 150 250 N
+P 3 0 1 0 -250 250 -250 -250 150 -250 N
+X in1 1 -450 200 200 R 50 50 1 1 I
+X in2 2 -450 100 200 R 50 50 1 1 I
+X in3 3 -450 0 200 R 50 50 1 1 I
+X in4 4 -450 -100 200 R 50 50 1 1 I
+X in5 5 -450 -200 200 R 50 50 1 1 I
+X out 6 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_and
+#
+DEF d_and U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_and" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
+A 150 49 100 6 900 0 1 0 N 250 50 150 150
+P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N
+X IN1 1 -450 100 200 R 50 50 1 1 I
+X IN2 2 -450 0 200 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# d_nand
+#
+DEF d_nand U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_nand" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
+A 150 49 100 6 900 0 1 0 N 250 50 150 150
+P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N
+X IN1 1 -450 100 200 R 50 50 1 1 I
+X IN2 2 -450 0 200 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# d_nor
+#
+DEF d_nor U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_nor" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50
+A -25 -124 325 574 323 0 1 0 N 150 150 250 50
+A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50
+P 2 0 1 0 -250 -50 150 -50 N
+P 2 0 1 0 -250 150 150 150 N
+X IN1 1 -450 100 215 R 50 50 1 1 I
+X IN2 2 -450 0 215 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/SN74LS148/74148.cir b/library/SubcircuitLibrary/SN74LS148/74148.cir
new file mode 100644
index 00000000..85cd484a
--- /dev/null
+++ b/library/SubcircuitLibrary/SN74LS148/74148.cir
@@ -0,0 +1,55 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\74148\74148.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 04/19/25 14:31:21
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2 Net-_U2-Pad1_ Net-_U2-Pad2_ d_inverter
+U11 Net-_U11-Pad1_ Net-_U11-Pad2_ Net-_U11-Pad3_ d_nor
+U10 Net-_U10-Pad1_ Net-_U10-Pad2_ Net-_U10-Pad3_ d_nor
+U17 Net-_U10-Pad3_ Net-_U10-Pad3_ Net-_U17-Pad3_ d_nor
+U18 Net-_U11-Pad3_ Net-_U11-Pad3_ Net-_U18-Pad3_ d_nor
+U25 Net-_U17-Pad3_ Net-_U18-Pad3_ Net-_U1-Pad12_ d_nor
+U13 Net-_U13-Pad1_ Net-_U13-Pad2_ Net-_U13-Pad3_ d_nor
+U12 Net-_U12-Pad1_ Net-_U12-Pad2_ Net-_U12-Pad3_ d_nor
+U19 Net-_U12-Pad3_ Net-_U12-Pad3_ Net-_U19-Pad3_ d_nor
+U20 Net-_U13-Pad3_ Net-_U13-Pad3_ Net-_U20-Pad3_ d_nor
+U26 Net-_U19-Pad3_ Net-_U20-Pad3_ Net-_U1-Pad13_ d_nor
+U15 Net-_U15-Pad1_ Net-_U15-Pad2_ Net-_U15-Pad3_ d_nor
+U14 Net-_U14-Pad1_ Net-_U14-Pad2_ Net-_U14-Pad3_ d_nor
+U21 Net-_U14-Pad3_ Net-_U14-Pad3_ Net-_U21-Pad3_ d_nor
+U22 Net-_U15-Pad3_ Net-_U15-Pad3_ Net-_U22-Pad3_ d_nor
+U27 Net-_U21-Pad3_ Net-_U22-Pad3_ Net-_U1-Pad14_ d_nor
+U24 Net-_U1-Pad10_ Net-_U24-Pad2_ Net-_U1-Pad11_ d_nand
+X7 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U16-Pad1_ 5_and
+U16 Net-_U16-Pad1_ Net-_U16-Pad2_ Net-_U16-Pad3_ d_and
+U23 Net-_U16-Pad3_ Net-_U1-Pad10_ d_inverter
+X5 Net-_U37-Pad2_ Net-_U2-Pad2_ Net-_U30-Pad2_ Net-_U29-Pad2_ Net-_U24-Pad2_ Net-_U10-Pad1_ 5_and
+X2 Net-_U32-Pad2_ Net-_U30-Pad2_ Net-_U29-Pad2_ Net-_U24-Pad2_ Net-_U10-Pad2_ 4_and
+X1 Net-_U28-Pad1_ Net-_U29-Pad2_ Net-_U24-Pad2_ Net-_U11-Pad1_ 3_and
+U3 Net-_U3-Pad1_ Net-_U24-Pad2_ Net-_U11-Pad2_ d_and
+X3 Net-_U2-Pad1_ Net-_U30-Pad2_ Net-_U28-Pad2_ Net-_U24-Pad2_ Net-_U12-Pad1_ 4_and
+X4 Net-_U32-Pad2_ Net-_U30-Pad2_ Net-_U28-Pad2_ Net-_U24-Pad2_ Net-_U12-Pad2_ 4_and
+U4 Net-_U29-Pad1_ Net-_U24-Pad2_ Net-_U13-Pad1_ d_and
+U5 Net-_U3-Pad1_ Net-_U24-Pad2_ Net-_U13-Pad2_ d_and
+U6 Net-_U30-Pad1_ Net-_U24-Pad2_ Net-_U14-Pad1_ d_and
+U7 Net-_U28-Pad1_ Net-_U24-Pad2_ Net-_U14-Pad2_ d_and
+U8 Net-_U29-Pad1_ Net-_U24-Pad2_ Net-_U15-Pad1_ d_and
+U9 Net-_U3-Pad1_ Net-_U24-Pad2_ Net-_U15-Pad2_ d_and
+U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ PORT
+U30 Net-_U30-Pad1_ Net-_U30-Pad2_ d_inverter
+U28 Net-_U28-Pad1_ Net-_U28-Pad2_ d_inverter
+U29 Net-_U29-Pad1_ Net-_U29-Pad2_ d_inverter
+X6 Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U24-Pad2_ Net-_U16-Pad2_ 4_and
+U37 Net-_U1-Pad2_ Net-_U37-Pad2_ d_inverter
+U35 Net-_U1-Pad3_ Net-_U2-Pad1_ d_inverter
+U32 Net-_U1-Pad4_ Net-_U32-Pad2_ d_inverter
+U31 Net-_U1-Pad5_ Net-_U30-Pad1_ d_inverter
+U34 Net-_U1-Pad6_ Net-_U28-Pad1_ d_inverter
+U36 Net-_U1-Pad7_ Net-_U29-Pad1_ d_inverter
+U33 Net-_U1-Pad8_ Net-_U3-Pad1_ d_inverter
+U38 Net-_U1-Pad9_ Net-_U24-Pad2_ d_inverter
+
+.end
diff --git a/library/SubcircuitLibrary/SN74LS148/74148.cir.out b/library/SubcircuitLibrary/SN74LS148/74148.cir.out
new file mode 100644
index 00000000..c72b8440
--- /dev/null
+++ b/library/SubcircuitLibrary/SN74LS148/74148.cir.out
@@ -0,0 +1,170 @@
+* c:\fossee\esim\library\subcircuitlibrary\74148\74148.cir
+
+.include 4_and.sub
+.include 3_and.sub
+.include 5_and.sub
+* u2 net-_u2-pad1_ net-_u2-pad2_ d_inverter
+* u11 net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_nor
+* u10 net-_u10-pad1_ net-_u10-pad2_ net-_u10-pad3_ d_nor
+* u17 net-_u10-pad3_ net-_u10-pad3_ net-_u17-pad3_ d_nor
+* u18 net-_u11-pad3_ net-_u11-pad3_ net-_u18-pad3_ d_nor
+* u25 net-_u17-pad3_ net-_u18-pad3_ net-_u1-pad12_ d_nor
+* u13 net-_u13-pad1_ net-_u13-pad2_ net-_u13-pad3_ d_nor
+* u12 net-_u12-pad1_ net-_u12-pad2_ net-_u12-pad3_ d_nor
+* u19 net-_u12-pad3_ net-_u12-pad3_ net-_u19-pad3_ d_nor
+* u20 net-_u13-pad3_ net-_u13-pad3_ net-_u20-pad3_ d_nor
+* u26 net-_u19-pad3_ net-_u20-pad3_ net-_u1-pad13_ d_nor
+* u15 net-_u15-pad1_ net-_u15-pad2_ net-_u15-pad3_ d_nor
+* u14 net-_u14-pad1_ net-_u14-pad2_ net-_u14-pad3_ d_nor
+* u21 net-_u14-pad3_ net-_u14-pad3_ net-_u21-pad3_ d_nor
+* u22 net-_u15-pad3_ net-_u15-pad3_ net-_u22-pad3_ d_nor
+* u27 net-_u21-pad3_ net-_u22-pad3_ net-_u1-pad14_ d_nor
+* u24 net-_u1-pad10_ net-_u24-pad2_ net-_u1-pad11_ d_nand
+x7 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u16-pad1_ 5_and
+* u16 net-_u16-pad1_ net-_u16-pad2_ net-_u16-pad3_ d_and
+* u23 net-_u16-pad3_ net-_u1-pad10_ d_inverter
+x5 net-_u37-pad2_ net-_u2-pad2_ net-_u30-pad2_ net-_u29-pad2_ net-_u24-pad2_ net-_u10-pad1_ 5_and
+x2 net-_u32-pad2_ net-_u30-pad2_ net-_u29-pad2_ net-_u24-pad2_ net-_u10-pad2_ 4_and
+x1 net-_u28-pad1_ net-_u29-pad2_ net-_u24-pad2_ net-_u11-pad1_ 3_and
+* u3 net-_u3-pad1_ net-_u24-pad2_ net-_u11-pad2_ d_and
+x3 net-_u2-pad1_ net-_u30-pad2_ net-_u28-pad2_ net-_u24-pad2_ net-_u12-pad1_ 4_and
+x4 net-_u32-pad2_ net-_u30-pad2_ net-_u28-pad2_ net-_u24-pad2_ net-_u12-pad2_ 4_and
+* u4 net-_u29-pad1_ net-_u24-pad2_ net-_u13-pad1_ d_and
+* u5 net-_u3-pad1_ net-_u24-pad2_ net-_u13-pad2_ d_and
+* u6 net-_u30-pad1_ net-_u24-pad2_ net-_u14-pad1_ d_and
+* u7 net-_u28-pad1_ net-_u24-pad2_ net-_u14-pad2_ d_and
+* u8 net-_u29-pad1_ net-_u24-pad2_ net-_u15-pad1_ d_and
+* u9 net-_u3-pad1_ net-_u24-pad2_ net-_u15-pad2_ d_and
+* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ port
+* u30 net-_u30-pad1_ net-_u30-pad2_ d_inverter
+* u28 net-_u28-pad1_ net-_u28-pad2_ d_inverter
+* u29 net-_u29-pad1_ net-_u29-pad2_ d_inverter
+x6 net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u24-pad2_ net-_u16-pad2_ 4_and
+* u37 net-_u1-pad2_ net-_u37-pad2_ d_inverter
+* u35 net-_u1-pad3_ net-_u2-pad1_ d_inverter
+* u32 net-_u1-pad4_ net-_u32-pad2_ d_inverter
+* u31 net-_u1-pad5_ net-_u30-pad1_ d_inverter
+* u34 net-_u1-pad6_ net-_u28-pad1_ d_inverter
+* u36 net-_u1-pad7_ net-_u29-pad1_ d_inverter
+* u33 net-_u1-pad8_ net-_u3-pad1_ d_inverter
+* u38 net-_u1-pad9_ net-_u24-pad2_ d_inverter
+a1 net-_u2-pad1_ net-_u2-pad2_ u2
+a2 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11
+a3 [net-_u10-pad1_ net-_u10-pad2_ ] net-_u10-pad3_ u10
+a4 [net-_u10-pad3_ net-_u10-pad3_ ] net-_u17-pad3_ u17
+a5 [net-_u11-pad3_ net-_u11-pad3_ ] net-_u18-pad3_ u18
+a6 [net-_u17-pad3_ net-_u18-pad3_ ] net-_u1-pad12_ u25
+a7 [net-_u13-pad1_ net-_u13-pad2_ ] net-_u13-pad3_ u13
+a8 [net-_u12-pad1_ net-_u12-pad2_ ] net-_u12-pad3_ u12
+a9 [net-_u12-pad3_ net-_u12-pad3_ ] net-_u19-pad3_ u19
+a10 [net-_u13-pad3_ net-_u13-pad3_ ] net-_u20-pad3_ u20
+a11 [net-_u19-pad3_ net-_u20-pad3_ ] net-_u1-pad13_ u26
+a12 [net-_u15-pad1_ net-_u15-pad2_ ] net-_u15-pad3_ u15
+a13 [net-_u14-pad1_ net-_u14-pad2_ ] net-_u14-pad3_ u14
+a14 [net-_u14-pad3_ net-_u14-pad3_ ] net-_u21-pad3_ u21
+a15 [net-_u15-pad3_ net-_u15-pad3_ ] net-_u22-pad3_ u22
+a16 [net-_u21-pad3_ net-_u22-pad3_ ] net-_u1-pad14_ u27
+a17 [net-_u1-pad10_ net-_u24-pad2_ ] net-_u1-pad11_ u24
+a18 [net-_u16-pad1_ net-_u16-pad2_ ] net-_u16-pad3_ u16
+a19 net-_u16-pad3_ net-_u1-pad10_ u23
+a20 [net-_u3-pad1_ net-_u24-pad2_ ] net-_u11-pad2_ u3
+a21 [net-_u29-pad1_ net-_u24-pad2_ ] net-_u13-pad1_ u4
+a22 [net-_u3-pad1_ net-_u24-pad2_ ] net-_u13-pad2_ u5
+a23 [net-_u30-pad1_ net-_u24-pad2_ ] net-_u14-pad1_ u6
+a24 [net-_u28-pad1_ net-_u24-pad2_ ] net-_u14-pad2_ u7
+a25 [net-_u29-pad1_ net-_u24-pad2_ ] net-_u15-pad1_ u8
+a26 [net-_u3-pad1_ net-_u24-pad2_ ] net-_u15-pad2_ u9
+a27 net-_u30-pad1_ net-_u30-pad2_ u30
+a28 net-_u28-pad1_ net-_u28-pad2_ u28
+a29 net-_u29-pad1_ net-_u29-pad2_ u29
+a30 net-_u1-pad2_ net-_u37-pad2_ u37
+a31 net-_u1-pad3_ net-_u2-pad1_ u35
+a32 net-_u1-pad4_ net-_u32-pad2_ u32
+a33 net-_u1-pad5_ net-_u30-pad1_ u31
+a34 net-_u1-pad6_ net-_u28-pad1_ u34
+a35 net-_u1-pad7_ net-_u29-pad1_ u36
+a36 net-_u1-pad8_ net-_u3-pad1_ u33
+a37 net-_u1-pad9_ net-_u24-pad2_ u38
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u11 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u10 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u17 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u18 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u25 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u13 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u12 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u19 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u20 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u26 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u15 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u14 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u21 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u22 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u27 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nand, NgSpice Name: d_nand
+.model u24 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u16 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u23 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u4 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u5 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u6 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u7 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u8 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u9 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u30 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u28 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u29 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u37 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u35 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u32 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u31 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u34 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u36 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u33 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u38 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/SN74LS148/74148.pro b/library/SubcircuitLibrary/SN74LS148/74148.pro
new file mode 100644
index 00000000..f2514212
--- /dev/null
+++ b/library/SubcircuitLibrary/SN74LS148/74148.pro
@@ -0,0 +1,83 @@
+update=05/06/25 20:59:52
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
+[schematic_editor]
+version=1
+PageLayoutDescrFile=
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=60
diff --git a/library/SubcircuitLibrary/SN74LS148/74148.sch b/library/SubcircuitLibrary/SN74LS148/74148.sch
new file mode 100644
index 00000000..30059d36
--- /dev/null
+++ b/library/SubcircuitLibrary/SN74LS148/74148.sch
@@ -0,0 +1,1070 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:74148-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L d_inverter U2
+U 1 1 68034E56
+P 3900 2100
+F 0 "U2" H 3900 2000 60 0000 C CNN
+F 1 "d_inverter" H 3900 2250 60 0000 C CNN
+F 2 "" H 3950 2050 60 0000 C CNN
+F 3 "" H 3950 2050 60 0000 C CNN
+ 1 3900 2100
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U11
+U 1 1 68034F56
+P 8100 2650
+F 0 "U11" H 8100 2650 60 0000 C CNN
+F 1 "d_nor" H 8150 2750 60 0000 C CNN
+F 2 "" H 8100 2650 60 0000 C CNN
+F 3 "" H 8100 2650 60 0000 C CNN
+ 1 8100 2650
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U10
+U 1 1 68034FBB
+P 8100 2150
+F 0 "U10" H 8100 2150 60 0000 C CNN
+F 1 "d_nor" H 8150 2250 60 0000 C CNN
+F 2 "" H 8100 2150 60 0000 C CNN
+F 3 "" H 8100 2150 60 0000 C CNN
+ 1 8100 2150
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U17
+U 1 1 68034FE6
+P 9250 2150
+F 0 "U17" H 9250 2150 60 0000 C CNN
+F 1 "d_nor" H 9300 2250 60 0000 C CNN
+F 2 "" H 9250 2150 60 0000 C CNN
+F 3 "" H 9250 2150 60 0000 C CNN
+ 1 9250 2150
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U18
+U 1 1 6803501F
+P 9250 2650
+F 0 "U18" H 9250 2650 60 0000 C CNN
+F 1 "d_nor" H 9300 2750 60 0000 C CNN
+F 2 "" H 9250 2650 60 0000 C CNN
+F 3 "" H 9250 2650 60 0000 C CNN
+ 1 9250 2650
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U25
+U 1 1 68035044
+P 10150 2350
+F 0 "U25" H 10150 2350 60 0000 C CNN
+F 1 "d_nor" H 10200 2450 60 0000 C CNN
+F 2 "" H 10150 2350 60 0000 C CNN
+F 3 "" H 10150 2350 60 0000 C CNN
+ 1 10150 2350
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U13
+U 1 1 68035274
+P 8100 4100
+F 0 "U13" H 8100 4100 60 0000 C CNN
+F 1 "d_nor" H 8150 4200 60 0000 C CNN
+F 2 "" H 8100 4100 60 0000 C CNN
+F 3 "" H 8100 4100 60 0000 C CNN
+ 1 8100 4100
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U12
+U 1 1 6803527A
+P 8100 3600
+F 0 "U12" H 8100 3600 60 0000 C CNN
+F 1 "d_nor" H 8150 3700 60 0000 C CNN
+F 2 "" H 8100 3600 60 0000 C CNN
+F 3 "" H 8100 3600 60 0000 C CNN
+ 1 8100 3600
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U19
+U 1 1 68035280
+P 9250 3600
+F 0 "U19" H 9250 3600 60 0000 C CNN
+F 1 "d_nor" H 9300 3700 60 0000 C CNN
+F 2 "" H 9250 3600 60 0000 C CNN
+F 3 "" H 9250 3600 60 0000 C CNN
+ 1 9250 3600
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U20
+U 1 1 68035286
+P 9250 4100
+F 0 "U20" H 9250 4100 60 0000 C CNN
+F 1 "d_nor" H 9300 4200 60 0000 C CNN
+F 2 "" H 9250 4100 60 0000 C CNN
+F 3 "" H 9250 4100 60 0000 C CNN
+ 1 9250 4100
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U26
+U 1 1 6803528C
+P 10150 3800
+F 0 "U26" H 10150 3800 60 0000 C CNN
+F 1 "d_nor" H 10200 3900 60 0000 C CNN
+F 2 "" H 10150 3800 60 0000 C CNN
+F 3 "" H 10150 3800 60 0000 C CNN
+ 1 10150 3800
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U15
+U 1 1 68035357
+P 8150 5700
+F 0 "U15" H 8150 5700 60 0000 C CNN
+F 1 "d_nor" H 8200 5800 60 0000 C CNN
+F 2 "" H 8150 5700 60 0000 C CNN
+F 3 "" H 8150 5700 60 0000 C CNN
+ 1 8150 5700
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U14
+U 1 1 6803535D
+P 8150 5200
+F 0 "U14" H 8150 5200 60 0000 C CNN
+F 1 "d_nor" H 8200 5300 60 0000 C CNN
+F 2 "" H 8150 5200 60 0000 C CNN
+F 3 "" H 8150 5200 60 0000 C CNN
+ 1 8150 5200
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U21
+U 1 1 68035363
+P 9300 5200
+F 0 "U21" H 9300 5200 60 0000 C CNN
+F 1 "d_nor" H 9350 5300 60 0000 C CNN
+F 2 "" H 9300 5200 60 0000 C CNN
+F 3 "" H 9300 5200 60 0000 C CNN
+ 1 9300 5200
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U22
+U 1 1 68035369
+P 9300 5700
+F 0 "U22" H 9300 5700 60 0000 C CNN
+F 1 "d_nor" H 9350 5800 60 0000 C CNN
+F 2 "" H 9300 5700 60 0000 C CNN
+F 3 "" H 9300 5700 60 0000 C CNN
+ 1 9300 5700
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nor U27
+U 1 1 6803536F
+P 10200 5400
+F 0 "U27" H 10200 5400 60 0000 C CNN
+F 1 "d_nor" H 10250 5500 60 0000 C CNN
+F 2 "" H 10200 5400 60 0000 C CNN
+F 3 "" H 10200 5400 60 0000 C CNN
+ 1 10200 5400
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_nand U24
+U 1 1 68035387
+P 10100 1450
+F 0 "U24" H 10100 1450 60 0000 C CNN
+F 1 "d_nand" H 10150 1550 60 0000 C CNN
+F 2 "" H 10100 1450 60 0000 C CNN
+F 3 "" H 10100 1450 60 0000 C CNN
+ 1 10100 1450
+ 1 0 0 -1
+$EndComp
+$Comp
+L 5_and X7
+U 1 1 680353EA
+P 7700 800
+F 0 "X7" H 7750 700 60 0000 C CNN
+F 1 "5_and" H 7800 950 60 0000 C CNN
+F 2 "" H 7700 800 60 0000 C CNN
+F 3 "" H 7700 800 60 0000 C CNN
+ 1 7700 800
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_and U16
+U 1 1 68035472
+P 8850 1050
+F 0 "U16" H 8850 1050 60 0000 C CNN
+F 1 "d_and" H 8900 1150 60 0000 C CNN
+F 2 "" H 8850 1050 60 0000 C CNN
+F 3 "" H 8850 1050 60 0000 C CNN
+ 1 8850 1050
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_inverter U23
+U 1 1 68035581
+P 9850 1000
+F 0 "U23" H 9850 900 60 0000 C CNN
+F 1 "d_inverter" H 9850 1150 60 0000 C CNN
+F 2 "" H 9900 950 60 0000 C CNN
+F 3 "" H 9900 950 60 0000 C CNN
+ 1 9850 1000
+ 1 0 0 -1
+$EndComp
+$Comp
+L 5_and X5
+U 1 1 680355C4
+P 6650 1850
+F 0 "X5" H 6700 1750 60 0000 C CNN
+F 1 "5_and" H 6750 2000 60 0000 C CNN
+F 2 "" H 6650 1850 60 0000 C CNN
+F 3 "" H 6650 1850 60 0000 C CNN
+ 1 6650 1850
+ 1 0 0 -1
+$EndComp
+$Comp
+L 4_and X2
+U 1 1 68035621
+P 6600 2400
+F 0 "X2" H 6650 2350 60 0000 C CNN
+F 1 "4_and" H 6700 2500 60 0000 C CNN
+F 2 "" H 6600 2400 60 0000 C CNN
+F 3 "" H 6600 2400 60 0000 C CNN
+ 1 6600 2400
+ 1 0 0 -1
+$EndComp
+$Comp
+L 3_and X1
+U 1 1 68035670
+P 6550 2900
+F 0 "X1" H 6650 2850 60 0000 C CNN
+F 1 "3_and" H 6700 3050 60 0000 C CNN
+F 2 "" H 6550 2900 60 0000 C CNN
+F 3 "" H 6550 2900 60 0000 C CNN
+ 1 6550 2900
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_and U3
+U 1 1 680356BF
+P 6650 3250
+F 0 "U3" H 6650 3250 60 0000 C CNN
+F 1 "d_and" H 6700 3350 60 0000 C CNN
+F 2 "" H 6650 3250 60 0000 C CNN
+F 3 "" H 6650 3250 60 0000 C CNN
+ 1 6650 3250
+ 1 0 0 -1
+$EndComp
+$Comp
+L 4_and X3
+U 1 1 68035718
+P 6600 3600
+F 0 "X3" H 6650 3550 60 0000 C CNN
+F 1 "4_and" H 6700 3700 60 0000 C CNN
+F 2 "" H 6600 3600 60 0000 C CNN
+F 3 "" H 6600 3600 60 0000 C CNN
+ 1 6600 3600
+ 1 0 0 -1
+$EndComp
+$Comp
+L 4_and X4
+U 1 1 6803576F
+P 6600 4150
+F 0 "X4" H 6650 4100 60 0000 C CNN
+F 1 "4_and" H 6700 4250 60 0000 C CNN
+F 2 "" H 6600 4150 60 0000 C CNN
+F 3 "" H 6600 4150 60 0000 C CNN
+ 1 6600 4150
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_and U4
+U 1 1 680357C6
+P 6650 4600
+F 0 "U4" H 6650 4600 60 0000 C CNN
+F 1 "d_and" H 6700 4700 60 0000 C CNN
+F 2 "" H 6650 4600 60 0000 C CNN
+F 3 "" H 6650 4600 60 0000 C CNN
+ 1 6650 4600
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_and U5
+U 1 1 68035819
+P 6650 4900
+F 0 "U5" H 6650 4900 60 0000 C CNN
+F 1 "d_and" H 6700 5000 60 0000 C CNN
+F 2 "" H 6650 4900 60 0000 C CNN
+F 3 "" H 6650 4900 60 0000 C CNN
+ 1 6650 4900
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_and U6
+U 1 1 68035870
+P 6650 5200
+F 0 "U6" H 6650 5200 60 0000 C CNN
+F 1 "d_and" H 6700 5300 60 0000 C CNN
+F 2 "" H 6650 5200 60 0000 C CNN
+F 3 "" H 6650 5200 60 0000 C CNN
+ 1 6650 5200
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_and U7
+U 1 1 680358C7
+P 6650 5500
+F 0 "U7" H 6650 5500 60 0000 C CNN
+F 1 "d_and" H 6700 5600 60 0000 C CNN
+F 2 "" H 6650 5500 60 0000 C CNN
+F 3 "" H 6650 5500 60 0000 C CNN
+ 1 6650 5500
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_and U8
+U 1 1 68035922
+P 6650 5800
+F 0 "U8" H 6650 5800 60 0000 C CNN
+F 1 "d_and" H 6700 5900 60 0000 C CNN
+F 2 "" H 6650 5800 60 0000 C CNN
+F 3 "" H 6650 5800 60 0000 C CNN
+ 1 6650 5800
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_and U9
+U 1 1 6803598F
+P 6650 6100
+F 0 "U9" H 6650 6100 60 0000 C CNN
+F 1 "d_and" H 6700 6200 60 0000 C CNN
+F 2 "" H 6650 6100 60 0000 C CNN
+F 3 "" H 6650 6100 60 0000 C CNN
+ 1 6650 6100
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 8250 800 8400 800
+Wire Wire Line
+ 8400 800 8400 950
+Wire Wire Line
+ 8200 1300 8400 1250
+Wire Wire Line
+ 8400 1250 8400 1050
+Wire Wire Line
+ 9300 1000 9550 1000
+Wire Wire Line
+ 9450 1350 9650 1350
+Wire Wire Line
+ 10150 1000 10150 1250
+Wire Wire Line
+ 10150 1250 9450 1250
+Wire Wire Line
+ 9450 1250 9450 1350
+Wire Wire Line
+ 5800 1450 5800 6100
+Wire Wire Line
+ 4250 6100 6200 6100
+Wire Wire Line
+ 5800 1500 9650 1500
+Wire Wire Line
+ 9650 1500 9650 1450
+Connection ~ 5800 1500
+Wire Wire Line
+ 6200 2050 5800 2050
+Connection ~ 5800 2050
+Wire Wire Line
+ 6200 2550 5800 2550
+Connection ~ 5800 2550
+Wire Wire Line
+ 6200 2950 5800 2950
+Connection ~ 5800 2950
+Wire Wire Line
+ 6200 3250 5800 3250
+Connection ~ 5800 3250
+Wire Wire Line
+ 6200 3750 5800 3750
+Connection ~ 5800 3750
+Wire Wire Line
+ 6200 4300 5800 4300
+Connection ~ 5800 4300
+Wire Wire Line
+ 6200 4600 5800 4600
+Connection ~ 5800 4600
+Wire Wire Line
+ 6200 4900 5800 4900
+Connection ~ 5800 4900
+Wire Wire Line
+ 6200 5200 5800 5200
+Connection ~ 5800 5200
+Wire Wire Line
+ 6200 5500 5800 5500
+Connection ~ 5800 5500
+Wire Wire Line
+ 6200 5800 5800 5800
+Connection ~ 5800 5800
+Wire Wire Line
+ 7100 5150 7350 5150
+Wire Wire Line
+ 7350 5150 7350 5050
+Wire Wire Line
+ 7350 5050 7700 5050
+Wire Wire Line
+ 7700 5050 7700 5100
+Wire Wire Line
+ 7100 5450 7100 5200
+Wire Wire Line
+ 7100 5200 7700 5200
+Wire Wire Line
+ 7100 5750 7100 5600
+Wire Wire Line
+ 7100 5600 7700 5600
+Wire Wire Line
+ 7100 6050 7700 6050
+Wire Wire Line
+ 7700 6050 7700 5700
+Wire Wire Line
+ 8600 5150 8750 5150
+Wire Wire Line
+ 8750 5100 8750 5200
+Wire Wire Line
+ 8750 5100 8850 5100
+Wire Wire Line
+ 8750 5200 8850 5200
+Connection ~ 8750 5150
+Wire Wire Line
+ 8600 5650 8750 5650
+Wire Wire Line
+ 8750 5600 8750 5700
+Wire Wire Line
+ 8750 5600 8850 5600
+Wire Wire Line
+ 8750 5700 8850 5700
+Connection ~ 8750 5650
+Wire Wire Line
+ 9750 5150 9750 5300
+Wire Wire Line
+ 9750 5400 9750 5650
+Wire Wire Line
+ 7100 3600 7100 3500
+Wire Wire Line
+ 7100 3500 7650 3500
+Wire Wire Line
+ 7100 4150 7100 3800
+Wire Wire Line
+ 7100 3800 7650 3800
+Wire Wire Line
+ 7650 3800 7650 3600
+Wire Wire Line
+ 7100 4550 7100 4350
+Wire Wire Line
+ 7100 4350 7350 4350
+Wire Wire Line
+ 7350 4350 7350 4000
+Wire Wire Line
+ 7350 4000 7650 4000
+Wire Wire Line
+ 7100 4850 7650 4850
+Wire Wire Line
+ 7650 4850 7650 4100
+Wire Wire Line
+ 8550 3550 8700 3550
+Wire Wire Line
+ 8700 3500 8700 3600
+Wire Wire Line
+ 8700 3500 8800 3500
+Wire Wire Line
+ 8700 3600 8800 3600
+Connection ~ 8700 3550
+Wire Wire Line
+ 8550 4050 8700 4050
+Wire Wire Line
+ 8700 4000 8700 4100
+Wire Wire Line
+ 8700 4000 8800 4000
+Wire Wire Line
+ 8700 4100 8800 4100
+Connection ~ 8700 4050
+Wire Wire Line
+ 9700 3550 9700 3700
+Wire Wire Line
+ 9700 4050 9700 3800
+Wire Wire Line
+ 7200 1850 7650 1850
+Wire Wire Line
+ 7650 1850 7650 2050
+Wire Wire Line
+ 7100 2400 7650 2400
+Wire Wire Line
+ 7650 2400 7650 2150
+Wire Wire Line
+ 7050 2850 7100 2850
+Wire Wire Line
+ 7100 2850 7100 2550
+Wire Wire Line
+ 7100 2550 7650 2550
+Wire Wire Line
+ 7100 3200 7650 3200
+Wire Wire Line
+ 7650 3200 7650 2650
+Wire Wire Line
+ 8550 2100 8750 2100
+Wire Wire Line
+ 8750 2050 8750 2150
+Wire Wire Line
+ 8750 2050 8800 2050
+Wire Wire Line
+ 8750 2150 8800 2150
+Connection ~ 8750 2100
+Wire Wire Line
+ 8550 2600 8700 2600
+Wire Wire Line
+ 8700 2550 8700 2650
+Wire Wire Line
+ 8700 2550 8800 2550
+Wire Wire Line
+ 8700 2650 8800 2650
+Connection ~ 8700 2600
+Wire Wire Line
+ 9700 2100 9700 2250
+Wire Wire Line
+ 9700 2350 9700 2600
+$Comp
+L PORT U1
+U 1 1 680376C3
+P 650 600
+F 0 "U1" H 700 700 30 0000 C CNN
+F 1 "PORT" H 650 600 30 0000 C CNN
+F 2 "" H 650 600 60 0000 C CNN
+F 3 "" H 650 600 60 0000 C CNN
+ 1 650 600
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 680377EE
+P 800 1450
+F 0 "U1" H 850 1550 30 0000 C CNN
+F 1 "PORT" H 800 1450 30 0000 C CNN
+F 2 "" H 800 1450 60 0000 C CNN
+F 3 "" H 800 1450 60 0000 C CNN
+ 2 800 1450
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 68037920
+P 900 2100
+F 0 "U1" H 950 2200 30 0000 C CNN
+F 1 "PORT" H 900 2100 30 0000 C CNN
+F 2 "" H 900 2100 60 0000 C CNN
+F 3 "" H 900 2100 60 0000 C CNN
+ 3 900 2100
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 68037989
+P 1000 2750
+F 0 "U1" H 1050 2850 30 0000 C CNN
+F 1 "PORT" H 1000 2750 30 0000 C CNN
+F 2 "" H 1000 2750 60 0000 C CNN
+F 3 "" H 1000 2750 60 0000 C CNN
+ 4 1000 2750
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 680379F4
+P 1100 3400
+F 0 "U1" H 1150 3500 30 0000 C CNN
+F 1 "PORT" H 1100 3400 30 0000 C CNN
+F 2 "" H 1100 3400 60 0000 C CNN
+F 3 "" H 1100 3400 60 0000 C CNN
+ 5 1100 3400
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 68037A5B
+P 1200 3950
+F 0 "U1" H 1250 4050 30 0000 C CNN
+F 1 "PORT" H 1200 3950 30 0000 C CNN
+F 2 "" H 1200 3950 60 0000 C CNN
+F 3 "" H 1200 3950 60 0000 C CNN
+ 6 1200 3950
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 7 1 68037BF6
+P 1350 4600
+F 0 "U1" H 1400 4700 30 0000 C CNN
+F 1 "PORT" H 1350 4600 30 0000 C CNN
+F 2 "" H 1350 4600 60 0000 C CNN
+F 3 "" H 1350 4600 60 0000 C CNN
+ 7 1350 4600
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 8 1 68037C5D
+P 1450 5200
+F 0 "U1" H 1500 5300 30 0000 C CNN
+F 1 "PORT" H 1450 5200 30 0000 C CNN
+F 2 "" H 1450 5200 60 0000 C CNN
+F 3 "" H 1450 5200 60 0000 C CNN
+ 8 1450 5200
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 9 1 68037CCA
+P 1600 5900
+F 0 "U1" H 1650 6000 30 0000 C CNN
+F 1 "PORT" H 1600 5900 30 0000 C CNN
+F 2 "" H 1600 5900 60 0000 C CNN
+F 3 "" H 1600 5900 60 0000 C CNN
+ 9 1600 5900
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 10 1 68038497
+P 10950 1000
+F 0 "U1" H 11000 1100 30 0000 C CNN
+F 1 "PORT" H 10950 1000 30 0000 C CNN
+F 2 "" H 10950 1000 60 0000 C CNN
+F 3 "" H 10950 1000 60 0000 C CNN
+ 10 10950 1000
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 11 1 6803850C
+P 10950 1400
+F 0 "U1" H 11000 1500 30 0000 C CNN
+F 1 "PORT" H 10950 1400 30 0000 C CNN
+F 2 "" H 10950 1400 60 0000 C CNN
+F 3 "" H 10950 1400 60 0000 C CNN
+ 11 10950 1400
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 12 1 6803857F
+P 11000 2300
+F 0 "U1" H 11050 2400 30 0000 C CNN
+F 1 "PORT" H 11000 2300 30 0000 C CNN
+F 2 "" H 11000 2300 60 0000 C CNN
+F 3 "" H 11000 2300 60 0000 C CNN
+ 12 11000 2300
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 13 1 680385FD
+P 11000 3750
+F 0 "U1" H 11050 3850 30 0000 C CNN
+F 1 "PORT" H 11000 3750 30 0000 C CNN
+F 2 "" H 11000 3750 60 0000 C CNN
+F 3 "" H 11000 3750 60 0000 C CNN
+ 13 11000 3750
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 14 1 680387EC
+P 11050 5350
+F 0 "U1" H 11100 5450 30 0000 C CNN
+F 1 "PORT" H 11050 5350 30 0000 C CNN
+F 2 "" H 11050 5350 60 0000 C CNN
+F 3 "" H 11050 5350 60 0000 C CNN
+ 14 11050 5350
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 10650 5350 10800 5350
+Wire Wire Line
+ 10600 3750 10750 3750
+Wire Wire Line
+ 10600 2300 10750 2300
+Wire Wire Line
+ 10550 1400 10700 1400
+Wire Wire Line
+ 10150 1000 10700 1000
+Wire Wire Line
+ 900 600 7250 600
+Wire Wire Line
+ 5250 1450 5250 1650
+Wire Wire Line
+ 5250 1650 6200 1650
+Wire Wire Line
+ 1200 1450 1200 700
+Wire Wire Line
+ 1200 700 7250 700
+Connection ~ 1200 1450
+Wire Wire Line
+ 1150 2100 2550 2100
+Wire Wire Line
+ 4200 2100 5250 2100
+Wire Wire Line
+ 5250 2100 5250 1750
+Wire Wire Line
+ 5250 1750 6200 1750
+Wire Wire Line
+ 1400 2100 1400 800
+Wire Wire Line
+ 1400 800 7250 800
+Connection ~ 1400 2100
+Wire Wire Line
+ 3150 2100 3150 3450
+Wire Wire Line
+ 3150 3450 6200 3450
+Connection ~ 3150 2100
+Wire Wire Line
+ 4900 2250 4900 4000
+Wire Wire Line
+ 4900 2250 6200 2250
+Wire Wire Line
+ 4900 4000 6200 4000
+Connection ~ 4900 2750
+$Comp
+L d_inverter U30
+U 1 1 6803A0F5
+P 3850 3300
+F 0 "U30" H 3850 3200 60 0000 C CNN
+F 1 "d_inverter" H 3850 3450 60 0000 C CNN
+F 2 "" H 3900 3250 60 0000 C CNN
+F 3 "" H 3900 3250 60 0000 C CNN
+ 1 3850 3300
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 1550 2750 1550 900
+Wire Wire Line
+ 1550 900 7250 900
+Connection ~ 1550 2750
+Wire Wire Line
+ 1350 3400 2400 3400
+Wire Wire Line
+ 3000 3400 3550 3400
+Wire Wire Line
+ 3550 3400 3550 3300
+Wire Wire Line
+ 1650 3400 1650 1000
+Wire Wire Line
+ 1650 1000 7250 1000
+Connection ~ 1650 3400
+Wire Wire Line
+ 5400 3300 4150 3300
+Wire Wire Line
+ 5400 1850 5400 4100
+Wire Wire Line
+ 5400 1850 6200 1850
+Wire Wire Line
+ 5400 2350 6200 2350
+Connection ~ 5400 2350
+Wire Wire Line
+ 5400 3550 6200 3550
+Connection ~ 5400 3300
+Wire Wire Line
+ 5400 4100 6200 4100
+Connection ~ 5400 3550
+Wire Wire Line
+ 3000 3400 3000 5100
+Wire Wire Line
+ 3000 5100 6200 5100
+Connection ~ 3000 3400
+$Comp
+L d_inverter U28
+U 1 1 6803A9D1
+P 3700 3950
+F 0 "U28" H 3700 3850 60 0000 C CNN
+F 1 "d_inverter" H 3700 4100 60 0000 C CNN
+F 2 "" H 3750 3900 60 0000 C CNN
+F 3 "" H 3750 3900 60 0000 C CNN
+ 1 3700 3950
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_inverter U29
+U 1 1 6803AA4C
+P 3750 4550
+F 0 "U29" H 3750 4450 60 0000 C CNN
+F 1 "d_inverter" H 3750 4700 60 0000 C CNN
+F 2 "" H 3800 4500 60 0000 C CNN
+F 3 "" H 3800 4500 60 0000 C CNN
+ 1 3750 4550
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4000 3950 5650 3950
+Wire Wire Line
+ 5650 3650 5650 4200
+Wire Wire Line
+ 5650 3650 6200 3650
+Wire Wire Line
+ 5650 4200 6200 4200
+Connection ~ 5650 3950
+Wire Wire Line
+ 3100 3950 3100 4400
+Wire Wire Line
+ 3100 4400 5550 4400
+Wire Wire Line
+ 5550 2750 5550 5400
+Wire Wire Line
+ 5550 2750 6200 2750
+Connection ~ 3100 3950
+Wire Wire Line
+ 5550 5400 6200 5400
+Connection ~ 5550 4400
+Wire Wire Line
+ 1950 3950 1950 1150
+Wire Wire Line
+ 1950 1150 7250 1150
+Connection ~ 1950 3950
+$Comp
+L 4_and X6
+U 1 1 6803B5B1
+P 7650 1300
+F 0 "X6" H 7700 1250 60 0000 C CNN
+F 1 "4_and" H 7750 1400 60 0000 C CNN
+F 2 "" H 7650 1300 60 0000 C CNN
+F 3 "" H 7650 1300 60 0000 C CNN
+ 1 7650 1300
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5800 1450 7250 1450
+Wire Wire Line
+ 8200 1300 8150 1300
+Wire Wire Line
+ 4250 5900 4250 6100
+Connection ~ 5800 6100
+Wire Wire Line
+ 1700 5200 1900 5200
+Wire Wire Line
+ 1900 5200 1900 5750
+Wire Wire Line
+ 5600 3150 5600 6000
+Wire Wire Line
+ 5600 6000 6200 6000
+Wire Wire Line
+ 5600 4800 6200 4800
+Connection ~ 5600 5750
+Wire Wire Line
+ 5600 3150 6200 3150
+Connection ~ 5600 4800
+Wire Wire Line
+ 2000 1350 2000 5750
+Wire Wire Line
+ 2000 1350 7250 1350
+Connection ~ 2000 5750
+Wire Wire Line
+ 3450 4600 3450 4550
+Wire Wire Line
+ 2350 4600 2350 1250
+Wire Wire Line
+ 2350 1250 7250 1250
+Connection ~ 2350 4600
+Wire Wire Line
+ 3150 4600 3150 5700
+Wire Wire Line
+ 3150 5700 6200 5700
+Connection ~ 3150 4600
+Wire Wire Line
+ 6000 5700 6000 4500
+Wire Wire Line
+ 6000 4500 6200 4500
+Connection ~ 6000 5700
+Wire Wire Line
+ 5750 4550 4050 4550
+Wire Wire Line
+ 5750 1950 5750 4550
+Wire Wire Line
+ 5750 1950 6200 1950
+Wire Wire Line
+ 5750 2450 6200 2450
+Connection ~ 5750 2450
+Wire Wire Line
+ 5750 2850 6200 2850
+Connection ~ 5750 2850
+$Comp
+L d_inverter U37
+U 1 1 68036AB6
+P 3000 1450
+F 0 "U37" H 3000 1350 60 0000 C CNN
+F 1 "d_inverter" H 3000 1600 60 0000 C CNN
+F 2 "" H 3050 1400 60 0000 C CNN
+F 3 "" H 3050 1400 60 0000 C CNN
+ 1 3000 1450
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 1050 1450 2700 1450
+Wire Wire Line
+ 3300 1450 5250 1450
+$Comp
+L d_inverter U35
+U 1 1 6803703F
+P 2850 2100
+F 0 "U35" H 2850 2000 60 0000 C CNN
+F 1 "d_inverter" H 2850 2250 60 0000 C CNN
+F 2 "" H 2900 2050 60 0000 C CNN
+F 3 "" H 2900 2050 60 0000 C CNN
+ 1 2850 2100
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 3150 2100 3600 2100
+$Comp
+L d_inverter U32
+U 1 1 68037359
+P 2750 2750
+F 0 "U32" H 2750 2650 60 0000 C CNN
+F 1 "d_inverter" H 2750 2900 60 0000 C CNN
+F 2 "" H 2800 2700 60 0000 C CNN
+F 3 "" H 2800 2700 60 0000 C CNN
+ 1 2750 2750
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 1250 2750 2450 2750
+Wire Wire Line
+ 3050 2750 4900 2750
+$Comp
+L d_inverter U31
+U 1 1 680376A2
+P 2700 3400
+F 0 "U31" H 2700 3300 60 0000 C CNN
+F 1 "d_inverter" H 2700 3550 60 0000 C CNN
+F 2 "" H 2750 3350 60 0000 C CNN
+F 3 "" H 2750 3350 60 0000 C CNN
+ 1 2700 3400
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_inverter U34
+U 1 1 6803789B
+P 2800 3950
+F 0 "U34" H 2800 3850 60 0000 C CNN
+F 1 "d_inverter" H 2800 4100 60 0000 C CNN
+F 2 "" H 2850 3900 60 0000 C CNN
+F 3 "" H 2850 3900 60 0000 C CNN
+ 1 2800 3950
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 1450 3950 2500 3950
+Wire Wire Line
+ 3100 3950 3400 3950
+$Comp
+L d_inverter U36
+U 1 1 68037CD4
+P 2850 4600
+F 0 "U36" H 2850 4500 60 0000 C CNN
+F 1 "d_inverter" H 2850 4750 60 0000 C CNN
+F 2 "" H 2900 4550 60 0000 C CNN
+F 3 "" H 2900 4550 60 0000 C CNN
+ 1 2850 4600
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 1600 4600 2550 4600
+Wire Wire Line
+ 3150 4600 3450 4600
+$Comp
+L d_inverter U33
+U 1 1 68037FCC
+P 2750 5750
+F 0 "U33" H 2750 5650 60 0000 C CNN
+F 1 "d_inverter" H 2750 5900 60 0000 C CNN
+F 2 "" H 2800 5700 60 0000 C CNN
+F 3 "" H 2800 5700 60 0000 C CNN
+ 1 2750 5750
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 1900 5750 2450 5750
+Wire Wire Line
+ 3050 5750 5600 5750
+$Comp
+L d_inverter U38
+U 1 1 680382A1
+P 3450 5900
+F 0 "U38" H 3450 5800 60 0000 C CNN
+F 1 "d_inverter" H 3450 6050 60 0000 C CNN
+F 2 "" H 3500 5850 60 0000 C CNN
+F 3 "" H 3500 5850 60 0000 C CNN
+ 1 3450 5900
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 1850 5900 3150 5900
+Wire Wire Line
+ 3750 5900 4250 5900
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/SN74LS148/74148.sub b/library/SubcircuitLibrary/SN74LS148/74148.sub
new file mode 100644
index 00000000..a4dc5a51
--- /dev/null
+++ b/library/SubcircuitLibrary/SN74LS148/74148.sub
@@ -0,0 +1,164 @@
+* Subcircuit 74148
+.subckt 74148 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_
+* c:\fossee\esim\library\subcircuitlibrary\74148\74148.cir
+.include 4_and.sub
+.include 3_and.sub
+.include 5_and.sub
+* u2 net-_u2-pad1_ net-_u2-pad2_ d_inverter
+* u11 net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_nor
+* u10 net-_u10-pad1_ net-_u10-pad2_ net-_u10-pad3_ d_nor
+* u17 net-_u10-pad3_ net-_u10-pad3_ net-_u17-pad3_ d_nor
+* u18 net-_u11-pad3_ net-_u11-pad3_ net-_u18-pad3_ d_nor
+* u25 net-_u17-pad3_ net-_u18-pad3_ net-_u1-pad12_ d_nor
+* u13 net-_u13-pad1_ net-_u13-pad2_ net-_u13-pad3_ d_nor
+* u12 net-_u12-pad1_ net-_u12-pad2_ net-_u12-pad3_ d_nor
+* u19 net-_u12-pad3_ net-_u12-pad3_ net-_u19-pad3_ d_nor
+* u20 net-_u13-pad3_ net-_u13-pad3_ net-_u20-pad3_ d_nor
+* u26 net-_u19-pad3_ net-_u20-pad3_ net-_u1-pad13_ d_nor
+* u15 net-_u15-pad1_ net-_u15-pad2_ net-_u15-pad3_ d_nor
+* u14 net-_u14-pad1_ net-_u14-pad2_ net-_u14-pad3_ d_nor
+* u21 net-_u14-pad3_ net-_u14-pad3_ net-_u21-pad3_ d_nor
+* u22 net-_u15-pad3_ net-_u15-pad3_ net-_u22-pad3_ d_nor
+* u27 net-_u21-pad3_ net-_u22-pad3_ net-_u1-pad14_ d_nor
+* u24 net-_u1-pad10_ net-_u24-pad2_ net-_u1-pad11_ d_nand
+x7 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u16-pad1_ 5_and
+* u16 net-_u16-pad1_ net-_u16-pad2_ net-_u16-pad3_ d_and
+* u23 net-_u16-pad3_ net-_u1-pad10_ d_inverter
+x5 net-_u37-pad2_ net-_u2-pad2_ net-_u30-pad2_ net-_u29-pad2_ net-_u24-pad2_ net-_u10-pad1_ 5_and
+x2 net-_u32-pad2_ net-_u30-pad2_ net-_u29-pad2_ net-_u24-pad2_ net-_u10-pad2_ 4_and
+x1 net-_u28-pad1_ net-_u29-pad2_ net-_u24-pad2_ net-_u11-pad1_ 3_and
+* u3 net-_u3-pad1_ net-_u24-pad2_ net-_u11-pad2_ d_and
+x3 net-_u2-pad1_ net-_u30-pad2_ net-_u28-pad2_ net-_u24-pad2_ net-_u12-pad1_ 4_and
+x4 net-_u32-pad2_ net-_u30-pad2_ net-_u28-pad2_ net-_u24-pad2_ net-_u12-pad2_ 4_and
+* u4 net-_u29-pad1_ net-_u24-pad2_ net-_u13-pad1_ d_and
+* u5 net-_u3-pad1_ net-_u24-pad2_ net-_u13-pad2_ d_and
+* u6 net-_u30-pad1_ net-_u24-pad2_ net-_u14-pad1_ d_and
+* u7 net-_u28-pad1_ net-_u24-pad2_ net-_u14-pad2_ d_and
+* u8 net-_u29-pad1_ net-_u24-pad2_ net-_u15-pad1_ d_and
+* u9 net-_u3-pad1_ net-_u24-pad2_ net-_u15-pad2_ d_and
+* u30 net-_u30-pad1_ net-_u30-pad2_ d_inverter
+* u28 net-_u28-pad1_ net-_u28-pad2_ d_inverter
+* u29 net-_u29-pad1_ net-_u29-pad2_ d_inverter
+x6 net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u24-pad2_ net-_u16-pad2_ 4_and
+* u37 net-_u1-pad2_ net-_u37-pad2_ d_inverter
+* u35 net-_u1-pad3_ net-_u2-pad1_ d_inverter
+* u32 net-_u1-pad4_ net-_u32-pad2_ d_inverter
+* u31 net-_u1-pad5_ net-_u30-pad1_ d_inverter
+* u34 net-_u1-pad6_ net-_u28-pad1_ d_inverter
+* u36 net-_u1-pad7_ net-_u29-pad1_ d_inverter
+* u33 net-_u1-pad8_ net-_u3-pad1_ d_inverter
+* u38 net-_u1-pad9_ net-_u24-pad2_ d_inverter
+a1 net-_u2-pad1_ net-_u2-pad2_ u2
+a2 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11
+a3 [net-_u10-pad1_ net-_u10-pad2_ ] net-_u10-pad3_ u10
+a4 [net-_u10-pad3_ net-_u10-pad3_ ] net-_u17-pad3_ u17
+a5 [net-_u11-pad3_ net-_u11-pad3_ ] net-_u18-pad3_ u18
+a6 [net-_u17-pad3_ net-_u18-pad3_ ] net-_u1-pad12_ u25
+a7 [net-_u13-pad1_ net-_u13-pad2_ ] net-_u13-pad3_ u13
+a8 [net-_u12-pad1_ net-_u12-pad2_ ] net-_u12-pad3_ u12
+a9 [net-_u12-pad3_ net-_u12-pad3_ ] net-_u19-pad3_ u19
+a10 [net-_u13-pad3_ net-_u13-pad3_ ] net-_u20-pad3_ u20
+a11 [net-_u19-pad3_ net-_u20-pad3_ ] net-_u1-pad13_ u26
+a12 [net-_u15-pad1_ net-_u15-pad2_ ] net-_u15-pad3_ u15
+a13 [net-_u14-pad1_ net-_u14-pad2_ ] net-_u14-pad3_ u14
+a14 [net-_u14-pad3_ net-_u14-pad3_ ] net-_u21-pad3_ u21
+a15 [net-_u15-pad3_ net-_u15-pad3_ ] net-_u22-pad3_ u22
+a16 [net-_u21-pad3_ net-_u22-pad3_ ] net-_u1-pad14_ u27
+a17 [net-_u1-pad10_ net-_u24-pad2_ ] net-_u1-pad11_ u24
+a18 [net-_u16-pad1_ net-_u16-pad2_ ] net-_u16-pad3_ u16
+a19 net-_u16-pad3_ net-_u1-pad10_ u23
+a20 [net-_u3-pad1_ net-_u24-pad2_ ] net-_u11-pad2_ u3
+a21 [net-_u29-pad1_ net-_u24-pad2_ ] net-_u13-pad1_ u4
+a22 [net-_u3-pad1_ net-_u24-pad2_ ] net-_u13-pad2_ u5
+a23 [net-_u30-pad1_ net-_u24-pad2_ ] net-_u14-pad1_ u6
+a24 [net-_u28-pad1_ net-_u24-pad2_ ] net-_u14-pad2_ u7
+a25 [net-_u29-pad1_ net-_u24-pad2_ ] net-_u15-pad1_ u8
+a26 [net-_u3-pad1_ net-_u24-pad2_ ] net-_u15-pad2_ u9
+a27 net-_u30-pad1_ net-_u30-pad2_ u30
+a28 net-_u28-pad1_ net-_u28-pad2_ u28
+a29 net-_u29-pad1_ net-_u29-pad2_ u29
+a30 net-_u1-pad2_ net-_u37-pad2_ u37
+a31 net-_u1-pad3_ net-_u2-pad1_ u35
+a32 net-_u1-pad4_ net-_u32-pad2_ u32
+a33 net-_u1-pad5_ net-_u30-pad1_ u31
+a34 net-_u1-pad6_ net-_u28-pad1_ u34
+a35 net-_u1-pad7_ net-_u29-pad1_ u36
+a36 net-_u1-pad8_ net-_u3-pad1_ u33
+a37 net-_u1-pad9_ net-_u24-pad2_ u38
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u11 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u10 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u17 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u18 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u25 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u13 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u12 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u19 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u20 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u26 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u15 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u14 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u21 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u22 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u27 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_nand, NgSpice Name: d_nand
+.model u24 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u16 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u23 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u4 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u5 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u6 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u7 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u8 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u9 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u30 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u28 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u29 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u37 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u35 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u32 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u31 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u34 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u36 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u33 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u38 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Control Statements
+
+.ends 74148 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/SN74LS148/74148_Previous_Values.xml b/library/SubcircuitLibrary/SN74LS148/74148_Previous_Values.xml
new file mode 100644
index 00000000..590eac2d
--- /dev/null
+++ b/library/SubcircuitLibrary/SN74LS148/74148_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">d_inverter<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u2><u11 name="type">d_nor<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u11><u10 name="type">d_nor<field7 name="Enter Rise Delay (default=1.0e-9)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter Input Load (default=1.0e-12)" /></u10><u17 name="type">d_nor<field10 name="Enter Rise Delay (default=1.0e-9)" /><field11 name="Enter Fall Delay (default=1.0e-9)" /><field12 name="Enter Input Load (default=1.0e-12)" /></u17><u18 name="type">d_nor<field13 name="Enter Rise Delay (default=1.0e-9)" /><field14 name="Enter Fall Delay (default=1.0e-9)" /><field15 name="Enter Input Load (default=1.0e-12)" /></u18><u25 name="type">d_nor<field16 name="Enter Rise Delay (default=1.0e-9)" /><field17 name="Enter Fall Delay (default=1.0e-9)" /><field18 name="Enter Input Load (default=1.0e-12)" /></u25><u13 name="type">d_nor<field19 name="Enter Rise Delay (default=1.0e-9)" /><field20 name="Enter Fall Delay (default=1.0e-9)" /><field21 name="Enter Input Load (default=1.0e-12)" /></u13><u12 name="type">d_nor<field22 name="Enter Rise Delay (default=1.0e-9)" /><field23 name="Enter Fall Delay (default=1.0e-9)" /><field24 name="Enter Input Load (default=1.0e-12)" /></u12><u19 name="type">d_nor<field25 name="Enter Rise Delay (default=1.0e-9)" /><field26 name="Enter Fall Delay (default=1.0e-9)" /><field27 name="Enter Input Load (default=1.0e-12)" /></u19><u20 name="type">d_nor<field28 name="Enter Rise Delay (default=1.0e-9)" /><field29 name="Enter Fall Delay (default=1.0e-9)" /><field30 name="Enter Input Load (default=1.0e-12)" /></u20><u26 name="type">d_nor<field31 name="Enter Rise Delay (default=1.0e-9)" /><field32 name="Enter Fall Delay (default=1.0e-9)" /><field33 name="Enter Input Load (default=1.0e-12)" /></u26><u15 name="type">d_nor<field34 name="Enter Rise Delay (default=1.0e-9)" /><field35 name="Enter Fall Delay (default=1.0e-9)" /><field36 name="Enter Input Load (default=1.0e-12)" /></u15><u14 name="type">d_nor<field37 name="Enter Rise Delay (default=1.0e-9)" /><field38 name="Enter Fall Delay (default=1.0e-9)" /><field39 name="Enter Input Load (default=1.0e-12)" /></u14><u21 name="type">d_nor<field40 name="Enter Rise Delay (default=1.0e-9)" /><field41 name="Enter Fall Delay (default=1.0e-9)" /><field42 name="Enter Input Load (default=1.0e-12)" /></u21><u22 name="type">d_nor<field43 name="Enter Rise Delay (default=1.0e-9)" /><field44 name="Enter Fall Delay (default=1.0e-9)" /><field45 name="Enter Input Load (default=1.0e-12)" /></u22><u27 name="type">d_nor<field46 name="Enter Rise Delay (default=1.0e-9)" /><field47 name="Enter Fall Delay (default=1.0e-9)" /><field48 name="Enter Input Load (default=1.0e-12)" /></u27><u24 name="type">d_nand<field49 name="Enter Rise Delay (default=1.0e-9)" /><field50 name="Enter Fall Delay (default=1.0e-9)" /><field51 name="Enter Input Load (default=1.0e-12)" /></u24><u16 name="type">d_and<field52 name="Enter Rise Delay (default=1.0e-9)" /><field53 name="Enter Fall Delay (default=1.0e-9)" /><field54 name="Enter Input Load (default=1.0e-12)" /></u16><u23 name="type">d_inverter<field55 name="Enter Rise Delay (default=1.0e-9)" /><field56 name="Enter Fall Delay (default=1.0e-9)" /><field57 name="Enter Input Load (default=1.0e-12)" /></u23><u3 name="type">d_and<field58 name="Enter Rise Delay (default=1.0e-9)" /><field59 name="Enter Fall Delay (default=1.0e-9)" /><field60 name="Enter Input Load (default=1.0e-12)" /></u3><u4 name="type">d_and<field61 name="Enter Rise Delay (default=1.0e-9)" /><field62 name="Enter Fall Delay (default=1.0e-9)" /><field63 name="Enter Input Load (default=1.0e-12)" /></u4><u5 name="type">d_and<field64 name="Enter Rise Delay (default=1.0e-9)" /><field65 name="Enter Fall Delay (default=1.0e-9)" /><field66 name="Enter Input Load (default=1.0e-12)" /></u5><u6 name="type">d_and<field67 name="Enter Rise Delay (default=1.0e-9)" /><field68 name="Enter Fall Delay (default=1.0e-9)" /><field69 name="Enter Input Load (default=1.0e-12)" /></u6><u7 name="type">d_and<field70 name="Enter Rise Delay (default=1.0e-9)" /><field71 name="Enter Fall Delay (default=1.0e-9)" /><field72 name="Enter Input Load (default=1.0e-12)" /></u7><u8 name="type">d_and<field73 name="Enter Rise Delay (default=1.0e-9)" /><field74 name="Enter Fall Delay (default=1.0e-9)" /><field75 name="Enter Input Load (default=1.0e-12)" /></u8><u9 name="type">d_and<field76 name="Enter Rise Delay (default=1.0e-9)" /><field77 name="Enter Fall Delay (default=1.0e-9)" /><field78 name="Enter Input Load (default=1.0e-12)" /></u9><u30 name="type">d_inverter<field79 name="Enter Rise Delay (default=1.0e-9)" /><field80 name="Enter Fall Delay (default=1.0e-9)" /><field81 name="Enter Input Load (default=1.0e-12)" /></u30><u28 name="type">d_inverter<field82 name="Enter Rise Delay (default=1.0e-9)" /><field83 name="Enter Fall Delay (default=1.0e-9)" /><field84 name="Enter Input Load (default=1.0e-12)" /></u28><u29 name="type">d_inverter<field85 name="Enter Rise Delay (default=1.0e-9)" /><field86 name="Enter Fall Delay (default=1.0e-9)" /><field87 name="Enter Input Load (default=1.0e-12)" /></u29><u37 name="type">d_inverter<field88 name="Enter Rise Delay (default=1.0e-9)" /><field89 name="Enter Fall Delay (default=1.0e-9)" /><field90 name="Enter Input Load (default=1.0e-12)" /></u37><u35 name="type">d_inverter<field91 name="Enter Rise Delay (default=1.0e-9)" /><field92 name="Enter Fall Delay (default=1.0e-9)" /><field93 name="Enter Input Load (default=1.0e-12)" /></u35><u32 name="type">d_inverter<field94 name="Enter Rise Delay (default=1.0e-9)" /><field95 name="Enter Fall Delay (default=1.0e-9)" /><field96 name="Enter Input Load (default=1.0e-12)" /></u32><u31 name="type">d_inverter<field97 name="Enter Rise Delay (default=1.0e-9)" /><field98 name="Enter Fall Delay (default=1.0e-9)" /><field99 name="Enter Input Load (default=1.0e-12)" /></u31><u34 name="type">d_inverter<field100 name="Enter Rise Delay (default=1.0e-9)" /><field101 name="Enter Fall Delay (default=1.0e-9)" /><field102 name="Enter Input Load (default=1.0e-12)" /></u34><u36 name="type">d_inverter<field103 name="Enter Rise Delay (default=1.0e-9)" /><field104 name="Enter Fall Delay (default=1.0e-9)" /><field105 name="Enter Input Load (default=1.0e-12)" /></u36><u33 name="type">d_inverter<field106 name="Enter Rise Delay (default=1.0e-9)" /><field107 name="Enter Fall Delay (default=1.0e-9)" /><field108 name="Enter Input Load (default=1.0e-12)" /></u33><u38 name="type">d_inverter<field109 name="Enter Rise Delay (default=1.0e-9)" /><field110 name="Enter Fall Delay (default=1.0e-9)" /><field111 name="Enter Input Load (default=1.0e-12)" /></u38></model><devicemodel /><subcircuit><x7><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x7><x5><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x5><x2><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x2><x1><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\3_and</field></x1><x3><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x3><x4><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x4><x6><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x6></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/SN74LS148/analysis b/library/SubcircuitLibrary/SN74LS148/analysis
new file mode 100644
index 00000000..7dec7ebc
--- /dev/null
+++ b/library/SubcircuitLibrary/SN74LS148/analysis
@@ -0,0 +1 @@
+.tran 10e-03 50e-00 0e-03 \ No newline at end of file
generated by cgit (git 2.34.1) at 2025-05-24 01:45:20 +0000