8 files changed, 1592 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/DM54154/DM54154-cache.lib b/library/SubcircuitLibrary/DM54154/DM54154-cache.lib
new file mode 100644
index 00000000..e91eb121
--- /dev/null
+++ b/library/SubcircuitLibrary/DM54154/DM54154-cache.lib
@@ -0,0 +1,95 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 5_and
+#
+DEF 5_and X 0 40 Y Y 1 F N
+F0 "X" 50 -100 60 H V C CNN
+F1 "5_and" 100 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 255 787 -787 0 1 0 N 150 250 150 -250
+P 2 0 1 0 -250 250 150 250 N
+P 3 0 1 0 -250 250 -250 -250 150 -250 N
+X in1 1 -450 200 200 R 50 50 1 1 I
+X in2 2 -450 100 200 R 50 50 1 1 I
+X in3 3 -450 0 200 R 50 50 1 1 I
+X in4 4 -450 -100 200 R 50 50 1 1 I
+X in5 5 -450 -200 200 R 50 50 1 1 I
+X out 6 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# d_nand
+#
+DEF d_nand U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_nand" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
+A 150 49 100 6 900 0 1 0 N 250 50 150 150
+P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N
+X IN1 1 -450 100 200 R 50 50 1 1 I
+X IN2 2 -450 0 200 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/DM54154/DM54154.cir b/library/SubcircuitLibrary/DM54154/DM54154.cir
new file mode 100644
index 00000000..fa570ab3
--- /dev/null
+++ b/library/SubcircuitLibrary/DM54154/DM54154.cir
@@ -0,0 +1,52 @@
+* C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\DM54154\DM54154.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 04/11/25 19:13:22
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U7  Net-_U2-Pad2_ Net-_U7-Pad2_ d_inverter		
+U8  Net-_U3-Pad2_ Net-_U8-Pad2_ d_inverter		
+U9  Net-_U4-Pad2_ Net-_U9-Pad2_ d_inverter		
+U10  Net-_U10-Pad1_ Net-_U10-Pad2_ d_inverter		
+X1  Net-_U6-Pad3_ Net-_U2-Pad2_ Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U10-Pad1_ Net-_U11-Pad1_ 5_and		
+X2  Net-_U6-Pad3_ Net-_U7-Pad2_ Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U10-Pad1_ Net-_U12-Pad1_ 5_and		
+X3  Net-_U6-Pad3_ Net-_U2-Pad2_ Net-_U8-Pad2_ Net-_U4-Pad2_ Net-_U10-Pad1_ Net-_U13-Pad1_ 5_and		
+X4  Net-_U6-Pad3_ Net-_U7-Pad2_ Net-_U8-Pad2_ Net-_U4-Pad2_ Net-_U10-Pad1_ Net-_U14-Pad1_ 5_and		
+X5  Net-_U6-Pad3_ Net-_U2-Pad2_ Net-_U3-Pad2_ Net-_U9-Pad2_ Net-_U10-Pad1_ Net-_U15-Pad1_ 5_and		
+X6  Net-_U6-Pad3_ Net-_U7-Pad2_ Net-_U3-Pad2_ Net-_U9-Pad2_ Net-_U10-Pad1_ Net-_U16-Pad1_ 5_and		
+X7  Net-_U6-Pad3_ Net-_U2-Pad2_ Net-_U8-Pad2_ Net-_U9-Pad2_ Net-_U10-Pad1_ Net-_U17-Pad1_ 5_and		
+X8  Net-_U6-Pad3_ Net-_U7-Pad2_ Net-_U8-Pad2_ Net-_U9-Pad2_ Net-_U10-Pad1_ Net-_U18-Pad1_ 5_and		
+X9  Net-_U6-Pad3_ Net-_U2-Pad2_ Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U10-Pad2_ Net-_U19-Pad1_ 5_and		
+X10  Net-_U6-Pad3_ Net-_U7-Pad2_ Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U10-Pad2_ Net-_U20-Pad1_ 5_and		
+X11  Net-_U6-Pad3_ Net-_U2-Pad2_ Net-_U8-Pad2_ Net-_U4-Pad2_ Net-_U10-Pad2_ Net-_U21-Pad1_ 5_and		
+X12  Net-_U6-Pad3_ Net-_U7-Pad2_ Net-_U8-Pad2_ Net-_U4-Pad2_ Net-_U10-Pad2_ Net-_U22-Pad1_ 5_and		
+X13  Net-_U6-Pad3_ Net-_U2-Pad2_ Net-_U3-Pad2_ Net-_U9-Pad2_ Net-_U10-Pad2_ Net-_U23-Pad1_ 5_and		
+X14  Net-_U6-Pad3_ Net-_U7-Pad2_ Net-_U3-Pad2_ Net-_U9-Pad2_ Net-_U10-Pad2_ Net-_U24-Pad1_ 5_and		
+X15  Net-_U6-Pad3_ Net-_U2-Pad2_ Net-_U8-Pad2_ Net-_U9-Pad2_ Net-_U10-Pad2_ Net-_U25-Pad1_ 5_and		
+X16  Net-_U6-Pad3_ Net-_U7-Pad2_ Net-_U8-Pad2_ Net-_U9-Pad2_ Net-_U10-Pad2_ Net-_U26-Pad1_ 5_and		
+U2  Net-_U1-Pad1_ Net-_U2-Pad2_ d_inverter		
+U3  Net-_U1-Pad2_ Net-_U3-Pad2_ d_inverter		
+U4  Net-_U1-Pad3_ Net-_U4-Pad2_ d_inverter		
+U5  Net-_U1-Pad4_ Net-_U10-Pad1_ d_inverter		
+U11  Net-_U11-Pad1_ Net-_U1-Pad11_ d_inverter		
+U12  Net-_U12-Pad1_ Net-_U1-Pad12_ d_inverter		
+U13  Net-_U13-Pad1_ Net-_U1-Pad13_ d_inverter		
+U14  Net-_U14-Pad1_ Net-_U1-Pad14_ d_inverter		
+U15  Net-_U15-Pad1_ Net-_U1-Pad15_ d_inverter		
+U16  Net-_U16-Pad1_ Net-_U1-Pad7_ d_inverter		
+U17  Net-_U17-Pad1_ Net-_U1-Pad8_ d_inverter		
+U18  Net-_U18-Pad1_ Net-_U1-Pad9_ d_inverter		
+U19  Net-_U19-Pad1_ Net-_U1-Pad16_ d_inverter		
+U20  Net-_U20-Pad1_ Net-_U1-Pad17_ d_inverter		
+U21  Net-_U21-Pad1_ Net-_U1-Pad18_ d_inverter		
+U22  Net-_U22-Pad1_ Net-_U1-Pad10_ d_inverter		
+U23  Net-_U23-Pad1_ Net-_U1-Pad20_ d_inverter		
+U24  Net-_U24-Pad1_ Net-_U1-Pad21_ d_inverter		
+U25  Net-_U25-Pad1_ Net-_U1-Pad19_ d_inverter		
+U26  Net-_U26-Pad1_ Net-_U1-Pad22_ d_inverter		
+U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ Net-_U1-Pad15_ Net-_U1-Pad16_ Net-_U1-Pad17_ Net-_U1-Pad18_ Net-_U1-Pad19_ Net-_U1-Pad20_ Net-_U1-Pad21_ Net-_U1-Pad22_ PORT		
+U6  Net-_U1-Pad6_ Net-_U1-Pad5_ Net-_U6-Pad3_ d_nand		
+
+.end
diff --git a/library/SubcircuitLibrary/DM54154/DM54154.cir.out b/library/SubcircuitLibrary/DM54154/DM54154.cir.out
new file mode 100644
index 00000000..e99421ac
--- /dev/null
+++ b/library/SubcircuitLibrary/DM54154/DM54154.cir.out
@@ -0,0 +1,129 @@
+* c:\users\senba\desktop\fossee\esim\library\subcircuitlibrary\dm54154\dm54154.cir
+
+.include 5_and.sub
+* u7  net-_u2-pad2_ net-_u7-pad2_ d_inverter
+* u8  net-_u3-pad2_ net-_u8-pad2_ d_inverter
+* u9  net-_u4-pad2_ net-_u9-pad2_ d_inverter
+* u10  net-_u10-pad1_ net-_u10-pad2_ d_inverter
+x1 net-_u6-pad3_ net-_u2-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u10-pad1_ net-_u11-pad1_ 5_and
+x2 net-_u6-pad3_ net-_u7-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u10-pad1_ net-_u12-pad1_ 5_and
+x3 net-_u6-pad3_ net-_u2-pad2_ net-_u8-pad2_ net-_u4-pad2_ net-_u10-pad1_ net-_u13-pad1_ 5_and
+x4 net-_u6-pad3_ net-_u7-pad2_ net-_u8-pad2_ net-_u4-pad2_ net-_u10-pad1_ net-_u14-pad1_ 5_and
+x5 net-_u6-pad3_ net-_u2-pad2_ net-_u3-pad2_ net-_u9-pad2_ net-_u10-pad1_ net-_u15-pad1_ 5_and
+x6 net-_u6-pad3_ net-_u7-pad2_ net-_u3-pad2_ net-_u9-pad2_ net-_u10-pad1_ net-_u16-pad1_ 5_and
+x7 net-_u6-pad3_ net-_u2-pad2_ net-_u8-pad2_ net-_u9-pad2_ net-_u10-pad1_ net-_u17-pad1_ 5_and
+x8 net-_u6-pad3_ net-_u7-pad2_ net-_u8-pad2_ net-_u9-pad2_ net-_u10-pad1_ net-_u18-pad1_ 5_and
+x9 net-_u6-pad3_ net-_u2-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u10-pad2_ net-_u19-pad1_ 5_and
+x10 net-_u6-pad3_ net-_u7-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u10-pad2_ net-_u20-pad1_ 5_and
+x11 net-_u6-pad3_ net-_u2-pad2_ net-_u8-pad2_ net-_u4-pad2_ net-_u10-pad2_ net-_u21-pad1_ 5_and
+x12 net-_u6-pad3_ net-_u7-pad2_ net-_u8-pad2_ net-_u4-pad2_ net-_u10-pad2_ net-_u22-pad1_ 5_and
+x13 net-_u6-pad3_ net-_u2-pad2_ net-_u3-pad2_ net-_u9-pad2_ net-_u10-pad2_ net-_u23-pad1_ 5_and
+x14 net-_u6-pad3_ net-_u7-pad2_ net-_u3-pad2_ net-_u9-pad2_ net-_u10-pad2_ net-_u24-pad1_ 5_and
+x15 net-_u6-pad3_ net-_u2-pad2_ net-_u8-pad2_ net-_u9-pad2_ net-_u10-pad2_ net-_u25-pad1_ 5_and
+x16 net-_u6-pad3_ net-_u7-pad2_ net-_u8-pad2_ net-_u9-pad2_ net-_u10-pad2_ net-_u26-pad1_ 5_and
+* u2  net-_u1-pad1_ net-_u2-pad2_ d_inverter
+* u3  net-_u1-pad2_ net-_u3-pad2_ d_inverter
+* u4  net-_u1-pad3_ net-_u4-pad2_ d_inverter
+* u5  net-_u1-pad4_ net-_u10-pad1_ d_inverter
+* u11  net-_u11-pad1_ net-_u1-pad11_ d_inverter
+* u12  net-_u12-pad1_ net-_u1-pad12_ d_inverter
+* u13  net-_u13-pad1_ net-_u1-pad13_ d_inverter
+* u14  net-_u14-pad1_ net-_u1-pad14_ d_inverter
+* u15  net-_u15-pad1_ net-_u1-pad15_ d_inverter
+* u16  net-_u16-pad1_ net-_u1-pad7_ d_inverter
+* u17  net-_u17-pad1_ net-_u1-pad8_ d_inverter
+* u18  net-_u18-pad1_ net-_u1-pad9_ d_inverter
+* u19  net-_u19-pad1_ net-_u1-pad16_ d_inverter
+* u20  net-_u20-pad1_ net-_u1-pad17_ d_inverter
+* u21  net-_u21-pad1_ net-_u1-pad18_ d_inverter
+* u22  net-_u22-pad1_ net-_u1-pad10_ d_inverter
+* u23  net-_u23-pad1_ net-_u1-pad20_ d_inverter
+* u24  net-_u24-pad1_ net-_u1-pad21_ d_inverter
+* u25  net-_u25-pad1_ net-_u1-pad19_ d_inverter
+* u26  net-_u26-pad1_ net-_u1-pad22_ d_inverter
+* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_u1-pad17_ net-_u1-pad18_ net-_u1-pad19_ net-_u1-pad20_ net-_u1-pad21_ net-_u1-pad22_ port
+* u6  net-_u1-pad6_ net-_u1-pad5_ net-_u6-pad3_ d_nand
+a1 net-_u2-pad2_ net-_u7-pad2_ u7
+a2 net-_u3-pad2_ net-_u8-pad2_ u8
+a3 net-_u4-pad2_ net-_u9-pad2_ u9
+a4 net-_u10-pad1_ net-_u10-pad2_ u10
+a5 net-_u1-pad1_ net-_u2-pad2_ u2
+a6 net-_u1-pad2_ net-_u3-pad2_ u3
+a7 net-_u1-pad3_ net-_u4-pad2_ u4
+a8 net-_u1-pad4_ net-_u10-pad1_ u5
+a9 net-_u11-pad1_ net-_u1-pad11_ u11
+a10 net-_u12-pad1_ net-_u1-pad12_ u12
+a11 net-_u13-pad1_ net-_u1-pad13_ u13
+a12 net-_u14-pad1_ net-_u1-pad14_ u14
+a13 net-_u15-pad1_ net-_u1-pad15_ u15
+a14 net-_u16-pad1_ net-_u1-pad7_ u16
+a15 net-_u17-pad1_ net-_u1-pad8_ u17
+a16 net-_u18-pad1_ net-_u1-pad9_ u18
+a17 net-_u19-pad1_ net-_u1-pad16_ u19
+a18 net-_u20-pad1_ net-_u1-pad17_ u20
+a19 net-_u21-pad1_ net-_u1-pad18_ u21
+a20 net-_u22-pad1_ net-_u1-pad10_ u22
+a21 net-_u23-pad1_ net-_u1-pad20_ u23
+a22 net-_u24-pad1_ net-_u1-pad21_ u24
+a23 net-_u25-pad1_ net-_u1-pad19_ u25
+a24 net-_u26-pad1_ net-_u1-pad22_ u26
+a25 [net-_u1-pad6_ net-_u1-pad5_ ] net-_u6-pad3_ u6
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u11 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u12 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u13 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u14 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u15 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u16 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u17 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u18 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u19 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u20 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u21 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u22 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u23 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u24 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u25 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u26 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_nand, NgSpice Name: d_nand
+.model u6 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/DM54154/DM54154.pro b/library/SubcircuitLibrary/DM54154/DM54154.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/DM54154/DM54154.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
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diff --git a/library/SubcircuitLibrary/DM54154/DM54154.sch b/library/SubcircuitLibrary/DM54154/DM54154.sch
new file mode 100644
index 00000000..0e74baf5
--- /dev/null
+++ b/library/SubcircuitLibrary/DM54154/DM54154.sch
@@ -0,0 +1,1118 @@
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+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
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+LIBS:atmel
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+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
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+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
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+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:DM54154-cache
+EELAYER 25 0
+EELAYER END
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+$EndComp
+$Comp
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+$Comp
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+F 3 "" H 8850 2150 60  0000 C CNN
+	1    8800 2200
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+$Comp
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+F 3 "" H 8850 2750 60  0000 C CNN
+	1    8800 2800
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+$Comp
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+	1    8800 3450
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+$Comp
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+F 3 "" H 8850 3950 60  0000 C CNN
+	1    8800 4000
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+F 3 "" H 8850 4500 60  0000 C CNN
+	1    8800 4550
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+F 2 "" H 8900 5050 60  0000 C CNN
+F 3 "" H 8900 5050 60  0000 C CNN
+	1    8850 5100
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+$EndComp
+$Comp
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+	3    600  150 
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+$Comp
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+F 3 "" H 600 1150 60  0000 C CNN
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+F 3 "" H 9550 -3750 60  0000 C CNN
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+F 3 "" H 9550 -3150 60  0000 C CNN
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+F 3 "" H 9550 -2550 60  0000 C CNN
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+$Comp
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+F 3 "" H 9550 -1950 60  0000 C CNN
+	14   9550 -1950
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+$Comp
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+F 3 "" H 9500 -750 60  0000 C CNN
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+$Comp
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+F 3 "" H 9500 -150 60  0000 C CNN
+	8    9500 -150
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+$Comp
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+F 3 "" H 9500 450 60  0000 C CNN
+	9    9500 450 
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+F 3 "" H 9550 1050 60  0000 C CNN
+	16   9550 1050
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+$Comp
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+F 1 "PORT" H 9550 1650 30  0000 C CNN
+F 2 "" H 9550 1650 60  0000 C CNN
+F 3 "" H 9550 1650 60  0000 C CNN
+	17   9550 1650
+	-1   0    0    1   
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+$Comp
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+F 1 "PORT" H 9550 2200 30  0000 C CNN
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+F 3 "" H 9550 2200 60  0000 C CNN
+	18   9550 2200
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+$Comp
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+F 3 "" H 9500 2800 60  0000 C CNN
+	10   9500 2800
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+$Comp
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+F 3 "" H 9600 3450 60  0000 C CNN
+	20   9600 3450
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+$Comp
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+	21   9600 4000
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+$Comp
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+F 3 "" H 9550 4550 60  0000 C CNN
+	19   9550 4550
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+$Comp
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+F 3 "" H 9600 5100 60  0000 C CNN
+	22   9600 5100
+	-1   0    0    1   
+$EndComp
+$Comp
+L d_nand U6
+U 1 1 67F933B5
+P 1800 -1850
+F 0 "U6" H 1800 -1850 60  0000 C CNN
+F 1 "d_nand" H 1850 -1750 60  0000 C CNN
+F 2 "" H 1800 -1850 60  0000 C CNN
+F 3 "" H 1800 -1850 60  0000 C CNN
+	1    1800 -1850
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/DM54154/DM54154.sub b/library/SubcircuitLibrary/DM54154/DM54154.sub
new file mode 100644
index 00000000..8e970344
--- /dev/null
+++ b/library/SubcircuitLibrary/DM54154/DM54154.sub
@@ -0,0 +1,123 @@
+* Subcircuit DM54154
+.subckt DM54154 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_u1-pad17_ net-_u1-pad18_ net-_u1-pad19_ net-_u1-pad20_ net-_u1-pad21_ net-_u1-pad22_ 
+* c:\users\senba\desktop\fossee\esim\library\subcircuitlibrary\dm54154\dm54154.cir
+.include 5_and.sub
+* u7  net-_u2-pad2_ net-_u7-pad2_ d_inverter
+* u8  net-_u3-pad2_ net-_u8-pad2_ d_inverter
+* u9  net-_u4-pad2_ net-_u9-pad2_ d_inverter
+* u10  net-_u10-pad1_ net-_u10-pad2_ d_inverter
+x1 net-_u6-pad3_ net-_u2-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u10-pad1_ net-_u11-pad1_ 5_and
+x2 net-_u6-pad3_ net-_u7-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u10-pad1_ net-_u12-pad1_ 5_and
+x3 net-_u6-pad3_ net-_u2-pad2_ net-_u8-pad2_ net-_u4-pad2_ net-_u10-pad1_ net-_u13-pad1_ 5_and
+x4 net-_u6-pad3_ net-_u7-pad2_ net-_u8-pad2_ net-_u4-pad2_ net-_u10-pad1_ net-_u14-pad1_ 5_and
+x5 net-_u6-pad3_ net-_u2-pad2_ net-_u3-pad2_ net-_u9-pad2_ net-_u10-pad1_ net-_u15-pad1_ 5_and
+x6 net-_u6-pad3_ net-_u7-pad2_ net-_u3-pad2_ net-_u9-pad2_ net-_u10-pad1_ net-_u16-pad1_ 5_and
+x7 net-_u6-pad3_ net-_u2-pad2_ net-_u8-pad2_ net-_u9-pad2_ net-_u10-pad1_ net-_u17-pad1_ 5_and
+x8 net-_u6-pad3_ net-_u7-pad2_ net-_u8-pad2_ net-_u9-pad2_ net-_u10-pad1_ net-_u18-pad1_ 5_and
+x9 net-_u6-pad3_ net-_u2-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u10-pad2_ net-_u19-pad1_ 5_and
+x10 net-_u6-pad3_ net-_u7-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u10-pad2_ net-_u20-pad1_ 5_and
+x11 net-_u6-pad3_ net-_u2-pad2_ net-_u8-pad2_ net-_u4-pad2_ net-_u10-pad2_ net-_u21-pad1_ 5_and
+x12 net-_u6-pad3_ net-_u7-pad2_ net-_u8-pad2_ net-_u4-pad2_ net-_u10-pad2_ net-_u22-pad1_ 5_and
+x13 net-_u6-pad3_ net-_u2-pad2_ net-_u3-pad2_ net-_u9-pad2_ net-_u10-pad2_ net-_u23-pad1_ 5_and
+x14 net-_u6-pad3_ net-_u7-pad2_ net-_u3-pad2_ net-_u9-pad2_ net-_u10-pad2_ net-_u24-pad1_ 5_and
+x15 net-_u6-pad3_ net-_u2-pad2_ net-_u8-pad2_ net-_u9-pad2_ net-_u10-pad2_ net-_u25-pad1_ 5_and
+x16 net-_u6-pad3_ net-_u7-pad2_ net-_u8-pad2_ net-_u9-pad2_ net-_u10-pad2_ net-_u26-pad1_ 5_and
+* u2  net-_u1-pad1_ net-_u2-pad2_ d_inverter
+* u3  net-_u1-pad2_ net-_u3-pad2_ d_inverter
+* u4  net-_u1-pad3_ net-_u4-pad2_ d_inverter
+* u5  net-_u1-pad4_ net-_u10-pad1_ d_inverter
+* u11  net-_u11-pad1_ net-_u1-pad11_ d_inverter
+* u12  net-_u12-pad1_ net-_u1-pad12_ d_inverter
+* u13  net-_u13-pad1_ net-_u1-pad13_ d_inverter
+* u14  net-_u14-pad1_ net-_u1-pad14_ d_inverter
+* u15  net-_u15-pad1_ net-_u1-pad15_ d_inverter
+* u16  net-_u16-pad1_ net-_u1-pad7_ d_inverter
+* u17  net-_u17-pad1_ net-_u1-pad8_ d_inverter
+* u18  net-_u18-pad1_ net-_u1-pad9_ d_inverter
+* u19  net-_u19-pad1_ net-_u1-pad16_ d_inverter
+* u20  net-_u20-pad1_ net-_u1-pad17_ d_inverter
+* u21  net-_u21-pad1_ net-_u1-pad18_ d_inverter
+* u22  net-_u22-pad1_ net-_u1-pad10_ d_inverter
+* u23  net-_u23-pad1_ net-_u1-pad20_ d_inverter
+* u24  net-_u24-pad1_ net-_u1-pad21_ d_inverter
+* u25  net-_u25-pad1_ net-_u1-pad19_ d_inverter
+* u26  net-_u26-pad1_ net-_u1-pad22_ d_inverter
+* u6  net-_u1-pad6_ net-_u1-pad5_ net-_u6-pad3_ d_nand
+a1 net-_u2-pad2_ net-_u7-pad2_ u7
+a2 net-_u3-pad2_ net-_u8-pad2_ u8
+a3 net-_u4-pad2_ net-_u9-pad2_ u9
+a4 net-_u10-pad1_ net-_u10-pad2_ u10
+a5 net-_u1-pad1_ net-_u2-pad2_ u2
+a6 net-_u1-pad2_ net-_u3-pad2_ u3
+a7 net-_u1-pad3_ net-_u4-pad2_ u4
+a8 net-_u1-pad4_ net-_u10-pad1_ u5
+a9 net-_u11-pad1_ net-_u1-pad11_ u11
+a10 net-_u12-pad1_ net-_u1-pad12_ u12
+a11 net-_u13-pad1_ net-_u1-pad13_ u13
+a12 net-_u14-pad1_ net-_u1-pad14_ u14
+a13 net-_u15-pad1_ net-_u1-pad15_ u15
+a14 net-_u16-pad1_ net-_u1-pad7_ u16
+a15 net-_u17-pad1_ net-_u1-pad8_ u17
+a16 net-_u18-pad1_ net-_u1-pad9_ u18
+a17 net-_u19-pad1_ net-_u1-pad16_ u19
+a18 net-_u20-pad1_ net-_u1-pad17_ u20
+a19 net-_u21-pad1_ net-_u1-pad18_ u21
+a20 net-_u22-pad1_ net-_u1-pad10_ u22
+a21 net-_u23-pad1_ net-_u1-pad20_ u23
+a22 net-_u24-pad1_ net-_u1-pad21_ u24
+a23 net-_u25-pad1_ net-_u1-pad19_ u25
+a24 net-_u26-pad1_ net-_u1-pad22_ u26
+a25 [net-_u1-pad6_ net-_u1-pad5_ ] net-_u6-pad3_ u6
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u11 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u12 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u13 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u14 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u15 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u16 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u17 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u18 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u19 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u20 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u21 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u22 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u23 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u24 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u25 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u26 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_nand, NgSpice Name: d_nand
+.model u6 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Control Statements
+
+.ends DM54154
+\ No newline at end of file
diff --git a/library/SubcircuitLibrary/DM54154/DM54154_Previous_Values.xml b/library/SubcircuitLibrary/DM54154/DM54154_Previous_Values.xml
new file mode 100644
index 00000000..2aa3f0c0
--- /dev/null
+++ b/library/SubcircuitLibrary/DM54154/DM54154_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u6 name="type">d_and<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u6><u7 name="type">d_inverter<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u7><u8 name="type">d_inverter<field7 name="Enter Rise Delay (default=1.0e-9)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter Input Load (default=1.0e-12)" /></u8><u9 name="type">d_inverter<field10 name="Enter Rise Delay (default=1.0e-9)" /><field11 name="Enter Fall Delay (default=1.0e-9)" /><field12 name="Enter Input Load (default=1.0e-12)" /></u9><u10 name="type">d_inverter<field13 name="Enter Rise Delay (default=1.0e-9)" /><field14 name="Enter Fall Delay (default=1.0e-9)" /><field15 name="Enter Input Load (default=1.0e-12)" /></u10><u2 name="type">d_inverter<field16 name="Enter Rise Delay (default=1.0e-9)" /><field17 name="Enter Fall Delay (default=1.0e-9)" /><field18 name="Enter Input Load (default=1.0e-12)" /></u2><u3 name="type">d_inverter<field19 name="Enter Rise Delay (default=1.0e-9)" /><field20 name="Enter Fall Delay (default=1.0e-9)" /><field21 name="Enter Input Load (default=1.0e-12)" /></u3><u4 name="type">d_inverter<field22 name="Enter Rise Delay (default=1.0e-9)" /><field23 name="Enter Fall Delay (default=1.0e-9)" /><field24 name="Enter Input Load (default=1.0e-12)" /></u4><u5 name="type">d_inverter<field25 name="Enter Rise Delay (default=1.0e-9)" /><field26 name="Enter Fall Delay (default=1.0e-9)" /><field27 name="Enter Input Load (default=1.0e-12)" /></u5><u11 name="type">d_inverter<field28 name="Enter Rise Delay (default=1.0e-9)" /><field29 name="Enter Fall Delay (default=1.0e-9)" /><field30 name="Enter Input Load (default=1.0e-12)" /></u11><u12 name="type">d_inverter<field31 name="Enter Rise Delay (default=1.0e-9)" /><field32 name="Enter Fall Delay (default=1.0e-9)" /><field33 name="Enter Input Load (default=1.0e-12)" /></u12><u13 name="type">d_inverter<field34 name="Enter Rise Delay (default=1.0e-9)" /><field35 name="Enter Fall Delay (default=1.0e-9)" /><field36 name="Enter Input Load (default=1.0e-12)" /></u13><u14 name="type">d_inverter<field37 name="Enter Rise Delay (default=1.0e-9)" /><field38 name="Enter Fall Delay (default=1.0e-9)" /><field39 name="Enter Input Load (default=1.0e-12)" /></u14><u15 name="type">d_inverter<field40 name="Enter Rise Delay (default=1.0e-9)" /><field41 name="Enter Fall Delay (default=1.0e-9)" /><field42 name="Enter Input Load (default=1.0e-12)" /></u15><u16 name="type">d_inverter<field43 name="Enter Rise Delay (default=1.0e-9)" /><field44 name="Enter Fall Delay (default=1.0e-9)" /><field45 name="Enter Input Load (default=1.0e-12)" /></u16><u17 name="type">d_inverter<field46 name="Enter Rise Delay (default=1.0e-9)" /><field47 name="Enter Fall Delay (default=1.0e-9)" /><field48 name="Enter Input Load (default=1.0e-12)" /></u17><u18 name="type">d_inverter<field49 name="Enter Rise Delay (default=1.0e-9)" /><field50 name="Enter Fall Delay (default=1.0e-9)" /><field51 name="Enter Input Load (default=1.0e-12)" /></u18><u19 name="type">d_inverter<field52 name="Enter Rise Delay (default=1.0e-9)" /><field53 name="Enter Fall Delay (default=1.0e-9)" /><field54 name="Enter Input Load (default=1.0e-12)" /></u19><u20 name="type">d_inverter<field55 name="Enter Rise Delay (default=1.0e-9)" /><field56 name="Enter Fall Delay (default=1.0e-9)" /><field57 name="Enter Input Load (default=1.0e-12)" /></u20><u21 name="type">d_inverter<field58 name="Enter Rise Delay (default=1.0e-9)" /><field59 name="Enter Fall Delay (default=1.0e-9)" /><field60 name="Enter Input Load (default=1.0e-12)" /></u21><u22 name="type">d_inverter<field61 name="Enter Rise Delay (default=1.0e-9)" /><field62 name="Enter Fall Delay (default=1.0e-9)" /><field63 name="Enter Input Load (default=1.0e-12)" /></u22><u23 name="type">d_inverter<field64 name="Enter Rise Delay (default=1.0e-9)" /><field65 name="Enter Fall Delay (default=1.0e-9)" /><field66 name="Enter Input Load (default=1.0e-12)" /></u23><u24 name="type">d_inverter<field67 name="Enter Rise Delay (default=1.0e-9)" /><field68 name="Enter Fall Delay (default=1.0e-9)" /><field69 name="Enter Input Load (default=1.0e-12)" /></u24><u25 name="type">d_inverter<field70 name="Enter Rise Delay (default=1.0e-9)" /><field71 name="Enter Fall Delay (default=1.0e-9)" /><field72 name="Enter Input Load (default=1.0e-12)" /></u25><u26 name="type">d_inverter<field73 name="Enter Rise Delay (default=1.0e-9)" /><field74 name="Enter Fall Delay (default=1.0e-9)" /><field75 name="Enter Input Load (default=1.0e-12)" /></u26><u6 name="type">d_nand<field73 name="Enter Rise Delay (default=1.0e-9)" /><field74 name="Enter Fall Delay (default=1.0e-9)" /><field75 name="Enter Input Load (default=1.0e-12)" /></u6></model><devicemodel /><subcircuit><x1><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x1><x2><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x2><x3><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x3><x4><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x4><x5><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x5><x6><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x6><x7><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x7><x8><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x8><x9><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x9><x10><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x10><x11><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x11><x12><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x12><x13><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x13><x14><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x14><x15><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x15><x16><field>C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\5_and</field></x16></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
+\ No newline at end of file
diff --git a/library/SubcircuitLibrary/DM54154/analysis b/library/SubcircuitLibrary/DM54154/analysis
new file mode 100644
index 00000000..7ce288c0
--- /dev/null
+++ b/library/SubcircuitLibrary/DM54154/analysis
@@ -0,0 +1 @@
+.tran 0.1e-00 500e-00 0e-00
+\ No newline at end of file