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-rw-r--r--library/SubcircuitLibrary/8282/8282-cache.lib91
-rw-r--r--library/SubcircuitLibrary/8282/8282.cir36
-rw-r--r--library/SubcircuitLibrary/8282/8282.cir.out112
-rw-r--r--library/SubcircuitLibrary/8282/8282.dcm7
-rw-r--r--library/SubcircuitLibrary/8282/8282.lib779
-rw-r--r--library/SubcircuitLibrary/8282/8282.pro73
-rw-r--r--library/SubcircuitLibrary/8282/8282.sch743
-rw-r--r--library/SubcircuitLibrary/8282/8282.sub106
-rw-r--r--library/SubcircuitLibrary/8282/8282_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/8282/analysis1
10 files changed, 1949 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/8282/8282-cache.lib b/library/SubcircuitLibrary/8282/8282-cache.lib
new file mode 100644
index 00000000..30536226
--- /dev/null
+++ b/library/SubcircuitLibrary/8282/8282-cache.lib
@@ -0,0 +1,91 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_dff
+#
+DEF d_dff U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_dff" 0 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S 350 450 -350 -400 0 1 0 N
+X Din 1 -550 350 200 R 50 50 1 1 I
+X Clk 2 -550 -300 200 R 50 50 1 1 I C
+X Set 3 0 650 200 D 50 50 1 1 I
+X Reset 4 0 -600 200 U 50 50 1 1 I
+X Dout 5 550 350 200 L 50 50 1 1 O
+X Ndout 6 550 -300 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# d_tristate
+#
+DEF d_tristate U 0 40 Y Y 1 F N
+F0 "U" -250 250 60 H V C CNN
+F1 "d_tristate" -200 450 60 H V C CNN
+F2 "" -100 350 60 H V C CNN
+F3 "" -100 350 60 H V C CNN
+DRAW
+P 4 0 1 0 -400 550 -400 150 350 350 -400 550 N
+X IN 1 -600 350 200 R 50 50 1 1 I
+X EN 2 -50 50 193 U 50 50 1 1 I
+X OUT 3 550 350 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/8282/8282.cir b/library/SubcircuitLibrary/8282/8282.cir
new file mode 100644
index 00000000..e7a834f3
--- /dev/null
+++ b/library/SubcircuitLibrary/8282/8282.cir
@@ -0,0 +1,36 @@
+* C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\8282\8282.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/22/25 11:45:54
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2 /A0 /STB ? ? ? Net-_U2-Pad6_ d_dff
+U3 /A1 /STB ? ? ? Net-_U3-Pad6_ d_dff
+U16 /A4 /STB ? ? ? Net-_U16-Pad6_ d_dff
+U17 /A5 /STB ? ? ? Net-_U17-Pad6_ d_dff
+U4 /A2 /STB ? ? ? Net-_U4-Pad6_ d_dff
+U5 /A3 /STB ? ? ? Net-_U5-Pad6_ d_dff
+U18 /A6 /STB ? ? ? Net-_U18-Pad6_ d_dff
+U15 /A7 /STB ? ? ? Net-_U15-Pad6_ d_dff
+U6 Net-_U2-Pad6_ Net-_U10-Pad1_ d_inverter
+U10 Net-_U10-Pad1_ Net-_U10-Pad2_ /B0 d_tristate
+U7 Net-_U3-Pad6_ Net-_U11-Pad1_ d_inverter
+U11 Net-_U11-Pad1_ Net-_U10-Pad2_ /B1 d_tristate
+U8 Net-_U4-Pad6_ Net-_U12-Pad1_ d_inverter
+U12 Net-_U12-Pad1_ Net-_U10-Pad2_ /B2 d_tristate
+U9 Net-_U5-Pad6_ Net-_U13-Pad1_ d_inverter
+U13 Net-_U13-Pad1_ Net-_U10-Pad2_ /B3 d_tristate
+U19 Net-_U16-Pad6_ Net-_U19-Pad2_ d_inverter
+U23 Net-_U19-Pad2_ Net-_U10-Pad2_ /B4 d_tristate
+U20 Net-_U17-Pad6_ Net-_U20-Pad2_ d_inverter
+U24 Net-_U20-Pad2_ Net-_U10-Pad2_ /B5 d_tristate
+U21 Net-_U18-Pad6_ Net-_U21-Pad2_ d_inverter
+U25 Net-_U21-Pad2_ Net-_U10-Pad2_ /B6 d_tristate
+U22 Net-_U15-Pad6_ Net-_U22-Pad2_ d_inverter
+U26 Net-_U22-Pad2_ Net-_U10-Pad2_ /B7 d_tristate
+U1 /A3 /A0 /A1 /A2 /STB /OE_BAR /B0 /B1 /B2 /B3 /A4 /A5 /A6 /A7 /B4 /B5 /B6 /B7 ? ? PORT
+U14 /OE_BAR Net-_U10-Pad2_ d_inverter
+
+.end
diff --git a/library/SubcircuitLibrary/8282/8282.cir.out b/library/SubcircuitLibrary/8282/8282.cir.out
new file mode 100644
index 00000000..2900f8e4
--- /dev/null
+++ b/library/SubcircuitLibrary/8282/8282.cir.out
@@ -0,0 +1,112 @@
+* c:\users\hp\onedrive\documents\fossee\esim\library\subcircuitlibrary\8282\8282.cir
+
+* u2 /a0 /stb ? ? ? net-_u2-pad6_ d_dff
+* u3 /a1 /stb ? ? ? net-_u3-pad6_ d_dff
+* u16 /a4 /stb ? ? ? net-_u16-pad6_ d_dff
+* u17 /a5 /stb ? ? ? net-_u17-pad6_ d_dff
+* u4 /a2 /stb ? ? ? net-_u4-pad6_ d_dff
+* u5 /a3 /stb ? ? ? net-_u5-pad6_ d_dff
+* u18 /a6 /stb ? ? ? net-_u18-pad6_ d_dff
+* u15 /a7 /stb ? ? ? net-_u15-pad6_ d_dff
+* u6 net-_u2-pad6_ net-_u10-pad1_ d_inverter
+* u10 net-_u10-pad1_ net-_u10-pad2_ /b0 d_tristate
+* u7 net-_u3-pad6_ net-_u11-pad1_ d_inverter
+* u11 net-_u11-pad1_ net-_u10-pad2_ /b1 d_tristate
+* u8 net-_u4-pad6_ net-_u12-pad1_ d_inverter
+* u12 net-_u12-pad1_ net-_u10-pad2_ /b2 d_tristate
+* u9 net-_u5-pad6_ net-_u13-pad1_ d_inverter
+* u13 net-_u13-pad1_ net-_u10-pad2_ /b3 d_tristate
+* u19 net-_u16-pad6_ net-_u19-pad2_ d_inverter
+* u23 net-_u19-pad2_ net-_u10-pad2_ /b4 d_tristate
+* u20 net-_u17-pad6_ net-_u20-pad2_ d_inverter
+* u24 net-_u20-pad2_ net-_u10-pad2_ /b5 d_tristate
+* u21 net-_u18-pad6_ net-_u21-pad2_ d_inverter
+* u25 net-_u21-pad2_ net-_u10-pad2_ /b6 d_tristate
+* u22 net-_u15-pad6_ net-_u22-pad2_ d_inverter
+* u26 net-_u22-pad2_ net-_u10-pad2_ /b7 d_tristate
+* u1 /a3 /a0 /a1 /a2 /stb /oe_bar /b0 /b1 /b2 /b3 /a4 /a5 /a6 /a7 /b4 /b5 /b6 /b7 ? ? port
+* u14 /oe_bar net-_u10-pad2_ d_inverter
+a1 /a0 /stb ? ? ? net-_u2-pad6_ u2
+a2 /a1 /stb ? ? ? net-_u3-pad6_ u3
+a3 /a4 /stb ? ? ? net-_u16-pad6_ u16
+a4 /a5 /stb ? ? ? net-_u17-pad6_ u17
+a5 /a2 /stb ? ? ? net-_u4-pad6_ u4
+a6 /a3 /stb ? ? ? net-_u5-pad6_ u5
+a7 /a6 /stb ? ? ? net-_u18-pad6_ u18
+a8 /a7 /stb ? ? ? net-_u15-pad6_ u15
+a9 net-_u2-pad6_ net-_u10-pad1_ u6
+a10 net-_u10-pad1_ net-_u10-pad2_ /b0 u10
+a11 net-_u3-pad6_ net-_u11-pad1_ u7
+a12 net-_u11-pad1_ net-_u10-pad2_ /b1 u11
+a13 net-_u4-pad6_ net-_u12-pad1_ u8
+a14 net-_u12-pad1_ net-_u10-pad2_ /b2 u12
+a15 net-_u5-pad6_ net-_u13-pad1_ u9
+a16 net-_u13-pad1_ net-_u10-pad2_ /b3 u13
+a17 net-_u16-pad6_ net-_u19-pad2_ u19
+a18 net-_u19-pad2_ net-_u10-pad2_ /b4 u23
+a19 net-_u17-pad6_ net-_u20-pad2_ u20
+a20 net-_u20-pad2_ net-_u10-pad2_ /b5 u24
+a21 net-_u18-pad6_ net-_u21-pad2_ u21
+a22 net-_u21-pad2_ net-_u10-pad2_ /b6 u25
+a23 net-_u15-pad6_ net-_u22-pad2_ u22
+a24 net-_u22-pad2_ net-_u10-pad2_ /b7 u26
+a25 /oe_bar net-_u10-pad2_ u14
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u2 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u3 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u16 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u17 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u4 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u5 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u18 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u15 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u10 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u11 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u12 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u13 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u19 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u23 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u20 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u24 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u21 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u25 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u22 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u26 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u14 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/8282/8282.dcm b/library/SubcircuitLibrary/8282/8282.dcm
new file mode 100644
index 00000000..1980d0d1
--- /dev/null
+++ b/library/SubcircuitLibrary/8282/8282.dcm
@@ -0,0 +1,7 @@
+EESchema-DOCLIB Version 2.0
+#
+$CMP SCR
+D Thyristor
+$ENDCMP
+#
+#End Doc Library
diff --git a/library/SubcircuitLibrary/8282/8282.lib b/library/SubcircuitLibrary/8282/8282.lib
new file mode 100644
index 00000000..6741d6ab
--- /dev/null
+++ b/library/SubcircuitLibrary/8282/8282.lib
@@ -0,0 +1,779 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 10bitDAC
+#
+DEF 10bitDAC X 0 40 Y Y 1 F N
+F0 "X" 0 50 60 H V C CNN
+F1 "10bitDAC" -50 -50 60 H V C CNN
+F2 "" 0 50 60 H I C CNN
+F3 "" 0 50 60 H I C CNN
+DRAW
+S -500 500 400 -600 0 1 0 N
+X D0 1 -700 -500 200 R 50 50 1 1 I
+X D1 2 -700 -400 200 R 50 50 1 1 I
+X D2 3 -700 -300 200 R 50 50 1 1 I
+X D3 4 -700 -200 200 R 50 50 1 1 I
+X D4 5 -700 -100 200 R 50 50 1 1 I
+X D5 6 -700 0 200 R 50 50 1 1 I
+X D6 7 -700 100 200 R 50 50 1 1 I
+X D7 8 -700 200 200 R 50 50 1 1 I
+X D8 9 -700 300 200 R 50 50 1 1 I
+X D9 10 -700 400 200 R 50 50 1 1 I
+X AnalogOut 11 600 350 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 2BITMUL
+#
+DEF 2BITMUL X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "2BITMUL" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -300 400 300 -400 0 1 0 N
+X A0 1 -500 300 200 R 50 50 1 1 I
+X A1 2 -500 150 200 R 50 50 1 1 I
+X B0 3 -500 -50 200 R 50 50 1 1 I
+X B1 4 -500 -250 200 R 50 50 1 1 I
+X M0 5 500 250 200 L 50 50 1 1 O
+X M1 6 500 100 200 L 50 50 1 1 O
+X M2 7 500 -50 200 L 50 50 1 1 O
+X M3 8 500 -250 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 3_and
+#
+DEF 3_and X 0 40 Y Y 1 F N
+F0 "X" 100 -50 60 H V C CNN
+F1 "3_and" 150 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 150 50 158 716 -716 0 1 0 N 200 200 200 -100
+P 2 0 1 0 -150 200 200 200 N
+P 3 0 1 0 -150 200 -150 -100 200 -100 N
+X in1 1 -350 150 200 R 50 50 1 1 I
+X in2 2 -350 50 200 R 50 50 1 1 I
+X in3 3 -350 -50 200 R 50 50 1 1 I
+X out 4 500 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 4_OR
+#
+DEF 4_OR X 0 40 Y Y 1 F N
+F0 "X" 150 -100 60 H V C CNN
+F1 "4_OR" 150 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A -800 0 650 226 -226 0 1 0 N -200 250 -200 -250
+A -73 134 444 -599 -176 0 1 0 N 150 -250 350 0
+A -30 -99 393 627 146 0 1 0 N 150 250 350 0
+P 2 0 1 0 -200 -250 150 -250 N
+P 2 0 1 0 -200 250 150 250 N
+X in1 1 -350 150 200 R 50 50 1 1 I
+X in2 2 -350 50 200 R 50 50 1 1 I
+X in3 3 -350 -50 200 R 50 50 1 1 I
+X in4 4 -350 -150 200 R 50 50 1 1 I
+X out 5 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 4_and
+#
+DEF 4_and X 0 40 Y Y 1 F N
+F0 "X" 50 -50 60 H V C CNN
+F1 "4_and" 100 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 206 760 -760 0 1 0 N 150 200 150 -200
+P 2 0 1 0 -200 200 150 200 N
+P 4 0 1 0 -200 200 -200 -200 50 -200 150 -200 N
+X in1 1 -400 150 200 R 50 50 1 1 I
+X in2 2 -400 50 200 R 50 50 1 1 I
+X in3 3 -400 -50 200 R 50 50 1 1 I
+X in4 4 -400 -150 200 R 50 50 1 1 I
+X out 5 500 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 556
+#
+DEF 556 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "556" 0 0 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 400 250 -550 0 1 0 N
+X dis1 1 -500 150 200 R 50 50 1 1 I
+X thr1 2 -500 -150 200 R 50 50 1 1 I
+X cv1 3 -150 -750 200 U 50 50 1 1 I
+X rst1 4 -200 600 200 D 50 50 1 1 I
+X out1 5 -500 0 200 R 50 50 1 1 O
+X trig1 6 -500 -300 200 R 50 50 1 1 I
+X gnd 7 0 -750 200 U 50 50 1 1 I
+X trig2 8 450 -300 200 L 50 50 1 1 I
+X out2 9 450 0 200 L 50 50 1 1 O
+X rst2 10 100 600 200 D 50 50 1 1 I
+X cv2 11 150 -750 200 U 50 50 1 1 I
+X thr2 12 450 -150 200 L 50 50 1 1 I
+X dis2 13 450 150 200 L 50 50 1 1 I
+X vcc 14 -50 600 200 D 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# 5_and
+#
+DEF 5_and X 0 40 Y Y 1 F N
+F0 "X" 50 -100 60 H V C CNN
+F1 "5_and" 100 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 255 787 -787 0 1 0 N 150 250 150 -250
+P 2 0 1 0 -250 250 150 250 N
+P 3 0 1 0 -250 250 -250 -250 150 -250 N
+X in1 1 -450 200 200 R 50 50 1 1 I
+X in2 2 -450 100 200 R 50 50 1 1 I
+X in3 3 -450 0 200 R 50 50 1 1 I
+X in4 4 -450 -100 200 R 50 50 1 1 I
+X in5 5 -450 -200 200 R 50 50 1 1 I
+X out 6 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 8282
+#
+DEF 8282 X 0 40 Y Y 1 F N
+F0 "X" 100 0 60 H V C CNN
+F1 "8282" 100 100 60 H V C CNN
+F2 "" 100 0 60 H I C CNN
+F3 "" 100 0 60 H I C CNN
+DRAW
+S -1450 600 1450 -550 0 1 0 N
+X A3 1 -150 800 200 D 50 50 1 1 I
+X A0 2 -1100 800 200 D 50 50 1 1 I
+X A1 3 -750 800 200 D 50 50 1 1 I
+X A2 4 -450 800 200 D 50 50 1 1 I
+X STB 5 -1650 250 200 R 50 50 1 1 I
+X OE_BAR 6 -1650 -150 200 R 50 50 1 1 I
+X B0 7 -1050 -750 200 U 50 50 1 1 O
+X B1 8 -750 -750 200 U 50 50 1 1 O
+X B2 9 -450 -750 200 U 50 50 1 1 O
+X B3 10 -150 -750 200 U 50 50 1 1 O
+X GND 20 1650 -200 200 L 50 50 1 1 I
+X A4 11 200 800 200 D 50 50 1 1 I
+X A5 12 500 800 200 D 50 50 1 1 I
+X A6 13 800 800 200 D 50 50 1 1 I
+X A7 14 1100 800 200 D 50 50 1 1 I
+X B4 15 200 -750 200 U 50 50 1 1 O
+X B5 16 550 -750 200 U 50 50 1 1 O
+X B6 17 850 -750 200 U 50 50 1 1 O
+X B7 18 1150 -750 200 U 50 50 1 1 O
+X VCC 19 1650 250 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# 8286
+#
+DEF 8286 X 0 40 Y Y 1 F N
+F0 "X" 150 -100 60 H V C CNN
+F1 "8286" 100 50 60 H V C CNN
+F2 "" 150 -100 60 H I C CNN
+F3 "" 150 -100 60 H I C CNN
+DRAW
+S -1150 500 1400 -500 0 1 0 N
+X OE_BAR 1 -1350 -200 200 R 50 50 1 1 I
+X TRANS/RXR_BAR 2 -1350 150 200 R 50 50 1 1 I
+X A0 3 -850 700 200 D 50 50 1 1 B
+X B0 4 -800 -700 200 U 50 50 1 1 B
+X A1 5 -600 700 200 D 50 50 1 1 B
+X B1 6 -600 -700 200 U 50 50 1 1 B
+X A2 7 -350 700 200 D 50 50 1 1 B
+X B2 8 -350 -700 200 U 50 50 1 1 B
+X A3 9 -100 700 200 D 50 50 1 1 B
+X B3 10 -100 -700 200 U 50 50 1 1 B
+X GND 20 1200 -700 200 U 50 50 1 1 I
+X A4 11 150 700 200 D 50 50 1 1 B
+X B4 12 150 -700 200 U 50 50 1 1 B
+X A5 13 400 700 200 D 50 50 1 1 B
+X B5 14 450 -700 200 U 50 50 1 1 B
+X A6 15 650 700 200 D 50 50 1 1 B
+X B6 16 700 -700 200 U 50 50 1 1 B
+X A7 17 950 700 200 D 50 50 1 1 B
+X B7 18 950 -700 200 U 50 50 1 1 B
+X VCC 19 1200 700 200 D 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# CMOS_NAND
+#
+DEF CMOS_NAND X 0 40 Y Y 1 F N
+F0 "X" -100 -150 60 H V C CNN
+F1 "CMOS_NAND" 0 -50 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+A 150 -50 381 668 -668 0 1 0 N 300 300 300 -400
+C 550 0 50 0 1 0 N
+P 2 0 1 0 -350 300 300 300 N
+P 3 0 1 0 -350 300 -350 -400 300 -400 N
+X in1 1 -550 250 200 R 50 50 1 1 I
+X in2 2 -550 -300 200 R 50 50 1 1 I
+X out 3 800 0 279 L 79 79 1 1 I
+ENDDRAW
+ENDDEF
+#
+# Clock_pulse_generator
+#
+DEF Clock_pulse_generator X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "Clock_pulse_generator" 0 -100 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -550 200 600 -300 0 1 0 N
+X Vdd 1 -750 100 200 R 50 50 1 1 I
+X R 2 -750 -50 200 R 50 50 1 1 I
+X C 3 -750 -200 200 R 50 50 1 1 I
+X Clkout 4 800 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_4002
+#
+DEF IC_4002 X 0 40 Y Y 1 F N
+F0 "X" 0 150 60 H V C CNN
+F1 "IC_4002" 0 0 60 H V C CNN
+F2 "" 50 -150 60 H V C CNN
+F3 "" 50 -150 60 H V C CNN
+DRAW
+S -250 350 250 -400 0 1 0 N
+X 1Y 1 -450 250 200 R 50 50 1 1 O
+X 1A 2 -450 150 200 R 50 50 1 1 I
+X 1B 3 -450 50 200 R 50 50 1 1 I
+X 1C 4 -450 -50 200 R 50 50 1 1 I
+X 1D 5 -450 -150 200 R 50 50 1 1 I
+X NC 6 -450 -250 200 R 50 50 1 1 I
+X GND 7 -450 -350 200 R 50 50 1 1 I
+X NC 8 450 -350 200 L 50 50 1 1 I
+X 2A 9 450 -250 200 L 50 50 1 1 I
+X 2B 10 450 -150 200 L 50 50 1 1 I
+X 2C 11 450 -50 200 L 50 50 1 1 I
+X 2D 12 450 50 200 L 50 50 1 1 I
+X 2Y 13 450 150 200 L 50 50 1 1 O
+X VCC 14 450 250 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4012
+#
+DEF IC_4012 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "IC_4012" 0 200 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 400 350 -400 0 1 0 N
+X Q1 1 -500 300 200 R 50 50 1 1 O
+X A1 2 -500 200 200 R 50 50 1 1 I
+X B1 3 -500 100 200 R 50 50 1 1 I
+X C1 4 -500 0 200 R 50 50 1 1 I
+X D1 5 -500 -100 200 R 50 50 1 1 I
+X NC 6 -500 -200 200 R 50 50 1 1 N
+X VSS 7 -500 -300 200 R 50 50 1 1 I
+X NC 8 550 -300 200 L 50 50 1 1 N
+X A2 9 550 -200 200 L 50 50 1 1 I
+X B2 10 550 -100 200 L 50 50 1 1 I
+X C2 11 550 0 200 L 50 50 1 1 I
+X D2 12 550 100 200 L 50 50 1 1 I
+X Q2 13 550 200 200 L 50 50 1 1 O
+X VDD 14 550 300 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4017
+#
+DEF IC_4017 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "IC_4017" 0 0 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -350 850 400 -850 0 1 0 N
+X 1 1 600 650 200 L 50 50 1 1 O
+X 2 2 600 500 200 L 50 50 1 1 O
+X 3 3 600 350 200 L 50 50 1 1 O
+X 4 4 600 200 200 L 50 50 1 1 O
+X 5 5 600 50 200 L 50 50 1 1 O
+X 6 6 600 -100 200 L 50 50 1 1 O
+X 7 7 600 -250 200 L 50 50 1 1 O
+X 8 8 600 -400 200 L 50 50 1 1 O
+X 9 9 600 -600 200 L 50 50 1 1 O
+X 10 10 600 -750 200 L 50 50 1 1 O
+X RST 11 -550 -400 200 R 50 50 1 1 I
+X CLK 12 -550 350 200 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4023
+#
+DEF IC_4023 X 0 40 Y Y 1 F N
+F0 "X" 0 -100 60 H V C CNN
+F1 "IC_4023" 0 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 450 300 -450 0 1 0 N
+X A1 1 -500 300 200 R 50 50 1 1 I
+X B1 2 -500 200 200 R 50 50 1 1 I
+X A2 3 -500 100 200 R 50 50 1 1 I
+X B2 4 -500 0 200 R 50 50 1 1 I
+X C2 5 -500 -100 200 R 50 50 1 1 I
+X Q2 6 -500 -200 200 R 50 50 1 1 O
+X Vss 7 -500 -300 200 R 50 50 1 1 I
+X C1 8 500 -300 200 L 50 50 1 1 I
+X Q1 9 500 -200 200 L 50 50 1 1 O
+X Q3 10 500 -100 200 L 50 50 1 1 O
+X C3 11 500 0 200 L 50 50 1 1 I
+X B3 12 500 100 200 L 50 50 1 1 I
+X A3 13 500 200 200 L 50 50 1 1 I
+X Vdd 14 500 300 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4028
+#
+DEF IC_4028 X 0 40 Y Y 1 F N
+F0 "X" 0 -100 60 H V C CNN
+F1 "IC_4028" 0 50 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 450 300 -450 0 1 0 N
+X Q4 1 -500 350 200 R 50 50 1 1 O
+X Q2 2 -500 250 200 R 50 50 1 1 O
+X Q0 3 -500 150 200 R 50 50 1 1 O
+X Q7 4 -500 50 200 R 50 50 1 1 O
+X Q9 5 -500 -50 200 R 50 50 1 1 O
+X Q5 6 -500 -150 200 R 50 50 1 1 O
+X Q6 7 -500 -250 200 R 50 50 1 1 O
+X Vss 8 -500 -350 200 R 50 50 1 1 I
+X Q8 9 500 -350 200 L 50 50 1 1 O
+X A0 10 500 -250 200 L 50 50 1 1 I
+X A3 11 500 -150 200 L 50 50 1 1 I
+X A2 12 500 -50 200 L 50 50 1 1 I
+X A1 13 500 50 200 L 50 50 1 1 I
+X Q1 14 500 150 200 L 50 50 1 1 O
+X Q3 15 500 250 200 L 50 50 1 1 O
+X Vdd 16 500 350 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_4073
+#
+DEF IC_4073 X 0 40 Y Y 1 F N
+F0 "X" 0 -100 60 H V C CNN
+F1 "IC_4073" 0 50 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 400 300 -400 0 1 0 N
+X A1 1 -500 300 200 R 50 50 1 1 I
+X B1 2 -500 200 200 R 50 50 1 1 I
+X A2 3 -500 100 200 R 50 50 1 1 I
+X B2 4 -500 0 200 R 50 50 1 1 I
+X C2 5 -500 -100 200 R 50 50 1 1 I
+X Q2 6 -500 -200 200 R 50 50 1 1 O
+X Vss 7 -500 -300 200 R 50 50 1 1 I
+X C1 8 500 -300 200 L 50 50 1 1 I
+X Q1 9 500 -200 200 L 50 50 1 1 O
+X Q3 10 500 -100 200 L 50 50 1 1 O
+X A3 11 500 0 200 L 50 50 1 1 I
+X B3 12 500 100 200 L 50 50 1 1 I
+X C3 13 500 200 200 L 50 50 1 1 I
+X Vdd 14 500 300 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_74153
+#
+DEF IC_74153 X 0 40 Y Y 1 F N
+F0 "X" 100 50 60 H V C CNN
+F1 "IC_74153" 100 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+T 0 100 -200 60 0 0 0 4:1 Normal 0 C C
+T 0 100 -100 60 0 0 0 DUAL Normal 0 C C
+T 0 100 -300 60 0 0 0 MUX Normal 0 C C
+S -200 500 350 -550 0 1 0 N
+X a0 1 -400 350 200 R 50 50 1 1 I
+X a1 2 -400 250 200 R 50 50 1 1 I
+X a2 3 -400 150 200 R 50 50 1 1 I
+X a3 4 -400 50 200 R 50 50 1 1 I
+X EA 5 0 700 200 D 50 50 1 1 I I
+X b0 6 -400 -150 200 R 50 50 1 1 I
+X b1 7 -400 -250 200 R 50 50 1 1 I
+X b2 8 -400 -350 200 R 50 50 1 1 I
+X b3 9 -400 -450 200 R 50 50 1 1 I
+X EB 10 200 700 200 D 50 50 1 1 I I
+X s1 11 50 -750 200 U 50 50 1 1 I
+X s0 12 150 -750 200 U 50 50 1 1 I
+X ya 13 550 250 200 L 50 50 1 1 O
+X yb 14 550 -300 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_74154
+#
+DEF IC_74154 X 0 40 Y Y 1 F N
+F0 "X" 0 -200 60 H V C CNN
+F1 "IC_74154" 50 -50 60 H V C CNN
+F2 "" 0 50 60 H V C CNN
+F3 "" 0 50 60 H V C CNN
+DRAW
+T 0 0 400 60 0 0 0 4:16~ Normal 0 C C
+T 0 0 250 60 0 0 0 decoder Normal 0 C C
+S -350 700 400 -700 0 0 0 N
+X ~Y0 1 -550 550 200 R 50 50 1 1 O I
+X ~Y1 2 -550 450 200 R 50 50 1 1 O I
+X ~Y2 3 -550 350 200 R 50 50 1 1 O I
+X ~Y3 4 -550 250 200 R 50 50 1 1 O I
+X ~Y4 5 -550 150 200 R 50 50 1 1 O I
+X ~Y5 6 -550 50 200 R 50 50 1 1 O I
+X ~Y6 7 -550 -50 200 R 50 50 1 1 O I
+X ~Y7 8 -550 -150 200 R 50 50 1 1 O I
+X ~Y8 9 -550 -250 200 R 50 50 1 1 O I
+X ~Y9 10 -550 -350 200 R 50 50 1 1 O I
+X A3 20 600 150 200 L 50 50 1 1 I
+X ~Y10 11 -550 -450 200 R 50 50 1 1 O I
+X A2 21 600 250 200 L 50 50 1 1 I
+X GND 12 -550 -550 200 R 50 50 1 1 I
+X A1 22 600 350 200 L 50 50 1 1 I
+X ~Y11 13 600 -550 200 L 50 50 1 1 O I
+X A0 23 600 450 200 L 50 50 1 1 I
+X ~Y12 14 600 -450 200 L 50 50 1 1 O I
+X Vcc 24 600 550 200 L 50 50 1 1 I
+X ~Y13 15 600 -350 200 L 50 50 1 1 O I
+X ~Y14 16 600 -250 200 L 50 50 1 1 O I
+X ~Y15 17 600 -150 200 L 50 50 1 1 O I
+X ~E0 18 600 -50 200 L 50 50 1 1 I I
+X ~E1 19 600 50 200 L 50 50 1 1 I I
+ENDDRAW
+ENDDEF
+#
+# IC_74157
+#
+DEF IC_74157 X 0 40 Y Y 1 F N
+F0 "X" 50 -50 60 H V C CNN
+F1 "IC_74157" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+T 0 50 -300 60 0 0 0 2:1 Normal 0 C C
+T 0 50 -400 60 0 0 0 MUX Normal 0 C C
+T 0 50 -200 60 0 0 0 QUAD Normal 0 C C
+S -350 550 400 -650 0 1 0 N
+X a0 1 -550 450 200 R 50 50 1 1 I
+X a1 2 -550 300 200 R 50 50 1 1 I
+X b0 3 -550 200 200 R 50 50 1 1 I
+X b1 4 -550 100 200 R 50 50 1 1 I
+X c0 5 -550 0 200 R 50 50 1 1 I
+X c1 6 -550 -100 200 R 50 50 1 1 I
+X d0 7 -550 -200 200 R 50 50 1 1 I
+X d1 8 -550 -300 200 R 50 50 1 1 I
+X EN 9 -550 -550 200 R 50 50 1 1 I I
+X S 10 -550 -450 200 R 50 50 1 1 I
+X Yd 11 600 0 200 L 50 50 1 1 O
+X Ya 12 600 300 200 L 50 50 1 1 O
+X Yb 13 600 200 200 L 50 50 1 1 O
+X Yc 14 600 100 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_7485
+#
+DEF IC_7485 X 0 40 Y Y 1 F N
+F0 "X" -50 -100 60 H V C CNN
+F1 "IC_7485" -50 50 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+T 0 0 550 60 0 0 0 4~BIT~comparator Normal 0 C C
+S -350 450 400 -400 0 1 0 N
+X A<B(in) 1 600 -100 200 L 50 50 1 1 I
+X A=B(in) 2 600 -200 200 L 50 50 1 1 I
+X A>B(in) 3 600 -300 200 L 50 50 1 1 I
+X A3 4 -550 100 200 R 50 50 1 1 I
+X B3 5 -550 -350 200 R 50 50 1 1 I
+X A2 6 -550 200 200 R 50 50 1 1 I
+X B2 7 -550 -250 200 R 50 50 1 1 I
+X A1 8 -550 300 200 R 50 50 1 1 I
+X B1 9 -550 -150 200 R 50 50 1 1 I
+X A0 10 -550 400 200 R 50 50 1 1 I
+X B0 11 -550 -50 200 R 50 50 1 1 I
+X A>B(out) 12 600 350 200 L 50 50 1 1 O
+X A=B(out) 13 600 250 200 L 50 50 1 1 O
+X A<B(out) 14 600 150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# INVCMOS
+#
+DEF INVCMOS X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "INVCMOS" -450 150 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+C 400 0 112 0 1 0 N
+S -250 200 -250 -200 0 1 0 N
+P 3 0 1 0 -250 200 300 0 -250 -200 N
+X in 1 -450 0 200 R 50 50 1 1 P
+X out 2 700 0 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# LM158
+#
+DEF LM158 X 0 40 Y Y 1 F N
+F0 "X" 0 -50 60 H V C CNN
+F1 "LM158" 50 500 60 H V C CNN
+F2 "" 0 -50 60 H I C CNN
+F3 "" 0 -50 60 H I C CNN
+DRAW
+S -400 450 450 -550 0 1 0 N
+X INV 1 -600 150 200 R 50 50 1 1 I
+X NON-INV 2 -600 -200 200 R 50 50 1 1 I
+X VCC 4 650 150 200 L 50 50 1 1 I
+X OUT 5 650 -150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# LM555N
+#
+DEF LM555N X 0 40 Y Y 1 F N
+F0 "X" 0 -50 60 H V C CNN
+F1 "LM555N" 0 100 60 H V C CNN
+F2 "" -50 0 60 H V C CNN
+F3 "" -50 0 60 H V C CNN
+DRAW
+S 350 -400 -350 400 0 1 0 N
+X GND 1 0 -600 200 U 50 50 1 1 W
+X TR 2 -550 250 200 R 50 50 1 1 I
+X Q 3 550 250 200 L 50 50 1 1 O
+X R 4 -550 -250 200 R 50 50 1 1 I I
+X CV 5 -550 0 200 R 50 50 1 1 I
+X THR 6 550 -250 200 L 50 50 1 1 I
+X DIS 7 550 0 200 L 50 50 1 1 I
+X VCC 8 0 600 200 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# LM_7812
+#
+DEF LM_7812 X 0 40 Y Y 1 F N
+F0 "X" 0 50 60 H V C CNN
+F1 "LM_7812" 0 150 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -350 200 350 -200 0 1 0 N
+X IN 1 -550 0 200 R 50 50 1 1 I
+X GND 2 0 -400 200 U 50 50 1 1 I
+X OUT 3 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# Lm_7805
+#
+DEF Lm_7805 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "Lm_7805" 50 150 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -350 100 350 -200 0 1 0 N
+X Vin 1 -550 0 200 R 50 50 1 1 P
+X GND 2 0 -400 200 U 50 50 1 1 P
+X Vout 3 550 0 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# NE555
+#
+DEF NE555 X 0 40 Y Y 1 F N
+F0 "X" 50 -700 60 H V C CNN
+F1 "NE555" 0 850 60 H V C CNN
+F2 "" 50 -700 60 H I C CNN
+F3 "" 50 -700 60 H I C CNN
+DRAW
+S -600 800 750 -650 0 1 0 N
+X CONT 1 -800 550 200 R 50 50 1 1 I
+X THRES 2 -800 250 200 R 50 50 1 1 I
+X TRIG 3 -800 -100 200 R 50 50 1 1 I
+X RESET 4 -800 -400 200 R 50 50 1 1 I
+X DISCH 5 950 -400 200 L 50 50 1 1 O
+X VCC 6 950 -100 200 L 50 50 1 1 I
+X GND 7 950 250 200 L 50 50 1 1 I
+X OUT 8 950 550 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# SCR
+#
+DEF SCR X 0 10 Y N 1 F N
+F0 "X" 150 200 50 H V C CNN
+F1 "SCR" 150 -350 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 2 0 0 0 -200 -150 200 -150 N
+P 2 0 1 0 0 -150 -200 -400 N
+P 3 0 1 0 -150 100 150 100 0 -150 F
+X A 1 0 400 300 D 60 60 1 1 I
+X K 2 0 -550 400 U 60 70 1 1 I
+X G 3 -350 -400 150 R 60 60 1 1 I
+ENDDRAW
+ENDDEF
+#
+# UJT
+#
+DEF UJT X 0 40 Y Y 1 F N
+F0 "X" -50 -50 60 H V C CNN
+F1 "UJT" 50 -50 60 H V C CNN
+F2 "" -50 -50 60 H I C CNN
+F3 "" -50 -50 60 H I C CNN
+DRAW
+C -50 -50 206 0 1 0 N
+P 2 0 1 0 -100 100 -100 -200 N
+P 3 0 1 0 -250 0 -200 0 -100 -100 N
+P 3 0 1 0 -200 -50 -150 -50 -150 0 N
+P 3 0 1 0 -100 -150 0 -150 0 -250 N
+P 3 0 1 0 -100 50 0 50 0 150 N
+X E 1 -450 0 200 R 50 50 1 1 I
+X B1 2 0 -450 200 U 50 50 1 1 B
+X B2 3 0 350 200 D 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_74LS04
+#
+DEF eSim_74LS04 X 0 40 Y Y 1 F N
+F0 "X" 0 100 60 H V C CNN
+F1 "eSim_74LS04" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S 350 500 -350 -500 0 1 0 N
+X ~ 1 -550 450 200 R 50 50 1 1 P
+X ~ 2 -550 300 200 R 50 50 1 1 P I
+X ~ 3 -550 150 200 R 50 50 1 1 P
+X ~ 4 -550 0 200 R 50 50 1 1 P I
+X ~ 5 -550 -150 200 R 50 50 1 1 P
+X ~ 6 -550 -300 200 R 50 50 1 1 P I
+X GND 7 -550 -450 200 R 50 50 1 1 P
+X ~ 8 550 -450 200 L 50 50 1 1 P I
+X ~ 9 550 -300 200 L 50 50 1 1 P
+X ~ 10 550 -150 200 L 50 50 1 1 P I
+X ~ 11 550 0 200 L 50 50 1 1 P
+X ~ 12 550 150 200 L 50 50 1 1 P I
+X ~ 13 550 300 200 L 50 50 1 1 P
+X VCC 14 550 450 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# full_adder
+#
+DEF full_adder X 0 40 Y Y 1 F N
+F0 "X" 1400 700 60 H V C CNN
+F1 "full_adder" 1400 600 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S 800 1150 1950 0 0 1 0 N
+X IN1 1 600 950 200 R 50 50 1 1 I
+X IN2 2 600 550 200 R 50 50 1 1 I
+X CIN 3 600 150 200 R 50 50 1 1 I
+X SUM 4 2150 950 200 L 50 50 1 1 O
+X COUT 5 2150 150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# full_sub
+#
+DEF full_sub X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "full_sub" 0 0 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -550 650 450 -600 0 1 0 N
+X A 1 -750 400 200 R 50 50 1 1 I
+X B 2 -750 200 200 R 50 50 1 1 I
+X BIN 3 -750 -200 200 R 50 50 1 1 I
+X DIFF 4 650 450 200 L 50 50 1 1 O
+X BORROW 5 650 150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# half_adder
+#
+DEF half_adder X 0 40 Y Y 1 F N
+F0 "X" 900 500 60 H V C CNN
+F1 "half_adder" 900 400 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S 500 800 1250 0 0 1 0 N
+X IN1 1 300 700 200 R 50 50 1 1 I
+X IN2 2 300 100 200 R 50 50 1 1 I
+X SUM 3 1450 700 200 L 50 50 1 1 O
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+ENDDRAW
+ENDDEF
+#
+# half_sub
+#
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+ENDDEF
+#
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+#
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+#
+#End Library
diff --git a/library/SubcircuitLibrary/8282/8282.pro b/library/SubcircuitLibrary/8282/8282.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/8282/8282.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
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+BoardNm=
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diff --git a/library/SubcircuitLibrary/8282/8282.sch b/library/SubcircuitLibrary/8282/8282.sch
new file mode 100644
index 00000000..4574117a
--- /dev/null
+++ b/library/SubcircuitLibrary/8282/8282.sch
@@ -0,0 +1,743 @@
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+LIBS:microcontrollers
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+ 8750 6100 9500 6100
+Text Label 4600 1450 0 60 ~ 0
+B0
+Text Label 4600 3150 0 60 ~ 0
+B1
+Text Label 4700 4650 0 60 ~ 0
+B2
+Text Label 4700 6400 0 60 ~ 0
+B3
+Text Label 9000 1200 0 60 ~ 0
+B4
+Text Label 9200 2850 0 60 ~ 0
+B5
+Text Label 9200 4450 0 60 ~ 0
+B6
+Text Label 9250 6100 0 60 ~ 0
+B7
+NoConn ~ 1950 700
+NoConn ~ 2500 1000
+NoConn ~ 1950 1950
+NoConn ~ 1950 2350
+NoConn ~ 2500 2650
+NoConn ~ 1950 3600
+NoConn ~ 1950 3950
+NoConn ~ 2500 4250
+NoConn ~ 1950 5200
+NoConn ~ 1950 5600
+NoConn ~ 2500 5900
+NoConn ~ 1950 6850
+NoConn ~ 6050 550
+NoConn ~ 6600 850
+NoConn ~ 6050 1800
+NoConn ~ 6050 2350
+NoConn ~ 6600 2650
+NoConn ~ 6050 3600
+NoConn ~ 6050 4100
+NoConn ~ 6600 4400
+NoConn ~ 6050 5350
+NoConn ~ 6000 5900
+NoConn ~ 6550 6200
+NoConn ~ 6000 7150
+Connection ~ 1200 7300
+$Comp
+L PORT U1
+U 19 1 682FC089
+P 10050 4850
+F 0 "U1" H 10100 4950 30 0000 C CNN
+F 1 "PORT" H 10050 4850 30 0000 C CNN
+F 2 "" H 10050 4850 60 0000 C CNN
+F 3 "" H 10050 4850 60 0000 C CNN
+ 19 10050 4850
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 20 1 682FC13C
+P 10050 5400
+F 0 "U1" H 10100 5500 30 0000 C CNN
+F 1 "PORT" H 10050 5400 30 0000 C CNN
+F 2 "" H 10050 5400 60 0000 C CNN
+F 3 "" H 10050 5400 60 0000 C CNN
+ 20 10050 5400
+ 1 0 0 -1
+$EndComp
+NoConn ~ 10300 4850
+NoConn ~ 10300 5400
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/8282/8282.sub b/library/SubcircuitLibrary/8282/8282.sub
new file mode 100644
index 00000000..76d55780
--- /dev/null
+++ b/library/SubcircuitLibrary/8282/8282.sub
@@ -0,0 +1,106 @@
+* Subcircuit 8282
+.subckt 8282 /a3 /a0 /a1 /a2 /stb /oe_bar /b0 /b1 /b2 /b3 /a4 /a5 /a6 /a7 /b4 /b5 /b6 /b7 ? ?
+* c:\users\hp\onedrive\documents\fossee\esim\library\subcircuitlibrary\8282\8282.cir
+* u2 /a0 /stb ? ? ? net-_u2-pad6_ d_dff
+* u3 /a1 /stb ? ? ? net-_u3-pad6_ d_dff
+* u16 /a4 /stb ? ? ? net-_u16-pad6_ d_dff
+* u17 /a5 /stb ? ? ? net-_u17-pad6_ d_dff
+* u4 /a2 /stb ? ? ? net-_u4-pad6_ d_dff
+* u5 /a3 /stb ? ? ? net-_u5-pad6_ d_dff
+* u18 /a6 /stb ? ? ? net-_u18-pad6_ d_dff
+* u15 /a7 /stb ? ? ? net-_u15-pad6_ d_dff
+* u6 net-_u2-pad6_ net-_u10-pad1_ d_inverter
+* u10 net-_u10-pad1_ net-_u10-pad2_ /b0 d_tristate
+* u7 net-_u3-pad6_ net-_u11-pad1_ d_inverter
+* u11 net-_u11-pad1_ net-_u10-pad2_ /b1 d_tristate
+* u8 net-_u4-pad6_ net-_u12-pad1_ d_inverter
+* u12 net-_u12-pad1_ net-_u10-pad2_ /b2 d_tristate
+* u9 net-_u5-pad6_ net-_u13-pad1_ d_inverter
+* u13 net-_u13-pad1_ net-_u10-pad2_ /b3 d_tristate
+* u19 net-_u16-pad6_ net-_u19-pad2_ d_inverter
+* u23 net-_u19-pad2_ net-_u10-pad2_ /b4 d_tristate
+* u20 net-_u17-pad6_ net-_u20-pad2_ d_inverter
+* u24 net-_u20-pad2_ net-_u10-pad2_ /b5 d_tristate
+* u21 net-_u18-pad6_ net-_u21-pad2_ d_inverter
+* u25 net-_u21-pad2_ net-_u10-pad2_ /b6 d_tristate
+* u22 net-_u15-pad6_ net-_u22-pad2_ d_inverter
+* u26 net-_u22-pad2_ net-_u10-pad2_ /b7 d_tristate
+* u14 /oe_bar net-_u10-pad2_ d_inverter
+a1 /a0 /stb ? ? ? net-_u2-pad6_ u2
+a2 /a1 /stb ? ? ? net-_u3-pad6_ u3
+a3 /a4 /stb ? ? ? net-_u16-pad6_ u16
+a4 /a5 /stb ? ? ? net-_u17-pad6_ u17
+a5 /a2 /stb ? ? ? net-_u4-pad6_ u4
+a6 /a3 /stb ? ? ? net-_u5-pad6_ u5
+a7 /a6 /stb ? ? ? net-_u18-pad6_ u18
+a8 /a7 /stb ? ? ? net-_u15-pad6_ u15
+a9 net-_u2-pad6_ net-_u10-pad1_ u6
+a10 net-_u10-pad1_ net-_u10-pad2_ /b0 u10
+a11 net-_u3-pad6_ net-_u11-pad1_ u7
+a12 net-_u11-pad1_ net-_u10-pad2_ /b1 u11
+a13 net-_u4-pad6_ net-_u12-pad1_ u8
+a14 net-_u12-pad1_ net-_u10-pad2_ /b2 u12
+a15 net-_u5-pad6_ net-_u13-pad1_ u9
+a16 net-_u13-pad1_ net-_u10-pad2_ /b3 u13
+a17 net-_u16-pad6_ net-_u19-pad2_ u19
+a18 net-_u19-pad2_ net-_u10-pad2_ /b4 u23
+a19 net-_u17-pad6_ net-_u20-pad2_ u20
+a20 net-_u20-pad2_ net-_u10-pad2_ /b5 u24
+a21 net-_u18-pad6_ net-_u21-pad2_ u21
+a22 net-_u21-pad2_ net-_u10-pad2_ /b6 u25
+a23 net-_u15-pad6_ net-_u22-pad2_ u22
+a24 net-_u22-pad2_ net-_u10-pad2_ /b7 u26
+a25 /oe_bar net-_u10-pad2_ u14
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u2 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u3 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u16 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u17 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u4 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u5 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u18 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u15 d_dff(clk_delay=1.0e-9 set_delay=1.0e-9 reset_delay=1.0 ic=0 data_load=1.0e-12 clk_load=1.0e-12 set_load=1.0e-12 reset_load=1.0e-12 rise_delay=1.0e-9 fall_delay=1.0e-9 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u10 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u11 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u12 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u13 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u19 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u23 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u20 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u24 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u21 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u25 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u22 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name: d_tristate, NgSpice Name: d_tristate
+.model u26 d_tristate(delay=1.0e-9 input_load=1.0e-12 enable_load=1.0e-12 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u14 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Control Statements
+
+.ends 8282 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/8282/8282_Previous_Values.xml b/library/SubcircuitLibrary/8282/8282_Previous_Values.xml
new file mode 100644
index 00000000..a76a2328
--- /dev/null
+++ b/library/SubcircuitLibrary/8282/8282_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">d_dff<field1 name="Enter Clk Delay (default=1.0e-9)" /><field2 name="Enter Set Delay (default=1.0e-9)" /><field3 name="Enter Reset Delay (default=1.0)" /><field4 name="Enter IC (default=0)" /><field5 name="Enter value for Data Load (default=1.0e-12)" /><field6 name="Enter value for Clk Load (default=1.0e-12)" /><field7 name="Enter value for Set Load (default=1.0e-12)" /><field8 name="Enter value for Reset Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /><field10 name="Enter Fall Delay (default=1.0e-9)" /></u2><u3 name="type">d_dff<field11 name="Enter Clk Delay (default=1.0e-9)" /><field12 name="Enter Set Delay (default=1.0e-9)" /><field13 name="Enter Reset Delay (default=1.0)" /><field14 name="Enter IC (default=0)" /><field15 name="Enter value for Data Load (default=1.0e-12)" /><field16 name="Enter value for Clk Load (default=1.0e-12)" /><field17 name="Enter value for Set Load (default=1.0e-12)" /><field18 name="Enter value for Reset Load (default=1.0e-12)" /><field19 name="Enter Rise Delay (default=1.0e-9)" /><field20 name="Enter Fall Delay (default=1.0e-9)" /></u3><u16 name="type">d_dff<field21 name="Enter Clk Delay (default=1.0e-9)" /><field22 name="Enter Set Delay (default=1.0e-9)" /><field23 name="Enter Reset Delay (default=1.0)" /><field24 name="Enter IC (default=0)" /><field25 name="Enter value for Data Load (default=1.0e-12)" /><field26 name="Enter value for Clk Load (default=1.0e-12)" /><field27 name="Enter value for Set Load (default=1.0e-12)" /><field28 name="Enter value for Reset Load (default=1.0e-12)" /><field29 name="Enter Rise Delay (default=1.0e-9)" /><field30 name="Enter Fall Delay (default=1.0e-9)" /></u16><u17 name="type">d_dff<field31 name="Enter Clk Delay (default=1.0e-9)" /><field32 name="Enter Set Delay (default=1.0e-9)" /><field33 name="Enter Reset Delay (default=1.0)" /><field34 name="Enter IC (default=0)" /><field35 name="Enter value for Data Load (default=1.0e-12)" /><field36 name="Enter value for Clk Load (default=1.0e-12)" /><field37 name="Enter value for Set Load (default=1.0e-12)" /><field38 name="Enter value for Reset Load (default=1.0e-12)" /><field39 name="Enter Rise Delay (default=1.0e-9)" /><field40 name="Enter Fall Delay (default=1.0e-9)" /></u17><u4 name="type">d_dff<field41 name="Enter Clk Delay (default=1.0e-9)" /><field42 name="Enter Set Delay (default=1.0e-9)" /><field43 name="Enter Reset Delay (default=1.0)" /><field44 name="Enter IC (default=0)" /><field45 name="Enter value for Data Load (default=1.0e-12)" /><field46 name="Enter value for Clk Load (default=1.0e-12)" /><field47 name="Enter value for Set Load (default=1.0e-12)" /><field48 name="Enter value for Reset Load (default=1.0e-12)" /><field49 name="Enter Rise Delay (default=1.0e-9)" /><field50 name="Enter Fall Delay (default=1.0e-9)" /></u4><u5 name="type">d_dff<field51 name="Enter Clk Delay (default=1.0e-9)" /><field52 name="Enter Set Delay (default=1.0e-9)" /><field53 name="Enter Reset Delay (default=1.0)" /><field54 name="Enter IC (default=0)" /><field55 name="Enter value for Data Load (default=1.0e-12)" /><field56 name="Enter value for Clk Load (default=1.0e-12)" /><field57 name="Enter value for Set Load (default=1.0e-12)" /><field58 name="Enter value for Reset Load (default=1.0e-12)" /><field59 name="Enter Rise Delay (default=1.0e-9)" /><field60 name="Enter Fall Delay (default=1.0e-9)" /></u5><u18 name="type">d_dff<field61 name="Enter Clk Delay (default=1.0e-9)" /><field62 name="Enter Set Delay (default=1.0e-9)" /><field63 name="Enter Reset Delay (default=1.0)" /><field64 name="Enter IC (default=0)" /><field65 name="Enter value for Data Load (default=1.0e-12)" /><field66 name="Enter value for Clk Load (default=1.0e-12)" /><field67 name="Enter value for Set Load (default=1.0e-12)" /><field68 name="Enter value for Reset Load (default=1.0e-12)" /><field69 name="Enter Rise Delay (default=1.0e-9)" /><field70 name="Enter Fall Delay (default=1.0e-9)" /></u18><u15 name="type">d_dff<field71 name="Enter Clk Delay (default=1.0e-9)" /><field72 name="Enter Set Delay (default=1.0e-9)" /><field73 name="Enter Reset Delay (default=1.0)" /><field74 name="Enter IC (default=0)" /><field75 name="Enter value for Data Load (default=1.0e-12)" /><field76 name="Enter value for Clk Load (default=1.0e-12)" /><field77 name="Enter value for Set Load (default=1.0e-12)" /><field78 name="Enter value for Reset Load (default=1.0e-12)" /><field79 name="Enter Rise Delay (default=1.0e-9)" /><field80 name="Enter Fall Delay (default=1.0e-9)" /></u15><u6 name="type">d_inverter<field81 name="Enter Rise Delay (default=1.0e-9)" /><field82 name="Enter Fall Delay (default=1.0e-9)" /><field83 name="Enter Input Load (default=1.0e-12)" /></u6><u10 name="type">d_tristate<field84 name="Enter Delay (default=1.0e-9)" /><field85 name="Enter Input Load (default=1.0e-12)" /><field86 name="Enter Enable Load (default=1.0e-12)" /></u10><u7 name="type">d_inverter<field87 name="Enter Rise Delay (default=1.0e-9)" /><field88 name="Enter Fall Delay (default=1.0e-9)" /><field89 name="Enter Input Load (default=1.0e-12)" /></u7><u11 name="type">d_tristate<field90 name="Enter Delay (default=1.0e-9)" /><field91 name="Enter Input Load (default=1.0e-12)" /><field92 name="Enter Enable Load (default=1.0e-12)" /></u11><u8 name="type">d_inverter<field93 name="Enter Rise Delay (default=1.0e-9)" /><field94 name="Enter Fall Delay (default=1.0e-9)" /><field95 name="Enter Input Load (default=1.0e-12)" /></u8><u12 name="type">d_tristate<field96 name="Enter Delay (default=1.0e-9)" /><field97 name="Enter Input Load (default=1.0e-12)" /><field98 name="Enter Enable Load (default=1.0e-12)" /></u12><u9 name="type">d_inverter<field99 name="Enter Rise Delay (default=1.0e-9)" /><field100 name="Enter Fall Delay (default=1.0e-9)" /><field101 name="Enter Input Load (default=1.0e-12)" /></u9><u13 name="type">d_tristate<field102 name="Enter Delay (default=1.0e-9)" /><field103 name="Enter Input Load (default=1.0e-12)" /><field104 name="Enter Enable Load (default=1.0e-12)" /></u13><u19 name="type">d_inverter<field105 name="Enter Rise Delay (default=1.0e-9)" /><field106 name="Enter Fall Delay (default=1.0e-9)" /><field107 name="Enter Input Load (default=1.0e-12)" /></u19><u23 name="type">d_tristate<field108 name="Enter Delay (default=1.0e-9)" /><field109 name="Enter Input Load (default=1.0e-12)" /><field110 name="Enter Enable Load (default=1.0e-12)" /></u23><u20 name="type">d_inverter<field111 name="Enter Rise Delay (default=1.0e-9)" /><field112 name="Enter Fall Delay (default=1.0e-9)" /><field113 name="Enter Input Load (default=1.0e-12)" /></u20><u24 name="type">d_tristate<field114 name="Enter Delay (default=1.0e-9)" /><field115 name="Enter Input Load (default=1.0e-12)" /><field116 name="Enter Enable Load (default=1.0e-12)" /></u24><u21 name="type">d_inverter<field117 name="Enter Rise Delay (default=1.0e-9)" /><field118 name="Enter Fall Delay (default=1.0e-9)" /><field119 name="Enter Input Load (default=1.0e-12)" /></u21><u25 name="type">d_tristate<field120 name="Enter Delay (default=1.0e-9)" /><field121 name="Enter Input Load (default=1.0e-12)" /><field122 name="Enter Enable Load (default=1.0e-12)" /></u25><u22 name="type">d_inverter<field123 name="Enter Rise Delay (default=1.0e-9)" /><field124 name="Enter Fall Delay (default=1.0e-9)" /><field125 name="Enter Input Load (default=1.0e-12)" /></u22><u26 name="type">d_tristate<field126 name="Enter Delay (default=1.0e-9)" /><field127 name="Enter Input Load (default=1.0e-12)" /><field128 name="Enter Enable Load (default=1.0e-12)" /></u26><u14 name="type">d_inverter<field129 name="Enter Rise Delay (default=1.0e-9)" /><field130 name="Enter Fall Delay (default=1.0e-9)" /><field131 name="Enter Input Load (default=1.0e-12)" /></u14></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/8282/analysis b/library/SubcircuitLibrary/8282/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/8282/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file
generated by cgit (git 2.34.1) at 2025-07-05 01:32:40 +0000