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| author | Sumanto Kar | 2024-11-21 20:51:48 +0530 |
|---|---|---|
| committer | GitHub | 2024-11-21 20:51:48 +0530 |
| commit | 70dbdd89d848221c612f6111b9d84e52211c3287 (patch) | |
| tree | 9d9e029da9e5c82587eb527ab70a734282016276 /library/SubcircuitLibrary/SN7483A_sub/4_OR.cir | |
| parent | bad2ecec9f975e23c24242c1798a734d11285241 (diff) | |
| parent | 4783a9db2daecb6256a4cb89c01e9b369ae2e927 (diff) | |
| download | eSim-70dbdd89d848221c612f6111b9d84e52211c3287.tar.gz eSim-70dbdd89d848221c612f6111b9d84e52211c3287.tar.bz2 eSim-70dbdd89d848221c612f6111b9d84e52211c3287.zip | |
Merge pull request #287 from Eyantra698Sumanto/master
Subcircuit Files of ICs(Contributor: Sudheshna Prabakaran)
Diffstat (limited to 'library/SubcircuitLibrary/SN7483A_sub/4_OR.cir')
| -rw-r--r-- | library/SubcircuitLibrary/SN7483A_sub/4_OR.cir | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/SN7483A_sub/4_OR.cir b/library/SubcircuitLibrary/SN7483A_sub/4_OR.cir new file mode 100644 index 00000000..b338b7b5 --- /dev/null +++ b/library/SubcircuitLibrary/SN7483A_sub/4_OR.cir @@ -0,0 +1,14 @@ +* C:\Users\malli\eSim\src\SubcircuitLibrary\4_OR\4_OR.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 03/28/19 22:47:12 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U2 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_or +U3 Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U3-Pad3_ d_or +U4 Net-_U2-Pad3_ Net-_U3-Pad3_ Net-_U1-Pad5_ d_or +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ PORT + +.end |