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author | Maanit | 2025-02-16 19:36:48 +0530 |
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committer | Maanit | 2025-02-16 19:36:48 +0530 |
commit | 5b7ef235576d903e20c11e348fcaf5c2b30bb059 (patch) | |
tree | 311ef44076c4dea6be25eef07da5fd7c3e18aa4b /library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm | |
parent | 4ffd6c2f3e762b97739af70fff7bc14cf51e9b54 (diff) | |
download | eSim-5b7ef235576d903e20c11e348fcaf5c2b30bb059.tar.gz eSim-5b7ef235576d903e20c11e348fcaf5c2b30bb059.tar.bz2 eSim-5b7ef235576d903e20c11e348fcaf5c2b30bb059.zip |
NAND Gate TTL required for SN74LS00
Diffstat (limited to 'library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm')
-rw-r--r-- | library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm b/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm new file mode 100644 index 00000000..1980d0d1 --- /dev/null +++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm @@ -0,0 +1,7 @@ +EESchema-DOCLIB Version 2.0 +# +$CMP SCR +D Thyristor +$ENDCMP +# +#End Doc Library |