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authorMaanit2025-02-16 19:36:48 +0530
committerMaanit2025-02-16 19:36:48 +0530
commit5b7ef235576d903e20c11e348fcaf5c2b30bb059 (patch)
tree311ef44076c4dea6be25eef07da5fd7c3e18aa4b /library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm
parent4ffd6c2f3e762b97739af70fff7bc14cf51e9b54 (diff)
downloadeSim-5b7ef235576d903e20c11e348fcaf5c2b30bb059.tar.gz
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NAND Gate TTL required for SN74LS00
Diffstat (limited to 'library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm')
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diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm b/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm
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@@ -0,0 +1,7 @@
+EESchema-DOCLIB Version 2.0
+#
+$CMP SCR
+D Thyristor
+$ENDCMP
+#
+#End Doc Library