NAND Gate TTL required for SN74LS00

12 files changed, 1311 insertions, 0 deletions

diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/D.lib b/library/SubcircuitLibrary/NAND_GATE_FINAL/D.lib
new file mode 100644
index 00000000..f53bf3e0
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL-cache.lib b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL-cache.lib
new file mode 100644
index 00000000..26ac6e60
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL-cache.lib
@@ -0,0 +1,120 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.cir b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.cir
new file mode 100644
index 00000000..895e7634
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.cir
@@ -0,0 +1,21 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\NAND_GATE_FINAL\NAND_GATE_FINAL.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 01/12/25 21:44:11
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q2  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q2-Pad3_ eSim_NPN		
+Q1  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN		
+R1  Net-_R1-Pad1_ Net-_Q1-Pad2_ 500		
+R2  Net-_R1-Pad1_ Net-_Q3-Pad1_ 60k		
+R4  Net-_Q4-Pad1_ Net-_R1-Pad1_ 10k		
+Q4  Net-_Q4-Pad1_ Net-_Q3-Pad1_ Net-_D1-Pad1_ eSim_NPN		
+Q3  Net-_Q3-Pad1_ Net-_Q1-Pad1_ Net-_Q3-Pad3_ eSim_NPN		
+D1  Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode		
+Q5  Net-_D1-Pad2_ Net-_Q3-Pad3_ GND eSim_NPN		
+R3  Net-_Q3-Pad3_ GND 10k		
+U1  Net-_Q1-Pad3_ Net-_Q2-Pad3_ Net-_D1-Pad2_ Net-_R1-Pad1_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.cir.out b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.cir.out
new file mode 100644
index 00000000..2c658aae
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.cir.out
@@ -0,0 +1,24 @@
+* c:\fossee\esim\library\subcircuitlibrary\nand_gate_final\nand_gate_final.cir
+
+.include D.lib
+.include NPN.lib
+q2 net-_q1-pad1_ net-_q1-pad2_ net-_q2-pad3_ Q2N2222
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+r1  net-_r1-pad1_ net-_q1-pad2_ 500
+r2  net-_r1-pad1_ net-_q3-pad1_ 60k
+r4  net-_q4-pad1_ net-_r1-pad1_ 10k
+q4 net-_q4-pad1_ net-_q3-pad1_ net-_d1-pad1_ Q2N2222
+q3 net-_q3-pad1_ net-_q1-pad1_ net-_q3-pad3_ Q2N2222
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+q5 net-_d1-pad2_ net-_q3-pad3_ gnd Q2N2222
+r3  net-_q3-pad3_ gnd 10k
+* u1  net-_q1-pad3_ net-_q2-pad3_ net-_d1-pad2_ net-_r1-pad1_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.pro b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.sch b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.sch
new file mode 100644
index 00000000..99c63cf9
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.sch
@@ -0,0 +1,284 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:NAND_GATE_FINAL-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q2
+U 1 1 67704AAF
+P 3150 4650
+F 0 "Q2" H 3050 4700 50  0000 R CNN
+F 1 "eSim_NPN" H 3100 4800 50  0000 R CNN
+F 2 "" H 3350 4750 29  0000 C CNN
+F 3 "" H 3150 4650 60  0000 C CNN
+	1    3150 4650
+	-1   0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q1
+U 1 1 67704B0A
+P 2350 4650
+F 0 "Q1" H 2250 4700 50  0000 R CNN
+F 1 "eSim_NPN" H 2300 4800 50  0000 R CNN
+F 2 "" H 2550 4750 29  0000 C CNN
+F 3 "" H 2350 4650 60  0000 C CNN
+	1    2350 4650
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R1
+U 1 1 67704BF2
+P 2700 3400
+F 0 "R1" H 2750 3530 50  0000 C CNN
+F 1 "500" H 2750 3350 50  0000 C CNN
+F 2 "" H 2750 3380 30  0000 C CNN
+F 3 "" V 2750 3450 30  0000 C CNN
+	1    2700 3400
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R2
+U 1 1 67704C41
+P 3600 3400
+F 0 "R2" H 3650 3530 50  0000 C CNN
+F 1 "60k" H 3650 3350 50  0000 C CNN
+F 2 "" H 3650 3380 30  0000 C CNN
+F 3 "" V 3650 3450 30  0000 C CNN
+	1    3600 3400
+	0    1    1    0   
+$EndComp
+$Comp
+L resistor R4
+U 1 1 67704C62
+P 4650 3500
+F 0 "R4" H 4700 3630 50  0000 C CNN
+F 1 "10k" H 4700 3450 50  0000 C CNN
+F 2 "" H 4700 3480 30  0000 C CNN
+F 3 "" V 4700 3550 30  0000 C CNN
+	1    4650 3500
+	0    -1   -1   0   
+$EndComp
+$Comp
+L eSim_NPN Q4
+U 1 1 67704C93
+P 4500 4050
+F 0 "Q4" H 4400 4100 50  0000 R CNN
+F 1 "eSim_NPN" H 4450 4200 50  0000 R CNN
+F 2 "" H 4700 4150 29  0000 C CNN
+F 3 "" H 4500 4050 60  0000 C CNN
+	1    4500 4050
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 67704CC8
+P 3900 4350
+F 0 "Q3" H 3800 4400 50  0000 R CNN
+F 1 "eSim_NPN" H 3850 4500 50  0000 R CNN
+F 2 "" H 4100 4450 29  0000 C CNN
+F 3 "" H 3900 4350 60  0000 C CNN
+	1    3900 4350
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_Diode D1
+U 1 1 67704D0D
+P 4600 4600
+F 0 "D1" H 4600 4700 50  0000 C CNN
+F 1 "eSim_Diode" H 4600 4500 50  0000 C CNN
+F 2 "" H 4600 4600 60  0000 C CNN
+F 3 "" H 4600 4600 60  0000 C CNN
+	1    4600 4600
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_NPN Q5
+U 1 1 67704DC5
+P 4500 5250
+F 0 "Q5" H 4400 5300 50  0000 R CNN
+F 1 "eSim_NPN" H 4450 5400 50  0000 R CNN
+F 2 "" H 4700 5350 29  0000 C CNN
+F 3 "" H 4500 5250 60  0000 C CNN
+	1    4500 5250
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R3
+U 1 1 67704DD6
+P 3950 5500
+F 0 "R3" H 4000 5630 50  0000 C CNN
+F 1 "10k" V 4000 5450 50  0000 C CNN
+F 2 "" H 4000 5480 30  0000 C CNN
+F 3 "" V 4000 5550 30  0000 C CNN
+	1    3950 5500
+	0    1    1    0   
+$EndComp
+$Comp
+L PORT U1
+U 1 1 67705207
+P 2450 5250
+F 0 "U1" H 2500 5350 30  0000 C CNN
+F 1 "PORT" H 2450 5250 30  0000 C CNN
+F 2 "" H 2450 5250 60  0000 C CNN
+F 3 "" H 2450 5250 60  0000 C CNN
+	1    2450 5250
+	0    -1   -1   0   
+$EndComp
+$Comp
+L PORT U1
+U 2 1 67705289
+P 3050 5250
+F 0 "U1" H 3100 5350 30  0000 C CNN
+F 1 "PORT" H 3050 5250 30  0000 C CNN
+F 2 "" H 3050 5250 60  0000 C CNN
+F 3 "" H 3050 5250 60  0000 C CNN
+	2    3050 5250
+	0    -1   -1   0   
+$EndComp
+$Comp
+L PORT U1
+U 3 1 677052CE
+P 5300 4900
+F 0 "U1" H 5350 5000 30  0000 C CNN
+F 1 "PORT" H 5300 4900 30  0000 C CNN
+F 2 "" H 5300 4900 60  0000 C CNN
+F 3 "" H 5300 4900 60  0000 C CNN
+	3    5300 4900
+	-1   0    0    1   
+$EndComp
+$Comp
+L GND #PWR01
+U 1 1 67705545
+P 4750 5800
+F 0 "#PWR01" H 4750 5550 50  0001 C CNN
+F 1 "GND" H 4750 5650 50  0000 C CNN
+F 2 "" H 4750 5800 50  0001 C CNN
+F 3 "" H 4750 5800 50  0001 C CNN
+	1    4750 5800
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	3050 4450 2450 4450
+Wire Wire Line
+	3350 4150 2150 4150
+Wire Wire Line
+	3350 4650 3350 4150
+Wire Wire Line
+	2150 4150 2150 4650
+Connection ~ 2750 4450
+Wire Wire Line
+	4000 4550 4000 5400
+Wire Wire Line
+	4300 5250 4000 5250
+Connection ~ 4000 5250
+Wire Wire Line
+	4600 5050 4600 4750
+Wire Wire Line
+	4600 4450 4600 4250
+Wire Wire Line
+	4600 3850 4600 3600
+Wire Wire Line
+	3650 4050 4300 4050
+Wire Wire Line
+	4000 4050 4000 4150
+Wire Wire Line
+	3650 4050 3650 3600
+Connection ~ 4000 4050
+Wire Wire Line
+	2750 3300 2750 3050
+Wire Wire Line
+	4600 3050 4600 3300
+Wire Wire Line
+	3650 3300 3650 3050
+Connection ~ 3650 3050
+Wire Wire Line
+	2450 4850 2450 5000
+Wire Wire Line
+	3050 4850 3050 5000
+Wire Wire Line
+	4000 5700 4000 5800
+Wire Wire Line
+	4000 5800 4750 5800
+Wire Wire Line
+	4600 4900 5050 4900
+Connection ~ 4600 4900
+Connection ~ 4600 5800
+Connection ~ 4600 3050
+Wire Wire Line
+	4600 5800 4600 5450
+$Comp
+L PORT U1
+U 4 1 677060E6
+P 4750 2700
+F 0 "U1" H 4800 2800 30  0000 C CNN
+F 1 "PORT" H 4750 2700 30  0000 C CNN
+F 2 "" H 4750 2700 60  0000 C CNN
+F 3 "" H 4750 2700 60  0000 C CNN
+	4    4750 2700
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	4750 2950 4750 3050
+Connection ~ 4750 3050
+Wire Wire Line
+	4750 3050 2750 3050
+Connection ~ 4600 3750
+Wire Wire Line
+	2750 3600 2750 4150
+Connection ~ 2750 4150
+Wire Wire Line
+	3700 4350 2750 4350
+Wire Wire Line
+	2750 4350 2750 4450
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.sub b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.sub
new file mode 100644
index 00000000..544c5e10
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL.sub
@@ -0,0 +1,18 @@
+* Subcircuit NAND_GATE_FINAL
+.subckt NAND_GATE_FINAL net-_q1-pad3_ net-_q2-pad3_ net-_d1-pad2_ net-_r1-pad1_ 
+* c:\fossee\esim\library\subcircuitlibrary\nand_gate_final\nand_gate_final.cir
+.include D.lib
+.include NPN.lib
+q2 net-_q1-pad1_ net-_q1-pad2_ net-_q2-pad3_ Q2N2222
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+r1  net-_r1-pad1_ net-_q1-pad2_ 500
+r2  net-_r1-pad1_ net-_q3-pad1_ 60k
+r4  net-_q4-pad1_ net-_r1-pad1_ 10k
+q4 net-_q4-pad1_ net-_q3-pad1_ net-_d1-pad1_ Q2N2222
+q3 net-_q3-pad1_ net-_q1-pad1_ net-_q3-pad3_ Q2N2222
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+q5 net-_d1-pad2_ net-_q3-pad3_ gnd Q2N2222
+r3  net-_q3-pad3_ gnd 10k
+* Control Statements
+
+.ends NAND_GATE_FINAL
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL_Previous_Values.xml b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL_Previous_Values.xml
new file mode 100644
index 00000000..0eb364f5
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/NAND_GATE_FINAL_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q4><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q3><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q5></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/NPN.lib b/library/SubcircuitLibrary/NAND_GATE_FINAL/NPN.lib
new file mode 100644
index 00000000..be5f3073
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p 
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/analysis b/library/SubcircuitLibrary/NAND_GATE_FINAL/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm b/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm
new file mode 100644
index 00000000..1980d0d1
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.dcm
@@ -0,0 +1,7 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP SCR
+D Thyristor
+$ENDCMP
+#
+#End Doc Library
diff --git a/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.lib b/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.lib
new file mode 100644
index 00000000..32e7ba06
--- /dev/null
+++ b/library/SubcircuitLibrary/NAND_GATE_FINAL/nand_gate_pakka.lib
@@ -0,0 +1,756 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 10bitDAC
+#
+DEF 10bitDAC X 0 40 Y Y 1 F N
+F0 "X" 0 50 60 H V C CNN
+F1 "10bitDAC" -50 -50 60 H V C CNN
+F2 "" 0 50 60 H I C CNN
+F3 "" 0 50 60 H I C CNN
+DRAW
+S -500 500 400 -600 0 1 0 N
+X D0 1 -700 -500 200 R 50 50 1 1 I
+X D1 2 -700 -400 200 R 50 50 1 1 I
+X D2 3 -700 -300 200 R 50 50 1 1 I
+X D3 4 -700 -200 200 R 50 50 1 1 I
+X D4 5 -700 -100 200 R 50 50 1 1 I
+X D5 6 -700 0 200 R 50 50 1 1 I
+X D6 7 -700 100 200 R 50 50 1 1 I
+X D7 8 -700 200 200 R 50 50 1 1 I
+X D8 9 -700 300 200 R 50 50 1 1 I
+X D9 10 -700 400 200 R 50 50 1 1 I
+X AnalogOut 11 600 350 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 2BITMUL
+#
+DEF 2BITMUL X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "2BITMUL" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -300 400 300 -400 0 1 0 N
+X A0 1 -500 300 200 R 50 50 1 1 I
+X A1 2 -500 150 200 R 50 50 1 1 I
+X B0 3 -500 -50 200 R 50 50 1 1 I
+X B1 4 -500 -250 200 R 50 50 1 1 I
+X M0 5 500 250 200 L 50 50 1 1 O
+X M1 6 500 100 200 L 50 50 1 1 O
+X M2 7 500 -50 200 L 50 50 1 1 O
+X M3 8 500 -250 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 3_and
+#
+DEF 3_and X 0 40 Y Y 1 F N
+F0 "X" 100 -50 60 H V C CNN
+F1 "3_and" 150 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 150 50 158 716 -716 0 1 0 N 200 200 200 -100
+P 2 0 1 0 -150 200 200 200 N
+P 3 0 1 0 -150 200 -150 -100 200 -100 N
+X in1 1 -350 150 200 R 50 50 1 1 I
+X in2 2 -350 50 200 R 50 50 1 1 I
+X in3 3 -350 -50 200 R 50 50 1 1 I
+X out 4 500 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 4_OR
+#
+DEF 4_OR X 0 40 Y Y 1 F N
+F0 "X" 150 -100 60 H V C CNN
+F1 "4_OR" 150 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A -800 0 650 226 -226 0 1 0 N -200 250 -200 -250
+A -73 134 444 -599 -176 0 1 0 N 150 -250 350 0
+A -30 -99 393 627 146 0 1 0 N 150 250 350 0
+P 2 0 1 0 -200 -250 150 -250 N
+P 2 0 1 0 -200 250 150 250 N
+X in1 1 -350 150 200 R 50 50 1 1 I
+X in2 2 -350 50 200 R 50 50 1 1 I
+X in3 3 -350 -50 200 R 50 50 1 1 I
+X in4 4 -350 -150 200 R 50 50 1 1 I
+X out 5 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 4_and
+#
+DEF 4_and X 0 40 Y Y 1 F N
+F0 "X" 50 -50 60 H V C CNN
+F1 "4_and" 100 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 206 760 -760 0 1 0 N 150 200 150 -200
+P 2 0 1 0 -200 200 150 200 N
+P 4 0 1 0 -200 200 -200 -200 50 -200 150 -200 N
+X in1 1 -400 150 200 R 50 50 1 1 I
+X in2 2 -400 50 200 R 50 50 1 1 I
+X in3 3 -400 -50 200 R 50 50 1 1 I
+X in4 4 -400 -150 200 R 50 50 1 1 I
+X out 5 500 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 556
+#
+DEF 556 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "556" 0 0 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 400 250 -550 0 1 0 N
+X dis1 1 -500 150 200 R 50 50 1 1 I
+X thr1 2 -500 -150 200 R 50 50 1 1 I
+X cv1 3 -150 -750 200 U 50 50 1 1 I
+X rst1 4 -200 600 200 D 50 50 1 1 I
+X out1 5 -500 0 200 R 50 50 1 1 O
+X trig1 6 -500 -300 200 R 50 50 1 1 I
+X gnd 7 0 -750 200 U 50 50 1 1 I
+X trig2 8 450 -300 200 L 50 50 1 1 I
+X out2 9 450 0 200 L 50 50 1 1 O
+X rst2 10 100 600 200 D 50 50 1 1 I
+X cv2 11 150 -750 200 U 50 50 1 1 I
+X thr2 12 450 -150 200 L 50 50 1 1 I
+X dis2 13 450 150 200 L 50 50 1 1 I
+X vcc 14 -50 600 200 D 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# 5_and
+#
+DEF 5_and X 0 40 Y Y 1 F N
+F0 "X" 50 -100 60 H V C CNN
+F1 "5_and" 100 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 255 787 -787 0 1 0 N 150 250 150 -250
+P 2 0 1 0 -250 250 150 250 N
+P 3 0 1 0 -250 250 -250 -250 150 -250 N
+X in1 1 -450 200 200 R 50 50 1 1 I
+X in2 2 -450 100 200 R 50 50 1 1 I
+X in3 3 -450 0 200 R 50 50 1 1 I
+X in4 4 -450 -100 200 R 50 50 1 1 I
+X in5 5 -450 -200 200 R 50 50 1 1 I
+X out 6 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# CMOS_NAND
+#
+DEF CMOS_NAND X 0 40 Y Y 1 F N
+F0 "X" -100 -150 60 H V C CNN
+F1 "CMOS_NAND" 0 -50 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+A 150 -50 381 668 -668 0 1 0 N 300 300 300 -400
+C 550 0 50 0 1 0 N
+P 2 0 1 0 -350 300 300 300 N
+P 3 0 1 0 -350 300 -350 -400 300 -400 N
+X in1 1 -550 250 200 R 50 50 1 1 I
+X in2 2 -550 -300 200 R 50 50 1 1 I
+X out 3 800 0 279 L 79 79 1 1 I
+ENDDRAW
+ENDDEF
+#
+# Clock_pulse_generator
+#
+DEF Clock_pulse_generator X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "Clock_pulse_generator" 0 -100 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -550 200 600 -300 0 1 0 N
+X Vdd 1 -750 100 200 R 50 50 1 1 I
+X R 2 -750 -50 200 R 50 50 1 1 I
+X C 3 -750 -200 200 R 50 50 1 1 I
+X Clkout 4 800 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_4002
+#
+DEF IC_4002 X 0 40 Y Y 1 F N
+F0 "X" 0 150 60 H V C CNN
+F1 "IC_4002" 0 0 60 H V C CNN
+F2 "" 50 -150 60 H V C CNN
+F3 "" 50 -150 60 H V C CNN
+DRAW
+S -250 350 250 -400 0 1 0 N
+X 1Y 1 -450 250 200 R 50 50 1 1 O
+X 1A 2 -450 150 200 R 50 50 1 1 I
+X 1B 3 -450 50 200 R 50 50 1 1 I
+X 1C 4 -450 -50 200 R 50 50 1 1 I
+X 1D 5 -450 -150 200 R 50 50 1 1 I
+X NC 6 -450 -250 200 R 50 50 1 1 I
+X GND 7 -450 -350 200 R 50 50 1 1 I
+X NC 8 450 -350 200 L 50 50 1 1 I
+X 2A 9 450 -250 200 L 50 50 1 1 I
+X 2B 10 450 -150 200 L 50 50 1 1 I
+X 2C 11 450 -50 200 L 50 50 1 1 I
+X 2D 12 450 50 200 L 50 50 1 1 I
+X 2Y 13 450 150 200 L 50 50 1 1 O
+X VCC 14 450 250 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4012
+#
+DEF IC_4012 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "IC_4012" 0 200 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 400 350 -400 0 1 0 N
+X Q1 1 -500 300 200 R 50 50 1 1 O
+X A1 2 -500 200 200 R 50 50 1 1 I
+X B1 3 -500 100 200 R 50 50 1 1 I
+X C1 4 -500 0 200 R 50 50 1 1 I
+X D1 5 -500 -100 200 R 50 50 1 1 I
+X NC 6 -500 -200 200 R 50 50 1 1 N
+X VSS 7 -500 -300 200 R 50 50 1 1 I
+X NC 8 550 -300 200 L 50 50 1 1 N
+X A2 9 550 -200 200 L 50 50 1 1 I
+X B2 10 550 -100 200 L 50 50 1 1 I
+X C2 11 550 0 200 L 50 50 1 1 I
+X D2 12 550 100 200 L 50 50 1 1 I
+X Q2 13 550 200 200 L 50 50 1 1 O
+X VDD 14 550 300 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4017
+#
+DEF IC_4017 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "IC_4017" 0 0 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -350 850 400 -850 0 1 0 N
+X 1 1 600 650 200 L 50 50 1 1 O
+X 2 2 600 500 200 L 50 50 1 1 O
+X 3 3 600 350 200 L 50 50 1 1 O
+X 4 4 600 200 200 L 50 50 1 1 O
+X 5 5 600 50 200 L 50 50 1 1 O
+X 6 6 600 -100 200 L 50 50 1 1 O
+X 7 7 600 -250 200 L 50 50 1 1 O
+X 8 8 600 -400 200 L 50 50 1 1 O
+X 9 9 600 -600 200 L 50 50 1 1 O
+X 10 10 600 -750 200 L 50 50 1 1 O
+X RST 11 -550 -400 200 R 50 50 1 1 I
+X CLK 12 -550 350 200 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4023
+#
+DEF IC_4023 X 0 40 Y Y 1 F N
+F0 "X" 0 -100 60 H V C CNN
+F1 "IC_4023" 0 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 450 300 -450 0 1 0 N
+X A1 1 -500 300 200 R 50 50 1 1 I
+X B1 2 -500 200 200 R 50 50 1 1 I
+X A2 3 -500 100 200 R 50 50 1 1 I
+X B2 4 -500 0 200 R 50 50 1 1 I
+X C2 5 -500 -100 200 R 50 50 1 1 I
+X Q2 6 -500 -200 200 R 50 50 1 1 O
+X Vss 7 -500 -300 200 R 50 50 1 1 I
+X C1 8 500 -300 200 L 50 50 1 1 I
+X Q1 9 500 -200 200 L 50 50 1 1 O
+X Q3 10 500 -100 200 L 50 50 1 1 O
+X C3 11 500 0 200 L 50 50 1 1 I
+X B3 12 500 100 200 L 50 50 1 1 I
+X A3 13 500 200 200 L 50 50 1 1 I
+X Vdd 14 500 300 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4028
+#
+DEF IC_4028 X 0 40 Y Y 1 F N
+F0 "X" 0 -100 60 H V C CNN
+F1 "IC_4028" 0 50 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 450 300 -450 0 1 0 N
+X Q4 1 -500 350 200 R 50 50 1 1 O
+X Q2 2 -500 250 200 R 50 50 1 1 O
+X Q0 3 -500 150 200 R 50 50 1 1 O
+X Q7 4 -500 50 200 R 50 50 1 1 O
+X Q9 5 -500 -50 200 R 50 50 1 1 O
+X Q5 6 -500 -150 200 R 50 50 1 1 O
+X Q6 7 -500 -250 200 R 50 50 1 1 O
+X Vss 8 -500 -350 200 R 50 50 1 1 I
+X Q8 9 500 -350 200 L 50 50 1 1 O
+X A0 10 500 -250 200 L 50 50 1 1 I
+X A3 11 500 -150 200 L 50 50 1 1 I
+X A2 12 500 -50 200 L 50 50 1 1 I
+X A1 13 500 50 200 L 50 50 1 1 I
+X Q1 14 500 150 200 L 50 50 1 1 O
+X Q3 15 500 250 200 L 50 50 1 1 O
+X Vdd 16 500 350 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_4073
+#
+DEF IC_4073 X 0 40 Y Y 1 F N
+F0 "X" 0 -100 60 H V C CNN
+F1 "IC_4073" 0 50 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 400 300 -400 0 1 0 N
+X A1 1 -500 300 200 R 50 50 1 1 I
+X B1 2 -500 200 200 R 50 50 1 1 I
+X A2 3 -500 100 200 R 50 50 1 1 I
+X B2 4 -500 0 200 R 50 50 1 1 I
+X C2 5 -500 -100 200 R 50 50 1 1 I
+X Q2 6 -500 -200 200 R 50 50 1 1 O
+X Vss 7 -500 -300 200 R 50 50 1 1 I
+X C1 8 500 -300 200 L 50 50 1 1 I
+X Q1 9 500 -200 200 L 50 50 1 1 O
+X Q3 10 500 -100 200 L 50 50 1 1 O
+X A3 11 500 0 200 L 50 50 1 1 I
+X B3 12 500 100 200 L 50 50 1 1 I
+X C3 13 500 200 200 L 50 50 1 1 I
+X Vdd 14 500 300 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_74153
+#
+DEF IC_74153 X 0 40 Y Y 1 F N
+F0 "X" 100 50 60 H V C CNN
+F1 "IC_74153" 100 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+T 0 100 -200 60 0 0 0 4:1 Normal 0 C C
+T 0 100 -100 60 0 0 0 DUAL Normal 0 C C
+T 0 100 -300 60 0 0 0 MUX Normal 0 C C
+S -200 500 350 -550 0 1 0 N
+X a0 1 -400 350 200 R 50 50 1 1 I
+X a1 2 -400 250 200 R 50 50 1 1 I
+X a2 3 -400 150 200 R 50 50 1 1 I
+X a3 4 -400 50 200 R 50 50 1 1 I
+X EA 5 0 700 200 D 50 50 1 1 I I
+X b0 6 -400 -150 200 R 50 50 1 1 I
+X b1 7 -400 -250 200 R 50 50 1 1 I
+X b2 8 -400 -350 200 R 50 50 1 1 I
+X b3 9 -400 -450 200 R 50 50 1 1 I
+X EB 10 200 700 200 D 50 50 1 1 I I
+X s1 11 50 -750 200 U 50 50 1 1 I
+X s0 12 150 -750 200 U 50 50 1 1 I
+X ya 13 550 250 200 L 50 50 1 1 O
+X yb 14 550 -300 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_74154
+#
+DEF IC_74154 X 0 40 Y Y 1 F N
+F0 "X" 0 -200 60 H V C CNN
+F1 "IC_74154" 50 -50 60 H V C CNN
+F2 "" 0 50 60 H V C CNN
+F3 "" 0 50 60 H V C CNN
+DRAW
+T 0 0 400 60 0 0 0 4:16~ Normal 0 C C
+T 0 0 250 60 0 0 0 decoder Normal 0 C C
+S -350 700 400 -700 0 0 0 N
+X ~Y0 1 -550 550 200 R 50 50 1 1 O I
+X ~Y1 2 -550 450 200 R 50 50 1 1 O I
+X ~Y2 3 -550 350 200 R 50 50 1 1 O I
+X ~Y3 4 -550 250 200 R 50 50 1 1 O I
+X ~Y4 5 -550 150 200 R 50 50 1 1 O I
+X ~Y5 6 -550 50 200 R 50 50 1 1 O I
+X ~Y6 7 -550 -50 200 R 50 50 1 1 O I
+X ~Y7 8 -550 -150 200 R 50 50 1 1 O I
+X ~Y8 9 -550 -250 200 R 50 50 1 1 O I
+X ~Y9 10 -550 -350 200 R 50 50 1 1 O I
+X A3 20 600 150 200 L 50 50 1 1 I
+X ~Y10 11 -550 -450 200 R 50 50 1 1 O I
+X A2 21 600 250 200 L 50 50 1 1 I
+X GND 12 -550 -550 200 R 50 50 1 1 I
+X A1 22 600 350 200 L 50 50 1 1 I
+X ~Y11 13 600 -550 200 L 50 50 1 1 O I
+X A0 23 600 450 200 L 50 50 1 1 I
+X ~Y12 14 600 -450 200 L 50 50 1 1 O I
+X Vcc 24 600 550 200 L 50 50 1 1 I
+X ~Y13 15 600 -350 200 L 50 50 1 1 O I
+X ~Y14 16 600 -250 200 L 50 50 1 1 O I
+X ~Y15 17 600 -150 200 L 50 50 1 1 O I
+X ~E0 18 600 -50 200 L 50 50 1 1 I I
+X ~E1 19 600 50 200 L 50 50 1 1 I I
+ENDDRAW
+ENDDEF
+#
+# IC_74157
+#
+DEF IC_74157 X 0 40 Y Y 1 F N
+F0 "X" 50 -50 60 H V C CNN
+F1 "IC_74157" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+T 0 50 -300 60 0 0 0 2:1 Normal 0 C C
+T 0 50 -400 60 0 0 0 MUX Normal 0 C C
+T 0 50 -200 60 0 0 0 QUAD Normal 0 C C
+S -350 550 400 -650 0 1 0 N
+X a0 1 -550 450 200 R 50 50 1 1 I
+X a1 2 -550 300 200 R 50 50 1 1 I
+X b0 3 -550 200 200 R 50 50 1 1 I
+X b1 4 -550 100 200 R 50 50 1 1 I
+X c0 5 -550 0 200 R 50 50 1 1 I
+X c1 6 -550 -100 200 R 50 50 1 1 I
+X d0 7 -550 -200 200 R 50 50 1 1 I
+X d1 8 -550 -300 200 R 50 50 1 1 I
+X EN 9 -550 -550 200 R 50 50 1 1 I I
+X S 10 -550 -450 200 R 50 50 1 1 I
+X Yd 11 600 0 200 L 50 50 1 1 O
+X Ya 12 600 300 200 L 50 50 1 1 O
+X Yb 13 600 200 200 L 50 50 1 1 O
+X Yc 14 600 100 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_7485
+#
+DEF IC_7485 X 0 40 Y Y 1 F N
+F0 "X" -50 -100 60 H V C CNN
+F1 "IC_7485" -50 50 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+T 0 0 550 60 0 0 0 4~BIT~comparator Normal 0 C C
+S -350 450 400 -400 0 1 0 N
+X A<B(in) 1 600 -100 200 L 50 50 1 1 I
+X A=B(in) 2 600 -200 200 L 50 50 1 1 I
+X A>B(in) 3 600 -300 200 L 50 50 1 1 I
+X A3 4 -550 100 200 R 50 50 1 1 I
+X B3 5 -550 -350 200 R 50 50 1 1 I
+X A2 6 -550 200 200 R 50 50 1 1 I
+X B2 7 -550 -250 200 R 50 50 1 1 I
+X A1 8 -550 300 200 R 50 50 1 1 I
+X B1 9 -550 -150 200 R 50 50 1 1 I
+X A0 10 -550 400 200 R 50 50 1 1 I
+X B0 11 -550 -50 200 R 50 50 1 1 I
+X A>B(out) 12 600 350 200 L 50 50 1 1 O
+X A=B(out) 13 600 250 200 L 50 50 1 1 O
+X A<B(out) 14 600 150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# INVCMOS
+#
+DEF INVCMOS X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "INVCMOS" -450 150 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+C 400 0 112 0 1 0 N
+S -250 200 -250 -200 0 1 0 N
+P 3 0 1 0 -250 200 300 0 -250 -200 N
+X in 1 -450 0 200 R 50 50 1 1 P
+X out 2 700 0 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# LM555N
+#
+DEF LM555N X 0 40 Y Y 1 F N
+F0 "X" 0 -50 60 H V C CNN
+F1 "LM555N" 0 100 60 H V C CNN
+F2 "" -50 0 60 H V C CNN
+F3 "" -50 0 60 H V C CNN
+DRAW
+S 350 -400 -350 400 0 1 0 N
+X GND 1 0 -600 200 U 50 50 1 1 W
+X TR 2 -550 250 200 R 50 50 1 1 I
+X Q 3 550 250 200 L 50 50 1 1 O
+X R 4 -550 -250 200 R 50 50 1 1 I I
+X CV 5 -550 0 200 R 50 50 1 1 I
+X THR 6 550 -250 200 L 50 50 1 1 I
+X DIS 7 550 0 200 L 50 50 1 1 I
+X VCC 8 0 600 200 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# LM_7812
+#
+DEF LM_7812 X 0 40 Y Y 1 F N
+F0 "X" 0 50 60 H V C CNN
+F1 "LM_7812" 0 150 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -350 200 350 -200 0 1 0 N
+X IN 1 -550 0 200 R 50 50 1 1 I
+X GND 2 0 -400 200 U 50 50 1 1 I
+X OUT 3 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# Lm_7805
+#
+DEF Lm_7805 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "Lm_7805" 50 150 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -350 100 350 -200 0 1 0 N
+X Vin 1 -550 0 200 R 50 50 1 1 P
+X GND 2 0 -400 200 U 50 50 1 1 P
+X Vout 3 550 0 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# Nand_gate_final
+#
+DEF Nand_gate_final X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "Nand_gate_final" 50 -100 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -500 300 600 -300 0 1 0 N
+X A 1 -700 150 200 R 50 50 1 1 I
+X B 2 -700 -150 200 R 50 50 1 1 I
+X C 3 800 0 200 L 50 50 1 1 I
+X VCC 4 -250 500 200 D 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# OTA_CA3080
+#
+DEF OTA_CA3080 X 0 40 Y Y 1 F N
+F0 "X" 200 300 60 H V C CNN
+F1 "OTA_CA3080" 50 0 60 H V C CNN
+F2 "" 50 0 60 H I C CNN
+F3 "" 50 0 60 H I C CNN
+DRAW
+C 200 -100 50 0 1 0 N
+C 250 -100 50 0 1 0 N
+P 6 0 1 0 -350 350 -350 -450 650 0 -350 450 -350 300 -350 350 N
+X A 1 300 350 200 D 50 50 1 1 I
+X B 2 -550 -300 200 R 50 50 1 1 I
+X C 3 -550 250 200 R 50 50 1 1 I
+X D 4 0 -500 200 U 50 50 1 1 I
+X E 5 550 250 200 D 50 50 1 1 I
+X F 6 850 0 200 L 50 50 1 1 O
+X G 7 0 500 200 D 50 50 1 1 I
+X H 8 300 -350 200 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# SCR
+#
+DEF SCR X 0 10 Y N 1 F N
+F0 "X" 150 200 50 H V C CNN
+F1 "SCR" 150 -350 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 2 0 0 0 -200 -150 200 -150 N
+P 2 0 1 0 0 -150 -200 -400 N
+P 3 0 1 0 -150 100 150 100 0 -150 F
+X A 1 0 400 300 D 60 60 1 1 I
+X K 2 0 -550 400 U 60 70 1 1 I
+X G 3 -350 -400 150 R 60 60 1 1 I
+ENDDRAW
+ENDDEF
+#
+# UJT
+#
+DEF UJT X 0 40 Y Y 1 F N
+F0 "X" -50 -50 60 H V C CNN
+F1 "UJT" 50 -50 60 H V C CNN
+F2 "" -50 -50 60 H I C CNN
+F3 "" -50 -50 60 H I C CNN
+DRAW
+C -50 -50 206 0 1 0 N
+P 2 0 1 0 -100 100 -100 -200 N
+P 3 0 1 0 -250 0 -200 0 -100 -100 N
+P 3 0 1 0 -200 -50 -150 -50 -150 0 N
+P 3 0 1 0 -100 -150 0 -150 0 -250 N
+P 3 0 1 0 -100 50 0 50 0 150 N
+X E 1 -450 0 200 R 50 50 1 1 I
+X B1 2 0 -450 200 U 50 50 1 1 B
+X B2 3 0 350 200 D 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_74LS04
+#
+DEF eSim_74LS04 X 0 40 Y Y 1 F N
+F0 "X" 0 100 60 H V C CNN
+F1 "eSim_74LS04" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S 350 500 -350 -500 0 1 0 N
+X ~ 1 -550 450 200 R 50 50 1 1 P
+X ~ 2 -550 300 200 R 50 50 1 1 P I
+X ~ 3 -550 150 200 R 50 50 1 1 P
+X ~ 4 -550 0 200 R 50 50 1 1 P I
+X ~ 5 -550 -150 200 R 50 50 1 1 P
+X ~ 6 -550 -300 200 R 50 50 1 1 P I
+X GND 7 -550 -450 200 R 50 50 1 1 P
+X ~ 8 550 -450 200 L 50 50 1 1 P I
+X ~ 9 550 -300 200 L 50 50 1 1 P
+X ~ 10 550 -150 200 L 50 50 1 1 P I
+X ~ 11 550 0 200 L 50 50 1 1 P
+X ~ 12 550 150 200 L 50 50 1 1 P I
+X ~ 13 550 300 200 L 50 50 1 1 P
+X VCC 14 550 450 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# full_adder
+#
+DEF full_adder X 0 40 Y Y 1 F N
+F0 "X" 1400 700 60 H V C CNN
+F1 "full_adder" 1400 600 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S 800 1150 1950 0 0 1 0 N
+X IN1 1 600 950 200 R 50 50 1 1 I
+X IN2 2 600 550 200 R 50 50 1 1 I
+X CIN 3 600 150 200 R 50 50 1 1 I
+X SUM 4 2150 950 200 L 50 50 1 1 O
+X COUT 5 2150 150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# full_sub
+#
+DEF full_sub X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "full_sub" 0 0 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -550 650 450 -600 0 1 0 N
+X A 1 -750 400 200 R 50 50 1 1 I
+X B 2 -750 200 200 R 50 50 1 1 I
+X BIN 3 -750 -200 200 R 50 50 1 1 I
+X DIFF 4 650 450 200 L 50 50 1 1 O
+X BORROW 5 650 150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# half_adder
+#
+DEF half_adder X 0 40 Y Y 1 F N
+F0 "X" 900 500 60 H V C CNN
+F1 "half_adder" 900 400 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S 500 800 1250 0 0 1 0 N
+X IN1 1 300 700 200 R 50 50 1 1 I
+X IN2 2 300 100 200 R 50 50 1 1 I
+X SUM 3 1450 700 200 L 50 50 1 1 O
+X COUT 4 1450 100 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# half_sub
+#
+DEF half_sub X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "half_sub" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -300 300 300 -300 0 1 0 N
+X A 1 -500 200 200 R 50 50 1 1 I
+X B 2 -500 -100 200 R 50 50 1 1 I
+X D 3 500 150 200 L 50 50 1 1 O
+X BORROW 4 500 -100 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# lm3909
+#
+DEF lm3909 X 0 40 Y Y 1 F N
+F0 "X" 0 -150 60 H V C CNN
+F1 "lm3909" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -1000 400 1050 -450 0 1 0 N
+X ~ 1 -750 -650 200 U 50 50 1 1 I
+X ~ 2 -200 -650 200 U 50 50 1 1 I
+X ~ 3 350 -650 200 U 50 50 1 1 I
+X ~ 4 850 -650 200 U 50 50 1 1 I
+X ~ 5 850 600 200 D 50 50 1 1 I
+X ~ 6 350 600 200 D 50 50 1 1 I
+X ~ 7 -200 600 200 D 50 50 1 1 I
+X ~ 8 -750 600 200 D 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# lm_741
+#
+DEF lm_741 X 0 40 Y Y 1 F N
+F0 "X" -200 0 60 H V C CNN
+F1 "lm_741" -100 -250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N
+X off_null 1 -50 400 200 D 50 38 1 1 I
+X inv 2 -550 150 200 R 50 38 1 1 I
+X non_inv 3 -550 -100 200 R 50 38 1 1 I
+X v_neg 4 -150 -450 200 U 50 38 1 1 I
+X off_null 5 50 350 200 D 50 38 1 1 I
+X out 6 550 0 200 L 50 38 1 1 O
+X v_pos 7 -150 450 200 D 50 38 1 1 I
+X NC 8 150 -300 200 U 50 38 1 1 N
+ENDDRAW
+ENDDEF
+#
+# nand_ttl
+#
+DEF nand_ttl X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "nand_ttl" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+A -580 156 1081 -250 -777 0 1 0 N 400 -300 -350 -900
+A -361 -420 770 90 892 0 1 0 N 400 -300 -350 350
+C 500 -300 112 0 1 0 N
+P 2 0 1 0 -350 -300 -350 -900 N
+P 2 0 1 0 -350 350 -350 -300 N
+X A 1 -550 150 200 R 50 50 1 1 I
+X B 2 -550 -650 200 R 50 50 1 1 I
+X C 3 800 -300 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library