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author | Fahim | 2016-03-03 23:00:00 +0530 |
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committer | Fahim | 2016-03-03 23:00:00 +0530 |
commit | 7e4774656997c34eae3ab09b37c8f82b5b046d48 (patch) | |
tree | fe72483af0c1feba7f97d5b9290f647f50840fc1 /Examples/FullAdder/full_adder.cir | |
parent | 823d892cbafccc47287ffebd01316754e7efad56 (diff) | |
download | eSim-7e4774656997c34eae3ab09b37c8f82b5b046d48.tar.gz eSim-7e4774656997c34eae3ab09b37c8f82b5b046d48.tar.bz2 eSim-7e4774656997c34eae3ab09b37c8f82b5b046d48.zip |
Remove unwanted example
Diffstat (limited to 'Examples/FullAdder/full_adder.cir')
-rw-r--r-- | Examples/FullAdder/full_adder.cir | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/Examples/FullAdder/full_adder.cir b/Examples/FullAdder/full_adder.cir new file mode 100644 index 00000000..6461b5b6 --- /dev/null +++ b/Examples/FullAdder/full_adder.cir @@ -0,0 +1,12 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Jun 24 12:24:33 2015 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +X1 8 7 6 2 half_adder +X2 5 6 4 3 half_adder +U1 8 7 5 4 1 PORT +U2 3 2 1 d_or + +.end |