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author | rahulp13 | 2020-02-14 15:16:35 +0530 |
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committer | rahulp13 | 2020-02-14 15:16:35 +0530 |
commit | cb55e59de7ee4383c04edfae7c39ad9ae9552b36 (patch) | |
tree | de1b292a10e8196689bf1a208fe6fe32f4618846 /Examples/Analysis_Of_Digital_IC/4012_test/4012_test.pro | |
parent | 08d4a0336550a0e610709970a0c5d366e109fe82 (diff) | |
download | eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.gz eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.bz2 eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.zip |
common code for Win and Linux, merged py2 changes
Diffstat (limited to 'Examples/Analysis_Of_Digital_IC/4012_test/4012_test.pro')
-rw-r--r-- | Examples/Analysis_Of_Digital_IC/4012_test/4012_test.pro | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/Examples/Analysis_Of_Digital_IC/4012_test/4012_test.pro b/Examples/Analysis_Of_Digital_IC/4012_test/4012_test.pro new file mode 100644 index 00000000..ee32c69b --- /dev/null +++ b/Examples/Analysis_Of_Digital_IC/4012_test/4012_test.pro @@ -0,0 +1,45 @@ +update=06/01/19 15:09:21
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=../../eSim/kicadSchematicLibrary
+[eeschema/libraries]
+LibName1=power
+LibName2=eSim_Analog
+LibName3=eSim_Devices
+LibName4=eSim_Digital
+LibName5=eSim_Hybrid
+LibName6=eSim_Miscellaneous
+LibName7=eSim_Plot
+LibName8=eSim_Power
+LibName9=eSim_PSpice
+LibName10=eSim_Sources
+LibName11=eSim_User
+LibName12=eSim_Subckt
|