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| author | Akshay NH | 2018-06-28 19:22:03 +0530 |
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| committer | Akshay NH | 2018-06-28 19:22:03 +0530 |
| commit | d1edc2c0c9b8d823892b94482e01451e82c3eec1 (patch) | |
| tree | 9fb54dfd93a975be8b2a8cb29b21eb5639ac29ef /digital ciruits/cmos_nand3/cmos_nand3.cir | |
| download | eSIm-Kicad-Simulations-d1edc2c0c9b8d823892b94482e01451e82c3eec1.tar.gz eSIm-Kicad-Simulations-d1edc2c0c9b8d823892b94482e01451e82c3eec1.tar.bz2 eSIm-Kicad-Simulations-d1edc2c0c9b8d823892b94482e01451e82c3eec1.zip | |
adding kicad analog and digital circuits
Diffstat (limited to 'digital ciruits/cmos_nand3/cmos_nand3.cir')
| -rw-r--r-- | digital ciruits/cmos_nand3/cmos_nand3.cir | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/digital ciruits/cmos_nand3/cmos_nand3.cir b/digital ciruits/cmos_nand3/cmos_nand3.cir new file mode 100644 index 0000000..d14d3d6 --- /dev/null +++ b/digital ciruits/cmos_nand3/cmos_nand3.cir @@ -0,0 +1,19 @@ +.title KiCad schematic +V1 B 0 dc 0 pulse(0 3.3 0 0 0 100m 200m) +V2 VDD 0 3.3 +M1 Out A VDD VDD MPMOS +M2 Out A 1 1 MNMOS +M4 Out B VDD VDD MPMOS +M3 1 B 2 2 MNMOS +V3 A 0 dc 0 pulse(0 3.3 0 0 0 50m 100m) +M6 Out C VDD VDD MPMOS +M5 2 C 0 0 MNMOS +V4 C 0 dc 0 pulse(0 3.3 0 0 0 200m 400m) +.tran 1m 400m +.model mnmos nmos level=8 version=3.3.0 +.model mpmos pmos level=8 version=3.3.0 +.control +run +plot v(a)+5 v(b)+10 v(c)+15 v(out) +.endc +.end |