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| author | Akshay NH | 2018-06-28 19:22:03 +0530 |
|---|---|---|
| committer | Akshay NH | 2018-06-28 19:22:03 +0530 |
| commit | d1edc2c0c9b8d823892b94482e01451e82c3eec1 (patch) | |
| tree | 9fb54dfd93a975be8b2a8cb29b21eb5639ac29ef /analog circuits/RLC-Series | |
| download | eSIm-Kicad-Simulations-d1edc2c0c9b8d823892b94482e01451e82c3eec1.tar.gz eSIm-Kicad-Simulations-d1edc2c0c9b8d823892b94482e01451e82c3eec1.tar.bz2 eSIm-Kicad-Simulations-d1edc2c0c9b8d823892b94482e01451e82c3eec1.zip | |
adding kicad analog and digital circuits
Diffstat (limited to 'analog circuits/RLC-Series')
| -rw-r--r-- | analog circuits/RLC-Series/RLC-Series-cache.lib | 105 | ||||
| -rw-r--r-- | analog circuits/RLC-Series/RLC-Series.bak | 111 | ||||
| -rw-r--r-- | analog circuits/RLC-Series/RLC-Series.cir | 7 | ||||
| -rw-r--r-- | analog circuits/RLC-Series/RLC-Series.kicad_pcb | 1 | ||||
| -rw-r--r-- | analog circuits/RLC-Series/RLC-Series.pro | 33 | ||||
| -rw-r--r-- | analog circuits/RLC-Series/RLC-Series.sch | 114 |
6 files changed, 371 insertions, 0 deletions
diff --git a/analog circuits/RLC-Series/RLC-Series-cache.lib b/analog circuits/RLC-Series/RLC-Series-cache.lib new file mode 100644 index 0000000..603b5a7 --- /dev/null +++ b/analog circuits/RLC-Series/RLC-Series-cache.lib @@ -0,0 +1,105 @@ +EESchema-LIBRARY Version 2.4 +#encoding utf-8 +# +# Device:C +# +DEF Device:C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "Device:C" 25 -100 50 H V L CNN +F2 "" 38 -150 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 50 50 1 1 P +X ~ 2 0 -150 110 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device:L +# +DEF Device:L L 0 40 N N 1 F N +F0 "L" -50 0 50 V V C CNN +F1 "Device:L" 75 0 50 V V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + Choke_* + *Coil* + Inductor_* + L_* +$ENDFPLIST +DRAW +A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50 +A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0 +A 0 25 25 -899 899 0 1 0 N 0 0 0 50 +A 0 75 25 -899 899 0 1 0 N 0 50 0 100 +X 1 1 0 150 50 D 50 50 1 1 P +X 2 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# Device:R +# +DEF Device:R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "Device:R" 0 0 50 V V C CNN +F2 "" -70 0 50 V I C CNN +F3 "" 0 0 50 H I C CNN +$FPLIST + R_* +$ENDFPLIST +DRAW +S -40 -100 40 100 0 1 10 N +X ~ 1 0 150 50 D 50 50 1 1 P +X ~ 2 0 -150 50 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# power:GND +# +DEF power:GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "power:GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# power:PWR_FLAG +# +DEF power:PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 75 50 H I C CNN +F1 "power:PWR_FLAG" 0 150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N +X pwr 1 0 0 0 U 50 50 0 0 w +ENDDRAW +ENDDEF +# +# pspice:VSOURCE +# +DEF pspice:VSOURCE V 0 40 Y Y 1 F N +F0 "V" -250 300 50 H V C CNN +F1 "pspice:VSOURCE" 0 0 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +C 0 0 200 0 1 0 N +T 0 -320 -10 50 0 0 1 V Normal 0 C C +P 2 0 1 0 -250 -250 -250 150 F +P 3 0 1 0 -300 150 -250 250 -200 150 F +X E1 1 0 300 100 D 50 50 1 1 I +X E2 2 0 -300 100 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/analog circuits/RLC-Series/RLC-Series.bak b/analog circuits/RLC-Series/RLC-Series.bak new file mode 100644 index 0000000..874a6c7 --- /dev/null +++ b/analog circuits/RLC-Series/RLC-Series.bak @@ -0,0 +1,111 @@ +EESchema Schematic File Version 4
+EELAYER 26 0
+EELAYER END
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+encoding utf-8
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+Wire Wire Line
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+L power:PWR_FLAG #FLG01
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diff --git a/analog circuits/RLC-Series/RLC-Series.cir b/analog circuits/RLC-Series/RLC-Series.cir new file mode 100644 index 0000000..81947fa --- /dev/null +++ b/analog circuits/RLC-Series/RLC-Series.cir @@ -0,0 +1,7 @@ +.title KiCad schematic +V1 Net-_R1-Pad2_ GND ac 10 0 +R1 Net-_L1-Pad1_ Net-_R1-Pad2_ 1k +L1 Net-_L1-Pad1_ Net-_C1-Pad1_ 100m +C1 Net-_C1-Pad1_ GND 0.01u +.ac dec 10 1 1meg +.end diff --git a/analog circuits/RLC-Series/RLC-Series.kicad_pcb b/analog circuits/RLC-Series/RLC-Series.kicad_pcb new file mode 100644 index 0000000..02c8ecb --- /dev/null +++ b/analog circuits/RLC-Series/RLC-Series.kicad_pcb @@ -0,0 +1 @@ +(kicad_pcb (version 4) (host kicad "dummy file") ) diff --git a/analog circuits/RLC-Series/RLC-Series.pro b/analog circuits/RLC-Series/RLC-Series.pro new file mode 100644 index 0000000..152769c --- /dev/null +++ b/analog circuits/RLC-Series/RLC-Series.pro @@ -0,0 +1,33 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] diff --git a/analog circuits/RLC-Series/RLC-Series.sch b/analog circuits/RLC-Series/RLC-Series.sch new file mode 100644 index 0000000..41790a8 --- /dev/null +++ b/analog circuits/RLC-Series/RLC-Series.sch @@ -0,0 +1,114 @@ +EESchema Schematic File Version 4 +LIBS:RLC-Series-cache +EELAYER 26 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L pspice:VSOURCE V1 +U 1 1 5B0E7BD2 +P 4050 3400 +F 0 "V1" H 4278 3446 50 0000 L CNN +F 1 "VSOURCE" H 4278 3355 50 0000 L CNN +F 2 "" H 4050 3400 50 0001 C CNN +F 3 "" H 4050 3400 50 0001 C CNN +F 4 "V" H 4050 3400 50 0001 C CNN "Spice_Primitive" +F 5 "ac 10 0" H 4050 3400 50 0001 C CNN "Spice_Model" +F 6 "Y" H 4050 3400 50 0001 C CNN "Spice_Netlist_Enabled" + 1 4050 3400 + 1 0 0 -1 +$EndComp +$Comp +L Device:R R1 +U 1 1 5B0E7C21 +P 5150 2800 +F 0 "R1" V 4943 2800 50 0000 C CNN +F 1 "1k" V 5034 2800 50 0000 C CNN +F 2 "" V 5080 2800 50 0001 C CNN +F 3 "~" H 5150 2800 50 0001 C CNN + 1 5150 2800 + 0 1 1 0 +$EndComp +$Comp +L Device:L L1 +U 1 1 5B0E7CAD +P 6050 2800 +F 0 "L1" V 6240 2800 50 0000 C CNN +F 1 "100m" V 6149 2800 50 0000 C CNN +F 2 "" H 6050 2800 50 0001 C CNN +F 3 "~" H 6050 2800 50 0001 C CNN + 1 6050 2800 + 0 -1 -1 0 +$EndComp +$Comp +L Device:C C1 +U 1 1 5B0E7D3E +P 7400 2800 +F 0 "C1" V 7652 2800 50 0000 C CNN +F 1 "0.01u" V 7561 2800 50 0000 C CNN +F 2 "" H 7438 2650 50 0001 C CNN +F 3 "~" H 7400 2800 50 0001 C CNN + 1 7400 2800 + 0 -1 -1 0 +$EndComp +Wire Wire Line + 4050 3100 4050 2800 +Wire Wire Line + 4050 2800 5000 2800 +Wire Wire Line + 5300 2800 5900 2800 +Wire Wire Line + 6200 2800 7250 2800 +Wire Wire Line + 8050 4150 5950 4150 +Wire Wire Line + 4050 4150 4050 3700 +$Comp +L power:GND #PWR01 +U 1 1 5B0E7E5D +P 5950 4300 +F 0 "#PWR01" H 5950 4050 50 0001 C CNN +F 1 "GND" H 5955 4127 50 0000 C CNN +F 2 "" H 5950 4300 50 0001 C CNN +F 3 "" H 5950 4300 50 0001 C CNN + 1 5950 4300 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5950 4300 5950 4200 +Connection ~ 5950 4150 +Wire Wire Line + 5950 4150 4050 4150 +$Comp +L power:PWR_FLAG #FLG01 +U 1 1 5B0E7F6D +P 5400 4200 +F 0 "#FLG01" H 5400 4275 50 0001 C CNN +F 1 "PWR_FLAG" H 5400 4374 50 0000 C CNN +F 2 "" H 5400 4200 50 0001 C CNN +F 3 "~" H 5400 4200 50 0001 C CNN + 1 5400 4200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5400 4200 5950 4200 +Connection ~ 5950 4200 +Wire Wire Line + 5950 4200 5950 4150 +Wire Wire Line + 7550 2800 8050 2800 +Wire Wire Line + 8050 2800 8050 4150 +Text Notes 7650 5000 0 50 ~ 0 +.ac dec 10 1 1meg +$EndSCHEMATC |