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-rw-r--r--3504/CH2/EX2.13/Ex2_13.sce6
-rw-r--r--3504/CH2/EX2.14/Ex2_14.sce8
-rw-r--r--3504/CH2/EX2.15/Ex2_15.sce13
-rw-r--r--3504/CH2/EX2.16/Ex2_16.sce5
-rw-r--r--3504/CH2/EX2.19/Ex2_19.sce9
-rw-r--r--3504/CH2/EX2.2/Ex2_2.sce44
-rw-r--r--3504/CH2/EX2.20/Ex2_20.sce4
-rw-r--r--3504/CH2/EX2.21/Ex2_21.sce8
-rw-r--r--3504/CH2/EX2.26/Ex2_26.sce14
-rw-r--r--3504/CH2/EX2.3/Ex2_3.sce16
-rw-r--r--3504/CH2/EX2.4/Ex2_4.sce10
-rw-r--r--3504/CH2/EX2.5/Ex2_5.sce25
-rw-r--r--3504/CH2/EX2.6/Ex2_6.sce12
-rw-r--r--3504/CH2/EX2.7/Ex2_7.sce8
-rw-r--r--3504/CH2/EX2.8/Ex2_8.sce12
-rw-r--r--3504/CH2/EX2.9/Ex2_9.sce12
16 files changed, 206 insertions, 0 deletions
diff --git a/3504/CH2/EX2.13/Ex2_13.sce b/3504/CH2/EX2.13/Ex2_13.sce
new file mode 100644
index 000000000..badf1bf8d
--- /dev/null
+++ b/3504/CH2/EX2.13/Ex2_13.sce
@@ -0,0 +1,6 @@
+//To determine the value of the ganged condenser C and resistor R so that the current through Z_l is zero.
+clc;
+w=100 //(rad/sec)
+//Equating real and imaginary parts for [-w^2C^2 + 1/R(2*j*w*C + 1 - (j*10^3)/w)]=0
+C=10^3/(2*w^2) //Capacitance(Farad)
+R=1/(w^2*C^2) //Resistance(ohm)
diff --git a/3504/CH2/EX2.14/Ex2_14.sce b/3504/CH2/EX2.14/Ex2_14.sce
new file mode 100644
index 000000000..139a0f270
--- /dev/null
+++ b/3504/CH2/EX2.14/Ex2_14.sce
@@ -0,0 +1,8 @@
+//To determine the current through load resistor R of the given circuit.
+clc;
+Z=[1+%i*1-%i*1+2 -2;-2 2+1]
+D=det(Z)
+Z_2=[3 1+%i*1;-2 0]
+D_2=det(Z_2)
+I_2=D_2/D
+disp(I_2,'Current through load resistor R(Polar form)')
diff --git a/3504/CH2/EX2.15/Ex2_15.sce b/3504/CH2/EX2.15/Ex2_15.sce
new file mode 100644
index 000000000..757d52b54
--- /dev/null
+++ b/3504/CH2/EX2.15/Ex2_15.sce
@@ -0,0 +1,13 @@
+//To determine the voltage V_23 of the given network.
+clc;
+Z=[(1/2)+(1/3) -(1/3) -(1/2);-(1/3) (1/3)+(1/(%i*4)) 0;-(1/2) 0 (1/2)+(1/(%i*2))]
+D=det(Z)
+Z_2=[(1/2)+(1/3) 1 -(1/2);-(1/3) 0 0;-(1/2) 0 (1/2)+(1/(%i*2))]
+D_2=det(Z_2)
+Z_3=[(1/2)+(1/3) -(1/3) 1;-(1/3) (1/3)+(1/(%i*4)) 0;-(1/2) 0 0]
+D_3=det(Z_3)
+V_2=D_2/D
+V_3=D_3/D
+V_23=V_2-V_3
+//Using Cramer's rule
+disp(V_23,'Required voltage in the polar form(V)')
diff --git a/3504/CH2/EX2.16/Ex2_16.sce b/3504/CH2/EX2.16/Ex2_16.sce
new file mode 100644
index 000000000..e8a227ef6
--- /dev/null
+++ b/3504/CH2/EX2.16/Ex2_16.sce
@@ -0,0 +1,5 @@
+//To determine V_23 of the given network.
+clc;
+I=(3+%i*4)/(3+%i*4+2+%i*2)
+V_23=I*(%i*4+2)
+//The circuit cannot be solved by mesh analysis as the current source is present.Thus the obtained value is not assumed to be inaccurate.
diff --git a/3504/CH2/EX2.19/Ex2_19.sce b/3504/CH2/EX2.19/Ex2_19.sce
new file mode 100644
index 000000000..b0e4f729f
--- /dev/null
+++ b/3504/CH2/EX2.19/Ex2_19.sce
@@ -0,0 +1,9 @@
+//To write the KVL equation and obtain the voltage across the capacitor C for the given parameters.
+clc;
+Z=[5-%i*5 5+%i*3;5+%i*3 10+%i*6]
+D=det(Z)
+Z_1=[10 5+%i*3;10-%i*10 10+%i*6]
+D_1=det(Z_1)
+I_1=D_1/D
+V=I_1*(-%i*10)
+disp(V,'Voltage across the capacitor C(Volts)')
diff --git a/3504/CH2/EX2.2/Ex2_2.sce b/3504/CH2/EX2.2/Ex2_2.sce
new file mode 100644
index 000000000..c40ec6403
--- /dev/null
+++ b/3504/CH2/EX2.2/Ex2_2.sce
@@ -0,0 +1,44 @@
+//To calculate the current through each resistor,the voltage across each resistor and the voltage at each node of the circuit.
+clc;
+R_1=25
+R_2=10
+R_3=15
+R_4=50
+R_5=25
+R_6=100
+R_7=500
+R_8=125
+//Given resistances in kilo-ohm.
+Req_123=R_1+R_2+R_3 //Equivalent of(R_1,R_2,R_3)
+Req_1234=(Req_123*R_4)/(Req_123+R_4) //Equivalent of(R_1,R_2,R_3,R_4)
+Req_678=(R_6*R_7*R_8)/((R_7*R_8)+(R_6*R_8)+(R_6*R_7)) //Equivalent of(R_6,R_7,R_8)
+Req=Req_1234+R_5+Req_678
+disp(Req,'Equivalent resistance in kilo-ohm')
+V=100 //Volts
+i=V/Req //mA
+i_1=i/2 //Current through R_1,R_2 andR_3(mA)
+i_2=i_1 //Current through R_4(mA)
+V_R1=R_1*i_1 //Volts
+V_R2=R_2*i_1 //Volts
+V_R3=R_3*i_1 //Volts
+V_R4=R_4*i_2 //Volts
+V_R5=R_5*i //Volts
+V_R6=Req_678*i //Volts
+V_R7=V_R6 //Volts
+V_R8=V_R6 //Volts
+i_3=V_R6/(100) //Current through R_6(mA)
+i_4=V_R7/(500) //Current through R_7(mA)
+i_5=V_R8/(125) //Current through R_8(mA)
+V_a=V
+V_b=V_a-V_R1
+V_c=V_b-V_R2
+V_d=V_c-V_R3
+V_e=V_d-V_R5
+
+
+
+
+
+
+
+
diff --git a/3504/CH2/EX2.20/Ex2_20.sce b/3504/CH2/EX2.20/Ex2_20.sce
new file mode 100644
index 000000000..3b3475ac0
--- /dev/null
+++ b/3504/CH2/EX2.20/Ex2_20.sce
@@ -0,0 +1,4 @@
+//To find the equivalent inductive reactance.
+clc;
+Z=%i*(3+5+6)-%i*2-%i*3+%i*4-%i*2-%i*3+%i*4
+disp(Z,'Equivalent inductive reactance(ohm)')
diff --git a/3504/CH2/EX2.21/Ex2_21.sce b/3504/CH2/EX2.21/Ex2_21.sce
new file mode 100644
index 000000000..b09ee67b5
--- /dev/null
+++ b/3504/CH2/EX2.21/Ex2_21.sce
@@ -0,0 +1,8 @@
+//To write KVL equation of the given circuits.
+clc;
+k=0.5
+wL_1=4
+wL_2=9
+wM=k*(wL_1*wL_2) //ohm
+Z_1=[3-%i*1 -3-%i*2;-3-%i*2 8+%i*4] //Impedance matrix of circuit 2.56(a)
+Z_2=[3-%i*1 -3-%i*8;-3-%i*8 8+%i*4] //Impedance matrix of circuit 2.56(b)
diff --git a/3504/CH2/EX2.26/Ex2_26.sce b/3504/CH2/EX2.26/Ex2_26.sce
new file mode 100644
index 000000000..bd730bbd6
--- /dev/null
+++ b/3504/CH2/EX2.26/Ex2_26.sce
@@ -0,0 +1,14 @@
+//To determine the voltage V_ab across the terminals a,b of the given network.
+clc;
+M_1=[3+%i*5 10;-2+%i*3 0]
+D_1=det(M_1)
+M_2=[3+%i*5 -2+%i*3;-2+%i*3 5+%i*5]
+D_2=det(M_2)
+I_2=D_1/D_2
+V_ab=I_2*3
+disp(V_ab,'Voltage across the terminals a,b of the given network(Polar Form)')
+
+
+
+
+
diff --git a/3504/CH2/EX2.3/Ex2_3.sce b/3504/CH2/EX2.3/Ex2_3.sce
new file mode 100644
index 000000000..b19f61b19
--- /dev/null
+++ b/3504/CH2/EX2.3/Ex2_3.sce
@@ -0,0 +1,16 @@
+//To find the voltage across R,in the given network by mesh analysis.
+clc;
+R=2 //Resistance(ohm)
+Z=[12 -2 0;-2 34 -2;0 -2 12]
+D=det(Z)
+Z_1=[5 -2 0;0 34 -2;10 -2 12]
+D_1=det(Z_1)
+Z_2=[12 5 0;-2 0 -2;0 10 12]
+D_2=det(Z_2)
+Z_3=[12 -2 5;-2 34 0;0 -2 10]
+D_3=det(Z_3)
+I_2=D_2/D //Current(A)
+I_3=D_3/D //Current(A)
+V_R=(I_2-I_3)*R
+disp(V_R,'Required voltage across R(V)')
+//Negative voltage shows reverse polarity,with the numerical value being the same.
diff --git a/3504/CH2/EX2.4/Ex2_4.sce b/3504/CH2/EX2.4/Ex2_4.sce
new file mode 100644
index 000000000..f64a1358c
--- /dev/null
+++ b/3504/CH2/EX2.4/Ex2_4.sce
@@ -0,0 +1,10 @@
+//To find the power dissipated in the resistor R in the ladder network shown in the given figure.
+clc;
+R=1 //Resistance(ohm)
+Z=[2 -1 0;-1 3 -1;0 -1 3]
+D=det(Z)
+Z_2=[2 1 0;-1 0 -1;0 0 3]
+D_2=det(Z_2)
+i_2=D_2/D //Current(A)
+P=(i_2)^2*R
+disp(P,'Power dissipated in the resistor R(W)')
diff --git a/3504/CH2/EX2.5/Ex2_5.sce b/3504/CH2/EX2.5/Ex2_5.sce
new file mode 100644
index 000000000..ddbbfbb30
--- /dev/null
+++ b/3504/CH2/EX2.5/Ex2_5.sce
@@ -0,0 +1,25 @@
+//To determine the current in each loop of the circuit.
+clc;
+M=[5.11 -0.71 0 -3.25;-0.71 1.86 -0.92 -0.23;0 -0.92 2.86 -1.12;-3.25 -0.23 -1.12 5.55]
+D=det(M)
+M_1=[1.5 -0.71 0 -3.25;-1.3 1.86 -0.92 -0.23;-7.1 -0.92 2.86 -1.12;-2.1 -0.23 -1.12 5.55]
+D_1=det(M_1)
+M_2=[5.11 1.5 0 -3.25;-0.71 -1.3 -0.92 -0.23;0 -7.1 2.86 -1.12;-3.25 -2.1 -1.12 5.55]
+D_2=det(M_2)
+M_3=[5.11 -0.71 1.5 -3.25;-0.71 1.86 -1.3 -0.23;0 -0.92 -7.1 -1.12;-3.25 -0.23 -2.1 5.55]
+D_3=det(M_3)
+M_4=[5.11 -0.71 0 1.5;-0.71 1.86 -0.92 -1.3;0 -0.92 2.86 -7.1;-3.25 -0.23 -1.12 -2.1]
+D_4=det(M_4)
+i_1=D_1/D
+i_2=D_2/D
+i_3=D_3/D
+i_4=D_4/D
+//Loop currents in Ampere using Cramer's rule,Negative sign indicates that the current is in the reverse direction.
+
+
+
+
+
+
+
+
diff --git a/3504/CH2/EX2.6/Ex2_6.sce b/3504/CH2/EX2.6/Ex2_6.sce
new file mode 100644
index 000000000..a1f30d3b1
--- /dev/null
+++ b/3504/CH2/EX2.6/Ex2_6.sce
@@ -0,0 +1,12 @@
+//To find the voltage V_0 in the given circuit.
+clc;
+R=30
+Z=[31 -13 0 0 0 -10 0 0 0;-13 35 -9 0 -11 0 0 0 0;0 -9 31 -10 0 0 0 0 0;0 0 -10 79 -30 0 0 0 -9;0 -11 0 -30 53 -7 0 -5 0;-10 0 0 0 -7 47 -30 0 0;0 0 0 0 0 -30 41 0 0;0 0 0 0 -5 0 0 27 -2;0 0 0 -9 0 0 0 -2 29]
+D=det(Z)
+Z_4=[31 -13 0 -15 0 -10 0 0 0;-13 35 -9 27 -11 0 0 0 0;0 -9 31 -23 0 0 0 0 0;0 0 -10 0 -30 0 0 0 -9;0 -11 0 -20 53 -7 0 -5 0;-10 0 0 12 -7 47 -30 0 0;0 0 0 -7 0 -30 41 0 0;0 0 0 7 -5 0 0 27 -2;0 0 0 -10 0 0 0 -2 29]
+D_4=det(Z_4)
+i_4=D_4/D //Current(A)
+V_0=R*i_4
+disp(V_0,'Required voltage(V)')
+//Negative sign indicates opposite direction of current.
+//Answer in the book is wrong.
diff --git a/3504/CH2/EX2.7/Ex2_7.sce b/3504/CH2/EX2.7/Ex2_7.sce
new file mode 100644
index 000000000..23cebb3d6
--- /dev/null
+++ b/3504/CH2/EX2.7/Ex2_7.sce
@@ -0,0 +1,8 @@
+//To calculate the power delivered by the source in the given circuit.
+clc;
+Z=[3+%i*1 -%i -2;-%i 2+%i*3 -%i*2;-2 %i*2 3+%i*1]
+D=det(Z)
+Z_1=[15.7 -%i -2;0 2+%i*3 -%i*2;0 %i*2 3+%i*1]
+D_1=det(Z_1)
+V_1=D_1/D
+//Power delivered =V_1*I*cos(theta)=Real(V_1*I),which on simplification equals 100 watts.
diff --git a/3504/CH2/EX2.8/Ex2_8.sce b/3504/CH2/EX2.8/Ex2_8.sce
new file mode 100644
index 000000000..f54289a0f
--- /dev/null
+++ b/3504/CH2/EX2.8/Ex2_8.sce
@@ -0,0 +1,12 @@
+//To determine the node voltages for the given network.
+clc;
+Z=[(1/5)+(1/%i*2)+(1/4) -(1/4);(-1/4) (1/4)+(1/%i*2)+(1/2)]
+D=det(Z)
+Z_1=[1 -0.25;%i*2.5 0.75+%i*0.5]
+D_1=det(Z_1)
+V_1=D_1/D //Voltage in polar form
+disp(V_1,'Voltage at node 1')
+Z_2=[0.45-%i*0.5 -0.25;-0.25 0.75+%i*0.5]
+D_2=det(Z_2)
+V_2=D_2/D //Voltage in polar form
+disp(V_2,'Voltage at node 2')
diff --git a/3504/CH2/EX2.9/Ex2_9.sce b/3504/CH2/EX2.9/Ex2_9.sce
new file mode 100644
index 000000000..6f0f1d531
--- /dev/null
+++ b/3504/CH2/EX2.9/Ex2_9.sce
@@ -0,0 +1,12 @@
+//To find the voltage across the capacitor.
+clc;
+Z=[4+%i*5 -2 -(1+%i*3);-2 5-%i*2 %i*2;-(1+%i*3) %i*2 2+%i*2]
+D=det(Z)
+Z_2=[4+%i*5 5 -(1+%i*3);-2 0 %i*2;-(1+%i*3) 0 2+%i*2]
+D_2=det(Z_2)
+I_2=D_2/D //Current in loop 1 in polar form
+Z_3=[4+%i*5 -2 5;-2 5-%i*2 0;-(1+%i*3) %i*2 0]
+D_3=det(Z_3)
+I_3=D_3/D //Current in loop 2 in polar form
+V_c=(I_2-I_3)*(-%i*2)
+disp(V_c,'Volatge across the capacitor')
generated by cgit (git 2.34.1) at 2024-12-19 12:44:13 +0000