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diff --git a/196/CH4/EX4.6/example_4_6.sce b/196/CH4/EX4.6/example_4_6.sce
new file mode 100755
index 000000000..164e2b4d6
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+++ b/196/CH4/EX4.6/example_4_6.sce
@@ -0,0 +1,20 @@
+//Chapter 4
+//Example 4-6
+//DesignOnInvertingVoltageLevelDetector 
+//Page 100
+clear;clc;
+//Given
+Vut = 13.5 ; Vlt = 10.5 ; //Upper and Lower Threshold Voltages
+Vref = -15 ; // Reference Voltage
+Vsatp = 13 ; Vsatm = -13;//Saturation Voltages 
+R = 10*10^3 ; // Input Resistance
+Vctr = (Vut + Vlt)/2;
+Vh = Vut - Vlt ;
+m = -(Vref / Vctr);
+Resistance = m * R ;
+n = (Vsatp-Vsatm)/Vh ;
+Resistance1 = n * R ;
+printf (" \n\n Hysteresis Voltage = %.4f ", Vh )
+printf (" \n\n Center Voltage = %.4f ", Vctr )
+printf (" \n\n Resistor mR = %.4f ", Resistance)
+printf (" \n\n Resistor nR = %.4f ", Resistance1) 
+\ No newline at end of file
diff --git a/196/CH4/EX4.6/result_4_6.txt b/196/CH4/EX4.6/result_4_6.txt
new file mode 100755
index 000000000..40464cd2d
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+++ b/196/CH4/EX4.6/result_4_6.txt
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+Hysteresis Voltage = 3.0000  
+
+Center Voltage = 12.0000  
+
+Resistor mR = 12500.0000  
+
+Resistor nR = 86666.6667 
+\ No newline at end of file