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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /911/CH3/EX3.7.b/ex_3_7_b.sce | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '911/CH3/EX3.7.b/ex_3_7_b.sce')
| -rw-r--r-- | 911/CH3/EX3.7.b/ex_3_7_b.sce | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/911/CH3/EX3.7.b/ex_3_7_b.sce b/911/CH3/EX3.7.b/ex_3_7_b.sce new file mode 100644 index 000000000..9dfd74e04 --- /dev/null +++ b/911/CH3/EX3.7.b/ex_3_7_b.sce @@ -0,0 +1,8 @@ +//example 3.7//
+//4 input nand gate using and and not//
+clc
+//refreshes all variables//
+clear
+//clears the screen//
+disp('in the figure output of first gate is given to input of second gate on both input. output of second gate is input to the third gate. and the output is (ABC)''')
+//result//
\ No newline at end of file |