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author | priyanka | 2015-06-24 15:03:17 +0530 |
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committer | priyanka | 2015-06-24 15:03:17 +0530 |
commit | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (patch) | |
tree | ab291cffc65280e58ac82470ba63fbcca7805165 /68/CH10/EX10.2 | |
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initial commit / add all books
Diffstat (limited to '68/CH10/EX10.2')
-rwxr-xr-x | 68/CH10/EX10.2/ex2.sce | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/68/CH10/EX10.2/ex2.sce b/68/CH10/EX10.2/ex2.sce new file mode 100755 index 000000000..21340b2fc --- /dev/null +++ b/68/CH10/EX10.2/ex2.sce @@ -0,0 +1,15 @@ +// Example 10.2 : W/L ratios for the logic circuit
+//For basic inverter
+n=1.5;
+p=5;
+L=0.25*10^-6; // (m)
+WbyL=2*n; // W/L for Q_NB , Q_NC , Q_ND
+disp(WbyL,"W/L ratio for Q_NB")
+disp(WbyL,"W/L ratio for Q_NC")
+disp(WbyL,"W/L ratio for Q_ND")
+WbyL=n; // W/L ratio for Q_NA
+disp(WbyL,"W/L ratio for Q_NA")
+WbyL=3*p; // W/L for Q_PA, Q_PC , Q_PD
+disp(WbyL,"W/L ratio for Q_PA")
+disp(WbyL,"W/L ratio for Q_PC")
+disp(WbyL,"W/L ratio for Q_PD")
\ No newline at end of file |