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| author | priyanka | 2015-06-24 15:03:17 +0530 |
|---|---|---|
| committer | priyanka | 2015-06-24 15:03:17 +0530 |
| commit | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (patch) | |
| tree | ab291cffc65280e58ac82470ba63fbcca7805165 /61/CH8/EX8.7/ex8_7.sce | |
| download | Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.gz Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.bz2 Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.zip | |
initial commit / add all books
Diffstat (limited to '61/CH8/EX8.7/ex8_7.sce')
| -rwxr-xr-x | 61/CH8/EX8.7/ex8_7.sce | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/61/CH8/EX8.7/ex8_7.sce b/61/CH8/EX8.7/ex8_7.sce new file mode 100755 index 000000000..87d42a97f --- /dev/null +++ b/61/CH8/EX8.7/ex8_7.sce @@ -0,0 +1,13 @@ +//ex8.7
+I_DSS=200*10^-3;
+g_m=200*10^-3;
+V_in=500*10^-3;
+V_DD=15;
+R_D=33;
+R_L=8.2*10^3;
+I_D=I_DSS; //Amplifier is zero biased
+V_D=V_DD-I_D*R_D;
+R_d=(R_D*R_L)/(R_D+R_L);
+V_out=g_m*R_d*V_in;
+disp(V_D,'DC output voltage in Volts')
+disp(V_out,'AC output voltage in volts')
\ No newline at end of file |