initial commit / add all books

20 files changed, 72 insertions, 0 deletions

diff --git a/462/CH1/EX1.1/ex_1_1.pdf b/462/CH1/EX1.1/ex_1_1.pdf
new file mode 100755
index 000000000..7819363f6
--- /dev/null
+++ b/462/CH1/EX1.1/ex_1_1.pdf
diff --git a/462/CH1/EX1.1/ex_1_1.sce b/462/CH1/EX1.1/ex_1_1.sce
new file mode 100755
index 000000000..9a55a7f22
--- /dev/null
+++ b/462/CH1/EX1.1/ex_1_1.sce
@@ -0,0 +1,7 @@
+//example 1.1//

+clc

+//clears the screen//

+clear

+//clears the existing variables//

+disp('the locker door (Y) can be opened using one key (A) which is with you and the other key (B) which is with the bank executive. When both the keys are used, the locker door opens, i.e. the locker door can be opened (Y=1) only when both the keys are applied(A=B=1).Thus, this can be expressed as an AND operation')

+disp('Y=A*B')
\ No newline at end of file
diff --git a/462/CH1/EX1.11.a/ex_11_a.pdf b/462/CH1/EX1.11.a/ex_11_a.pdf
new file mode 100755
index 000000000..fc3cd31d5
--- /dev/null
+++ b/462/CH1/EX1.11.a/ex_11_a.pdf
diff --git a/462/CH1/EX1.11.a/ex_1_11_a.sce b/462/CH1/EX1.11.a/ex_1_11_a.sce
new file mode 100755
index 000000000..6ba888133
--- /dev/null
+++ b/462/CH1/EX1.11.a/ex_1_11_a.sce
@@ -0,0 +1,7 @@
+//example 1.11(a)//

+clc

+//clears the screen//

+clear

+//clears already existing variables//

+disp('If we connect one input of EX-OR gate to 0 permanently, we observe that Y=A*0''+A''*0')

+disp('thus, Y=A')
\ No newline at end of file
diff --git a/462/CH1/EX1.11.b/ex_11_b.pdf b/462/CH1/EX1.11.b/ex_11_b.pdf
new file mode 100755
index 000000000..ac0156cbf
--- /dev/null
+++ b/462/CH1/EX1.11.b/ex_11_b.pdf
diff --git a/462/CH1/EX1.11.b/ex_1_11_b.sce b/462/CH1/EX1.11.b/ex_1_11_b.sce
new file mode 100755
index 000000000..b316169b9
--- /dev/null
+++ b/462/CH1/EX1.11.b/ex_1_11_b.sce
@@ -0,0 +1,7 @@
+//example 1.11(b)//

+clc

+//clears the screen//

+clear

+//clears already existing variables//

+disp('If we connect one input of EX-OR gate to 1 permanently, we observe that Y=A*1''+A''*1')

+disp('thus, Y=A''')
\ No newline at end of file
diff --git a/462/CH1/EX1.13.a/ex_13_a.pdf b/462/CH1/EX1.13.a/ex_13_a.pdf
new file mode 100755
index 000000000..408d9167b
--- /dev/null
+++ b/462/CH1/EX1.13.a/ex_13_a.pdf
diff --git a/462/CH1/EX1.13.a/ex_1_13_a.sce b/462/CH1/EX1.13.a/ex_1_13_a.sce
new file mode 100755
index 000000000..a44b8ee45
--- /dev/null
+++ b/462/CH1/EX1.13.a/ex_1_13_a.sce
@@ -0,0 +1,7 @@
+//example 1.13(a)//

+clc

+//clears the screen//

+clear

+//clears already existing variables//

+disp('If we connect one input of EX-NOR gate to 0 permanently, we observe that Y=A*0+A''*0''')

+disp('thus, Y=A''')
\ No newline at end of file
diff --git a/462/CH1/EX1.13.b/ex_13_b.pdf b/462/CH1/EX1.13.b/ex_13_b.pdf
new file mode 100755
index 000000000..8e1a9406f
--- /dev/null
+++ b/462/CH1/EX1.13.b/ex_13_b.pdf
diff --git a/462/CH1/EX1.13.b/ex_1_13_b.sce b/462/CH1/EX1.13.b/ex_1_13_b.sce
new file mode 100755
index 000000000..fa4f6f2c2
--- /dev/null
+++ b/462/CH1/EX1.13.b/ex_1_13_b.sce
@@ -0,0 +1,7 @@
+//example 1.13(b)//

+clc

+//clears the screen//

+clear

+//clears already existing variables//

+disp('If we connect one input of EX-NOR gate to 1 permanently, we observe that Y=A*1+A''*1''')

+disp('thus, Y=A')
\ No newline at end of file
diff --git a/462/CH1/EX1.3/ex_1_3.pdf b/462/CH1/EX1.3/ex_1_3.pdf
new file mode 100755
index 000000000..6eaa0ba5a
--- /dev/null
+++ b/462/CH1/EX1.3/ex_1_3.pdf
diff --git a/462/CH1/EX1.3/ex_1_3.sce b/462/CH1/EX1.3/ex_1_3.sce
new file mode 100755
index 000000000..6bb0265d4
--- /dev/null
+++ b/462/CH1/EX1.3/ex_1_3.sce
@@ -0,0 +1,8 @@
+//example 1.3//

+clc

+//clears the screen//

+clear

+//clears already existing variables//

+disp('Let the temperature and pressure be converted into electrical signals and T=1 if temperature exceeds the specified limit and P=1 if pressure exceeds the specified limit. If T=1 or P=1 or both T and P are 1 then the alarm is required to be activated, i.e., the signal applied to the alarm Y=1. This operation can be expressed as an or operation.')

+disp('Y=T or P')

+disp('Y=T+P')
\ No newline at end of file
diff --git a/462/CH1/EX1.7.a/ex_1_7_a.pdf b/462/CH1/EX1.7.a/ex_1_7_a.pdf
new file mode 100755
index 000000000..11d13eb74
--- /dev/null
+++ b/462/CH1/EX1.7.a/ex_1_7_a.pdf
diff --git a/462/CH1/EX1.7.a/ex_1_7_a.sce b/462/CH1/EX1.7.a/ex_1_7_a.sce
new file mode 100755
index 000000000..1118ebbfe
--- /dev/null
+++ b/462/CH1/EX1.7.a/ex_1_7_a.sce
@@ -0,0 +1,7 @@
+//example 1.7(a)//

+clc

+//clears the screen//

+clear

+//clears already existing variables//

+disp('when one of the logic input of 2-input NAND gate is 0, then irrespective of the other input, the output comes out to be 1. In fact, a NAND gate is disabled or inhibited if one of its inputs is connected to logic 0')

+disp('Y=1')
\ No newline at end of file
diff --git a/462/CH1/EX1.7.b/ex_1_7_b.pdf b/462/CH1/EX1.7.b/ex_1_7_b.pdf
new file mode 100755
index 000000000..6c6e813cd
--- /dev/null
+++ b/462/CH1/EX1.7.b/ex_1_7_b.pdf
diff --git a/462/CH1/EX1.7.b/ex_1_7_b.sce b/462/CH1/EX1.7.b/ex_1_7_b.sce
new file mode 100755
index 000000000..41512b770
--- /dev/null
+++ b/462/CH1/EX1.7.b/ex_1_7_b.sce
@@ -0,0 +1,7 @@
+//example 1.7(b)//

+clc

+//clears the screen//

+clear

+//clears already existing variables//

+disp('when one of the logic input of 2-input NAND gate is 1, then when A=1, Y=0 and if A=0, Y=1')

+disp('Y=A''')
\ No newline at end of file
diff --git a/462/CH1/EX1.9.a/ex_1_9_a.pdf b/462/CH1/EX1.9.a/ex_1_9_a.pdf
new file mode 100755
index 000000000..9ca2c80a6
--- /dev/null
+++ b/462/CH1/EX1.9.a/ex_1_9_a.pdf
diff --git a/462/CH1/EX1.9.a/ex_1_9_a.sce b/462/CH1/EX1.9.a/ex_1_9_a.sce
new file mode 100755
index 000000000..0a62626b4
--- /dev/null
+++ b/462/CH1/EX1.9.a/ex_1_9_a.sce
@@ -0,0 +1,7 @@
+//example 1.9(a)//

+clc

+//clears the screen//

+clear

+//clears already existing variables//

+disp('when one of the logic input of 2-input NOR gate is 0, then when A=1, Y=0 and if A=0, Y=1')

+disp('Y=A''')
\ No newline at end of file
diff --git a/462/CH1/EX1.9.b/ex_1_9_b.pdf b/462/CH1/EX1.9.b/ex_1_9_b.pdf
new file mode 100755
index 000000000..0134f8913
--- /dev/null
+++ b/462/CH1/EX1.9.b/ex_1_9_b.pdf
diff --git a/462/CH1/EX1.9.b/ex_1_9_b.sce b/462/CH1/EX1.9.b/ex_1_9_b.sce
new file mode 100755
index 000000000..1a2e75a40
--- /dev/null
+++ b/462/CH1/EX1.9.b/ex_1_9_b.sce
@@ -0,0 +1,8 @@
+//example 1.9(b)//

+clc

+//clears the screen//

+clear

+//clears already existing variables//

+disp('when one of the logic input of 2-input NOR gate is 1, then irrespective of the other input, the output comes out to be 0. In fact, a NAND gate is disabled or inhibited if one of its inputs is connected to logic 1')

+disp('Y=0')

+disp('here the output of Y is 0 irrespective of input of A')
\ No newline at end of file