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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /2549/CH3/EX3.6.1/Ex3_6_1.sce | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '2549/CH3/EX3.6.1/Ex3_6_1.sce')
| -rw-r--r-- | 2549/CH3/EX3.6.1/Ex3_6_1.sce | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/2549/CH3/EX3.6.1/Ex3_6_1.sce b/2549/CH3/EX3.6.1/Ex3_6_1.sce new file mode 100644 index 000000000..01e7ec979 --- /dev/null +++ b/2549/CH3/EX3.6.1/Ex3_6_1.sce @@ -0,0 +1,11 @@ +//Ex3.6.1
+//calculation of average load voltge bridge rectifier ckt
+clc;
+clear;
+//given
+N=1/2;//ratio of no. of turns secondary to primary winding (Ns/Np)
+V=230;//input ac voltage
+Vs_rms=N*V;//rms secondary voltage
+Vm=sqrt(2)*Vs_rms;//peak secondary voltage
+Vl_dc=(1/%pi)*integrate('(Vm-1.4)*sin(Wt)','Wt',0,%pi);//(Vm-1.4) (voltage drop across two diode by 1.4V)
+disp('Volt',Vl_dc,'Average load voltage is :')
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