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| author | priyanka | 2015-06-24 15:03:17 +0530 |
|---|---|---|
| committer | priyanka | 2015-06-24 15:03:17 +0530 |
| commit | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (patch) | |
| tree | ab291cffc65280e58ac82470ba63fbcca7805165 /1133/CH8/EX8.23/Example8_23.sce | |
| download | Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.gz Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.bz2 Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.zip | |
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| -rwxr-xr-x | 1133/CH8/EX8.23/Example8_23.sce | 10 |
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diff --git a/1133/CH8/EX8.23/Example8_23.sce b/1133/CH8/EX8.23/Example8_23.sce new file mode 100755 index 000000000..aa2f09cd7 --- /dev/null +++ b/1133/CH8/EX8.23/Example8_23.sce @@ -0,0 +1,10 @@ +//Example 8.23
+clc
+disp("Internal structure of 7490 ripple counter IC is as shown in fig. 8.50")
+disp("")
+disp("We know that, one IC can work as mod-10 (BCD) counter. Therefore, we need two ICs. The counter will go through states 0-19 and should be reset on state 20. i.e.")
+disp(" QD QC QB QA QD QC QB QA")
+disp(" 0 0 1 0 0 0 0 0")
+disp(" 7490(2) 7490(1)")
+disp("")
+disp("The diagram of divide-by-20 counter using IC 7490 is as shown in fig.8.51")
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