| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | analysis | 25 | logplain |
| -rw-r--r-- | example_5.9.cir | 597 | logplain |
| -rw-r--r-- | example_5.9.cir.ckt | 476 | logplain |
| -rw-r--r-- | example_5.9.cir.out | 513 | logplain |
| -rw-r--r-- | example_5.9.pro | 1411 | logplain |
| -rw-r--r-- | example_5.9.proj | 30 | logplain |
| -rw-r--r-- | example_5.9.sch | 5872 | logplain |
| -rw-r--r-- | ua741.bak | 3660 | logplain |
| -rw-r--r-- | ua741.cir | 460 | logplain |
| -rw-r--r-- | ua741.cir.ckt | 217 | logplain |
| -rw-r--r-- | ua741.cir.out | 217 | logplain |
| -rw-r--r-- | ua741.pro | 1622 | logplain |
| -rw-r--r-- | ua741.sch | 3876 | logplain |
| -rw-r--r-- | ua741.sub | 253 | logplain |
 |
index : FreeEDA/.git | |
| Tool for circuit design, simulation, analysis and PCB design (previously known as Oscad) |
| summaryrefslogtreecommitdiff |