| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | 1n4007.lib | 143 | logplain |
| -rw-r--r-- | analysis | 27 | logplain |
| -rw-r--r-- | cd4007.txt | 648 | logplain |
| -rw-r--r-- | example_4.5-cache.bak | 2023 | logplain |
| -rw-r--r-- | example_4.5-cache.lib | 2023 | logplain |
| -rw-r--r-- | example_4.5.bak | 3801 | logplain |
| -rw-r--r-- | example_4.5.cir | 481 | logplain |
| -rw-r--r-- | example_4.5.cir.ckt | 338 | logplain |
| -rw-r--r-- | example_4.5.cir.out | 376 | logplain |
| -rw-r--r-- | example_4.5.pro | 1967 | logplain |
| -rw-r--r-- | example_4.5.proj | 30 | logplain |
| -rw-r--r-- | example_4.5.sch | 3801 | logplain |
 |
index : FreeEDA/.git | |
| Tool for circuit design, simulation, analysis and PCB design (previously known as Oscad) |
| summaryrefslogtreecommitdiff |