Mode | Name | Size | |
---|---|---|---|
d--------- | example_2.1 | 611 | logplain |
d--------- | example_2.2 | 444 | logplain |
d--------- | example_2.4 | 481 | logplain |
d--------- | example_2.5 | 481 | logplain |
d--------- | example_2.8 | 401 | logplain |
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index : FreeEDA/.git | |
Tool for circuit design, simulation, analysis and PCB design (previously known as Oscad) |
summaryrefslogtreecommitdiff |
Mode | Name | Size | |
---|---|---|---|
d--------- | example_2.1 | 611 | logplain |
d--------- | example_2.2 | 444 | logplain |
d--------- | example_2.4 | 481 | logplain |
d--------- | example_2.5 | 481 | logplain |
d--------- | example_2.8 | 401 | logplain |