| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | $savepcb.brd | 1794 | logplain |
| -rw-r--r-- | BasicGates-cache.bak | 8663 | logplain |
| -rw-r--r-- | BasicGates-cache.lib | 8886 | logplain |
| -rw-r--r-- | BasicGates.bak | 6306 | logplain |
| -rw-r--r-- | BasicGates.cir | 569 | logplain |
| -rw-r--r-- | BasicGates.cir.ckt | 1849 | logplain |
| -rw-r--r-- | BasicGates.cir.out | 1886 | logplain |
| -rw-r--r-- | BasicGates.cmp | 1355 | logplain |
| -rw-r--r-- | BasicGates.net | 1569 | logplain |
| -rw-r--r-- | BasicGates.pro | 1110 | logplain |
| -rw-r--r-- | BasicGates.proj | 29 | logplain |
| -rw-r--r-- | BasicGates.sch | 6317 | logplain |
| -rw-r--r-- | analysis | 26 | logplain |
 |
index : FreeEDA/.git | |
| Tool for circuit design, simulation, analysis and PCB design (previously known as Oscad) |
| summaryrefslogtreecommitdiff |