Subject: Changing all content and name of directory and file to FreeEDA

Description: The content of file,name of directory and file has been
changed in the below format.

1. Oscad to FreeEDA
2. OSCAD to FreeEDA
3. oscad to freeeda

10 files changed, 0 insertions, 831 deletions

diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/analysis b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/analysis
deleted file mode 100644
index ea22c29..0000000
--- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran  1e-00 3e-00 0e-00
diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak
deleted file mode 100644
index c0bd60e..0000000
--- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.bak
+++ /dev/null
@@ -1,145 +0,0 @@
-EESchema-LIBRARY Version 2.3  Date: Tuesday 07 May 2013 12:28:25 PM IST
-#encoding utf-8
-#
-# dc
-#
-DEF dc v 0 40 Y Y 1 F N
-F0 "v" -200 100 60 H V C CNN
-F1 "dc" -200 -50 60 H V C CNN
-F2 "R1" -300 0 60 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-C 0 0 150 0 1 0 N
-X + 1 0 450 300 D 50 50 1 1 P
-X - 2 0 -450 300 U 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
-# GND
-#
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
-DRAW
-P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# iplot
-#
-DEF iplot U 0 20 Y Y 1 F N
-F0 "U" -150 100 50 H V C CNN
-F1 "iplot" 150 100 50 H V C CNN
-DRAW
-C 0 0 100 0 0 0 N
-X + 1 -250 0 150 R 30 30 1 1 I
-X - 2 250 0 150 L 30 30 1 1 I
-ENDDRAW
-ENDDEF
-#
-# NPN
-#
-DEF NPN Q 0 0 Y Y 1 F N
-F0 "Q" 0 -150 50 H V R CNN
-F1 "NPN" 0 150 50 H V R CNN
-DRAW
-C 50 0 111 0 1 10 N
-P 2 0 1 0  0 0  100 100 N
-P 3 0 1 10  0 75  0 -75  0 -75 N
-P 3 0 1 0  50 -50  0 0  0 0 N
-P 3 0 1 0  90 -90  100 -100  100 -100 N
-P 5 0 1 0  90 -90  70 -30  30 -70  90 -90  90 -90 F
-X E 1 100 -200 100 U 40 40 1 1 P
-X B 2 -200 0 200 R 40 40 1 1 I
-X C 3 100 200 100 D 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# PNP
-#
-DEF PNP Q 0 0 Y Y 1 F N
-F0 "Q" 0 -150 60 H V R CNN
-F1 "PNP" 0 150 60 H V R CNN
-DRAW
-C 50 0 111 0 1 10 N
-P 2 0 1 0  0 0  100 100 N
-P 3 0 1 10  0 75  0 -75  0 -75 F
-P 3 0 1 0  25 -25  0 0  0 0 N
-P 3 0 1 0  100 -100  65 -65  65 -65 N
-P 5 0 1 0  25 -25  50 -75  75 -50  25 -25  25 -25 F
-X E 1 100 -200 100 U 40 40 1 1 P
-X B 2 -200 0 200 R 40 40 1 1 I
-X C 3 100 200 100 D 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# PWR_FLAG
-#
-DEF PWR_FLAG #FLG 0 0 N N 1 F P
-F0 "#FLG" 0 270 30 H I C CNN
-F1 "PWR_FLAG" 0 230 30 H V C CNN
-DRAW
-X pwr 1 0 0 0 U 20 20 0 0 w
-P 3 0 1 0  0 0  0 100  0 100 N
-P 5 0 1 0  0 100  -100 150  0 200  100 150  0 100 N
-ENDDRAW
-ENDDEF
-#
-# R
-#
-DEF R R 0 0 N Y 1 F N
-F0 "R" 80 0 50 V V C CNN
-F1 "R" 0 0 50 V V C CNN
-$FPLIST
- R?
- SM0603
- SM0805
- R?-*
-$ENDFPLIST
-DRAW
-S -40 150 40 -150 0 1 12 N
-X ~ 1 0 250 100 D 60 60 1 1 P
-X ~ 2 0 -250 100 U 60 60 1 1 P
-ENDDRAW
-ENDDEF
-#
-# sine
-#
-DEF sine v 0 40 Y Y 1 F N
-F0 "v" -200 100 60 H V C CNN
-F1 "sine" -200 -50 60 H V C CNN
-F2 "R1" -300 0 60 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-A -50 0 50 1 1799 0 1 0 N 0 0 -100 0
-A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0
-C 0 0 150 0 1 0 N
-X + 1 0 450 300 D 50 0 1 1 I
-X - 2 0 -450 300 U 50 0 1 1 I
-ENDDRAW
-ENDDEF
-#
-# vplot8_1
-#
-DEF vplot8_1 U 0 40 Y Y 8 F N
-F0 "U" -150 100 50 H V C CNN
-F1 "vplot8_1" 150 100 50 H V C CNN
-DRAW
-C 0 0 100 0 0 0 N
-X + 1 0 -300 200 U 40 40 1 1 I
-X + 2 0 -300 200 U 40 40 2 1 I
-X + 3 0 -300 200 U 40 40 3 1 I
-X + 4 0 -300 200 U 40 40 4 1 I
-X + 5 0 -300 200 U 40 40 5 1 I
-X + 6 0 -300 200 U 40 40 6 1 I
-X + 7 0 -300 200 U 40 40 7 1 I
-X + 8 0 -300 200 U 40 40 8 1 I
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.lib b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.lib
deleted file mode 100644
index dfad98c..0000000
--- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8-cache.lib
+++ /dev/null
@@ -1,145 +0,0 @@
-EESchema-LIBRARY Version 2.3  Date: Monday 13 May 2013 02:05:36 PM IST
-#encoding utf-8
-#
-# dc
-#
-DEF dc v 0 40 Y Y 1 F N
-F0 "v" -200 100 60 H V C CNN
-F1 "dc" -200 -50 60 H V C CNN
-F2 "R1" -300 0 60 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-C 0 0 150 0 1 0 N
-X + 1 0 450 300 D 50 50 1 1 P
-X - 2 0 -450 300 U 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
-# GND
-#
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
-DRAW
-P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# iplot
-#
-DEF iplot U 0 20 Y Y 1 F N
-F0 "U" -150 100 50 H V C CNN
-F1 "iplot" 150 100 50 H V C CNN
-DRAW
-C 0 0 100 0 0 0 N
-X + 1 -250 0 150 R 30 30 1 1 I
-X - 2 250 0 150 L 30 30 1 1 I
-ENDDRAW
-ENDDEF
-#
-# NPN
-#
-DEF NPN Q 0 0 Y Y 1 F N
-F0 "Q" 0 -150 50 H V R CNN
-F1 "NPN" 0 150 50 H V R CNN
-DRAW
-C 50 0 111 0 1 10 N
-P 2 0 1 0  0 0  100 100 N
-P 3 0 1 10  0 75  0 -75  0 -75 N
-P 3 0 1 0  50 -50  0 0  0 0 N
-P 3 0 1 0  90 -90  100 -100  100 -100 N
-P 5 0 1 0  90 -90  70 -30  30 -70  90 -90  90 -90 F
-X E 1 100 -200 100 U 40 40 1 1 P
-X B 2 -200 0 200 R 40 40 1 1 I
-X C 3 100 200 100 D 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# PNP
-#
-DEF PNP Q 0 0 Y Y 1 F N
-F0 "Q" 0 -150 60 H V R CNN
-F1 "PNP" 0 150 60 H V R CNN
-DRAW
-C 50 0 111 0 1 10 N
-P 2 0 1 0  0 0  100 100 N
-P 3 0 1 10  0 75  0 -75  0 -75 F
-P 3 0 1 0  25 -25  0 0  0 0 N
-P 3 0 1 0  100 -100  65 -65  65 -65 N
-P 5 0 1 0  25 -25  50 -75  75 -50  25 -25  25 -25 F
-X E 1 100 -200 100 U 40 40 1 1 P
-X B 2 -200 0 200 R 40 40 1 1 I
-X C 3 100 200 100 D 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# PWR_FLAG
-#
-DEF PWR_FLAG #FLG 0 0 N N 1 F P
-F0 "#FLG" 0 270 30 H I C CNN
-F1 "PWR_FLAG" 0 230 30 H V C CNN
-DRAW
-X pwr 1 0 0 0 U 20 20 0 0 w
-P 3 0 1 0  0 0  0 100  0 100 N
-P 5 0 1 0  0 100  -100 150  0 200  100 150  0 100 N
-ENDDRAW
-ENDDEF
-#
-# R
-#
-DEF R R 0 0 N Y 1 F N
-F0 "R" 80 0 50 V V C CNN
-F1 "R" 0 0 50 V V C CNN
-$FPLIST
- R?
- SM0603
- SM0805
- R?-*
-$ENDFPLIST
-DRAW
-S -40 150 40 -150 0 1 12 N
-X ~ 1 0 250 100 D 60 60 1 1 P
-X ~ 2 0 -250 100 U 60 60 1 1 P
-ENDDRAW
-ENDDEF
-#
-# sine
-#
-DEF sine v 0 40 Y Y 1 F N
-F0 "v" -200 100 60 H V C CNN
-F1 "sine" -200 -50 60 H V C CNN
-F2 "R1" -300 0 60 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-A -50 0 50 1 1799 0 1 0 N 0 0 -100 0
-A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0
-C 0 0 150 0 1 0 N
-X + 1 0 450 300 D 50 0 1 1 I
-X - 2 0 -450 300 U 50 0 1 1 I
-ENDDRAW
-ENDDEF
-#
-# vplot8_1
-#
-DEF vplot8_1 U 0 40 Y Y 8 F N
-F0 "U" -150 100 50 H V C CNN
-F1 "vplot8_1" 150 100 50 H V C CNN
-DRAW
-C 0 0 100 0 0 0 N
-X + 1 0 -300 200 U 40 40 1 1 I
-X + 2 0 -300 200 U 40 40 2 1 I
-X + 3 0 -300 200 U 40 40 3 1 I
-X + 4 0 -300 200 U 40 40 4 1 I
-X + 5 0 -300 200 U 40 40 5 1 I
-X + 6 0 -300 200 U 40 40 6 1 I
-X + 7 0 -300 200 U 40 40 7 1 I
-X + 8 0 -300 200 U 40 40 8 1 I
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.bak b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.bak
deleted file mode 100644
index 025172a..0000000
--- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.bak
+++ /dev/null
@@ -1,193 +0,0 @@
-EESchema Schematic File Version 2  date Tuesday 07 May 2013 12:28:25 PM IST
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:special
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:analogSpice
-LIBS:analogXSpice
-LIBS:convergenceAidSpice
-LIBS:converterSpice
-LIBS:digitalSpice
-LIBS:digitalXSpice
-LIBS:linearSpice
-LIBS:measurementSpice
-LIBS:portSpice
-LIBS:sourcesSpice
-LIBS:example_12.8-cache
-EELAYER 25  0
-EELAYER END
-$Descr A4 11700 8267
-encoding utf-8
-Sheet 1 1
-Title ""
-Date "7 may 2013"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-Wire Wire Line
-	8250 2800 8400 2800
-Connection ~ 7000 2750
-Wire Wire Line
-	8600 2250 8600 2000
-Wire Wire Line
-	8600 2000 7500 2000
-Wire Wire Line
-	6900 3650 7900 3650
-Wire Wire Line
-	7750 3650 7750 3300
-Wire Wire Line
-	7500 2000 7500 2200
-Connection ~ 7200 2750
-Wire Wire Line
-	7200 2750 6900 2750
-Wire Wire Line
-	7750 2800 7750 2750
-Connection ~ 7500 2750
-Wire Wire Line
-	7750 2750 7500 2750
-Wire Wire Line
-	7500 2600 7500 2850
-Wire Wire Line
-	7200 2400 7200 3050
-Connection ~ 7750 2750
-Wire Wire Line
-	7500 3250 7500 3450
-Connection ~ 7750 3650
-Wire Wire Line
-	7500 3450 8600 3450
-Wire Wire Line
-	8600 3450 8600 3150
-Wire Wire Line
-	7750 3300 8400 3300
-$Comp
-L IPLOT U1
-U 1 1 5188A5F5
-P 8000 2800
-F 0 "U1" H 7850 2900 50  0000 C CNN
-F 1 "IPLOT" H 8150 2900 50  0000 C CNN
-	1    8000 2800
-	1    0    0    -1  
-$EndComp
-$Comp
-L VPLOT8_1 U2
-U 2 1 5188A185
-P 7750 2450
-F 0 "U2" H 7600 2550 50  0000 C CNN
-F 1 "VPLOT8_1" H 7900 2550 50  0000 C CNN
-	2    7750 2450
-	1    0    0    -1  
-$EndComp
-$Comp
-L VPLOT8_1 U2
-U 1 1 51889CD8
-P 7000 2450
-F 0 "U2" H 6850 2550 50  0000 C CNN
-F 1 "VPLOT8_1" H 7150 2550 50  0000 C CNN
-	1    7000 2450
-	1    0    0    -1  
-$EndComp
-$Comp
-L PWR_FLAG #FLG01
-U 1 1 518897EF
-P 7200 2750
-F 0 "#FLG01" H 7200 3020 30  0001 C CNN
-F 1 "PWR_FLAG" H 7200 2980 30  0000 C CNN
-	1    7200 2750
-	1    0    0    -1  
-$EndComp
-$Comp
-L SINE v1
-U 1 1 51889574
-P 6900 3200
-F 0 "v1" H 6700 3300 60  0000 C CNN
-F 1 "SINE" H 6700 3150 60  0000 C CNN
-F 2 "R1" H 6600 3200 60  0000 C CNN
-	1    6900 3200
-	1    0    0    -1  
-$EndComp
-$Comp
-L PWR_FLAG #FLG02
-U 1 1 51889502
-P 7750 3650
-F 0 "#FLG02" H 7750 3920 30  0001 C CNN
-F 1 "PWR_FLAG" H 7750 3880 30  0000 C CNN
-	1    7750 3650
-	1    0    0    -1  
-$EndComp
-$Comp
-L GND #PWR03
-U 1 1 518894F5
-P 7900 3650
-F 0 "#PWR03" H 7900 3650 30  0001 C CNN
-F 1 "GND" H 7900 3580 30  0001 C CNN
-	1    7900 3650
-	1    0    0    -1  
-$EndComp
-$Comp
-L DC v2
-U 1 1 518894AB
-P 8600 2700
-F 0 "v2" H 8400 2800 60  0000 C CNN
-F 1 "23" H 8400 2650 60  0000 C CNN
-F 2 "R1" H 8300 2700 60  0000 C CNN
-	1    8600 2700
-	-1   0    0    -1  
-$EndComp
-$Comp
-L R R1
-U 1 1 5188943C
-P 8400 3050
-F 0 "R1" V 8480 3050 50  0000 C CNN
-F 1 "8" V 8400 3050 50  0000 C CNN
-	1    8400 3050
-	1    0    0    -1  
-$EndComp
-$Comp
-L PNP Q2
-U 1 1 518893FC
-P 7400 3050
-F 0 "Q2" H 7400 2900 60  0000 R CNN
-F 1 "PNP" H 7400 3200 60  0000 R CNN
-	1    7400 3050
-	1    0    0    1   
-$EndComp
-$Comp
-L NPN Q1
-U 1 1 518893F7
-P 7400 2400
-F 0 "Q1" H 7400 2250 50  0000 R CNN
-F 1 "NPN" H 7400 2550 50  0000 R CNN
-	1    7400 2400
-	1    0    0    -1  
-$EndComp
-$EndSCHEMATC
diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir
deleted file mode 100644
index 93fe4d6..0000000
--- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir
+++ /dev/null
@@ -1,16 +0,0 @@
-* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 13 May 2013 02:05:33 PM IST
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-*Sheet Name:/
-v3  0 5 23		
-U1  6 4 IPLOT		
-U2  2 6 VPLOT8_1		
-v1  2 0 SINE		
-v2  1 0 23		
-R1  4 0 8		
-Q2  6 2 5 PNP		
-Q1  6 2 1 NPN		
-
-.end
diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt
deleted file mode 100644
index 903850c..0000000
--- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.ckt
+++ /dev/null
@@ -1,15 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 02:05:33 pm ist
-
-v3  0 5 23
-V_u1 6 4 0
-* Plotting option vplot8_1
-v1  2 0 sine( 17.9 1000  )
-v2  1 0 23
-r1  4 0 8
-q2 5 2 6 pnp
-q1 1 2 6 npn
-
-.tran  1e-00 3e-00 0e-00
-.plot i(V_u1)
-.plot v(2) v(6) 
-.end
diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out
deleted file mode 100644
index 061ce43..0000000
--- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.cir.out
+++ /dev/null
@@ -1,20 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: monday 13 may 2013 02:05:33 pm ist
-
-v3  0 5 23
-V_u1 6 4 0
-* Plotting option vplot8_1
-v1  2 0 sine( 17.9 1000  )
-v2  1 0 23
-r1  4 0 8
-q2 5 2 6 pnp
-q1 1 2 6 npn
-
-.tran  1e-00 3e-00 0e-00
-
-* Control Statements 
-.control
-run
-plot i(V_u1)
-plot v(2) v(6) 
-.endc
-.end
diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.pro b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.pro
deleted file mode 100644
index c84bea9..0000000
--- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.pro
+++ /dev/null
@@ -1,74 +0,0 @@
-update=Tuesday 07 May 2013 11:10:57 AM IST
-last_client=eeschema
-[eeschema]
-version=1
-LibDir=
-NetFmt=1
-HPGLSpd=20
-HPGLDm=15
-HPGLNum=1
-offX_A4=0
-offY_A4=0
-offX_A3=0
-offY_A3=0
-offX_A2=0
-offY_A2=0
-offX_A1=0
-offY_A1=0
-offX_A0=0
-offY_A0=0
-offX_A=0
-offY_A=0
-offX_B=0
-offY_B=0
-offX_C=0
-offY_C=0
-offX_D=0
-offY_D=0
-offX_E=0
-offY_E=0
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
-LibName13=microcontrollers
-LibName14=dsp
-LibName15=microchip
-LibName16=analog_switches
-LibName17=motorola
-LibName18=texas
-LibName19=intel
-LibName20=audio
-LibName21=interface
-LibName22=digital-audio
-LibName23=philips
-LibName24=display
-LibName25=cypress
-LibName26=siliconi
-LibName27=opto
-LibName28=atmel
-LibName29=contrib
-LibName30=valves
-LibName31=/home/holy/OSCAD/library/analogSpice
-LibName32=/home/holy/OSCAD/library/analogXSpice
-LibName33=/home/holy/OSCAD/library/convergenceAidSpice
-LibName34=/home/holy/OSCAD/library/converterSpice
-LibName35=/home/holy/OSCAD/library/digitalSpice
-LibName36=/home/holy/OSCAD/library/digitalXSpice
-LibName37=/home/holy/OSCAD/library/linearSpice
-LibName38=/home/holy/OSCAD/library/measurementSpice
-LibName39=/home/holy/OSCAD/library/portSpice
-LibName40=/home/holy/OSCAD/library/sourcesSpice
diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.proj b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.proj
deleted file mode 100644
index fdaaf23..0000000
--- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.proj
+++ /dev/null
@@ -1 +0,0 @@
-schematicFile example_12.8.sch
diff --git a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.sch b/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.sch
deleted file mode 100644
index 15b79e2..0000000
--- a/OSCAD/Examples/sedra_smith/chapter_12/example_12.8/example_12.8.sch
+++ /dev/null
@@ -1,221 +0,0 @@
-EESchema Schematic File Version 2  date Monday 13 May 2013 02:05:36 PM IST
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:special
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:analogSpice
-LIBS:analogXSpice
-LIBS:convergenceAidSpice
-LIBS:converterSpice
-LIBS:digitalSpice
-LIBS:digitalXSpice
-LIBS:linearSpice
-LIBS:measurementSpice
-LIBS:portSpice
-LIBS:sourcesSpice
-LIBS:example_12.8-cache
-EELAYER 25  0
-EELAYER END
-$Descr A4 11700 8267
-encoding utf-8
-Sheet 1 1
-Title ""
-Date "13 may 2013"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L GND #PWR01
-U 1 1 5190A5AD
-P 9250 2600
-F 0 "#PWR01" H 9250 2600 30  0001 C CNN
-F 1 "GND" H 9250 2530 30  0001 C CNN
-	1    9250 2600
-	1    0    0    -1  
-$EndComp
-Connection ~ 8950 2600
-Wire Wire Line
-	8950 2600 9250 2600
-Wire Wire Line
-	8950 3600 8600 3600
-Wire Wire Line
-	8600 3600 8600 3450
-Wire Wire Line
-	8250 2800 8400 2800
-Connection ~ 7000 2750
-Wire Wire Line
-	7500 2000 8600 2000
-Wire Wire Line
-	6900 3650 7900 3650
-Wire Wire Line
-	7750 3650 7750 3300
-Wire Wire Line
-	7500 2000 7500 2200
-Connection ~ 7200 2750
-Wire Wire Line
-	7200 2750 6900 2750
-Wire Wire Line
-	7750 2800 7750 2750
-Connection ~ 7500 2750
-Wire Wire Line
-	7750 2750 7500 2750
-Wire Wire Line
-	7500 2600 7500 2850
-Wire Wire Line
-	7200 2400 7200 3050
-Connection ~ 7750 2750
-Wire Wire Line
-	7500 3250 7500 3450
-Connection ~ 7750 3650
-Wire Wire Line
-	7500 3450 8600 3450
-Wire Wire Line
-	7750 3300 8400 3300
-Wire Wire Line
-	8600 2000 8600 1600
-Wire Wire Line
-	8600 1600 8950 1600
-Wire Wire Line
-	8950 2500 8950 2700
-$Comp
-L DC v3
-U 1 1 5190A59B
-P 8950 3150
-F 0 "v3" H 8750 3250 60  0000 C CNN
-F 1 "23" H 8750 3100 60  0000 C CNN
-F 2 "R1" H 8650 3150 60  0000 C CNN
-	1    8950 3150
-	-1   0    0    -1  
-$EndComp
-$Comp
-L IPLOT U1
-U 1 1 5188A5F5
-P 8000 2800
-F 0 "U1" H 7850 2900 50  0000 C CNN
-F 1 "IPLOT" H 8150 2900 50  0000 C CNN
-	1    8000 2800
-	1    0    0    -1  
-$EndComp
-$Comp
-L VPLOT8_1 U2
-U 2 1 5188A185
-P 7750 2450
-F 0 "U2" H 7600 2550 50  0000 C CNN
-F 1 "VPLOT8_1" H 7900 2550 50  0000 C CNN
-	2    7750 2450
-	1    0    0    -1  
-$EndComp
-$Comp
-L VPLOT8_1 U2
-U 1 1 51889CD8
-P 7000 2450
-F 0 "U2" H 6850 2550 50  0000 C CNN
-F 1 "VPLOT8_1" H 7150 2550 50  0000 C CNN
-	1    7000 2450
-	1    0    0    -1  
-$EndComp
-$Comp
-L PWR_FLAG #FLG02
-U 1 1 518897EF
-P 7200 2750
-F 0 "#FLG02" H 7200 3020 30  0001 C CNN
-F 1 "PWR_FLAG" H 7200 2980 30  0000 C CNN
-	1    7200 2750
-	1    0    0    -1  
-$EndComp
-$Comp
-L SINE v1
-U 1 1 51889574
-P 6900 3200
-F 0 "v1" H 6700 3300 60  0000 C CNN
-F 1 "SINE" H 6700 3150 60  0000 C CNN
-F 2 "R1" H 6600 3200 60  0000 C CNN
-	1    6900 3200
-	1    0    0    -1  
-$EndComp
-$Comp
-L PWR_FLAG #FLG03
-U 1 1 51889502
-P 7750 3650
-F 0 "#FLG03" H 7750 3920 30  0001 C CNN
-F 1 "PWR_FLAG" H 7750 3880 30  0000 C CNN
-	1    7750 3650
-	1    0    0    -1  
-$EndComp
-$Comp
-L GND #PWR04
-U 1 1 518894F5
-P 7900 3650
-F 0 "#PWR04" H 7900 3650 30  0001 C CNN
-F 1 "GND" H 7900 3580 30  0001 C CNN
-	1    7900 3650
-	1    0    0    -1  
-$EndComp
-$Comp
-L DC v2
-U 1 1 518894AB
-P 8950 2050
-F 0 "v2" H 8750 2150 60  0000 C CNN
-F 1 "23" H 8750 2000 60  0000 C CNN
-F 2 "R1" H 8650 2050 60  0000 C CNN
-	1    8950 2050
-	-1   0    0    -1  
-$EndComp
-$Comp
-L R R1
-U 1 1 5188943C
-P 8400 3050
-F 0 "R1" V 8480 3050 50  0000 C CNN
-F 1 "8" V 8400 3050 50  0000 C CNN
-	1    8400 3050
-	1    0    0    -1  
-$EndComp
-$Comp
-L PNP Q2
-U 1 1 518893FC
-P 7400 3050
-F 0 "Q2" H 7400 2900 60  0000 R CNN
-F 1 "PNP" H 7400 3200 60  0000 R CNN
-	1    7400 3050
-	1    0    0    1   
-$EndComp
-$Comp
-L NPN Q1
-U 1 1 518893F7
-P 7400 2400
-F 0 "Q1" H 7400 2250 50  0000 R CNN
-F 1 "NPN" H 7400 2550 50  0000 R CNN
-	1    7400 2400
-	1    0    0    -1  
-$EndComp
-$EndSCHEMATC