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| author | Kevin | 2014-11-15 11:48:36 +0800 |
|---|---|---|
| committer | Kevin | 2014-11-15 11:48:36 +0800 |
| commit | d04075478d378d9e15f3e1abfd14b0bd124077d4 (patch) | |
| tree | 733dd964582f388b9e3e367c249946cd32a2851f /board/cogent/serial.h | |
| download | FOSSEE-netbook-uboot-source-d04075478d378d9e15f3e1abfd14b0bd124077d4.tar.gz FOSSEE-netbook-uboot-source-d04075478d378d9e15f3e1abfd14b0bd124077d4.tar.bz2 FOSSEE-netbook-uboot-source-d04075478d378d9e15f3e1abfd14b0bd124077d4.zip | |
init commit via android 4.4 uboot
Diffstat (limited to 'board/cogent/serial.h')
| -rwxr-xr-x | board/cogent/serial.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/board/cogent/serial.h b/board/cogent/serial.h new file mode 100755 index 0000000..89962d8 --- /dev/null +++ b/board/cogent/serial.h @@ -0,0 +1,15 @@ +/* Line Status Register bits */ +#define LSR_DR 0x01 /* Data ready */ +#define LSR_OE 0x02 /* Overrun */ +#define LSR_PE 0x04 /* Parity error */ +#define LSR_FE 0x08 /* Framing error */ +#define LSR_BI 0x10 /* Break */ +#define LSR_THRE 0x20 /* Xmit holding register empty */ +#define LSR_TEMT 0x40 /* Xmitter empty */ +#define LSR_ERR 0x80 /* Error */ + +#define CLKRATE 3686400 /* cogent motherboard serial clk = 3.6864MHz */ +#define DEFDIV 1 /* default to 230400 bps */ + +#define br_to_div(br) (CLKRATE / (16 * (br))) +#define div_to_br(div) (CLKRATE / (16 * (div))) |