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| author | Srikant Patnaik | 2015-01-11 12:28:04 +0530 |
|---|---|---|
| committer | Srikant Patnaik | 2015-01-11 12:28:04 +0530 |
| commit | 871480933a1c28f8a9fed4c4d34d06c439a7a422 (patch) | |
| tree | 8718f573808810c2a1e8cb8fb6ac469093ca2784 /ANDROID_3.4.5/arch/arm/boot/compressed/head-sa1100.S | |
| parent | 9d40ac5867b9aefe0722bc1f110b965ff294d30d (diff) | |
| download | FOSSEE-netbook-kernel-source-871480933a1c28f8a9fed4c4d34d06c439a7a422.tar.gz FOSSEE-netbook-kernel-source-871480933a1c28f8a9fed4c4d34d06c439a7a422.tar.bz2 FOSSEE-netbook-kernel-source-871480933a1c28f8a9fed4c4d34d06c439a7a422.zip | |
Moved, renamed, and deleted files
The original directory structure was scattered and unorganized.
Changes are basically to make it look like kernel structure.
Diffstat (limited to 'ANDROID_3.4.5/arch/arm/boot/compressed/head-sa1100.S')
| -rw-r--r-- | ANDROID_3.4.5/arch/arm/boot/compressed/head-sa1100.S | 47 |
1 files changed, 0 insertions, 47 deletions
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/head-sa1100.S b/ANDROID_3.4.5/arch/arm/boot/compressed/head-sa1100.S deleted file mode 100644 index 6179d94d..00000000 --- a/ANDROID_3.4.5/arch/arm/boot/compressed/head-sa1100.S +++ /dev/null @@ -1,47 +0,0 @@ -/* - * linux/arch/arm/boot/compressed/head-sa1100.S - * - * Copyright (C) 1999 Nicolas Pitre <nico@fluxnic.net> - * - * SA1100 specific tweaks. This is merged into head.S by the linker. - * - */ - -#include <linux/linkage.h> -#include <asm/mach-types.h> - - .section ".start", "ax" - -__SA1100_start: - - @ Preserve r8/r7 i.e. kernel entry values -#ifdef CONFIG_SA1100_COLLIE - mov r7, #MACH_TYPE_COLLIE -#endif -#ifdef CONFIG_SA1100_SIMPAD - @ UNTIL we've something like an open bootldr - mov r7, #MACH_TYPE_SIMPAD @should be 87 -#endif - mrc p15, 0, r0, c1, c0, 0 @ read control reg - ands r0, r0, #0x0d - beq 99f - - @ Data cache might be active. - @ Be sure to flush kernel binary out of the cache, - @ whatever state it is, before it is turned off. - @ This is done by fetching through currently executed - @ memory to be sure we hit the same cache. - bic r2, pc, #0x1f - add r3, r2, #0x4000 @ 16 kb is quite enough... -1: ldr r0, [r2], #32 - teq r2, r3 - bne 1b - mcr p15, 0, r0, c7, c10, 4 @ drain WB - mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches - - @ disabling MMU and caches - mrc p15, 0, r0, c1, c0, 0 @ read control reg - bic r0, r0, #0x0d @ clear WB, DC, MMU - bic r0, r0, #0x1000 @ clear Icache - mcr p15, 0, r0, c1, c0, 0 -99: |