Moved, renamed, and deleted files

The original directory structure was scattered and unorganized.
Changes are basically to make it look like kernel structure.

100 files changed, 0 insertions, 13723 deletions

diff --git a/ANDROID_3.4.5/arch/arm/boot/Makefile b/ANDROID_3.4.5/arch/arm/boot/Makefile
deleted file mode 100644
index c877087d..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/Makefile
+++ /dev/null
@@ -1,128 +0,0 @@
-#
-# arch/arm/boot/Makefile
-#
-# This file is included by the global makefile so that you can add your own
-# architecture-specific flags and dependencies.
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License.  See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1995-2002 Russell King
-#
-
-ifneq ($(MACHINE),)
-include $(srctree)/$(MACHINE)/Makefile.boot
-endif
-
-# Note: the following conditions must always be true:
-#   ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET)
-#   PARAMS_PHYS must be within 4MB of ZRELADDR
-#   INITRD_PHYS must be in RAM
-ZRELADDR    := $(zreladdr-y)
-PARAMS_PHYS := $(params_phys-y)
-INITRD_PHYS := $(initrd_phys-y)
-
-export ZRELADDR INITRD_PHYS PARAMS_PHYS
-
-targets := Image zImage xipImage bootpImage uImage
-
-ifeq ($(CONFIG_XIP_KERNEL),y)
-
-$(obj)/xipImage: vmlinux FORCE
-	$(call if_changed,objcopy)
-	@echo '  Kernel: $@ is ready (physical address: $(CONFIG_XIP_PHYS_ADDR))'
-
-$(obj)/Image $(obj)/zImage: FORCE
-	@echo 'Kernel configured for XIP (CONFIG_XIP_KERNEL=y)'
-	@echo 'Only the xipImage target is available in this case'
-	@false
-
-else
-
-$(obj)/xipImage: FORCE
-	@echo 'Kernel not configured for XIP (CONFIG_XIP_KERNEL!=y)'
-	@false
-
-$(obj)/Image: vmlinux FORCE
-	$(call if_changed,objcopy)
-	@echo '  Kernel: $@ is ready'
-
-$(obj)/compressed/vmlinux: $(obj)/Image FORCE
-	$(Q)$(MAKE) $(build)=$(obj)/compressed $@
-
-$(obj)/zImage:	$(obj)/compressed/vmlinux FORCE
-	$(call if_changed,objcopy)
-	@echo '  Kernel: $@ is ready'
-
-endif
-
-targets += $(dtb-y)
-
-# Rule to build device tree blobs
-$(obj)/%.dtb: $(src)/dts/%.dts FORCE
-	$(call if_changed_dep,dtc)
-
-$(obj)/dtbs: $(addprefix $(obj)/, $(dtb-y))
-
-clean-files := *.dtb
-
-ifneq ($(LOADADDR),)
-  UIMAGE_LOADADDR=$(LOADADDR)
-else
-  ifeq ($(CONFIG_ZBOOT_ROM),y)
-    UIMAGE_LOADADDR=$(CONFIG_ZBOOT_ROM_TEXT)
-  else
-    UIMAGE_LOADADDR=$(ZRELADDR)
-  endif
-endif
-
-check_for_multiple_loadaddr = \
-if [ $(words $(UIMAGE_LOADADDR)) -gt 1 ]; then \
-	echo 'multiple load addresses: $(UIMAGE_LOADADDR)'; \
-	echo 'This is incompatible with uImages'; \
-	echo 'Specify LOADADDR on the commandline to build an uImage'; \
-	false; \
-fi
-
-$(obj)/uImage:	$(obj)/zImage FORCE
-	@$(check_for_multiple_loadaddr)
-	$(call if_changed,uimage)
-	@echo '  Image $@ is ready'
-
-$(obj)/bootp/bootp: $(obj)/zImage initrd FORCE
-	$(Q)$(MAKE) $(build)=$(obj)/bootp $@
-	@:
-
-$(obj)/bootpImage: $(obj)/bootp/bootp FORCE
-	$(call if_changed,objcopy)
-	@echo '  Kernel: $@ is ready'
-
-PHONY += initrd FORCE
-initrd:
-	@test "$(INITRD_PHYS)" != "" || \
-	(echo This machine does not support INITRD; exit -1)
-	@test "$(INITRD)" != "" || \
-	(echo You must specify INITRD; exit -1)
-
-install: $(obj)/Image
-	$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
-	$(obj)/Image System.map "$(INSTALL_PATH)"
-
-zinstall: $(obj)/zImage
-	$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
-	$(obj)/zImage System.map "$(INSTALL_PATH)"
-
-uinstall: $(obj)/uImage
-	$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
-	$(obj)/uImage System.map "$(INSTALL_PATH)"
-
-zi:
-	$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
-	$(obj)/zImage System.map "$(INSTALL_PATH)"
-
-i:
-	$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
-	$(obj)/Image System.map "$(INSTALL_PATH)"
-
-subdir-	    := bootp compressed
diff --git a/ANDROID_3.4.5/arch/arm/boot/bootp/Makefile b/ANDROID_3.4.5/arch/arm/boot/bootp/Makefile
deleted file mode 100644
index c394e305..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/bootp/Makefile
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# linux/arch/arm/boot/bootp/Makefile
-#
-# This file is included by the global makefile so that you can add your own
-# architecture-specific flags and dependencies.
-#
-
-LDFLAGS_bootp	:=-p --no-undefined -X \
-		 --defsym initrd_phys=$(INITRD_PHYS) \
-		 --defsym params_phys=$(PARAMS_PHYS) -T
-AFLAGS_initrd.o :=-DINITRD=\"$(INITRD)\"
-
-targets	:= bootp init.o kernel.o initrd.o
-
-# Note that bootp.lds picks up kernel.o and initrd.o
-$(obj)/bootp:	$(src)/bootp.lds $(addprefix $(obj)/,init.o kernel.o initrd.o) FORCE
-	$(call if_changed,ld)
-	@:
-
-# kernel.o and initrd.o includes a binary image using
-# .incbin, a dependency which is not tracked automatically
-
-$(obj)/kernel.o: arch/arm/boot/zImage FORCE
-
-$(obj)/initrd.o: $(INITRD) FORCE
-
-PHONY += $(INITRD) FORCE
diff --git a/ANDROID_3.4.5/arch/arm/boot/bootp/bootp.lds b/ANDROID_3.4.5/arch/arm/boot/bootp/bootp.lds
deleted file mode 100644
index fc54394f..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/bootp/bootp.lds
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- *  linux/arch/arm/boot/bootp/bootp.lds
- *
- *  Copyright (C) 2000-2002 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-  . = 0;
-  .text : {
-   _stext = .;
-   *(.start)
-   *(.text)
-   initrd_size = initrd_end - initrd_start;
-   _etext = .;
-  }
-
-  .stab 0 : { *(.stab) }
-  .stabstr 0 : { *(.stabstr) }
-  .stab.excl 0 : { *(.stab.excl) }
-  .stab.exclstr 0 : { *(.stab.exclstr) }
-  .stab.index 0 : { *(.stab.index) }
-  .stab.indexstr 0 : { *(.stab.indexstr) }
-  .comment 0 : { *(.comment) }
-}
diff --git a/ANDROID_3.4.5/arch/arm/boot/bootp/init.S b/ANDROID_3.4.5/arch/arm/boot/bootp/init.S
deleted file mode 100644
index 78b50807..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/bootp/init.S
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- *  linux/arch/arm/boot/bootp/init.S
- *
- *  Copyright (C) 2000-2003 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  "Header" file for splitting kernel + initrd.  Note that we pass
- *  r0 through to r3 straight through.
- *
- *  This demonstrates how to append code to the start of the kernel
- *  zImage, and boot the kernel without copying it around.  This
- *  example would be simpler; if we didn't have an object of unknown
- *  size immediately following the kernel, we could build this into
- *  a binary blob, and concatenate the zImage using the cat command.
- */
-		.section .start,#alloc,#execinstr
-		.type	_start, #function
-		.globl	_start
-
-_start:		add	lr, pc, #-0x8		@ lr = current load addr
-		adr	r13, data
-		ldmia	r13!, {r4-r6}		@ r5 = dest, r6 = length
-		add	r4, r4, lr		@ r4 = initrd_start + load addr
-		bl	move			@ move the initrd
-
-/*
- * Setup the initrd parameters to pass to the kernel.  This can only be
- * passed in via the tagged list.
- */
-		ldmia	r13, {r5-r9}		@ get size and addr of initrd
-						@ r5 = ATAG_CORE
-						@ r6 = ATAG_INITRD2
-						@ r7 = initrd start
-						@ r8 = initrd end
-						@ r9 = param_struct address
-
-		ldr	r10, [r9, #4]		@ get first tag
-		teq	r10, r5			@ is it ATAG_CORE?
-/*
- * If we didn't find a valid tag list, create a dummy ATAG_CORE entry.
- */
-		movne	r10, #0			@ terminator
-		movne	r4, #2			@ Size of this entry (2 words)
-		stmneia	r9, {r4, r5, r10}	@ Size, ATAG_CORE, terminator
-
-/*
- * find the end of the tag list, and then add an INITRD tag on the end.
- * If there is already an INITRD tag, then we ignore it; the last INITRD
- * tag takes precedence.
- */
-taglist:	ldr	r10, [r9, #0]		@ tag length
-		teq	r10, #0			@ last tag (zero length)?
-		addne	r9, r9, r10, lsl #2
-		bne	taglist
-
-		mov	r5, #4			@ Size of initrd tag (4 words)
-		stmia	r9, {r5, r6, r7, r8, r10}
-		b	kernel_start		@ call kernel
-
-/*
- * Move the block of memory length r6 from address r4 to address r5
- */
-move:		ldmia	r4!, {r7 - r10}		@ move 32-bytes at a time
-		stmia	r5!, {r7 - r10}
-		ldmia	r4!, {r7 - r10}
-		stmia	r5!, {r7 - r10}
-		subs	r6, r6, #8 * 4
-		bcs	move
-		mov	pc, lr
-
-		.size	_start, . - _start
-
-		.align
-
-		.type	data,#object
-data:		.word	initrd_start		@ source initrd address
-		.word	initrd_phys		@ destination initrd address
-		.word	initrd_size		@ initrd size
-
-		.word	0x54410001		@ r5 = ATAG_CORE
-		.word	0x54420005		@ r6 = ATAG_INITRD2
-		.word	initrd_phys		@ r7
-		.word	initrd_size		@ r8
-		.word	params_phys		@ r9
-		.size	data, . - data
diff --git a/ANDROID_3.4.5/arch/arm/boot/bootp/initrd.S b/ANDROID_3.4.5/arch/arm/boot/bootp/initrd.S
deleted file mode 100644
index d81ea183..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/bootp/initrd.S
+++ /dev/null
@@ -1,6 +0,0 @@
-	.type	initrd_start,#object
-	.globl	initrd_start
-initrd_start:
-	.incbin	INITRD
-	.globl	initrd_end
-initrd_end:
diff --git a/ANDROID_3.4.5/arch/arm/boot/bootp/kernel.S b/ANDROID_3.4.5/arch/arm/boot/bootp/kernel.S
deleted file mode 100644
index b87a25c7..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/bootp/kernel.S
+++ /dev/null
@@ -1,6 +0,0 @@
-	.globl	kernel_start
-kernel_start:
-	.incbin	"arch/arm/boot/zImage"
-	.globl	kernel_end
-kernel_end:
-	.align	2
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/Makefile b/ANDROID_3.4.5/arch/arm/boot/compressed/Makefile
deleted file mode 100644
index 36cf358c..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/Makefile
+++ /dev/null
@@ -1,204 +0,0 @@
-#
-# linux/arch/arm/boot/compressed/Makefile
-#
-# create a compressed vmlinuz image from the original vmlinux
-#
-
-OBJS		=
-
-# Ensure that MMCIF loader code appears early in the image
-# to minimise that number of bocks that have to be read in
-# order to load it.
-ifeq ($(CONFIG_ZBOOT_ROM_MMCIF),y)
-OBJS		+= mmcif-sh7372.o
-endif
-
-# Ensure that SDHI loader code appears early in the image
-# to minimise that number of bocks that have to be read in
-# order to load it.
-ifeq ($(CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI),y)
-OBJS		+= sdhi-shmobile.o
-OBJS		+= sdhi-sh7372.o
-endif
-
-AFLAGS_head.o += -DTEXT_OFFSET=$(TEXT_OFFSET)
-HEAD	= head.o
-OBJS	+= misc.o decompress.o
-FONTC	= $(srctree)/drivers/video/console/font_acorn_8x8.c
-
-# string library code (-Os is enforced to keep it much smaller)
-OBJS		+= string.o
-CFLAGS_string.o	:= -Os
-
-#
-# Architecture dependencies
-#
-ifeq ($(CONFIG_ARCH_ACORN),y)
-OBJS		+= ll_char_wr.o font.o
-endif
-
-ifeq ($(CONFIG_ARCH_SHARK),y)
-OBJS		+= head-shark.o ofw-shark.o
-endif
-
-ifeq ($(CONFIG_ARCH_P720T),y)
-# Borrow this code from SA1100
-OBJS		+= head-sa1100.o
-endif
-
-ifeq ($(CONFIG_ARCH_SA1100),y)
-OBJS		+= head-sa1100.o
-endif
-
-ifeq ($(CONFIG_ARCH_VT8500),y)
-OBJS		+= head-vt8500.o
-endif
-
-ifeq ($(CONFIG_CPU_XSCALE),y)
-OBJS		+= head-xscale.o
-endif
-
-ifeq ($(CONFIG_PXA_SHARPSL_DETECT_MACH_ID),y)
-OBJS		+= head-sharpsl.o
-endif
-
-ifeq ($(CONFIG_ARCH_WMT),y)
-OBJS		+= head-wmt.o
-endif
-
-ifeq ($(CONFIG_CPU_ENDIAN_BE32),y)
-ifeq ($(CONFIG_CPU_CP15),y)
-OBJS		+= big-endian.o
-else
-# The endian should be set by h/w design.
-endif
-endif
-
-ifeq ($(CONFIG_ARCH_SHMOBILE),y)
-OBJS		+= head-shmobile.o
-endif
-
-#
-# We now have a PIC decompressor implementation.  Decompressors running
-# from RAM should not define ZTEXTADDR.  Decompressors running directly
-# from ROM or Flash must define ZTEXTADDR (preferably via the config)
-# FIXME: Previous assignment to ztextaddr-y is lost here. See SHARK
-ifeq ($(CONFIG_ZBOOT_ROM),y)
-ZTEXTADDR	:= $(CONFIG_ZBOOT_ROM_TEXT)
-ZBSSADDR	:= $(CONFIG_ZBOOT_ROM_BSS)
-else
-ZTEXTADDR	:= 0
-ZBSSADDR	:= ALIGN(8)
-endif
-
-SEDFLAGS	= s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
-
-suffix_$(CONFIG_KERNEL_GZIP) = gzip
-suffix_$(CONFIG_KERNEL_LZO)  = lzo
-suffix_$(CONFIG_KERNEL_LZMA) = lzma
-suffix_$(CONFIG_KERNEL_XZ)   = xzkern
-
-# Borrowed libfdt files for the ATAG compatibility mode
-
-libfdt		:= fdt_rw.c fdt_ro.c fdt_wip.c fdt.c
-libfdt_hdrs	:= fdt.h libfdt.h libfdt_internal.h
-
-libfdt_objs	:= $(addsuffix .o, $(basename $(libfdt)))
-
-$(addprefix $(obj)/,$(libfdt) $(libfdt_hdrs)): $(obj)/%: $(srctree)/scripts/dtc/libfdt/%
-	$(call cmd,shipped)
-
-$(addprefix $(obj)/,$(libfdt_objs) atags_to_fdt.o): \
-	$(addprefix $(obj)/,$(libfdt_hdrs))
-
-ifeq ($(CONFIG_ARM_ATAG_DTB_COMPAT),y)
-OBJS	+= $(libfdt_objs) atags_to_fdt.o
-endif
-
-targets       := vmlinux vmlinux.lds \
-		 piggy.$(suffix_y) piggy.$(suffix_y).o \
-		 lib1funcs.o lib1funcs.S ashldi3.o ashldi3.S \
-		 font.o font.c head.o misc.o $(OBJS)
-
-# Make sure files are removed during clean
-extra-y       += piggy.gzip piggy.lzo piggy.lzma piggy.xzkern \
-		 lib1funcs.S ashldi3.S $(libfdt) $(libfdt_hdrs)
-
-ifeq ($(CONFIG_FUNCTION_TRACER),y)
-ORIG_CFLAGS := $(KBUILD_CFLAGS)
-KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
-endif
-
-ccflags-y := -fpic -fno-builtin -I$(obj)
-asflags-y := -Wa,-march=all
-
-# Supply kernel BSS size to the decompressor via a linker symbol.
-KBSS_SZ = $(shell $(CROSS_COMPILE)size $(obj)/../../../../vmlinux | \
-		awk 'END{print $$3}')
-LDFLAGS_vmlinux = --defsym _kernel_bss_size=$(KBSS_SZ)
-# Supply ZRELADDR to the decompressor via a linker symbol.
-ifneq ($(CONFIG_AUTO_ZRELADDR),y)
-LDFLAGS_vmlinux += --defsym zreladdr=$(ZRELADDR)
-endif
-ifeq ($(CONFIG_CPU_ENDIAN_BE8),y)
-LDFLAGS_vmlinux += --be8
-endif
-# ?
-LDFLAGS_vmlinux += -p
-# Report unresolved symbol references
-LDFLAGS_vmlinux += --no-undefined
-# Delete all temporary local symbols
-LDFLAGS_vmlinux += -X
-# Next argument is a linker script
-LDFLAGS_vmlinux += -T
-
-# For __aeabi_uidivmod
-lib1funcs = $(obj)/lib1funcs.o
-
-$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S
-	$(call cmd,shipped)
-
-# For __aeabi_llsl
-ashldi3 = $(obj)/ashldi3.o
-
-$(obj)/ashldi3.S: $(srctree)/arch/$(SRCARCH)/lib/ashldi3.S
-	$(call cmd,shipped)
-
-# We need to prevent any GOTOFF relocs being used with references
-# to symbols in the .bss section since we cannot relocate them
-# independently from the rest at run time.  This can be achieved by
-# ensuring that no private .bss symbols exist, as global symbols
-# always have a GOT entry which is what we need.
-# The .data section is already discarded by the linker script so no need
-# to bother about it here.
-check_for_bad_syms = \
-bad_syms=$$($(CROSS_COMPILE)nm $@ | sed -n 's/^.\{8\} [bc] \(.*\)/\1/p') && \
-[ -z "$$bad_syms" ] || \
-  ( echo "following symbols must have non local/private scope:" >&2; \
-    echo "$$bad_syms" >&2; rm -f $@; false )
-
-check_for_multiple_zreladdr = \
-if [ $(words $(ZRELADDR)) -gt 1 -a "$(CONFIG_AUTO_ZRELADDR)" = "" ]; then \
-	echo 'multiple zreladdrs: $(ZRELADDR)'; \
-	echo 'This needs CONFIG_AUTO_ZRELADDR to be set'; \
-	false; \
-fi
-
-$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
-		$(addprefix $(obj)/, $(OBJS)) $(lib1funcs) $(ashldi3) FORCE
-	@$(check_for_multiple_zreladdr)
-	$(call if_changed,ld)
-	@$(check_for_bad_syms)
-
-$(obj)/piggy.$(suffix_y): $(obj)/../Image FORCE
-	$(call if_changed,$(suffix_y))
-
-$(obj)/piggy.$(suffix_y).o:  $(obj)/piggy.$(suffix_y) FORCE
-
-CFLAGS_font.o := -Dstatic=
-
-$(obj)/font.c: $(FONTC)
-	$(call cmd,shipped)
-
-$(obj)/vmlinux.lds: $(obj)/vmlinux.lds.in arch/arm/boot/Makefile $(KCONFIG_CONFIG)
-	@sed "$(SEDFLAGS)" < $< > $@
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/atags_to_fdt.c b/ANDROID_3.4.5/arch/arm/boot/compressed/atags_to_fdt.c
deleted file mode 100644
index 797f04be..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/atags_to_fdt.c
+++ /dev/null
@@ -1,99 +0,0 @@
-#include <asm/setup.h>
-#include <libfdt.h>
-
-static int node_offset(void *fdt, const char *node_path)
-{
-	int offset = fdt_path_offset(fdt, node_path);
-	if (offset == -FDT_ERR_NOTFOUND)
-		offset = fdt_add_subnode(fdt, 0, node_path);
-	return offset;
-}
-
-static int setprop(void *fdt, const char *node_path, const char *property,
-		   uint32_t *val_array, int size)
-{
-	int offset = node_offset(fdt, node_path);
-	if (offset < 0)
-		return offset;
-	return fdt_setprop(fdt, offset, property, val_array, size);
-}
-
-static int setprop_string(void *fdt, const char *node_path,
-			  const char *property, const char *string)
-{
-	int offset = node_offset(fdt, node_path);
-	if (offset < 0)
-		return offset;
-	return fdt_setprop_string(fdt, offset, property, string);
-}
-
-static int setprop_cell(void *fdt, const char *node_path,
-			const char *property, uint32_t val)
-{
-	int offset = node_offset(fdt, node_path);
-	if (offset < 0)
-		return offset;
-	return fdt_setprop_cell(fdt, offset, property, val);
-}
-
-/*
- * Convert and fold provided ATAGs into the provided FDT.
- *
- * REturn values:
- *    = 0 -> pretend success
- *    = 1 -> bad ATAG (may retry with another possible ATAG pointer)
- *    < 0 -> error from libfdt
- */
-int atags_to_fdt(void *atag_list, void *fdt, int total_space)
-{
-	struct tag *atag = atag_list;
-	uint32_t mem_reg_property[2 * NR_BANKS];
-	int memcount = 0;
-	int ret;
-
-	/* make sure we've got an aligned pointer */
-	if ((u32)atag_list & 0x3)
-		return 1;
-
-	/* if we get a DTB here we're done already */
-	if (*(u32 *)atag_list == fdt32_to_cpu(FDT_MAGIC))
-	       return 0;
-
-	/* validate the ATAG */
-	if (atag->hdr.tag != ATAG_CORE ||
-	    (atag->hdr.size != tag_size(tag_core) &&
-	     atag->hdr.size != 2))
-		return 1;
-
-	/* let's give it all the room it could need */
-	ret = fdt_open_into(fdt, fdt, total_space);
-	if (ret < 0)
-		return ret;
-
-	for_each_tag(atag, atag_list) {
-		if (atag->hdr.tag == ATAG_CMDLINE) {
-			setprop_string(fdt, "/chosen", "bootargs",
-					atag->u.cmdline.cmdline);
-		} else if (atag->hdr.tag == ATAG_MEM) {
-			if (memcount >= sizeof(mem_reg_property)/4)
-				continue;
-			if (!atag->u.mem.size)
-				continue;
-			mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.start);
-			mem_reg_property[memcount++] = cpu_to_fdt32(atag->u.mem.size);
-		} else if (atag->hdr.tag == ATAG_INITRD2) {
-			uint32_t initrd_start, initrd_size;
-			initrd_start = atag->u.initrd.start;
-			initrd_size = atag->u.initrd.size;
-			setprop_cell(fdt, "/chosen", "linux,initrd-start",
-					initrd_start);
-			setprop_cell(fdt, "/chosen", "linux,initrd-end",
-					initrd_start + initrd_size);
-		}
-	}
-
-	if (memcount)
-		setprop(fdt, "/memory", "reg", mem_reg_property, 4*memcount);
-
-	return fdt_pack(fdt);
-}
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/big-endian.S b/ANDROID_3.4.5/arch/arm/boot/compressed/big-endian.S
deleted file mode 100644
index 25ab26f1..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/big-endian.S
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- *  linux/arch/arm/boot/compressed/big-endian.S
- *
- *  Switch CPU into big endian mode.
- *  Author: Nicolas Pitre
- */
-
-	.section ".start", #alloc, #execinstr
-
-	mrc	p15, 0, r0, c1, c0, 0	@ read control reg
-	orr	r0, r0, #(1 << 7)	@ enable big endian mode
-	mcr	p15, 0, r0, c1, c0, 0	@ write control reg
-
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/decompress.c b/ANDROID_3.4.5/arch/arm/boot/compressed/decompress.c
deleted file mode 100644
index f41b38ca..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/decompress.c
+++ /dev/null
@@ -1,56 +0,0 @@
-#define _LINUX_STRING_H_
-
-#include <linux/compiler.h>	/* for inline */
-#include <linux/types.h>	/* for size_t */
-#include <linux/stddef.h>	/* for NULL */
-#include <linux/linkage.h>
-#include <asm/string.h>
-
-extern unsigned long free_mem_ptr;
-extern unsigned long free_mem_end_ptr;
-extern void error(char *);
-
-#define STATIC static
-#define STATIC_RW_DATA	/* non-static please */
-
-#define ARCH_HAS_DECOMP_WDOG
-
-/* Diagnostic functions */
-#ifdef DEBUG
-#  define Assert(cond,msg) {if(!(cond)) error(msg);}
-#  define Trace(x) fprintf x
-#  define Tracev(x) {if (verbose) fprintf x ;}
-#  define Tracevv(x) {if (verbose>1) fprintf x ;}
-#  define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
-#  define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
-#else
-#  define Assert(cond,msg)
-#  define Trace(x)
-#  define Tracev(x)
-#  define Tracevv(x)
-#  define Tracec(c,x)
-#  define Tracecv(c,x)
-#endif
-
-#ifdef CONFIG_KERNEL_GZIP
-#include "../../../../lib/decompress_inflate.c"
-#endif
-
-#ifdef CONFIG_KERNEL_LZO
-#include "../../../../lib/decompress_unlzo.c"
-#endif
-
-#ifdef CONFIG_KERNEL_LZMA
-#include "../../../../lib/decompress_unlzma.c"
-#endif
-
-#ifdef CONFIG_KERNEL_XZ
-#define memmove memmove
-#define memcpy memcpy
-#include "../../../../lib/decompress_unxz.c"
-#endif
-
-int do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x))
-{
-	return decompress(input, len, NULL, NULL, output, NULL, error);
-}
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/head-sa1100.S b/ANDROID_3.4.5/arch/arm/boot/compressed/head-sa1100.S
deleted file mode 100644
index 6179d94d..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/head-sa1100.S
+++ /dev/null
@@ -1,47 +0,0 @@
-/* 
- * linux/arch/arm/boot/compressed/head-sa1100.S
- * 
- * Copyright (C) 1999 Nicolas Pitre <nico@fluxnic.net>
- * 
- * SA1100 specific tweaks.  This is merged into head.S by the linker.
- *
- */
-
-#include <linux/linkage.h>
-#include <asm/mach-types.h>
-
-		.section        ".start", "ax"
-
-__SA1100_start:
-
-		@ Preserve r8/r7 i.e. kernel entry values
-#ifdef CONFIG_SA1100_COLLIE
-		mov	r7, #MACH_TYPE_COLLIE
-#endif
-#ifdef CONFIG_SA1100_SIMPAD
-		@ UNTIL we've something like an open bootldr
-		mov	r7, #MACH_TYPE_SIMPAD	@should be 87
-#endif
-		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
-		ands	r0, r0, #0x0d
-		beq	99f
-
-		@ Data cache might be active.
-		@ Be sure to flush kernel binary out of the cache,
-		@ whatever state it is, before it is turned off.
-		@ This is done by fetching through currently executed
-		@ memory to be sure we hit the same cache.
-		bic	r2, pc, #0x1f
-		add	r3, r2, #0x4000		@ 16 kb is quite enough...
-1:		ldr	r0, [r2], #32
-		teq	r2, r3
-		bne	1b
-		mcr	p15, 0, r0, c7, c10, 4	@ drain WB
-		mcr	p15, 0, r0, c7, c7, 0	@ flush I & D caches
-
-		@ disabling MMU and caches
-		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
-		bic	r0, r0, #0x0d		@ clear WB, DC, MMU
-		bic	r0, r0, #0x1000		@ clear Icache
-		mcr	p15, 0, r0, c1, c0, 0
-99:
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/head-shark.S b/ANDROID_3.4.5/arch/arm/boot/compressed/head-shark.S
deleted file mode 100644
index 089c560e..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/head-shark.S
+++ /dev/null
@@ -1,139 +0,0 @@
-/* The head-file for the Shark
- * by Alexander Schulz
- *
- * Does the following:
- * - get the memory layout from firmware. This can only be done as long as the mmu
- *   is still on.
- * - switch the mmu off, so we have physical addresses
- * - copy the kernel to 0x08508000. This is done to have a fixed address where the
- *   C-parts (misc.c) are executed. This address must be known at compile-time,
- *   but the load-address of the kernel depends on how much memory is installed.
- * - Jump to this location.
- * - Set r8 with 0, r7 with the architecture ID for head.S
- */
-
-#include <linux/linkage.h>
-
-#include <asm/assembler.h>
-	
-		.section	".start", "ax"
-
-		b	__beginning
-	
-__ofw_data:	.long	0				@ the number of memory blocks
-		.space  128				@ (startaddr,size) ...
-		.space  128				@ bootargs
-		.align
-
-__beginning:	mov	r4, r0				@ save the entry to the firmware
-
-		mov	r0, #0xC0			@ disable irq and fiq
-		mov	r1, r0
-		mrs	r3, cpsr
-		bic	r2, r3, r0
-		eor	r2, r2, r1
-		msr	cpsr_c, r2
-
-		mov	r0, r4				@ get the Memory layout from firmware
-		adr	r1, __ofw_data
-		add	r2, r1, #4
-		mov	lr, pc
-		b	ofw_init
-		mov	r1, #0
-
-		adr	r2, __mmu_off			@ calculate physical address
-		sub	r2, r2, #0xf0000000		@ openprom maps us at f000 virt, 0e50 phys
-		adr	r0, __ofw_data
-		ldr	r0, [r0, #4]
-		add	r2, r2, r0
-		add	r2, r2, #0x00500000
-
-		mrc	p15, 0, r3, c1, c0
-		bic	r3, r3, #0xC			@ Write Buffer and DCache
-		bic	r3, r3, #0x1000			@ ICache
-		mcr	p15, 0, r3, c1, c0		@ disabled
-
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c7		@ flush I,D caches on v4
-		mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer on v4
-		mcr	p15, 0, r0, c8, c7		@ flush I,D TLBs on v4
-
-		bic	r3, r3, #0x1			@ MMU
-		mcr	p15, 0, r3, c1, c0		@ disabled
-
-		mov	pc, r2
-
-__copy_target:	.long	0x08507FFC
-__copy_end:	.long	0x08607FFC
-		
-		.word	_start
-		.word	__bss_start
-
-		.align
-__temp_stack:	.space 128
-
-__mmu_off:
-		adr	r0, __ofw_data			@ read the 1. entry of the memory map
-		ldr	r0, [r0, #4]
-		orr	r0, r0, #0x00600000
-		sub	r0, r0, #4
-	
-		ldr	r1, __copy_end
-		ldr	r3, __copy_target
-
-/* r0 = 0x0e600000 (current end of kernelcode)
- * r3 = 0x08508000 (where it should begin)
- * r1 = 0x08608000 (end of copying area, 1MB)
- * The kernel is compressed, so 1 MB should be enough.
- * copy the kernel to the beginning of physical memory
- * We start from the highest address, so we can copy
- * from 0x08500000 to 0x08508000 if we have only 8MB
- */
-
-/* As we get more 2.6-kernels it gets more and more
- * uncomfortable to be bound to kernel images of 1MB only.
- * So we add a loop here, to be able to copy some more.
- * Alexander Schulz 2005-07-17
- */
-
-		mov	r4, #3				@ How many megabytes to copy
-
-
-__MoveCode:	sub	r4, r4, #1
-	
-__Copy:		ldr	r2, [r0], #-4
-		str	r2, [r1], #-4
-		teq	r1, r3
-		bne	__Copy
-
-		/* The firmware maps us in blocks of 1 MB, the next block is
-		   _below_ the last one. So our decrementing source pointer
-		   ist right here, but the destination pointer must be increased
-		   by 2 MB */
-		add	r1, r1, #0x00200000
-		add	r3, r3, #0x00100000
-
-		teq	r4, #0
-		bne	__MoveCode
-
-
-		/* and jump to it */
-		adr	r2, __go_on			@ where we want to jump
-		adr	r0, __ofw_data			@ read the 1. entry of the memory map
-		ldr	r0, [r0, #4]
-		sub	r2, r2, r0			@ we are mapped add 0e50 now, sub that (-0e00)
-		sub	r2, r2, #0x00500000		@ -0050
-		ldr	r0, __copy_target		@ and add 0850 8000 instead
-		add	r0, r0, #4
-		add	r2, r2, r0
-		mov	pc, r2				@ and jump there
-
-__go_on:
-		adr	sp, __temp_stack
-		add	sp, sp, #128
-		adr	r0, __ofw_data
-		mov	lr, pc
-		b	create_params
-	
-		mov	r8, #0
-		mov	r7, #15
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/head-sharpsl.S b/ANDROID_3.4.5/arch/arm/boot/compressed/head-sharpsl.S
deleted file mode 100644
index eb0084ea..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/head-sharpsl.S
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-sharpsl.S
- *
- * Copyright (C) 2004-2005 Richard Purdie <rpurdie@rpsys.net>
- *
- * Sharp's bootloader doesn't pass any kind of machine ID
- * so we have to figure out the machine for ourselves...
- *
- * Support for Poodle, Corgi (SL-C700), Shepherd (SL-C750)
- * Husky (SL-C760), Tosa (SL-C6000), Spitz (SL-C3000),
- * Akita (SL-C1000) and Borzoi (SL-C3100).
- *
- */
-
-#include <linux/linkage.h>
-#include <asm/mach-types.h>
-
-#ifndef CONFIG_PXA_SHARPSL
-#error What am I doing here...
-#endif
-
-		.section        ".start", "ax"
-
-__SharpSL_start:
-
-/* Check for TC6393 - if found we have a Tosa */
-	ldr	r7, .TOSAID
-	mov	r1, #0x10000000		@ Base address of TC6393 chip
-	mov 	r6, #0x03
-	ldrh	r3, [r1, #8]		@ Load TC6393XB Revison: This is 0x0003
-	cmp	r6, r3
-	beq	.SHARPEND		@ Success -> tosa
-
-/* Check for pxa270 - if found, branch */
-	mrc p15, 0, r4, c0, c0		@ Get Processor ID
-	and	r4, r4, #0xffffff00
-	ldr	r3, .PXA270ID
-	cmp	r4, r3
-	beq	.PXA270
-
-/* Check for w100 - if not found we have a Poodle */
-	ldr	r1, .W100ADDR		@ Base address of w100 chip + regs offset
-
-	mov r6, #0x31			@ Load Magic Init value
-	str	r6, [r1, #0x280]	@ to SCRATCH_UMSK
-	mov r5, #0x3000
-.W100LOOP:
-	subs r5, r5, #1
-	bne .W100LOOP
-	mov r6, #0x30			@ Load 2nd Magic Init value
-	str	r6, [r1, #0x280]	@ to SCRATCH_UMSK
-
-	ldr	r6, [r1, #0]		@ Load Chip ID
-	ldr	r3, .W100ID
-	ldr	r7, .POODLEID
-	cmp	r6, r3
-	bne	.SHARPEND			@ We have no w100 - Poodle
-
-/* Check for pxa250 - if found we have a Corgi */
-	ldr	r7, .CORGIID
-	ldr	r3, .PXA255ID
-	cmp	r4, r3
-	blo	.SHARPEND			@ We have a PXA250 - Corgi
-
-/* Check for 64MiB flash - if found we have a Shepherd */
-	bl	get_flash_ids
-	ldr	r7, .SHEPHERDID
-	cmp	r3, #0x76			@ 64MiB flash
-	beq	.SHARPEND			@ We have Shepherd
-
-/* Must be a Husky */
-	ldr	r7, .HUSKYID		@ Must be Husky
-	b .SHARPEND
-
-.PXA270:
-/* Check for 16MiB flash - if found we have Spitz */
-	bl	get_flash_ids
-	ldr	r7, .SPITZID
-	cmp	r3, #0x73			@ 16MiB flash
-	beq	.SHARPEND			@ We have Spitz
-
-/* Check for a second SCOOP chip - if found we have Borzoi */
-	ldr	r1, .SCOOP2ADDR
-	ldr	r7, .BORZOIID
-	mov 	r6, #0x0140
-	strh	r6, [r1]
-	ldrh	r6, [r1]
-	cmp	r6, #0x0140
-	beq	.SHARPEND			@ We have Borzoi
-
-/* Must be Akita */
-	ldr	r7, .AKITAID
-	b	.SHARPEND			@ We have Borzoi
-
-.PXA255ID:
-	.word	0x69052d00		@ PXA255 Processor ID
-.PXA270ID:
-	.word	0x69054100		@ PXA270 Processor ID
-.W100ID:
-	.word	0x57411002		@ w100 Chip ID
-.W100ADDR:
-	.word 	0x08010000		@ w100 Chip ID Reg Address
-.SCOOP2ADDR:
-	.word	0x08800040
-.POODLEID:
-	.word	MACH_TYPE_POODLE
-.CORGIID:
-	.word	MACH_TYPE_CORGI
-.SHEPHERDID:
-	.word	MACH_TYPE_SHEPHERD
-.HUSKYID:
-	.word	MACH_TYPE_HUSKY
-.TOSAID:
-	.word	MACH_TYPE_TOSA
-.SPITZID:
-	.word	MACH_TYPE_SPITZ
-.AKITAID:
-	.word	MACH_TYPE_AKITA
-.BORZOIID:
-	.word	MACH_TYPE_BORZOI
-
-/*
- * Return: r2 - NAND Manufacturer ID
- *         r3 - NAND Chip ID
- * Corrupts: r1
- */
-get_flash_ids:
-	mov	r1, #0x0c000000		@ Base address of NAND chip
-	ldrb	r3, [r1, #24]		@ Load FLASHCTL
-	bic	r3, r3, #0x11		@ SET NCE
-	orr	r3, r3, #0x0a		@ SET CLR + FLWP
-	strb	r3, [r1, #24]		@ Save to FLASHCTL
-	mov 	r2, #0x90		@ Command "readid"
-	strb	r2, [r1, #20]		@ Save to FLASHIO
-	bic	r3, r3, #2		@ CLR CLE
-	orr	r3, r3, #4		@ SET ALE
-	strb	r3, [r1, #24]		@ Save to FLASHCTL
-	mov	r2, #0			@ Address 0x00
-	strb	r2, [r1, #20]		@ Save to FLASHIO
-	bic	r3, r3, #4		@ CLR ALE
-	strb	r3, [r1, #24]		@ Save to FLASHCTL
-.fids1:
-	ldrb	r3, [r1, #24]		@ Load FLASHCTL
-	tst	r3, #32			@ Is chip ready?
-	beq	.fids1
-	ldrb	r2, [r1, #20]		@ NAND Manufacturer ID
-	ldrb	r3, [r1, #20]		@ NAND Chip ID
-	mov	pc, lr
-
-.SHARPEND:
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/head-shmobile.S b/ANDROID_3.4.5/arch/arm/boot/compressed/head-shmobile.S
deleted file mode 100644
index fe3719b5..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/head-shmobile.S
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * The head-file for SH-Mobile ARM platforms
- *
- * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
- * Simon Horman <horms@verge.net.au>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- */
-
-#ifdef CONFIG_ZBOOT_ROM
-
-	.section	".start", "ax"
-
-	/* load board-specific initialization code */
-#include <mach/zboot.h>
-
-#if defined(CONFIG_ZBOOT_ROM_MMCIF) || defined(CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI)
-	/* Load image from MMC/SD */
-	adr	sp, __tmp_stack + 256
-	ldr	r0, __image_start
-	ldr	r1, __image_end
-	subs	r1, r1, r0
-	ldr	r0, __load_base
-	bl	mmc_loader
-
-	/* Jump to loaded code */
-	ldr	r0, __loaded
-	ldr	r1, __image_start
-	sub	r0, r0, r1
-	ldr	r1, __load_base
-	add	pc, r0, r1
-
-__image_start:
-	.long	_start
-__image_end:
-	.long	_got_end
-__load_base:
-	.long	CONFIG_MEMORY_START + 0x02000000 @ Load at 32Mb into SDRAM
-__loaded:
-	.long	__continue
-	.align
-__tmp_stack:
-	.space	256
-__continue:
-#endif /* CONFIG_ZBOOT_ROM_MMC || CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI */
-
-	b	1f
-__atags:@ tag #1
-	.long	12			@ tag->hdr.size = tag_size(tag_core);
-	.long	0x54410001		@ tag->hdr.tag = ATAG_CORE;
-	.long   0			@ tag->u.core.flags = 0;
-	.long	0			@ tag->u.core.pagesize = 0;
-	.long	0			@ tag->u.core.rootdev = 0;
-	@ tag #2
-	.long	8			@ tag->hdr.size = tag_size(tag_mem32);
-	.long	0x54410002		@ tag->hdr.tag = ATAG_MEM;
-	.long	CONFIG_MEMORY_SIZE	@ tag->u.mem.size = CONFIG_MEMORY_SIZE;
-	.long	CONFIG_MEMORY_START	@ @ tag->u.mem.start = CONFIG_MEMORY_START;
-	@ tag #3
-	.long	0			@ tag->hdr.size = 0
-	.long	0			@ tag->hdr.tag = ATAG_NONE;
-1:
-
-	/* Set board ID necessary for boot */
-	ldr	r7, 1f				@ Set machine type register
-	adr	r8, __atags			@ Set atag register
-	b	2f
-
-1 :	.long MACH_TYPE
-2 :
-
-#endif /* CONFIG_ZBOOT_ROM */
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/head-vt8500.S b/ANDROID_3.4.5/arch/arm/boot/compressed/head-vt8500.S
deleted file mode 100644
index 1dc1e21a..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/head-vt8500.S
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-vt8500.S
- *
- * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
- *
- * VIA VT8500 specific tweaks. This is merged into head.S by the linker.
- *
- */
-
-#include <linux/linkage.h>
-#include <asm/mach-types.h>
-
-		.section        ".start", "ax"
-
-__VT8500_start:
-	@ Compare the SCC ID register against a list of known values
-	ldr	r1, .SCCID
-	ldr	r3, [r1]
-
-	@ VT8500 override
-	ldr	r4, .VT8500SCC
-	cmp	r3, r4
-	ldreq	r7, .ID_BV07
-	beq	.Lendvt8500
-
-	@ WM8505 override
-	ldr	r4, .WM8505SCC
-	cmp	r3, r4
-	ldreq	r7, .ID_8505
-	beq	.Lendvt8500
-
-	@ Otherwise, leave the bootloader's machine id untouched
-
-.SCCID:
-	.word	0xd8120000
-.VT8500SCC:
-	.word	0x34000102
-.WM8505SCC:
-	.word	0x34260103
-
-.ID_BV07:
-	.word	MACH_TYPE_BV07
-.ID_8505:
-	.word	MACH_TYPE_WM8505_7IN_NETBOOK
-
-.Lendvt8500:
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/head-wmt.S b/ANDROID_3.4.5/arch/arm/boot/compressed/head-wmt.S
deleted file mode 100755
index 934b8437..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/head-wmt.S
+++ /dev/null
@@ -1,52 +0,0 @@
-/**
- *	linux/arch/arm/boot/compressed/head-wmt.S
- *
- *	WonderMedia SoC specific tweaks. This is merged into head.S by the linker.
- *
- *	Copyright (c) 2008 WonderMedia Technologies, Inc.
- *
- *	This program is free software: you can redistribute it and/or modify it under the
- *	terms of the GNU General Public License as published by the Free Software Foundation,
- *	either version 2 of the License, or (at your option) any later version.
- *
- *	This program is distributed in the hope that it will be useful, but WITHOUT
- *	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
- *	PARTICULAR PURPOSE.  See the GNU General Public License for more details.
- *	You should have received a copy of the GNU General Public License along with
- *	this program.  If not, see <http://www.gnu.org/licenses/>.
- *
- *	WonderMedia Technologies, Inc.
- *	10F, 529, Chung-Cheng Road, Hsin-Tien, Taipei 231, R.O.C.
- */
-
-#include <linux/linkage.h>
-#include <asm/mach-types.h>
-
-	.section        ".start", "ax"
-
-__wmt_start:
-
-	@ Preserve r8/r7 i.e. kernel entry values
-	@ Data cache might be active.
-	@ Be sure to flush kernel binary out of the cache,
-	@ whatever state it is, before it is turned off.
-	@ This is done by fetching through currently executed
-	@ memory to be sure we hit the same cache.
-	bic	r2, pc, #0x1f
-	add	r3, r2, #0x4000			@ 16 kb is quite enough...
-1:	ldr	r0, [r2], #32
-	teq	r2, r3
-	bne	1b
-	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
-	mcr     p15, 0, r0, c7, c5, 0   @ invalidate icache
-	mcr     p15, 0, r0, c7, c5, 6   @ invalidate BP array
-	mcr     p15, 0, r0, c7, c10, 4  @ DSB
-	mcr     p15, 0, r0, c7, c5, 4   @ ISB
-
-
-
-	@ disabling MMU and caches
-	mrc	p15, 0, r0, c1, c0, 0		@ read control reg
-	bic	r0, r0, #0x0d			@ clear WB, DC, MMU
-	bic	r0, r0, #0x1000			@ clear Icache
-	mcr	p15, 0, r0, c1, c0, 0		@ write to CP15 cache and TLB control register 1
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/head-xscale.S b/ANDROID_3.4.5/arch/arm/boot/compressed/head-xscale.S
deleted file mode 100644
index aa5ee49c..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/head-xscale.S
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-xscale.S
- *
- * XScale specific tweaks.  This is merged into head.S by the linker.
- *
- */
-
-#include <linux/linkage.h>
-
-		.section        ".start", "ax"
-
-__XScale_start:
-
-		@ Preserve r8/r7 i.e. kernel entry values
-
-		@ Data cache might be active.
-		@ Be sure to flush kernel binary out of the cache,
-		@ whatever state it is, before it is turned off.
-		@ This is done by fetching through currently executed
-		@ memory to be sure we hit the same cache.
-		bic	r2, pc, #0x1f
-		add	r3, r2, #0x10000	@ 64 kb is quite enough...
-1:		ldr	r0, [r2], #32
-		teq	r2, r3
-		bne	1b
-		mcr	p15, 0, r0, c7, c10, 4	@ drain WB
-		mcr	p15, 0, r0, c7, c7, 0	@ flush I & D caches
-
-		@ disabling MMU and caches
-		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
-		bic	r0, r0, #0x05		@ clear DC, MMU
-		bic	r0, r0, #0x1000		@ clear Icache
-		mcr	p15, 0, r0, c1, c0, 0
-
-#ifdef CONFIG_ARCH_IXP2000
-		mov	r1, #-1
-		mov	r0, #0xd6000000
-		str	r1, [r0, #0x14]
-		str	r1, [r0, #0x18]
-#endif
-
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/head.S b/ANDROID_3.4.5/arch/arm/boot/compressed/head.S
deleted file mode 100644
index ace2dee2..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/head.S
+++ /dev/null
@@ -1,1231 +0,0 @@
-/*
- *  linux/arch/arm/boot/compressed/head.S
- *
- *  Copyright (C) 1996-2002 Russell King
- *  Copyright (C) 2004 Hyok S. Choi (MPU support)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-
-/*
- * Debugging stuff
- *
- * Note that these macros must not contain any code which is not
- * 100% relocatable.  Any attempt to do so will result in a crash.
- * Please select one of the following when turning on debugging.
- */
-#ifdef DEBUG
-
-#if defined(CONFIG_DEBUG_ICEDCC)
-
-#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
-		.macro	loadsp, rb, tmp
-		.endm
-		.macro	writeb, ch, rb
-		mcr	p14, 0, \ch, c0, c5, 0
-		.endm
-#elif defined(CONFIG_CPU_XSCALE)
-		.macro	loadsp, rb, tmp
-		.endm
-		.macro	writeb, ch, rb
-		mcr	p14, 0, \ch, c8, c0, 0
-		.endm
-#else
-		.macro	loadsp, rb, tmp
-		.endm
-		.macro	writeb, ch, rb
-		mcr	p14, 0, \ch, c1, c0, 0
-		.endm
-#endif
-
-#else
-
-#include <mach/debug-macro.S>
-
-		.macro	writeb,	ch, rb
-		senduart \ch, \rb
-		.endm
-
-#if defined(CONFIG_ARCH_SA1100)
-		.macro	loadsp, rb, tmp
-		mov	\rb, #0x80000000	@ physical base address
-#ifdef CONFIG_DEBUG_LL_SER3
-		add	\rb, \rb, #0x00050000	@ Ser3
-#else
-		add	\rb, \rb, #0x00010000	@ Ser1
-#endif
-		.endm
-#elif defined(CONFIG_ARCH_S3C24XX)
-		.macro loadsp, rb, tmp
-		mov	\rb, #0x50000000
-		add	\rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT
-		.endm
-#else
-		.macro	loadsp,	rb, tmp
-		addruart \rb, \tmp
-		.endm
-#endif
-#endif
-#endif
-
-		.macro	kputc,val
-		mov	r0, \val
-		bl	putc
-		.endm
-
-		.macro	kphex,val,len
-		mov	r0, \val
-		mov	r1, #\len
-		bl	phex
-		.endm
-
-		.macro	debug_reloc_start
-#ifdef DEBUG
-		kputc	#'\n'
-		kphex	r6, 8		/* processor id */
-		kputc	#':'
-		kphex	r7, 8		/* architecture id */
-#ifdef CONFIG_CPU_CP15
-		kputc	#':'
-		mrc	p15, 0, r0, c1, c0
-		kphex	r0, 8		/* control reg */
-#endif
-		kputc	#'\n'
-		kphex	r5, 8		/* decompressed kernel start */
-		kputc	#'-'
-		kphex	r9, 8		/* decompressed kernel end  */
-		kputc	#'>'
-		kphex	r4, 8		/* kernel execution address */
-		kputc	#'\n'
-#endif
-		.endm
-
-		.macro	debug_reloc_end
-#ifdef DEBUG
-		kphex	r5, 8		/* end of kernel */
-		kputc	#'\n'
-		mov	r0, r4
-		bl	memdump		/* dump 256 bytes at start of kernel */
-#endif
-		.endm
-
-		.section ".start", #alloc, #execinstr
-/*
- * sort out different calling conventions
- */
-		.align
-		.arm				@ Always enter in ARM state
-start:
-		.type	start,#function
-		.rept	7
-		mov	r0, r0
-		.endr
-   ARM(		mov	r0, r0		)
-   ARM(		b	1f		)
- THUMB(		adr	r12, BSYM(1f)	)
- THUMB(		bx	r12		)
-
-		.word	0x016f2818		@ Magic numbers to help the loader
-		.word	start			@ absolute load/run zImage address
-		.word	_edata			@ zImage end address
- THUMB(		.thumb			)
-1:		mov	r7, r1			@ save architecture ID
-		mov	r8, r2			@ save atags pointer
-
-#ifndef __ARM_ARCH_2__
-		/*
-		 * Booting from Angel - need to enter SVC mode and disable
-		 * FIQs/IRQs (numeric definitions from angel arm.h source).
-		 * We only do this if we were in user mode on entry.
-		 */
-		mrs	r2, cpsr		@ get current mode
-		tst	r2, #3			@ not user?
-		bne	not_angel
-		mov	r0, #0x17		@ angel_SWIreason_EnterSVC
- ARM(		swi	0x123456	)	@ angel_SWI_ARM
- THUMB(		svc	0xab		)	@ angel_SWI_THUMB
-not_angel:
-		mrs	r2, cpsr		@ turn off interrupts to
-		orr	r2, r2, #0xc0		@ prevent angel from running
-		msr	cpsr_c, r2
-#else
-		teqp	pc, #0x0c000003		@ turn off interrupts
-#endif
-
-		/*
-		 * Note that some cache flushing and other stuff may
-		 * be needed here - is there an Angel SWI call for this?
-		 */
-
-		/*
-		 * some architecture specific code can be inserted
-		 * by the linker here, but it should preserve r7, r8, and r9.
-		 */
-
-		.text
-
-#ifdef CONFIG_AUTO_ZRELADDR
-		@ determine final kernel image address
-		mov	r4, pc
-		and	r4, r4, #0xf8000000
-		add	r4, r4, #TEXT_OFFSET
-#else
-		ldr	r4, =zreladdr
-#endif
-
-		bl	cache_on
-
-restart:	adr	r0, LC0
-		ldmia	r0, {r1, r2, r3, r6, r10, r11, r12}
-		ldr	sp, [r0, #28]
-
-		/*
-		 * We might be running at a different address.  We need
-		 * to fix up various pointers.
-		 */
-		sub	r0, r0, r1		@ calculate the delta offset
-		add	r6, r6, r0		@ _edata
-		add	r10, r10, r0		@ inflated kernel size location
-
-		/*
-		 * The kernel build system appends the size of the
-		 * decompressed kernel at the end of the compressed data
-		 * in little-endian form.
-		 */
-		ldrb	r9, [r10, #0]
-		ldrb	lr, [r10, #1]
-		orr	r9, r9, lr, lsl #8
-		ldrb	lr, [r10, #2]
-		ldrb	r10, [r10, #3]
-		orr	r9, r9, lr, lsl #16
-		orr	r9, r9, r10, lsl #24
-
-#ifndef CONFIG_ZBOOT_ROM
-		/* malloc space is above the relocated stack (64k max) */
-		add	sp, sp, r0
-		add	r10, sp, #0x10000
-#else
-		/*
-		 * With ZBOOT_ROM the bss/stack is non relocatable,
-		 * but someone could still run this code from RAM,
-		 * in which case our reference is _edata.
-		 */
-		mov	r10, r6
-#endif
-
-		mov	r5, #0			@ init dtb size to 0
-#ifdef CONFIG_ARM_APPENDED_DTB
-/*
- *   r0  = delta
- *   r2  = BSS start
- *   r3  = BSS end
- *   r4  = final kernel address
- *   r5  = appended dtb size (still unknown)
- *   r6  = _edata
- *   r7  = architecture ID
- *   r8  = atags/device tree pointer
- *   r9  = size of decompressed image
- *   r10 = end of this image, including  bss/stack/malloc space if non XIP
- *   r11 = GOT start
- *   r12 = GOT end
- *   sp  = stack pointer
- *
- * if there are device trees (dtb) appended to zImage, advance r10 so that the
- * dtb data will get relocated along with the kernel if necessary.
- */
-
-		ldr	lr, [r6, #0]
-#ifndef __ARMEB__
-		ldr	r1, =0xedfe0dd0		@ sig is 0xd00dfeed big endian
-#else
-		ldr	r1, =0xd00dfeed
-#endif
-		cmp	lr, r1
-		bne	dtb_check_done		@ not found
-
-#ifdef CONFIG_ARM_ATAG_DTB_COMPAT
-		/*
-		 * OK... Let's do some funky business here.
-		 * If we do have a DTB appended to zImage, and we do have
-		 * an ATAG list around, we want the later to be translated
-		 * and folded into the former here.  To be on the safe side,
-		 * let's temporarily move  the stack away into the malloc
-		 * area.  No GOT fixup has occurred yet, but none of the
-		 * code we're about to call uses any global variable.
-		*/
-		add	sp, sp, #0x10000
-		stmfd	sp!, {r0-r3, ip, lr}
-		mov	r0, r8
-		mov	r1, r6
-		sub	r2, sp, r6
-		bl	atags_to_fdt
-
-		/*
-		 * If returned value is 1, there is no ATAG at the location
-		 * pointed by r8.  Try the typical 0x100 offset from start
-		 * of RAM and hope for the best.
-		 */
-		cmp	r0, #1
-		sub	r0, r4, #TEXT_OFFSET
-		add	r0, r0, #0x100
-		mov	r1, r6
-		sub	r2, sp, r6
-		bleq	atags_to_fdt
-
-		ldmfd	sp!, {r0-r3, ip, lr}
-		sub	sp, sp, #0x10000
-#endif
-
-		mov	r8, r6			@ use the appended device tree
-
-		/*
-		 * Make sure that the DTB doesn't end up in the final
-		 * kernel's .bss area. To do so, we adjust the decompressed
-		 * kernel size to compensate if that .bss size is larger
-		 * than the relocated code.
-		 */
-		ldr	r5, =_kernel_bss_size
-		adr	r1, wont_overwrite
-		sub	r1, r6, r1
-		subs	r1, r5, r1
-		addhi	r9, r9, r1
-
-		/* Get the dtb's size */
-		ldr	r5, [r6, #4]
-#ifndef __ARMEB__
-		/* convert r5 (dtb size) to little endian */
-		eor	r1, r5, r5, ror #16
-		bic	r1, r1, #0x00ff0000
-		mov	r5, r5, ror #8
-		eor	r5, r5, r1, lsr #8
-#endif
-
-		/* preserve 64-bit alignment */
-		add	r5, r5, #7
-		bic	r5, r5, #7
-
-		/* relocate some pointers past the appended dtb */
-		add	r6, r6, r5
-		add	r10, r10, r5
-		add	sp, sp, r5
-dtb_check_done:
-#endif
-
-/*
- * Check to see if we will overwrite ourselves.
- *   r4  = final kernel address
- *   r9  = size of decompressed image
- *   r10 = end of this image, including  bss/stack/malloc space if non XIP
- * We basically want:
- *   r4 - 16k page directory >= r10 -> OK
- *   r4 + image length <= address of wont_overwrite -> OK
- */
-		add	r10, r10, #16384
-		cmp	r4, r10
-		bhs	wont_overwrite
-		add	r10, r4, r9
-		adr	r9, wont_overwrite
-		cmp	r10, r9
-		bls	wont_overwrite
-
-/*
- * Relocate ourselves past the end of the decompressed kernel.
- *   r6  = _edata
- *   r10 = end of the decompressed kernel
- * Because we always copy ahead, we need to do it from the end and go
- * backward in case the source and destination overlap.
- */
-		/*
-		 * Bump to the next 256-byte boundary with the size of
-		 * the relocation code added. This avoids overwriting
-		 * ourself when the offset is small.
-		 */
-		add	r10, r10, #((reloc_code_end - restart + 256) & ~255)
-		bic	r10, r10, #255
-
-		/* Get start of code we want to copy and align it down. */
-		adr	r5, restart
-		bic	r5, r5, #31
-
-		sub	r9, r6, r5		@ size to copy
-		add	r9, r9, #31		@ rounded up to a multiple
-		bic	r9, r9, #31		@ ... of 32 bytes
-		add	r6, r9, r5
-		add	r9, r9, r10
-
-1:		ldmdb	r6!, {r0 - r3, r10 - r12, lr}
-		cmp	r6, r5
-		stmdb	r9!, {r0 - r3, r10 - r12, lr}
-		bhi	1b
-
-		/* Preserve offset to relocated code. */
-		sub	r6, r9, r6
-
-#ifndef CONFIG_ZBOOT_ROM
-		/* cache_clean_flush may use the stack, so relocate it */
-		add	sp, sp, r6
-#endif
-
-		bl	cache_clean_flush
-
-		adr	r0, BSYM(restart)
-		add	r0, r0, r6
-		mov	pc, r0
-
-wont_overwrite:
-/*
- * If delta is zero, we are running at the address we were linked at.
- *   r0  = delta
- *   r2  = BSS start
- *   r3  = BSS end
- *   r4  = kernel execution address
- *   r5  = appended dtb size (0 if not present)
- *   r7  = architecture ID
- *   r8  = atags pointer
- *   r11 = GOT start
- *   r12 = GOT end
- *   sp  = stack pointer
- */
-		orrs	r1, r0, r5
-		beq	not_relocated
-
-		add	r11, r11, r0
-		add	r12, r12, r0
-
-#ifndef CONFIG_ZBOOT_ROM
-		/*
-		 * If we're running fully PIC === CONFIG_ZBOOT_ROM = n,
-		 * we need to fix up pointers into the BSS region.
-		 * Note that the stack pointer has already been fixed up.
-		 */
-		add	r2, r2, r0
-		add	r3, r3, r0
-
-		/*
-		 * Relocate all entries in the GOT table.
-		 * Bump bss entries to _edata + dtb size
-		 */
-1:		ldr	r1, [r11, #0]		@ relocate entries in the GOT
-		add	r1, r1, r0		@ This fixes up C references
-		cmp	r1, r2			@ if entry >= bss_start &&
-		cmphs	r3, r1			@       bss_end > entry
-		addhi	r1, r1, r5		@    entry += dtb size
-		str	r1, [r11], #4		@ next entry
-		cmp	r11, r12
-		blo	1b
-
-		/* bump our bss pointers too */
-		add	r2, r2, r5
-		add	r3, r3, r5
-
-#else
-
-		/*
-		 * Relocate entries in the GOT table.  We only relocate
-		 * the entries that are outside the (relocated) BSS region.
-		 */
-1:		ldr	r1, [r11, #0]		@ relocate entries in the GOT
-		cmp	r1, r2			@ entry < bss_start ||
-		cmphs	r3, r1			@ _end < entry
-		addlo	r1, r1, r0		@ table.  This fixes up the
-		str	r1, [r11], #4		@ C references.
-		cmp	r11, r12
-		blo	1b
-#endif
-
-not_relocated:	mov	r0, #0
-1:		str	r0, [r2], #4		@ clear bss
-		str	r0, [r2], #4
-		str	r0, [r2], #4
-		str	r0, [r2], #4
-		cmp	r2, r3
-		blo	1b
-
-/*
- * The C runtime environment should now be setup sufficiently.
- * Set up some pointers, and start decompressing.
- *   r4  = kernel execution address
- *   r7  = architecture ID
- *   r8  = atags pointer
- */
-		mov	r0, r4
-		mov	r1, sp			@ malloc space above stack
-		add	r2, sp, #0x10000	@ 64k max
-		mov	r3, r7
-		bl	decompress_kernel
-		bl	cache_clean_flush
-		bl	cache_off
-		mov	r0, #0			@ must be zero
-		mov	r1, r7			@ restore architecture number
-		mov	r2, r8			@ restore atags pointer
- ARM(		mov	pc, r4	)		@ call kernel
- THUMB(		bx	r4	)		@ entry point is always ARM
-
-		.align	2
-		.type	LC0, #object
-LC0:		.word	LC0			@ r1
-		.word	__bss_start		@ r2
-		.word	_end			@ r3
-		.word	_edata			@ r6
-		.word	input_data_end - 4	@ r10 (inflated size location)
-		.word	_got_start		@ r11
-		.word	_got_end		@ ip
-		.word	.L_user_stack_end	@ sp
-		.size	LC0, . - LC0
-
-#ifdef CONFIG_ARCH_RPC
-		.globl	params
-params:		ldr	r0, =0x10000100		@ params_phys for RPC
-		mov	pc, lr
-		.ltorg
-		.align
-#endif
-
-/*
- * Turn on the cache.  We need to setup some page tables so that we
- * can have both the I and D caches on.
- *
- * We place the page tables 16k down from the kernel execution address,
- * and we hope that nothing else is using it.  If we're using it, we
- * will go pop!
- *
- * On entry,
- *  r4 = kernel execution address
- *  r7 = architecture number
- *  r8 = atags pointer
- * On exit,
- *  r0, r1, r2, r3, r9, r10, r12 corrupted
- * This routine must preserve:
- *  r4, r7, r8
- */
-		.align	5
-cache_on:	mov	r3, #8			@ cache_on function
-		b	call_cache_fn
-
-/*
- * Initialize the highest priority protection region, PR7
- * to cover all 32bit address and cacheable and bufferable.
- */
-__armv4_mpu_cache_on:
-		mov	r0, #0x3f		@ 4G, the whole
-		mcr	p15, 0, r0, c6, c7, 0	@ PR7 Area Setting
-		mcr 	p15, 0, r0, c6, c7, 1
-
-		mov	r0, #0x80		@ PR7
-		mcr	p15, 0, r0, c2, c0, 0	@ D-cache on
-		mcr	p15, 0, r0, c2, c0, 1	@ I-cache on
-		mcr	p15, 0, r0, c3, c0, 0	@ write-buffer on
-
-		mov	r0, #0xc000
-		mcr	p15, 0, r0, c5, c0, 1	@ I-access permission
-		mcr	p15, 0, r0, c5, c0, 0	@ D-access permission
-
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
-		mcr	p15, 0, r0, c7, c5, 0	@ flush(inval) I-Cache
-		mcr	p15, 0, r0, c7, c6, 0	@ flush(inval) D-Cache
-		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
-						@ ...I .... ..D. WC.M
-		orr	r0, r0, #0x002d		@ .... .... ..1. 11.1
-		orr	r0, r0, #0x1000		@ ...1 .... .... ....
-
-		mcr	p15, 0, r0, c1, c0, 0	@ write control reg
-
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c5, 0	@ flush(inval) I-Cache
-		mcr	p15, 0, r0, c7, c6, 0	@ flush(inval) D-Cache
-		mov	pc, lr
-
-__armv3_mpu_cache_on:
-		mov	r0, #0x3f		@ 4G, the whole
-		mcr	p15, 0, r0, c6, c7, 0	@ PR7 Area Setting
-
-		mov	r0, #0x80		@ PR7
-		mcr	p15, 0, r0, c2, c0, 0	@ cache on
-		mcr	p15, 0, r0, c3, c0, 0	@ write-buffer on
-
-		mov	r0, #0xc000
-		mcr	p15, 0, r0, c5, c0, 0	@ access permission
-
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
-		/*
-		 * ?? ARMv3 MMU does not allow reading the control register,
-		 * does this really work on ARMv3 MPU?
-		 */
-		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
-						@ .... .... .... WC.M
-		orr	r0, r0, #0x000d		@ .... .... .... 11.1
-		/* ?? this overwrites the value constructed above? */
-		mov	r0, #0
-		mcr	p15, 0, r0, c1, c0, 0	@ write control reg
-
-		/* ?? invalidate for the second time? */
-		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
-		mov	pc, lr
-
-__setup_mmu:	sub	r3, r4, #16384		@ Page directory size
-		bic	r3, r3, #0xff		@ Align the pointer
-		bic	r3, r3, #0x3f00
-/*
- * Initialise the page tables, turning on the cacheable and bufferable
- * bits for the RAM area only.
- */
-		mov	r0, r3
-		mov	r9, r0, lsr #18
-		mov	r9, r9, lsl #18		@ start of RAM
-		add	r10, r9, #0x10000000	@ a reasonable RAM size
-		mov	r1, #0x12
-		orr	r1, r1, #3 << 10
-		add	r2, r3, #16384
-1:		cmp	r1, r9			@ if virt > start of RAM
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-		orrhs	r1, r1, #0x08		@ set cacheable
-#else
-		orrhs	r1, r1, #0x0c		@ set cacheable, bufferable
-#endif
-		cmp	r1, r10			@ if virt > end of RAM
-		bichs	r1, r1, #0x0c		@ clear cacheable, bufferable
-		str	r1, [r0], #4		@ 1:1 mapping
-		add	r1, r1, #1048576
-		teq	r0, r2
-		bne	1b
-/*
- * If ever we are running from Flash, then we surely want the cache
- * to be enabled also for our execution instance...  We map 2MB of it
- * so there is no map overlap problem for up to 1 MB compressed kernel.
- * If the execution is in RAM then we would only be duplicating the above.
- */
-		mov	r1, #0x1e
-		orr	r1, r1, #3 << 10
-		mov	r2, pc
-		mov	r2, r2, lsr #20
-		orr	r1, r1, r2, lsl #20
-		add	r0, r3, r2, lsl #2
-		str	r1, [r0], #4
-		add	r1, r1, #1048576
-		str	r1, [r0]
-		mov	pc, lr
-ENDPROC(__setup_mmu)
-
-__arm926ejs_mmu_cache_on:
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-		mov	r0, #4			@ put dcache in WT mode
-		mcr	p15, 7, r0, c15, c0, 0
-#endif
-
-__armv4_mmu_cache_on:
-		mov	r12, lr
-#ifdef CONFIG_MMU
-		bl	__setup_mmu
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
-		mcr	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
-		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
-		orr	r0, r0, #0x5000		@ I-cache enable, RR cache replacement
-		orr	r0, r0, #0x0030
-#ifdef CONFIG_CPU_ENDIAN_BE8
-		orr	r0, r0, #1 << 25	@ big-endian page tables
-#endif
-		bl	__common_mmu_cache_on
-		mov	r0, #0
-		mcr	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
-#endif
-		mov	pc, r12
-
-__armv7_mmu_cache_on:
-		mov	r12, lr
-#ifdef CONFIG_MMU
-		mrc	p15, 0, r11, c0, c1, 4	@ read ID_MMFR0
-		tst	r11, #0xf		@ VMSA
-		blne	__setup_mmu
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
-		tst	r11, #0xf		@ VMSA
-		mcrne	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
-#endif
-		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
-		orr	r0, r0, #0x5000		@ I-cache enable, RR cache replacement
-		orr	r0, r0, #0x003c		@ write buffer
-#ifdef CONFIG_MMU
-#ifdef CONFIG_CPU_ENDIAN_BE8
-		orr	r0, r0, #1 << 25	@ big-endian page tables
-#endif
-		orrne	r0, r0, #1		@ MMU enabled
-		movne	r1, #-1
-		mcrne	p15, 0, r3, c2, c0, 0	@ load page table pointer
-		mcrne	p15, 0, r1, c3, c0, 0	@ load domain access control
-#endif
-		mcr	p15, 0, r0, c7, c5, 4	@ ISB
-		mcr	p15, 0, r0, c1, c0, 0	@ load control register
-		mrc	p15, 0, r0, c1, c0, 0	@ and read it back
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c5, 4	@ ISB
-		mov	pc, r12
-
-__fa526_cache_on:
-		mov	r12, lr
-		bl	__setup_mmu
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c7, 0	@ Invalidate whole cache
-		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
-		mcr	p15, 0, r0, c8, c7, 0	@ flush UTLB
-		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
-		orr	r0, r0, #0x1000		@ I-cache enable
-		bl	__common_mmu_cache_on
-		mov	r0, #0
-		mcr	p15, 0, r0, c8, c7, 0	@ flush UTLB
-		mov	pc, r12
-
-__arm6_mmu_cache_on:
-		mov	r12, lr
-		bl	__setup_mmu
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
-		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3
-		mov	r0, #0x30
-		bl	__common_mmu_cache_on
-		mov	r0, #0
-		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3
-		mov	pc, r12
-
-__common_mmu_cache_on:
-#ifndef CONFIG_THUMB2_KERNEL
-#ifndef DEBUG
-		orr	r0, r0, #0x000d		@ Write buffer, mmu
-#endif
-		mov	r1, #-1
-		mcr	p15, 0, r3, c2, c0, 0	@ load page table pointer
-		mcr	p15, 0, r1, c3, c0, 0	@ load domain access control
-		b	1f
-		.align	5			@ cache line aligned
-1:		mcr	p15, 0, r0, c1, c0, 0	@ load control register
-		mrc	p15, 0, r0, c1, c0, 0	@ and read it back to
-		sub	pc, lr, r0, lsr #32	@ properly flush pipeline
-#endif
-
-#define PROC_ENTRY_SIZE (4*5)
-
-/*
- * Here follow the relocatable cache support functions for the
- * various processors.  This is a generic hook for locating an
- * entry and jumping to an instruction at the specified offset
- * from the start of the block.  Please note this is all position
- * independent code.
- *
- *  r1  = corrupted
- *  r2  = corrupted
- *  r3  = block offset
- *  r9  = corrupted
- *  r12 = corrupted
- */
-
-call_cache_fn:	adr	r12, proc_types
-#ifdef CONFIG_CPU_CP15
-		mrc	p15, 0, r9, c0, c0	@ get processor ID
-#else
-		ldr	r9, =CONFIG_PROCESSOR_ID
-#endif
-1:		ldr	r1, [r12, #0]		@ get value
-		ldr	r2, [r12, #4]		@ get mask
-		eor	r1, r1, r9		@ (real ^ match)
-		tst	r1, r2			@       & mask
- ARM(		addeq	pc, r12, r3		) @ call cache function
- THUMB(		addeq	r12, r3			)
- THUMB(		moveq	pc, r12			) @ call cache function
-		add	r12, r12, #PROC_ENTRY_SIZE
-		b	1b
-
-/*
- * Table for cache operations.  This is basically:
- *   - CPU ID match
- *   - CPU ID mask
- *   - 'cache on' method instruction
- *   - 'cache off' method instruction
- *   - 'cache flush' method instruction
- *
- * We match an entry using: ((real_id ^ match) & mask) == 0
- *
- * Writethrough caches generally only need 'on' and 'off'
- * methods.  Writeback caches _must_ have the flush method
- * defined.
- */
-		.align	2
-		.type	proc_types,#object
-proc_types:
-		.word	0x41560600		@ ARM6/610
-		.word	0xffffffe0
-		W(b)	__arm6_mmu_cache_off	@ works, but slow
-		W(b)	__arm6_mmu_cache_off
-		mov	pc, lr
- THUMB(		nop				)
-@		b	__arm6_mmu_cache_on		@ untested
-@		b	__arm6_mmu_cache_off
-@		b	__armv3_mmu_cache_flush
-
-#if !defined(CONFIG_CPU_V7)
-		/* This collides with some V7 IDs, preventing correct detection */
-		.word	0x00000000		@ old ARM ID
-		.word	0x0000f000
-		mov	pc, lr
- THUMB(		nop				)
-		mov	pc, lr
- THUMB(		nop				)
-		mov	pc, lr
- THUMB(		nop				)
-#endif
-
-		.word	0x41007000		@ ARM7/710
-		.word	0xfff8fe00
-		W(b)	__arm7_mmu_cache_off
-		W(b)	__arm7_mmu_cache_off
-		mov	pc, lr
- THUMB(		nop				)
-
-		.word	0x41807200		@ ARM720T (writethrough)
-		.word	0xffffff00
-		W(b)	__armv4_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		mov	pc, lr
- THUMB(		nop				)
-
-		.word	0x41007400		@ ARM74x
-		.word	0xff00ff00
-		W(b)	__armv3_mpu_cache_on
-		W(b)	__armv3_mpu_cache_off
-		W(b)	__armv3_mpu_cache_flush
-		
-		.word	0x41009400		@ ARM94x
-		.word	0xff00ff00
-		W(b)	__armv4_mpu_cache_on
-		W(b)	__armv4_mpu_cache_off
-		W(b)	__armv4_mpu_cache_flush
-
-		.word	0x41069260		@ ARM926EJ-S (v5TEJ)
-		.word	0xff0ffff0
-		W(b)	__arm926ejs_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__armv5tej_mmu_cache_flush
-
-		.word	0x00007000		@ ARM7 IDs
-		.word	0x0000f000
-		mov	pc, lr
- THUMB(		nop				)
-		mov	pc, lr
- THUMB(		nop				)
-		mov	pc, lr
- THUMB(		nop				)
-
-		@ Everything from here on will be the new ID system.
-
-		.word	0x4401a100		@ sa110 / sa1100
-		.word	0xffffffe0
-		W(b)	__armv4_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__armv4_mmu_cache_flush
-
-		.word	0x6901b110		@ sa1110
-		.word	0xfffffff0
-		W(b)	__armv4_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__armv4_mmu_cache_flush
-
-		.word	0x56056900
-		.word	0xffffff00		@ PXA9xx
-		W(b)	__armv4_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__armv4_mmu_cache_flush
-
-		.word	0x56158000		@ PXA168
-		.word	0xfffff000
-		W(b)	__armv4_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__armv5tej_mmu_cache_flush
-
-		.word	0x56050000		@ Feroceon
-		.word	0xff0f0000
-		W(b)	__armv4_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__armv5tej_mmu_cache_flush
-
-#ifdef CONFIG_CPU_FEROCEON_OLD_ID
-		/* this conflicts with the standard ARMv5TE entry */
-		.long	0x41009260		@ Old Feroceon
-		.long	0xff00fff0
-		b	__armv4_mmu_cache_on
-		b	__armv4_mmu_cache_off
-		b	__armv5tej_mmu_cache_flush
-#endif
-
-		.word	0x66015261		@ FA526
-		.word	0xff01fff1
-		W(b)	__fa526_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__fa526_cache_flush
-
-		@ These match on the architecture ID
-
-		.word	0x00020000		@ ARMv4T
-		.word	0x000f0000
-		W(b)	__armv4_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__armv4_mmu_cache_flush
-
-		.word	0x00050000		@ ARMv5TE
-		.word	0x000f0000
-		W(b)	__armv4_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__armv4_mmu_cache_flush
-
-		.word	0x00060000		@ ARMv5TEJ
-		.word	0x000f0000
-		W(b)	__armv4_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__armv5tej_mmu_cache_flush
-
-		.word	0x0007b000		@ ARMv6
-		.word	0x000ff000
-		W(b)	__armv4_mmu_cache_on
-		W(b)	__armv4_mmu_cache_off
-		W(b)	__armv6_mmu_cache_flush
-
-		.word	0x000f0000		@ new CPU Id
-		.word	0x000f0000
-		W(b)	__armv7_mmu_cache_on
-		W(b)	__armv7_mmu_cache_off
-		W(b)	__armv7_mmu_cache_flush
-
-		.word	0			@ unrecognised type
-		.word	0
-		mov	pc, lr
- THUMB(		nop				)
-		mov	pc, lr
- THUMB(		nop				)
-		mov	pc, lr
- THUMB(		nop				)
-
-		.size	proc_types, . - proc_types
-
-		/*
-		 * If you get a "non-constant expression in ".if" statement"
-		 * error from the assembler on this line, check that you have
-		 * not accidentally written a "b" instruction where you should
-		 * have written W(b).
-		 */
-		.if (. - proc_types) % PROC_ENTRY_SIZE != 0
-		.error "The size of one or more proc_types entries is wrong."
-		.endif
-
-/*
- * Turn off the Cache and MMU.  ARMv3 does not support
- * reading the control register, but ARMv4 does.
- *
- * On exit,
- *  r0, r1, r2, r3, r9, r12 corrupted
- * This routine must preserve:
- *  r4, r7, r8
- */
-		.align	5
-cache_off:	mov	r3, #12			@ cache_off function
-		b	call_cache_fn
-
-__armv4_mpu_cache_off:
-		mrc	p15, 0, r0, c1, c0
-		bic	r0, r0, #0x000d
-		mcr	p15, 0, r0, c1, c0	@ turn MPU and cache off
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
-		mcr	p15, 0, r0, c7, c6, 0	@ flush D-Cache
-		mcr	p15, 0, r0, c7, c5, 0	@ flush I-Cache
-		mov	pc, lr
-
-__armv3_mpu_cache_off:
-		mrc	p15, 0, r0, c1, c0
-		bic	r0, r0, #0x000d
-		mcr	p15, 0, r0, c1, c0, 0	@ turn MPU and cache off
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
-		mov	pc, lr
-
-__armv4_mmu_cache_off:
-#ifdef CONFIG_MMU
-		mrc	p15, 0, r0, c1, c0
-		bic	r0, r0, #0x000d
-		mcr	p15, 0, r0, c1, c0	@ turn MMU and cache off
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c7	@ invalidate whole cache v4
-		mcr	p15, 0, r0, c8, c7	@ invalidate whole TLB v4
-#endif
-		mov	pc, lr
-
-__armv7_mmu_cache_off:
-		mrc	p15, 0, r0, c1, c0
-#ifdef CONFIG_MMU
-		bic	r0, r0, #0x000d
-#else
-		bic	r0, r0, #0x000c
-#endif
-		mcr	p15, 0, r0, c1, c0	@ turn MMU and cache off
-		mov	r12, lr
-		bl	__armv7_mmu_cache_flush
-		mov	r0, #0
-#ifdef CONFIG_MMU
-		mcr	p15, 0, r0, c8, c7, 0	@ invalidate whole TLB
-#endif
-		mcr	p15, 0, r0, c7, c5, 6	@ invalidate BTC
-		mcr	p15, 0, r0, c7, c10, 4	@ DSB
-		mcr	p15, 0, r0, c7, c5, 4	@ ISB
-		mov	pc, r12
-
-__arm6_mmu_cache_off:
-		mov	r0, #0x00000030		@ ARM6 control reg.
-		b	__armv3_mmu_cache_off
-
-__arm7_mmu_cache_off:
-		mov	r0, #0x00000070		@ ARM7 control reg.
-		b	__armv3_mmu_cache_off
-
-__armv3_mmu_cache_off:
-		mcr	p15, 0, r0, c1, c0, 0	@ turn MMU and cache off
-		mov	r0, #0
-		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
-		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3
-		mov	pc, lr
-
-/*
- * Clean and flush the cache to maintain consistency.
- *
- * On exit,
- *  r1, r2, r3, r9, r10, r11, r12 corrupted
- * This routine must preserve:
- *  r4, r6, r7, r8
- */
-		.align	5
-cache_clean_flush:
-		mov	r3, #16
-		b	call_cache_fn
-
-__armv4_mpu_cache_flush:
-		mov	r2, #1
-		mov	r3, #0
-		mcr	p15, 0, ip, c7, c6, 0	@ invalidate D cache
-		mov	r1, #7 << 5		@ 8 segments
-1:		orr	r3, r1, #63 << 26	@ 64 entries
-2:		mcr	p15, 0, r3, c7, c14, 2	@ clean & invalidate D index
-		subs	r3, r3, #1 << 26
-		bcs	2b			@ entries 63 to 0
-		subs 	r1, r1, #1 << 5
-		bcs	1b			@ segments 7 to 0
-
-		teq	r2, #0
-		mcrne	p15, 0, ip, c7, c5, 0	@ invalidate I cache
-		mcr	p15, 0, ip, c7, c10, 4	@ drain WB
-		mov	pc, lr
-		
-__fa526_cache_flush:
-		mov	r1, #0
-		mcr	p15, 0, r1, c7, c14, 0	@ clean and invalidate D cache
-		mcr	p15, 0, r1, c7, c5, 0	@ flush I cache
-		mcr	p15, 0, r1, c7, c10, 4	@ drain WB
-		mov	pc, lr
-
-__armv6_mmu_cache_flush:
-		mov	r1, #0
-		mcr	p15, 0, r1, c7, c14, 0	@ clean+invalidate D
-		mcr	p15, 0, r1, c7, c5, 0	@ invalidate I+BTB
-		mcr	p15, 0, r1, c7, c15, 0	@ clean+invalidate unified
-		mcr	p15, 0, r1, c7, c10, 4	@ drain WB
-		mov	pc, lr
-
-__armv7_mmu_cache_flush:
-		mrc	p15, 0, r10, c0, c1, 5	@ read ID_MMFR1
-		tst	r10, #0xf << 16		@ hierarchical cache (ARMv7)
-		mov	r10, #0
-		beq	hierarchical
-		mcr	p15, 0, r10, c7, c14, 0	@ clean+invalidate D
-		b	iflush
-hierarchical:
-		mcr	p15, 0, r10, c7, c10, 5	@ DMB
-		stmfd	sp!, {r0-r7, r9-r11}
-		mrc	p15, 1, r0, c0, c0, 1	@ read clidr
-		ands	r3, r0, #0x7000000	@ extract loc from clidr
-		mov	r3, r3, lsr #23		@ left align loc bit field
-		beq	finished		@ if loc is 0, then no need to clean
-		mov	r10, #0			@ start clean at cache level 0
-loop1:
-		add	r2, r10, r10, lsr #1	@ work out 3x current cache level
-		mov	r1, r0, lsr r2		@ extract cache type bits from clidr
-		and	r1, r1, #7		@ mask of the bits for current cache only
-		cmp	r1, #2			@ see what cache we have at this level
-		blt	skip			@ skip if no cache, or just i-cache
-		mcr	p15, 2, r10, c0, c0, 0	@ select current cache level in cssr
-		mcr	p15, 0, r10, c7, c5, 4	@ isb to sych the new cssr&csidr
-		mrc	p15, 1, r1, c0, c0, 0	@ read the new csidr
-		and	r2, r1, #7		@ extract the length of the cache lines
-		add	r2, r2, #4		@ add 4 (line length offset)
-		ldr	r4, =0x3ff
-		ands	r4, r4, r1, lsr #3	@ find maximum number on the way size
-		clz	r5, r4			@ find bit position of way size increment
-		ldr	r7, =0x7fff
-		ands	r7, r7, r1, lsr #13	@ extract max number of the index size
-loop2:
-		mov	r9, r4			@ create working copy of max way size
-loop3:
- ARM(		orr	r11, r10, r9, lsl r5	) @ factor way and cache number into r11
- ARM(		orr	r11, r11, r7, lsl r2	) @ factor index number into r11
- THUMB(		lsl	r6, r9, r5		)
- THUMB(		orr	r11, r10, r6		) @ factor way and cache number into r11
- THUMB(		lsl	r6, r7, r2		)
- THUMB(		orr	r11, r11, r6		) @ factor index number into r11
-		mcr	p15, 0, r11, c7, c14, 2	@ clean & invalidate by set/way
-		subs	r9, r9, #1		@ decrement the way
-		bge	loop3
-		subs	r7, r7, #1		@ decrement the index
-		bge	loop2
-skip:
-		add	r10, r10, #2		@ increment cache number
-		cmp	r3, r10
-		bgt	loop1
-finished:
-		ldmfd	sp!, {r0-r7, r9-r11}
-		mov	r10, #0			@ swith back to cache level 0
-		mcr	p15, 2, r10, c0, c0, 0	@ select current cache level in cssr
-iflush:
-		mcr	p15, 0, r10, c7, c10, 4	@ DSB
-		mcr	p15, 0, r10, c7, c5, 0	@ invalidate I+BTB
-		mcr	p15, 0, r10, c7, c10, 4	@ DSB
-		mcr	p15, 0, r10, c7, c5, 4	@ ISB
-		mov	pc, lr
-
-__armv5tej_mmu_cache_flush:
-1:		mrc	p15, 0, r15, c7, c14, 3	@ test,clean,invalidate D cache
-		bne	1b
-		mcr	p15, 0, r0, c7, c5, 0	@ flush I cache
-		mcr	p15, 0, r0, c7, c10, 4	@ drain WB
-		mov	pc, lr
-
-__armv4_mmu_cache_flush:
-		mov	r2, #64*1024		@ default: 32K dcache size (*2)
-		mov	r11, #32		@ default: 32 byte line size
-		mrc	p15, 0, r3, c0, c0, 1	@ read cache type
-		teq	r3, r9			@ cache ID register present?
-		beq	no_cache_id
-		mov	r1, r3, lsr #18
-		and	r1, r1, #7
-		mov	r2, #1024
-		mov	r2, r2, lsl r1		@ base dcache size *2
-		tst	r3, #1 << 14		@ test M bit
-		addne	r2, r2, r2, lsr #1	@ +1/2 size if M == 1
-		mov	r3, r3, lsr #12
-		and	r3, r3, #3
-		mov	r11, #8
-		mov	r11, r11, lsl r3	@ cache line size in bytes
-no_cache_id:
-		mov	r1, pc
-		bic	r1, r1, #63		@ align to longest cache line
-		add	r2, r1, r2
-1:
- ARM(		ldr	r3, [r1], r11		) @ s/w flush D cache
- THUMB(		ldr     r3, [r1]		) @ s/w flush D cache
- THUMB(		add     r1, r1, r11		)
-		teq	r1, r2
-		bne	1b
-
-		mcr	p15, 0, r1, c7, c5, 0	@ flush I cache
-		mcr	p15, 0, r1, c7, c6, 0	@ flush D cache
-		mcr	p15, 0, r1, c7, c10, 4	@ drain WB
-		mov	pc, lr
-
-__armv3_mmu_cache_flush:
-__armv3_mpu_cache_flush:
-		mov	r1, #0
-		mcr	p15, 0, r1, c7, c0, 0	@ invalidate whole cache v3
-		mov	pc, lr
-
-/*
- * Various debugging routines for printing hex characters and
- * memory, which again must be relocatable.
- */
-#ifdef DEBUG
-		.align	2
-		.type	phexbuf,#object
-phexbuf:	.space	12
-		.size	phexbuf, . - phexbuf
-
-@ phex corrupts {r0, r1, r2, r3}
-phex:		adr	r3, phexbuf
-		mov	r2, #0
-		strb	r2, [r3, r1]
-1:		subs	r1, r1, #1
-		movmi	r0, r3
-		bmi	puts
-		and	r2, r0, #15
-		mov	r0, r0, lsr #4
-		cmp	r2, #10
-		addge	r2, r2, #7
-		add	r2, r2, #'0'
-		strb	r2, [r3, r1]
-		b	1b
-
-@ puts corrupts {r0, r1, r2, r3}
-puts:		loadsp	r3, r1
-1:		ldrb	r2, [r0], #1
-		teq	r2, #0
-		moveq	pc, lr
-2:		writeb	r2, r3
-		mov	r1, #0x00020000
-3:		subs	r1, r1, #1
-		bne	3b
-		teq	r2, #'\n'
-		moveq	r2, #'\r'
-		beq	2b
-		teq	r0, #0
-		bne	1b
-		mov	pc, lr
-@ putc corrupts {r0, r1, r2, r3}
-putc:
-		mov	r2, r0
-		mov	r0, #0
-		loadsp	r3, r1
-		b	2b
-
-@ memdump corrupts {r0, r1, r2, r3, r10, r11, r12, lr}
-memdump:	mov	r12, r0
-		mov	r10, lr
-		mov	r11, #0
-2:		mov	r0, r11, lsl #2
-		add	r0, r0, r12
-		mov	r1, #8
-		bl	phex
-		mov	r0, #':'
-		bl	putc
-1:		mov	r0, #' '
-		bl	putc
-		ldr	r0, [r12, r11, lsl #2]
-		mov	r1, #8
-		bl	phex
-		and	r0, r11, #7
-		teq	r0, #3
-		moveq	r0, #' '
-		bleq	putc
-		and	r0, r11, #7
-		add	r11, r11, #1
-		teq	r0, #7
-		bne	1b
-		mov	r0, #'\n'
-		bl	putc
-		cmp	r11, #64
-		blt	2b
-		mov	pc, r10
-#endif
-
-		.ltorg
-reloc_code_end:
-
-		.align
-		.section ".stack", "aw", %nobits
-.L_user_stack:	.space	4096
-.L_user_stack_end:
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/libfdt_env.h b/ANDROID_3.4.5/arch/arm/boot/compressed/libfdt_env.h
deleted file mode 100644
index 1f4e7187..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/libfdt_env.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef _ARM_LIBFDT_ENV_H
-#define _ARM_LIBFDT_ENV_H
-
-#include <linux/types.h>
-#include <linux/string.h>
-#include <asm/byteorder.h>
-
-#define fdt16_to_cpu(x)		be16_to_cpu(x)
-#define cpu_to_fdt16(x)		cpu_to_be16(x)
-#define fdt32_to_cpu(x)		be32_to_cpu(x)
-#define cpu_to_fdt32(x)		cpu_to_be32(x)
-#define fdt64_to_cpu(x)		be64_to_cpu(x)
-#define cpu_to_fdt64(x)		cpu_to_be64(x)
-
-#endif
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/ll_char_wr.S b/ANDROID_3.4.5/arch/arm/boot/compressed/ll_char_wr.S
deleted file mode 100644
index 8517c860..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/ll_char_wr.S
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- *  linux/arch/arm/lib/ll_char_wr.S
- *
- *  Copyright (C) 1995, 1996 Russell King.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- *  Speedups & 1bpp code (C) 1996 Philip Blundell & Russell King.
- *
- *  10-04-96	RMK	Various cleanups & reduced register usage.
- *  08-04-98	RMK	Shifts re-ordered
- */
-
-@ Regs: [] = corruptible
-@       {} = used
-@       () = do not use
-
-#include <linux/linkage.h>
-#include <asm/assembler.h>
-	.text
-
-LC0:	.word	LC0
-	.word	bytes_per_char_h
-	.word	video_size_row
-	.word	acorndata_8x8
-	.word	con_charconvtable
-
-/*
- * r0 = ptr
- * r1 = char
- * r2 = white
- */
-ENTRY(ll_write_char)
-	stmfd	sp!, {r4 - r7, lr}
-@
-@ Smashable regs: {r0 - r3}, [r4 - r7], (r8 - fp), [ip], (sp), [lr], (pc)
-@
-	/*
-	 * calculate offset into character table
-	 */
-	mov	r1, r1, lsl #3
-	/*
-	 * calculate offset required for each row.
-	 */
-	adr	ip, LC0
-	ldmia	ip, {r3, r4, r5, r6, lr}
-	sub	ip, ip, r3
-	add	r6, r6, ip
-	add	lr, lr, ip
-	ldr	r4, [r4, ip]
-	ldr	r5, [r5, ip]
-	/*
-	 * Go to resolution-dependent routine...
-	 */
-	cmp	r4, #4
-	blt	Lrow1bpp
-	add	r0, r0, r5, lsl #3		@ Move to bottom of character
-	orr	r1, r1, #7
-	ldrb	r7, [r6, r1]
-	teq	r4, #8
-	beq	Lrow8bpplp
-@
-@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
-@
-Lrow4bpplp:
-	ldr	r7, [lr, r7, lsl #2]
-	mul	r7, r2, r7
-	sub	r1, r1, #1			@ avoid using r7 directly after
-	str	r7, [r0, -r5]!
-	ldrb	r7, [r6, r1]
-	ldr	r7, [lr, r7, lsl #2]
-	mul	r7, r2, r7
-	tst	r1, #7				@ avoid using r7 directly after
-	str	r7, [r0, -r5]!
-	subne	r1, r1, #1
-	ldrneb	r7, [r6, r1]
-	bne	Lrow4bpplp
-	ldmfd	sp!, {r4 - r7, pc}
-
-@
-@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc)
-@
-Lrow8bpplp:
-	mov	ip, r7, lsr #4
-	ldr	ip, [lr, ip, lsl #2]
-	mul	r4, r2, ip
-	and	ip, r7, #15			@ avoid r4
-	ldr	ip, [lr, ip, lsl #2]		@ avoid r4
-	mul	ip, r2, ip			@ avoid r4
-	sub	r1, r1, #1			@ avoid ip
-	sub	r0, r0, r5			@ avoid ip
-	stmia	r0, {r4, ip}
-	ldrb	r7, [r6, r1]
-	mov	ip, r7, lsr #4
-	ldr	ip, [lr, ip, lsl #2]
-	mul	r4, r2, ip
-	and	ip, r7, #15			@ avoid r4
-	ldr	ip, [lr, ip, lsl #2]		@ avoid r4
-	mul	ip, r2, ip			@ avoid r4
-	tst	r1, #7				@ avoid ip
-	sub	r0, r0, r5			@ avoid ip
-	stmia	r0, {r4, ip}
-	subne	r1, r1, #1
-	ldrneb	r7, [r6, r1]
-	bne	Lrow8bpplp
-	ldmfd	sp!, {r4 - r7, pc}
-
-@
-@ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc)
-@
-Lrow1bpp:
-	add	r6, r6, r1
-	ldmia	r6, {r4, r7}
-	strb	r4, [r0], r5
-	mov	r4, r4, lsr #8
-	strb	r4, [r0], r5
-	mov	r4, r4, lsr #8
-	strb	r4, [r0], r5
-	mov	r4, r4, lsr #8
-	strb	r4, [r0], r5
-	strb	r7, [r0], r5
-	mov	r7, r7, lsr #8
-	strb	r7, [r0], r5
-	mov	r7, r7, lsr #8
-	strb	r7, [r0], r5
-	mov	r7, r7, lsr #8
-	strb	r7, [r0], r5
-	ldmfd	sp!, {r4 - r7, pc}
-
-	.bss
-ENTRY(con_charconvtable)
-	.space	1024
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/misc.c b/ANDROID_3.4.5/arch/arm/boot/compressed/misc.c
deleted file mode 100644
index 8e2a8fca..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/misc.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * misc.c
- * 
- * This is a collection of several routines from gzip-1.0.3 
- * adapted for Linux.
- *
- * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
- *
- * Modified for ARM Linux by Russell King
- *
- * Nicolas Pitre <nico@visuaide.com>  1999/04/14 :
- *  For this code to run directly from Flash, all constant variables must
- *  be marked with 'const' and all other variables initialized at run-time 
- *  only.  This way all non constant variables will end up in the bss segment,
- *  which should point to addresses in RAM and cleared to 0 on start.
- *  This allows for a much quicker boot time.
- */
-
-unsigned int __machine_arch_type;
-
-#include <linux/compiler.h>	/* for inline */
-#include <linux/types.h>
-#include <linux/linkage.h>
-
-static void putstr(const char *ptr);
-extern void error(char *x);
-
-#include <mach/uncompress.h>
-
-#ifdef CONFIG_DEBUG_ICEDCC
-
-#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
-
-static void icedcc_putc(int ch)
-{
-	int status, i = 0x4000000;
-
-	do {
-		if (--i < 0)
-			return;
-
-		asm volatile ("mrc p14, 0, %0, c0, c1, 0" : "=r" (status));
-	} while (status & (1 << 29));
-
-	asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
-}
-
-
-#elif defined(CONFIG_CPU_XSCALE)
-
-static void icedcc_putc(int ch)
-{
-	int status, i = 0x4000000;
-
-	do {
-		if (--i < 0)
-			return;
-
-		asm volatile ("mrc p14, 0, %0, c14, c0, 0" : "=r" (status));
-	} while (status & (1 << 28));
-
-	asm("mcr p14, 0, %0, c8, c0, 0" : : "r" (ch));
-}
-
-#else
-
-static void icedcc_putc(int ch)
-{
-	int status, i = 0x4000000;
-
-	do {
-		if (--i < 0)
-			return;
-
-		asm volatile ("mrc p14, 0, %0, c0, c0, 0" : "=r" (status));
-	} while (status & 2);
-
-	asm("mcr p14, 0, %0, c1, c0, 0" : : "r" (ch));
-}
-
-#endif
-
-#define putc(ch)	icedcc_putc(ch)
-#endif
-
-static void putstr(const char *ptr)
-{
-	char c;
-
-	while ((c = *ptr++) != '\0') {
-		if (c == '\n')
-			putc('\r');
-		putc(c);
-	}
-
-	flush();
-}
-
-/*
- * gzip declarations
- */
-extern char input_data[];
-extern char input_data_end[];
-
-unsigned char *output_data;
-
-unsigned long free_mem_ptr;
-unsigned long free_mem_end_ptr;
-
-#ifndef arch_error
-#define arch_error(x)
-#endif
-
-void error(char *x)
-{
-	arch_error(x);
-
-	putstr("\n\n");
-	putstr(x);
-	putstr("\n\n -- System halted");
-
-	while(1);	/* Halt */
-}
-
-asmlinkage void __div0(void)
-{
-	error("Attempting division by 0!");
-}
-
-extern int do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x));
-
-
-void
-decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p,
-		unsigned long free_mem_ptr_end_p,
-		int arch_id)
-{
-	int ret;
-
-	output_data		= (unsigned char *)output_start;
-	free_mem_ptr		= free_mem_ptr_p;
-	free_mem_end_ptr	= free_mem_ptr_end_p;
-	__machine_arch_type	= arch_id;
-
-	arch_decomp_setup();
-
-	putstr("Uncompressing Linux...");
-	ret = do_decompress(input_data, input_data_end - input_data,
-			    output_data, error);
-	if (ret)
-		error("decompressor returned an error");
-	else
-		putstr(" done, booting the kernel.\n");
-}
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/mmcif-sh7372.c b/ANDROID_3.4.5/arch/arm/boot/compressed/mmcif-sh7372.c
deleted file mode 100644
index 672ae95d..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/mmcif-sh7372.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * sh7372 MMCIF loader
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/mmc/sh_mmcif.h>
-#include <linux/mmc/boot.h>
-#include <mach/mmc.h>
-
-#define MMCIF_BASE      (void __iomem *)0xe6bd0000
-
-#define PORT84CR	(void __iomem *)0xe6050054
-#define PORT85CR	(void __iomem *)0xe6050055
-#define PORT86CR	(void __iomem *)0xe6050056
-#define PORT87CR	(void __iomem *)0xe6050057
-#define PORT88CR	(void __iomem *)0xe6050058
-#define PORT89CR	(void __iomem *)0xe6050059
-#define PORT90CR	(void __iomem *)0xe605005a
-#define PORT91CR	(void __iomem *)0xe605005b
-#define PORT92CR	(void __iomem *)0xe605005c
-#define PORT99CR	(void __iomem *)0xe6050063
-
-#define SMSTPCR3	(void __iomem *)0xe615013c
-
-/* SH7372 specific MMCIF loader
- *
- * loads the zImage from an MMC card starting from block 1.
- *
- * The image must be start with a vrl4 header and
- * the zImage must start at offset 512 of the image. That is,
- * at block 2 (=byte 1024) on the media
- *
- * Use the following line to write the vrl4 formated zImage
- * to an MMC card
- * # dd if=vrl4.out of=/dev/sdx bs=512 seek=1
- */
-asmlinkage void mmc_loader(unsigned char *buf, unsigned long len)
-{
-	mmc_init_progress();
-	mmc_update_progress(MMC_PROGRESS_ENTER);
-
-	/* Initialise MMC
-	 * registers: PORT84CR-PORT92CR
-	 *            (MMCD0_0-MMCD0_7,MMCCMD0 Control)
-	 * value: 0x04 - select function 4
-	 */
-	 __raw_writeb(0x04, PORT84CR);
-	 __raw_writeb(0x04, PORT85CR);
-	 __raw_writeb(0x04, PORT86CR);
-	 __raw_writeb(0x04, PORT87CR);
-	 __raw_writeb(0x04, PORT88CR);
-	 __raw_writeb(0x04, PORT89CR);
-	 __raw_writeb(0x04, PORT90CR);
-	 __raw_writeb(0x04, PORT91CR);
-	 __raw_writeb(0x04, PORT92CR);
-
-	/* Initialise MMC
-	 * registers: PORT99CR (MMCCLK0 Control)
-	 * value: 0x10 | 0x04 - enable output | select function 4
-	 */
-	__raw_writeb(0x14, PORT99CR);
-
-	/* Enable clock to MMC hardware block */
-	__raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 12), SMSTPCR3);
-
-	mmc_update_progress(MMC_PROGRESS_INIT);
-
-	/* setup MMCIF hardware */
-	sh_mmcif_boot_init(MMCIF_BASE);
-
-	mmc_update_progress(MMC_PROGRESS_LOAD);
-
-	/* load kernel via MMCIF interface */
-	sh_mmcif_boot_do_read(MMCIF_BASE, 2, /* Kernel is at block 2 */
-			      (len + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS, buf);
-
-
-	/* Disable clock to MMC hardware block */
-	__raw_writel(__raw_readl(SMSTPCR3) | (1 << 12), SMSTPCR3);
-
-	mmc_update_progress(MMC_PROGRESS_DONE);
-}
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/ofw-shark.c b/ANDROID_3.4.5/arch/arm/boot/compressed/ofw-shark.c
deleted file mode 100644
index 465c54b6..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/ofw-shark.c
+++ /dev/null
@@ -1,260 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/ofw-shark.c
- *
- * by Alexander Schulz
- *
- * This file is used to get some basic information
- * about the memory layout of the shark we are running
- * on. Memory is usually divided in blocks a 8 MB.
- * And bootargs are copied from OpenFirmware.
- */
-
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <asm/setup.h>
-#include <asm/page.h>
-
-
-asmlinkage void
-create_params (unsigned long *buffer)
-{
-	/* Is there a better address? Also change in mach-shark/core.c */
-	struct tag *tag = (struct tag *) 0x08003000;
-	int j,i,m,k,nr_banks,size;
-	unsigned char *c;
-
-	k = 0;
-
-	/* Head of the taglist */
-	tag->hdr.tag  = ATAG_CORE;
-	tag->hdr.size = tag_size(tag_core);
-	tag->u.core.flags = 1;
-	tag->u.core.pagesize = PAGE_SIZE;
-	tag->u.core.rootdev = 0;
-
-	/* Build up one tagged block for each memory region */
-	size=0;
-	nr_banks=(unsigned int) buffer[0];
-	for (j=0;j<nr_banks;j++){
-		/* search the lowest address and put it into the next entry   */
-		/* not a fast sort algorithm, but there are at most 8 entries */
-		/* and this is used only once anyway                          */
-		m=0xffffffff;
-		for (i=0;i<(unsigned int) buffer[0];i++){
-			if (buffer[2*i+1]<m) {
-				m=buffer[2*i+1];
-				k=i;
-			}
-		}
-	  
-		tag = tag_next(tag);
-		tag->hdr.tag = ATAG_MEM;
-		tag->hdr.size = tag_size(tag_mem32);
-		tag->u.mem.size = buffer[2*k+2];
-		tag->u.mem.start = buffer[2*k+1];
-
-		size += buffer[2*k+2];
-
-		buffer[2*k+1]=0xffffffff;                    /* mark as copied */
-	}
-	
-	/* The command line */
-	tag = tag_next(tag);
-	tag->hdr.tag = ATAG_CMDLINE;
-	
-	c=(unsigned char *)(&buffer[34]);
-	j=0;
-	while (*c) tag->u.cmdline.cmdline[j++]=*c++;
-
-	tag->u.cmdline.cmdline[j]=0;
-	tag->hdr.size = (j + 7 + sizeof(struct tag_header)) >> 2;
-
-	/* Hardware revision */
-	tag = tag_next(tag);
-	tag->hdr.tag = ATAG_REVISION;
-	tag->hdr.size = tag_size(tag_revision);
-	tag->u.revision.rev = ((unsigned char) buffer[33])-'0';
-
-	/* End of the taglist */
-	tag = tag_next(tag);
-	tag->hdr.tag = 0;
-	tag->hdr.size = 0;
-}
-
-
-typedef int (*ofw_handle_t)(void *);
-
-/* Everything below is called with a wrong MMU setting.
- * This means: no string constants, no initialization of
- * arrays, no global variables! This is ugly but I didn't
- * want to write this in assembler :-)
- */
-
-int
-of_decode_int(const unsigned char *p)
-{
-	unsigned int i = *p++ << 8;
-	i = (i + *p++) << 8;
-	i = (i + *p++) << 8;
-	return (i + *p);
-}
-  
-int
-OF_finddevice(ofw_handle_t openfirmware, char *name)
-{
-	unsigned int args[8];
-	char service[12];
-
-	service[0]='f';
-	service[1]='i';
-	service[2]='n';
-	service[3]='d';
-	service[4]='d';
-	service[5]='e';
-	service[6]='v';
-	service[7]='i';
-	service[8]='c';
-	service[9]='e';
-	service[10]='\0';
-
-	args[0]=(unsigned int)service;
-	args[1]=1;
-	args[2]=1;
-	args[3]=(unsigned int)name;
-
-	if (openfirmware(args) == -1)
-		return -1;
-	return args[4];
-}
-
-int
-OF_getproplen(ofw_handle_t openfirmware, int handle, char *prop)
-{
-	unsigned int args[8];
-	char service[12];
-
-	service[0]='g';
-	service[1]='e';
-	service[2]='t';
-	service[3]='p';
-	service[4]='r';
-	service[5]='o';
-	service[6]='p';
-	service[7]='l';
-	service[8]='e';
-	service[9]='n';
-	service[10]='\0';
-
-	args[0] = (unsigned int)service;
-	args[1] = 2;
-	args[2] = 1;
-	args[3] = (unsigned int)handle;
-	args[4] = (unsigned int)prop;
-
-	if (openfirmware(args) == -1)
-		return -1;
-	return args[5];
-}
-  
-int
-OF_getprop(ofw_handle_t openfirmware, int handle, char *prop, void *buf, unsigned int buflen)
-{
-	unsigned int args[8];
-	char service[8];
-
-	service[0]='g';
-	service[1]='e';
-	service[2]='t';
-	service[3]='p';
-	service[4]='r';
-	service[5]='o';
-	service[6]='p';
-	service[7]='\0';
-
-	args[0] = (unsigned int)service;
-	args[1] = 4;
-	args[2] = 1;
-	args[3] = (unsigned int)handle;
-	args[4] = (unsigned int)prop;
-	args[5] = (unsigned int)buf;
-	args[6] = buflen;
-
-	if (openfirmware(args) == -1)
-		return -1;
-	return args[7];
-}
-  
-asmlinkage void ofw_init(ofw_handle_t o, int *nomr, int *pointer)
-{
-	int phandle,i,mem_len,buffer[32];
-	char temp[15];
-  
-	temp[0]='/';
-	temp[1]='m';
-	temp[2]='e';
-	temp[3]='m';
-	temp[4]='o';
-	temp[5]='r';
-	temp[6]='y';
-	temp[7]='\0';
-
-	phandle=OF_finddevice(o,temp);
-
-	temp[0]='r';
-	temp[1]='e';
-	temp[2]='g';
-	temp[3]='\0';
-
-	mem_len = OF_getproplen(o,phandle, temp);
-	OF_getprop(o,phandle, temp, buffer, mem_len);
-	*nomr=mem_len >> 3;
-
-	for (i=0; i<=mem_len/4; i++) pointer[i]=of_decode_int((const unsigned char *)&buffer[i]);
-
-	temp[0]='/';
-	temp[1]='c';
-	temp[2]='h';
-	temp[3]='o';
-	temp[4]='s';
-	temp[5]='e';
-	temp[6]='n';
-	temp[7]='\0';
-
-	phandle=OF_finddevice(o,temp);
-
-	temp[0]='b';
-	temp[1]='o';
-	temp[2]='o';
-	temp[3]='t';
-	temp[4]='a';
-	temp[5]='r';
-	temp[6]='g';
-	temp[7]='s';
-	temp[8]='\0';
-
-	mem_len = OF_getproplen(o,phandle, temp);
-	OF_getprop(o,phandle, temp, buffer, mem_len);
-	if (mem_len > 128) mem_len=128;
-	for (i=0; i<=mem_len/4; i++) pointer[i+33]=buffer[i];
-	pointer[i+33]=0;
-
-	temp[0]='/';
-	temp[1]='\0';
-	phandle=OF_finddevice(o,temp);
-	temp[0]='b';
-	temp[1]='a';
-	temp[2]='n';
-	temp[3]='n';
-	temp[4]='e';
-	temp[5]='r';
-	temp[6]='-';
-	temp[7]='n';
-	temp[8]='a';
-	temp[9]='m';
-	temp[10]='e';
-	temp[11]='\0';
-	mem_len = OF_getproplen(o,phandle, temp);
-	OF_getprop(o,phandle, temp, buffer, mem_len);
-	* ((unsigned char *) &pointer[32]) = ((unsigned char *) buffer)[mem_len-2];
-}
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.gzip.S b/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.gzip.S
deleted file mode 100644
index a68adf91..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.gzip.S
+++ /dev/null
@@ -1,6 +0,0 @@
-	.section .piggydata,#alloc
-	.globl	input_data
-input_data:
-	.incbin	"arch/arm/boot/compressed/piggy.gzip"
-	.globl	input_data_end
-input_data_end:
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.lzma.S b/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.lzma.S
deleted file mode 100644
index d7e69cff..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.lzma.S
+++ /dev/null
@@ -1,6 +0,0 @@
-	.section .piggydata,#alloc
-	.globl	input_data
-input_data:
-	.incbin	"arch/arm/boot/compressed/piggy.lzma"
-	.globl	input_data_end
-input_data_end:
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.lzo.S b/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.lzo.S
deleted file mode 100644
index a425ad95..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.lzo.S
+++ /dev/null
@@ -1,6 +0,0 @@
-	.section .piggydata,#alloc
-	.globl	input_data
-input_data:
-	.incbin	"arch/arm/boot/compressed/piggy.lzo"
-	.globl	input_data_end
-input_data_end:
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.xzkern.S b/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.xzkern.S
deleted file mode 100644
index 5703f300..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/piggy.xzkern.S
+++ /dev/null
@@ -1,6 +0,0 @@
-	.section .piggydata,#alloc
-	.globl	input_data
-input_data:
-	.incbin	"arch/arm/boot/compressed/piggy.xzkern"
-	.globl	input_data_end
-input_data_end:
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/sdhi-sh7372.c b/ANDROID_3.4.5/arch/arm/boot/compressed/sdhi-sh7372.c
deleted file mode 100644
index d279294f..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/sdhi-sh7372.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * SuperH Mobile SDHI
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2010 Kuninori Morimoto
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Parts inspired by u-boot
- */
-
-#include <linux/io.h>
-#include <mach/mmc.h>
-#include <linux/mmc/boot.h>
-#include <linux/mmc/tmio.h>
-
-#include "sdhi-shmobile.h"
-
-#define PORT179CR       0xe60520b3
-#define PORT180CR       0xe60520b4
-#define PORT181CR       0xe60520b5
-#define PORT182CR       0xe60520b6
-#define PORT183CR       0xe60520b7
-#define PORT184CR       0xe60520b8
-
-#define SMSTPCR3        0xe615013c
-
-#define CR_INPUT_ENABLE 0x10
-#define CR_FUNCTION1    0x01
-
-#define SDHI1_BASE	(void __iomem *)0xe6860000
-#define SDHI_BASE	SDHI1_BASE
-
-/*  SuperH Mobile SDHI loader
- *
- * loads the zImage from an SD card starting from block 0
- * on physical partition 1
- *
- * The image must be start with a vrl4 header and
- * the zImage must start at offset 512 of the image. That is,
- * at block 1 (=byte 512) of physical partition 1
- *
- * Use the following line to write the vrl4 formated zImage
- * to an SD card
- * # dd if=vrl4.out of=/dev/sdx bs=512
- */
-asmlinkage void mmc_loader(unsigned short *buf, unsigned long len)
-{
-	int high_capacity;
-
-	mmc_init_progress();
-
-	mmc_update_progress(MMC_PROGRESS_ENTER);
-        /* Initialise SDHI1 */
-        /* PORT184CR: GPIO_FN_SDHICMD1 Control */
-        __raw_writeb(CR_FUNCTION1, PORT184CR);
-        /* PORT179CR: GPIO_FN_SDHICLK1 Control */
-        __raw_writeb(CR_INPUT_ENABLE|CR_FUNCTION1, PORT179CR);
-        /* PORT181CR: GPIO_FN_SDHID1_3 Control */
-        __raw_writeb(CR_FUNCTION1, PORT183CR);
-        /* PORT182CR: GPIO_FN_SDHID1_2 Control */
-        __raw_writeb(CR_FUNCTION1, PORT182CR);
-        /* PORT183CR: GPIO_FN_SDHID1_1 Control */
-        __raw_writeb(CR_FUNCTION1, PORT181CR);
-        /* PORT180CR: GPIO_FN_SDHID1_0 Control */
-        __raw_writeb(CR_FUNCTION1, PORT180CR);
-
-        /* Enable clock to SDHI1 hardware block */
-        __raw_writel(__raw_readl(SMSTPCR3) & ~(1 << 13), SMSTPCR3);
-
-	/* setup SDHI hardware */
-	mmc_update_progress(MMC_PROGRESS_INIT);
-	high_capacity = sdhi_boot_init(SDHI_BASE);
-	if (high_capacity < 0)
-		goto err;
-
-	mmc_update_progress(MMC_PROGRESS_LOAD);
-	/* load kernel */
-	if (sdhi_boot_do_read(SDHI_BASE, high_capacity,
-			      0, /* Kernel is at block 1 */
-			      (len + TMIO_BBS - 1) / TMIO_BBS, buf))
-		goto err;
-
-        /* Disable clock to SDHI1 hardware block */
-        __raw_writel(__raw_readl(SMSTPCR3) | (1 << 13), SMSTPCR3);
-
-	mmc_update_progress(MMC_PROGRESS_DONE);
-
-	return;
-err:
-	for(;;);
-}
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/sdhi-shmobile.c b/ANDROID_3.4.5/arch/arm/boot/compressed/sdhi-shmobile.c
deleted file mode 100644
index bd3d4698..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/sdhi-shmobile.c
+++ /dev/null
@@ -1,449 +0,0 @@
-/*
- * SuperH Mobile SDHI
- *
- * Copyright (C) 2010 Magnus Damm
- * Copyright (C) 2010 Kuninori Morimoto
- * Copyright (C) 2010 Simon Horman
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Parts inspired by u-boot
- */
-
-#include <linux/io.h>
-#include <linux/mmc/host.h>
-#include <linux/mmc/core.h>
-#include <linux/mmc/mmc.h>
-#include <linux/mmc/sd.h>
-#include <linux/mmc/tmio.h>
-#include <mach/sdhi.h>
-
-#define OCR_FASTBOOT		(1<<29)
-#define OCR_HCS			(1<<30)
-#define OCR_BUSY		(1<<31)
-
-#define RESP_CMD12		0x00000030
-
-static inline u16 sd_ctrl_read16(void __iomem *base, int addr)
-{
-        return __raw_readw(base + addr);
-}
-
-static inline u32 sd_ctrl_read32(void __iomem *base, int addr)
-{
-	return __raw_readw(base + addr) |
-	       __raw_readw(base + addr + 2) << 16;
-}
-
-static inline void sd_ctrl_write16(void __iomem *base, int addr, u16 val)
-{
-	__raw_writew(val, base + addr);
-}
-
-static inline void sd_ctrl_write32(void __iomem *base, int addr, u32 val)
-{
-	__raw_writew(val, base + addr);
-	__raw_writew(val >> 16, base + addr + 2);
-}
-
-#define ALL_ERROR (TMIO_STAT_CMD_IDX_ERR | TMIO_STAT_CRCFAIL |		\
-		   TMIO_STAT_STOPBIT_ERR | TMIO_STAT_DATATIMEOUT |	\
-		   TMIO_STAT_RXOVERFLOW | TMIO_STAT_TXUNDERRUN |	\
-		   TMIO_STAT_CMDTIMEOUT | TMIO_STAT_ILL_ACCESS |	\
-		   TMIO_STAT_ILL_FUNC)
-
-static int sdhi_intr(void __iomem *base)
-{
-	unsigned long state = sd_ctrl_read32(base, CTL_STATUS);
-
-	if (state & ALL_ERROR) {
-		sd_ctrl_write32(base, CTL_STATUS, ~ALL_ERROR);
-		sd_ctrl_write32(base, CTL_IRQ_MASK,
-				ALL_ERROR |
-				sd_ctrl_read32(base, CTL_IRQ_MASK));
-		return -EINVAL;
-	}
-	if (state & TMIO_STAT_CMDRESPEND) {
-		sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_CMDRESPEND);
-		sd_ctrl_write32(base, CTL_IRQ_MASK,
-				TMIO_STAT_CMDRESPEND |
-				sd_ctrl_read32(base, CTL_IRQ_MASK));
-		return 0;
-	}
-	if (state & TMIO_STAT_RXRDY) {
-		sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_RXRDY);
-		sd_ctrl_write32(base, CTL_IRQ_MASK,
-				TMIO_STAT_RXRDY | TMIO_STAT_TXUNDERRUN |
-				sd_ctrl_read32(base, CTL_IRQ_MASK));
-		return 0;
-	}
-	if (state & TMIO_STAT_DATAEND) {
-		sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_DATAEND);
-		sd_ctrl_write32(base, CTL_IRQ_MASK,
-				TMIO_STAT_DATAEND |
-				sd_ctrl_read32(base, CTL_IRQ_MASK));
-		return 0;
-	}
-
-	return -EAGAIN;
-}
-
-static int sdhi_boot_wait_resp_end(void __iomem *base)
-{
-	int err = -EAGAIN, timeout = 10000000;
-
-	while (timeout--) {
-		err = sdhi_intr(base);
-		if (err != -EAGAIN)
-			break;
-		udelay(1);
-	}
-
-	return err;
-}
-
-/* SDHI_CLK_CTRL */
-#define CLK_MMC_ENABLE                 (1 << 8)
-#define CLK_MMC_INIT                   (1 << 6)        /* clk / 256 */
-
-static void sdhi_boot_mmc_clk_stop(void __iomem *base)
-{
-	sd_ctrl_write16(base, CTL_CLK_AND_WAIT_CTL, 0x0000);
-	msleep(10);
-	sd_ctrl_write16(base, CTL_SD_CARD_CLK_CTL, ~CLK_MMC_ENABLE &
-		sd_ctrl_read16(base, CTL_SD_CARD_CLK_CTL));
-	msleep(10);
-}
-
-static void sdhi_boot_mmc_clk_start(void __iomem *base)
-{
-	sd_ctrl_write16(base, CTL_SD_CARD_CLK_CTL, CLK_MMC_ENABLE |
-		sd_ctrl_read16(base, CTL_SD_CARD_CLK_CTL));
-	msleep(10);
-	sd_ctrl_write16(base, CTL_CLK_AND_WAIT_CTL, CLK_MMC_ENABLE);
-	msleep(10);
-}
-
-static void sdhi_boot_reset(void __iomem *base)
-{
-	sd_ctrl_write16(base, CTL_RESET_SD, 0x0000);
-	msleep(10);
-	sd_ctrl_write16(base, CTL_RESET_SD, 0x0001);
-	msleep(10);
-}
-
-/* Set MMC clock / power.
- * Note: This controller uses a simple divider scheme therefore it cannot
- * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
- * MMC wont run that fast, it has to be clocked at 12MHz which is the next
- * slowest setting.
- */
-static int sdhi_boot_mmc_set_ios(void __iomem *base, struct mmc_ios *ios)
-{
-	if (sd_ctrl_read32(base, CTL_STATUS) & TMIO_STAT_CMD_BUSY)
-		return -EBUSY;
-
-	if (ios->clock)
-		sd_ctrl_write16(base, CTL_SD_CARD_CLK_CTL,
-				ios->clock | CLK_MMC_ENABLE);
-
-	/* Power sequence - OFF -> ON -> UP */
-	switch (ios->power_mode) {
-	case MMC_POWER_OFF: /* power down SD bus */
-		sdhi_boot_mmc_clk_stop(base);
-		break;
-	case MMC_POWER_ON: /* power up SD bus */
-		break;
-	case MMC_POWER_UP: /* start bus clock */
-		sdhi_boot_mmc_clk_start(base);
-		break;
-	}
-
-	switch (ios->bus_width) {
-	case MMC_BUS_WIDTH_1:
-		sd_ctrl_write16(base, CTL_SD_MEM_CARD_OPT, 0x80e0);
-	break;
-	case MMC_BUS_WIDTH_4:
-		sd_ctrl_write16(base, CTL_SD_MEM_CARD_OPT, 0x00e0);
-	break;
-	}
-
-	/* Let things settle. delay taken from winCE driver */
-	udelay(140);
-
-	return 0;
-}
-
-/* These are the bitmasks the tmio chip requires to implement the MMC response
- * types. Note that R1 and R6 are the same in this scheme. */
-#define RESP_NONE      0x0300
-#define RESP_R1        0x0400
-#define RESP_R1B       0x0500
-#define RESP_R2        0x0600
-#define RESP_R3        0x0700
-#define DATA_PRESENT   0x0800
-#define TRANSFER_READ  0x1000
-
-static int sdhi_boot_request(void __iomem *base, struct mmc_command *cmd)
-{
-	int err, c = cmd->opcode;
-
-	switch (mmc_resp_type(cmd)) {
-	case MMC_RSP_NONE: c |= RESP_NONE; break;
-	case MMC_RSP_R1:   c |= RESP_R1;   break;
-	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
-	case MMC_RSP_R2:   c |= RESP_R2;   break;
-	case MMC_RSP_R3:   c |= RESP_R3;   break;
-	default:
-		return -EINVAL;
-	}
-
-	/* No interrupts so this may not be cleared */
-	sd_ctrl_write32(base, CTL_STATUS, ~TMIO_STAT_CMDRESPEND);
-
-	sd_ctrl_write32(base, CTL_IRQ_MASK, TMIO_STAT_CMDRESPEND |
-			sd_ctrl_read32(base, CTL_IRQ_MASK));
-	sd_ctrl_write32(base, CTL_ARG_REG, cmd->arg);
-	sd_ctrl_write16(base, CTL_SD_CMD, c);
-
-
-	sd_ctrl_write32(base, CTL_IRQ_MASK,
-			~(TMIO_STAT_CMDRESPEND | ALL_ERROR) &
-			sd_ctrl_read32(base, CTL_IRQ_MASK));
-
-	err = sdhi_boot_wait_resp_end(base);
-	if (err)
-		return err;
-
-	cmd->resp[0] = sd_ctrl_read32(base, CTL_RESPONSE);
-
-	return 0;
-}
-
-static int sdhi_boot_do_read_single(void __iomem *base, int high_capacity,
-				    unsigned long block, unsigned short *buf)
-{
-	int err, i;
-
-	/* CMD17 - Read */
-	{
-		struct mmc_command cmd;
-
-		cmd.opcode = MMC_READ_SINGLE_BLOCK | \
-			     TRANSFER_READ | DATA_PRESENT;
-		if (high_capacity)
-			cmd.arg = block;
-		else
-			cmd.arg = block * TMIO_BBS;
-		cmd.flags = MMC_RSP_R1;
-		err = sdhi_boot_request(base, &cmd);
-		if (err)
-			return err;
-	}
-
-	sd_ctrl_write32(base, CTL_IRQ_MASK,
-			~(TMIO_STAT_DATAEND | TMIO_STAT_RXRDY |
-			  TMIO_STAT_TXUNDERRUN) &
-			sd_ctrl_read32(base, CTL_IRQ_MASK));
-	err = sdhi_boot_wait_resp_end(base);
-	if (err)
-		return err;
-
-	sd_ctrl_write16(base, CTL_SD_XFER_LEN, TMIO_BBS);
-	for (i = 0; i < TMIO_BBS / sizeof(*buf); i++)
-		*buf++ = sd_ctrl_read16(base, RESP_CMD12);
-
-	err = sdhi_boot_wait_resp_end(base);
-	if (err)
-		return err;
-
-	return 0;
-}
-
-int sdhi_boot_do_read(void __iomem *base, int high_capacity,
-		      unsigned long offset, unsigned short count,
-		      unsigned short *buf)
-{
-	unsigned long i;
-	int err = 0;
-
-	for (i = 0; i < count; i++) {
-		err = sdhi_boot_do_read_single(base, high_capacity, offset + i,
-					       buf + (i * TMIO_BBS /
-						      sizeof(*buf)));
-		if (err)
-			return err;
-	}
-
-	return 0;
-}
-
-#define VOLTAGES (MMC_VDD_32_33 | MMC_VDD_33_34)
-
-int sdhi_boot_init(void __iomem *base)
-{
-	bool sd_v2 = false, sd_v1_0 = false;
-	unsigned short cid;
-	int err, high_capacity = 0;
-
-	sdhi_boot_mmc_clk_stop(base);
-	sdhi_boot_reset(base);
-
-	/* mmc0: clock 400000Hz busmode 1 powermode 2 cs 0 Vdd 21 width 0 timing 0 */
-	{
-		struct mmc_ios ios;
-		ios.power_mode = MMC_POWER_ON;
-		ios.bus_width = MMC_BUS_WIDTH_1;
-		ios.clock = CLK_MMC_INIT;
-		err = sdhi_boot_mmc_set_ios(base, &ios);
-		if (err)
-			return err;
-	}
-
-	/* CMD0 */
-	{
-		struct mmc_command cmd;
-		msleep(1);
-		cmd.opcode = MMC_GO_IDLE_STATE;
-		cmd.arg = 0;
-		cmd.flags = MMC_RSP_NONE;
-		err = sdhi_boot_request(base, &cmd);
-		if (err)
-			return err;
-		msleep(2);
-	}
-
-	/* CMD8 - Test for SD version 2 */
-	{
-		struct mmc_command cmd;
-		cmd.opcode = SD_SEND_IF_COND;
-		cmd.arg = (VOLTAGES != 0) << 8 | 0xaa;
-		cmd.flags = MMC_RSP_R1;
-		err = sdhi_boot_request(base, &cmd); /* Ignore error */
-		if ((cmd.resp[0] & 0xff) == 0xaa)
-			sd_v2 = true;
-	}
-
-	/* CMD55 - Get OCR (SD) */
-	{
-		int timeout = 1000;
-		struct mmc_command cmd;
-
-		cmd.arg = 0;
-
-		do {
-			cmd.opcode = MMC_APP_CMD;
-			cmd.flags = MMC_RSP_R1;
-			cmd.arg = 0;
-			err = sdhi_boot_request(base, &cmd);
-			if (err)
-				break;
-
-			cmd.opcode = SD_APP_OP_COND;
-			cmd.flags = MMC_RSP_R3;
-			cmd.arg = (VOLTAGES & 0xff8000);
-			if (sd_v2)
-				cmd.arg |= OCR_HCS;
-			cmd.arg |= OCR_FASTBOOT;
-			err = sdhi_boot_request(base, &cmd);
-			if (err)
-				break;
-
-			msleep(1);
-		} while((!(cmd.resp[0] & OCR_BUSY)) && --timeout);
-
-		if (!err && timeout) {
-			if (!sd_v2)
-				sd_v1_0 = true;
-			high_capacity = (cmd.resp[0] & OCR_HCS) == OCR_HCS;
-		}
-	}
-
-	/* CMD1 - Get OCR (MMC) */
-	if (!sd_v2 && !sd_v1_0) {
-		int timeout = 1000;
-		struct mmc_command cmd;
-
-		do {
-			cmd.opcode = MMC_SEND_OP_COND;
-			cmd.arg = VOLTAGES | OCR_HCS;
-			cmd.flags = MMC_RSP_R3;
-			err = sdhi_boot_request(base, &cmd);
-			if (err)
-				return err;
-
-			msleep(1);
-		} while((!(cmd.resp[0] & OCR_BUSY)) && --timeout);
-
-		if (!timeout)
-			return -EAGAIN;
-
-		high_capacity = (cmd.resp[0] & OCR_HCS) == OCR_HCS;
-	}
-
-	/* CMD2 - Get CID */
-	{
-		struct mmc_command cmd;
-		cmd.opcode = MMC_ALL_SEND_CID;
-		cmd.arg = 0;
-		cmd.flags = MMC_RSP_R2;
-		err = sdhi_boot_request(base, &cmd);
-		if (err)
-			return err;
-	}
-
-	/* CMD3
-	 * MMC: Set the relative address
-	 * SD:  Get the relative address
-	 * Also puts the card into the standby state
-	 */
-	{
-		struct mmc_command cmd;
-		cmd.opcode = MMC_SET_RELATIVE_ADDR;
-		cmd.arg = 0;
-		cmd.flags = MMC_RSP_R1;
-		err = sdhi_boot_request(base, &cmd);
-		if (err)
-			return err;
-		cid = cmd.resp[0] >> 16;
-	}
-
-	/* CMD9 - Get CSD */
-	{
-		struct mmc_command cmd;
-		cmd.opcode = MMC_SEND_CSD;
-		cmd.arg = cid << 16;
-		cmd.flags = MMC_RSP_R2;
-		err = sdhi_boot_request(base, &cmd);
-		if (err)
-			return err;
-	}
-
-	/* CMD7 - Select the card */
-	{
-		struct mmc_command cmd;
-		cmd.opcode = MMC_SELECT_CARD;
-		//cmd.arg = rca << 16;
-		cmd.arg = cid << 16;
-		//cmd.flags = MMC_RSP_R1B;
-		cmd.flags = MMC_RSP_R1;
-		err = sdhi_boot_request(base, &cmd);
-		if (err)
-			return err;
-	}
-
-	/* CMD16 - Set the block size */
-	{
-		struct mmc_command cmd;
-		cmd.opcode = MMC_SET_BLOCKLEN;
-		cmd.arg = TMIO_BBS;
-		cmd.flags = MMC_RSP_R1;
-		err = sdhi_boot_request(base, &cmd);
-		if (err)
-			return err;
-	}
-
-	return high_capacity;
-}
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/sdhi-shmobile.h b/ANDROID_3.4.5/arch/arm/boot/compressed/sdhi-shmobile.h
deleted file mode 100644
index 92eaa09f..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/sdhi-shmobile.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef SDHI_MOBILE_H
-#define SDHI_MOBILE_H
-
-#include <linux/compiler.h>
-
-int sdhi_boot_do_read(void __iomem *base, int high_capacity,
-		      unsigned long offset, unsigned short count,
-		      unsigned short *buf);
-int sdhi_boot_init(void __iomem *base);
-
-#endif
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/string.c b/ANDROID_3.4.5/arch/arm/boot/compressed/string.c
deleted file mode 100644
index 36e53ef9..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/string.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * arch/arm/boot/compressed/string.c
- *
- * Small subset of simple string routines
- */
-
-#include <linux/string.h>
-
-void *memcpy(void *__dest, __const void *__src, size_t __n)
-{
-	int i = 0;
-	unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src;
-
-	for (i = __n >> 3; i > 0; i--) {
-		*d++ = *s++;
-		*d++ = *s++;
-		*d++ = *s++;
-		*d++ = *s++;
-		*d++ = *s++;
-		*d++ = *s++;
-		*d++ = *s++;
-		*d++ = *s++;
-	}
-
-	if (__n & 1 << 2) {
-		*d++ = *s++;
-		*d++ = *s++;
-		*d++ = *s++;
-		*d++ = *s++;
-	}
-
-	if (__n & 1 << 1) {
-		*d++ = *s++;
-		*d++ = *s++;
-	}
-
-	if (__n & 1)
-		*d++ = *s++;
-
-	return __dest;
-}
-
-void *memmove(void *__dest, __const void *__src, size_t count)
-{
-	unsigned char *d = __dest;
-	const unsigned char *s = __src;
-
-	if (__dest == __src)
-		return __dest;
-
-	if (__dest < __src)
-		return memcpy(__dest, __src, count);
-
-	while (count--)
-		d[count] = s[count];
-	return __dest;
-}
-
-size_t strlen(const char *s)
-{
-	const char *sc = s;
-
-	while (*sc != '\0')
-		sc++;
-	return sc - s;
-}
-
-int memcmp(const void *cs, const void *ct, size_t count)
-{
-	const unsigned char *su1 = cs, *su2 = ct, *end = su1 + count;
-	int res = 0;
-
-	while (su1 < end) {
-		res = *su1++ - *su2++;
-		if (res)
-			break;
-	}
-	return res;
-}
-
-int strcmp(const char *cs, const char *ct)
-{
-	unsigned char c1, c2;
-	int res = 0;
-
-	do {
-		c1 = *cs++;
-		c2 = *ct++;
-		res = c1 - c2;
-		if (res)
-			break;
-	} while (c1);
-	return res;
-}
-
-void *memchr(const void *s, int c, size_t count)
-{
-	const unsigned char *p = s;
-
-	while (count--)
-		if ((unsigned char)c == *p++)
-			return (void *)(p - 1);
-	return NULL;
-}
-
-char *strchr(const char *s, int c)
-{
-	while (*s != (char)c)
-		if (*s++ == '\0')
-			return NULL;
-	return (char *)s;
-}
-
-#undef memset
-
-void *memset(void *s, int c, size_t count)
-{
-	char *xs = s;
-	while (count--)
-		*xs++ = c;
-	return s;
-}
-
-void __memzero(void *s, size_t count)
-{
-	memset(s, 0, count);
-}
diff --git a/ANDROID_3.4.5/arch/arm/boot/compressed/vmlinux.lds.in b/ANDROID_3.4.5/arch/arm/boot/compressed/vmlinux.lds.in
deleted file mode 100644
index 4919f2ac..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/compressed/vmlinux.lds.in
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- *  linux/arch/arm/boot/compressed/vmlinux.lds.in
- *
- *  Copyright (C) 2000 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-  /DISCARD/ : {
-    *(.ARM.exidx*)
-    *(.ARM.extab*)
-    /*
-     * Discard any r/w data - this produces a link error if we have any,
-     * which is required for PIC decompression.  Local data generates
-     * GOTOFF relocations, which prevents it being relocated independently
-     * of the text/got segments.
-     */
-    *(.data)
-  }
-
-  . = TEXT_START;
-  _text = .;
-
-  .text : {
-    _start = .;
-    *(.start)
-    *(.text)
-    *(.text.*)
-    *(.fixup)
-    *(.gnu.warning)
-    *(.glue_7t)
-    *(.glue_7)
-  }
-  .rodata : {
-    *(.rodata)
-    *(.rodata.*)
-  }
-  .piggydata : {
-    *(.piggydata)
-  }
-
-  . = ALIGN(4);
-  _etext = .;
-
-  .got.plt		: { *(.got.plt) }
-  _got_start = .;
-  .got			: { *(.got) }
-  _got_end = .;
-
-  /* ensure the zImage file size is always a multiple of 64 bits */
-  /* (without a dummy byte, ld just ignores the empty section) */
-  .pad			: { BYTE(0); . = ALIGN(8); }
-  _edata = .;
-
-  . = BSS_START;
-  __bss_start = .;
-  .bss			: { *(.bss) }
-  _end = .;
-
-  . = ALIGN(8);		/* the stack must be 64-bit aligned */
-  .stack		: { *(.stack) }
-
-  .stab 0		: { *(.stab) }
-  .stabstr 0		: { *(.stabstr) }
-  .stab.excl 0		: { *(.stab.excl) }
-  .stab.exclstr 0	: { *(.stab.exclstr) }
-  .stab.index 0		: { *(.stab.index) }
-  .stab.indexstr 0	: { *(.stab.indexstr) }
-  .comment 0		: { *(.comment) }
-}
-
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/am3517_mt_ventoux.dts b/ANDROID_3.4.5/arch/arm/boot/dts/am3517_mt_ventoux.dts
deleted file mode 100644
index 5eb26d7d..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/am3517_mt_ventoux.dts
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright (C) 2011 Ilya Yanok, EmCraft Systems
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/dts-v1/;
-
-/include/ "omap3.dtsi"
-
-/ {
-	model = "TeeJet Mt.Ventoux";
-	compatible = "teejet,mt_ventoux", "ti,omap3";
-
-	memory {
-		device_type = "memory";
-		reg = <0x80000000 0x10000000>; /* 256 MB */
-	};
-
-	/* AM35xx doesn't have IVA */
-	soc {
-		iva {
-			status = "disabled";
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9g20.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9g20.dtsi
deleted file mode 100644
index 773ef484..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9g20.dtsi
+++ /dev/null
@@ -1,238 +0,0 @@
-/*
- * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
- *
- *  Copyright (C) 2011 Atmel,
- *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
- *                2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * Licensed under GPLv2 or later.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	model = "Atmel AT91SAM9G20 family SoC";
-	compatible = "atmel,at91sam9g20";
-	interrupt-parent = <&aic>;
-
-	aliases {
-		serial0 = &dbgu;
-		serial1 = &usart0;
-		serial2 = &usart1;
-		serial3 = &usart2;
-		serial4 = &usart3;
-		serial5 = &usart4;
-		serial6 = &usart5;
-		gpio0 = &pioA;
-		gpio1 = &pioB;
-		gpio2 = &pioC;
-		tcb0 = &tcb0;
-		tcb1 = &tcb1;
-	};
-	cpus {
-		cpu@0 {
-			compatible = "arm,arm926ejs";
-		};
-	};
-
-	memory {
-		reg = <0x20000000 0x08000000>;
-	};
-
-	ahb {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		apb {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			aic: interrupt-controller@fffff000 {
-				#interrupt-cells = <2>;
-				compatible = "atmel,at91rm9200-aic";
-				interrupt-controller;
-				reg = <0xfffff000 0x200>;
-			};
-
-			ramc0: ramc@ffffea00 {
-				compatible = "atmel,at91sam9260-sdramc";
-				reg = <0xffffea00 0x200>;
-			};
-
-			pmc: pmc@fffffc00 {
-				compatible = "atmel,at91rm9200-pmc";
-				reg = <0xfffffc00 0x100>;
-			};
-
-			rstc@fffffd00 {
-				compatible = "atmel,at91sam9260-rstc";
-				reg = <0xfffffd00 0x10>;
-			};
-
-			shdwc@fffffd10 {
-				compatible = "atmel,at91sam9260-shdwc";
-				reg = <0xfffffd10 0x10>;
-			};
-
-			pit: timer@fffffd30 {
-				compatible = "atmel,at91sam9260-pit";
-				reg = <0xfffffd30 0xf>;
-				interrupts = <1 4>;
-			};
-
-			tcb0: timer@fffa0000 {
-				compatible = "atmel,at91rm9200-tcb";
-				reg = <0xfffa0000 0x100>;
-				interrupts = <17 4 18 4 19 4>;
-			};
-
-			tcb1: timer@fffdc000 {
-				compatible = "atmel,at91rm9200-tcb";
-				reg = <0xfffdc000 0x100>;
-				interrupts = <26 4 27 4 28 4>;
-			};
-
-			pioA: gpio@fffff400 {
-				compatible = "atmel,at91rm9200-gpio";
-				reg = <0xfffff400 0x100>;
-				interrupts = <2 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			pioB: gpio@fffff600 {
-				compatible = "atmel,at91rm9200-gpio";
-				reg = <0xfffff600 0x100>;
-				interrupts = <3 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			pioC: gpio@fffff800 {
-				compatible = "atmel,at91rm9200-gpio";
-				reg = <0xfffff800 0x100>;
-				interrupts = <4 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			dbgu: serial@fffff200 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfffff200 0x200>;
-				interrupts = <1 4>;
-				status = "disabled";
-			};
-
-			usart0: serial@fffb0000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfffb0000 0x200>;
-				interrupts = <6 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			usart1: serial@fffb4000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfffb4000 0x200>;
-				interrupts = <7 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			usart2: serial@fffb8000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfffb8000 0x200>;
-				interrupts = <8 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			usart3: serial@fffd0000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfffd0000 0x200>;
-				interrupts = <23 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			usart4: serial@fffd4000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfffd4000 0x200>;
-				interrupts = <24 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			usart5: serial@fffd8000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfffd8000 0x200>;
-				interrupts = <25 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			macb0: ethernet@fffc4000 {
-				compatible = "cdns,at32ap7000-macb", "cdns,macb";
-				reg = <0xfffc4000 0x100>;
-				interrupts = <21 4>;
-				status = "disabled";
-			};
-
-			usb1: gadget@fffa4000 {
-				compatible = "atmel,at91rm9200-udc";
-				reg = <0xfffa4000 0x4000>;
-				interrupts = <10 4>;
-				status = "disabled";
-			};
-		};
-
-		nand0: nand@40000000 {
-			compatible = "atmel,at91rm9200-nand";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x40000000 0x10000000
-			       0xffffe800 0x200
-			      >;
-			atmel,nand-addr-offset = <21>;
-			atmel,nand-cmd-offset = <22>;
-			gpios = <&pioC 13 0
-				 &pioC 14 0
-				 0
-				>;
-			status = "disabled";
-		};
-
-		usb0: ohci@00500000 {
-			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
-			reg = <0x00500000 0x100000>;
-			interrupts = <20 4>;
-			status = "disabled";
-		};
-	};
-
-	i2c@0 {
-		compatible = "i2c-gpio";
-		gpios = <&pioA 23 0 /* sda */
-			 &pioA 24 0 /* scl */
-			>;
-		i2c-gpio,sda-open-drain;
-		i2c-gpio,scl-open-drain;
-		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9g25ek.dts b/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9g25ek.dts
deleted file mode 100644
index 7829a4d0..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9g25ek.dts
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board
- *
- *  Copyright (C) 2012 Atmel,
- *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
- *
- * Licensed under GPLv2 or later.
- */
-/dts-v1/;
-/include/ "at91sam9x5.dtsi"
-/include/ "at91sam9x5cm.dtsi"
-
-/ {
-	model = "Atmel AT91SAM9G25-EK";
-	compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
-
-	chosen {
-		bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
-	};
-
-	ahb {
-		apb {
-			dbgu: serial@fffff200 {
-				status = "okay";
-			};
-
-			usart0: serial@f801c000 {
-				status = "okay";
-			};
-
-			macb0: ethernet@f802c000 {
-				phy-mode = "rmii";
-				status = "okay";
-			};
-		};
-
-		usb0: ohci@00600000 {
-			status = "okay";
-			num-ports = <2>;
-			atmel,vbus-gpio = <&pioD 19 1
-					   &pioD 20 1
-					  >;
-		};
-
-		usb1: ehci@00700000 {
-			status = "okay";
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9g45.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9g45.dtsi
deleted file mode 100644
index c8042147..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9g45.dtsi
+++ /dev/null
@@ -1,247 +0,0 @@
-/*
- * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
- *                    applies to AT91SAM9G45, AT91SAM9M10,
- *                    AT91SAM9G46, AT91SAM9M11 SoC
- *
- *  Copyright (C) 2011 Atmel,
- *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
- *
- * Licensed under GPLv2 or later.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	model = "Atmel AT91SAM9G45 family SoC";
-	compatible = "atmel,at91sam9g45";
-	interrupt-parent = <&aic>;
-
-	aliases {
-		serial0 = &dbgu;
-		serial1 = &usart0;
-		serial2 = &usart1;
-		serial3 = &usart2;
-		serial4 = &usart3;
-		gpio0 = &pioA;
-		gpio1 = &pioB;
-		gpio2 = &pioC;
-		gpio3 = &pioD;
-		gpio4 = &pioE;
-		tcb0 = &tcb0;
-		tcb1 = &tcb1;
-	};
-	cpus {
-		cpu@0 {
-			compatible = "arm,arm926ejs";
-		};
-	};
-
-	memory {
-		reg = <0x70000000 0x10000000>;
-	};
-
-	ahb {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		apb {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			aic: interrupt-controller@fffff000 {
-				#interrupt-cells = <2>;
-				compatible = "atmel,at91rm9200-aic";
-				interrupt-controller;
-				reg = <0xfffff000 0x200>;
-			};
-
-			ramc0: ramc@ffffe400 {
-				compatible = "atmel,at91sam9g45-ddramc";
-				reg = <0xffffe400 0x200
-				       0xffffe600 0x200>;
-			};
-
-			pmc: pmc@fffffc00 {
-				compatible = "atmel,at91rm9200-pmc";
-				reg = <0xfffffc00 0x100>;
-			};
-
-			rstc@fffffd00 {
-				compatible = "atmel,at91sam9g45-rstc";
-				reg = <0xfffffd00 0x10>;
-			};
-
-			pit: timer@fffffd30 {
-				compatible = "atmel,at91sam9260-pit";
-				reg = <0xfffffd30 0xf>;
-				interrupts = <1 4>;
-			};
-
-
-			shdwc@fffffd10 {
-				compatible = "atmel,at91sam9rl-shdwc";
-				reg = <0xfffffd10 0x10>;
-			};
-
-			tcb0: timer@fff7c000 {
-				compatible = "atmel,at91rm9200-tcb";
-				reg = <0xfff7c000 0x100>;
-				interrupts = <18 4>;
-			};
-
-			tcb1: timer@fffd4000 {
-				compatible = "atmel,at91rm9200-tcb";
-				reg = <0xfffd4000 0x100>;
-				interrupts = <18 4>;
-			};
-
-			dma: dma-controller@ffffec00 {
-				compatible = "atmel,at91sam9g45-dma";
-				reg = <0xffffec00 0x200>;
-				interrupts = <21 4>;
-			};
-
-			pioA: gpio@fffff200 {
-				compatible = "atmel,at91rm9200-gpio";
-				reg = <0xfffff200 0x100>;
-				interrupts = <2 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			pioB: gpio@fffff400 {
-				compatible = "atmel,at91rm9200-gpio";
-				reg = <0xfffff400 0x100>;
-				interrupts = <3 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			pioC: gpio@fffff600 {
-				compatible = "atmel,at91rm9200-gpio";
-				reg = <0xfffff600 0x100>;
-				interrupts = <4 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			pioD: gpio@fffff800 {
-				compatible = "atmel,at91rm9200-gpio";
-				reg = <0xfffff800 0x100>;
-				interrupts = <5 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			pioE: gpio@fffffa00 {
-				compatible = "atmel,at91rm9200-gpio";
-				reg = <0xfffffa00 0x100>;
-				interrupts = <5 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			dbgu: serial@ffffee00 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xffffee00 0x200>;
-				interrupts = <1 4>;
-				status = "disabled";
-			};
-
-			usart0: serial@fff8c000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfff8c000 0x200>;
-				interrupts = <7 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			usart1: serial@fff90000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfff90000 0x200>;
-				interrupts = <8 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			usart2: serial@fff94000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfff94000 0x200>;
-				interrupts = <9 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			usart3: serial@fff98000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfff98000 0x200>;
-				interrupts = <10 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			macb0: ethernet@fffbc000 {
-				compatible = "cdns,at32ap7000-macb", "cdns,macb";
-				reg = <0xfffbc000 0x100>;
-				interrupts = <25 4>;
-				status = "disabled";
-			};
-		};
-
-		nand0: nand@40000000 {
-			compatible = "atmel,at91rm9200-nand";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x40000000 0x10000000
-			       0xffffe200 0x200
-			      >;
-			atmel,nand-addr-offset = <21>;
-			atmel,nand-cmd-offset = <22>;
-			gpios = <&pioC 8 0
-				 &pioC 14 0
-				 0
-				>;
-			status = "disabled";
-		};
-
-		usb0: ohci@00700000 {
-			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
-			reg = <0x00700000 0x100000>;
-			interrupts = <22 4>;
-			status = "disabled";
-		};
-
-		usb1: ehci@00800000 {
-			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
-			reg = <0x00800000 0x100000>;
-			interrupts = <22 4>;
-			status = "disabled";
-		};
-	};
-
-	i2c@0 {
-		compatible = "i2c-gpio";
-		gpios = <&pioA 20 0 /* sda */
-			 &pioA 21 0 /* scl */
-			>;
-		i2c-gpio,sda-open-drain;
-		i2c-gpio,scl-open-drain;
-		i2c-gpio,delay-us = <5>;	/* ~100 kHz */
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9m10g45ek.dts b/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9m10g45ek.dts
deleted file mode 100644
index a3633bd1..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
- *
- *  Copyright (C) 2011 Atmel,
- *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
- *
- * Licensed under GPLv2 or later.
- */
-/dts-v1/;
-/include/ "at91sam9g45.dtsi"
-
-/ {
-	model = "Atmel AT91SAM9M10G45-EK";
-	compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
-
-	chosen {
-		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
-	};
-
-	memory {
-		reg = <0x70000000 0x4000000>;
-	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		main_clock: clock@0 {
-			compatible = "atmel,osc", "fixed-clock";
-			clock-frequency = <12000000>;
-		};
-	};
-
-	ahb {
-		apb {
-			dbgu: serial@ffffee00 {
-				status = "okay";
-			};
-
-			usart1: serial@fff90000 {
-				status = "okay";
-			};
-
-			macb0: ethernet@fffbc000 {
-				phy-mode = "rmii";
-				status = "okay";
-			};
-		};
-
-		nand0: nand@40000000 {
-			nand-bus-width = <8>;
-			nand-ecc-mode = "soft";
-			nand-on-flash-bbt;
-			status = "okay";
-
-			boot@0 {
-				label = "bootstrap/uboot/kernel";
-				reg = <0x0 0x400000>;
-			};
-
-			rootfs@400000 {
-				label = "rootfs";
-				reg = <0x400000 0x3C00000>;
-			};
-
-			data@4000000 {
-				label = "data";
-				reg = <0x4000000 0xC000000>;
-			};
-		};
-
-		usb0: ohci@00700000 {
-			status = "okay";
-			num-ports = <2>;
-			atmel,vbus-gpio = <&pioD 1 1
-					   &pioD 3 1>;
-		};
-
-		usb1: ehci@00800000 {
-			status = "okay";
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		d8 {
-			label = "d8";
-			gpios = <&pioD 30 0>;
-			linux,default-trigger = "heartbeat";
-		};
-
-		d6 {
-			label = "d6";
-			gpios = <&pioD 0 1>;
-			linux,default-trigger = "nand-disk";
-		};
-
-		d7 {
-			label = "d7";
-			gpios = <&pioD 31 1>;
-			linux,default-trigger = "mmc0";
-		};
-	};
-
-	gpio_keys {
-		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		left_click {
-			label = "left_click";
-			gpios = <&pioB 6 1>;
-			linux,code = <272>;
-			gpio-key,wakeup;
-		};
-
-		right_click {
-			label = "right_click";
-			gpios = <&pioB 7 1>;
-			linux,code = <273>;
-			gpio-key,wakeup;
-		};
-
-		left {
-			label = "Joystick Left";
-			gpios = <&pioB 14 1>;
-			linux,code = <105>;
-		};
-
-		right {
-			label = "Joystick Right";
-			gpios = <&pioB 15 1>;
-			linux,code = <106>;
-		};
-
-		up {
-			label = "Joystick Up";
-			gpios = <&pioB 16 1>;
-			linux,code = <103>;
-		};
-
-		down {
-			label = "Joystick Down";
-			gpios = <&pioB 17 1>;
-			linux,code = <108>;
-		};
-
-		enter {
-			label = "Joystick Press";
-			gpios = <&pioB 18 1>;
-			linux,code = <28>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9x5.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9x5.dtsi
deleted file mode 100644
index dd4ed748..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9x5.dtsi
+++ /dev/null
@@ -1,263 +0,0 @@
-/*
- * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
- *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
- *                   AT91SAM9X25, AT91SAM9X35 SoC
- *
- *  Copyright (C) 2012 Atmel,
- *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
- *
- * Licensed under GPLv2 or later.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	model = "Atmel AT91SAM9x5 family SoC";
-	compatible = "atmel,at91sam9x5";
-	interrupt-parent = <&aic>;
-
-	aliases {
-		serial0 = &dbgu;
-		serial1 = &usart0;
-		serial2 = &usart1;
-		serial3 = &usart2;
-		gpio0 = &pioA;
-		gpio1 = &pioB;
-		gpio2 = &pioC;
-		gpio3 = &pioD;
-		tcb0 = &tcb0;
-		tcb1 = &tcb1;
-	};
-	cpus {
-		cpu@0 {
-			compatible = "arm,arm926ejs";
-		};
-	};
-
-	memory {
-		reg = <0x20000000 0x10000000>;
-	};
-
-	ahb {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		apb {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			aic: interrupt-controller@fffff000 {
-				#interrupt-cells = <2>;
-				compatible = "atmel,at91rm9200-aic";
-				interrupt-controller;
-				reg = <0xfffff000 0x200>;
-			};
-
-			ramc0: ramc@ffffe800 {
-				compatible = "atmel,at91sam9g45-ddramc";
-				reg = <0xffffe800 0x200>;
-			};
-
-			pmc: pmc@fffffc00 {
-				compatible = "atmel,at91rm9200-pmc";
-				reg = <0xfffffc00 0x100>;
-			};
-
-			rstc@fffffe00 {
-				compatible = "atmel,at91sam9g45-rstc";
-				reg = <0xfffffe00 0x10>;
-			};
-
-			shdwc@fffffe10 {
-				compatible = "atmel,at91sam9x5-shdwc";
-				reg = <0xfffffe10 0x10>;
-			};
-
-			pit: timer@fffffe30 {
-				compatible = "atmel,at91sam9260-pit";
-				reg = <0xfffffe30 0xf>;
-				interrupts = <1 4>;
-			};
-
-			tcb0: timer@f8008000 {
-				compatible = "atmel,at91sam9x5-tcb";
-				reg = <0xf8008000 0x100>;
-				interrupts = <17 4>;
-			};
-
-			tcb1: timer@f800c000 {
-				compatible = "atmel,at91sam9x5-tcb";
-				reg = <0xf800c000 0x100>;
-				interrupts = <17 4>;
-			};
-
-			dma0: dma-controller@ffffec00 {
-				compatible = "atmel,at91sam9g45-dma";
-				reg = <0xffffec00 0x200>;
-				interrupts = <20 4>;
-			};
-
-			dma1: dma-controller@ffffee00 {
-				compatible = "atmel,at91sam9g45-dma";
-				reg = <0xffffee00 0x200>;
-				interrupts = <21 4>;
-			};
-
-			pioA: gpio@fffff400 {
-				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-				reg = <0xfffff400 0x100>;
-				interrupts = <2 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			pioB: gpio@fffff600 {
-				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-				reg = <0xfffff600 0x100>;
-				interrupts = <2 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			pioC: gpio@fffff800 {
-				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-				reg = <0xfffff800 0x100>;
-				interrupts = <3 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			pioD: gpio@fffffa00 {
-				compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
-				reg = <0xfffffa00 0x100>;
-				interrupts = <3 4>;
-				#gpio-cells = <2>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			dbgu: serial@fffff200 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xfffff200 0x200>;
-				interrupts = <1 4>;
-				status = "disabled";
-			};
-
-			usart0: serial@f801c000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xf801c000 0x200>;
-				interrupts = <5 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			usart1: serial@f8020000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xf8020000 0x200>;
-				interrupts = <6 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			usart2: serial@f8024000 {
-				compatible = "atmel,at91sam9260-usart";
-				reg = <0xf8024000 0x200>;
-				interrupts = <7 4>;
-				atmel,use-dma-rx;
-				atmel,use-dma-tx;
-				status = "disabled";
-			};
-
-			macb0: ethernet@f802c000 {
-				compatible = "cdns,at32ap7000-macb", "cdns,macb";
-				reg = <0xf802c000 0x100>;
-				interrupts = <24 4>;
-				status = "disabled";
-			};
-
-			macb1: ethernet@f8030000 {
-				compatible = "cdns,at32ap7000-macb", "cdns,macb";
-				reg = <0xf8030000 0x100>;
-				interrupts = <27 4>;
-				status = "disabled";
-			};
-		};
-
-		nand0: nand@40000000 {
-			compatible = "atmel,at91rm9200-nand";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x40000000 0x10000000
-			      >;
-			atmel,nand-addr-offset = <21>;
-			atmel,nand-cmd-offset = <22>;
-			gpios = <&pioD 5 0
-				 &pioD 4 0
-				 0
-				>;
-			status = "disabled";
-		};
-
-		usb0: ohci@00600000 {
-			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
-			reg = <0x00600000 0x100000>;
-			interrupts = <22 4>;
-			status = "disabled";
-		};
-
-		usb1: ehci@00700000 {
-			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
-			reg = <0x00700000 0x100000>;
-			interrupts = <22 4>;
-			status = "disabled";
-		};
-	};
-
-	i2c@0 {
-		compatible = "i2c-gpio";
-		gpios = <&pioA 30 0 /* sda */
-			 &pioA 31 0 /* scl */
-			>;
-		i2c-gpio,sda-open-drain;
-		i2c-gpio,scl-open-drain;
-		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	i2c@1 {
-		compatible = "i2c-gpio";
-		gpios = <&pioC 0 0 /* sda */
-			 &pioC 1 0 /* scl */
-			>;
-		i2c-gpio,sda-open-drain;
-		i2c-gpio,scl-open-drain;
-		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-
-	i2c@2 {
-		compatible = "i2c-gpio";
-		gpios = <&pioB 4 0 /* sda */
-			 &pioB 5 0 /* scl */
-			>;
-		i2c-gpio,sda-open-drain;
-		i2c-gpio,scl-open-drain;
-		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
-		#address-cells = <1>;
-		#size-cells = <0>;
-		status = "disabled";
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9x5cm.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9x5cm.dtsi
deleted file mode 100644
index 31e7be23..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/at91sam9x5cm.dtsi
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
- *
- *  Copyright (C) 2012 Atmel,
- *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
- *
- * Licensed under GPLv2 or later.
- */
-
-/ {
-	memory {
-		reg = <0x20000000 0x8000000>;
-	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		main_clock: clock@0 {
-			compatible = "atmel,osc", "fixed-clock";
-			clock-frequency = <12000000>;
-		};
-	};
-
-	ahb {
-		nand0: nand@40000000 {
-			nand-bus-width = <8>;
-			nand-ecc-mode = "soft";
-			nand-on-flash-bbt;
-			status = "okay";
-
-			at91bootstrap@0 {
-				label = "at91bootstrap";
-				reg = <0x0 0x40000>;
-			};
-
-			uboot@40000 {
-				label = "u-boot";
-				reg = <0x40000 0x80000>;
-			};
-
-			ubootenv@c0000 {
-				label = "U-Boot Env";
-				reg = <0xc0000 0x140000>;
-			};
-
-			kernel@200000 {
-				label = "kernel";
-				reg = <0x200000 0x600000>;
-			};
-
-			rootfs@800000 {
-				label = "rootfs";
-				reg = <0x800000 0x1f800000>;
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		pb18 {
-			label = "pb18";
-			gpios = <&pioB 18 1>;
-			linux,default-trigger = "heartbeat";
-		};
-
-		pd21 {
-			label = "pd21";
-			gpios = <&pioD 21 0>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/db8500.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/db8500.dtsi
deleted file mode 100644
index 14bc3070..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/db8500.dtsi
+++ /dev/null
@@ -1,274 +0,0 @@
-/*
- * Copyright 2012 Linaro Ltd
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	soc-u9500 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "stericsson,db8500";
-		interrupt-parent = <&intc>;
-		ranges;
-
-		intc: interrupt-controller@a0411000 {
-			compatible = "arm,cortex-a9-gic";
-			#interrupt-cells = <3>;
-			#address-cells = <1>;
-			interrupt-controller;
-			reg = <0xa0411000 0x1000>,
-			      <0xa0410100 0x100>;
-		};
-
-		L2: l2-cache {
-			compatible = "arm,pl310-cache";
-			reg = <0xa0412000 0x1000>;
-			interrupts = <0 13 4>;
-			cache-unified;
-			cache-level = <2>;
-		};
-
-		pmu {
-			compatible = "arm,cortex-a9-pmu";
-			interrupts = <0 7 0x4>;
-		};
-
-		timer@a0410600 {
-			compatible = "arm,cortex-a9-twd-timer";
-			reg = <0xa0410600 0x20>;
-			interrupts = <1 13 0x304>;
-		};
-
-		rtc@80154000 {
-			compatible = "stericsson,db8500-rtc";
-			reg = <0x80154000 0x1000>;
-			interrupts = <0 18 0x4>;
-		};
-
-		gpio0: gpio@8012e000 {
-			compatible = "stericsson,db8500-gpio",
-				"stmicroelectronics,nomadik-gpio";
-			reg =  <0x8012e000 0x80>;
-			interrupts = <0 119 0x4>;
-			supports-sleepmode;
-			gpio-controller;
-		};
-
-		gpio1: gpio@8012e080 {
-			compatible = "stericsson,db8500-gpio",
-				"stmicroelectronics,nomadik-gpio";
-			reg =  <0x8012e080 0x80>;
-			interrupts = <0 120 0x4>;
-			supports-sleepmode;
-			gpio-controller;
-		};
-
-		gpio2: gpio@8000e000 {
-			compatible = "stericsson,db8500-gpio",
-				"stmicroelectronics,nomadik-gpio";
-			reg =  <0x8000e000 0x80>;
-			interrupts = <0 121 0x4>;
-			supports-sleepmode;
-			gpio-controller;
-		};
-
-		gpio3: gpio@8000e080 {
-			compatible = "stericsson,db8500-gpio",
-				"stmicroelectronics,nomadik-gpio";
-			reg =  <0x8000e080 0x80>;
-			interrupts = <0 122 0x4>;
-			supports-sleepmode;
-			gpio-controller;
-		};
-
-		gpio4: gpio@8000e100 {
-			compatible = "stericsson,db8500-gpio",
-				"stmicroelectronics,nomadik-gpio";
-			reg =  <0x8000e100 0x80>;
-			interrupts = <0 123 0x4>;
-			supports-sleepmode;
-			gpio-controller;
-		};
-
-		gpio5: gpio@8000e180 {
-			compatible = "stericsson,db8500-gpio",
-				"stmicroelectronics,nomadik-gpio";
-			reg =  <0x8000e180 0x80>;
-			interrupts = <0 124 0x4>;
-			supports-sleepmode;
-			gpio-controller;
-		};
-
-		gpio6: gpio@8011e000 {
-			compatible = "stericsson,db8500-gpio",
-				"stmicroelectronics,nomadik-gpio";
-			reg =  <0x8011e000 0x80>;
-			interrupts = <0 125 0x4>;
-			supports-sleepmode;
-			gpio-controller;
-		};
-
-		gpio7: gpio@8011e080 {
-			compatible = "stericsson,db8500-gpio",
-				"stmicroelectronics,nomadik-gpio";
-			reg =  <0x8011e080 0x80>;
-			interrupts = <0 126 0x4>;
-			supports-sleepmode;
-			gpio-controller;
-		};
-
-		gpio8: gpio@a03fe000 {
-			compatible = "stericsson,db8500-gpio",
-				"stmicroelectronics,nomadik-gpio";
-			reg =  <0xa03fe000 0x80>;
-			interrupts = <0 127 0x4>;
-			supports-sleepmode;
-			gpio-controller;
-		};
-
-		usb@a03e0000 {
-			compatible = "stericsson,db8500-musb",
-				"mentor,musb";
-			reg = <0xa03e0000 0x10000>;
-			interrupts = <0 23 0x4>;
-		};
-
-		dma-controller@801C0000 {
-			compatible = "stericsson,db8500-dma40",
-					"stericsson,dma40";
-			reg = <0x801C0000 0x1000 0x40010000 0x800>;
-			interrupts = <0 25 0x4>;
-		};
-
-		prcmu@80157000 {
-			compatible = "stericsson,db8500-prcmu";
-			reg = <0x80157000 0x1000>;
-			interrupts = <46 47>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			ab8500@5 {
-				compatible = "stericsson,ab8500";
-				reg = <5>; /* mailbox 5 is i2c */
-				interrupts = <0 40 0x4>;
-			};
-		};
-
-		i2c@80004000 {
-			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
-			reg = <0x80004000 0x1000>;
-			interrupts = <0 21 0x4>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
-		i2c@80122000 {
-			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
-			reg = <0x80122000 0x1000>;
-			interrupts = <0 22 0x4>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
-		i2c@80128000 {
-			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
-			reg = <0x80128000 0x1000>;
-			interrupts = <0 55 0x4>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
-		i2c@80110000 {
-			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
-			reg = <0x80110000 0x1000>;
-			interrupts = <0 12 0x4>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
-		i2c@8012a000 {
-			compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
-			reg = <0x8012a000 0x1000>;
-			interrupts = <0 51 0x4>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
-		ssp@80002000 {
-			compatible = "arm,pl022", "arm,primecell";
-			reg = <80002000 0x1000>;
-			interrupts = <0 14 0x4>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-
-			// Add one of these for each child device
-			cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
-
-		};
-
-		uart@80120000 {
-			compatible = "arm,pl011", "arm,primecell";
-			reg = <0x80120000 0x1000>;
-			interrupts = <0 11 0x4>;
-			status = "disabled";
-		};
-		uart@80121000 {
-			compatible = "arm,pl011", "arm,primecell";
-			reg = <0x80121000 0x1000>;
-			interrupts = <0 19 0x4>;
-			status = "disabled";
-		};
-		uart@80007000 {
-			compatible = "arm,pl011", "arm,primecell";
-			reg = <0x80007000 0x1000>;
-			interrupts = <0 26 0x4>;
-			status = "disabled";
-		};
-
-		sdi@80126000 {
-			compatible = "arm,pl18x", "arm,primecell";
-			reg = <0x80126000 0x1000>;
-			interrupts = <0 60 0x4>;
-			status = "disabled";
-		};
-		sdi@80118000 {
-			compatible = "arm,pl18x", "arm,primecell";
-			reg = <0x80118000 0x1000>;
-			interrupts = <0 50 0x4>;
-			status = "disabled";
-		};
-		sdi@80005000 {
-			compatible = "arm,pl18x", "arm,primecell";
-			reg = <0x80005000 0x1000>;
-			interrupts = <0 41 0x4>;
-			status = "disabled";
-		};
-		sdi@80119000 {
-			compatible = "arm,pl18x", "arm,primecell";
-			reg = <0x80119000 0x1000>;
-			interrupts = <0 59 0x4>;
-			status = "disabled";
-		};
-		sdi@80114000 {
-			compatible = "arm,pl18x", "arm,primecell";
-			reg = <0x80114000 0x1000>;
-			interrupts = <0 99 0x4>;
-			status = "disabled";
-		};
-		sdi@80008000 {
-			compatible = "arm,pl18x", "arm,primecell";
-			reg = <0x80114000 0x1000>;
-			interrupts = <0 100 0x4>;
-			status = "disabled";
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/exynos4210-origen.dts b/ANDROID_3.4.5/arch/arm/boot/dts/exynos4210-origen.dts
deleted file mode 100644
index b8c47638..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/exynos4210-origen.dts
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * Samsung's Exynos4210 based Origen board device tree source
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- * Copyright (c) 2010-2011 Linaro Ltd.
- *		www.linaro.org
- *
- * Device tree source file for Insignal's Origen board which is based on
- * Samsung's Exynos4210 SoC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/dts-v1/;
-/include/ "exynos4210.dtsi"
-
-/ {
-	model = "Insignal Origen evaluation board based on Exynos4210";
-	compatible = "insignal,origen", "samsung,exynos4210";
-
-	memory {
-		reg = <0x40000000 0x40000000>;
-	};
-
-	chosen {
-		bootargs ="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
-	};
-
-	sdhci@12530000 {
-		samsung,sdhci-bus-width = <4>;
-		linux,mmc_cap_4_bit_data;
-		samsung,sdhci-cd-internal;
-		gpio-cd = <&gpk2 2 2 3 3>;
-		gpios = <&gpk2 0 2 0 3>,
-			<&gpk2 1 2 0 3>,
-			<&gpk2 3 2 3 3>,
-			<&gpk2 4 2 3 3>,
-			<&gpk2 5 2 3 3>,
-			<&gpk2 6 2 3 3>;
-	};
-
-	sdhci@12510000 {
-		samsung,sdhci-bus-width = <4>;
-		linux,mmc_cap_4_bit_data;
-		samsung,sdhci-cd-internal;
-		gpio-cd = <&gpk0 2 2 3 3>;
-		gpios = <&gpk0 0 2 0 3>,
-			<&gpk0 1 2 0 3>,
-			<&gpk0 3 2 3 3>,
-			<&gpk0 4 2 3 3>,
-			<&gpk0 5 2 3 3>,
-			<&gpk0 6 2 3 3>;
-	};
-
-	gpio_keys {
-		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		up {
-			label = "Up";
-			gpios = <&gpx2 0 0 0 2>;
-			linux,code = <103>;
-		};
-
-		down {
-			label = "Down";
-			gpios = <&gpx2 1 0 0 2>;
-			linux,code = <108>;
-		};
-
-		back {
-			label = "Back";
-			gpios = <&gpx1 7 0 0 2>;
-			linux,code = <158>;
-		};
-
-		home {
-			label = "Home";
-			gpios = <&gpx1 6 0 0 2>;
-			linux,code = <102>;
-		};
-
-		menu {
-			label = "Menu";
-			gpios = <&gpx1 5 0 0 2>;
-			linux,code = <139>;
-		};
-	};
-
-	keypad@100A0000 {
-		status = "disabled";
-	};
-
-	sdhci@12520000 {
-		status = "disabled";
-	};
-
-	sdhci@12540000 {
-		status = "disabled";
-	};
-
-	i2c@13860000 {
-		status = "disabled";
-	};
-
-	i2c@13870000 {
-		status = "disabled";
-	};
-
-	i2c@13880000 {
-		status = "disabled";
-	};
-
-	i2c@13890000 {
-		status = "disabled";
-	};
-
-	i2c@138A0000 {
-		status = "disabled";
-	};
-
-	i2c@138B0000 {
-		status = "disabled";
-	};
-
-	i2c@138C0000 {
-		status = "disabled";
-	};
-
-	i2c@138D0000 {
-		status = "disabled";
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/exynos4210-smdkv310.dts b/ANDROID_3.4.5/arch/arm/boot/dts/exynos4210-smdkv310.dts
deleted file mode 100644
index 27afc8e5..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
- * Samsung's Exynos4210 based SMDKV310 board device tree source
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- * Copyright (c) 2010-2011 Linaro Ltd.
- *		www.linaro.org
- *
- * Device tree source file for Samsung's SMDKV310 board which is based on
- * Samsung's Exynos4210 SoC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/dts-v1/;
-/include/ "exynos4210.dtsi"
-
-/ {
-	model = "Samsung smdkv310 evaluation board based on Exynos4210";
-	compatible = "samsung,smdkv310", "samsung,exynos4210";
-
-	memory {
-		reg = <0x40000000 0x80000000>;
-	};
-
-	chosen {
-		bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
-	};
-
-	sdhci@12530000 {
-		samsung,sdhci-bus-width = <4>;
-		linux,mmc_cap_4_bit_data;
-		samsung,sdhci-cd-internal;
-		gpio-cd = <&gpk2 2 2 3 3>;
-		gpios = <&gpk2 0 2 0 3>,
-			<&gpk2 1 2 0 3>,
-			<&gpk2 3 2 3 3>,
-			<&gpk2 4 2 3 3>,
-			<&gpk2 5 2 3 3>,
-			<&gpk2 6 2 3 3>;
-	};
-
-	keypad@100A0000 {
-		samsung,keypad-num-rows = <2>;
-		samsung,keypad-num-columns = <8>;
-		linux,keypad-no-autorepeat;
-		linux,keypad-wakeup;
-
-		row-gpios = <&gpx2 0 3 3 0>,
-			    <&gpx2 1 3 3 0>;
-
-		col-gpios = <&gpx1 0 3 0 0>,
-			    <&gpx1 1 3 0 0>,
-			    <&gpx1 2 3 0 0>,
-			    <&gpx1 3 3 0 0>,
-			    <&gpx1 4 3 0 0>,
-			    <&gpx1 5 3 0 0>,
-			    <&gpx1 6 3 0 0>,
-			    <&gpx1 7 3 0 0>;
-
-		key_1 {
-			keypad,row = <0>;
-			keypad,column = <3>;
-			linux,code = <2>;
-		};
-
-		key_2 {
-			keypad,row = <0>;
-			keypad,column = <4>;
-			linux,code = <3>;
-		};
-
-		key_3 {
-			keypad,row = <0>;
-			keypad,column = <5>;
-			linux,code = <4>;
-		};
-
-		key_4 {
-			keypad,row = <0>;
-			keypad,column = <6>;
-			linux,code = <5>;
-		};
-
-		key_5 {
-			keypad,row = <0>;
-			keypad,column = <7>;
-			linux,code = <6>;
-		};
-
-		key_a {
-			keypad,row = <1>;
-			keypad,column = <3>;
-			linux,code = <30>;
-		};
-
-		key_b {
-			keypad,row = <1>;
-			keypad,column = <4>;
-			linux,code = <48>;
-		};
-
-		key_c {
-			keypad,row = <1>;
-			keypad,column = <5>;
-			linux,code = <46>;
-		};
-
-		key_d {
-			keypad,row = <1>;
-			keypad,column = <6>;
-			linux,code = <32>;
-		};
-
-		key_e {
-			keypad,row = <1>;
-			keypad,column = <7>;
-			linux,code = <18>;
-		};
-	};
-
-	i2c@13860000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		samsung,i2c-sda-delay = <100>;
-		samsung,i2c-max-bus-freq = <20000>;
-		gpios = <&gpd1 0 2 3 0>,
-			<&gpd1 1 2 3 0>;
-
-		eeprom@50 {
-			compatible = "samsung,24ad0xd1";
-			reg = <0x50>;
-		};
-
-		eeprom@52 {
-			compatible = "samsung,24ad0xd1";
-			reg = <0x52>;
-		};
-	};
-
-	sdhci@12510000 {
-		status = "disabled";
-	};
-
-	sdhci@12520000 {
-		status = "disabled";
-	};
-
-	sdhci@12540000 {
-		status = "disabled";
-	};
-
-	i2c@13870000 {
-		status = "disabled";
-	};
-
-	i2c@13880000 {
-		status = "disabled";
-	};
-
-	i2c@13890000 {
-		status = "disabled";
-	};
-
-	i2c@138A0000 {
-		status = "disabled";
-	};
-
-	i2c@138B0000 {
-		status = "disabled";
-	};
-
-	i2c@138C0000 {
-		status = "disabled";
-	};
-
-	i2c@138D0000 {
-		status = "disabled";
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/exynos4210.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/exynos4210.dtsi
deleted file mode 100644
index a1dd2ee8..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/exynos4210.dtsi
+++ /dev/null
@@ -1,398 +0,0 @@
-/*
- * Samsung's Exynos4210 SoC device tree source
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- * Copyright (c) 2010-2011 Linaro Ltd.
- *		www.linaro.org
- *
- * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
- * based board files can include this file and provide values for board specfic
- * bindings.
- *
- * Note: This file does not include device nodes for all the controllers in
- * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
- * nodes can be added to this file.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/include/ "skeleton.dtsi"
-
-/ {
-	compatible = "samsung,exynos4210";
-	interrupt-parent = <&gic>;
-
-	gic:interrupt-controller@10490000 {
-		compatible = "arm,cortex-a9-gic";
-		#interrupt-cells = <3>;
-		interrupt-controller;
-		cpu-offset = <0x8000>;
-		reg = <0x10490000 0x1000>, <0x10480000 0x100>;
-	};
-
-	watchdog@10060000 {
-		compatible = "samsung,s3c2410-wdt";
-		reg = <0x10060000 0x100>;
-		interrupts = <0 43 0>;
-	};
-
-	rtc@10070000 {
-		compatible = "samsung,s3c6410-rtc";
-		reg = <0x10070000 0x100>;
-		interrupts = <0 44 0>, <0 45 0>;
-	};
-
-	keypad@100A0000 {
-		compatible = "samsung,s5pv210-keypad";
-		reg = <0x100A0000 0x100>;
-		interrupts = <0 109 0>;
-	};
-
-	sdhci@12510000 {
-		compatible = "samsung,exynos4210-sdhci";
-		reg = <0x12510000 0x100>;
-		interrupts = <0 73 0>;
-	};
-
-	sdhci@12520000 {
-		compatible = "samsung,exynos4210-sdhci";
-		reg = <0x12520000 0x100>;
-		interrupts = <0 74 0>;
-	};
-
-	sdhci@12530000 {
-		compatible = "samsung,exynos4210-sdhci";
-		reg = <0x12530000 0x100>;
-		interrupts = <0 75 0>;
-	};
-
-	sdhci@12540000 {
-		compatible = "samsung,exynos4210-sdhci";
-		reg = <0x12540000 0x100>;
-		interrupts = <0 76 0>;
-	};
-
-	serial@13800000 {
-		compatible = "samsung,exynos4210-uart";
-		reg = <0x13800000 0x100>;
-		interrupts = <0 52 0>;
-	};
-
-	serial@13810000 {
-		compatible = "samsung,exynos4210-uart";
-		reg = <0x13810000 0x100>;
-		interrupts = <0 53 0>;
-	};
-
-	serial@13820000 {
-		compatible = "samsung,exynos4210-uart";
-		reg = <0x13820000 0x100>;
-		interrupts = <0 54 0>;
-	};
-
-	serial@13830000 {
-		compatible = "samsung,exynos4210-uart";
-		reg = <0x13830000 0x100>;
-		interrupts = <0 55 0>;
-	};
-
-	i2c@13860000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x13860000 0x100>;
-		interrupts = <0 58 0>;
-	};
-
-	i2c@13870000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x13870000 0x100>;
-		interrupts = <0 59 0>;
-	};
-
-	i2c@13880000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x13880000 0x100>;
-		interrupts = <0 60 0>;
-	};
-
-	i2c@13890000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x13890000 0x100>;
-		interrupts = <0 61 0>;
-	};
-
-	i2c@138A0000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x138A0000 0x100>;
-		interrupts = <0 62 0>;
-	};
-
-	i2c@138B0000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x138B0000 0x100>;
-		interrupts = <0 63 0>;
-	};
-
-	i2c@138C0000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x138C0000 0x100>;
-		interrupts = <0 64 0>;
-	};
-
-	i2c@138D0000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x138D0000 0x100>;
-		interrupts = <0 65 0>;
-	};
-
-	amba {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "arm,amba-bus";
-		interrupt-parent = <&gic>;
-		ranges;
-
-		pdma0: pdma@12680000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x12680000 0x1000>;
-			interrupts = <0 35 0>;
-		};
-
-		pdma1: pdma@12690000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x12690000 0x1000>;
-			interrupts = <0 36 0>;
-		};
-	};
-
-	gpio-controllers {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		gpio-controller;
-		ranges;
-
-		gpa0: gpio-controller@11400000 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400000 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpa1: gpio-controller@11400020 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400020 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpb: gpio-controller@11400040 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400040 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpc0: gpio-controller@11400060 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400060 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpc1: gpio-controller@11400080 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400080 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpd0: gpio-controller@114000A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114000A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpd1: gpio-controller@114000C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114000C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe0: gpio-controller@114000E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114000E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe1: gpio-controller@11400100 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400100 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe2: gpio-controller@11400120 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400120 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe3: gpio-controller@11400140 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400140 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe4: gpio-controller@11400160 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400160 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpf0: gpio-controller@11400180 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400180 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpf1: gpio-controller@114001A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114001A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpf2: gpio-controller@114001C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114001C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpf3: gpio-controller@114001E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114001E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpj0: gpio-controller@11000000 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000000 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpj1: gpio-controller@11000020 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000020 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpk0: gpio-controller@11000040 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000040 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpk1: gpio-controller@11000060 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000060 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpk2: gpio-controller@11000080 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000080 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpk3: gpio-controller@110000A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110000A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpl0: gpio-controller@110000C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110000C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpl1: gpio-controller@110000E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110000E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpl2: gpio-controller@11000100 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000100 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy0: gpio-controller@11000120 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000120 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy1: gpio-controller@11000140 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000140 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy2: gpio-controller@11000160 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000160 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy3: gpio-controller@11000180 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000180 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy4: gpio-controller@110001A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110001A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy5: gpio-controller@110001C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110001C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy6: gpio-controller@110001E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x110001E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx0: gpio-controller@11000C00 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000C00 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx1: gpio-controller@11000C20 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000C20 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx2: gpio-controller@11000C40 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000C40 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx3: gpio-controller@11000C60 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11000C60 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpz: gpio-controller@03860000 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x03860000 0x20>;
-			#gpio-cells = <4>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/exynos5250-smdk5250.dts b/ANDROID_3.4.5/arch/arm/boot/dts/exynos5250-smdk5250.dts
deleted file mode 100644
index 399d17b2..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * SAMSUNG SMDK5250 board device tree source
- *
- * Copyright (c) 2012 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/dts-v1/;
-/include/ "exynos5250.dtsi"
-
-/ {
-	model = "SAMSUNG SMDK5250 board based on EXYNOS5250";
-	compatible = "samsung,smdk5250", "samsung,exynos5250";
-
-	memory {
-		reg = <0x40000000 0x80000000>;
-	};
-
-	chosen {
-		bootargs = "root=/dev/ram0 rw ramdisk=8192 console=ttySAC1,115200";
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/exynos5250.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/exynos5250.dtsi
deleted file mode 100644
index dfc43359..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/exynos5250.dtsi
+++ /dev/null
@@ -1,413 +0,0 @@
-/*
- * SAMSUNG EXYNOS5250 SoC device tree source
- *
- * Copyright (c) 2012 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
- * EXYNOS5250 based board files can include this file and provide
- * values for board specfic bindings.
- *
- * Note: This file does not include device nodes for all the controllers in
- * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
- * additional nodes can be added to this file.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/include/ "skeleton.dtsi"
-
-/ {
-	compatible = "samsung,exynos5250";
-	interrupt-parent = <&gic>;
-
-	gic:interrupt-controller@10490000 {
-		compatible = "arm,cortex-a9-gic";
-		#interrupt-cells = <3>;
-		interrupt-controller;
-		reg = <0x10490000 0x1000>, <0x10480000 0x100>;
-	};
-
-	watchdog {
-		compatible = "samsung,s3c2410-wdt";
-		reg = <0x101D0000 0x100>;
-		interrupts = <0 42 0>;
-	};
-
-	rtc {
-		compatible = "samsung,s3c6410-rtc";
-		reg = <0x101E0000 0x100>;
-		interrupts = <0 43 0>, <0 44 0>;
-	};
-
-	sdhci@12200000 {
-		compatible = "samsung,exynos4210-sdhci";
-		reg = <0x12200000 0x100>;
-		interrupts = <0 75 0>;
-	};
-
-	sdhci@12210000 {
-		compatible = "samsung,exynos4210-sdhci";
-		reg = <0x12210000 0x100>;
-		interrupts = <0 76 0>;
-	};
-
-	sdhci@12220000 {
-		compatible = "samsung,exynos4210-sdhci";
-		reg = <0x12220000 0x100>;
-		interrupts = <0 77 0>;
-	};
-
-	sdhci@12230000 {
-		compatible = "samsung,exynos4210-sdhci";
-		reg = <0x12230000 0x100>;
-		interrupts = <0 78 0>;
-	};
-
-	serial@12C00000 {
-		compatible = "samsung,exynos4210-uart";
-		reg = <0x12C00000 0x100>;
-		interrupts = <0 51 0>;
-	};
-
-	serial@12C10000 {
-		compatible = "samsung,exynos4210-uart";
-		reg = <0x12C10000 0x100>;
-		interrupts = <0 52 0>;
-	};
-
-	serial@12C20000 {
-		compatible = "samsung,exynos4210-uart";
-		reg = <0x12C20000 0x100>;
-		interrupts = <0 53 0>;
-	};
-
-	serial@12C30000 {
-		compatible = "samsung,exynos4210-uart";
-		reg = <0x12C30000 0x100>;
-		interrupts = <0 54 0>;
-	};
-
-	i2c@12C60000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x12C60000 0x100>;
-		interrupts = <0 56 0>;
-	};
-
-	i2c@12C70000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x12C70000 0x100>;
-		interrupts = <0 57 0>;
-	};
-
-	i2c@12C80000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x12C80000 0x100>;
-		interrupts = <0 58 0>;
-	};
-
-	i2c@12C90000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x12C90000 0x100>;
-		interrupts = <0 59 0>;
-	};
-
-	i2c@12CA0000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x12CA0000 0x100>;
-		interrupts = <0 60 0>;
-	};
-
-	i2c@12CB0000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x12CB0000 0x100>;
-		interrupts = <0 61 0>;
-	};
-
-	i2c@12CC0000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x12CC0000 0x100>;
-		interrupts = <0 62 0>;
-	};
-
-	i2c@12CD0000 {
-		compatible = "samsung,s3c2440-i2c";
-		reg = <0x12CD0000 0x100>;
-		interrupts = <0 63 0>;
-	};
-
-	amba {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "arm,amba-bus";
-		interrupt-parent = <&gic>;
-		ranges;
-
-		pdma0: pdma@121A0000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x121A0000 0x1000>;
-			interrupts = <0 34 0>;
-		};
-
-		pdma1: pdma@121B0000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x121B0000 0x1000>;
-			interrupts = <0 35 0>;
-		};
-
-		mdma0: pdma@10800000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x10800000 0x1000>;
-			interrupts = <0 33 0>;
-		};
-
-		mdma1: pdma@11C10000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x11C10000 0x1000>;
-			interrupts = <0 124 0>;
-		};
-	};
-
-	gpio-controllers {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		gpio-controller;
-		ranges;
-
-		gpa0: gpio-controller@11400000 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400000 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpa1: gpio-controller@11400020 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400020 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpa2: gpio-controller@11400040 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400040 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpb0: gpio-controller@11400060 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400060 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpb1: gpio-controller@11400080 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400080 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpb2: gpio-controller@114000A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114000A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpb3: gpio-controller@114000C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114000C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpc0: gpio-controller@114000E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114000E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpc1: gpio-controller@11400100 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400100 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpc2: gpio-controller@11400120 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400120 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpc3: gpio-controller@11400140 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400140 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpd0: gpio-controller@11400160 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400160 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpd1: gpio-controller@11400180 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400180 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy0: gpio-controller@114001A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114001A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy1: gpio-controller@114001C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114001C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy2: gpio-controller@114001E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x114001E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy3: gpio-controller@11400200 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400200 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy4: gpio-controller@11400220 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400220 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy5: gpio-controller@11400240 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400240 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpy6: gpio-controller@11400260 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400260 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx0: gpio-controller@11400C00 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400C00 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx1: gpio-controller@11400C20 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400C20 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx2: gpio-controller@11400C40 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400C40 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpx3: gpio-controller@11400C60 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x11400C60 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe0: gpio-controller@13400000 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x13400000 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpe1: gpio-controller@13400020 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x13400020 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpf0: gpio-controller@13400040 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x13400040 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpf1: gpio-controller@13400060 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x13400060 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpg0: gpio-controller@13400080 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x13400080 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpg1: gpio-controller@134000A0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x134000A0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpg2: gpio-controller@134000C0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x134000C0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gph0: gpio-controller@134000E0 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x134000E0 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gph1: gpio-controller@13400100 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x13400100 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpv0: gpio-controller@10D10000 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x10D10000 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpv1: gpio-controller@10D10020 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x10D10020 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpv2: gpio-controller@10D10040 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x10D10040 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpv3: gpio-controller@10D10060 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x10D10060 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpv4: gpio-controller@10D10080 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x10D10080 0x20>;
-			#gpio-cells = <4>;
-		};
-
-		gpz: gpio-controller@03860000 {
-			compatible = "samsung,exynos4-gpio";
-			reg = <0x03860000 0x20>;
-			#gpio-cells = <4>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/highbank.dts b/ANDROID_3.4.5/arch/arm/boot/dts/highbank.dts
deleted file mode 100644
index 83e72294..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/highbank.dts
+++ /dev/null
@@ -1,209 +0,0 @@
-/*
- * Copyright 2011 Calxeda, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/dts-v1/;
-
-/* First 4KB has pen for secondary cores. */
-/memreserve/ 0x00000000 0x0001000;
-
-/ {
-	model = "Calxeda Highbank";
-	compatible = "calxeda,highbank";
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			compatible = "arm,cortex-a9";
-			reg = <0>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@1 {
-			compatible = "arm,cortex-a9";
-			reg = <1>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@2 {
-			compatible = "arm,cortex-a9";
-			reg = <2>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@3 {
-			compatible = "arm,cortex-a9";
-			reg = <3>;
-			next-level-cache = <&L2>;
-		};
-	};
-
-	memory {
-		name = "memory";
-		device_type = "memory";
-		reg = <0x00000000 0xff900000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyAMA0";
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&intc>;
-		ranges;
-
-		timer@fff10600 {
-			compatible = "arm,cortex-a9-twd-timer";
-			reg = <0xfff10600 0x20>;
-			interrupts = <1 13 0xf01>;
-		};
-
-		watchdog@fff10620 {
-			compatible = "arm,cortex-a9-twd-wdt";
-			reg = <0xfff10620 0x20>;
-			interrupts = <1 14 0xf01>;
-		};
-
-		intc: interrupt-controller@fff11000 {
-			compatible = "arm,cortex-a9-gic";
-			#interrupt-cells = <3>;
-			#size-cells = <0>;
-			#address-cells = <1>;
-			interrupt-controller;
-			reg = <0xfff11000 0x1000>,
-			      <0xfff10100 0x100>;
-		};
-
-		L2: l2-cache {
-			compatible = "arm,pl310-cache";
-			reg = <0xfff12000 0x1000>;
-			interrupts = <0 70 4>;
-			cache-unified;
-			cache-level = <2>;
-		};
-
-		pmu {
-			compatible = "arm,cortex-a9-pmu";
-			interrupts = <0 76 4  0 75 4  0 74 4  0 73 4>;
-		};
-
-		sata@ffe08000 {
-			compatible = "calxeda,hb-ahci";
-			reg = <0xffe08000 0x10000>;
-			interrupts = <0 83 4>;
-		};
-
-		sdhci@ffe0e000 {
-			compatible = "calxeda,hb-sdhci";
-			reg = <0xffe0e000 0x1000>;
-			interrupts = <0 90 4>;
-		};
-
-		ipc@fff20000 {
-			compatible = "arm,pl320", "arm,primecell";
-			reg = <0xfff20000 0x1000>;
-			interrupts = <0 7 4>;
-		};
-
-		gpioe: gpio@fff30000 {
-			#gpio-cells = <2>;
-			compatible = "arm,pl061", "arm,primecell";
-			gpio-controller;
-			reg = <0xfff30000 0x1000>;
-			interrupts = <0 14 4>;
-		};
-
-		gpiof: gpio@fff31000 {
-			#gpio-cells = <2>;
-			compatible = "arm,pl061", "arm,primecell";
-			gpio-controller;
-			reg = <0xfff31000 0x1000>;
-			interrupts = <0 15 4>;
-		};
-
-		gpiog: gpio@fff32000 {
-			#gpio-cells = <2>;
-			compatible = "arm,pl061", "arm,primecell";
-			gpio-controller;
-			reg = <0xfff32000 0x1000>;
-			interrupts = <0 16 4>;
-		};
-
-		gpioh: gpio@fff33000 {
-			#gpio-cells = <2>;
-			compatible = "arm,pl061", "arm,primecell";
-			gpio-controller;
-			reg = <0xfff33000 0x1000>;
-			interrupts = <0 17 4>;
-		};
-
-		timer {
-			compatible = "arm,sp804", "arm,primecell";
-			reg = <0xfff34000 0x1000>;
-			interrupts = <0 18 4>;
-		};
-
-		rtc@fff35000 {
-			compatible = "arm,pl031", "arm,primecell";
-			reg = <0xfff35000 0x1000>;
-			interrupts = <0 19 4>;
-		};
-
-		serial@fff36000 {
-			compatible = "arm,pl011", "arm,primecell";
-			reg = <0xfff36000 0x1000>;
-			interrupts = <0 20 4>;
-		};
-
-		smic@fff3a000 {
-			compatible = "ipmi-smic";
-			device_type = "ipmi";
-			reg = <0xfff3a000 0x1000>;
-			interrupts = <0 24 4>;
-			reg-size = <4>;
-			reg-spacing = <4>;
-		};
-
-		sregs@fff3c000 {
-			compatible = "calxeda,hb-sregs";
-			reg = <0xfff3c000 0x1000>;
-		};
-
-		dma@fff3d000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0xfff3d000 0x1000>;
-			interrupts = <0 92 4>;
-		};
-
-		ethernet@fff50000 {
-			compatible = "calxeda,hb-xgmac";
-			reg = <0xfff50000 0x1000>;
-			interrupts = <0 77 4  0 78 4  0 79 4>;
-		};
-
-		ethernet@fff51000 {
-			compatible = "calxeda,hb-xgmac";
-			reg = <0xfff51000 0x1000>;
-			interrupts = <0 80 4  0 81 4  0 82 4>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx27-phytec-phycore.dts b/ANDROID_3.4.5/arch/arm/boot/dts/imx27-phytec-phycore.dts
deleted file mode 100644
index a51a08fc..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx27-phytec-phycore.dts
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * Copyright 2012 Sascha Hauer, Pengutronix
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-/include/ "imx27.dtsi"
-
-/ {
-	model = "Phytec pcm038";
-	compatible = "phytec,imx27-pcm038", "fsl,imx27";
-
-	memory {
-		reg = <0x0 0x0>;
-	};
-
-	soc {
-		aipi@10000000 { /* aipi */
-
-			wdog@10002000 {
-				status = "okay";
-			};
-
-			uart@1000a000 {
-				fsl,uart-has-rtscts;
-				status = "okay";
-			};
-
-			uart@1000b000 {
-				fsl,uart-has-rtscts;
-				status = "okay";
-			};
-
-			uart@1000c000 {
-				fsl,uart-has-rtscts;
-				status = "okay";
-			};
-
-			fec@1002b000 {
-				status = "okay";
-			};
-
-			i2c@1001d000 {
-				clock-frequency = <400000>;
-				status = "okay";
-				at24@4c {
-					compatible = "at,24c32";
-					pagesize = <32>;
-					reg = <0x52>;
-				};
-				pcf8563@51 {
-					compatible = "nxp,pcf8563";
-					reg = <0x51>;
-				};
-				lm75@4a {
-					compatible = "national,lm75";
-					reg = <0x4a>;
-				};
-			};
-		};
-	};
-
-	nor_flash@c0000000 {
-		compatible = "cfi-flash";
-		bank-width = <2>;
-		reg = <0xc0000000 0x02000000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx27.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/imx27.dtsi
deleted file mode 100644
index bc5e7d5d..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx27.dtsi
+++ /dev/null
@@ -1,217 +0,0 @@
-/*
- * Copyright 2012 Sascha Hauer, Pengutronix
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		serial3 = &uart4;
-		serial4 = &uart5;
-		serial5 = &uart6;
-	};
-
-	avic: avic-interrupt-controller@e0000000 {
-		compatible = "fsl,imx27-avic", "fsl,avic";
-		interrupt-controller;
-		#interrupt-cells = <1>;
-		reg = <0x10040000 0x1000>;
-	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		osc26m {
-			compatible = "fsl,imx-osc26m", "fixed-clock";
-			clock-frequency = <26000000>;
-		};
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&avic>;
-		ranges;
-
-		aipi@10000000 { /* AIPI1 */
-			compatible = "fsl,aipi-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x10000000 0x10000000>;
-			ranges;
-
-			wdog@10002000 {
-				compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
-				reg = <0x10002000 0x4000>;
-				interrupts = <27>;
-				status = "disabled";
-			};
-
-			uart1: uart@1000a000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1000a000 0x1000>;
-				interrupts = <20>;
-				status = "disabled";
-			};
-
-			uart2: uart@1000b000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1000b000 0x1000>;
-				interrupts = <19>;
-				status = "disabled";
-			};
-
-			uart3: uart@1000c000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1000c000 0x1000>;
-				interrupts = <18>;
-				status = "disabled";
-			};
-
-			uart4: uart@1000d000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1000d000 0x1000>;
-				interrupts = <17>;
-				status = "disabled";
-			};
-
-			cspi1: cspi@1000e000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx27-cspi";
-				reg = <0x1000e000 0x1000>;
-				interrupts = <16>;
-				status = "disabled";
-			};
-
-			cspi2: cspi@1000f000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx27-cspi";
-				reg = <0x1000f000 0x1000>;
-				interrupts = <15>;
-				status = "disabled";
-			};
-
-			i2c1: i2c@10012000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
-				reg = <0x10012000 0x1000>;
-				interrupts = <12>;
-				status = "disabled";
-			};
-
-			gpio1: gpio@10015000 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015000 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio2: gpio@10015100 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015100 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio3: gpio@10015200 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015200 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio4: gpio@10015300 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015300 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio5: gpio@10015400 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015400 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio6: gpio@10015500 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015500 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			cspi3: cspi@10017000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx27-cspi";
-				reg = <0x10017000 0x1000>;
-				interrupts = <6>;
-				status = "disabled";
-			};
-
-			uart5: uart@1001b000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1001b000 0x1000>;
-				interrupts = <49>;
-				status = "disabled";
-			};
-
-			uart6: uart@1001c000 {
-				compatible = "fsl,imx27-uart", "fsl,imx21-uart";
-				reg = <0x1001c000 0x1000>;
-				interrupts = <48>;
-				status = "disabled";
-			};
-
-			i2c2: i2c@1001d000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
-				reg = <0x1001d000 0x1000>;
-				interrupts = <1>;
-				status = "disabled";
-			};
-
-			fec: fec@1002b000 {
-				compatible = "fsl,imx27-fec";
-				reg = <0x1002b000 0x4000>;
-				interrupts = <50>;
-				status = "disabled";
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx51-babbage.dts b/ANDROID_3.4.5/arch/arm/boot/dts/imx51-babbage.dts
deleted file mode 100644
index 9949e606..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx51-babbage.dts
+++ /dev/null
@@ -1,221 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-/include/ "imx51.dtsi"
-
-/ {
-	model = "Freescale i.MX51 Babbage Board";
-	compatible = "fsl,imx51-babbage", "fsl,imx51";
-
-	chosen {
-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
-	};
-
-	memory {
-		reg = <0x90000000 0x20000000>;
-	};
-
-	soc {
-		aips@70000000 { /* aips-1 */
-			spba@70000000 {
-				esdhc@70004000 { /* ESDHC1 */
-					fsl,cd-internal;
-					fsl,wp-internal;
-					status = "okay";
-				};
-
-				esdhc@70008000 { /* ESDHC2 */
-					cd-gpios = <&gpio1 6 0>;
-					wp-gpios = <&gpio1 5 0>;
-					status = "okay";
-				};
-
-				uart3: uart@7000c000 {
-					fsl,uart-has-rtscts;
-					status = "okay";
-				};
-
-				ecspi@70010000 { /* ECSPI1 */
-					fsl,spi-num-chipselects = <2>;
-					cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
-					status = "okay";
-
-					pmic: mc13892@0 {
-						#address-cells = <1>;
-						#size-cells = <0>;
-						compatible = "fsl,mc13892";
-						spi-max-frequency = <6000000>;
-						reg = <0>;
-						interrupt-parent = <&gpio1>;
-						interrupts = <8>;
-
-						regulators {
-							sw1_reg: sw1 {
-								regulator-min-microvolt = <600000>;
-								regulator-max-microvolt = <1375000>;
-								regulator-boot-on;
-								regulator-always-on;
-							};
-
-							sw2_reg: sw2 {
-								regulator-min-microvolt = <900000>;
-								regulator-max-microvolt = <1850000>;
-								regulator-boot-on;
-								regulator-always-on;
-							};
-
-							sw3_reg: sw3 {
-								regulator-min-microvolt = <1100000>;
-								regulator-max-microvolt = <1850000>;
-								regulator-boot-on;
-								regulator-always-on;
-							};
-
-							sw4_reg: sw4 {
-								regulator-min-microvolt = <1100000>;
-								regulator-max-microvolt = <1850000>;
-								regulator-boot-on;
-								regulator-always-on;
-							};
-
-							vpll_reg: vpll {
-								regulator-min-microvolt = <1050000>;
-								regulator-max-microvolt = <1800000>;
-								regulator-boot-on;
-								regulator-always-on;
-							};
-
-							vdig_reg: vdig {
-								regulator-min-microvolt = <1650000>;
-								regulator-max-microvolt = <1650000>;
-								regulator-boot-on;
-							};
-
-							vsd_reg: vsd {
-								regulator-min-microvolt = <1800000>;
-								regulator-max-microvolt = <3150000>;
-							};
-
-							vusb2_reg: vusb2 {
-								regulator-min-microvolt = <2400000>;
-								regulator-max-microvolt = <2775000>;
-								regulator-boot-on;
-								regulator-always-on;
-							};
-
-							vvideo_reg: vvideo {
-								regulator-min-microvolt = <2775000>;
-								regulator-max-microvolt = <2775000>;
-							};
-
-							vaudio_reg: vaudio {
-								regulator-min-microvolt = <2300000>;
-								regulator-max-microvolt = <3000000>;
-							};
-
-							vcam_reg: vcam {
-								regulator-min-microvolt = <2500000>;
-								regulator-max-microvolt = <3000000>;
-							};
-
-							vgen1_reg: vgen1 {
-								regulator-min-microvolt = <1200000>;
-								regulator-max-microvolt = <1200000>;
-							};
-
-							vgen2_reg: vgen2 {
-								regulator-min-microvolt = <1200000>;
-								regulator-max-microvolt = <3150000>;
-								regulator-always-on;
-							};
-
-							vgen3_reg: vgen3 {
-								regulator-min-microvolt = <1800000>;
-								regulator-max-microvolt = <2900000>;
-								regulator-always-on;
-							};
-						};
-					};
-
-					flash: at45db321d@1 {
-						#address-cells = <1>;
-						#size-cells = <1>;
-						compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
-						spi-max-frequency = <25000000>;
-						reg = <1>;
-
-						partition@0 {
-							label = "U-Boot";
-							reg = <0x0 0x40000>;
-							read-only;
-						};
-
-						partition@40000 {
-							label = "Kernel";
-							reg = <0x40000 0x3c0000>;
-						};
-					};
-				};
-			};
-
-			wdog@73f98000 { /* WDOG1 */
-				status = "okay";
-			};
-
-			iomuxc@73fa8000 {
-				compatible = "fsl,imx51-iomuxc-babbage";
-				reg = <0x73fa8000 0x4000>;
-			};
-
-			uart1: uart@73fbc000 {
-				fsl,uart-has-rtscts;
-				status = "okay";
-			};
-
-			uart2: uart@73fc0000 {
-				status = "okay";
-			};
-		};
-
-		aips@80000000 {	/* aips-2 */
-			sdma@83fb0000 {
-				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
-			};
-
-			i2c@83fc4000 { /* I2C2 */
-				status = "okay";
-
-				codec: sgtl5000@0a {
-					compatible = "fsl,sgtl5000";
-					reg = <0x0a>;
-				};
-			};
-
-			fec@83fec000 {
-				phy-mode = "mii";
-				status = "okay";
-			};
-		};
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		power {
-			label = "Power Button";
-			gpios = <&gpio2 21 0>;
-			linux,code = <116>; /* KEY_POWER */
-			gpio-key,wakeup;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx51.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/imx51.dtsi
deleted file mode 100644
index 6663986f..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx51.dtsi
+++ /dev/null
@@ -1,246 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-	};
-
-	tzic: tz-interrupt-controller@e0000000 {
-		compatible = "fsl,imx51-tzic", "fsl,tzic";
-		interrupt-controller;
-		#interrupt-cells = <1>;
-		reg = <0xe0000000 0x4000>;
-	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		ckil {
-			compatible = "fsl,imx-ckil", "fixed-clock";
-			clock-frequency = <32768>;
-		};
-
-		ckih1 {
-			compatible = "fsl,imx-ckih1", "fixed-clock";
-			clock-frequency = <22579200>;
-		};
-
-		ckih2 {
-			compatible = "fsl,imx-ckih2", "fixed-clock";
-			clock-frequency = <0>;
-		};
-
-		osc {
-			compatible = "fsl,imx-osc", "fixed-clock";
-			clock-frequency = <24000000>;
-		};
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&tzic>;
-		ranges;
-
-		aips@70000000 { /* AIPS1 */
-			compatible = "fsl,aips-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x70000000 0x10000000>;
-			ranges;
-
-			spba@70000000 {
-				compatible = "fsl,spba-bus", "simple-bus";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0x70000000 0x40000>;
-				ranges;
-
-				esdhc@70004000 { /* ESDHC1 */
-					compatible = "fsl,imx51-esdhc";
-					reg = <0x70004000 0x4000>;
-					interrupts = <1>;
-					status = "disabled";
-				};
-
-				esdhc@70008000 { /* ESDHC2 */
-					compatible = "fsl,imx51-esdhc";
-					reg = <0x70008000 0x4000>;
-					interrupts = <2>;
-					status = "disabled";
-				};
-
-				uart3: uart@7000c000 {
-					compatible = "fsl,imx51-uart", "fsl,imx21-uart";
-					reg = <0x7000c000 0x4000>;
-					interrupts = <33>;
-					status = "disabled";
-				};
-
-				ecspi@70010000 { /* ECSPI1 */
-					#address-cells = <1>;
-					#size-cells = <0>;
-					compatible = "fsl,imx51-ecspi";
-					reg = <0x70010000 0x4000>;
-					interrupts = <36>;
-					status = "disabled";
-				};
-
-				esdhc@70020000 { /* ESDHC3 */
-					compatible = "fsl,imx51-esdhc";
-					reg = <0x70020000 0x4000>;
-					interrupts = <3>;
-					status = "disabled";
-				};
-
-				esdhc@70024000 { /* ESDHC4 */
-					compatible = "fsl,imx51-esdhc";
-					reg = <0x70024000 0x4000>;
-					interrupts = <4>;
-					status = "disabled";
-				};
-			};
-
-			gpio1: gpio@73f84000 {
-				compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
-				reg = <0x73f84000 0x4000>;
-				interrupts = <50 51>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio2: gpio@73f88000 {
-				compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
-				reg = <0x73f88000 0x4000>;
-				interrupts = <52 53>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio3: gpio@73f8c000 {
-				compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
-				reg = <0x73f8c000 0x4000>;
-				interrupts = <54 55>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio4: gpio@73f90000 {
-				compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
-				reg = <0x73f90000 0x4000>;
-				interrupts = <56 57>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			wdog@73f98000 { /* WDOG1 */
-				compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
-				reg = <0x73f98000 0x4000>;
-				interrupts = <58>;
-				status = "disabled";
-			};
-
-			wdog@73f9c000 { /* WDOG2 */
-				compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
-				reg = <0x73f9c000 0x4000>;
-				interrupts = <59>;
-				status = "disabled";
-			};
-
-			uart1: uart@73fbc000 {
-				compatible = "fsl,imx51-uart", "fsl,imx21-uart";
-				reg = <0x73fbc000 0x4000>;
-				interrupts = <31>;
-				status = "disabled";
-			};
-
-			uart2: uart@73fc0000 {
-				compatible = "fsl,imx51-uart", "fsl,imx21-uart";
-				reg = <0x73fc0000 0x4000>;
-				interrupts = <32>;
-				status = "disabled";
-			};
-		};
-
-		aips@80000000 {	/* AIPS2 */
-			compatible = "fsl,aips-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x80000000 0x10000000>;
-			ranges;
-
-			ecspi@83fac000 { /* ECSPI2 */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx51-ecspi";
-				reg = <0x83fac000 0x4000>;
-				interrupts = <37>;
-				status = "disabled";
-			};
-
-			sdma@83fb0000 {
-				compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
-				reg = <0x83fb0000 0x4000>;
-				interrupts = <6>;
-			};
-
-			cspi@83fc0000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
-				reg = <0x83fc0000 0x4000>;
-				interrupts = <38>;
-				status = "disabled";
-			};
-
-			i2c@83fc4000 { /* I2C2 */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
-				reg = <0x83fc4000 0x4000>;
-				interrupts = <63>;
-				status = "disabled";
-			};
-
-			i2c@83fc8000 { /* I2C1 */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
-				reg = <0x83fc8000 0x4000>;
-				interrupts = <62>;
-				status = "disabled";
-			};
-
-			fec@83fec000 {
-				compatible = "fsl,imx51-fec", "fsl,imx27-fec";
-				reg = <0x83fec000 0x4000>;
-				interrupts = <87>;
-				status = "disabled";
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx53-ard.dts b/ANDROID_3.4.5/arch/arm/boot/dts/imx53-ard.dts
deleted file mode 100644
index 2dccce46..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx53-ard.dts
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-/include/ "imx53.dtsi"
-
-/ {
-	model = "Freescale i.MX53 Automotive Reference Design Board";
-	compatible = "fsl,imx53-ard", "fsl,imx53";
-
-	chosen {
-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
-	};
-
-	memory {
-		reg = <0x70000000 0x40000000>;
-	};
-
-	soc {
-		aips@50000000 { /* AIPS1 */
-			spba@50000000 {
-				esdhc@50004000 { /* ESDHC1 */
-					cd-gpios = <&gpio1 1 0>;
-					wp-gpios = <&gpio1 9 0>;
-					status = "okay";
-				};
-			};
-
-			wdog@53f98000 { /* WDOG1 */
-				status = "okay";
-			};
-
-			iomuxc@53fa8000 {
-				compatible = "fsl,imx53-iomuxc-ard";
-				reg = <0x53fa8000 0x4000>;
-			};
-
-			uart1: uart@53fbc000 {
-				status = "okay";
-			};
-		};
-
-		aips@60000000 {	/* AIPS2 */
-			sdma@63fb0000 {
-				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
-			};
-		};
-	};
-
-	eim-cs1@f4000000 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "fsl,eim-bus", "simple-bus";
-		reg = <0xf4000000 0x3ff0000>;
-		ranges;
-
-		lan9220@f4000000 {
-			compatible = "smsc,lan9220", "smsc,lan9115";
-			reg = <0xf4000000 0x2000000>;
-			phy-mode = "mii";
-			interrupt-parent = <&gpio2>;
-			interrupts = <31>;
-			reg-io-width = <4>;
-			smsc,irq-push-pull;
-		};
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		home {
-			label = "Home";
-			gpios = <&gpio5 10 0>;
-			linux,code = <102>; /* KEY_HOME */
-			gpio-key,wakeup;
-		};
-
-		back {
-			label = "Back";
-			gpios = <&gpio5 11 0>;
-			linux,code = <158>; /* KEY_BACK */
-			gpio-key,wakeup;
-		};
-
-		program {
-			label = "Program";
-			gpios = <&gpio5 12 0>;
-			linux,code = <362>; /* KEY_PROGRAM */
-			gpio-key,wakeup;
-		};
-
-		volume-up {
-			label = "Volume Up";
-			gpios = <&gpio5 13 0>;
-			linux,code = <115>; /* KEY_VOLUMEUP */
-		};
-
-		volume-down {
-			label = "Volume Down";
-			gpios = <&gpio4 0 0>;
-			linux,code = <114>; /* KEY_VOLUMEDOWN */
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx53-evk.dts b/ANDROID_3.4.5/arch/arm/boot/dts/imx53-evk.dts
deleted file mode 100644
index 5bac4aa4..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx53-evk.dts
+++ /dev/null
@@ -1,119 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-/include/ "imx53.dtsi"
-
-/ {
-	model = "Freescale i.MX53 Evaluation Kit";
-	compatible = "fsl,imx53-evk", "fsl,imx53";
-
-	chosen {
-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
-	};
-
-	memory {
-		reg = <0x70000000 0x80000000>;
-	};
-
-	soc {
-		aips@50000000 { /* AIPS1 */
-			spba@50000000 {
-				esdhc@50004000 { /* ESDHC1 */
-					cd-gpios = <&gpio3 13 0>;
-					wp-gpios = <&gpio3 14 0>;
-					status = "okay";
-				};
-
-				ecspi@50010000 { /* ECSPI1 */
-					fsl,spi-num-chipselects = <2>;
-					cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
-					status = "okay";
-
-					flash: at45db321d@1 {
-						#address-cells = <1>;
-						#size-cells = <1>;
-						compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
-						spi-max-frequency = <25000000>;
-						reg = <1>;
-
-						partition@0 {
-							label = "U-Boot";
-							reg = <0x0 0x40000>;
-							read-only;
-						};
-
-						partition@40000 {
-							label = "Kernel";
-							reg = <0x40000 0x3c0000>;
-						};
-					};
-				};
-
-				esdhc@50020000 { /* ESDHC3 */
-					cd-gpios = <&gpio3 11 0>;
-					wp-gpios = <&gpio3 12 0>;
-					status = "okay";
-				};
-			};
-
-			wdog@53f98000 { /* WDOG1 */
-				status = "okay";
-			};
-
-			iomuxc@53fa8000 {
-				compatible = "fsl,imx53-iomuxc-evk";
-				reg = <0x53fa8000 0x4000>;
-			};
-
-			uart1: uart@53fbc000 {
-				status = "okay";
-			};
-		};
-
-		aips@60000000 {	/* AIPS2 */
-			sdma@63fb0000 {
-				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
-			};
-
-			i2c@63fc4000 { /* I2C2 */
-				status = "okay";
-
-				pmic: mc13892@08 {
-					compatible = "fsl,mc13892", "fsl,mc13xxx";
-					reg = <0x08>;
-				};
-
-				codec: sgtl5000@0a {
-					compatible = "fsl,sgtl5000";
-					reg = <0x0a>;
-				};
-			};
-
-			fec@63fec000 {
-				phy-mode = "rmii";
-				phy-reset-gpios = <&gpio7 6 0>;
-				status = "okay";
-			};
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		green {
-			label = "Heartbeat";
-			gpios = <&gpio7 7 0>;
-			linux,default-trigger = "heartbeat";
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx53-qsb.dts b/ANDROID_3.4.5/arch/arm/boot/dts/imx53-qsb.dts
deleted file mode 100644
index 5c57c867..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx53-qsb.dts
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-/include/ "imx53.dtsi"
-
-/ {
-	model = "Freescale i.MX53 Quick Start Board";
-	compatible = "fsl,imx53-qsb", "fsl,imx53";
-
-	chosen {
-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
-	};
-
-	memory {
-		reg = <0x70000000 0x40000000>;
-	};
-
-	soc {
-		aips@50000000 { /* AIPS1 */
-			spba@50000000 {
-				esdhc@50004000 { /* ESDHC1 */
-					cd-gpios = <&gpio3 13 0>;
-					status = "okay";
-				};
-
-				esdhc@50020000 { /* ESDHC3 */
-					cd-gpios = <&gpio3 11 0>;
-					wp-gpios = <&gpio3 12 0>;
-					status = "okay";
-				};
-			};
-
-			wdog@53f98000 { /* WDOG1 */
-				status = "okay";
-			};
-
-			iomuxc@53fa8000 {
-				compatible = "fsl,imx53-iomuxc-qsb";
-				reg = <0x53fa8000 0x4000>;
-			};
-
-			uart1: uart@53fbc000 {
-				status = "okay";
-			};
-		};
-
-		aips@60000000 {	/* AIPS2 */
-			sdma@63fb0000 {
-				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
-			};
-
-			i2c@63fc4000 { /* I2C2 */
-				status = "okay";
-
-				codec: sgtl5000@0a {
-					compatible = "fsl,sgtl5000";
-					reg = <0x0a>;
-				};
-			};
-
-			i2c@63fc8000 { /* I2C1 */
-				status = "okay";
-
-				accelerometer: mma8450@1c {
-					compatible = "fsl,mma8450";
-					reg = <0x1c>;
-				};
-
-				pmic: dialog@48 {
-					compatible = "dialog,da9053", "dialog,da9052";
-					reg = <0x48>;
-				};
-			};
-
-			fec@63fec000 {
-				phy-mode = "rmii";
-				phy-reset-gpios = <&gpio7 6 0>;
-				status = "okay";
-			};
-		};
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		power {
-			label = "Power Button";
-			gpios = <&gpio1 8 0>;
-			linux,code = <116>; /* KEY_POWER */
-			gpio-key,wakeup;
-		};
-
-		volume-up {
-			label = "Volume Up";
-			gpios = <&gpio2 14 0>;
-			linux,code = <115>; /* KEY_VOLUMEUP */
-		};
-
-		volume-down {
-			label = "Volume Down";
-			gpios = <&gpio2 15 0>;
-			linux,code = <114>; /* KEY_VOLUMEDOWN */
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		user {
-			label = "Heartbeat";
-			gpios = <&gpio7 7 0>;
-			linux,default-trigger = "heartbeat";
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx53-smd.dts b/ANDROID_3.4.5/arch/arm/boot/dts/imx53-smd.dts
deleted file mode 100644
index c7ee86c2..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx53-smd.dts
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-/include/ "imx53.dtsi"
-
-/ {
-	model = "Freescale i.MX53 Smart Mobile Reference Design Board";
-	compatible = "fsl,imx53-smd", "fsl,imx53";
-
-	chosen {
-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
-	};
-
-	memory {
-		reg = <0x70000000 0x40000000>;
-	};
-
-	soc {
-		aips@50000000 { /* AIPS1 */
-			spba@50000000 {
-				esdhc@50004000 { /* ESDHC1 */
-					cd-gpios = <&gpio3 13 0>;
-					wp-gpios = <&gpio4 11 0>;
-					status = "okay";
-				};
-
-				esdhc@50008000 { /* ESDHC2 */
-					fsl,card-wired;
-					status = "okay";
-				};
-
-				uart3: uart@5000c000 {
-					fsl,uart-has-rtscts;
-					status = "okay";
-				};
-
-				ecspi@50010000 { /* ECSPI1 */
-					fsl,spi-num-chipselects = <2>;
-					cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
-					status = "okay";
-
-					zigbee: mc1323@0 {
-						compatible = "fsl,mc1323";
-						spi-max-frequency = <8000000>;
-						reg = <0>;
-					};
-
-					flash: m25p32@1 {
-						#address-cells = <1>;
-						#size-cells = <1>;
-						compatible = "st,m25p32", "st,m25p";
-						spi-max-frequency = <20000000>;
-						reg = <1>;
-
-						partition@0 {
-							label = "U-Boot";
-							reg = <0x0 0x40000>;
-							read-only;
-						};
-
-						partition@40000 {
-							label = "Kernel";
-							reg = <0x40000 0x3c0000>;
-						};
-					};
-				};
-
-				esdhc@50020000 { /* ESDHC3 */
-					fsl,card-wired;
-					status = "okay";
-				};
-			};
-
-			wdog@53f98000 { /* WDOG1 */
-				status = "okay";
-			};
-
-			iomuxc@53fa8000 {
-				compatible = "fsl,imx53-iomuxc-smd";
-				reg = <0x53fa8000 0x4000>;
-			};
-
-			uart1: uart@53fbc000 {
-				status = "okay";
-			};
-
-			uart2: uart@53fc0000 {
-				status = "okay";
-			};
-		};
-
-		aips@60000000 {	/* AIPS2 */
-			sdma@63fb0000 {
-				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
-			};
-
-			i2c@63fc4000 { /* I2C2 */
-				status = "okay";
-
-				codec: sgtl5000@0a {
-					compatible = "fsl,sgtl5000";
-					reg = <0x0a>;
-				};
-
-				magnetometer: mag3110@0e {
-					compatible = "fsl,mag3110";
-					reg = <0x0e>;
-				};
-
-				touchkey: mpr121@5a {
-					compatible = "fsl,mpr121";
-					reg = <0x5a>;
-				};
-			};
-
-			i2c@63fc8000 { /* I2C1 */
-				status = "okay";
-
-				accelerometer: mma8450@1c {
-					compatible = "fsl,mma8450";
-					reg = <0x1c>;
-				};
-
-				camera: ov5642@3c {
-					compatible = "ovti,ov5642";
-					reg = <0x3c>;
-				};
-
-				pmic: dialog@48 {
-					compatible = "dialog,da9053", "dialog,da9052";
-					reg = <0x48>;
-				};
-			};
-
-			fec@63fec000 {
-				phy-mode = "rmii";
-				phy-reset-gpios = <&gpio7 6 0>;
-				status = "okay";
-			};
-		};
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		volume-up {
-			label = "Volume Up";
-			gpios = <&gpio2 14 0>;
-			linux,code = <115>; /* KEY_VOLUMEUP */
-		};
-
-		volume-down {
-			label = "Volume Down";
-			gpios = <&gpio2 15 0>;
-			linux,code = <114>; /* KEY_VOLUMEDOWN */
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx53.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/imx53.dtsi
deleted file mode 100644
index 5dd91b94..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx53.dtsi
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		serial3 = &uart4;
-		serial4 = &uart5;
-	};
-
-	tzic: tz-interrupt-controller@0fffc000 {
-		compatible = "fsl,imx53-tzic", "fsl,tzic";
-		interrupt-controller;
-		#interrupt-cells = <1>;
-		reg = <0x0fffc000 0x4000>;
-	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		ckil {
-			compatible = "fsl,imx-ckil", "fixed-clock";
-			clock-frequency = <32768>;
-		};
-
-		ckih1 {
-			compatible = "fsl,imx-ckih1", "fixed-clock";
-			clock-frequency = <22579200>;
-		};
-
-		ckih2 {
-			compatible = "fsl,imx-ckih2", "fixed-clock";
-			clock-frequency = <0>;
-		};
-
-		osc {
-			compatible = "fsl,imx-osc", "fixed-clock";
-			clock-frequency = <24000000>;
-		};
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&tzic>;
-		ranges;
-
-		aips@50000000 { /* AIPS1 */
-			compatible = "fsl,aips-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x50000000 0x10000000>;
-			ranges;
-
-			spba@50000000 {
-				compatible = "fsl,spba-bus", "simple-bus";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0x50000000 0x40000>;
-				ranges;
-
-				esdhc@50004000 { /* ESDHC1 */
-					compatible = "fsl,imx53-esdhc";
-					reg = <0x50004000 0x4000>;
-					interrupts = <1>;
-					status = "disabled";
-				};
-
-				esdhc@50008000 { /* ESDHC2 */
-					compatible = "fsl,imx53-esdhc";
-					reg = <0x50008000 0x4000>;
-					interrupts = <2>;
-					status = "disabled";
-				};
-
-				uart3: uart@5000c000 {
-					compatible = "fsl,imx53-uart", "fsl,imx21-uart";
-					reg = <0x5000c000 0x4000>;
-					interrupts = <33>;
-					status = "disabled";
-				};
-
-				ecspi@50010000 { /* ECSPI1 */
-					#address-cells = <1>;
-					#size-cells = <0>;
-					compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
-					reg = <0x50010000 0x4000>;
-					interrupts = <36>;
-					status = "disabled";
-				};
-
-				esdhc@50020000 { /* ESDHC3 */
-					compatible = "fsl,imx53-esdhc";
-					reg = <0x50020000 0x4000>;
-					interrupts = <3>;
-					status = "disabled";
-				};
-
-				esdhc@50024000 { /* ESDHC4 */
-					compatible = "fsl,imx53-esdhc";
-					reg = <0x50024000 0x4000>;
-					interrupts = <4>;
-					status = "disabled";
-				};
-			};
-
-			gpio1: gpio@53f84000 {
-				compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
-				reg = <0x53f84000 0x4000>;
-				interrupts = <50 51>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio2: gpio@53f88000 {
-				compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
-				reg = <0x53f88000 0x4000>;
-				interrupts = <52 53>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio3: gpio@53f8c000 {
-				compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
-				reg = <0x53f8c000 0x4000>;
-				interrupts = <54 55>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio4: gpio@53f90000 {
-				compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
-				reg = <0x53f90000 0x4000>;
-				interrupts = <56 57>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			wdog@53f98000 { /* WDOG1 */
-				compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
-				reg = <0x53f98000 0x4000>;
-				interrupts = <58>;
-				status = "disabled";
-			};
-
-			wdog@53f9c000 { /* WDOG2 */
-				compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
-				reg = <0x53f9c000 0x4000>;
-				interrupts = <59>;
-				status = "disabled";
-			};
-
-			uart1: uart@53fbc000 {
-				compatible = "fsl,imx53-uart", "fsl,imx21-uart";
-				reg = <0x53fbc000 0x4000>;
-				interrupts = <31>;
-				status = "disabled";
-			};
-
-			uart2: uart@53fc0000 {
-				compatible = "fsl,imx53-uart", "fsl,imx21-uart";
-				reg = <0x53fc0000 0x4000>;
-				interrupts = <32>;
-				status = "disabled";
-			};
-
-			gpio5: gpio@53fdc000 {
-				compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
-				reg = <0x53fdc000 0x4000>;
-				interrupts = <103 104>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio6: gpio@53fe0000 {
-				compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
-				reg = <0x53fe0000 0x4000>;
-				interrupts = <105 106>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio7: gpio@53fe4000 {
-				compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
-				reg = <0x53fe4000 0x4000>;
-				interrupts = <107 108>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			i2c@53fec000 { /* I2C3 */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
-				reg = <0x53fec000 0x4000>;
-				interrupts = <64>;
-				status = "disabled";
-			};
-
-			uart4: uart@53ff0000 {
-				compatible = "fsl,imx53-uart", "fsl,imx21-uart";
-				reg = <0x53ff0000 0x4000>;
-				interrupts = <13>;
-				status = "disabled";
-			};
-		};
-
-		aips@60000000 {	/* AIPS2 */
-			compatible = "fsl,aips-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x60000000 0x10000000>;
-			ranges;
-
-			uart5: uart@63f90000 {
-				compatible = "fsl,imx53-uart", "fsl,imx21-uart";
-				reg = <0x63f90000 0x4000>;
-				interrupts = <86>;
-				status = "disabled";
-			};
-
-			ecspi@63fac000 { /* ECSPI2 */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
-				reg = <0x63fac000 0x4000>;
-				interrupts = <37>;
-				status = "disabled";
-			};
-
-			sdma@63fb0000 {
-				compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
-				reg = <0x63fb0000 0x4000>;
-				interrupts = <6>;
-			};
-
-			cspi@63fc0000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
-				reg = <0x63fc0000 0x4000>;
-				interrupts = <38>;
-				status = "disabled";
-			};
-
-			i2c@63fc4000 { /* I2C2 */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
-				reg = <0x63fc4000 0x4000>;
-				interrupts = <63>;
-				status = "disabled";
-			};
-
-			i2c@63fc8000 { /* I2C1 */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
-				reg = <0x63fc8000 0x4000>;
-				interrupts = <62>;
-				status = "disabled";
-			};
-
-			fec@63fec000 {
-				compatible = "fsl,imx53-fec", "fsl,imx25-fec";
-				reg = <0x63fec000 0x4000>;
-				interrupts = <87>;
-				status = "disabled";
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx6q-arm2.dts b/ANDROID_3.4.5/arch/arm/boot/dts/imx6q-arm2.dts
deleted file mode 100644
index ce1c8238..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx6q-arm2.dts
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-/include/ "imx6q.dtsi"
-
-/ {
-	model = "Freescale i.MX6 Quad Armadillo2 Board";
-	compatible = "fsl,imx6q-arm2", "fsl,imx6q";
-
-	chosen {
-		bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";
-	};
-
-	memory {
-		reg = <0x10000000 0x80000000>;
-	};
-
-	soc {
-		aips-bus@02100000 { /* AIPS2 */
-			enet@02188000 {
-				phy-mode = "rgmii";
-				local-mac-address = [00 04 9F 01 1B 61];
-				status = "okay";
-			};
-
-			usdhc@02198000 { /* uSDHC3 */
-				cd-gpios = <&gpio6 11 0>;
-				wp-gpios = <&gpio6 14 0>;
-				vmmc-supply = <&reg_3p3v>;
-				status = "okay";
-			};
-
-			usdhc@0219c000 { /* uSDHC4 */
-				fsl,card-wired;
-				vmmc-supply = <&reg_3p3v>;
-				status = "okay";
-			};
-
-			uart4: uart@021f0000 {
-				status = "okay";
-			};
-		};
-	};
-
-	regulators {
-		compatible = "simple-bus";
-
-		reg_3p3v: 3p3v {
-			compatible = "regulator-fixed";
-			regulator-name = "3P3V";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			regulator-always-on;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		debug-led {
-			label = "Heartbeat";
-			gpios = <&gpio3 25 0>;
-			linux,default-trigger = "heartbeat";
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx6q-sabrelite.dts b/ANDROID_3.4.5/arch/arm/boot/dts/imx6q-sabrelite.dts
deleted file mode 100644
index 4663a4e5..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-/include/ "imx6q.dtsi"
-
-/ {
-	model = "Freescale i.MX6 Quad SABRE Lite Board";
-	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
-
-	memory {
-		reg = <0x10000000 0x40000000>;
-	};
-
-	soc {
-		aips-bus@02100000 { /* AIPS2 */
-			enet@02188000 {
-				phy-mode = "rgmii";
-				phy-reset-gpios = <&gpio3 23 0>;
-				status = "okay";
-			};
-
-			usdhc@02198000 { /* uSDHC3 */
-				cd-gpios = <&gpio7 0 0>;
-				wp-gpios = <&gpio7 1 0>;
-				vmmc-supply = <&reg_3p3v>;
-				status = "okay";
-			};
-
-			usdhc@0219c000 { /* uSDHC4 */
-				cd-gpios = <&gpio2 6 0>;
-				wp-gpios = <&gpio2 7 0>;
-				vmmc-supply = <&reg_3p3v>;
-				status = "okay";
-			};
-
-			uart2: uart@021e8000 {
-				status = "okay";
-			};
-
-			i2c@021a0000 { /* I2C1 */
-				status = "okay";
-				clock-frequency = <100000>;
-
-				codec: sgtl5000@0a {
-					compatible = "fsl,sgtl5000";
-					reg = <0x0a>;
-					VDDA-supply = <&reg_2p5v>;
-					VDDIO-supply = <&reg_3p3v>;
-				};
-			};
-		};
-	};
-
-	regulators {
-		compatible = "simple-bus";
-
-		reg_2p5v: 2p5v {
-			compatible = "regulator-fixed";
-			regulator-name = "2P5V";
-			regulator-min-microvolt = <2500000>;
-			regulator-max-microvolt = <2500000>;
-			regulator-always-on;
-		};
-
-		reg_3p3v: 3p3v {
-			compatible = "regulator-fixed";
-			regulator-name = "3P3V";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			regulator-always-on;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/imx6q.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/imx6q.dtsi
deleted file mode 100644
index 4905f51a..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/imx6q.dtsi
+++ /dev/null
@@ -1,575 +0,0 @@
-/*
- * Copyright 2011 Freescale Semiconductor, Inc.
- * Copyright 2011 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		serial3 = &uart4;
-		serial4 = &uart5;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			compatible = "arm,cortex-a9";
-			reg = <0>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@1 {
-			compatible = "arm,cortex-a9";
-			reg = <1>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@2 {
-			compatible = "arm,cortex-a9";
-			reg = <2>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@3 {
-			compatible = "arm,cortex-a9";
-			reg = <3>;
-			next-level-cache = <&L2>;
-		};
-	};
-
-	intc: interrupt-controller@00a01000 {
-		compatible = "arm,cortex-a9-gic";
-		#interrupt-cells = <3>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		interrupt-controller;
-		reg = <0x00a01000 0x1000>,
-		      <0x00a00100 0x100>;
-	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		ckil {
-			compatible = "fsl,imx-ckil", "fixed-clock";
-			clock-frequency = <32768>;
-		};
-
-		ckih1 {
-			compatible = "fsl,imx-ckih1", "fixed-clock";
-			clock-frequency = <0>;
-		};
-
-		osc {
-			compatible = "fsl,imx-osc", "fixed-clock";
-			clock-frequency = <24000000>;
-		};
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&intc>;
-		ranges;
-
-		timer@00a00600 {
-			compatible = "arm,cortex-a9-twd-timer";
-			reg = <0x00a00600 0x20>;
-			interrupts = <1 13 0xf01>;
-		};
-
-		L2: l2-cache@00a02000 {
-			compatible = "arm,pl310-cache";
-			reg = <0x00a02000 0x1000>;
-			interrupts = <0 92 0x04>;
-			cache-unified;
-			cache-level = <2>;
-		};
-
-		aips-bus@02000000 { /* AIPS1 */
-			compatible = "fsl,aips-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x02000000 0x100000>;
-			ranges;
-
-			spba-bus@02000000 {
-				compatible = "fsl,spba-bus", "simple-bus";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0x02000000 0x40000>;
-				ranges;
-
-				spdif@02004000 {
-					reg = <0x02004000 0x4000>;
-					interrupts = <0 52 0x04>;
-				};
-
-				ecspi@02008000 { /* eCSPI1 */
-					#address-cells = <1>;
-					#size-cells = <0>;
-					compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
-					reg = <0x02008000 0x4000>;
-					interrupts = <0 31 0x04>;
-					status = "disabled";
-				};
-
-				ecspi@0200c000 { /* eCSPI2 */
-					#address-cells = <1>;
-					#size-cells = <0>;
-					compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
-					reg = <0x0200c000 0x4000>;
-					interrupts = <0 32 0x04>;
-					status = "disabled";
-				};
-
-				ecspi@02010000 { /* eCSPI3 */
-					#address-cells = <1>;
-					#size-cells = <0>;
-					compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
-					reg = <0x02010000 0x4000>;
-					interrupts = <0 33 0x04>;
-					status = "disabled";
-				};
-
-				ecspi@02014000 { /* eCSPI4 */
-					#address-cells = <1>;
-					#size-cells = <0>;
-					compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
-					reg = <0x02014000 0x4000>;
-					interrupts = <0 34 0x04>;
-					status = "disabled";
-				};
-
-				ecspi@02018000 { /* eCSPI5 */
-					#address-cells = <1>;
-					#size-cells = <0>;
-					compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
-					reg = <0x02018000 0x4000>;
-					interrupts = <0 35 0x04>;
-					status = "disabled";
-				};
-
-				uart1: uart@02020000 {
-					compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
-					reg = <0x02020000 0x4000>;
-					interrupts = <0 26 0x04>;
-					status = "disabled";
-				};
-
-				esai@02024000 {
-					reg = <0x02024000 0x4000>;
-					interrupts = <0 51 0x04>;
-				};
-
-				ssi@02028000 { /* SSI1 */
-					reg = <0x02028000 0x4000>;
-					interrupts = <0 46 0x04>;
-				};
-
-				ssi@0202c000 { /* SSI2 */
-					reg = <0x0202c000 0x4000>;
-					interrupts = <0 47 0x04>;
-				};
-
-				ssi@02030000 { /* SSI3 */
-					reg = <0x02030000 0x4000>;
-					interrupts = <0 48 0x04>;
-				};
-
-				asrc@02034000 {
-					reg = <0x02034000 0x4000>;
-					interrupts = <0 50 0x04>;
-				};
-
-				spba@0203c000 {
-					reg = <0x0203c000 0x4000>;
-				};
-			};
-
-			vpu@02040000 {
-				reg = <0x02040000 0x3c000>;
-				interrupts = <0 3 0x04 0 12 0x04>;
-			};
-
-			aipstz@0207c000 { /* AIPSTZ1 */
-				reg = <0x0207c000 0x4000>;
-			};
-
-			pwm@02080000 { /* PWM1 */
-				reg = <0x02080000 0x4000>;
-				interrupts = <0 83 0x04>;
-			};
-
-			pwm@02084000 { /* PWM2 */
-				reg = <0x02084000 0x4000>;
-				interrupts = <0 84 0x04>;
-			};
-
-			pwm@02088000 { /* PWM3 */
-				reg = <0x02088000 0x4000>;
-				interrupts = <0 85 0x04>;
-			};
-
-			pwm@0208c000 { /* PWM4 */
-				reg = <0x0208c000 0x4000>;
-				interrupts = <0 86 0x04>;
-			};
-
-			flexcan@02090000 { /* CAN1 */
-				reg = <0x02090000 0x4000>;
-				interrupts = <0 110 0x04>;
-			};
-
-			flexcan@02094000 { /* CAN2 */
-				reg = <0x02094000 0x4000>;
-				interrupts = <0 111 0x04>;
-			};
-
-			gpt@02098000 {
-				compatible = "fsl,imx6q-gpt";
-				reg = <0x02098000 0x4000>;
-				interrupts = <0 55 0x04>;
-			};
-
-			gpio1: gpio@0209c000 {
-				compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
-				reg = <0x0209c000 0x4000>;
-				interrupts = <0 66 0x04 0 67 0x04>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio2: gpio@020a0000 {
-				compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
-				reg = <0x020a0000 0x4000>;
-				interrupts = <0 68 0x04 0 69 0x04>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio3: gpio@020a4000 {
-				compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
-				reg = <0x020a4000 0x4000>;
-				interrupts = <0 70 0x04 0 71 0x04>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio4: gpio@020a8000 {
-				compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
-				reg = <0x020a8000 0x4000>;
-				interrupts = <0 72 0x04 0 73 0x04>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio5: gpio@020ac000 {
-				compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
-				reg = <0x020ac000 0x4000>;
-				interrupts = <0 74 0x04 0 75 0x04>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio6: gpio@020b0000 {
-				compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
-				reg = <0x020b0000 0x4000>;
-				interrupts = <0 76 0x04 0 77 0x04>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			gpio7: gpio@020b4000 {
-				compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
-				reg = <0x020b4000 0x4000>;
-				interrupts = <0 78 0x04 0 79 0x04>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			kpp@020b8000 {
-				reg = <0x020b8000 0x4000>;
-				interrupts = <0 82 0x04>;
-			};
-
-			wdog@020bc000 { /* WDOG1 */
-				compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
-				reg = <0x020bc000 0x4000>;
-				interrupts = <0 80 0x04>;
-				status = "disabled";
-			};
-
-			wdog@020c0000 { /* WDOG2 */
-				compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
-				reg = <0x020c0000 0x4000>;
-				interrupts = <0 81 0x04>;
-				status = "disabled";
-			};
-
-			ccm@020c4000 {
-				compatible = "fsl,imx6q-ccm";
-				reg = <0x020c4000 0x4000>;
-				interrupts = <0 87 0x04 0 88 0x04>;
-			};
-
-			anatop@020c8000 {
-				compatible = "fsl,imx6q-anatop";
-				reg = <0x020c8000 0x1000>;
-				interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;
-			};
-
-			usbphy@020c9000 { /* USBPHY1 */
-				reg = <0x020c9000 0x1000>;
-				interrupts = <0 44 0x04>;
-			};
-
-			usbphy@020ca000 { /* USBPHY2 */
-				reg = <0x020ca000 0x1000>;
-				interrupts = <0 45 0x04>;
-			};
-
-			snvs@020cc000 {
-				reg = <0x020cc000 0x4000>;
-				interrupts = <0 19 0x04 0 20 0x04>;
-			};
-
-			epit@020d0000 { /* EPIT1 */
-				reg = <0x020d0000 0x4000>;
-				interrupts = <0 56 0x04>;
-			};
-
-			epit@020d4000 { /* EPIT2 */
-				reg = <0x020d4000 0x4000>;
-				interrupts = <0 57 0x04>;
-			};
-
-			src@020d8000 {
-				compatible = "fsl,imx6q-src";
-				reg = <0x020d8000 0x4000>;
-				interrupts = <0 91 0x04 0 96 0x04>;
-			};
-
-			gpc@020dc000 {
-				compatible = "fsl,imx6q-gpc";
-				reg = <0x020dc000 0x4000>;
-				interrupts = <0 89 0x04 0 90 0x04>;
-			};
-
-			iomuxc@020e0000 {
-				reg = <0x020e0000 0x4000>;
-			};
-
-			dcic@020e4000 { /* DCIC1 */
-				reg = <0x020e4000 0x4000>;
-				interrupts = <0 124 0x04>;
-			};
-
-			dcic@020e8000 { /* DCIC2 */
-				reg = <0x020e8000 0x4000>;
-				interrupts = <0 125 0x04>;
-			};
-
-			sdma@020ec000 {
-				compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
-				reg = <0x020ec000 0x4000>;
-				interrupts = <0 2 0x04>;
-			};
-		};
-
-		aips-bus@02100000 { /* AIPS2 */
-			compatible = "fsl,aips-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x02100000 0x100000>;
-			ranges;
-
-			caam@02100000 {
-				reg = <0x02100000 0x40000>;
-				interrupts = <0 105 0x04 0 106 0x04>;
-			};
-
-			aipstz@0217c000 { /* AIPSTZ2 */
-				reg = <0x0217c000 0x4000>;
-			};
-
-			enet@02188000 {
-				compatible = "fsl,imx6q-fec";
-				reg = <0x02188000 0x4000>;
-				interrupts = <0 118 0x04 0 119 0x04>;
-				status = "disabled";
-			};
-
-			mlb@0218c000 {
-				reg = <0x0218c000 0x4000>;
-				interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
-			};
-
-			usdhc@02190000 { /* uSDHC1 */
-				compatible = "fsl,imx6q-usdhc";
-				reg = <0x02190000 0x4000>;
-				interrupts = <0 22 0x04>;
-				status = "disabled";
-			};
-
-			usdhc@02194000 { /* uSDHC2 */
-				compatible = "fsl,imx6q-usdhc";
-				reg = <0x02194000 0x4000>;
-				interrupts = <0 23 0x04>;
-				status = "disabled";
-			};
-
-			usdhc@02198000 { /* uSDHC3 */
-				compatible = "fsl,imx6q-usdhc";
-				reg = <0x02198000 0x4000>;
-				interrupts = <0 24 0x04>;
-				status = "disabled";
-			};
-
-			usdhc@0219c000 { /* uSDHC4 */
-				compatible = "fsl,imx6q-usdhc";
-				reg = <0x0219c000 0x4000>;
-				interrupts = <0 25 0x04>;
-				status = "disabled";
-			};
-
-			i2c@021a0000 { /* I2C1 */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
-				reg = <0x021a0000 0x4000>;
-				interrupts = <0 36 0x04>;
-				status = "disabled";
-			};
-
-			i2c@021a4000 { /* I2C2 */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
-				reg = <0x021a4000 0x4000>;
-				interrupts = <0 37 0x04>;
-				status = "disabled";
-			};
-
-			i2c@021a8000 { /* I2C3 */
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
-				reg = <0x021a8000 0x4000>;
-				interrupts = <0 38 0x04>;
-				status = "disabled";
-			};
-
-			romcp@021ac000 {
-				reg = <0x021ac000 0x4000>;
-			};
-
-			mmdc@021b0000 { /* MMDC0 */
-				compatible = "fsl,imx6q-mmdc";
-				reg = <0x021b0000 0x4000>;
-			};
-
-			mmdc@021b4000 { /* MMDC1 */
-				reg = <0x021b4000 0x4000>;
-			};
-
-			weim@021b8000 {
-				reg = <0x021b8000 0x4000>;
-				interrupts = <0 14 0x04>;
-			};
-
-			ocotp@021bc000 {
-				reg = <0x021bc000 0x4000>;
-			};
-
-			ocotp@021c0000 {
-				reg = <0x021c0000 0x4000>;
-				interrupts = <0 21 0x04>;
-			};
-
-			tzasc@021d0000 { /* TZASC1 */
-				reg = <0x021d0000 0x4000>;
-				interrupts = <0 108 0x04>;
-			};
-
-			tzasc@021d4000 { /* TZASC2 */
-				reg = <0x021d4000 0x4000>;
-				interrupts = <0 109 0x04>;
-			};
-
-			audmux@021d8000 {
-				reg = <0x021d8000 0x4000>;
-			};
-
-			mipi@021dc000 { /* MIPI-CSI */
-				reg = <0x021dc000 0x4000>;
-			};
-
-			mipi@021e0000 { /* MIPI-DSI */
-				reg = <0x021e0000 0x4000>;
-			};
-
-			vdoa@021e4000 {
-				reg = <0x021e4000 0x4000>;
-				interrupts = <0 18 0x04>;
-			};
-
-			uart2: uart@021e8000 {
-				compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
-				reg = <0x021e8000 0x4000>;
-				interrupts = <0 27 0x04>;
-				status = "disabled";
-			};
-
-			uart3: uart@021ec000 {
-				compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
-				reg = <0x021ec000 0x4000>;
-				interrupts = <0 28 0x04>;
-				status = "disabled";
-			};
-
-			uart4: uart@021f0000 {
-				compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
-				reg = <0x021f0000 0x4000>;
-				interrupts = <0 29 0x04>;
-				status = "disabled";
-			};
-
-			uart5: uart@021f4000 {
-				compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
-				reg = <0x021f4000 0x4000>;
-				interrupts = <0 30 0x04>;
-				status = "disabled";
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/kirkwood-dreamplug.dts b/ANDROID_3.4.5/arch/arm/boot/dts/kirkwood-dreamplug.dts
deleted file mode 100644
index a5376b84..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ /dev/null
@@ -1,24 +0,0 @@
-/dts-v1/;
-
-/include/ "kirkwood.dtsi"
-
-/ {
-	model = "Globalscale Technologies Dreamplug";
-	compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "mrvl,kirkwood-88f6281", "mrvl,kirkwood";
-
-	memory {
-		device_type = "memory";
-		reg = <0x00000000 0x20000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyS0,115200n8 earlyprintk";
-	};
-
-	ocp@f1000000 {
-		serial@12000 {
-			clock-frequency = <200000000>;
-			status = "ok";
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/kirkwood.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/kirkwood.dtsi
deleted file mode 100644
index 3474ef89..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/kirkwood.dtsi
+++ /dev/null
@@ -1,36 +0,0 @@
-/include/ "skeleton.dtsi"
-
-/ {
-	compatible = "mrvl,kirkwood";
-
-	ocp@f1000000 {
-		compatible = "simple-bus";
-		ranges = <0 0xf1000000 0x1000000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		serial@12000 {
-			compatible = "ns16550a";
-			reg = <0x12000 0x100>;
-			reg-shift = <2>;
-			interrupts = <33>;
-			/* set clock-frequency in board dts */
-			status = "disabled";
-		};
-
-		serial@12100 {
-			compatible = "ns16550a";
-			reg = <0x12100 0x100>;
-			reg-shift = <2>;
-			interrupts = <34>;
-			/* set clock-frequency in board dts */
-			status = "disabled";
-		};
-
-		rtc@10300 {
-			compatible = "mrvl,kirkwood-rtc", "mrvl,orion-rtc";
-			reg = <0x10300 0x20>;
-			interrupts = <53>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/msm8660-surf.dts b/ANDROID_3.4.5/arch/arm/boot/dts/msm8660-surf.dts
deleted file mode 100644
index 45bc4bb0..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/msm8660-surf.dts
+++ /dev/null
@@ -1,24 +0,0 @@
-/dts-v1/;
-
-/include/ "skeleton.dtsi"
-
-/ {
-	model = "Qualcomm MSM8660 SURF";
-	compatible = "qcom,msm8660-surf", "qcom,msm8660";
-	interrupt-parent = <&intc>;
-
-	intc: interrupt-controller@02080000 {
-		compatible = "qcom,msm-8660-qgic";
-		interrupt-controller;
-		#interrupt-cells = <3>;
-		reg = < 0x02080000 0x1000 >,
-		      < 0x02081000 0x1000 >;
-	};
-
-	serial@19c400000 {
-		compatible = "qcom,msm-hsuart", "qcom,msm-uart";
-		reg = <0x19c40000 0x1000>,
-		      <0x19c00000 0x1000>;
-		interrupts = <0 195 0x0>;
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/omap2.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/omap2.dtsi
deleted file mode 100644
index f2ab4ea7..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/omap2.dtsi
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Device Tree Source for OMAP2 SoC
- *
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2.  This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
-
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-	};
-
-	cpus {
-		cpu@0 {
-			compatible = "arm,arm1136jf-s";
-		};
-	};
-
-	soc {
-		compatible = "ti,omap-infra";
-		mpu {
-			compatible = "ti,omap2-mpu";
-			ti,hwmods = "mpu";
-		};
-	};
-
-	ocp {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		ti,hwmods = "l3_main";
-
-		intc: interrupt-controller@1 {
-			compatible = "ti,omap2-intc";
-			interrupt-controller;
-			#interrupt-cells = <1>;
-		};
-
-		uart1: serial@4806a000 {
-			compatible = "ti,omap2-uart";
-			ti,hwmods = "uart1";
-			clock-frequency = <48000000>;
-		};
-
-		uart2: serial@4806c000 {
-			compatible = "ti,omap2-uart";
-			ti,hwmods = "uart2";
-			clock-frequency = <48000000>;
-		};
-
-		uart3: serial@4806e000 {
-			compatible = "ti,omap2-uart";
-			ti,hwmods = "uart3";
-			clock-frequency = <48000000>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/omap3-beagle.dts b/ANDROID_3.4.5/arch/arm/boot/dts/omap3-beagle.dts
deleted file mode 100644
index 9f72cd4c..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/omap3-beagle.dts
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/dts-v1/;
-
-/include/ "omap3.dtsi"
-
-/ {
-	model = "TI OMAP3 BeagleBoard";
-	compatible = "ti,omap3-beagle", "ti,omap3";
-
-	memory {
-		device_type = "memory";
-		reg = <0x80000000 0x20000000>; /* 512 MB */
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/omap3-evm.dts b/ANDROID_3.4.5/arch/arm/boot/dts/omap3-evm.dts
deleted file mode 100644
index 2eee16ec..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/omap3-evm.dts
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/dts-v1/;
-
-/include/ "omap3.dtsi"
-
-/ {
-	model = "TI OMAP3 EVM (OMAP3530, AM/DM37x)";
-	compatible = "ti,omap3-evm", "ti,omap3";
-
-	memory {
-		device_type = "memory";
-		reg = <0x80000000 0x10000000>; /* 256 MB */
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/omap3.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/omap3.dtsi
deleted file mode 100644
index c6121357..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/omap3.dtsi
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Device Tree Source for OMAP3 SoC
- *
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2.  This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	compatible = "ti,omap3430", "ti,omap3";
-
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		serial3 = &uart4;
-	};
-
-	cpus {
-		cpu@0 {
-			compatible = "arm,cortex-a8";
-		};
-	};
-
-	/*
-	 * The soc node represents the soc top level view. It is uses for IPs
-	 * that are not memory mapped in the MPU view or for the MPU itself.
-	 */
-	soc {
-		compatible = "ti,omap-infra";
-		mpu {
-			compatible = "ti,omap3-mpu";
-			ti,hwmods = "mpu";
-		};
-
-		iva {
-			compatible = "ti,iva2.2";
-			ti,hwmods = "iva";
-
-			dsp {
-				compatible = "ti,omap3-c64";
-			};
-		};
-	};
-
-	/*
-	 * XXX: Use a flat representation of the OMAP3 interconnect.
-	 * The real OMAP interconnect network is quite complex.
-	 * Since that will not bring real advantage to represent that in DT for
-	 * the moment, just use a fake OCP bus entry to represent the whole bus
-	 * hierarchy.
-	 */
-	ocp {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		ti,hwmods = "l3_main";
-
-		intc: interrupt-controller@48200000 {
-			compatible = "ti,omap2-intc";
-			interrupt-controller;
-			#interrupt-cells = <1>;
-			ti,intc-size = <96>;
-			reg = <0x48200000 0x1000>;
-		};
-
-		uart1: serial@4806a000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart1";
-			clock-frequency = <48000000>;
-		};
-
-		uart2: serial@4806c000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart2";
-			clock-frequency = <48000000>;
-		};
-
-		uart3: serial@49020000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart3";
-			clock-frequency = <48000000>;
-		};
-
-		uart4: serial@49042000 {
-			compatible = "ti,omap3-uart";
-			ti,hwmods = "uart4";
-			clock-frequency = <48000000>;
-		};
-
-		i2c1: i2c@48070000 {
-			compatible = "ti,omap3-i2c";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			ti,hwmods = "i2c1";
-		};
-
-		i2c2: i2c@48072000 {
-			compatible = "ti,omap3-i2c";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			ti,hwmods = "i2c2";
-		};
-
-		i2c3: i2c@48060000 {
-			compatible = "ti,omap3-i2c";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			ti,hwmods = "i2c3";
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/omap4-panda.dts b/ANDROID_3.4.5/arch/arm/boot/dts/omap4-panda.dts
deleted file mode 100644
index 9755ad59..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/omap4-panda.dts
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/dts-v1/;
-
-/include/ "omap4.dtsi"
-
-/ {
-	model = "TI OMAP4 PandaBoard";
-	compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4";
-
-	memory {
-		device_type = "memory";
-		reg = <0x80000000 0x40000000>; /* 1 GB */
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/omap4-sdp.dts b/ANDROID_3.4.5/arch/arm/boot/dts/omap4-sdp.dts
deleted file mode 100644
index 63c6b2b2..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/omap4-sdp.dts
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-/dts-v1/;
-
-/include/ "omap4.dtsi"
-
-/ {
-	model = "TI OMAP4 SDP board";
-	compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4";
-
-	memory {
-		device_type = "memory";
-		reg = <0x80000000 0x40000000>; /* 1 GB */
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/omap4.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/omap4.dtsi
deleted file mode 100644
index 3d35559e..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/omap4.dtsi
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/*
- * Carveout for multimedia usecases
- * It should be the last 48MB of the first 512MB memory part
- * In theory, it should not even exist. That zone should be reserved
- * dynamically during the .reserve callback.
- */
-/memreserve/ 0x9d000000 0x03000000;
-
-/include/ "skeleton.dtsi"
-
-/ {
-	compatible = "ti,omap4430", "ti,omap4";
-	interrupt-parent = <&gic>;
-
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		serial3 = &uart4;
-	};
-
-	cpus {
-		cpu@0 {
-			compatible = "arm,cortex-a9";
-		};
-		cpu@1 {
-			compatible = "arm,cortex-a9";
-		};
-	};
-
-	/*
-	 * The soc node represents the soc top level view. It is uses for IPs
-	 * that are not memory mapped in the MPU view or for the MPU itself.
-	 */
-	soc {
-		compatible = "ti,omap-infra";
-		mpu {
-			compatible = "ti,omap4-mpu";
-			ti,hwmods = "mpu";
-		};
-
-		dsp {
-			compatible = "ti,omap3-c64";
-			ti,hwmods = "dsp";
-		};
-
-		iva {
-			compatible = "ti,ivahd";
-			ti,hwmods = "iva";
-		};
-	};
-
-	/*
-	 * XXX: Use a flat representation of the OMAP4 interconnect.
-	 * The real OMAP interconnect network is quite complex.
-	 *
-	 * MPU -+-- MPU_PRIVATE - GIC, L2
-	 *      |
-	 *      +----------------+----------+
-	 *      |                |          |
-	 *      +            +- EMIF - DDR  |
-	 *      |            |              |
-	 *      |            +     +--------+
-	 *      |            |     |
-	 *      |            +- L4_ABE - AESS, MCBSP, TIMERs...
-	 *      |            |
-	 *      +- L3_MAIN --+- L4_CORE - IPs...
-	 *                   |
-	 *                   +- L4_PER - IPs...
-	 *                   |
-	 *                   +- L4_CFG -+- L4_WKUP - IPs...
-	 *                   |          |
-	 *                   |          +- IPs...
-	 *                   +- IPU ----+
-	 *                   |          |
-	 *                   +- DSP ----+
-	 *                   |          |
-	 *                   +- DSS ----+
-	 *
-	 * Since that will not bring real advantage to represent that in DT for
-	 * the moment, just use a fake OCP bus entry to represent the whole bus
-	 * hierarchy.
-	 */
-	ocp {
-		compatible = "ti,omap4-l3-noc", "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-		ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
-
-		gic: interrupt-controller@48241000 {
-			compatible = "arm,cortex-a9-gic";
-			interrupt-controller;
-			#interrupt-cells = <3>;
-			reg = <0x48241000 0x1000>,
-			      <0x48240100 0x0100>;
-		};
-
-		uart1: serial@4806a000 {
-			compatible = "ti,omap4-uart";
-			ti,hwmods = "uart1";
-			clock-frequency = <48000000>;
-		};
-
-		uart2: serial@4806c000 {
-			compatible = "ti,omap4-uart";
-			ti,hwmods = "uart2";
-			clock-frequency = <48000000>;
-		};
-
-		uart3: serial@48020000 {
-			compatible = "ti,omap4-uart";
-			ti,hwmods = "uart3";
-			clock-frequency = <48000000>;
-		};
-
-		uart4: serial@4806e000 {
-			compatible = "ti,omap4-uart";
-			ti,hwmods = "uart4";
-			clock-frequency = <48000000>;
-		};
-
-		i2c1: i2c@48070000 {
-			compatible = "ti,omap4-i2c";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			ti,hwmods = "i2c1";
-		};
-
-		i2c2: i2c@48072000 {
-			compatible = "ti,omap4-i2c";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			ti,hwmods = "i2c2";
-		};
-
-		i2c3: i2c@48060000 {
-			compatible = "ti,omap4-i2c";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			ti,hwmods = "i2c3";
-		};
-
-		i2c4: i2c@48350000 {
-			compatible = "ti,omap4-i2c";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			ti,hwmods = "i2c4";
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc3x2.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
deleted file mode 100644
index f0a8c206..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc3x2.dtsi
+++ /dev/null
@@ -1,249 +0,0 @@
-/*
- *  Copyright (C) 2011 Picochip, Jamie Iles
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-/include/ "skeleton.dtsi"
-/ {
-	model = "Picochip picoXcell PC3X2";
-	compatible = "picochip,pc3x2";
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			compatible = "arm,1176jz-s";
-			clock-frequency = <400000000>;
-			reg = <0>;
-			d-cache-line-size = <32>;
-			d-cache-size = <32768>;
-			i-cache-line-size = <32>;
-			i-cache-size = <32768>;
-		};
-	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		pclk: clock@0 {
-			compatible = "fixed-clock";
-			clock-outputs = "bus", "pclk";
-			clock-frequency = <200000000>;
-			ref-clock = <&ref_clk>, "ref";
-		};
-	};
-
-	paxi {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0 0x80000000 0x400000>;
-
-		emac: gem@30000 {
-			compatible = "cadence,gem";
-			reg = <0x30000 0x10000>;
-			interrupts = <31>;
-		};
-
-		dmac1: dmac@40000 {
-			compatible = "snps,dw-dmac";
-			reg = <0x40000 0x10000>;
-			interrupts = <25>;
-		};
-
-		dmac2: dmac@50000 {
-			compatible = "snps,dw-dmac";
-			reg = <0x50000 0x10000>;
-			interrupts = <26>;
-		};
-
-		vic0: interrupt-controller@60000 {
-			compatible = "arm,pl192-vic";
-			interrupt-controller;
-			reg = <0x60000 0x1000>;
-			#interrupt-cells = <1>;
-		};
-
-		vic1: interrupt-controller@64000 {
-			compatible = "arm,pl192-vic";
-			interrupt-controller;
-			reg = <0x64000 0x1000>;
-			#interrupt-cells = <1>;
-		};
-
-		fuse: picoxcell-fuse@80000 {
-			compatible = "picoxcell,fuse-pc3x2";
-			reg = <0x80000 0x10000>;
-		};
-
-		ssi: picoxcell-spi@90000 {
-			compatible = "picoxcell,spi";
-			reg = <0x90000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <10>;
-		};
-
-		ipsec: spacc@100000 {
-			compatible = "picochip,spacc-ipsec";
-			reg = <0x100000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <24>;
-			ref-clock = <&pclk>, "ref";
-		};
-
-		srtp: spacc@140000 {
-			compatible = "picochip,spacc-srtp";
-			reg = <0x140000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <23>;
-		};
-
-		l2_engine: spacc@180000 {
-			compatible = "picochip,spacc-l2";
-			reg = <0x180000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <22>;
-			ref-clock = <&pclk>, "ref";
-		};
-
-		apb {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0 0x200000 0x80000>;
-
-			rtc0: rtc@00000 {
-				compatible = "picochip,pc3x2-rtc";
-				clock-freq = <200000000>;
-				reg = <0x00000 0xf>;
-				interrupt-parent = <&vic1>;
-				interrupts = <8>;
-			};
-
-			timer0: timer@10000 {
-				compatible = "picochip,pc3x2-timer";
-				interrupt-parent = <&vic0>;
-				interrupts = <4>;
-				clock-freq = <200000000>;
-				reg = <0x10000 0x14>;
-			};
-
-			timer1: timer@10014 {
-				compatible = "picochip,pc3x2-timer";
-				interrupt-parent = <&vic0>;
-				interrupts = <5>;
-				clock-freq = <200000000>;
-				reg = <0x10014 0x14>;
-			};
-
-			timer2: timer@10028 {
-				compatible = "picochip,pc3x2-timer";
-				interrupt-parent = <&vic0>;
-				interrupts = <6>;
-				clock-freq = <200000000>;
-				reg = <0x10028 0x14>;
-			};
-
-			timer3: timer@1003c {
-				compatible = "picochip,pc3x2-timer";
-				interrupt-parent = <&vic0>;
-				interrupts = <7>;
-				clock-freq = <200000000>;
-				reg = <0x1003c 0x14>;
-			};
-
-			gpio: gpio@20000 {
-				compatible = "snps,dw-apb-gpio";
-				reg = <0x20000 0x1000>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-				reg-io-width = <4>;
-
-				banka: gpio-controller@0 {
-					compatible = "snps,dw-apb-gpio-bank";
-					gpio-controller;
-					#gpio-cells = <2>;
-					gpio-generic,nr-gpio = <8>;
-
-					regoffset-dat = <0x50>;
-					regoffset-set = <0x00>;
-					regoffset-dirout = <0x04>;
-				};
-
-				bankb: gpio-controller@1 {
-					compatible = "snps,dw-apb-gpio-bank";
-					gpio-controller;
-					#gpio-cells = <2>;
-					gpio-generic,nr-gpio = <8>;
-
-					regoffset-dat = <0x54>;
-					regoffset-set = <0x0c>;
-					regoffset-dirout = <0x10>;
-				};
-			};
-
-			uart0: uart@30000 {
-				compatible = "snps,dw-apb-uart";
-				reg = <0x30000 0x1000>;
-				interrupt-parent = <&vic1>;
-				interrupts = <10>;
-				clock-frequency = <3686400>;
-				reg-shift = <2>;
-				reg-io-width = <4>;
-			};
-
-			uart1: uart@40000 {
-				compatible = "snps,dw-apb-uart";
-				reg = <0x40000 0x1000>;
-				interrupt-parent = <&vic1>;
-				interrupts = <9>;
-				clock-frequency = <3686400>;
-				reg-shift = <2>;
-				reg-io-width = <4>;
-			};
-
-			wdog: watchdog@50000 {
-				compatible = "snps,dw-apb-wdg";
-				reg = <0x50000 0x10000>;
-				interrupt-parent = <&vic0>;
-				interrupts = <11>;
-				bus-clock = <&pclk>, "bus";
-			};
-		};
-	};
-
-	rwid-axi {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		ranges;
-
-		ebi@50000000 {
-			compatible = "simple-bus";
-			#address-cells = <2>;
-			#size-cells = <1>;
-			ranges = <0 0 0x40000000 0x08000000
-				  1 0 0x48000000 0x08000000
-				  2 0 0x50000000 0x08000000
-				  3 0 0x58000000 0x08000000>;
-		};
-
-		axi2pico@c0000000 {
-			compatible = "picochip,axi2pico-pc3x2";
-			reg = <0xc0000000 0x10000>;
-			interrupts = <13 14 15 16 17 18 19 20 21>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc3x3.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc3x3.dtsi
deleted file mode 100644
index daa962d1..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc3x3.dtsi
+++ /dev/null
@@ -1,365 +0,0 @@
-/*
- *  Copyright (C) 2011 Picochip, Jamie Iles
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-/include/ "skeleton.dtsi"
-/ {
-	model = "Picochip picoXcell PC3X3";
-	compatible = "picochip,pc3x3";
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			compatible = "arm,1176jz-s";
-			cpu-clock = <&arm_clk>, "cpu";
-			reg = <0>;
-			d-cache-line-size = <32>;
-			d-cache-size = <32768>;
-			i-cache-line-size = <32>;
-			i-cache-size = <32768>;
-		};
-	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		clkgate: clkgate@800a0048 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x800a0048 4>;
-			compatible = "picochip,pc3x3-clk-gate";
-
-			tzprot_clk: clock@0 {
-				compatible = "picochip,pc3x3-gated-clk";
-				clock-outputs = "bus";
-				picochip,clk-disable-bit = <0>;
-				clock-frequency = <200000000>;
-				ref-clock = <&ref_clk>, "ref";
-			};
-
-			spi_clk: clock@1 {
-				compatible = "picochip,pc3x3-gated-clk";
-				clock-outputs = "bus";
-				picochip,clk-disable-bit = <1>;
-				clock-frequency = <200000000>;
-				ref-clock = <&ref_clk>, "ref";
-			};
-
-			dmac0_clk: clock@2 {
-				compatible = "picochip,pc3x3-gated-clk";
-				clock-outputs = "bus";
-				picochip,clk-disable-bit = <2>;
-				clock-frequency = <200000000>;
-				ref-clock = <&ref_clk>, "ref";
-			};
-
-			dmac1_clk: clock@3 {
-				compatible = "picochip,pc3x3-gated-clk";
-				clock-outputs = "bus";
-				picochip,clk-disable-bit = <3>;
-				clock-frequency = <200000000>;
-				ref-clock = <&ref_clk>, "ref";
-			};
-
-			ebi_clk: clock@4 {
-				compatible = "picochip,pc3x3-gated-clk";
-				clock-outputs = "bus";
-				picochip,clk-disable-bit = <4>;
-				clock-frequency = <200000000>;
-				ref-clock = <&ref_clk>, "ref";
-			};
-
-			ipsec_clk: clock@5 {
-				compatible = "picochip,pc3x3-gated-clk";
-				clock-outputs = "bus";
-				picochip,clk-disable-bit = <5>;
-				clock-frequency = <200000000>;
-				ref-clock = <&ref_clk>, "ref";
-			};
-
-			l2_clk: clock@6 {
-				compatible = "picochip,pc3x3-gated-clk";
-				clock-outputs = "bus";
-				picochip,clk-disable-bit = <6>;
-				clock-frequency = <200000000>;
-				ref-clock = <&ref_clk>, "ref";
-			};
-
-			trng_clk: clock@7 {
-				compatible = "picochip,pc3x3-gated-clk";
-				clock-outputs = "bus";
-				picochip,clk-disable-bit = <7>;
-				clock-frequency = <200000000>;
-				ref-clock = <&ref_clk>, "ref";
-			};
-
-			fuse_clk: clock@8 {
-				compatible = "picochip,pc3x3-gated-clk";
-				clock-outputs = "bus";
-				picochip,clk-disable-bit = <8>;
-				clock-frequency = <200000000>;
-				ref-clock = <&ref_clk>, "ref";
-			};
-
-			otp_clk: clock@9 {
-				compatible = "picochip,pc3x3-gated-clk";
-				clock-outputs = "bus";
-				picochip,clk-disable-bit = <9>;
-				clock-frequency = <200000000>;
-				ref-clock = <&ref_clk>, "ref";
-			};
-		};
-
-		arm_clk: clock@11 {
-			compatible = "picochip,pc3x3-pll";
-			reg = <0x800a0050 0x8>;
-			picochip,min-freq = <140000000>;
-			picochip,max-freq = <700000000>;
-			ref-clock = <&ref_clk>, "ref";
-			clock-outputs = "cpu";
-		};
-
-		pclk: clock@12 {
-			compatible = "fixed-clock";
-			clock-outputs = "bus", "pclk";
-			clock-frequency = <200000000>;
-			ref-clock = <&ref_clk>, "ref";
-		};
-	};
-
-	paxi {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0 0x80000000 0x400000>;
-
-		emac: gem@30000 {
-			compatible = "cadence,gem";
-			reg = <0x30000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <31>;
-		};
-
-		dmac1: dmac@40000 {
-			compatible = "snps,dw-dmac";
-			reg = <0x40000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <25>;
-		};
-
-		dmac2: dmac@50000 {
-			compatible = "snps,dw-dmac";
-			reg = <0x50000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <26>;
-		};
-
-		vic0: interrupt-controller@60000 {
-			compatible = "arm,pl192-vic";
-			interrupt-controller;
-			reg = <0x60000 0x1000>;
-			#interrupt-cells = <1>;
-		};
-
-		vic1: interrupt-controller@64000 {
-			compatible = "arm,pl192-vic";
-			interrupt-controller;
-			reg = <0x64000 0x1000>;
-			#interrupt-cells = <1>;
-		};
-
-		fuse: picoxcell-fuse@80000 {
-			compatible = "picoxcell,fuse-pc3x3";
-			reg = <0x80000 0x10000>;
-		};
-
-		ssi: picoxcell-spi@90000 {
-			compatible = "picoxcell,spi";
-			reg = <0x90000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <10>;
-		};
-
-		ipsec: spacc@100000 {
-			compatible = "picochip,spacc-ipsec";
-			reg = <0x100000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <24>;
-			ref-clock = <&ipsec_clk>, "ref";
-		};
-
-		srtp: spacc@140000 {
-			compatible = "picochip,spacc-srtp";
-			reg = <0x140000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <23>;
-		};
-
-		l2_engine: spacc@180000 {
-			compatible = "picochip,spacc-l2";
-			reg = <0x180000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <22>;
-			ref-clock = <&l2_clk>, "ref";
-		};
-
-		apb {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0 0x200000 0x80000>;
-
-			rtc0: rtc@00000 {
-				compatible = "picochip,pc3x2-rtc";
-				clock-freq = <200000000>;
-				reg = <0x00000 0xf>;
-				interrupt-parent = <&vic0>;
-				interrupts = <8>;
-			};
-
-			timer0: timer@10000 {
-				compatible = "picochip,pc3x2-timer";
-				interrupt-parent = <&vic0>;
-				interrupts = <4>;
-				clock-freq = <200000000>;
-				reg = <0x10000 0x14>;
-			};
-
-			timer1: timer@10014 {
-				compatible = "picochip,pc3x2-timer";
-				interrupt-parent = <&vic0>;
-				interrupts = <5>;
-				clock-freq = <200000000>;
-				reg = <0x10014 0x14>;
-			};
-
-			gpio: gpio@20000 {
-				compatible = "snps,dw-apb-gpio";
-				reg = <0x20000 0x1000>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-				reg-io-width = <4>;
-
-				banka: gpio-controller@0 {
-					compatible = "snps,dw-apb-gpio-bank";
-					gpio-controller;
-					#gpio-cells = <2>;
-					gpio-generic,nr-gpio = <8>;
-
-					regoffset-dat = <0x50>;
-					regoffset-set = <0x00>;
-					regoffset-dirout = <0x04>;
-				};
-
-				bankb: gpio-controller@1 {
-					compatible = "snps,dw-apb-gpio-bank";
-					gpio-controller;
-					#gpio-cells = <2>;
-					gpio-generic,nr-gpio = <16>;
-
-					regoffset-dat = <0x54>;
-					regoffset-set = <0x0c>;
-					regoffset-dirout = <0x10>;
-				};
-
-				bankd: gpio-controller@2 {
-					compatible = "snps,dw-apb-gpio-bank";
-					gpio-controller;
-					#gpio-cells = <2>;
-					gpio-generic,nr-gpio = <30>;
-
-					regoffset-dat = <0x5c>;
-					regoffset-set = <0x24>;
-					regoffset-dirout = <0x28>;
-				};
-			};
-
-			uart0: uart@30000 {
-				compatible = "snps,dw-apb-uart";
-				reg = <0x30000 0x1000>;
-				interrupt-parent = <&vic1>;
-				interrupts = <10>;
-				clock-frequency = <3686400>;
-				reg-shift = <2>;
-				reg-io-width = <4>;
-			};
-
-			uart1: uart@40000 {
-				compatible = "snps,dw-apb-uart";
-				reg = <0x40000 0x1000>;
-				interrupt-parent = <&vic1>;
-				interrupts = <9>;
-				clock-frequency = <3686400>;
-				reg-shift = <2>;
-				reg-io-width = <4>;
-			};
-
-			wdog: watchdog@50000 {
-				compatible = "snps,dw-apb-wdg";
-				reg = <0x50000 0x10000>;
-				interrupt-parent = <&vic0>;
-				interrupts = <11>;
-				bus-clock = <&pclk>, "bus";
-			};
-
-			timer2: timer@60000 {
-				compatible = "picochip,pc3x2-timer";
-				interrupt-parent = <&vic0>;
-				interrupts = <6>;
-				clock-freq = <200000000>;
-				reg = <0x60000 0x14>;
-			};
-
-			timer3: timer@60014 {
-				compatible = "picochip,pc3x2-timer";
-				interrupt-parent = <&vic0>;
-				interrupts = <7>;
-				clock-freq = <200000000>;
-				reg = <0x60014 0x14>;
-			};
-		};
-	};
-
-	rwid-axi {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		ranges;
-
-		ebi@50000000 {
-			compatible = "simple-bus";
-			#address-cells = <2>;
-			#size-cells = <1>;
-			ranges = <0 0 0x40000000 0x08000000
-				  1 0 0x48000000 0x08000000
-				  2 0 0x50000000 0x08000000
-				  3 0 0x58000000 0x08000000>;
-		};
-
-		axi2pico@c0000000 {
-			compatible = "picochip,axi2pico-pc3x3";
-			reg = <0xc0000000 0x10000>;
-			interrupt-parent = <&vic0>;
-			interrupts = <13 14 15 16 17 18 19 20 21>;
-		};
-
-		otp@ffff8000 {
-			compatible = "picochip,otp-pc3x3";
-			reg = <0xffff8000 0x8000>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts b/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts
deleted file mode 100644
index 1297414d..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dts
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- *  Copyright (C) 2011 Picochip, Jamie Iles
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/dts-v1/;
-/include/ "picoxcell-pc3x2.dtsi"
-/ {
-	model = "Picochip PC7302 (PC3X2)";
-	compatible = "picochip,pc7302-pc3x2", "picochip,pc3x2";
-
-	memory {
-		device_type = "memory";
-		reg = <0x0 0x08000000>;
-	};
-
-	chosen {
-		linux,stdout-path = &uart0;
-	};
-
-	clocks {
-		ref_clk: clock@1 {
-			compatible = "fixed-clock";
-			clock-outputs = "ref";
-			clock-frequency = <20000000>;
-		};
-	};
-
-	rwid-axi {
-		ebi@50000000 {
-			nand: gpio-nand@2,0 {
-				compatible = "gpio-control-nand";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <2 0x0000 0x1000>;
-				bus-clock = <&pclk>, "bus";
-				gpio-control-nand,io-sync-reg =
-					<0x00000000 0x80220000>;
-
-				gpios = <&banka 1 0	/* rdy */
-					 &banka 2 0 	/* nce */
-					 &banka 3 0 	/* ale */
-					 &banka 4 0 	/* cle */
-					 0		/* nwp */>;
-
-				boot@100000 {
-					label = "Boot";
-					reg = <0x100000 0x80000>;
-				};
-
-				redundant-boot@200000 {
-					label = "Redundant Boot";
-					reg = <0x200000 0x80000>;
-				};
-
-				boot-env@300000 {
-					label = "Boot Evironment";
-					reg = <0x300000 0x20000>;
-				};
-
-				redundant-boot-env@320000 {
-					label = "Redundant Boot Environment";
-					reg = <0x300000 0x20000>;
-				};
-
-				kernel@380000 {
-					label = "Kernel";
-					reg = <0x380000 0x800000>;
-				};
-
-				fs@b80000 {
-					label = "File System";
-					reg = <0xb80000 0xf480000>;
-				};
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts b/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts
deleted file mode 100644
index 9e317a4f..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- *  Copyright (C) 2011 Picochip, Jamie Iles
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/dts-v1/;
-/include/ "picoxcell-pc3x3.dtsi"
-/ {
-	model = "Picochip PC7302 (PC3X3)";
-	compatible = "picochip,pc7302-pc3x3", "picochip,pc3x3";
-
-	memory {
-		device_type = "memory";
-		reg = <0x0 0x08000000>;
-	};
-
-	chosen {
-		linux,stdout-path = &uart0;
-	};
-
-	clocks {
-		ref_clk: clock@10 {
-			compatible = "fixed-clock";
-			clock-outputs = "ref";
-			clock-frequency = <20000000>;
-		};
-
-		clkgate: clkgate@800a0048 {
-			clock@4 {
-				picochip,clk-no-disable;
-			};
-		};
-	};
-
-	rwid-axi {
-		ebi@50000000 {
-			nand: gpio-nand@2,0 {
-				compatible = "gpio-control-nand";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <2 0x0000 0x1000>;
-				bus-clock = <&ebi_clk>, "bus";
-				gpio-control-nand,io-sync-reg =
-					<0x00000000 0x80220000>;
-
-				gpios = <&banka 1 0	/* rdy */
-					 &banka 2 0 	/* nce */
-					 &banka 3 0 	/* ale */
-					 &banka 4 0 	/* cle */
-					 0		/* nwp */>;
-
-				boot@100000 {
-					label = "Boot";
-					reg = <0x100000 0x80000>;
-				};
-
-				redundant-boot@200000 {
-					label = "Redundant Boot";
-					reg = <0x200000 0x80000>;
-				};
-
-				boot-env@300000 {
-					label = "Boot Evironment";
-					reg = <0x300000 0x20000>;
-				};
-
-				redundant-boot-env@320000 {
-					label = "Redundant Boot Environment";
-					reg = <0x300000 0x20000>;
-				};
-
-				kernel@380000 {
-					label = "Kernel";
-					reg = <0x380000 0x800000>;
-				};
-
-				fs@b80000 {
-					label = "File System";
-					reg = <0xb80000 0xf480000>;
-				};
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/prima2-cb.dts b/ANDROID_3.4.5/arch/arm/boot/dts/prima2-cb.dts
deleted file mode 100644
index 34ae3a64..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/prima2-cb.dts
+++ /dev/null
@@ -1,424 +0,0 @@
-/dts-v1/;
-/ {
-	model = "SiRF Prima2 eVB";
-	compatible = "sirf,prima2-cb", "sirf,prima2";
-	#address-cells = <1>;
-	#size-cells = <1>;
-	interrupt-parent = <&intc>;
-
-	memory {
-		reg = <0x00000000 0x20000000>;
-	};
-
-	chosen {
-		bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1";
-		linux,stdout-path = &uart1;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			reg = <0x0>;
-			d-cache-line-size = <32>;
-			i-cache-line-size = <32>;
-			d-cache-size = <32768>;
-			i-cache-size = <32768>;
-			/* from bootloader */
-			timebase-frequency = <0>;
-			bus-frequency = <0>;
-			clock-frequency = <0>;
-		};
-	};
-
-	axi {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0x40000000 0x40000000 0x80000000>;
-
-		l2-cache-controller@80040000 {
-			compatible = "arm,pl310-cache", "sirf,prima2-pl310-cache";
-			reg = <0x80040000 0x1000>;
-			interrupts = <59>;
-			arm,tag-latency = <1 1 1>;
-			arm,data-latency = <1 1 1>;
-			arm,filter-ranges = <0 0x40000000>;
-		};
-
-		intc: interrupt-controller@80020000 {
-			#interrupt-cells = <1>;
-			interrupt-controller;
-			compatible = "sirf,prima2-intc";
-			reg = <0x80020000 0x1000>;
-		};
-
-		sys-iobg {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0x88000000 0x88000000 0x40000>;
-
-			clock-controller@88000000 {
-				compatible = "sirf,prima2-clkc";
-				reg = <0x88000000 0x1000>;
-				interrupts = <3>;
-			};
-
-			reset-controller@88010000 {
-				compatible = "sirf,prima2-rstc";
-				reg = <0x88010000 0x1000>;
-			};
-
-			rsc-controller@88020000 {
-				compatible = "sirf,prima2-rsc";
-				reg = <0x88020000 0x1000>;
-			};
-		};
-
-		mem-iobg {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0x90000000 0x90000000 0x10000>;
-
-			memory-controller@90000000 {
-				compatible = "sirf,prima2-memc";
-				reg = <0x90000000 0x10000>;
-				interrupts = <27>;
-			};
-		};
-
-		disp-iobg {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0x90010000 0x90010000 0x30000>;
-
-			display@90010000 {
-				compatible = "sirf,prima2-lcd";
-				reg = <0x90010000 0x20000>;
-				interrupts = <30>;
-			};
-
-			vpp@90020000 {
-				compatible = "sirf,prima2-vpp";
-				reg = <0x90020000 0x10000>;
-				interrupts = <31>;
-			};
-		};
-
-		graphics-iobg {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0x98000000 0x98000000 0x8000000>;
-
-			graphics@98000000 {
-				compatible = "powervr,sgx531";
-				reg = <0x98000000 0x8000000>;
-				interrupts = <6>;
-			};
-		};
-
-		multimedia-iobg {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0xa0000000 0xa0000000 0x8000000>;
-
-			multimedia@a0000000 {
-				compatible = "sirf,prima2-video-codec";
-				reg = <0xa0000000 0x8000000>;
-				interrupts = <5>;
-			};
-		};
-
-		dsp-iobg {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0xa8000000 0xa8000000 0x2000000>;
-
-			dspif@a8000000 {
-				compatible = "sirf,prima2-dspif";
-				reg = <0xa8000000 0x10000>;
-				interrupts = <9>;
-			};
-
-			gps@a8010000 {
-				compatible = "sirf,prima2-gps";
-				reg = <0xa8010000 0x10000>;
-				interrupts = <7>;
-			};
-
-			dsp@a9000000 {
-				compatible = "sirf,prima2-dsp";
-				reg = <0xa9000000 0x1000000>;
-				interrupts = <8>;
-			};
-		};
-
-		peri-iobg {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0xb0000000 0xb0000000 0x180000>;
-
-			timer@b0020000 {
-				compatible = "sirf,prima2-tick";
-				reg = <0xb0020000 0x1000>;
-				interrupts = <0>;
-			};
-
-			nand@b0030000 {
-				compatible = "sirf,prima2-nand";
-				reg = <0xb0030000 0x10000>;
-				interrupts = <41>;
-			};
-
-			audio@b0040000 {
-				compatible = "sirf,prima2-audio";
-				reg = <0xb0040000 0x10000>;
-				interrupts = <35>;
-			};
-
-			uart0: uart@b0050000 {
-				cell-index = <0>;
-				compatible = "sirf,prima2-uart";
-				reg = <0xb0050000 0x10000>;
-				interrupts = <17>;
-			};
-
-			uart1: uart@b0060000 {
-				cell-index = <1>;
-				compatible = "sirf,prima2-uart";
-				reg = <0xb0060000 0x10000>;
-				interrupts = <18>;
-			};
-
-			uart2: uart@b0070000 {
-				cell-index = <2>;
-				compatible = "sirf,prima2-uart";
-				reg = <0xb0070000 0x10000>;
-				interrupts = <19>;
-			};
-
-			usp0: usp@b0080000 {
-				cell-index = <0>;
-				compatible = "sirf,prima2-usp";
-				reg = <0xb0080000 0x10000>;
-				interrupts = <20>;
-			};
-
-			usp1: usp@b0090000 {
-				cell-index = <1>;
-				compatible = "sirf,prima2-usp";
-				reg = <0xb0090000 0x10000>;
-				interrupts = <21>;
-			};
-
-			usp2: usp@b00a0000 {
-				cell-index = <2>;
-				compatible = "sirf,prima2-usp";
-				reg = <0xb00a0000 0x10000>;
-				interrupts = <22>;
-			};
-
-			dmac0: dma-controller@b00b0000 {
-				cell-index = <0>;
-				compatible = "sirf,prima2-dmac";
-				reg = <0xb00b0000 0x10000>;
-				interrupts = <12>;
-			};
-
-			dmac1: dma-controller@b0160000 {
-				cell-index = <1>;
-				compatible = "sirf,prima2-dmac";
-				reg = <0xb0160000 0x10000>;
-				interrupts = <13>;
-			};
-
-			vip@b00C0000 {
-				compatible = "sirf,prima2-vip";
-				reg = <0xb00C0000 0x10000>;
-			};
-
-			spi0: spi@b00d0000 {
-				cell-index = <0>;
-				compatible = "sirf,prima2-spi";
-				reg = <0xb00d0000 0x10000>;
-				interrupts = <15>;
-			};
-
-			spi1: spi@b0170000 {
-				cell-index = <1>;
-				compatible = "sirf,prima2-spi";
-				reg = <0xb0170000 0x10000>;
-				interrupts = <16>;
-			};
-
-			i2c0: i2c@b00e0000 {
-				cell-index = <0>;
-				compatible = "sirf,prima2-i2c";
-				reg = <0xb00e0000 0x10000>;
-				interrupts = <24>;
-			};
-
-			i2c1: i2c@b00f0000 {
-				cell-index = <1>;
-				compatible = "sirf,prima2-i2c";
-				reg = <0xb00f0000 0x10000>;
-				interrupts = <25>;
-			};
-
-			tsc@b0110000 {
-				compatible = "sirf,prima2-tsc";
-				reg = <0xb0110000 0x10000>;
-				interrupts = <33>;
-			};
-
-			gpio: gpio-controller@b0120000 {
-				#gpio-cells = <2>;
-				#interrupt-cells = <2>;
-				compatible = "sirf,prima2-gpio-pinmux";
-				reg = <0xb0120000 0x10000>;
-				gpio-controller;
-				interrupt-controller;
-			};
-
-			pwm@b0130000 {
-				compatible = "sirf,prima2-pwm";
-				reg = <0xb0130000 0x10000>;
-			};
-
-			efusesys@b0140000 {
-				compatible = "sirf,prima2-efuse";
-				reg = <0xb0140000 0x10000>;
-			};
-
-			pulsec@b0150000 {
-				compatible = "sirf,prima2-pulsec";
-				reg = <0xb0150000 0x10000>;
-				interrupts = <48>;
-			};
-
-			pci-iobg {
-				compatible = "sirf,prima2-pciiobg", "simple-bus";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				ranges = <0x56000000 0x56000000 0x1b00000>;
-
-				sd0: sdhci@56000000 {
-					cell-index = <0>;
-					compatible = "sirf,prima2-sdhc";
-					reg = <0x56000000 0x100000>;
-					interrupts = <38>;
-				};
-
-				sd1: sdhci@56100000 {
-					cell-index = <1>;
-					compatible = "sirf,prima2-sdhc";
-					reg = <0x56100000 0x100000>;
-					interrupts = <38>;
-				};
-
-				sd2: sdhci@56200000 {
-					cell-index = <2>;
-					compatible = "sirf,prima2-sdhc";
-					reg = <0x56200000 0x100000>;
-					interrupts = <23>;
-				};
-
-				sd3: sdhci@56300000 {
-					cell-index = <3>;
-					compatible = "sirf,prima2-sdhc";
-					reg = <0x56300000 0x100000>;
-					interrupts = <23>;
-				};
-
-				sd4: sdhci@56400000 {
-					cell-index = <4>;
-					compatible = "sirf,prima2-sdhc";
-					reg = <0x56400000 0x100000>;
-					interrupts = <39>;
-				};
-
-				sd5: sdhci@56500000 {
-					cell-index = <5>;
-					compatible = "sirf,prima2-sdhc";
-					reg = <0x56500000 0x100000>;
-					interrupts = <39>;
-				};
-
-				pci-copy@57900000 {
-					compatible = "sirf,prima2-pcicp";
-					reg = <0x57900000 0x100000>;
-					interrupts = <40>;
-				};
-
-				rom-interface@57a00000 {
-					compatible = "sirf,prima2-romif";
-					reg = <0x57a00000 0x100000>;
-				};
-			};
-		};
-
-		rtc-iobg {
-			compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x80030000 0x10000>;
-
-			gpsrtc@1000 {
-				compatible = "sirf,prima2-gpsrtc";
-				reg = <0x1000 0x1000>;
-				interrupts = <55 56 57>;
-			};
-
-			sysrtc@2000 {
-				compatible = "sirf,prima2-sysrtc";
-				reg = <0x2000 0x1000>;
-				interrupts = <52 53 54>;
-			};
-
-			pwrc@3000 {
-				compatible = "sirf,prima2-pwrc";
-				reg = <0x3000 0x1000>;
-				interrupts = <32>;
-			};
-		};
-
-		uus-iobg {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0xb8000000 0xb8000000 0x40000>;
-
-			usb0: usb@b00e0000 {
-				compatible = "chipidea,ci13611a-prima2";
-				reg = <0xb8000000 0x10000>;
-				interrupts = <10>;
-			};
-
-			usb1: usb@b00f0000 {
-				compatible = "chipidea,ci13611a-prima2";
-				reg = <0xb8010000 0x10000>;
-				interrupts = <11>;
-			};
-
-			sata@b00f0000 {
-				compatible = "synopsys,dwc-ahsata";
-				reg = <0xb8020000 0x10000>;
-				interrupts = <37>;
-			};
-
-			security@b00f0000 {
-				compatible = "sirf,prima2-security";
-				reg = <0xb8030000 0x10000>;
-				interrupts = <42>;
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/pxa168-aspenite.dts b/ANDROID_3.4.5/arch/arm/boot/dts/pxa168-aspenite.dts
deleted file mode 100644
index e762facb..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/pxa168-aspenite.dts
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- *  Copyright (C) 2012 Marvell Technology Group Ltd.
- *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-
-/dts-v1/;
-/include/ "pxa168.dtsi"
-
-/ {
-	model = "Marvell PXA168 Aspenite Development Board";
-	compatible = "mrvl,pxa168-aspenite", "mrvl,pxa168";
-
-	chosen {
-		bootargs = "console=ttyS0,115200 root=/dev/nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on";
-	};
-
-	memory {
-		reg = <0x00000000 0x04000000>;
-	};
-
-	soc {
-		apb@d4000000 {
-			uart1: uart@d4017000 {
-				status = "okay";
-			};
-			twsi1: i2c@d4011000 {
-				status = "okay";
-			};
-			rtc: rtc@d4010000 {
-				status = "okay";
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/pxa168.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/pxa168.dtsi
deleted file mode 100644
index d32d5128..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/pxa168.dtsi
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- *  Copyright (C) 2012 Marvell Technology Group Ltd.
- *  Author: Haojian Zhuang <haojian.zhuang@marvell.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License version 2 as
- *  publishhed by the Free Software Foundation.
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	aliases {
-		serial0 = &uart1;
-		serial1 = &uart2;
-		serial2 = &uart3;
-		i2c0 = &twsi1;
-		i2c1 = &twsi2;
-	};
-
-	intc: intc-interrupt-controller@d4282000 {
-		compatible = "mrvl,mmp-intc", "mrvl,intc";
-		interrupt-controller;
-		#interrupt-cells = <1>;
-		reg = <0xd4282000 0x1000>;
-	};
-
-	soc {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		interrupt-parent = <&intc>;
-		ranges;
-
-		apb@d4000000 {	/* APB */
-			compatible = "mrvl,apb-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xd4000000 0x00200000>;
-			ranges;
-
-			uart1: uart@d4017000 {
-				compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
-				reg = <0xd4017000 0x1000>;
-				interrupts = <27>;
-				status = "disabled";
-			};
-
-			uart2: uart@d4018000 {
-				compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
-				reg = <0xd4018000 0x1000>;
-				interrupts = <28>;
-				status = "disabled";
-			};
-
-			uart3: uart@d4026000 {
-				compatible = "mrvl,mmp-uart", "mrvl,pxa-uart";
-				reg = <0xd4026000 0x1000>;
-				interrupts = <29>;
-				status = "disabled";
-			};
-
-			gpio: gpio@d4019000 {
-				compatible = "mrvl,mmp-gpio", "mrvl,pxa-gpio";
-				reg = <0xd4019000 0x1000>;
-				interrupts = <49>;
-				interrupt-names = "gpio_mux";
-				gpio-controller;
-				#gpio-cells = <1>;
-				interrupt-controller;
-				#interrupt-cells = <1>;
-			};
-
-			twsi1: i2c@d4011000 {
-				compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
-				reg = <0xd4011000 0x1000>;
-				interrupts = <7>;
-				mrvl,i2c-fast-mode;
-				status = "disabled";
-			};
-
-			twsi2: i2c@d4025000 {
-				compatible = "mrvl,mmp-twsi", "mrvl,pxa-i2c";
-				reg = <0xd4025000 0x1000>;
-				interrupts = <58>;
-				status = "disabled";
-			};
-
-			rtc: rtc@d4010000 {
-				compatible = "mrvl,mmp-rtc";
-				reg = <0xd4010000 0x1000>;
-				interrupts = <5 6>;
-				interrupt-names = "rtc 1Hz", "rtc alarm";
-				status = "disabled";
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/skeleton.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/skeleton.dtsi
deleted file mode 100644
index b41d241d..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/skeleton.dtsi
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * Skeleton device tree; the bare minimum needed to boot; just include and
- * add a compatible value.  The bootloader will typically populate the memory
- * node.
- */
-
-/ {
-	#address-cells = <1>;
-	#size-cells = <1>;
-	chosen { };
-	aliases { };
-	memory { device_type = "memory"; reg = <0 0>; };
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/snowball.dts b/ANDROID_3.4.5/arch/arm/boot/dts/snowball.dts
deleted file mode 100644
index 359c6d67..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/snowball.dts
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * Copyright 2011 ST-Ericsson AB
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-/include/ "db8500.dtsi"
-
-/ {
-	model = "Calao Systems Snowball platform with device tree";
-	compatible = "calaosystems,snowball-a9500";
-
-	memory {
-		reg = <0x00000000 0x20000000>;
-	};
-
-	gpio_keys {
-		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		button@1 {
-			debounce_interval = <50>;
-			wakeup = <1>;
-			linux,code = <2>;
-			label = "userpb";
-			gpios = <&gpio1 0>;
-		};
-		button@2 {
-			debounce_interval = <50>;
-			wakeup = <1>;
-			linux,code = <3>;
-			label = "userpb";
-			gpios = <&gpio4 23>;
-		};
-		button@3 {
-			debounce_interval = <50>;
-			wakeup = <1>;
-			linux,code = <4>;
-			label = "userpb";
-			gpios = <&gpio4 23>;
-		};
-		button@4 {
-			debounce_interval = <50>;
-			wakeup = <1>;
-			linux,code = <5>;
-			label = "userpb";
-			gpios = <&gpio5 1>;
-		};
-		button@5 {
-			debounce_interval = <50>;
-			wakeup = <1>;
-			linux,code = <6>;
-			label = "userpb";
-			gpios = <&gpio5 2>;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		used-led {
-			label = "user_led";
-			gpios = <&gpio4 14>;
-		};
-	};
-
-	soc-u9500 {
-
-		external-bus@50000000 {
-			compatible = "simple-bus";
-			reg = <0x50000000 0x10000000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			ethernet@50000000 {
-				compatible = "smsc,9111";
-				reg = <0x50000000 0x10000>;
-				interrupts = <12>;
-				interrupt-parent = <&gpio4>;
-			};
-		};
-
-		sdi@80126000 {
-			status = "enabled";
-			cd-gpios = <&gpio6 26>;
-		};
-
-		sdi@80114000 {
-			status = "enabled";
-		};
-
-		uart@80120000 {
-			status = "okay";
-		};
-
-		uart@80121000 {
-			status = "okay";
-		};
-
-		uart@80007000 {
-			status = "okay";
-		};
-
-		i2c@80004000 {
-			tc3589x@42 {
-				//compatible = "tc3589x";
-				reg = <0x42>;
-				interrupts = <25>;
-				interrupt-parent = <&gpio6>;
-			};
-			tps61052@33 {
-				//compatible = "tps61052";
-				reg = <0x33>;
-			};
-		};
-
-		i2c@80128000 {
-			lp5521@0x33 {
-				// compatible = "lp5521";
-				reg = <0x33>;
-			};
-			lp5521@0x34 {
-				// compatible = "lp5521";
-				reg = <0x34>;
-			};
-			bh1780@0x29 {
-				// compatible = "rohm,bh1780gli";
-				reg = <0x33>;
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/spear600-evb.dts b/ANDROID_3.4.5/arch/arm/boot/dts/spear600-evb.dts
deleted file mode 100644
index 636292e1..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/spear600-evb.dts
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * Copyright 2012 Stefan Roese <sr@denx.de>
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/dts-v1/;
-/include/ "spear600.dtsi"
-
-/ {
-	model = "ST SPEAr600 Evaluation Board";
-	compatible = "st,spear600-evb", "st,spear600";
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	memory {
-		device_type = "memory";
-		reg = <0 0x10000000>;
-	};
-
-	ahb {
-		gmac: ethernet@e0800000 {
-			phy-mode = "gmii";
-			status = "okay";
-		};
-
-		apb {
-			serial@d0000000 {
-				status = "okay";
-			};
-
-			serial@d0080000 {
-				status = "okay";
-			};
-
-			i2c@d0200000 {
-				clock-frequency = <400000>;
-				status = "okay";
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/spear600.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/spear600.dtsi
deleted file mode 100644
index ebe0885a..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/spear600.dtsi
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * Copyright 2012 Stefan Roese <sr@denx.de>
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-/include/ "skeleton.dtsi"
-
-/ {
-	compatible = "st,spear600";
-
-	cpus {
-		cpu@0 {
-			compatible = "arm,arm926ejs";
-		};
-	};
-
-	memory {
-		device_type = "memory";
-		reg = <0 0x40000000>;
-	};
-
-	ahb {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus";
-		ranges = <0xd0000000 0xd0000000 0x30000000>;
-
-		vic0: interrupt-controller@f1100000 {
-			compatible = "arm,pl190-vic";
-			interrupt-controller;
-			reg = <0xf1100000 0x1000>;
-			#interrupt-cells = <1>;
-		};
-
-		vic1: interrupt-controller@f1000000 {
-			compatible = "arm,pl190-vic";
-			interrupt-controller;
-			reg = <0xf1000000 0x1000>;
-			#interrupt-cells = <1>;
-		};
-
-		gmac: ethernet@e0800000 {
-			compatible = "st,spear600-gmac";
-			reg = <0xe0800000 0x8000>;
-			interrupt-parent = <&vic1>;
-			interrupts = <24 23>;
-			interrupt-names = "macirq", "eth_wake_irq";
-			status = "disabled";
-		};
-
-		fsmc: flash@d1800000 {
-			compatible = "st,spear600-fsmc-nand";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xd1800000 0x1000	/* FSMC Register */
-			       0xd2000000 0x4000>;	/* NAND Base */
-			reg-names = "fsmc_regs", "nand_data";
-			st,ale-off = <0x20000>;
-			st,cle-off = <0x10000>;
-			status = "disabled";
-		};
-
-		smi: flash@fc000000 {
-			compatible = "st,spear600-smi";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0xfc000000 0x1000>;
-			interrupt-parent = <&vic1>;
-			interrupts = <12>;
-			status = "disabled";
-		};
-
-		ehci@e1800000 {
-			compatible = "st,spear600-ehci", "usb-ehci";
-			reg = <0xe1800000 0x1000>;
-			interrupt-parent = <&vic1>;
-			interrupts = <27>;
-			status = "disabled";
-		};
-
-		ehci@e2000000 {
-			compatible = "st,spear600-ehci", "usb-ehci";
-			reg = <0xe2000000 0x1000>;
-			interrupt-parent = <&vic1>;
-			interrupts = <29>;
-			status = "disabled";
-		};
-
-		ohci@e1900000 {
-			compatible = "st,spear600-ohci", "usb-ohci";
-			reg = <0xe1900000 0x1000>;
-			interrupt-parent = <&vic1>;
-			interrupts = <26>;
-			status = "disabled";
-		};
-
-		ohci@e2100000 {
-			compatible = "st,spear600-ohci", "usb-ohci";
-			reg = <0xe2100000 0x1000>;
-			interrupt-parent = <&vic1>;
-			interrupts = <28>;
-			status = "disabled";
-		};
-
-		apb {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "simple-bus";
-			ranges = <0xd0000000 0xd0000000 0x30000000>;
-
-			serial@d0000000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0xd0000000 0x1000>;
-				interrupt-parent = <&vic0>;
-				interrupts = <24>;
-				status = "disabled";
-			};
-
-			serial@d0080000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0xd0080000 0x1000>;
-				interrupt-parent = <&vic0>;
-				interrupts = <25>;
-				status = "disabled";
-			};
-
-			/* local/cpu GPIO */
-			gpio0: gpio@f0100000 {
-				#gpio-cells = <2>;
-				compatible = "arm,pl061", "arm,primecell";
-				gpio-controller;
-				reg = <0xf0100000 0x1000>;
-				interrupt-parent = <&vic0>;
-				interrupts = <18>;
-			};
-
-			/* basic GPIO */
-			gpio1: gpio@fc980000 {
-				#gpio-cells = <2>;
-				compatible = "arm,pl061", "arm,primecell";
-				gpio-controller;
-				reg = <0xfc980000 0x1000>;
-				interrupt-parent = <&vic1>;
-				interrupts = <19>;
-			};
-
-			/* appl GPIO */
-			gpio2: gpio@d8100000 {
-				#gpio-cells = <2>;
-				compatible = "arm,pl061", "arm,primecell";
-				gpio-controller;
-				reg = <0xd8100000 0x1000>;
-				interrupt-parent = <&vic1>;
-				interrupts = <4>;
-			};
-
-			i2c@d0200000 {
-				#address-cells = <1>;
-				#size-cells = <0>;
-				compatible = "snps,designware-i2c";
-				reg = <0xd0200000 0x1000>;
-				interrupt-parent = <&vic0>;
-				interrupts = <28>;
-				status = "disabled";
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-cardhu.dts b/ANDROID_3.4.5/arch/arm/boot/dts/tegra-cardhu.dts
deleted file mode 100644
index 631a86cb..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-cardhu.dts
+++ /dev/null
@@ -1,70 +0,0 @@
-/dts-v1/;
-
-/include/ "tegra30.dtsi"
-
-/ {
-	model = "NVIDIA Tegra30 Cardhu evaluation board";
-	compatible = "nvidia,cardhu", "nvidia,tegra30";
-
-	memory {
-		reg = < 0x80000000 0x40000000 >;
-	};
-
-	serial@70006000 {
-		clock-frequency = < 408000000 >;
-	};
-
-	serial@70006040 {
-		status = "disable";
-	};
-
-	serial@70006200 {
-		status = "disable";
-	};
-
-	serial@70006300 {
-		status = "disable";
-	};
-
-	serial@70006400 {
-		status = "disable";
-	};
-
-	i2c@7000c000 {
-		clock-frequency = <100000>;
-	};
-
-	i2c@7000c400 {
-		clock-frequency = <100000>;
-	};
-
-	i2c@7000c500 {
-		clock-frequency = <100000>;
-	};
-
-	i2c@7000c700 {
-		clock-frequency = <100000>;
-	};
-
-	i2c@7000d000 {
-		clock-frequency = <100000>;
-	};
-
-	sdhci@78000000 {
-		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
-		wp-gpios = <&gpio 155 0>; /* gpio PT3 */
-		power-gpios = <&gpio 31 0>; /* gpio PD7 */
-	};
-
-	sdhci@78000200 {
-		status = "disable";
-	};
-
-	sdhci@78000400 {
-		status = "disable";
-	};
-
-	sdhci@78000600 {
-		support-8bit;
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-harmony.dts b/ANDROID_3.4.5/arch/arm/boot/dts/tegra-harmony.dts
deleted file mode 100644
index 6e8447dc..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-harmony.dts
+++ /dev/null
@@ -1,115 +0,0 @@
-/dts-v1/;
-
-/include/ "tegra20.dtsi"
-
-/ {
-	model = "NVIDIA Tegra2 Harmony evaluation board";
-	compatible = "nvidia,harmony", "nvidia,tegra20";
-
-	memory@0 {
-		reg = < 0x00000000 0x40000000 >;
-	};
-
-	pmc@7000f400 {
-		nvidia,invert-interrupt;
-	};
-
-	i2c@7000c000 {
-		clock-frequency = <400000>;
-
-		wm8903: wm8903@1a {
-			compatible = "wlf,wm8903";
-			reg = <0x1a>;
-			interrupt-parent = <&gpio>;
-			interrupts = < 187 0x04 >;
-
-			gpio-controller;
-			#gpio-cells = <2>;
-
-			micdet-cfg = <0>;
-			micdet-delay = <100>;
-			gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
-		};
-	};
-
-	i2c@7000c400 {
-		clock-frequency = <400000>;
-	};
-
-	i2c@7000c500 {
-		clock-frequency = <400000>;
-	};
-
-	i2c@7000d000 {
-		clock-frequency = <400000>;
-	};
-
-	i2s@70002a00 {
-		status = "disable";
-	};
-
-	sound {
-		compatible = "nvidia,tegra-audio-wm8903-harmony",
-			     "nvidia,tegra-audio-wm8903";
-		nvidia,model = "NVIDIA Tegra Harmony";
-
-		nvidia,audio-routing =
-			"Headphone Jack", "HPOUTR",
-			"Headphone Jack", "HPOUTL",
-			"Int Spk", "ROP",
-			"Int Spk", "RON",
-			"Int Spk", "LOP",
-			"Int Spk", "LON",
-			"Mic Jack", "MICBIAS",
-			"IN1L", "Mic Jack";
-
-		nvidia,i2s-controller = <&tegra_i2s1>;
-		nvidia,audio-codec = <&wm8903>;
-
-		nvidia,spkr-en-gpios = <&wm8903 2 0>;
-		nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
-		nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
-		nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
-	};
-
-	serial@70006000 {
-		status = "disable";
-	};
-
-	serial@70006040 {
-		status = "disable";
-	};
-
-	serial@70006200 {
-		status = "disable";
-	};
-
-	serial@70006300 {
-		clock-frequency = < 216000000 >;
-	};
-
-	serial@70006400 {
-		status = "disable";
-	};
-
-	sdhci@c8000000 {
-		status = "disable";
-	};
-
-	sdhci@c8000200 {
-		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
-		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
-		power-gpios = <&gpio 155 0>; /* gpio PT3 */
-	};
-
-	sdhci@c8000400 {
-		status = "disable";
-	};
-
-	sdhci@c8000600 {
-		cd-gpios = <&gpio 58 0>; /* gpio PH2 */
-		wp-gpios = <&gpio 59 0>; /* gpio PH3 */
-		power-gpios = <&gpio 70 0>; /* gpio PI6 */
-		support-8bit;
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-paz00.dts b/ANDROID_3.4.5/arch/arm/boot/dts/tegra-paz00.dts
deleted file mode 100644
index 6c02abb4..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-paz00.dts
+++ /dev/null
@@ -1,134 +0,0 @@
-/dts-v1/;
-
-/include/ "tegra20.dtsi"
-
-/ {
-	model = "Toshiba AC100 / Dynabook AZ";
-	compatible = "compal,paz00", "nvidia,tegra20";
-
-	memory@0 {
-		reg = <0x00000000 0x20000000>;
-	};
-
-	i2c@7000c000 {
-		clock-frequency = <400000>;
-
-		alc5632: alc5632@1e {
-			compatible = "realtek,alc5632";
-			reg = <0x1e>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-	};
-
-	i2c@7000c400 {
-		clock-frequency = <400000>;
-	};
-
-	i2c@7000c500 {
-		status = "disable";
-	};
-
-	nvec@7000c500 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nvidia,nvec";
-		reg = <0x7000C500 0x100>;
-		interrupts = <0 92 0x04>;
-		clock-frequency = <80000>;
-		request-gpios = <&gpio 170 0>;
-		slave-addr = <138>;
-	};
-
-	i2c@7000d000 {
-		clock-frequency = <400000>;
-
-		adt7461@4c {
-			compatible = "adi,adt7461";
-			reg = <0x4c>;
-		};
-	};
-
-	i2s@70002a00 {
-		status = "disable";
-	};
-
-	sound {
-		compatible = "nvidia,tegra-audio-alc5632-paz00",
-			"nvidia,tegra-audio-alc5632";
-
-		nvidia,model = "Compal PAZ00";
-
-		nvidia,audio-routing =
-			"Int Spk", "SPKOUT",
-			"Int Spk", "SPKOUTN",
-			"Headset Mic", "MICBIAS1",
-			"MIC1", "Headset Mic",
-			"Headset Stereophone", "HPR",
-			"Headset Stereophone", "HPL",
-			"DMICDAT", "Digital Mic";
-
-		nvidia,audio-codec = <&alc5632>;
-		nvidia,i2s-controller = <&tegra_i2s1>;
-		nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
-	};
-
-	serial@70006000 {
-		clock-frequency = <216000000>;
-	};
-
-	serial@70006040 {
-		status = "disable";
-	};
-
-	serial@70006200 {
-		clock-frequency = <216000000>;
-	};
-
-	serial@70006300 {
-		status = "disable";
-	};
-
-	serial@70006400 {
-		status = "disable";
-	};
-
-	sdhci@c8000000 {
-		cd-gpios = <&gpio 173 0>; /* gpio PV5 */
-		wp-gpios = <&gpio 57 0>;  /* gpio PH1 */
-		power-gpios = <&gpio 169 0>; /* gpio PV1 */
-	};
-
-	sdhci@c8000200 {
-		status = "disable";
-	};
-
-	sdhci@c8000400 {
-		status = "disable";
-	};
-
-	sdhci@c8000600 {
-		support-8bit;
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		power {
-			label = "Power";
-			gpios = <&gpio 79 1>; /* gpio PJ7, active low */
-			linux,code = <116>; /* KEY_POWER */
-			gpio-key,wakeup;
-		};
-	};
-
-	gpio-leds {
-		compatible = "gpio-leds";
-
-		wifi {
-			label = "wifi-led";
-			gpios = <&gpio 24 0>;
-			linux,default-trigger = "rfkill0";
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-seaboard.dts b/ANDROID_3.4.5/arch/arm/boot/dts/tegra-seaboard.dts
deleted file mode 100644
index dbf1c5a1..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-seaboard.dts
+++ /dev/null
@@ -1,175 +0,0 @@
-/dts-v1/;
-
-/include/ "tegra20.dtsi"
-
-/ {
-	model = "NVIDIA Seaboard";
-	compatible = "nvidia,seaboard", "nvidia,tegra20";
-
-	memory {
-		device_type = "memory";
-		reg = < 0x00000000 0x40000000 >;
-	};
-
-	i2c@7000c000 {
-		clock-frequency = <400000>;
-
-		wm8903: wm8903@1a {
-			compatible = "wlf,wm8903";
-			reg = <0x1a>;
-			interrupt-parent = <&gpio>;
-			interrupts = < 187 0x04 >;
-
-			gpio-controller;
-			#gpio-cells = <2>;
-
-			micdet-cfg = <0>;
-			micdet-delay = <100>;
-			gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
-		};
-	};
-
-	i2c@7000c400 {
-		clock-frequency = <400000>;
-	};
-
-	i2c@7000c500 {
-		clock-frequency = <400000>;
-	};
-
-	i2c@7000d000 {
-		clock-frequency = <400000>;
-
-		adt7461@4c {
-			compatible = "adt7461";
-			reg = <0x4c>;
-		};
-	};
-
-	i2s@70002a00 {
-		status = "disable";
-	};
-
-	sound {
-		compatible = "nvidia,tegra-audio-wm8903-seaboard",
-			     "nvidia,tegra-audio-wm8903";
-		nvidia,model = "NVIDIA Tegra Seaboard";
-
-		nvidia,audio-routing =
-			"Headphone Jack", "HPOUTR",
-			"Headphone Jack", "HPOUTL",
-			"Int Spk", "ROP",
-			"Int Spk", "RON",
-			"Int Spk", "LOP",
-			"Int Spk", "LON",
-			"Mic Jack", "MICBIAS",
-			"IN1R", "Mic Jack";
-
-		nvidia,i2s-controller = <&tegra_i2s1>;
-		nvidia,audio-codec = <&wm8903>;
-
-		nvidia,spkr-en-gpios = <&wm8903 2 0>;
-		nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
-	};
-
-	serial@70006000 {
-		status = "disable";
-	};
-
-	serial@70006040 {
-		status = "disable";
-	};
-
-	serial@70006200 {
-		status = "disable";
-	};
-
-	serial@70006300 {
-		clock-frequency = < 216000000 >;
-	};
-
-	serial@70006400 {
-		status = "disable";
-	};
-
-	sdhci@c8000000 {
-		status = "disable";
-	};
-
-	sdhci@c8000200 {
-		status = "disable";
-	};
-
-	sdhci@c8000400 {
-		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
-		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
-		power-gpios = <&gpio 70 0>; /* gpio PI6 */
-	};
-
-	sdhci@c8000600 {
-		support-8bit;
-	};
-
-	usb@c5000000 {
-		nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
-		dr_mode = "otg";
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		power {
-			label = "Power";
-			gpios = <&gpio 170 1>; /* gpio PV2, active low */
-			linux,code = <116>; /* KEY_POWER */
-			gpio-key,wakeup;
-		};
-
-		lid {
-			label = "Lid";
-			gpios = <&gpio 23 0>; /* gpio PC7 */
-			linux,input-type = <5>; /* EV_SW */
-			linux,code = <0>; /* SW_LID */
-			debounce-interval = <1>;
-			gpio-key,wakeup;
-		};
-	};
-
-	emc@7000f400 {
-		emc-table@190000 {
-			reg = < 190000 >;
-			compatible = "nvidia,tegra20-emc-table";
-			clock-frequency = < 190000 >;
-			nvidia,emc-registers = < 0x0000000c 0x00000026
-				0x00000009 0x00000003 0x00000004 0x00000004
-				0x00000002 0x0000000c 0x00000003 0x00000003
-				0x00000002 0x00000001 0x00000004 0x00000005
-				0x00000004 0x00000009 0x0000000d 0x0000059f
-				0x00000000 0x00000003 0x00000003 0x00000003
-				0x00000003 0x00000001 0x0000000b 0x000000c8
-				0x00000003 0x00000007 0x00000004 0x0000000f
-				0x00000002 0x00000000 0x00000000 0x00000002
-				0x00000000 0x00000000 0x00000083 0xa06204ae
-				0x007dc010 0x00000000 0x00000000 0x00000000
-				0x00000000 0x00000000 0x00000000 0x00000000 >;
-		};
-
-		emc-table@380000 {
-			reg = < 380000 >;
-			compatible = "nvidia,tegra20-emc-table";
-			clock-frequency = < 380000 >;
-			nvidia,emc-registers = < 0x00000017 0x0000004b
-				0x00000012 0x00000006 0x00000004 0x00000005
-				0x00000003 0x0000000c 0x00000006 0x00000006
-				0x00000003 0x00000001 0x00000004 0x00000005
-				0x00000004 0x00000009 0x0000000d 0x00000b5f
-				0x00000000 0x00000003 0x00000003 0x00000006
-				0x00000006 0x00000001 0x00000011 0x000000c8
-				0x00000003 0x0000000e 0x00000007 0x0000000f
-				0x00000002 0x00000000 0x00000000 0x00000002
-				0x00000000 0x00000000 0x00000083 0xe044048b
-				0x007d8010 0x00000000 0x00000000 0x00000000
-				0x00000000 0x00000000 0x00000000 0x00000000 >;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-trimslice.dts b/ANDROID_3.4.5/arch/arm/boot/dts/tegra-trimslice.dts
deleted file mode 100644
index 25247686..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-trimslice.dts
+++ /dev/null
@@ -1,77 +0,0 @@
-/dts-v1/;
-
-/include/ "tegra20.dtsi"
-
-/ {
-	model = "Compulab TrimSlice board";
-	compatible = "compulab,trimslice", "nvidia,tegra20";
-
-	memory@0 {
-		reg = < 0x00000000 0x40000000 >;
-	};
-
-	i2c@7000c000 {
-		clock-frequency = <400000>;
-	};
-
-	i2c@7000c400 {
-		clock-frequency = <400000>;
-	};
-
-	i2c@7000c500 {
-		clock-frequency = <400000>;
-	};
-
-	i2c@7000d000 {
-		status = "disable";
-	};
-
-	i2s@70002800 {
-		status = "disable";
-	};
-
-	i2s@70002a00 {
-		status = "disable";
-	};
-
-	das@70000c00 {
-		status = "disable";
-	};
-
-	serial@70006000 {
-		clock-frequency = < 216000000 >;
-	};
-
-	serial@70006040 {
-		status = "disable";
-	};
-
-	serial@70006200 {
-		status = "disable";
-	};
-
-	serial@70006300 {
-		status = "disable";
-	};
-
-	serial@70006400 {
-		status = "disable";
-	};
-
-	sdhci@c8000000 {
-		status = "disable";
-	};
-
-	sdhci@c8000200 {
-		status = "disable";
-	};
-
-	sdhci@c8000400 {
-		status = "disable";
-	};
-
-	sdhci@c8000600 {
-		cd-gpios = <&gpio 121 0>;
-		wp-gpios = <&gpio 122 0>;
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-ventana.dts b/ANDROID_3.4.5/arch/arm/boot/dts/tegra-ventana.dts
deleted file mode 100644
index 2dcff872..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/tegra-ventana.dts
+++ /dev/null
@@ -1,108 +0,0 @@
-/dts-v1/;
-
-/include/ "tegra20.dtsi"
-
-/ {
-	model = "NVIDIA Tegra2 Ventana evaluation board";
-	compatible = "nvidia,ventana", "nvidia,tegra20";
-
-	memory {
-		reg = < 0x00000000 0x40000000 >;
-	};
-
-	i2c@7000c000 {
-		clock-frequency = <400000>;
-
-		wm8903: wm8903@1a {
-			compatible = "wlf,wm8903";
-			reg = <0x1a>;
-			interrupt-parent = <&gpio>;
-			interrupts = < 187 0x04 >;
-
-			gpio-controller;
-			#gpio-cells = <2>;
-
-			micdet-cfg = <0>;
-			micdet-delay = <100>;
-			gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
-		};
-	};
-
-	i2c@7000c400 {
-		clock-frequency = <400000>;
-	};
-
-	i2c@7000c500 {
-		clock-frequency = <400000>;
-	};
-
-	i2c@7000d000 {
-		clock-frequency = <400000>;
-	};
-
-	i2s@70002a00 {
-		status = "disable";
-	};
-
-	sound {
-		compatible = "nvidia,tegra-audio-wm8903-ventana",
-			     "nvidia,tegra-audio-wm8903";
-		nvidia,model = "NVIDIA Tegra Ventana";
-
-		nvidia,audio-routing =
-			"Headphone Jack", "HPOUTR",
-			"Headphone Jack", "HPOUTL",
-			"Int Spk", "ROP",
-			"Int Spk", "RON",
-			"Int Spk", "LOP",
-			"Int Spk", "LON",
-			"Mic Jack", "MICBIAS",
-			"IN1L", "Mic Jack";
-
-		nvidia,i2s-controller = <&tegra_i2s1>;
-		nvidia,audio-codec = <&wm8903>;
-
-		nvidia,spkr-en-gpios = <&wm8903 2 0>;
-		nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
-		nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
-		nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
-	};
-
-	serial@70006000 {
-		status = "disable";
-	};
-
-	serial@70006040 {
-		status = "disable";
-	};
-
-	serial@70006200 {
-		status = "disable";
-	};
-
-	serial@70006300 {
-		clock-frequency = < 216000000 >;
-	};
-
-	serial@70006400 {
-		status = "disable";
-	};
-
-	sdhci@c8000000 {
-		status = "disable";
-	};
-
-	sdhci@c8000200 {
-		status = "disable";
-	};
-
-	sdhci@c8000400 {
-		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
-		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
-		power-gpios = <&gpio 70 0>; /* gpio PI6 */
-	};
-
-	sdhci@c8000600 {
-		support-8bit;
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/tegra20.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/tegra20.dtsi
deleted file mode 100644
index 108e894a..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/tegra20.dtsi
+++ /dev/null
@@ -1,210 +0,0 @@
-/include/ "skeleton.dtsi"
-
-/ {
-	compatible = "nvidia,tegra20";
-	interrupt-parent = <&intc>;
-
-	pmc@7000f400 {
-		compatible = "nvidia,tegra20-pmc";
-		reg = <0x7000e400 0x400>;
-	};
-
-	intc: interrupt-controller@50041000 {
-		compatible = "arm,cortex-a9-gic";
-		interrupt-controller;
-		#interrupt-cells = <3>;
-		reg = < 0x50041000 0x1000 >,
-		      < 0x50040100 0x0100 >;
-	};
-
-	pmu {
-		compatible = "arm,cortex-a9-pmu";
-		interrupts = <0 56 0x04
-			      0 57 0x04>;
-	};
-
-	apbdma: dma@6000a000 {
-		compatible = "nvidia,tegra20-apbdma";
-		reg = <0x6000a000 0x1200>;
-		interrupts = < 0 104 0x04
-			       0 105 0x04
-			       0 106 0x04
-			       0 107 0x04
-			       0 108 0x04
-			       0 109 0x04
-			       0 110 0x04
-			       0 111 0x04
-			       0 112 0x04
-			       0 113 0x04
-			       0 114 0x04
-			       0 115 0x04
-			       0 116 0x04
-			       0 117 0x04
-			       0 118 0x04
-			       0 119 0x04 >;
-	};
-
-	i2c@7000c000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nvidia,tegra20-i2c";
-		reg = <0x7000C000 0x100>;
-		interrupts = < 0 38 0x04 >;
-	};
-
-	i2c@7000c400 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nvidia,tegra20-i2c";
-		reg = <0x7000C400 0x100>;
-		interrupts = < 0 84 0x04 >;
-	};
-
-	i2c@7000c500 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nvidia,tegra20-i2c";
-		reg = <0x7000C500 0x100>;
-		interrupts = < 0 92 0x04 >;
-	};
-
-	i2c@7000d000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nvidia,tegra20-i2c-dvc";
-		reg = <0x7000D000 0x200>;
-		interrupts = < 0 53 0x04 >;
-	};
-
-	tegra_i2s1: i2s@70002800 {
-		compatible = "nvidia,tegra20-i2s";
-		reg = <0x70002800 0x200>;
-		interrupts = < 0 13 0x04 >;
-		nvidia,dma-request-selector = < &apbdma 2 >;
-	};
-
-	tegra_i2s2: i2s@70002a00 {
-		compatible = "nvidia,tegra20-i2s";
-		reg = <0x70002a00 0x200>;
-		interrupts = < 0 3 0x04 >;
-		nvidia,dma-request-selector = < &apbdma 1 >;
-	};
-
-	das@70000c00 {
-		compatible = "nvidia,tegra20-das";
-		reg = <0x70000c00 0x80>;
-	};
-
-	gpio: gpio@6000d000 {
-		compatible = "nvidia,tegra20-gpio";
-		reg = < 0x6000d000 0x1000 >;
-		interrupts = < 0 32 0x04
-			       0 33 0x04
-			       0 34 0x04
-			       0 35 0x04
-			       0 55 0x04
-			       0 87 0x04
-			       0 89 0x04 >;
-		#gpio-cells = <2>;
-		gpio-controller;
-		#interrupt-cells = <2>;
-		interrupt-controller;
-	};
-
-	pinmux: pinmux@70000000 {
-		compatible = "nvidia,tegra20-pinmux";
-		reg = < 0x70000014 0x10    /* Tri-state registers */
-			0x70000080 0x20    /* Mux registers */
-			0x700000a0 0x14    /* Pull-up/down registers */
-			0x70000868 0xa8 >; /* Pad control registers */
-	};
-
-	serial@70006000 {
-		compatible = "nvidia,tegra20-uart";
-		reg = <0x70006000 0x40>;
-		reg-shift = <2>;
-		interrupts = < 0 36 0x04 >;
-	};
-
-	serial@70006040 {
-		compatible = "nvidia,tegra20-uart";
-		reg = <0x70006040 0x40>;
-		reg-shift = <2>;
-		interrupts = < 0 37 0x04 >;
-	};
-
-	serial@70006200 {
-		compatible = "nvidia,tegra20-uart";
-		reg = <0x70006200 0x100>;
-		reg-shift = <2>;
-		interrupts = < 0 46 0x04 >;
-	};
-
-	serial@70006300 {
-		compatible = "nvidia,tegra20-uart";
-		reg = <0x70006300 0x100>;
-		reg-shift = <2>;
-		interrupts = < 0 90 0x04 >;
-	};
-
-	serial@70006400 {
-		compatible = "nvidia,tegra20-uart";
-		reg = <0x70006400 0x100>;
-		reg-shift = <2>;
-		interrupts = < 0 91 0x04 >;
-	};
-
-	emc@7000f400 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nvidia,tegra20-emc";
-		reg = <0x7000f400 0x200>;
-	};
-
-	sdhci@c8000000 {
-		compatible = "nvidia,tegra20-sdhci";
-		reg = <0xc8000000 0x200>;
-		interrupts = < 0 14 0x04 >;
-	};
-
-	sdhci@c8000200 {
-		compatible = "nvidia,tegra20-sdhci";
-		reg = <0xc8000200 0x200>;
-		interrupts = < 0 15 0x04 >;
-	};
-
-	sdhci@c8000400 {
-		compatible = "nvidia,tegra20-sdhci";
-		reg = <0xc8000400 0x200>;
-		interrupts = < 0 19 0x04 >;
-	};
-
-	sdhci@c8000600 {
-		compatible = "nvidia,tegra20-sdhci";
-		reg = <0xc8000600 0x200>;
-		interrupts = < 0 31 0x04 >;
-	};
-
-	usb@c5000000 {
-		compatible = "nvidia,tegra20-ehci", "usb-ehci";
-		reg = <0xc5000000 0x4000>;
-		interrupts = < 0 20 0x04 >;
-		phy_type = "utmi";
-		nvidia,has-legacy-mode;
-	};
-
-	usb@c5004000 {
-		compatible = "nvidia,tegra20-ehci", "usb-ehci";
-		reg = <0xc5004000 0x4000>;
-		interrupts = < 0 21 0x04 >;
-		phy_type = "ulpi";
-	};
-
-	usb@c5008000 {
-		compatible = "nvidia,tegra20-ehci", "usb-ehci";
-		reg = <0xc5008000 0x4000>;
-		interrupts = < 0 97 0x04 >;
-		phy_type = "utmi";
-	};
-};
-
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/tegra30.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/tegra30.dtsi
deleted file mode 100644
index 62a7b39f..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/tegra30.dtsi
+++ /dev/null
@@ -1,186 +0,0 @@
-/include/ "skeleton.dtsi"
-
-/ {
-	compatible = "nvidia,tegra30";
-	interrupt-parent = <&intc>;
-
-	pmc@7000f400 {
-		compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
-		reg = <0x7000e400 0x400>;
-	};
-
-	intc: interrupt-controller@50041000 {
-		compatible = "arm,cortex-a9-gic";
-		interrupt-controller;
-		#interrupt-cells = <3>;
-		reg = < 0x50041000 0x1000 >,
-		      < 0x50040100 0x0100 >;
-	};
-
-	pmu {
-		compatible = "arm,cortex-a9-pmu";
-		interrupts = <0 144 0x04
-			      0 145 0x04
-			      0 146 0x04
-			      0 147 0x04>;
-	};
-
-	apbdma: dma@6000a000 {
-		compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
-		reg = <0x6000a000 0x1400>;
-		interrupts = < 0 104 0x04
-			       0 105 0x04
-			       0 106 0x04
-			       0 107 0x04
-			       0 108 0x04
-			       0 109 0x04
-			       0 110 0x04
-			       0 111 0x04
-			       0 112 0x04
-			       0 113 0x04
-			       0 114 0x04
-			       0 115 0x04
-			       0 116 0x04
-			       0 117 0x04
-			       0 118 0x04
-			       0 119 0x04
-			       0 128 0x04
-			       0 129 0x04
-			       0 130 0x04
-			       0 131 0x04
-			       0 132 0x04
-			       0 133 0x04
-			       0 134 0x04
-			       0 135 0x04
-			       0 136 0x04
-			       0 137 0x04
-			       0 138 0x04
-			       0 139 0x04
-			       0 140 0x04
-			       0 141 0x04
-			       0 142 0x04
-			       0 143 0x04 >;
-	};
-
-	i2c@7000c000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible =  "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-		reg = <0x7000C000 0x100>;
-		interrupts = < 0 38 0x04 >;
-	};
-
-	i2c@7000c400 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-		reg = <0x7000C400 0x100>;
-		interrupts = < 0 84 0x04 >;
-	};
-
-	i2c@7000c500 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-		reg = <0x7000C500 0x100>;
-		interrupts = < 0 92 0x04 >;
-	};
-
-	i2c@7000c700 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-		reg = <0x7000c700 0x100>;
-		interrupts = < 0 120 0x04 >;
-	};
-
-	i2c@7000d000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "nvidia,tegra30-i2c", "nvidia,tegra20-i2c";
-		reg = <0x7000D000 0x100>;
-		interrupts = < 0 53 0x04 >;
-	};
-
-	gpio: gpio@6000d000 {
-		compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
-		reg = < 0x6000d000 0x1000 >;
-		interrupts = < 0 32 0x04
-			       0 33 0x04
-			       0 34 0x04
-			       0 35 0x04
-			       0 55 0x04
-			       0 87 0x04
-			       0 89 0x04
-			       0 125 0x04 >;
-		#gpio-cells = <2>;
-		gpio-controller;
-		#interrupt-cells = <2>;
-		interrupt-controller;
-	};
-
-	serial@70006000 {
-		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
-		reg = <0x70006000 0x40>;
-		reg-shift = <2>;
-		interrupts = < 0 36 0x04 >;
-	};
-
-	serial@70006040 {
-		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
-		reg = <0x70006040 0x40>;
-		reg-shift = <2>;
-		interrupts = < 0 37 0x04 >;
-	};
-
-	serial@70006200 {
-		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
-		reg = <0x70006200 0x100>;
-		reg-shift = <2>;
-		interrupts = < 0 46 0x04 >;
-	};
-
-	serial@70006300 {
-		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
-		reg = <0x70006300 0x100>;
-		reg-shift = <2>;
-		interrupts = < 0 90 0x04 >;
-	};
-
-	serial@70006400 {
-		compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
-		reg = <0x70006400 0x100>;
-		reg-shift = <2>;
-		interrupts = < 0 91 0x04 >;
-	};
-
-	sdhci@78000000 {
-		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
-		reg = <0x78000000 0x200>;
-		interrupts = < 0 14 0x04 >;
-	};
-
-	sdhci@78000200 {
-		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
-		reg = <0x78000200 0x200>;
-		interrupts = < 0 15 0x04 >;
-	};
-
-	sdhci@78000400 {
-		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
-		reg = <0x78000400 0x200>;
-		interrupts = < 0 19 0x04 >;
-	};
-
-	sdhci@78000600 {
-		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
-		reg = <0x78000600 0x200>;
-		interrupts = < 0 31 0x04 >;
-	};
-
-	pinmux: pinmux@70000000 {
-		compatible = "nvidia,tegra30-pinmux";
-		reg = < 0x70000868 0xd0     /* Pad control registers */
-			0x70003000 0x3e0 >; /* Mux registers */
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/testcases/tests-phandle.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/testcases/tests-phandle.dtsi
deleted file mode 100644
index 0007d3cd..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/testcases/tests-phandle.dtsi
+++ /dev/null
@@ -1,39 +0,0 @@
-
-/ {
-	testcase-data {
-		phandle-tests {
-			provider0: provider0 {
-				#phandle-cells = <0>;
-			};
-
-			provider1: provider1 {
-				#phandle-cells = <1>;
-			};
-
-			provider2: provider2 {
-				#phandle-cells = <2>;
-			};
-
-			provider3: provider3 {
-				#phandle-cells = <3>;
-			};
-
-			consumer-a {
-				phandle-list =	<&provider1 1>,
-						<&provider2 2 0>,
-						<0>,
-						<&provider3 4 4 3>,
-						<&provider2 5 100>,
-						<&provider0>,
-						<&provider1 7>;
-				phandle-list-names = "first", "second", "third";
-
-				phandle-list-bad-phandle = <12345678 0 0>;
-				phandle-list-bad-args = <&provider2 1 0>,
-							<&provider3 0>;
-				empty-property;
-				unterminated-string = [40 41 42 43];
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/testcases/tests.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/testcases/tests.dtsi
deleted file mode 100644
index a7c50676..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/testcases/tests.dtsi
+++ /dev/null
@@ -1 +0,0 @@
-/include/ "tests-phandle.dtsi"
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi
deleted file mode 100644
index ad3eca17..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * calao-dab-mmx.dtsi - Device Tree Include file for Calao DAB-MMX Daughter Board
- *
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * Licensed under GPLv2.
- */
-
-/ {
-	ahb {
-		apb {
-			usart1: serial@fffb4000 {
-				status = "okay";
-			};
-
-			usart3: serial@fffd0000 {
-				status = "okay";
-			};
-		};
-	};
-
-	i2c-gpio@0 {
-		status = "okay";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		user_led1 {
-			label = "user_led1";
-			gpios = <&pioB 20 1>;
-		};
-
-/*
-* led already used by mother board but active as high
-*		user_led2 {
-*			label = "user_led2";
-*			gpios = <&pioB 21 1>;
-*		};
-*/
-		user_led3 {
-			label = "user_led3";
-			gpios = <&pioB 22 1>;
-		};
-
-		user_led4 {
-			label = "user_led4";
-			gpios = <&pioB 23 1>;
-		};
-
-		red {
-			label = "red";
-			gpios = <&pioB 24 1>;
-		};
-
-		orange {
-			label = "orange";
-			gpios = <&pioB 30 1>;
-		};
-
-		green {
-			label = "green";
-			gpios = <&pioB 31 1>;
-		};
-	};
-
-	gpio_keys {
-		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		user_pb1 {
-			label = "user_pb1";
-			gpios = <&pioB 25 1>;
-			linux,code = <0x100>;
-		};
-
-		user_pb2 {
-			label = "user_pb2";
-			gpios = <&pioB 13 1>;
-			linux,code = <0x101>;
-		};
-
-		user_pb3 {
-			label = "user_pb3";
-			gpios = <&pioA 26 1>;
-			linux,code = <0x102>;
-		};
-
-		user_pb4 {
-			label = "user_pb4";
-			gpios = <&pioC 9 1>;
-			linux,code = <0x103>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/usb_a9g20.dts b/ANDROID_3.4.5/arch/arm/boot/dts/usb_a9g20.dts
deleted file mode 100644
index 7c2399c5..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/usb_a9g20.dts
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board
- *
- *  Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * Licensed under GPLv2 or later.
- */
-/dts-v1/;
-/include/ "at91sam9g20.dtsi"
-
-/ {
-	model = "Calao USB A9G20";
-	compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9";
-
-	chosen {
-		bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock5 rw rootfstype=ubifs";
-	};
-
-	memory {
-		reg = <0x20000000 0x4000000>;
-	};
-
-	clocks {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		main_clock: clock@0 {
-			compatible = "atmel,osc", "fixed-clock";
-			clock-frequency = <12000000>;
-		};
-	};
-
-	ahb {
-		apb {
-			dbgu: serial@fffff200 {
-				status = "okay";
-			};
-
-			macb0: ethernet@fffc4000 {
-				phy-mode = "rmii";
-				status = "okay";
-			};
-
-			usb1: gadget@fffa4000 {
-				atmel,vbus-gpio = <&pioC 5 0>;
-				status = "okay";
-			};
-		};
-
-		nand0: nand@40000000 {
-			nand-bus-width = <8>;
-			nand-ecc-mode = "soft";
-			nand-on-flash-bbt;
-			status = "okay";
-
-			at91bootstrap@0 {
-				label = "at91bootstrap";
-				reg = <0x0 0x20000>;
-			};
-
-			barebox@20000 {
-				label = "barebox";
-				reg = <0x20000 0x40000>;
-			};
-
-			bareboxenv@60000 {
-				label = "bareboxenv";
-				reg = <0x60000 0x20000>;
-			};
-
-			bareboxenv2@80000 {
-				label = "bareboxenv2";
-				reg = <0x80000 0x20000>;
-			};
-
-			kernel@a0000 {
-				label = "kernel";
-				reg = <0xa0000 0x400000>;
-			};
-
-			rootfs@4a0000 {
-				label = "rootfs";
-				reg = <0x4a0000 0x7800000>;
-			};
-
-			data@7ca0000 {
-				label = "data";
-				reg = <0x7ca0000 0x8360000>;
-			};
-		};
-
-		usb0: ohci@00500000 {
-			num-ports = <2>;
-			status = "okay";
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-
-		user_led {
-			label = "user_led";
-			gpios = <&pioB 21 1>;
-			linux,default-trigger = "heartbeat";
-		};
-	};
-
-	gpio_keys {
-		compatible = "gpio-keys";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		user_pb {
-			label = "user_pb";
-			gpios = <&pioB 10 1>;
-			linux,code = <28>;
-			gpio-key,wakeup;
-		};
-	};
-
-	i2c@0 {
-		status = "okay";
-
-		rv3029c2@56 {
-			compatible = "rv3029c2";
-			reg = <0x56>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/versatile-ab.dts b/ANDROID_3.4.5/arch/arm/boot/dts/versatile-ab.dts
deleted file mode 100644
index e2fe3195..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/versatile-ab.dts
+++ /dev/null
@@ -1,192 +0,0 @@
-/dts-v1/;
-/include/ "skeleton.dtsi"
-
-/ {
-	model = "ARM Versatile AB";
-	compatible = "arm,versatile-ab";
-	#address-cells = <1>;
-	#size-cells = <1>;
-	interrupt-parent = <&vic>;
-
-	aliases {
-		serial0 = &uart0;
-		serial1 = &uart1;
-		serial2 = &uart2;
-		i2c0 = &i2c0;
-	};
-
-	memory {
-		reg = <0x0 0x08000000>;
-	};
-
-	flash@34000000 {
-		compatible = "arm,versatile-flash";
-		reg = <0x34000000 0x4000000>;
-		bank-width = <4>;
-	};
-
-	i2c0: i2c@10002000 {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		compatible = "arm,versatile-i2c";
-		reg = <0x10002000 0x1000>;
-
-		rtc@68 {
-			compatible = "dallas,ds1338";
-			reg = <0x68>;
-		};
-	};
-
-	net@10010000 {
-		compatible = "smsc,lan91c111";
-		reg = <0x10010000 0x10000>;
-		interrupts = <25>;
-	};
-
-	lcd@10008000 {
-		compatible = "arm,versatile-lcd";
-		reg = <0x10008000 0x1000>;
-	};
-
-	amba {
-		compatible = "arm,amba-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		vic: intc@10140000 {
-			compatible = "arm,versatile-vic";
-			interrupt-controller;
-			#interrupt-cells = <1>;
-			reg = <0x10140000 0x1000>;
-		};
-
-		sic: intc@10003000 {
-			compatible = "arm,versatile-sic";
-			interrupt-controller;
-			#interrupt-cells = <1>;
-			reg = <0x10003000 0x1000>;
-			interrupt-parent = <&vic>;
-			interrupts = <31>; /* Cascaded to vic */
-		};
-
-		dma@10130000 {
-			compatible = "arm,pl081", "arm,primecell";
-			reg = <0x10130000 0x1000>;
-			interrupts = <17>;
-		};
-
-		uart0: uart@101f1000 {
-			compatible = "arm,pl011", "arm,primecell";
-			reg = <0x101f1000 0x1000>;
-			interrupts = <12>;
-		};
-
-		uart1: uart@101f2000 {
-			compatible = "arm,pl011", "arm,primecell";
-			reg = <0x101f2000 0x1000>;
-			interrupts = <13>;
-		};
-
-		uart2: uart@101f3000 {
-			compatible = "arm,pl011", "arm,primecell";
-			reg = <0x101f3000 0x1000>;
-			interrupts = <14>;
-		};
-
-		smc@10100000 {
-			compatible = "arm,primecell";
-			reg = <0x10100000 0x1000>;
-		};
-
-		mpmc@10110000 {
-			compatible = "arm,primecell";
-			reg = <0x10110000 0x1000>;
-		};
-
-		display@10120000 {
-			compatible = "arm,pl110", "arm,primecell";
-			reg = <0x10120000 0x1000>;
-			interrupts = <16>;
-		};
-
-		sctl@101e0000 {
-			compatible = "arm,primecell";
-			reg = <0x101e0000 0x1000>;
-		};
-
-		watchdog@101e1000 {
-			compatible = "arm,primecell";
-			reg = <0x101e1000 0x1000>;
-			interrupts = <0>;
-		};
-
-		gpio0: gpio@101e4000 {
-			compatible = "arm,pl061", "arm,primecell";
-			reg = <0x101e4000 0x1000>;
-			gpio-controller;
-			interrupts = <6>;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-
-		gpio1: gpio@101e5000 {
-			compatible = "arm,pl061", "arm,primecell";
-			reg = <0x101e5000 0x1000>;
-			interrupts = <7>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-
-		rtc@101e8000 {
-			compatible = "arm,pl030", "arm,primecell";
-			reg = <0x101e8000 0x1000>;
-			interrupts = <10>;
-		};
-
-		sci@101f0000 {
-			compatible = "arm,primecell";
-			reg = <0x101f0000 0x1000>;
-			interrupts = <15>;
-		};
-
-		ssp@101f4000 {
-			compatible = "arm,pl022", "arm,primecell";
-			reg = <0x101f4000 0x1000>;
-			interrupts = <11>;
-		};
-
-		fpga {
-			compatible = "arm,versatile-fpga", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0 0x10000000 0x10000>;
-
-			aaci@4000 {
-				compatible = "arm,primecell";
-				reg = <0x4000 0x1000>;
-				interrupts = <24>;
-			};
-			mmc@5000 {
-				compatible = "arm,primecell";
-				reg = < 0x5000 0x1000>;
-				interrupts = <22 34>;
-			};
-			kmi@6000 {
-				compatible = "arm,pl050", "arm,primecell";
-				reg = <0x6000 0x1000>;
-				interrupt-parent = <&sic>;
-				interrupts = <3>;
-			};
-			kmi@7000 {
-				compatible = "arm,pl050", "arm,primecell";
-				reg = <0x7000 0x1000>;
-				interrupt-parent = <&sic>;
-				interrupts = <4>;
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/versatile-pb.dts b/ANDROID_3.4.5/arch/arm/boot/dts/versatile-pb.dts
deleted file mode 100644
index 7e817526..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/versatile-pb.dts
+++ /dev/null
@@ -1,50 +0,0 @@
-/include/ "versatile-ab.dts"
-
-/ {
-	model = "ARM Versatile PB";
-	compatible = "arm,versatile-pb";
-
-	amba {
-		gpio2: gpio@101e6000 {
-			compatible = "arm,pl061", "arm,primecell";
-			reg = <0x101e6000 0x1000>;
-			interrupts = <8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-
-		gpio3: gpio@101e7000 {
-			compatible = "arm,pl061", "arm,primecell";
-			reg = <0x101e7000 0x1000>;
-			interrupts = <9>;
-			gpio-controller;
-			#gpio-cells = <2>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-
-		fpga {
-			uart@9000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x9000 0x1000>;
-				interrupt-parent = <&sic>;
-				interrupts = <6>;
-			};
-			sci@a000 {
-				compatible = "arm,primecell";
-				reg = <0xa000 0x1000>;
-				interrupt-parent = <&sic>;
-				interrupts = <5>;
-			};
-			mmc@b000 {
-				compatible = "arm,primecell";
-				reg = <0xb000 0x1000>;
-				interrupts = <23 34>;
-			};
-		};
-	};
-};
-
-/include/ "testcases/tests.dtsi"
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
deleted file mode 100644
index 16076e2d..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ /dev/null
@@ -1,201 +0,0 @@
-/*
- * ARM Ltd. Versatile Express
- *
- * Motherboard Express uATX
- * V2M-P1
- *
- * HBI-0190D
- *
- * RS1 memory map ("ARM Cortex-A Series memory map" in the board's
- * Technical Reference Manual)
- *
- * WARNING! The hardware described in this file is independent from the
- * original variant (vexpress-v2m.dtsi), but there is a strong
- * correspondence between the two configurations.
- *
- * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
- * CHANGES TO vexpress-v2m.dtsi!
- */
-
-/ {
-	aliases {
-		arm,v2m_timer = &v2m_timer01;
-	};
-
-	motherboard {
-		compatible = "simple-bus";
-		arm,v2m-memory-map = "rs1";
-		#address-cells = <2>; /* SMB chipselect number and offset */
-		#size-cells = <1>;
-		#interrupt-cells = <1>;
-
-		flash@0,00000000 {
-			compatible = "arm,vexpress-flash", "cfi-flash";
-			reg = <0 0x00000000 0x04000000>,
-			      <4 0x00000000 0x04000000>;
-			bank-width = <4>;
-		};
-
-		psram@1,00000000 {
-			compatible = "arm,vexpress-psram", "mtd-ram";
-			reg = <1 0x00000000 0x02000000>;
-			bank-width = <4>;
-		};
-
-		vram@2,00000000 {
-			compatible = "arm,vexpress-vram";
-			reg = <2 0x00000000 0x00800000>;
-		};
-
-		ethernet@2,02000000 {
-			compatible = "smsc,lan9118", "smsc,lan9115";
-			reg = <2 0x02000000 0x10000>;
-			interrupts = <15>;
-			phy-mode = "mii";
-			reg-io-width = <4>;
-			smsc,irq-active-high;
-			smsc,irq-push-pull;
-		};
-
-		usb@2,03000000 {
-			compatible = "nxp,usb-isp1761";
-			reg = <2 0x03000000 0x20000>;
-			interrupts = <16>;
-			port1-otg;
-		};
-
-		iofpga@3,00000000 {
-			compatible = "arm,amba-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0 3 0 0x200000>;
-
-			sysreg@010000 {
-				compatible = "arm,vexpress-sysreg";
-				reg = <0x010000 0x1000>;
-			};
-
-			sysctl@020000 {
-				compatible = "arm,sp810", "arm,primecell";
-				reg = <0x020000 0x1000>;
-			};
-
-			/* PCI-E I2C bus */
-			v2m_i2c_pcie: i2c@030000 {
-				compatible = "arm,versatile-i2c";
-				reg = <0x030000 0x1000>;
-
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				pcie-switch@60 {
-					compatible = "idt,89hpes32h8";
-					reg = <0x60>;
-				};
-			};
-
-			aaci@040000 {
-				compatible = "arm,pl041", "arm,primecell";
-				reg = <0x040000 0x1000>;
-				interrupts = <11>;
-			};
-
-			mmci@050000 {
-				compatible = "arm,pl180", "arm,primecell";
-				reg = <0x050000 0x1000>;
-				interrupts = <9 10>;
-			};
-
-			kmi@060000 {
-				compatible = "arm,pl050", "arm,primecell";
-				reg = <0x060000 0x1000>;
-				interrupts = <12>;
-			};
-
-			kmi@070000 {
-				compatible = "arm,pl050", "arm,primecell";
-				reg = <0x070000 0x1000>;
-				interrupts = <13>;
-			};
-
-			v2m_serial0: uart@090000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x090000 0x1000>;
-				interrupts = <5>;
-			};
-
-			v2m_serial1: uart@0a0000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x0a0000 0x1000>;
-				interrupts = <6>;
-			};
-
-			v2m_serial2: uart@0b0000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x0b0000 0x1000>;
-				interrupts = <7>;
-			};
-
-			v2m_serial3: uart@0c0000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x0c0000 0x1000>;
-				interrupts = <8>;
-			};
-
-			wdt@0f0000 {
-				compatible = "arm,sp805", "arm,primecell";
-				reg = <0x0f0000 0x1000>;
-				interrupts = <0>;
-			};
-
-			v2m_timer01: timer@110000 {
-				compatible = "arm,sp804", "arm,primecell";
-				reg = <0x110000 0x1000>;
-				interrupts = <2>;
-			};
-
-			v2m_timer23: timer@120000 {
-				compatible = "arm,sp804", "arm,primecell";
-				reg = <0x120000 0x1000>;
-			};
-
-			/* DVI I2C bus */
-			v2m_i2c_dvi: i2c@160000 {
-				compatible = "arm,versatile-i2c";
-				reg = <0x160000 0x1000>;
-
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				dvi-transmitter@39 {
-					compatible = "sil,sii9022-tpi", "sil,sii9022";
-					reg = <0x39>;
-				};
-
-				dvi-transmitter@60 {
-					compatible = "sil,sii9022-cpi", "sil,sii9022";
-					reg = <0x60>;
-				};
-			};
-
-			rtc@170000 {
-				compatible = "arm,pl031", "arm,primecell";
-				reg = <0x170000 0x1000>;
-				interrupts = <4>;
-			};
-
-			compact-flash@1a0000 {
-				compatible = "arm,vexpress-cf", "ata-generic";
-				reg = <0x1a0000 0x100
-				       0x1a0100 0xf00>;
-				reg-shift = <2>;
-			};
-
-			clcd@1f0000 {
-				compatible = "arm,pl111", "arm,primecell";
-				reg = <0x1f0000 0x1000>;
-				interrupts = <14>;
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2m.dtsi b/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2m.dtsi
deleted file mode 100644
index a6c9c7c8..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2m.dtsi
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- * ARM Ltd. Versatile Express
- *
- * Motherboard Express uATX
- * V2M-P1
- *
- * HBI-0190D
- *
- * Original memory map ("Legacy memory map" in the board's
- * Technical Reference Manual)
- *
- * WARNING! The hardware described in this file is independent from the
- * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
- * correspondence between the two configurations.
- *
- * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
- * CHANGES TO vexpress-v2m-rs1.dtsi!
- */
-
-/ {
-	aliases {
-		arm,v2m_timer = &v2m_timer01;
-	};
-
-	motherboard {
-		compatible = "simple-bus";
-		#address-cells = <2>; /* SMB chipselect number and offset */
-		#size-cells = <1>;
-		#interrupt-cells = <1>;
-
-		flash@0,00000000 {
-			compatible = "arm,vexpress-flash", "cfi-flash";
-			reg = <0 0x00000000 0x04000000>,
-			      <1 0x00000000 0x04000000>;
-			bank-width = <4>;
-		};
-
-		psram@2,00000000 {
-			compatible = "arm,vexpress-psram", "mtd-ram";
-			reg = <2 0x00000000 0x02000000>;
-			bank-width = <4>;
-		};
-
-		vram@3,00000000 {
-			compatible = "arm,vexpress-vram";
-			reg = <3 0x00000000 0x00800000>;
-		};
-
-		ethernet@3,02000000 {
-			compatible = "smsc,lan9118", "smsc,lan9115";
-			reg = <3 0x02000000 0x10000>;
-			interrupts = <15>;
-			phy-mode = "mii";
-			reg-io-width = <4>;
-			smsc,irq-active-high;
-			smsc,irq-push-pull;
-		};
-
-		usb@3,03000000 {
-			compatible = "nxp,usb-isp1761";
-			reg = <3 0x03000000 0x20000>;
-			interrupts = <16>;
-			port1-otg;
-		};
-
-		iofpga@7,00000000 {
-			compatible = "arm,amba-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0 7 0 0x20000>;
-
-			sysreg@00000 {
-				compatible = "arm,vexpress-sysreg";
-				reg = <0x00000 0x1000>;
-			};
-
-			sysctl@01000 {
-				compatible = "arm,sp810", "arm,primecell";
-				reg = <0x01000 0x1000>;
-			};
-
-			/* PCI-E I2C bus */
-			v2m_i2c_pcie: i2c@02000 {
-				compatible = "arm,versatile-i2c";
-				reg = <0x02000 0x1000>;
-
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				pcie-switch@60 {
-					compatible = "idt,89hpes32h8";
-					reg = <0x60>;
-				};
-			};
-
-			aaci@04000 {
-				compatible = "arm,pl041", "arm,primecell";
-				reg = <0x04000 0x1000>;
-				interrupts = <11>;
-			};
-
-			mmci@05000 {
-				compatible = "arm,pl180", "arm,primecell";
-				reg = <0x05000 0x1000>;
-				interrupts = <9 10>;
-			};
-
-			kmi@06000 {
-				compatible = "arm,pl050", "arm,primecell";
-				reg = <0x06000 0x1000>;
-				interrupts = <12>;
-			};
-
-			kmi@07000 {
-				compatible = "arm,pl050", "arm,primecell";
-				reg = <0x07000 0x1000>;
-				interrupts = <13>;
-			};
-
-			v2m_serial0: uart@09000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x09000 0x1000>;
-				interrupts = <5>;
-			};
-
-			v2m_serial1: uart@0a000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x0a000 0x1000>;
-				interrupts = <6>;
-			};
-
-			v2m_serial2: uart@0b000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x0b000 0x1000>;
-				interrupts = <7>;
-			};
-
-			v2m_serial3: uart@0c000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x0c000 0x1000>;
-				interrupts = <8>;
-			};
-
-			wdt@0f000 {
-				compatible = "arm,sp805", "arm,primecell";
-				reg = <0x0f000 0x1000>;
-				interrupts = <0>;
-			};
-
-			v2m_timer01: timer@11000 {
-				compatible = "arm,sp804", "arm,primecell";
-				reg = <0x11000 0x1000>;
-				interrupts = <2>;
-			};
-
-			v2m_timer23: timer@12000 {
-				compatible = "arm,sp804", "arm,primecell";
-				reg = <0x12000 0x1000>;
-			};
-
-			/* DVI I2C bus */
-			v2m_i2c_dvi: i2c@16000 {
-				compatible = "arm,versatile-i2c";
-				reg = <0x16000 0x1000>;
-
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				dvi-transmitter@39 {
-					compatible = "sil,sii9022-tpi", "sil,sii9022";
-					reg = <0x39>;
-				};
-
-				dvi-transmitter@60 {
-					compatible = "sil,sii9022-cpi", "sil,sii9022";
-					reg = <0x60>;
-				};
-			};
-
-			rtc@17000 {
-				compatible = "arm,pl031", "arm,primecell";
-				reg = <0x17000 0x1000>;
-				interrupts = <4>;
-			};
-
-			compact-flash@1a000 {
-				compatible = "arm,vexpress-cf", "ata-generic";
-				reg = <0x1a000 0x100
-				       0x1a100 0xf00>;
-				reg-shift = <2>;
-			};
-
-			clcd@1f000 {
-				compatible = "arm,pl111", "arm,primecell";
-				reg = <0x1f000 0x1000>;
-				interrupts = <14>;
-			};
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
deleted file mode 100644
index 941b161a..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * ARM Ltd. Versatile Express
- *
- * CoreTile Express A15x2 (version with Test Chip 1)
- * Cortex-A15 MPCore (V2P-CA15)
- *
- * HBI-0237A
- */
-
-/dts-v1/;
-
-/ {
-	model = "V2P-CA15";
-	arm,hbi = <0x237>;
-	compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
-	interrupt-parent = <&gic>;
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	chosen { };
-
-	aliases {
-		serial0 = &v2m_serial0;
-		serial1 = &v2m_serial1;
-		serial2 = &v2m_serial2;
-		serial3 = &v2m_serial3;
-		i2c0 = &v2m_i2c_dvi;
-		i2c1 = &v2m_i2c_pcie;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a15";
-			reg = <0>;
-		};
-
-		cpu@1 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a15";
-			reg = <1>;
-		};
-	};
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0x80000000 0x40000000>;
-	};
-
-	hdlcd@2b000000 {
-		compatible = "arm,hdlcd";
-		reg = <0x2b000000 0x1000>;
-		interrupts = <0 85 4>;
-	};
-
-	memory-controller@2b0a0000 {
-		compatible = "arm,pl341", "arm,primecell";
-		reg = <0x2b0a0000 0x1000>;
-	};
-
-	wdt@2b060000 {
-		compatible = "arm,sp805", "arm,primecell";
-		reg = <0x2b060000 0x1000>;
-		interrupts = <98>;
-	};
-
-	gic: interrupt-controller@2c001000 {
-		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
-		#interrupt-cells = <3>;
-		#address-cells = <0>;
-		interrupt-controller;
-		reg = <0x2c001000 0x1000>,
-		      <0x2c002000 0x100>;
-	};
-
-	memory-controller@7ffd0000 {
-		compatible = "arm,pl354", "arm,primecell";
-		reg = <0x7ffd0000 0x1000>;
-		interrupts = <0 86 4>,
-			     <0 87 4>;
-	};
-
-	dma@7ffb0000 {
-		compatible = "arm,pl330", "arm,primecell";
-		reg = <0x7ffb0000 0x1000>;
-		interrupts = <0 92 4>,
-			     <0 88 4>,
-			     <0 89 4>,
-			     <0 90 4>,
-			     <0 91 4>;
-	};
-
-	pmu {
-		compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
-		interrupts = <0 68 4>,
-			     <0 69 4>;
-	};
-
-	motherboard {
-		ranges = <0 0 0x08000000 0x04000000>,
-			 <1 0 0x14000000 0x04000000>,
-			 <2 0 0x18000000 0x04000000>,
-			 <3 0 0x1c000000 0x04000000>,
-			 <4 0 0x0c000000 0x04000000>,
-			 <5 0 0x10000000 0x04000000>;
-
-		interrupt-map-mask = <0 0 63>;
-		interrupt-map = <0 0  0 &gic 0  0 4>,
-				<0 0  1 &gic 0  1 4>,
-				<0 0  2 &gic 0  2 4>,
-				<0 0  3 &gic 0  3 4>,
-				<0 0  4 &gic 0  4 4>,
-				<0 0  5 &gic 0  5 4>,
-				<0 0  6 &gic 0  6 4>,
-				<0 0  7 &gic 0  7 4>,
-				<0 0  8 &gic 0  8 4>,
-				<0 0  9 &gic 0  9 4>,
-				<0 0 10 &gic 0 10 4>,
-				<0 0 11 &gic 0 11 4>,
-				<0 0 12 &gic 0 12 4>,
-				<0 0 13 &gic 0 13 4>,
-				<0 0 14 &gic 0 14 4>,
-				<0 0 15 &gic 0 15 4>,
-				<0 0 16 &gic 0 16 4>,
-				<0 0 17 &gic 0 17 4>,
-				<0 0 18 &gic 0 18 4>,
-				<0 0 19 &gic 0 19 4>,
-				<0 0 20 &gic 0 20 4>,
-				<0 0 21 &gic 0 21 4>,
-				<0 0 22 &gic 0 22 4>,
-				<0 0 23 &gic 0 23 4>,
-				<0 0 24 &gic 0 24 4>,
-				<0 0 25 &gic 0 25 4>,
-				<0 0 26 &gic 0 26 4>,
-				<0 0 27 &gic 0 27 4>,
-				<0 0 28 &gic 0 28 4>,
-				<0 0 29 &gic 0 29 4>,
-				<0 0 30 &gic 0 30 4>,
-				<0 0 31 &gic 0 31 4>,
-				<0 0 32 &gic 0 32 4>,
-				<0 0 33 &gic 0 33 4>,
-				<0 0 34 &gic 0 34 4>,
-				<0 0 35 &gic 0 35 4>,
-				<0 0 36 &gic 0 36 4>,
-				<0 0 37 &gic 0 37 4>,
-				<0 0 38 &gic 0 38 4>,
-				<0 0 39 &gic 0 39 4>,
-				<0 0 40 &gic 0 40 4>,
-				<0 0 41 &gic 0 41 4>,
-				<0 0 42 &gic 0 42 4>;
-	};
-};
-
-/include/ "vexpress-v2m-rs1.dtsi"
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
deleted file mode 100644
index 6905e66d..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * ARM Ltd. Versatile Express
- *
- * CoreTile Express A5x2
- * Cortex-A5 MPCore (V2P-CA5s)
- *
- * HBI-0225B
- */
-
-/dts-v1/;
-
-/ {
-	model = "V2P-CA5s";
-	arm,hbi = <0x225>;
-	compatible = "arm,vexpress,v2p-ca5s", "arm,vexpress";
-	interrupt-parent = <&gic>;
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	chosen { };
-
-	aliases {
-		serial0 = &v2m_serial0;
-		serial1 = &v2m_serial1;
-		serial2 = &v2m_serial2;
-		serial3 = &v2m_serial3;
-		i2c0 = &v2m_i2c_dvi;
-		i2c1 = &v2m_i2c_pcie;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a5";
-			reg = <0>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@1 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a5";
-			reg = <1>;
-			next-level-cache = <&L2>;
-		};
-	};
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0x80000000 0x40000000>;
-	};
-
-	hdlcd@2a110000 {
-		compatible = "arm,hdlcd";
-		reg = <0x2a110000 0x1000>;
-		interrupts = <0 85 4>;
-	};
-
-	memory-controller@2a150000 {
-		compatible = "arm,pl341", "arm,primecell";
-		reg = <0x2a150000 0x1000>;
-	};
-
-	memory-controller@2a190000 {
-		compatible = "arm,pl354", "arm,primecell";
-		reg = <0x2a190000 0x1000>;
-		interrupts = <0 86 4>,
-			     <0 87 4>;
-	};
-
-	scu@2c000000 {
-		compatible = "arm,cortex-a5-scu";
-		reg = <0x2c000000 0x58>;
-	};
-
-	timer@2c000600 {
-		compatible = "arm,cortex-a5-twd-timer";
-		reg = <0x2c000600 0x38>;
-		interrupts = <1 2 0x304>,
-			     <1 3 0x304>;
-	};
-
-	gic: interrupt-controller@2c001000 {
-		compatible = "arm,corex-a5-gic", "arm,cortex-a9-gic";
-		#interrupt-cells = <3>;
-		#address-cells = <0>;
-		interrupt-controller;
-		reg = <0x2c001000 0x1000>,
-		      <0x2c000100 0x100>;
-	};
-
-	L2: cache-controller@2c0f0000 {
-		compatible = "arm,pl310-cache";
-		reg = <0x2c0f0000 0x1000>;
-		interrupts = <0 84 4>;
-		cache-level = <2>;
-	};
-
-	pmu {
-		compatible = "arm,cortex-a5-pmu", "arm,cortex-a9-pmu";
-		interrupts = <0 68 4>,
-			     <0 69 4>;
-	};
-
-	motherboard {
-		ranges = <0 0 0x08000000 0x04000000>,
-			 <1 0 0x14000000 0x04000000>,
-			 <2 0 0x18000000 0x04000000>,
-			 <3 0 0x1c000000 0x04000000>,
-			 <4 0 0x0c000000 0x04000000>,
-			 <5 0 0x10000000 0x04000000>;
-
-		interrupt-map-mask = <0 0 63>;
-		interrupt-map = <0 0  0 &gic 0  0 4>,
-				<0 0  1 &gic 0  1 4>,
-				<0 0  2 &gic 0  2 4>,
-				<0 0  3 &gic 0  3 4>,
-				<0 0  4 &gic 0  4 4>,
-				<0 0  5 &gic 0  5 4>,
-				<0 0  6 &gic 0  6 4>,
-				<0 0  7 &gic 0  7 4>,
-				<0 0  8 &gic 0  8 4>,
-				<0 0  9 &gic 0  9 4>,
-				<0 0 10 &gic 0 10 4>,
-				<0 0 11 &gic 0 11 4>,
-				<0 0 12 &gic 0 12 4>,
-				<0 0 13 &gic 0 13 4>,
-				<0 0 14 &gic 0 14 4>,
-				<0 0 15 &gic 0 15 4>,
-				<0 0 16 &gic 0 16 4>,
-				<0 0 17 &gic 0 17 4>,
-				<0 0 18 &gic 0 18 4>,
-				<0 0 19 &gic 0 19 4>,
-				<0 0 20 &gic 0 20 4>,
-				<0 0 21 &gic 0 21 4>,
-				<0 0 22 &gic 0 22 4>,
-				<0 0 23 &gic 0 23 4>,
-				<0 0 24 &gic 0 24 4>,
-				<0 0 25 &gic 0 25 4>,
-				<0 0 26 &gic 0 26 4>,
-				<0 0 27 &gic 0 27 4>,
-				<0 0 28 &gic 0 28 4>,
-				<0 0 29 &gic 0 29 4>,
-				<0 0 30 &gic 0 30 4>,
-				<0 0 31 &gic 0 31 4>,
-				<0 0 32 &gic 0 32 4>,
-				<0 0 33 &gic 0 33 4>,
-				<0 0 34 &gic 0 34 4>,
-				<0 0 35 &gic 0 35 4>,
-				<0 0 36 &gic 0 36 4>,
-				<0 0 37 &gic 0 37 4>,
-				<0 0 38 &gic 0 38 4>,
-				<0 0 39 &gic 0 39 4>,
-				<0 0 40 &gic 0 40 4>,
-				<0 0 41 &gic 0 41 4>,
-				<0 0 42 &gic 0 42 4>;
-	};
-};
-
-/include/ "vexpress-v2m-rs1.dtsi"
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2p-ca9.dts
deleted file mode 100644
index da778693..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * ARM Ltd. Versatile Express
- *
- * CoreTile Express A9x4
- * Cortex-A9 MPCore (V2P-CA9)
- *
- * HBI-0191B
- */
-
-/dts-v1/;
-
-/ {
-	model = "V2P-CA9";
-	arm,hbi = <0x191>;
-	compatible = "arm,vexpress,v2p-ca9", "arm,vexpress";
-	interrupt-parent = <&gic>;
-	#address-cells = <1>;
-	#size-cells = <1>;
-
-	chosen { };
-
-	aliases {
-		serial0 = &v2m_serial0;
-		serial1 = &v2m_serial1;
-		serial2 = &v2m_serial2;
-		serial3 = &v2m_serial3;
-		i2c0 = &v2m_i2c_dvi;
-		i2c1 = &v2m_i2c_pcie;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a9";
-			reg = <0>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@1 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a9";
-			reg = <1>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@2 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a9";
-			reg = <2>;
-			next-level-cache = <&L2>;
-		};
-
-		cpu@3 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a9";
-			reg = <3>;
-			next-level-cache = <&L2>;
-		};
-	};
-
-	memory@60000000 {
-		device_type = "memory";
-		reg = <0x60000000 0x40000000>;
-	};
-
-	clcd@10020000 {
-		compatible = "arm,pl111", "arm,primecell";
-		reg = <0x10020000 0x1000>;
-		interrupts = <0 44 4>;
-	};
-
-	memory-controller@100e0000 {
-		compatible = "arm,pl341", "arm,primecell";
-		reg = <0x100e0000 0x1000>;
-	};
-
-	memory-controller@100e1000 {
-		compatible = "arm,pl354", "arm,primecell";
-		reg = <0x100e1000 0x1000>;
-		interrupts = <0 45 4>,
-			     <0 46 4>;
-	};
-
-	timer@100e4000 {
-		compatible = "arm,sp804", "arm,primecell";
-		reg = <0x100e4000 0x1000>;
-		interrupts = <0 48 4>,
-			     <0 49 4>;
-	};
-
-	watchdog@100e5000 {
-		compatible = "arm,sp805", "arm,primecell";
-		reg = <0x100e5000 0x1000>;
-		interrupts = <0 51 4>;
-	};
-
-	scu@1e000000 {
-		compatible = "arm,cortex-a9-scu";
-		reg = <0x1e000000 0x58>;
-	};
-
-	timer@1e000600 {
-		compatible = "arm,cortex-a9-twd-timer";
-		reg = <0x1e000600 0x20>;
-		interrupts = <1 2 0xf04>,
-			     <1 3 0xf04>;
-	};
-
-	gic: interrupt-controller@1e001000 {
-		compatible = "arm,cortex-a9-gic";
-		#interrupt-cells = <3>;
-		#address-cells = <0>;
-		interrupt-controller;
-		reg = <0x1e001000 0x1000>,
-		      <0x1e000100 0x100>;
-	};
-
-	L2: cache-controller@1e00a000 {
-		compatible = "arm,pl310-cache";
-		reg = <0x1e00a000 0x1000>;
-		interrupts = <0 43 4>;
-		cache-level = <2>;
-		arm,data-latency = <1 1 1>;
-		arm,tag-latency = <1 1 1>;
-	};
-
-	pmu {
-		compatible = "arm,cortex-a9-pmu";
-		interrupts = <0 60 4>,
-			     <0 61 4>,
-			     <0 62 4>,
-			     <0 63 4>;
-	};
-
-	motherboard {
-		ranges = <0 0 0x40000000 0x04000000>,
-			 <1 0 0x44000000 0x04000000>,
-			 <2 0 0x48000000 0x04000000>,
-			 <3 0 0x4c000000 0x04000000>,
-			 <7 0 0x10000000 0x00020000>;
-
-		interrupt-map-mask = <0 0 63>;
-		interrupt-map = <0 0  0 &gic 0  0 4>,
-				<0 0  1 &gic 0  1 4>,
-				<0 0  2 &gic 0  2 4>,
-				<0 0  3 &gic 0  3 4>,
-				<0 0  4 &gic 0  4 4>,
-				<0 0  5 &gic 0  5 4>,
-				<0 0  6 &gic 0  6 4>,
-				<0 0  7 &gic 0  7 4>,
-				<0 0  8 &gic 0  8 4>,
-				<0 0  9 &gic 0  9 4>,
-				<0 0 10 &gic 0 10 4>,
-				<0 0 11 &gic 0 11 4>,
-				<0 0 12 &gic 0 12 4>,
-				<0 0 13 &gic 0 13 4>,
-				<0 0 14 &gic 0 14 4>,
-				<0 0 15 &gic 0 15 4>,
-				<0 0 16 &gic 0 16 4>,
-				<0 0 17 &gic 0 17 4>,
-				<0 0 18 &gic 0 18 4>,
-				<0 0 19 &gic 0 19 4>,
-				<0 0 20 &gic 0 20 4>,
-				<0 0 21 &gic 0 21 4>,
-				<0 0 22 &gic 0 22 4>,
-				<0 0 23 &gic 0 23 4>,
-				<0 0 24 &gic 0 24 4>,
-				<0 0 25 &gic 0 25 4>,
-				<0 0 26 &gic 0 26 4>,
-				<0 0 27 &gic 0 27 4>,
-				<0 0 28 &gic 0 28 4>,
-				<0 0 29 &gic 0 29 4>,
-				<0 0 30 &gic 0 30 4>,
-				<0 0 31 &gic 0 31 4>,
-				<0 0 32 &gic 0 32 4>,
-				<0 0 33 &gic 0 33 4>,
-				<0 0 34 &gic 0 34 4>,
-				<0 0 35 &gic 0 35 4>,
-				<0 0 36 &gic 0 36 4>,
-				<0 0 37 &gic 0 37 4>,
-				<0 0 38 &gic 0 38 4>,
-				<0 0 39 &gic 0 39 4>,
-				<0 0 40 &gic 0 40 4>,
-				<0 0 41 &gic 0 41 4>,
-				<0 0 42 &gic 0 42 4>;
-	};
-};
-
-/include/ "vexpress-v2m.dtsi"
diff --git a/ANDROID_3.4.5/arch/arm/boot/dts/zynq-ep107.dts b/ANDROID_3.4.5/arch/arm/boot/dts/zynq-ep107.dts
deleted file mode 100644
index 37ca192f..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/dts/zynq-ep107.dts
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- *  Copyright (C) 2011 Xilinx
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/dts-v1/;
-/ {
-	model = "Xilinx Zynq EP107";
-	compatible = "xlnx,zynq-ep107";
-	#address-cells = <1>;
-	#size-cells = <1>;
-	interrupt-parent = <&intc>;
-
-	memory {
-		device_type = "memory";
-		reg = <0x0 0x10000000>;
-	};
-
-	chosen {
-		bootargs = "console=ttyPS0,9600 root=/dev/ram rw initrd=0x800000,8M earlyprintk";
-		linux,stdout-path = &uart0;
-	};
-
-	amba {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges;
-
-		intc: interrupt-controller@f8f01000 {
-			interrupt-controller;
-			compatible = "arm,gic";
-			reg = <0xF8F01000 0x1000>;
-			#interrupt-cells = <2>;
-		};
-
-		uart0: uart@e0000000 {
-			compatible = "xlnx,xuartps";
-			reg = <0xE0000000 0x1000>;
-			interrupts = <59 0>;
-			clock = <50000000>;
-		};
-	};
-};
diff --git a/ANDROID_3.4.5/arch/arm/boot/install.sh b/ANDROID_3.4.5/arch/arm/boot/install.sh
deleted file mode 100644
index 06ea7d42..00000000
--- a/ANDROID_3.4.5/arch/arm/boot/install.sh
+++ /dev/null
@@ -1,52 +0,0 @@
-#!/bin/sh
-#
-# arch/arm/boot/install.sh
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License.  See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1995 by Linus Torvalds
-#
-# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
-# Adapted from code in arch/i386/boot/install.sh by Russell King
-#
-# "make install" script for arm architecture
-#
-# Arguments:
-#   $1 - kernel version
-#   $2 - kernel image file
-#   $3 - kernel map file
-#   $4 - default install path (blank if root directory)
-#
-
-# User may have a custom install script
-if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
-if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi
-
-if [ "$(basename $2)" = "zImage" ]; then
-# Compressed install
-  echo "Installing compressed kernel"
-  base=vmlinuz
-else
-# Normal install
-  echo "Installing normal kernel"
-  base=vmlinux
-fi
-
-if [ -f $4/$base-$1 ]; then
-  mv $4/$base-$1 $4/$base-$1.old
-fi
-cat $2 > $4/$base-$1
-
-# Install system map file
-if [ -f $4/System.map-$1 ]; then
-  mv $4/System.map-$1 $4/System.map-$1.old
-fi
-cp $3 $4/System.map-$1
-
-if [ -x /sbin/loadmap ]; then
-  /sbin/loadmap
-else
-  echo "You have to install it yourself"
-fi