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| author | siddhu8990 | 2017-06-21 15:18:15 +0530 |
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| committer | siddhu8990 | 2017-06-21 15:18:15 +0530 |
| commit | adbc46709966e50b3fed6ff061afff9e59d4b79c (patch) | |
| tree | c0a375b9c280a878e451d06f9cac2e90a433165d /src/c/signalProcessing/includes/modk.h | |
| parent | 240e5e93815eef0992834ec7bd2a8162acca13f0 (diff) | |
| parent | 18f7cf96174799b674115e43f108423fa5d0fc9c (diff) | |
| download | scilab2c-adbc46709966e50b3fed6ff061afff9e59d4b79c.tar.gz scilab2c-adbc46709966e50b3fed6ff061afff9e59d4b79c.tar.bz2 scilab2c-adbc46709966e50b3fed6ff061afff9e59d4b79c.zip | |
Merged Ukasha's work, code generation for control loop changed
Diffstat (limited to 'src/c/signalProcessing/includes/modk.h')
| -rw-r--r-- | src/c/signalProcessing/includes/modk.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/c/signalProcessing/includes/modk.h b/src/c/signalProcessing/includes/modk.h new file mode 100644 index 00000000..5040eb7f --- /dev/null +++ b/src/c/signalProcessing/includes/modk.h @@ -0,0 +1,28 @@ +/* Copyright (C) 2017 - IIT Bombay - FOSSEE + + This file must be used under the terms of the CeCILL. + This source file is licensed as described in the file COPYING, which + you should have received as part of this distribution. The terms + are also available at + http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt + Author: Ankit Raj + Organization: FOSSEE, IIT Bombay + Email: toolbox@scilab.in + */ + +#ifndef __MODK_H__ +#define __MODK_H__ +#include "types.h" + +#ifdef __cplusplus +extern "C" { +#endif + +void dmodka(double* inp,int size,double* oup); + +#ifdef __cplusplus +} /* extern "C" */ +#endif + +#endif /* __MODK_H__ */ + |