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author | yash1112 | 2017-07-07 21:20:49 +0530 |
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committer | yash1112 | 2017-07-07 21:20:49 +0530 |
commit | 3f52712f806fbd80d66dfdcaff401e5cf94dcca4 (patch) | |
tree | a8333b8187cb44b505b9fe37fc9a7ac8a1711c10 /src/c/hardware/avr/pwm/u8AVRPWM1SetDutys.c | |
download | scilab2c-3f52712f806fbd80d66dfdcaff401e5cf94dcca4.tar.gz scilab2c-3f52712f806fbd80d66dfdcaff401e5cf94dcca4.tar.bz2 scilab2c-3f52712f806fbd80d66dfdcaff401e5cf94dcca4.zip |
sci2c arduino updated
Diffstat (limited to 'src/c/hardware/avr/pwm/u8AVRPWM1SetDutys.c')
-rw-r--r-- | src/c/hardware/avr/pwm/u8AVRPWM1SetDutys.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/c/hardware/avr/pwm/u8AVRPWM1SetDutys.c b/src/c/hardware/avr/pwm/u8AVRPWM1SetDutys.c new file mode 100644 index 00000000..47aad1c8 --- /dev/null +++ b/src/c/hardware/avr/pwm/u8AVRPWM1SetDutys.c @@ -0,0 +1,31 @@ +/* Copyright (C) 2016 - IIT Bombay - FOSSEE + + This file must be used under the terms of the CeCILL. + This source file is licensed as described in the file COPYING, which + you should have received as part of this distribution. The terms + are also available at + http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt + Author: Ashish Kamble + Organization: FOSSEE, IIT Bombay + Email: toolbox@scilab.in +*/ +//Function to Set Duty cycle and Top Value of PWM Output generated by Timer1 at OC1A or OC1B pin. + +#include "AVRPeripheralPWM.h" + +uint8 u8AVRPWM1SetDutys(uint8 output_pin, uint16 duty, uint16 Top_Value) +{ + uint16 duty_value = 0; + ICR1 = Top_Value; + if(output_pin==0) + { + duty_value = (((uint16)(duty * Top_Value))/100); + OCR1A = duty_value; + } + else if(output_pin==1) + { + duty_value = (((uint16)(duty * Top_Value))/100); + OCR1B = duty_value; + } + return 0; +} |