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-rw-r--r--Example/2-bit-inverter/2-bit-inverter.cir2
1 files changed, 1 insertions, 1 deletions
diff --git a/Example/2-bit-inverter/2-bit-inverter.cir b/Example/2-bit-inverter/2-bit-inverter.cir
index 71794b2..88580dd 100644
--- a/Example/2-bit-inverter/2-bit-inverter.cir
+++ b/Example/2-bit-inverter/2-bit-inverter.cir
@@ -23,7 +23,7 @@ aconverter1 [100 200] [1 2] adc_bridge1
ainverter [1 2] [10 20] inv1
-.model inv1 inverter(rise_delay = 1.0e-12 fall_delay = 1.0e-12 stop_time=90e-9)
+.model inv1 inverter(instance_id = 101 rise_delay = 1.0e-12 fall_delay = 1.0e-12 stop_time=90e-9)
aconverter2 [10 20] [30 40] dac_bridge1